
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.7.1
// timestamp : Fri Jun 17 14:18:08 2022 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /scratch/pawan/work/normalised/RV32F/fnmsub.s.cgf \
 \
//                  -- xlen 32  \
//                  --randomize \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fnmsub.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fnmsub_b15 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fnmsub_b15)
RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15)
RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_1536:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x015d4c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d015d4c; op2val:0x80000000;
op3val:0x8effff80; valaddr_reg:x3; val_offset:4608*0 + 3*-1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4608*0 + 3*0*FLEN/8, x4, x1, x2)

inst_1537:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x015d4c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d015d4c; op2val:0x80000000;
op3val:0x8effffc0; valaddr_reg:x3; val_offset:4611*0 + 3*0*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4611*0 + 3*1*FLEN/8, x4, x1, x2)

inst_1538:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x015d4c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d015d4c; op2val:0x80000000;
op3val:0x8effffe0; valaddr_reg:x3; val_offset:4614*0 + 3*1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4614*0 + 3*2*FLEN/8, x4, x1, x2)

inst_1539:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x015d4c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d015d4c; op2val:0x80000000;
op3val:0x8efffff0; valaddr_reg:x3; val_offset:4617*0 + 3*2*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4617*0 + 3*3*FLEN/8, x4, x1, x2)

inst_1540:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x015d4c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d015d4c; op2val:0x80000000;
op3val:0x8efffff8; valaddr_reg:x3; val_offset:4620*0 + 3*3*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4620*0 + 3*4*FLEN/8, x4, x1, x2)

inst_1541:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x015d4c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d015d4c; op2val:0x80000000;
op3val:0x8efffffc; valaddr_reg:x3; val_offset:4623*0 + 3*4*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4623*0 + 3*5*FLEN/8, x4, x1, x2)

inst_1542:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x015d4c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d015d4c; op2val:0x80000000;
op3val:0x8efffffe; valaddr_reg:x3; val_offset:4626*0 + 3*5*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4626*0 + 3*6*FLEN/8, x4, x1, x2)

inst_1543:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x015d4c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d015d4c; op2val:0x80000000;
op3val:0x8effffff; valaddr_reg:x3; val_offset:4629*0 + 3*6*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4629*0 + 3*7*FLEN/8, x4, x1, x2)

inst_1544:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x28000000; valaddr_reg:x3; val_offset:4632*0 + 3*7*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4632*0 + 3*8*FLEN/8, x4, x1, x2)

inst_1545:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x28000001; valaddr_reg:x3; val_offset:4635*0 + 3*8*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4635*0 + 3*9*FLEN/8, x4, x1, x2)

inst_1546:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x28000003; valaddr_reg:x3; val_offset:4638*0 + 3*9*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4638*0 + 3*10*FLEN/8, x4, x1, x2)

inst_1547:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x28000007; valaddr_reg:x3; val_offset:4641*0 + 3*10*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4641*0 + 3*11*FLEN/8, x4, x1, x2)

inst_1548:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x2800000f; valaddr_reg:x3; val_offset:4644*0 + 3*11*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4644*0 + 3*12*FLEN/8, x4, x1, x2)

inst_1549:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x2800001f; valaddr_reg:x3; val_offset:4647*0 + 3*12*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4647*0 + 3*13*FLEN/8, x4, x1, x2)

inst_1550:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x2800003f; valaddr_reg:x3; val_offset:4650*0 + 3*13*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4650*0 + 3*14*FLEN/8, x4, x1, x2)

inst_1551:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x2800007f; valaddr_reg:x3; val_offset:4653*0 + 3*14*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4653*0 + 3*15*FLEN/8, x4, x1, x2)

inst_1552:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x280000ff; valaddr_reg:x3; val_offset:4656*0 + 3*15*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4656*0 + 3*16*FLEN/8, x4, x1, x2)

inst_1553:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x280001ff; valaddr_reg:x3; val_offset:4659*0 + 3*16*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4659*0 + 3*17*FLEN/8, x4, x1, x2)

inst_1554:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x280003ff; valaddr_reg:x3; val_offset:4662*0 + 3*17*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4662*0 + 3*18*FLEN/8, x4, x1, x2)

inst_1555:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x280007ff; valaddr_reg:x3; val_offset:4665*0 + 3*18*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4665*0 + 3*19*FLEN/8, x4, x1, x2)

inst_1556:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x28000fff; valaddr_reg:x3; val_offset:4668*0 + 3*19*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4668*0 + 3*20*FLEN/8, x4, x1, x2)

inst_1557:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x28001fff; valaddr_reg:x3; val_offset:4671*0 + 3*20*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4671*0 + 3*21*FLEN/8, x4, x1, x2)

inst_1558:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x28003fff; valaddr_reg:x3; val_offset:4674*0 + 3*21*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4674*0 + 3*22*FLEN/8, x4, x1, x2)

inst_1559:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x28007fff; valaddr_reg:x3; val_offset:4677*0 + 3*22*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4677*0 + 3*23*FLEN/8, x4, x1, x2)

inst_1560:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x2800ffff; valaddr_reg:x3; val_offset:4680*0 + 3*23*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4680*0 + 3*24*FLEN/8, x4, x1, x2)

inst_1561:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x2801ffff; valaddr_reg:x3; val_offset:4683*0 + 3*24*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4683*0 + 3*25*FLEN/8, x4, x1, x2)

inst_1562:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x2803ffff; valaddr_reg:x3; val_offset:4686*0 + 3*25*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4686*0 + 3*26*FLEN/8, x4, x1, x2)

inst_1563:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x2807ffff; valaddr_reg:x3; val_offset:4689*0 + 3*26*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4689*0 + 3*27*FLEN/8, x4, x1, x2)

inst_1564:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x280fffff; valaddr_reg:x3; val_offset:4692*0 + 3*27*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4692*0 + 3*28*FLEN/8, x4, x1, x2)

inst_1565:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x281fffff; valaddr_reg:x3; val_offset:4695*0 + 3*28*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4695*0 + 3*29*FLEN/8, x4, x1, x2)

inst_1566:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x283fffff; valaddr_reg:x3; val_offset:4698*0 + 3*29*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4698*0 + 3*30*FLEN/8, x4, x1, x2)

inst_1567:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x28400000; valaddr_reg:x3; val_offset:4701*0 + 3*30*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4701*0 + 3*31*FLEN/8, x4, x1, x2)

inst_1568:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x28600000; valaddr_reg:x3; val_offset:4704*0 + 3*31*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4704*0 + 3*32*FLEN/8, x4, x1, x2)

inst_1569:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x28700000; valaddr_reg:x3; val_offset:4707*0 + 3*32*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4707*0 + 3*33*FLEN/8, x4, x1, x2)

inst_1570:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x28780000; valaddr_reg:x3; val_offset:4710*0 + 3*33*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4710*0 + 3*34*FLEN/8, x4, x1, x2)

inst_1571:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x287c0000; valaddr_reg:x3; val_offset:4713*0 + 3*34*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4713*0 + 3*35*FLEN/8, x4, x1, x2)

inst_1572:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x287e0000; valaddr_reg:x3; val_offset:4716*0 + 3*35*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4716*0 + 3*36*FLEN/8, x4, x1, x2)

inst_1573:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x287f0000; valaddr_reg:x3; val_offset:4719*0 + 3*36*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4719*0 + 3*37*FLEN/8, x4, x1, x2)

inst_1574:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x287f8000; valaddr_reg:x3; val_offset:4722*0 + 3*37*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4722*0 + 3*38*FLEN/8, x4, x1, x2)

inst_1575:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x287fc000; valaddr_reg:x3; val_offset:4725*0 + 3*38*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4725*0 + 3*39*FLEN/8, x4, x1, x2)

inst_1576:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x287fe000; valaddr_reg:x3; val_offset:4728*0 + 3*39*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4728*0 + 3*40*FLEN/8, x4, x1, x2)

inst_1577:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x287ff000; valaddr_reg:x3; val_offset:4731*0 + 3*40*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4731*0 + 3*41*FLEN/8, x4, x1, x2)

inst_1578:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x287ff800; valaddr_reg:x3; val_offset:4734*0 + 3*41*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4734*0 + 3*42*FLEN/8, x4, x1, x2)

inst_1579:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x287ffc00; valaddr_reg:x3; val_offset:4737*0 + 3*42*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4737*0 + 3*43*FLEN/8, x4, x1, x2)

inst_1580:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x287ffe00; valaddr_reg:x3; val_offset:4740*0 + 3*43*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4740*0 + 3*44*FLEN/8, x4, x1, x2)

inst_1581:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x287fff00; valaddr_reg:x3; val_offset:4743*0 + 3*44*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4743*0 + 3*45*FLEN/8, x4, x1, x2)

inst_1582:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x287fff80; valaddr_reg:x3; val_offset:4746*0 + 3*45*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4746*0 + 3*46*FLEN/8, x4, x1, x2)

inst_1583:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x287fffc0; valaddr_reg:x3; val_offset:4749*0 + 3*46*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4749*0 + 3*47*FLEN/8, x4, x1, x2)

inst_1584:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x287fffe0; valaddr_reg:x3; val_offset:4752*0 + 3*47*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4752*0 + 3*48*FLEN/8, x4, x1, x2)

inst_1585:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x287ffff0; valaddr_reg:x3; val_offset:4755*0 + 3*48*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4755*0 + 3*49*FLEN/8, x4, x1, x2)

inst_1586:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x287ffff8; valaddr_reg:x3; val_offset:4758*0 + 3*49*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4758*0 + 3*50*FLEN/8, x4, x1, x2)

inst_1587:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x287ffffc; valaddr_reg:x3; val_offset:4761*0 + 3*50*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4761*0 + 3*51*FLEN/8, x4, x1, x2)

inst_1588:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x287ffffe; valaddr_reg:x3; val_offset:4764*0 + 3*51*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4764*0 + 3*52*FLEN/8, x4, x1, x2)

inst_1589:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x287fffff; valaddr_reg:x3; val_offset:4767*0 + 3*52*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4767*0 + 3*53*FLEN/8, x4, x1, x2)

inst_1590:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x3f800001; valaddr_reg:x3; val_offset:4770*0 + 3*53*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4770*0 + 3*54*FLEN/8, x4, x1, x2)

inst_1591:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x3f800003; valaddr_reg:x3; val_offset:4773*0 + 3*54*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4773*0 + 3*55*FLEN/8, x4, x1, x2)

inst_1592:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x3f800007; valaddr_reg:x3; val_offset:4776*0 + 3*55*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4776*0 + 3*56*FLEN/8, x4, x1, x2)

inst_1593:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x3f999999; valaddr_reg:x3; val_offset:4779*0 + 3*56*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4779*0 + 3*57*FLEN/8, x4, x1, x2)

inst_1594:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x3fa49249; valaddr_reg:x3; val_offset:4782*0 + 3*57*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4782*0 + 3*58*FLEN/8, x4, x1, x2)

inst_1595:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x3fb33333; valaddr_reg:x3; val_offset:4785*0 + 3*58*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4785*0 + 3*59*FLEN/8, x4, x1, x2)

inst_1596:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:4788*0 + 3*59*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4788*0 + 3*60*FLEN/8, x4, x1, x2)

inst_1597:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:4791*0 + 3*60*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4791*0 + 3*61*FLEN/8, x4, x1, x2)

inst_1598:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x3fc44444; valaddr_reg:x3; val_offset:4794*0 + 3*61*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4794*0 + 3*62*FLEN/8, x4, x1, x2)

inst_1599:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x3fcccccc; valaddr_reg:x3; val_offset:4797*0 + 3*62*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4797*0 + 3*63*FLEN/8, x4, x1, x2)

inst_1600:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:4800*0 + 3*63*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4800*0 + 3*64*FLEN/8, x4, x1, x2)

inst_1601:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x3fe66666; valaddr_reg:x3; val_offset:4803*0 + 3*64*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4803*0 + 3*65*FLEN/8, x4, x1, x2)

inst_1602:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x3fedb6db; valaddr_reg:x3; val_offset:4806*0 + 3*65*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4806*0 + 3*66*FLEN/8, x4, x1, x2)

inst_1603:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x3ffffff8; valaddr_reg:x3; val_offset:4809*0 + 3*66*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4809*0 + 3*67*FLEN/8, x4, x1, x2)

inst_1604:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x3ffffffc; valaddr_reg:x3; val_offset:4812*0 + 3*67*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4812*0 + 3*68*FLEN/8, x4, x1, x2)

inst_1605:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x025ce3 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7b5c26 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d025ce3; op2val:0x1fb5c26;
op3val:0x3ffffffe; valaddr_reg:x3; val_offset:4815*0 + 3*68*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4815*0 + 3*69*FLEN/8, x4, x1, x2)

inst_1606:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe4800000; valaddr_reg:x3; val_offset:4818*0 + 3*69*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4818*0 + 3*70*FLEN/8, x4, x1, x2)

inst_1607:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe4800001; valaddr_reg:x3; val_offset:4821*0 + 3*70*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4821*0 + 3*71*FLEN/8, x4, x1, x2)

inst_1608:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe4800003; valaddr_reg:x3; val_offset:4824*0 + 3*71*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4824*0 + 3*72*FLEN/8, x4, x1, x2)

inst_1609:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe4800007; valaddr_reg:x3; val_offset:4827*0 + 3*72*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4827*0 + 3*73*FLEN/8, x4, x1, x2)

inst_1610:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe480000f; valaddr_reg:x3; val_offset:4830*0 + 3*73*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4830*0 + 3*74*FLEN/8, x4, x1, x2)

inst_1611:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe480001f; valaddr_reg:x3; val_offset:4833*0 + 3*74*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4833*0 + 3*75*FLEN/8, x4, x1, x2)

inst_1612:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe480003f; valaddr_reg:x3; val_offset:4836*0 + 3*75*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4836*0 + 3*76*FLEN/8, x4, x1, x2)

inst_1613:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe480007f; valaddr_reg:x3; val_offset:4839*0 + 3*76*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4839*0 + 3*77*FLEN/8, x4, x1, x2)

inst_1614:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe48000ff; valaddr_reg:x3; val_offset:4842*0 + 3*77*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4842*0 + 3*78*FLEN/8, x4, x1, x2)

inst_1615:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe48001ff; valaddr_reg:x3; val_offset:4845*0 + 3*78*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4845*0 + 3*79*FLEN/8, x4, x1, x2)

inst_1616:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe48003ff; valaddr_reg:x3; val_offset:4848*0 + 3*79*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4848*0 + 3*80*FLEN/8, x4, x1, x2)

inst_1617:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe48007ff; valaddr_reg:x3; val_offset:4851*0 + 3*80*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4851*0 + 3*81*FLEN/8, x4, x1, x2)

inst_1618:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe4800fff; valaddr_reg:x3; val_offset:4854*0 + 3*81*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4854*0 + 3*82*FLEN/8, x4, x1, x2)

inst_1619:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe4801fff; valaddr_reg:x3; val_offset:4857*0 + 3*82*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4857*0 + 3*83*FLEN/8, x4, x1, x2)

inst_1620:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe4803fff; valaddr_reg:x3; val_offset:4860*0 + 3*83*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4860*0 + 3*84*FLEN/8, x4, x1, x2)

inst_1621:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe4807fff; valaddr_reg:x3; val_offset:4863*0 + 3*84*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4863*0 + 3*85*FLEN/8, x4, x1, x2)

inst_1622:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe480ffff; valaddr_reg:x3; val_offset:4866*0 + 3*85*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4866*0 + 3*86*FLEN/8, x4, x1, x2)

inst_1623:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe481ffff; valaddr_reg:x3; val_offset:4869*0 + 3*86*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4869*0 + 3*87*FLEN/8, x4, x1, x2)

inst_1624:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe483ffff; valaddr_reg:x3; val_offset:4872*0 + 3*87*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4872*0 + 3*88*FLEN/8, x4, x1, x2)

inst_1625:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe487ffff; valaddr_reg:x3; val_offset:4875*0 + 3*88*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4875*0 + 3*89*FLEN/8, x4, x1, x2)

inst_1626:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe48fffff; valaddr_reg:x3; val_offset:4878*0 + 3*89*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4878*0 + 3*90*FLEN/8, x4, x1, x2)

inst_1627:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe49fffff; valaddr_reg:x3; val_offset:4881*0 + 3*90*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4881*0 + 3*91*FLEN/8, x4, x1, x2)

inst_1628:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe4bfffff; valaddr_reg:x3; val_offset:4884*0 + 3*91*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4884*0 + 3*92*FLEN/8, x4, x1, x2)

inst_1629:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe4c00000; valaddr_reg:x3; val_offset:4887*0 + 3*92*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4887*0 + 3*93*FLEN/8, x4, x1, x2)

inst_1630:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe4e00000; valaddr_reg:x3; val_offset:4890*0 + 3*93*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4890*0 + 3*94*FLEN/8, x4, x1, x2)

inst_1631:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe4f00000; valaddr_reg:x3; val_offset:4893*0 + 3*94*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4893*0 + 3*95*FLEN/8, x4, x1, x2)

inst_1632:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe4f80000; valaddr_reg:x3; val_offset:4896*0 + 3*95*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4896*0 + 3*96*FLEN/8, x4, x1, x2)

inst_1633:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe4fc0000; valaddr_reg:x3; val_offset:4899*0 + 3*96*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4899*0 + 3*97*FLEN/8, x4, x1, x2)

inst_1634:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe4fe0000; valaddr_reg:x3; val_offset:4902*0 + 3*97*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4902*0 + 3*98*FLEN/8, x4, x1, x2)

inst_1635:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe4ff0000; valaddr_reg:x3; val_offset:4905*0 + 3*98*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4905*0 + 3*99*FLEN/8, x4, x1, x2)

inst_1636:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe4ff8000; valaddr_reg:x3; val_offset:4908*0 + 3*99*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4908*0 + 3*100*FLEN/8, x4, x1, x2)

inst_1637:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe4ffc000; valaddr_reg:x3; val_offset:4911*0 + 3*100*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4911*0 + 3*101*FLEN/8, x4, x1, x2)

inst_1638:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe4ffe000; valaddr_reg:x3; val_offset:4914*0 + 3*101*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4914*0 + 3*102*FLEN/8, x4, x1, x2)

inst_1639:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe4fff000; valaddr_reg:x3; val_offset:4917*0 + 3*102*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4917*0 + 3*103*FLEN/8, x4, x1, x2)

inst_1640:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe4fff800; valaddr_reg:x3; val_offset:4920*0 + 3*103*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4920*0 + 3*104*FLEN/8, x4, x1, x2)

inst_1641:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe4fffc00; valaddr_reg:x3; val_offset:4923*0 + 3*104*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4923*0 + 3*105*FLEN/8, x4, x1, x2)

inst_1642:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe4fffe00; valaddr_reg:x3; val_offset:4926*0 + 3*105*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4926*0 + 3*106*FLEN/8, x4, x1, x2)

inst_1643:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe4ffff00; valaddr_reg:x3; val_offset:4929*0 + 3*106*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4929*0 + 3*107*FLEN/8, x4, x1, x2)

inst_1644:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe4ffff80; valaddr_reg:x3; val_offset:4932*0 + 3*107*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4932*0 + 3*108*FLEN/8, x4, x1, x2)

inst_1645:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe4ffffc0; valaddr_reg:x3; val_offset:4935*0 + 3*108*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4935*0 + 3*109*FLEN/8, x4, x1, x2)

inst_1646:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe4ffffe0; valaddr_reg:x3; val_offset:4938*0 + 3*109*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4938*0 + 3*110*FLEN/8, x4, x1, x2)

inst_1647:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe4fffff0; valaddr_reg:x3; val_offset:4941*0 + 3*110*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4941*0 + 3*111*FLEN/8, x4, x1, x2)

inst_1648:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe4fffff8; valaddr_reg:x3; val_offset:4944*0 + 3*111*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4944*0 + 3*112*FLEN/8, x4, x1, x2)

inst_1649:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe4fffffc; valaddr_reg:x3; val_offset:4947*0 + 3*112*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4947*0 + 3*113*FLEN/8, x4, x1, x2)

inst_1650:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe4fffffe; valaddr_reg:x3; val_offset:4950*0 + 3*113*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4950*0 + 3*114*FLEN/8, x4, x1, x2)

inst_1651:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xe4ffffff; valaddr_reg:x3; val_offset:4953*0 + 3*114*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4953*0 + 3*115*FLEN/8, x4, x1, x2)

inst_1652:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xff000001; valaddr_reg:x3; val_offset:4956*0 + 3*115*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4956*0 + 3*116*FLEN/8, x4, x1, x2)

inst_1653:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xff000003; valaddr_reg:x3; val_offset:4959*0 + 3*116*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4959*0 + 3*117*FLEN/8, x4, x1, x2)

inst_1654:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xff000007; valaddr_reg:x3; val_offset:4962*0 + 3*117*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4962*0 + 3*118*FLEN/8, x4, x1, x2)

inst_1655:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xff199999; valaddr_reg:x3; val_offset:4965*0 + 3*118*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4965*0 + 3*119*FLEN/8, x4, x1, x2)

inst_1656:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xff249249; valaddr_reg:x3; val_offset:4968*0 + 3*119*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4968*0 + 3*120*FLEN/8, x4, x1, x2)

inst_1657:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xff333333; valaddr_reg:x3; val_offset:4971*0 + 3*120*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4971*0 + 3*121*FLEN/8, x4, x1, x2)

inst_1658:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xff36db6d; valaddr_reg:x3; val_offset:4974*0 + 3*121*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4974*0 + 3*122*FLEN/8, x4, x1, x2)

inst_1659:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:4977*0 + 3*122*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4977*0 + 3*123*FLEN/8, x4, x1, x2)

inst_1660:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xff444444; valaddr_reg:x3; val_offset:4980*0 + 3*123*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4980*0 + 3*124*FLEN/8, x4, x1, x2)

inst_1661:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xff4ccccc; valaddr_reg:x3; val_offset:4983*0 + 3*124*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4983*0 + 3*125*FLEN/8, x4, x1, x2)

inst_1662:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xff5b6db6; valaddr_reg:x3; val_offset:4986*0 + 3*125*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4986*0 + 3*126*FLEN/8, x4, x1, x2)

inst_1663:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xff666666; valaddr_reg:x3; val_offset:4989*0 + 3*126*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4989*0 + 3*127*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_2)

inst_1664:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xff6db6db; valaddr_reg:x3; val_offset:4992*0 + 3*127*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4992*0 + 3*128*FLEN/8, x4, x1, x2)

inst_1665:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xff7ffff8; valaddr_reg:x3; val_offset:4995*0 + 3*128*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4995*0 + 3*129*FLEN/8, x4, x1, x2)

inst_1666:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xff7ffffc; valaddr_reg:x3; val_offset:4998*0 + 3*129*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4998*0 + 3*130*FLEN/8, x4, x1, x2)

inst_1667:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x032ddf and fs2 == 1 and fe2 == 0x83 and fm2 == 0x79cbb3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d032ddf; op2val:0xc1f9cbb3;
op3val:0xff7ffffe; valaddr_reg:x3; val_offset:5001*0 + 3*130*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5001*0 + 3*131*FLEN/8, x4, x1, x2)

inst_1668:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:5004*0 + 3*131*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5004*0 + 3*132*FLEN/8, x4, x1, x2)

inst_1669:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:5007*0 + 3*132*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5007*0 + 3*133*FLEN/8, x4, x1, x2)

inst_1670:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:5010*0 + 3*133*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5010*0 + 3*134*FLEN/8, x4, x1, x2)

inst_1671:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0x199999; valaddr_reg:x3; val_offset:5013*0 + 3*134*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5013*0 + 3*135*FLEN/8, x4, x1, x2)

inst_1672:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0x249249; valaddr_reg:x3; val_offset:5016*0 + 3*135*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5016*0 + 3*136*FLEN/8, x4, x1, x2)

inst_1673:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0x333333; valaddr_reg:x3; val_offset:5019*0 + 3*136*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5019*0 + 3*137*FLEN/8, x4, x1, x2)

inst_1674:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0x36db6d; valaddr_reg:x3; val_offset:5022*0 + 3*137*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5022*0 + 3*138*FLEN/8, x4, x1, x2)

inst_1675:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0x3bbbbb; valaddr_reg:x3; val_offset:5025*0 + 3*138*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5025*0 + 3*139*FLEN/8, x4, x1, x2)

inst_1676:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0x444444; valaddr_reg:x3; val_offset:5028*0 + 3*139*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5028*0 + 3*140*FLEN/8, x4, x1, x2)

inst_1677:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0x4ccccc; valaddr_reg:x3; val_offset:5031*0 + 3*140*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5031*0 + 3*141*FLEN/8, x4, x1, x2)

inst_1678:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0x5b6db6; valaddr_reg:x3; val_offset:5034*0 + 3*141*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5034*0 + 3*142*FLEN/8, x4, x1, x2)

inst_1679:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0x666666; valaddr_reg:x3; val_offset:5037*0 + 3*142*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5037*0 + 3*143*FLEN/8, x4, x1, x2)

inst_1680:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0x6db6db; valaddr_reg:x3; val_offset:5040*0 + 3*143*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5040*0 + 3*144*FLEN/8, x4, x1, x2)

inst_1681:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0x7ffff8; valaddr_reg:x3; val_offset:5043*0 + 3*144*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5043*0 + 3*145*FLEN/8, x4, x1, x2)

inst_1682:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0x7ffffc; valaddr_reg:x3; val_offset:5046*0 + 3*145*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5046*0 + 3*146*FLEN/8, x4, x1, x2)

inst_1683:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0x7ffffe; valaddr_reg:x3; val_offset:5049*0 + 3*146*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5049*0 + 3*147*FLEN/8, x4, x1, x2)

inst_1684:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xa800000; valaddr_reg:x3; val_offset:5052*0 + 3*147*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5052*0 + 3*148*FLEN/8, x4, x1, x2)

inst_1685:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xa800001; valaddr_reg:x3; val_offset:5055*0 + 3*148*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5055*0 + 3*149*FLEN/8, x4, x1, x2)

inst_1686:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xa800003; valaddr_reg:x3; val_offset:5058*0 + 3*149*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5058*0 + 3*150*FLEN/8, x4, x1, x2)

inst_1687:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xa800007; valaddr_reg:x3; val_offset:5061*0 + 3*150*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5061*0 + 3*151*FLEN/8, x4, x1, x2)

inst_1688:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xa80000f; valaddr_reg:x3; val_offset:5064*0 + 3*151*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5064*0 + 3*152*FLEN/8, x4, x1, x2)

inst_1689:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xa80001f; valaddr_reg:x3; val_offset:5067*0 + 3*152*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5067*0 + 3*153*FLEN/8, x4, x1, x2)

inst_1690:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xa80003f; valaddr_reg:x3; val_offset:5070*0 + 3*153*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5070*0 + 3*154*FLEN/8, x4, x1, x2)

inst_1691:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xa80007f; valaddr_reg:x3; val_offset:5073*0 + 3*154*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5073*0 + 3*155*FLEN/8, x4, x1, x2)

inst_1692:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xa8000ff; valaddr_reg:x3; val_offset:5076*0 + 3*155*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5076*0 + 3*156*FLEN/8, x4, x1, x2)

inst_1693:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xa8001ff; valaddr_reg:x3; val_offset:5079*0 + 3*156*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5079*0 + 3*157*FLEN/8, x4, x1, x2)

inst_1694:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xa8003ff; valaddr_reg:x3; val_offset:5082*0 + 3*157*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5082*0 + 3*158*FLEN/8, x4, x1, x2)

inst_1695:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xa8007ff; valaddr_reg:x3; val_offset:5085*0 + 3*158*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5085*0 + 3*159*FLEN/8, x4, x1, x2)

inst_1696:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xa800fff; valaddr_reg:x3; val_offset:5088*0 + 3*159*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5088*0 + 3*160*FLEN/8, x4, x1, x2)

inst_1697:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xa801fff; valaddr_reg:x3; val_offset:5091*0 + 3*160*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5091*0 + 3*161*FLEN/8, x4, x1, x2)

inst_1698:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xa803fff; valaddr_reg:x3; val_offset:5094*0 + 3*161*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5094*0 + 3*162*FLEN/8, x4, x1, x2)

inst_1699:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xa807fff; valaddr_reg:x3; val_offset:5097*0 + 3*162*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5097*0 + 3*163*FLEN/8, x4, x1, x2)

inst_1700:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xa80ffff; valaddr_reg:x3; val_offset:5100*0 + 3*163*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5100*0 + 3*164*FLEN/8, x4, x1, x2)

inst_1701:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xa81ffff; valaddr_reg:x3; val_offset:5103*0 + 3*164*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5103*0 + 3*165*FLEN/8, x4, x1, x2)

inst_1702:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xa83ffff; valaddr_reg:x3; val_offset:5106*0 + 3*165*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5106*0 + 3*166*FLEN/8, x4, x1, x2)

inst_1703:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xa87ffff; valaddr_reg:x3; val_offset:5109*0 + 3*166*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5109*0 + 3*167*FLEN/8, x4, x1, x2)

inst_1704:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xa8fffff; valaddr_reg:x3; val_offset:5112*0 + 3*167*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5112*0 + 3*168*FLEN/8, x4, x1, x2)

inst_1705:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xa9fffff; valaddr_reg:x3; val_offset:5115*0 + 3*168*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5115*0 + 3*169*FLEN/8, x4, x1, x2)

inst_1706:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xabfffff; valaddr_reg:x3; val_offset:5118*0 + 3*169*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5118*0 + 3*170*FLEN/8, x4, x1, x2)

inst_1707:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xac00000; valaddr_reg:x3; val_offset:5121*0 + 3*170*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5121*0 + 3*171*FLEN/8, x4, x1, x2)

inst_1708:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xae00000; valaddr_reg:x3; val_offset:5124*0 + 3*171*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5124*0 + 3*172*FLEN/8, x4, x1, x2)

inst_1709:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xaf00000; valaddr_reg:x3; val_offset:5127*0 + 3*172*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5127*0 + 3*173*FLEN/8, x4, x1, x2)

inst_1710:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xaf80000; valaddr_reg:x3; val_offset:5130*0 + 3*173*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5130*0 + 3*174*FLEN/8, x4, x1, x2)

inst_1711:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xafc0000; valaddr_reg:x3; val_offset:5133*0 + 3*174*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5133*0 + 3*175*FLEN/8, x4, x1, x2)

inst_1712:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xafe0000; valaddr_reg:x3; val_offset:5136*0 + 3*175*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5136*0 + 3*176*FLEN/8, x4, x1, x2)

inst_1713:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xaff0000; valaddr_reg:x3; val_offset:5139*0 + 3*176*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5139*0 + 3*177*FLEN/8, x4, x1, x2)

inst_1714:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xaff8000; valaddr_reg:x3; val_offset:5142*0 + 3*177*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5142*0 + 3*178*FLEN/8, x4, x1, x2)

inst_1715:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xaffc000; valaddr_reg:x3; val_offset:5145*0 + 3*178*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5145*0 + 3*179*FLEN/8, x4, x1, x2)

inst_1716:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xaffe000; valaddr_reg:x3; val_offset:5148*0 + 3*179*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5148*0 + 3*180*FLEN/8, x4, x1, x2)

inst_1717:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xafff000; valaddr_reg:x3; val_offset:5151*0 + 3*180*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5151*0 + 3*181*FLEN/8, x4, x1, x2)

inst_1718:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xafff800; valaddr_reg:x3; val_offset:5154*0 + 3*181*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5154*0 + 3*182*FLEN/8, x4, x1, x2)

inst_1719:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xafffc00; valaddr_reg:x3; val_offset:5157*0 + 3*182*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5157*0 + 3*183*FLEN/8, x4, x1, x2)

inst_1720:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xafffe00; valaddr_reg:x3; val_offset:5160*0 + 3*183*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5160*0 + 3*184*FLEN/8, x4, x1, x2)

inst_1721:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xaffff00; valaddr_reg:x3; val_offset:5163*0 + 3*184*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5163*0 + 3*185*FLEN/8, x4, x1, x2)

inst_1722:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xaffff80; valaddr_reg:x3; val_offset:5166*0 + 3*185*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5166*0 + 3*186*FLEN/8, x4, x1, x2)

inst_1723:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xaffffc0; valaddr_reg:x3; val_offset:5169*0 + 3*186*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5169*0 + 3*187*FLEN/8, x4, x1, x2)

inst_1724:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xaffffe0; valaddr_reg:x3; val_offset:5172*0 + 3*187*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5172*0 + 3*188*FLEN/8, x4, x1, x2)

inst_1725:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xafffff0; valaddr_reg:x3; val_offset:5175*0 + 3*188*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5175*0 + 3*189*FLEN/8, x4, x1, x2)

inst_1726:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xafffff8; valaddr_reg:x3; val_offset:5178*0 + 3*189*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5178*0 + 3*190*FLEN/8, x4, x1, x2)

inst_1727:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xafffffc; valaddr_reg:x3; val_offset:5181*0 + 3*190*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5181*0 + 3*191*FLEN/8, x4, x1, x2)

inst_1728:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xafffffe; valaddr_reg:x3; val_offset:5184*0 + 3*191*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5184*0 + 3*192*FLEN/8, x4, x1, x2)

inst_1729:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0372a9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0372a9; op2val:0x0;
op3val:0xaffffff; valaddr_reg:x3; val_offset:5187*0 + 3*192*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5187*0 + 3*193*FLEN/8, x4, x1, x2)

inst_1730:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1f800000; valaddr_reg:x3; val_offset:5190*0 + 3*193*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5190*0 + 3*194*FLEN/8, x4, x1, x2)

inst_1731:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1f800001; valaddr_reg:x3; val_offset:5193*0 + 3*194*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5193*0 + 3*195*FLEN/8, x4, x1, x2)

inst_1732:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1f800003; valaddr_reg:x3; val_offset:5196*0 + 3*195*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5196*0 + 3*196*FLEN/8, x4, x1, x2)

inst_1733:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1f800007; valaddr_reg:x3; val_offset:5199*0 + 3*196*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5199*0 + 3*197*FLEN/8, x4, x1, x2)

inst_1734:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1f80000f; valaddr_reg:x3; val_offset:5202*0 + 3*197*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5202*0 + 3*198*FLEN/8, x4, x1, x2)

inst_1735:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1f80001f; valaddr_reg:x3; val_offset:5205*0 + 3*198*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5205*0 + 3*199*FLEN/8, x4, x1, x2)

inst_1736:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1f80003f; valaddr_reg:x3; val_offset:5208*0 + 3*199*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5208*0 + 3*200*FLEN/8, x4, x1, x2)

inst_1737:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1f80007f; valaddr_reg:x3; val_offset:5211*0 + 3*200*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5211*0 + 3*201*FLEN/8, x4, x1, x2)

inst_1738:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1f8000ff; valaddr_reg:x3; val_offset:5214*0 + 3*201*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5214*0 + 3*202*FLEN/8, x4, x1, x2)

inst_1739:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1f8001ff; valaddr_reg:x3; val_offset:5217*0 + 3*202*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5217*0 + 3*203*FLEN/8, x4, x1, x2)

inst_1740:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1f8003ff; valaddr_reg:x3; val_offset:5220*0 + 3*203*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5220*0 + 3*204*FLEN/8, x4, x1, x2)

inst_1741:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1f8007ff; valaddr_reg:x3; val_offset:5223*0 + 3*204*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5223*0 + 3*205*FLEN/8, x4, x1, x2)

inst_1742:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1f800fff; valaddr_reg:x3; val_offset:5226*0 + 3*205*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5226*0 + 3*206*FLEN/8, x4, x1, x2)

inst_1743:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1f801fff; valaddr_reg:x3; val_offset:5229*0 + 3*206*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5229*0 + 3*207*FLEN/8, x4, x1, x2)

inst_1744:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1f803fff; valaddr_reg:x3; val_offset:5232*0 + 3*207*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5232*0 + 3*208*FLEN/8, x4, x1, x2)

inst_1745:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1f807fff; valaddr_reg:x3; val_offset:5235*0 + 3*208*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5235*0 + 3*209*FLEN/8, x4, x1, x2)

inst_1746:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1f80ffff; valaddr_reg:x3; val_offset:5238*0 + 3*209*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5238*0 + 3*210*FLEN/8, x4, x1, x2)

inst_1747:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1f81ffff; valaddr_reg:x3; val_offset:5241*0 + 3*210*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5241*0 + 3*211*FLEN/8, x4, x1, x2)

inst_1748:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1f83ffff; valaddr_reg:x3; val_offset:5244*0 + 3*211*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5244*0 + 3*212*FLEN/8, x4, x1, x2)

inst_1749:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1f87ffff; valaddr_reg:x3; val_offset:5247*0 + 3*212*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5247*0 + 3*213*FLEN/8, x4, x1, x2)

inst_1750:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1f8fffff; valaddr_reg:x3; val_offset:5250*0 + 3*213*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5250*0 + 3*214*FLEN/8, x4, x1, x2)

inst_1751:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1f9fffff; valaddr_reg:x3; val_offset:5253*0 + 3*214*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5253*0 + 3*215*FLEN/8, x4, x1, x2)

inst_1752:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1fbfffff; valaddr_reg:x3; val_offset:5256*0 + 3*215*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5256*0 + 3*216*FLEN/8, x4, x1, x2)

inst_1753:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1fc00000; valaddr_reg:x3; val_offset:5259*0 + 3*216*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5259*0 + 3*217*FLEN/8, x4, x1, x2)

inst_1754:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1fe00000; valaddr_reg:x3; val_offset:5262*0 + 3*217*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5262*0 + 3*218*FLEN/8, x4, x1, x2)

inst_1755:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1ff00000; valaddr_reg:x3; val_offset:5265*0 + 3*218*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5265*0 + 3*219*FLEN/8, x4, x1, x2)

inst_1756:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1ff80000; valaddr_reg:x3; val_offset:5268*0 + 3*219*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5268*0 + 3*220*FLEN/8, x4, x1, x2)

inst_1757:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1ffc0000; valaddr_reg:x3; val_offset:5271*0 + 3*220*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5271*0 + 3*221*FLEN/8, x4, x1, x2)

inst_1758:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1ffe0000; valaddr_reg:x3; val_offset:5274*0 + 3*221*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5274*0 + 3*222*FLEN/8, x4, x1, x2)

inst_1759:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1fff0000; valaddr_reg:x3; val_offset:5277*0 + 3*222*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5277*0 + 3*223*FLEN/8, x4, x1, x2)

inst_1760:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1fff8000; valaddr_reg:x3; val_offset:5280*0 + 3*223*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5280*0 + 3*224*FLEN/8, x4, x1, x2)

inst_1761:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1fffc000; valaddr_reg:x3; val_offset:5283*0 + 3*224*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5283*0 + 3*225*FLEN/8, x4, x1, x2)

inst_1762:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1fffe000; valaddr_reg:x3; val_offset:5286*0 + 3*225*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5286*0 + 3*226*FLEN/8, x4, x1, x2)

inst_1763:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1ffff000; valaddr_reg:x3; val_offset:5289*0 + 3*226*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5289*0 + 3*227*FLEN/8, x4, x1, x2)

inst_1764:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1ffff800; valaddr_reg:x3; val_offset:5292*0 + 3*227*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5292*0 + 3*228*FLEN/8, x4, x1, x2)

inst_1765:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1ffffc00; valaddr_reg:x3; val_offset:5295*0 + 3*228*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5295*0 + 3*229*FLEN/8, x4, x1, x2)

inst_1766:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1ffffe00; valaddr_reg:x3; val_offset:5298*0 + 3*229*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5298*0 + 3*230*FLEN/8, x4, x1, x2)

inst_1767:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1fffff00; valaddr_reg:x3; val_offset:5301*0 + 3*230*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5301*0 + 3*231*FLEN/8, x4, x1, x2)

inst_1768:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1fffff80; valaddr_reg:x3; val_offset:5304*0 + 3*231*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5304*0 + 3*232*FLEN/8, x4, x1, x2)

inst_1769:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1fffffc0; valaddr_reg:x3; val_offset:5307*0 + 3*232*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5307*0 + 3*233*FLEN/8, x4, x1, x2)

inst_1770:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1fffffe0; valaddr_reg:x3; val_offset:5310*0 + 3*233*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5310*0 + 3*234*FLEN/8, x4, x1, x2)

inst_1771:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1ffffff0; valaddr_reg:x3; val_offset:5313*0 + 3*234*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5313*0 + 3*235*FLEN/8, x4, x1, x2)

inst_1772:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1ffffff8; valaddr_reg:x3; val_offset:5316*0 + 3*235*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5316*0 + 3*236*FLEN/8, x4, x1, x2)

inst_1773:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1ffffffc; valaddr_reg:x3; val_offset:5319*0 + 3*236*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5319*0 + 3*237*FLEN/8, x4, x1, x2)

inst_1774:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1ffffffe; valaddr_reg:x3; val_offset:5322*0 + 3*237*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5322*0 + 3*238*FLEN/8, x4, x1, x2)

inst_1775:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x1fffffff; valaddr_reg:x3; val_offset:5325*0 + 3*238*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5325*0 + 3*239*FLEN/8, x4, x1, x2)

inst_1776:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x3f800001; valaddr_reg:x3; val_offset:5328*0 + 3*239*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5328*0 + 3*240*FLEN/8, x4, x1, x2)

inst_1777:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x3f800003; valaddr_reg:x3; val_offset:5331*0 + 3*240*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5331*0 + 3*241*FLEN/8, x4, x1, x2)

inst_1778:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x3f800007; valaddr_reg:x3; val_offset:5334*0 + 3*241*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5334*0 + 3*242*FLEN/8, x4, x1, x2)

inst_1779:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x3f999999; valaddr_reg:x3; val_offset:5337*0 + 3*242*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5337*0 + 3*243*FLEN/8, x4, x1, x2)

inst_1780:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x3fa49249; valaddr_reg:x3; val_offset:5340*0 + 3*243*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5340*0 + 3*244*FLEN/8, x4, x1, x2)

inst_1781:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x3fb33333; valaddr_reg:x3; val_offset:5343*0 + 3*244*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5343*0 + 3*245*FLEN/8, x4, x1, x2)

inst_1782:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:5346*0 + 3*245*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5346*0 + 3*246*FLEN/8, x4, x1, x2)

inst_1783:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:5349*0 + 3*246*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5349*0 + 3*247*FLEN/8, x4, x1, x2)

inst_1784:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x3fc44444; valaddr_reg:x3; val_offset:5352*0 + 3*247*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5352*0 + 3*248*FLEN/8, x4, x1, x2)

inst_1785:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x3fcccccc; valaddr_reg:x3; val_offset:5355*0 + 3*248*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5355*0 + 3*249*FLEN/8, x4, x1, x2)

inst_1786:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:5358*0 + 3*249*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5358*0 + 3*250*FLEN/8, x4, x1, x2)

inst_1787:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x3fe66666; valaddr_reg:x3; val_offset:5361*0 + 3*250*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5361*0 + 3*251*FLEN/8, x4, x1, x2)

inst_1788:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x3fedb6db; valaddr_reg:x3; val_offset:5364*0 + 3*251*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5364*0 + 3*252*FLEN/8, x4, x1, x2)

inst_1789:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x3ffffff8; valaddr_reg:x3; val_offset:5367*0 + 3*252*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5367*0 + 3*253*FLEN/8, x4, x1, x2)

inst_1790:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x3ffffffc; valaddr_reg:x3; val_offset:5370*0 + 3*253*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5370*0 + 3*254*FLEN/8, x4, x1, x2)

inst_1791:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0x03 and fm2 == 0x7161af and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d07c07a; op2val:0x1f161af;
op3val:0x3ffffffe; valaddr_reg:x3; val_offset:5373*0 + 3*254*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5373*0 + 3*255*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_3)

inst_1792:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x20800000; valaddr_reg:x3; val_offset:5376*0 + 3*256*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5376*0 + 3*256*FLEN/8, x4, x1, x2)

inst_1793:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x20800001; valaddr_reg:x3; val_offset:5379*0 + 3*257*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5379*0 + 3*257*FLEN/8, x4, x1, x2)

inst_1794:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x20800003; valaddr_reg:x3; val_offset:5382*0 + 3*258*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5382*0 + 3*258*FLEN/8, x4, x1, x2)

inst_1795:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x20800007; valaddr_reg:x3; val_offset:5385*0 + 3*259*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5385*0 + 3*259*FLEN/8, x4, x1, x2)

inst_1796:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x2080000f; valaddr_reg:x3; val_offset:5388*0 + 3*260*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5388*0 + 3*260*FLEN/8, x4, x1, x2)

inst_1797:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x2080001f; valaddr_reg:x3; val_offset:5391*0 + 3*261*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5391*0 + 3*261*FLEN/8, x4, x1, x2)

inst_1798:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x2080003f; valaddr_reg:x3; val_offset:5394*0 + 3*262*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5394*0 + 3*262*FLEN/8, x4, x1, x2)

inst_1799:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x2080007f; valaddr_reg:x3; val_offset:5397*0 + 3*263*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5397*0 + 3*263*FLEN/8, x4, x1, x2)

inst_1800:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x208000ff; valaddr_reg:x3; val_offset:5400*0 + 3*264*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5400*0 + 3*264*FLEN/8, x4, x1, x2)

inst_1801:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x208001ff; valaddr_reg:x3; val_offset:5403*0 + 3*265*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5403*0 + 3*265*FLEN/8, x4, x1, x2)

inst_1802:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x208003ff; valaddr_reg:x3; val_offset:5406*0 + 3*266*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5406*0 + 3*266*FLEN/8, x4, x1, x2)

inst_1803:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x208007ff; valaddr_reg:x3; val_offset:5409*0 + 3*267*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5409*0 + 3*267*FLEN/8, x4, x1, x2)

inst_1804:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x20800fff; valaddr_reg:x3; val_offset:5412*0 + 3*268*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5412*0 + 3*268*FLEN/8, x4, x1, x2)

inst_1805:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x20801fff; valaddr_reg:x3; val_offset:5415*0 + 3*269*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5415*0 + 3*269*FLEN/8, x4, x1, x2)

inst_1806:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x20803fff; valaddr_reg:x3; val_offset:5418*0 + 3*270*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5418*0 + 3*270*FLEN/8, x4, x1, x2)

inst_1807:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x20807fff; valaddr_reg:x3; val_offset:5421*0 + 3*271*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5421*0 + 3*271*FLEN/8, x4, x1, x2)

inst_1808:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x2080ffff; valaddr_reg:x3; val_offset:5424*0 + 3*272*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5424*0 + 3*272*FLEN/8, x4, x1, x2)

inst_1809:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x2081ffff; valaddr_reg:x3; val_offset:5427*0 + 3*273*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5427*0 + 3*273*FLEN/8, x4, x1, x2)

inst_1810:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x2083ffff; valaddr_reg:x3; val_offset:5430*0 + 3*274*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5430*0 + 3*274*FLEN/8, x4, x1, x2)

inst_1811:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x2087ffff; valaddr_reg:x3; val_offset:5433*0 + 3*275*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5433*0 + 3*275*FLEN/8, x4, x1, x2)

inst_1812:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x208fffff; valaddr_reg:x3; val_offset:5436*0 + 3*276*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5436*0 + 3*276*FLEN/8, x4, x1, x2)

inst_1813:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x209fffff; valaddr_reg:x3; val_offset:5439*0 + 3*277*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5439*0 + 3*277*FLEN/8, x4, x1, x2)

inst_1814:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x20bfffff; valaddr_reg:x3; val_offset:5442*0 + 3*278*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5442*0 + 3*278*FLEN/8, x4, x1, x2)

inst_1815:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x20c00000; valaddr_reg:x3; val_offset:5445*0 + 3*279*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5445*0 + 3*279*FLEN/8, x4, x1, x2)

inst_1816:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x20e00000; valaddr_reg:x3; val_offset:5448*0 + 3*280*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5448*0 + 3*280*FLEN/8, x4, x1, x2)

inst_1817:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x20f00000; valaddr_reg:x3; val_offset:5451*0 + 3*281*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5451*0 + 3*281*FLEN/8, x4, x1, x2)

inst_1818:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x20f80000; valaddr_reg:x3; val_offset:5454*0 + 3*282*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5454*0 + 3*282*FLEN/8, x4, x1, x2)

inst_1819:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x20fc0000; valaddr_reg:x3; val_offset:5457*0 + 3*283*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5457*0 + 3*283*FLEN/8, x4, x1, x2)

inst_1820:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x20fe0000; valaddr_reg:x3; val_offset:5460*0 + 3*284*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5460*0 + 3*284*FLEN/8, x4, x1, x2)

inst_1821:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x20ff0000; valaddr_reg:x3; val_offset:5463*0 + 3*285*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5463*0 + 3*285*FLEN/8, x4, x1, x2)

inst_1822:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x20ff8000; valaddr_reg:x3; val_offset:5466*0 + 3*286*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5466*0 + 3*286*FLEN/8, x4, x1, x2)

inst_1823:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x20ffc000; valaddr_reg:x3; val_offset:5469*0 + 3*287*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5469*0 + 3*287*FLEN/8, x4, x1, x2)

inst_1824:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x20ffe000; valaddr_reg:x3; val_offset:5472*0 + 3*288*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5472*0 + 3*288*FLEN/8, x4, x1, x2)

inst_1825:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x20fff000; valaddr_reg:x3; val_offset:5475*0 + 3*289*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5475*0 + 3*289*FLEN/8, x4, x1, x2)

inst_1826:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x20fff800; valaddr_reg:x3; val_offset:5478*0 + 3*290*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5478*0 + 3*290*FLEN/8, x4, x1, x2)

inst_1827:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x20fffc00; valaddr_reg:x3; val_offset:5481*0 + 3*291*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5481*0 + 3*291*FLEN/8, x4, x1, x2)

inst_1828:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x20fffe00; valaddr_reg:x3; val_offset:5484*0 + 3*292*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5484*0 + 3*292*FLEN/8, x4, x1, x2)

inst_1829:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x20ffff00; valaddr_reg:x3; val_offset:5487*0 + 3*293*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5487*0 + 3*293*FLEN/8, x4, x1, x2)

inst_1830:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x20ffff80; valaddr_reg:x3; val_offset:5490*0 + 3*294*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5490*0 + 3*294*FLEN/8, x4, x1, x2)

inst_1831:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x20ffffc0; valaddr_reg:x3; val_offset:5493*0 + 3*295*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5493*0 + 3*295*FLEN/8, x4, x1, x2)

inst_1832:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x20ffffe0; valaddr_reg:x3; val_offset:5496*0 + 3*296*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5496*0 + 3*296*FLEN/8, x4, x1, x2)

inst_1833:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x20fffff0; valaddr_reg:x3; val_offset:5499*0 + 3*297*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5499*0 + 3*297*FLEN/8, x4, x1, x2)

inst_1834:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x20fffff8; valaddr_reg:x3; val_offset:5502*0 + 3*298*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5502*0 + 3*298*FLEN/8, x4, x1, x2)

inst_1835:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x20fffffc; valaddr_reg:x3; val_offset:5505*0 + 3*299*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5505*0 + 3*299*FLEN/8, x4, x1, x2)

inst_1836:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x20fffffe; valaddr_reg:x3; val_offset:5508*0 + 3*300*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5508*0 + 3*300*FLEN/8, x4, x1, x2)

inst_1837:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x20ffffff; valaddr_reg:x3; val_offset:5511*0 + 3*301*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5511*0 + 3*301*FLEN/8, x4, x1, x2)

inst_1838:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x3f800001; valaddr_reg:x3; val_offset:5514*0 + 3*302*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5514*0 + 3*302*FLEN/8, x4, x1, x2)

inst_1839:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x3f800003; valaddr_reg:x3; val_offset:5517*0 + 3*303*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5517*0 + 3*303*FLEN/8, x4, x1, x2)

inst_1840:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x3f800007; valaddr_reg:x3; val_offset:5520*0 + 3*304*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5520*0 + 3*304*FLEN/8, x4, x1, x2)

inst_1841:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x3f999999; valaddr_reg:x3; val_offset:5523*0 + 3*305*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5523*0 + 3*305*FLEN/8, x4, x1, x2)

inst_1842:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x3fa49249; valaddr_reg:x3; val_offset:5526*0 + 3*306*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5526*0 + 3*306*FLEN/8, x4, x1, x2)

inst_1843:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x3fb33333; valaddr_reg:x3; val_offset:5529*0 + 3*307*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5529*0 + 3*307*FLEN/8, x4, x1, x2)

inst_1844:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:5532*0 + 3*308*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5532*0 + 3*308*FLEN/8, x4, x1, x2)

inst_1845:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:5535*0 + 3*309*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5535*0 + 3*309*FLEN/8, x4, x1, x2)

inst_1846:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x3fc44444; valaddr_reg:x3; val_offset:5538*0 + 3*310*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5538*0 + 3*310*FLEN/8, x4, x1, x2)

inst_1847:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x3fcccccc; valaddr_reg:x3; val_offset:5541*0 + 3*311*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5541*0 + 3*311*FLEN/8, x4, x1, x2)

inst_1848:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:5544*0 + 3*312*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5544*0 + 3*312*FLEN/8, x4, x1, x2)

inst_1849:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x3fe66666; valaddr_reg:x3; val_offset:5547*0 + 3*313*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5547*0 + 3*313*FLEN/8, x4, x1, x2)

inst_1850:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x3fedb6db; valaddr_reg:x3; val_offset:5550*0 + 3*314*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5550*0 + 3*314*FLEN/8, x4, x1, x2)

inst_1851:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x3ffffff8; valaddr_reg:x3; val_offset:5553*0 + 3*315*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5553*0 + 3*315*FLEN/8, x4, x1, x2)

inst_1852:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x3ffffffc; valaddr_reg:x3; val_offset:5556*0 + 3*316*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5556*0 + 3*316*FLEN/8, x4, x1, x2)

inst_1853:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a0e71 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x6d5a2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a0e71; op2val:0x1ed5a2b;
op3val:0x3ffffffe; valaddr_reg:x3; val_offset:5559*0 + 3*317*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5559*0 + 3*317*FLEN/8, x4, x1, x2)

inst_1854:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad000000; valaddr_reg:x3; val_offset:5562*0 + 3*318*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5562*0 + 3*318*FLEN/8, x4, x1, x2)

inst_1855:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad000001; valaddr_reg:x3; val_offset:5565*0 + 3*319*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5565*0 + 3*319*FLEN/8, x4, x1, x2)

inst_1856:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad000003; valaddr_reg:x3; val_offset:5568*0 + 3*320*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5568*0 + 3*320*FLEN/8, x4, x1, x2)

inst_1857:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad000007; valaddr_reg:x3; val_offset:5571*0 + 3*321*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5571*0 + 3*321*FLEN/8, x4, x1, x2)

inst_1858:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad00000f; valaddr_reg:x3; val_offset:5574*0 + 3*322*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5574*0 + 3*322*FLEN/8, x4, x1, x2)

inst_1859:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad00001f; valaddr_reg:x3; val_offset:5577*0 + 3*323*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5577*0 + 3*323*FLEN/8, x4, x1, x2)

inst_1860:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad00003f; valaddr_reg:x3; val_offset:5580*0 + 3*324*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5580*0 + 3*324*FLEN/8, x4, x1, x2)

inst_1861:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad00007f; valaddr_reg:x3; val_offset:5583*0 + 3*325*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5583*0 + 3*325*FLEN/8, x4, x1, x2)

inst_1862:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad0000ff; valaddr_reg:x3; val_offset:5586*0 + 3*326*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5586*0 + 3*326*FLEN/8, x4, x1, x2)

inst_1863:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad0001ff; valaddr_reg:x3; val_offset:5589*0 + 3*327*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5589*0 + 3*327*FLEN/8, x4, x1, x2)

inst_1864:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad0003ff; valaddr_reg:x3; val_offset:5592*0 + 3*328*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5592*0 + 3*328*FLEN/8, x4, x1, x2)

inst_1865:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad0007ff; valaddr_reg:x3; val_offset:5595*0 + 3*329*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5595*0 + 3*329*FLEN/8, x4, x1, x2)

inst_1866:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad000fff; valaddr_reg:x3; val_offset:5598*0 + 3*330*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5598*0 + 3*330*FLEN/8, x4, x1, x2)

inst_1867:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad001fff; valaddr_reg:x3; val_offset:5601*0 + 3*331*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5601*0 + 3*331*FLEN/8, x4, x1, x2)

inst_1868:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad003fff; valaddr_reg:x3; val_offset:5604*0 + 3*332*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5604*0 + 3*332*FLEN/8, x4, x1, x2)

inst_1869:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad007fff; valaddr_reg:x3; val_offset:5607*0 + 3*333*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5607*0 + 3*333*FLEN/8, x4, x1, x2)

inst_1870:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad00ffff; valaddr_reg:x3; val_offset:5610*0 + 3*334*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5610*0 + 3*334*FLEN/8, x4, x1, x2)

inst_1871:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad01ffff; valaddr_reg:x3; val_offset:5613*0 + 3*335*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5613*0 + 3*335*FLEN/8, x4, x1, x2)

inst_1872:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad03ffff; valaddr_reg:x3; val_offset:5616*0 + 3*336*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5616*0 + 3*336*FLEN/8, x4, x1, x2)

inst_1873:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad07ffff; valaddr_reg:x3; val_offset:5619*0 + 3*337*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5619*0 + 3*337*FLEN/8, x4, x1, x2)

inst_1874:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad0fffff; valaddr_reg:x3; val_offset:5622*0 + 3*338*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5622*0 + 3*338*FLEN/8, x4, x1, x2)

inst_1875:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad1fffff; valaddr_reg:x3; val_offset:5625*0 + 3*339*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5625*0 + 3*339*FLEN/8, x4, x1, x2)

inst_1876:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad3fffff; valaddr_reg:x3; val_offset:5628*0 + 3*340*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5628*0 + 3*340*FLEN/8, x4, x1, x2)

inst_1877:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad400000; valaddr_reg:x3; val_offset:5631*0 + 3*341*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5631*0 + 3*341*FLEN/8, x4, x1, x2)

inst_1878:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad600000; valaddr_reg:x3; val_offset:5634*0 + 3*342*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5634*0 + 3*342*FLEN/8, x4, x1, x2)

inst_1879:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad700000; valaddr_reg:x3; val_offset:5637*0 + 3*343*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5637*0 + 3*343*FLEN/8, x4, x1, x2)

inst_1880:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad780000; valaddr_reg:x3; val_offset:5640*0 + 3*344*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5640*0 + 3*344*FLEN/8, x4, x1, x2)

inst_1881:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7c0000; valaddr_reg:x3; val_offset:5643*0 + 3*345*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5643*0 + 3*345*FLEN/8, x4, x1, x2)

inst_1882:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7e0000; valaddr_reg:x3; val_offset:5646*0 + 3*346*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5646*0 + 3*346*FLEN/8, x4, x1, x2)

inst_1883:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7f0000; valaddr_reg:x3; val_offset:5649*0 + 3*347*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5649*0 + 3*347*FLEN/8, x4, x1, x2)

inst_1884:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7f8000; valaddr_reg:x3; val_offset:5652*0 + 3*348*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5652*0 + 3*348*FLEN/8, x4, x1, x2)

inst_1885:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7fc000; valaddr_reg:x3; val_offset:5655*0 + 3*349*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5655*0 + 3*349*FLEN/8, x4, x1, x2)

inst_1886:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7fe000; valaddr_reg:x3; val_offset:5658*0 + 3*350*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5658*0 + 3*350*FLEN/8, x4, x1, x2)

inst_1887:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7ff000; valaddr_reg:x3; val_offset:5661*0 + 3*351*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5661*0 + 3*351*FLEN/8, x4, x1, x2)

inst_1888:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7ff800; valaddr_reg:x3; val_offset:5664*0 + 3*352*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5664*0 + 3*352*FLEN/8, x4, x1, x2)

inst_1889:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7ffc00; valaddr_reg:x3; val_offset:5667*0 + 3*353*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5667*0 + 3*353*FLEN/8, x4, x1, x2)

inst_1890:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7ffe00; valaddr_reg:x3; val_offset:5670*0 + 3*354*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5670*0 + 3*354*FLEN/8, x4, x1, x2)

inst_1891:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7fff00; valaddr_reg:x3; val_offset:5673*0 + 3*355*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5673*0 + 3*355*FLEN/8, x4, x1, x2)

inst_1892:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7fff80; valaddr_reg:x3; val_offset:5676*0 + 3*356*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5676*0 + 3*356*FLEN/8, x4, x1, x2)

inst_1893:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7fffc0; valaddr_reg:x3; val_offset:5679*0 + 3*357*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5679*0 + 3*357*FLEN/8, x4, x1, x2)

inst_1894:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7fffe0; valaddr_reg:x3; val_offset:5682*0 + 3*358*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5682*0 + 3*358*FLEN/8, x4, x1, x2)

inst_1895:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7ffff0; valaddr_reg:x3; val_offset:5685*0 + 3*359*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5685*0 + 3*359*FLEN/8, x4, x1, x2)

inst_1896:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7ffff8; valaddr_reg:x3; val_offset:5688*0 + 3*360*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5688*0 + 3*360*FLEN/8, x4, x1, x2)

inst_1897:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7ffffc; valaddr_reg:x3; val_offset:5691*0 + 3*361*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5691*0 + 3*361*FLEN/8, x4, x1, x2)

inst_1898:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7ffffe; valaddr_reg:x3; val_offset:5694*0 + 3*362*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5694*0 + 3*362*FLEN/8, x4, x1, x2)

inst_1899:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7fffff; valaddr_reg:x3; val_offset:5697*0 + 3*363*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5697*0 + 3*363*FLEN/8, x4, x1, x2)

inst_1900:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xbf800001; valaddr_reg:x3; val_offset:5700*0 + 3*364*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5700*0 + 3*364*FLEN/8, x4, x1, x2)

inst_1901:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xbf800003; valaddr_reg:x3; val_offset:5703*0 + 3*365*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5703*0 + 3*365*FLEN/8, x4, x1, x2)

inst_1902:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xbf800007; valaddr_reg:x3; val_offset:5706*0 + 3*366*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5706*0 + 3*366*FLEN/8, x4, x1, x2)

inst_1903:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xbf999999; valaddr_reg:x3; val_offset:5709*0 + 3*367*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5709*0 + 3*367*FLEN/8, x4, x1, x2)

inst_1904:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:5712*0 + 3*368*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5712*0 + 3*368*FLEN/8, x4, x1, x2)

inst_1905:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:5715*0 + 3*369*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5715*0 + 3*369*FLEN/8, x4, x1, x2)

inst_1906:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:5718*0 + 3*370*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5718*0 + 3*370*FLEN/8, x4, x1, x2)

inst_1907:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:5721*0 + 3*371*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5721*0 + 3*371*FLEN/8, x4, x1, x2)

inst_1908:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:5724*0 + 3*372*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5724*0 + 3*372*FLEN/8, x4, x1, x2)

inst_1909:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:5727*0 + 3*373*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5727*0 + 3*373*FLEN/8, x4, x1, x2)

inst_1910:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:5730*0 + 3*374*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5730*0 + 3*374*FLEN/8, x4, x1, x2)

inst_1911:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:5733*0 + 3*375*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5733*0 + 3*375*FLEN/8, x4, x1, x2)

inst_1912:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:5736*0 + 3*376*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5736*0 + 3*376*FLEN/8, x4, x1, x2)

inst_1913:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:5739*0 + 3*377*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5739*0 + 3*377*FLEN/8, x4, x1, x2)

inst_1914:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:5742*0 + 3*378*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5742*0 + 3*378*FLEN/8, x4, x1, x2)

inst_1915:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:5745*0 + 3*379*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5745*0 + 3*379*FLEN/8, x4, x1, x2)

inst_1916:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd800000; valaddr_reg:x3; val_offset:5748*0 + 3*380*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5748*0 + 3*380*FLEN/8, x4, x1, x2)

inst_1917:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd800001; valaddr_reg:x3; val_offset:5751*0 + 3*381*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5751*0 + 3*381*FLEN/8, x4, x1, x2)

inst_1918:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd800003; valaddr_reg:x3; val_offset:5754*0 + 3*382*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5754*0 + 3*382*FLEN/8, x4, x1, x2)

inst_1919:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd800007; valaddr_reg:x3; val_offset:5757*0 + 3*383*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5757*0 + 3*383*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_4)

inst_1920:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd80000f; valaddr_reg:x3; val_offset:5760*0 + 3*384*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5760*0 + 3*384*FLEN/8, x4, x1, x2)

inst_1921:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd80001f; valaddr_reg:x3; val_offset:5763*0 + 3*385*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5763*0 + 3*385*FLEN/8, x4, x1, x2)

inst_1922:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd80003f; valaddr_reg:x3; val_offset:5766*0 + 3*386*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5766*0 + 3*386*FLEN/8, x4, x1, x2)

inst_1923:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd80007f; valaddr_reg:x3; val_offset:5769*0 + 3*387*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5769*0 + 3*387*FLEN/8, x4, x1, x2)

inst_1924:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd8000ff; valaddr_reg:x3; val_offset:5772*0 + 3*388*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5772*0 + 3*388*FLEN/8, x4, x1, x2)

inst_1925:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd8001ff; valaddr_reg:x3; val_offset:5775*0 + 3*389*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5775*0 + 3*389*FLEN/8, x4, x1, x2)

inst_1926:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd8003ff; valaddr_reg:x3; val_offset:5778*0 + 3*390*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5778*0 + 3*390*FLEN/8, x4, x1, x2)

inst_1927:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd8007ff; valaddr_reg:x3; val_offset:5781*0 + 3*391*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5781*0 + 3*391*FLEN/8, x4, x1, x2)

inst_1928:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd800fff; valaddr_reg:x3; val_offset:5784*0 + 3*392*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5784*0 + 3*392*FLEN/8, x4, x1, x2)

inst_1929:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd801fff; valaddr_reg:x3; val_offset:5787*0 + 3*393*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5787*0 + 3*393*FLEN/8, x4, x1, x2)

inst_1930:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd803fff; valaddr_reg:x3; val_offset:5790*0 + 3*394*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5790*0 + 3*394*FLEN/8, x4, x1, x2)

inst_1931:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd807fff; valaddr_reg:x3; val_offset:5793*0 + 3*395*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5793*0 + 3*395*FLEN/8, x4, x1, x2)

inst_1932:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd80ffff; valaddr_reg:x3; val_offset:5796*0 + 3*396*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5796*0 + 3*396*FLEN/8, x4, x1, x2)

inst_1933:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd81ffff; valaddr_reg:x3; val_offset:5799*0 + 3*397*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5799*0 + 3*397*FLEN/8, x4, x1, x2)

inst_1934:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd83ffff; valaddr_reg:x3; val_offset:5802*0 + 3*398*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5802*0 + 3*398*FLEN/8, x4, x1, x2)

inst_1935:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd87ffff; valaddr_reg:x3; val_offset:5805*0 + 3*399*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5805*0 + 3*399*FLEN/8, x4, x1, x2)

inst_1936:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd8fffff; valaddr_reg:x3; val_offset:5808*0 + 3*400*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5808*0 + 3*400*FLEN/8, x4, x1, x2)

inst_1937:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd9fffff; valaddr_reg:x3; val_offset:5811*0 + 3*401*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5811*0 + 3*401*FLEN/8, x4, x1, x2)

inst_1938:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdbfffff; valaddr_reg:x3; val_offset:5814*0 + 3*402*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5814*0 + 3*402*FLEN/8, x4, x1, x2)

inst_1939:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdc00000; valaddr_reg:x3; val_offset:5817*0 + 3*403*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5817*0 + 3*403*FLEN/8, x4, x1, x2)

inst_1940:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbde00000; valaddr_reg:x3; val_offset:5820*0 + 3*404*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5820*0 + 3*404*FLEN/8, x4, x1, x2)

inst_1941:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdf00000; valaddr_reg:x3; val_offset:5823*0 + 3*405*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5823*0 + 3*405*FLEN/8, x4, x1, x2)

inst_1942:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdf80000; valaddr_reg:x3; val_offset:5826*0 + 3*406*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5826*0 + 3*406*FLEN/8, x4, x1, x2)

inst_1943:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdfc0000; valaddr_reg:x3; val_offset:5829*0 + 3*407*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5829*0 + 3*407*FLEN/8, x4, x1, x2)

inst_1944:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdfe0000; valaddr_reg:x3; val_offset:5832*0 + 3*408*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5832*0 + 3*408*FLEN/8, x4, x1, x2)

inst_1945:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdff0000; valaddr_reg:x3; val_offset:5835*0 + 3*409*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5835*0 + 3*409*FLEN/8, x4, x1, x2)

inst_1946:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdff8000; valaddr_reg:x3; val_offset:5838*0 + 3*410*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5838*0 + 3*410*FLEN/8, x4, x1, x2)

inst_1947:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdffc000; valaddr_reg:x3; val_offset:5841*0 + 3*411*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5841*0 + 3*411*FLEN/8, x4, x1, x2)

inst_1948:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdffe000; valaddr_reg:x3; val_offset:5844*0 + 3*412*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5844*0 + 3*412*FLEN/8, x4, x1, x2)

inst_1949:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdfff000; valaddr_reg:x3; val_offset:5847*0 + 3*413*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5847*0 + 3*413*FLEN/8, x4, x1, x2)

inst_1950:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdfff800; valaddr_reg:x3; val_offset:5850*0 + 3*414*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5850*0 + 3*414*FLEN/8, x4, x1, x2)

inst_1951:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdfffc00; valaddr_reg:x3; val_offset:5853*0 + 3*415*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5853*0 + 3*415*FLEN/8, x4, x1, x2)

inst_1952:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdfffe00; valaddr_reg:x3; val_offset:5856*0 + 3*416*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5856*0 + 3*416*FLEN/8, x4, x1, x2)

inst_1953:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdffff00; valaddr_reg:x3; val_offset:5859*0 + 3*417*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5859*0 + 3*417*FLEN/8, x4, x1, x2)

inst_1954:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdffff80; valaddr_reg:x3; val_offset:5862*0 + 3*418*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5862*0 + 3*418*FLEN/8, x4, x1, x2)

inst_1955:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdffffc0; valaddr_reg:x3; val_offset:5865*0 + 3*419*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5865*0 + 3*419*FLEN/8, x4, x1, x2)

inst_1956:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdffffe0; valaddr_reg:x3; val_offset:5868*0 + 3*420*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5868*0 + 3*420*FLEN/8, x4, x1, x2)

inst_1957:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdfffff0; valaddr_reg:x3; val_offset:5871*0 + 3*421*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5871*0 + 3*421*FLEN/8, x4, x1, x2)

inst_1958:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdfffff8; valaddr_reg:x3; val_offset:5874*0 + 3*422*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5874*0 + 3*422*FLEN/8, x4, x1, x2)

inst_1959:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdfffffc; valaddr_reg:x3; val_offset:5877*0 + 3*423*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5877*0 + 3*423*FLEN/8, x4, x1, x2)

inst_1960:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdfffffe; valaddr_reg:x3; val_offset:5880*0 + 3*424*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5880*0 + 3*424*FLEN/8, x4, x1, x2)

inst_1961:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdffffff; valaddr_reg:x3; val_offset:5883*0 + 3*425*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5883*0 + 3*425*FLEN/8, x4, x1, x2)

inst_1962:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbf800001; valaddr_reg:x3; val_offset:5886*0 + 3*426*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5886*0 + 3*426*FLEN/8, x4, x1, x2)

inst_1963:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbf800003; valaddr_reg:x3; val_offset:5889*0 + 3*427*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5889*0 + 3*427*FLEN/8, x4, x1, x2)

inst_1964:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbf800007; valaddr_reg:x3; val_offset:5892*0 + 3*428*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5892*0 + 3*428*FLEN/8, x4, x1, x2)

inst_1965:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbf999999; valaddr_reg:x3; val_offset:5895*0 + 3*429*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5895*0 + 3*429*FLEN/8, x4, x1, x2)

inst_1966:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:5898*0 + 3*430*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5898*0 + 3*430*FLEN/8, x4, x1, x2)

inst_1967:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:5901*0 + 3*431*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5901*0 + 3*431*FLEN/8, x4, x1, x2)

inst_1968:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:5904*0 + 3*432*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5904*0 + 3*432*FLEN/8, x4, x1, x2)

inst_1969:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:5907*0 + 3*433*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5907*0 + 3*433*FLEN/8, x4, x1, x2)

inst_1970:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:5910*0 + 3*434*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5910*0 + 3*434*FLEN/8, x4, x1, x2)

inst_1971:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:5913*0 + 3*435*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5913*0 + 3*435*FLEN/8, x4, x1, x2)

inst_1972:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:5916*0 + 3*436*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5916*0 + 3*436*FLEN/8, x4, x1, x2)

inst_1973:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:5919*0 + 3*437*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5919*0 + 3*437*FLEN/8, x4, x1, x2)

inst_1974:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:5922*0 + 3*438*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5922*0 + 3*438*FLEN/8, x4, x1, x2)

inst_1975:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:5925*0 + 3*439*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5925*0 + 3*439*FLEN/8, x4, x1, x2)

inst_1976:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:5928*0 + 3*440*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5928*0 + 3*440*FLEN/8, x4, x1, x2)

inst_1977:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:5931*0 + 3*441*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5931*0 + 3*441*FLEN/8, x4, x1, x2)

inst_1978:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf8800000; valaddr_reg:x3; val_offset:5934*0 + 3*442*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5934*0 + 3*442*FLEN/8, x4, x1, x2)

inst_1979:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf8800001; valaddr_reg:x3; val_offset:5937*0 + 3*443*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5937*0 + 3*443*FLEN/8, x4, x1, x2)

inst_1980:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf8800003; valaddr_reg:x3; val_offset:5940*0 + 3*444*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5940*0 + 3*444*FLEN/8, x4, x1, x2)

inst_1981:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf8800007; valaddr_reg:x3; val_offset:5943*0 + 3*445*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5943*0 + 3*445*FLEN/8, x4, x1, x2)

inst_1982:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf880000f; valaddr_reg:x3; val_offset:5946*0 + 3*446*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5946*0 + 3*446*FLEN/8, x4, x1, x2)

inst_1983:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf880001f; valaddr_reg:x3; val_offset:5949*0 + 3*447*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5949*0 + 3*447*FLEN/8, x4, x1, x2)

inst_1984:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf880003f; valaddr_reg:x3; val_offset:5952*0 + 3*448*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5952*0 + 3*448*FLEN/8, x4, x1, x2)

inst_1985:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf880007f; valaddr_reg:x3; val_offset:5955*0 + 3*449*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5955*0 + 3*449*FLEN/8, x4, x1, x2)

inst_1986:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf88000ff; valaddr_reg:x3; val_offset:5958*0 + 3*450*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5958*0 + 3*450*FLEN/8, x4, x1, x2)

inst_1987:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf88001ff; valaddr_reg:x3; val_offset:5961*0 + 3*451*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5961*0 + 3*451*FLEN/8, x4, x1, x2)

inst_1988:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf88003ff; valaddr_reg:x3; val_offset:5964*0 + 3*452*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5964*0 + 3*452*FLEN/8, x4, x1, x2)

inst_1989:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf88007ff; valaddr_reg:x3; val_offset:5967*0 + 3*453*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5967*0 + 3*453*FLEN/8, x4, x1, x2)

inst_1990:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf8800fff; valaddr_reg:x3; val_offset:5970*0 + 3*454*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5970*0 + 3*454*FLEN/8, x4, x1, x2)

inst_1991:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf8801fff; valaddr_reg:x3; val_offset:5973*0 + 3*455*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5973*0 + 3*455*FLEN/8, x4, x1, x2)

inst_1992:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf8803fff; valaddr_reg:x3; val_offset:5976*0 + 3*456*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5976*0 + 3*456*FLEN/8, x4, x1, x2)

inst_1993:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf8807fff; valaddr_reg:x3; val_offset:5979*0 + 3*457*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5979*0 + 3*457*FLEN/8, x4, x1, x2)

inst_1994:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf880ffff; valaddr_reg:x3; val_offset:5982*0 + 3*458*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5982*0 + 3*458*FLEN/8, x4, x1, x2)

inst_1995:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf881ffff; valaddr_reg:x3; val_offset:5985*0 + 3*459*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5985*0 + 3*459*FLEN/8, x4, x1, x2)

inst_1996:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf883ffff; valaddr_reg:x3; val_offset:5988*0 + 3*460*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5988*0 + 3*460*FLEN/8, x4, x1, x2)

inst_1997:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf887ffff; valaddr_reg:x3; val_offset:5991*0 + 3*461*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5991*0 + 3*461*FLEN/8, x4, x1, x2)

inst_1998:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf88fffff; valaddr_reg:x3; val_offset:5994*0 + 3*462*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5994*0 + 3*462*FLEN/8, x4, x1, x2)

inst_1999:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf89fffff; valaddr_reg:x3; val_offset:5997*0 + 3*463*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5997*0 + 3*463*FLEN/8, x4, x1, x2)

inst_2000:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf8bfffff; valaddr_reg:x3; val_offset:6000*0 + 3*464*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6000*0 + 3*464*FLEN/8, x4, x1, x2)

inst_2001:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf8c00000; valaddr_reg:x3; val_offset:6003*0 + 3*465*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6003*0 + 3*465*FLEN/8, x4, x1, x2)

inst_2002:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf8e00000; valaddr_reg:x3; val_offset:6006*0 + 3*466*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6006*0 + 3*466*FLEN/8, x4, x1, x2)

inst_2003:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf8f00000; valaddr_reg:x3; val_offset:6009*0 + 3*467*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6009*0 + 3*467*FLEN/8, x4, x1, x2)

inst_2004:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf8f80000; valaddr_reg:x3; val_offset:6012*0 + 3*468*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6012*0 + 3*468*FLEN/8, x4, x1, x2)

inst_2005:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf8fc0000; valaddr_reg:x3; val_offset:6015*0 + 3*469*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6015*0 + 3*469*FLEN/8, x4, x1, x2)

inst_2006:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf8fe0000; valaddr_reg:x3; val_offset:6018*0 + 3*470*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6018*0 + 3*470*FLEN/8, x4, x1, x2)

inst_2007:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf8ff0000; valaddr_reg:x3; val_offset:6021*0 + 3*471*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6021*0 + 3*471*FLEN/8, x4, x1, x2)

inst_2008:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf8ff8000; valaddr_reg:x3; val_offset:6024*0 + 3*472*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6024*0 + 3*472*FLEN/8, x4, x1, x2)

inst_2009:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf8ffc000; valaddr_reg:x3; val_offset:6027*0 + 3*473*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6027*0 + 3*473*FLEN/8, x4, x1, x2)

inst_2010:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf8ffe000; valaddr_reg:x3; val_offset:6030*0 + 3*474*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6030*0 + 3*474*FLEN/8, x4, x1, x2)

inst_2011:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf8fff000; valaddr_reg:x3; val_offset:6033*0 + 3*475*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6033*0 + 3*475*FLEN/8, x4, x1, x2)

inst_2012:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf8fff800; valaddr_reg:x3; val_offset:6036*0 + 3*476*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6036*0 + 3*476*FLEN/8, x4, x1, x2)

inst_2013:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf8fffc00; valaddr_reg:x3; val_offset:6039*0 + 3*477*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6039*0 + 3*477*FLEN/8, x4, x1, x2)

inst_2014:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf8fffe00; valaddr_reg:x3; val_offset:6042*0 + 3*478*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6042*0 + 3*478*FLEN/8, x4, x1, x2)

inst_2015:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf8ffff00; valaddr_reg:x3; val_offset:6045*0 + 3*479*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6045*0 + 3*479*FLEN/8, x4, x1, x2)

inst_2016:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf8ffff80; valaddr_reg:x3; val_offset:6048*0 + 3*480*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6048*0 + 3*480*FLEN/8, x4, x1, x2)

inst_2017:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf8ffffc0; valaddr_reg:x3; val_offset:6051*0 + 3*481*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6051*0 + 3*481*FLEN/8, x4, x1, x2)

inst_2018:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf8ffffe0; valaddr_reg:x3; val_offset:6054*0 + 3*482*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6054*0 + 3*482*FLEN/8, x4, x1, x2)

inst_2019:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf8fffff0; valaddr_reg:x3; val_offset:6057*0 + 3*483*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6057*0 + 3*483*FLEN/8, x4, x1, x2)

inst_2020:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf8fffff8; valaddr_reg:x3; val_offset:6060*0 + 3*484*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6060*0 + 3*484*FLEN/8, x4, x1, x2)

inst_2021:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf8fffffc; valaddr_reg:x3; val_offset:6063*0 + 3*485*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6063*0 + 3*485*FLEN/8, x4, x1, x2)

inst_2022:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf8fffffe; valaddr_reg:x3; val_offset:6066*0 + 3*486*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6066*0 + 3*486*FLEN/8, x4, x1, x2)

inst_2023:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xf8ffffff; valaddr_reg:x3; val_offset:6069*0 + 3*487*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6069*0 + 3*487*FLEN/8, x4, x1, x2)

inst_2024:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xff000001; valaddr_reg:x3; val_offset:6072*0 + 3*488*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6072*0 + 3*488*FLEN/8, x4, x1, x2)

inst_2025:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xff000003; valaddr_reg:x3; val_offset:6075*0 + 3*489*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6075*0 + 3*489*FLEN/8, x4, x1, x2)

inst_2026:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xff000007; valaddr_reg:x3; val_offset:6078*0 + 3*490*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6078*0 + 3*490*FLEN/8, x4, x1, x2)

inst_2027:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xff199999; valaddr_reg:x3; val_offset:6081*0 + 3*491*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6081*0 + 3*491*FLEN/8, x4, x1, x2)

inst_2028:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xff249249; valaddr_reg:x3; val_offset:6084*0 + 3*492*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6084*0 + 3*492*FLEN/8, x4, x1, x2)

inst_2029:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xff333333; valaddr_reg:x3; val_offset:6087*0 + 3*493*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6087*0 + 3*493*FLEN/8, x4, x1, x2)

inst_2030:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xff36db6d; valaddr_reg:x3; val_offset:6090*0 + 3*494*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6090*0 + 3*494*FLEN/8, x4, x1, x2)

inst_2031:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:6093*0 + 3*495*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6093*0 + 3*495*FLEN/8, x4, x1, x2)

inst_2032:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xff444444; valaddr_reg:x3; val_offset:6096*0 + 3*496*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6096*0 + 3*496*FLEN/8, x4, x1, x2)

inst_2033:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xff4ccccc; valaddr_reg:x3; val_offset:6099*0 + 3*497*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6099*0 + 3*497*FLEN/8, x4, x1, x2)

inst_2034:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xff5b6db6; valaddr_reg:x3; val_offset:6102*0 + 3*498*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6102*0 + 3*498*FLEN/8, x4, x1, x2)

inst_2035:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xff666666; valaddr_reg:x3; val_offset:6105*0 + 3*499*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6105*0 + 3*499*FLEN/8, x4, x1, x2)

inst_2036:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xff6db6db; valaddr_reg:x3; val_offset:6108*0 + 3*500*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6108*0 + 3*500*FLEN/8, x4, x1, x2)

inst_2037:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xff7ffff8; valaddr_reg:x3; val_offset:6111*0 + 3*501*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6111*0 + 3*501*FLEN/8, x4, x1, x2)

inst_2038:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xff7ffffc; valaddr_reg:x3; val_offset:6114*0 + 3*502*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6114*0 + 3*502*FLEN/8, x4, x1, x2)

inst_2039:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d0754 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x50ace0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1d0754; op2val:0xc1d0ace0;
op3val:0xff7ffffe; valaddr_reg:x3; val_offset:6117*0 + 3*503*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6117*0 + 3*503*FLEN/8, x4, x1, x2)

inst_2040:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfe800000; valaddr_reg:x3; val_offset:6120*0 + 3*504*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6120*0 + 3*504*FLEN/8, x4, x1, x2)

inst_2041:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfe800001; valaddr_reg:x3; val_offset:6123*0 + 3*505*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6123*0 + 3*505*FLEN/8, x4, x1, x2)

inst_2042:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfe800003; valaddr_reg:x3; val_offset:6126*0 + 3*506*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6126*0 + 3*506*FLEN/8, x4, x1, x2)

inst_2043:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfe800007; valaddr_reg:x3; val_offset:6129*0 + 3*507*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6129*0 + 3*507*FLEN/8, x4, x1, x2)

inst_2044:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfe80000f; valaddr_reg:x3; val_offset:6132*0 + 3*508*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6132*0 + 3*508*FLEN/8, x4, x1, x2)

inst_2045:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfe80001f; valaddr_reg:x3; val_offset:6135*0 + 3*509*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6135*0 + 3*509*FLEN/8, x4, x1, x2)

inst_2046:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfe80003f; valaddr_reg:x3; val_offset:6138*0 + 3*510*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6138*0 + 3*510*FLEN/8, x4, x1, x2)

inst_2047:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfe80007f; valaddr_reg:x3; val_offset:6141*0 + 3*511*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6141*0 + 3*511*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_5)

inst_2048:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfe8000ff; valaddr_reg:x3; val_offset:6144*0 + 3*512*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6144*0 + 3*512*FLEN/8, x4, x1, x2)

inst_2049:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfe8001ff; valaddr_reg:x3; val_offset:6147*0 + 3*513*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6147*0 + 3*513*FLEN/8, x4, x1, x2)

inst_2050:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfe8003ff; valaddr_reg:x3; val_offset:6150*0 + 3*514*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6150*0 + 3*514*FLEN/8, x4, x1, x2)

inst_2051:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfe8007ff; valaddr_reg:x3; val_offset:6153*0 + 3*515*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6153*0 + 3*515*FLEN/8, x4, x1, x2)

inst_2052:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfe800fff; valaddr_reg:x3; val_offset:6156*0 + 3*516*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6156*0 + 3*516*FLEN/8, x4, x1, x2)

inst_2053:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfe801fff; valaddr_reg:x3; val_offset:6159*0 + 3*517*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6159*0 + 3*517*FLEN/8, x4, x1, x2)

inst_2054:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfe803fff; valaddr_reg:x3; val_offset:6162*0 + 3*518*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6162*0 + 3*518*FLEN/8, x4, x1, x2)

inst_2055:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfe807fff; valaddr_reg:x3; val_offset:6165*0 + 3*519*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6165*0 + 3*519*FLEN/8, x4, x1, x2)

inst_2056:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfe80ffff; valaddr_reg:x3; val_offset:6168*0 + 3*520*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6168*0 + 3*520*FLEN/8, x4, x1, x2)

inst_2057:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfe81ffff; valaddr_reg:x3; val_offset:6171*0 + 3*521*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6171*0 + 3*521*FLEN/8, x4, x1, x2)

inst_2058:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfe83ffff; valaddr_reg:x3; val_offset:6174*0 + 3*522*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6174*0 + 3*522*FLEN/8, x4, x1, x2)

inst_2059:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfe87ffff; valaddr_reg:x3; val_offset:6177*0 + 3*523*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6177*0 + 3*523*FLEN/8, x4, x1, x2)

inst_2060:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfe8fffff; valaddr_reg:x3; val_offset:6180*0 + 3*524*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6180*0 + 3*524*FLEN/8, x4, x1, x2)

inst_2061:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfe9fffff; valaddr_reg:x3; val_offset:6183*0 + 3*525*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6183*0 + 3*525*FLEN/8, x4, x1, x2)

inst_2062:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfebfffff; valaddr_reg:x3; val_offset:6186*0 + 3*526*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6186*0 + 3*526*FLEN/8, x4, x1, x2)

inst_2063:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfec00000; valaddr_reg:x3; val_offset:6189*0 + 3*527*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6189*0 + 3*527*FLEN/8, x4, x1, x2)

inst_2064:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfee00000; valaddr_reg:x3; val_offset:6192*0 + 3*528*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6192*0 + 3*528*FLEN/8, x4, x1, x2)

inst_2065:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfef00000; valaddr_reg:x3; val_offset:6195*0 + 3*529*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6195*0 + 3*529*FLEN/8, x4, x1, x2)

inst_2066:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfef80000; valaddr_reg:x3; val_offset:6198*0 + 3*530*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6198*0 + 3*530*FLEN/8, x4, x1, x2)

inst_2067:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfefc0000; valaddr_reg:x3; val_offset:6201*0 + 3*531*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6201*0 + 3*531*FLEN/8, x4, x1, x2)

inst_2068:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfefe0000; valaddr_reg:x3; val_offset:6204*0 + 3*532*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6204*0 + 3*532*FLEN/8, x4, x1, x2)

inst_2069:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfeff0000; valaddr_reg:x3; val_offset:6207*0 + 3*533*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6207*0 + 3*533*FLEN/8, x4, x1, x2)

inst_2070:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfeff8000; valaddr_reg:x3; val_offset:6210*0 + 3*534*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6210*0 + 3*534*FLEN/8, x4, x1, x2)

inst_2071:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfeffc000; valaddr_reg:x3; val_offset:6213*0 + 3*535*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6213*0 + 3*535*FLEN/8, x4, x1, x2)

inst_2072:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfeffe000; valaddr_reg:x3; val_offset:6216*0 + 3*536*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6216*0 + 3*536*FLEN/8, x4, x1, x2)

inst_2073:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfefff000; valaddr_reg:x3; val_offset:6219*0 + 3*537*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6219*0 + 3*537*FLEN/8, x4, x1, x2)

inst_2074:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfefff800; valaddr_reg:x3; val_offset:6222*0 + 3*538*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6222*0 + 3*538*FLEN/8, x4, x1, x2)

inst_2075:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfefffc00; valaddr_reg:x3; val_offset:6225*0 + 3*539*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6225*0 + 3*539*FLEN/8, x4, x1, x2)

inst_2076:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfefffe00; valaddr_reg:x3; val_offset:6228*0 + 3*540*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6228*0 + 3*540*FLEN/8, x4, x1, x2)

inst_2077:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfeffff00; valaddr_reg:x3; val_offset:6231*0 + 3*541*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6231*0 + 3*541*FLEN/8, x4, x1, x2)

inst_2078:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfeffff80; valaddr_reg:x3; val_offset:6234*0 + 3*542*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6234*0 + 3*542*FLEN/8, x4, x1, x2)

inst_2079:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfeffffc0; valaddr_reg:x3; val_offset:6237*0 + 3*543*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6237*0 + 3*543*FLEN/8, x4, x1, x2)

inst_2080:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfeffffe0; valaddr_reg:x3; val_offset:6240*0 + 3*544*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6240*0 + 3*544*FLEN/8, x4, x1, x2)

inst_2081:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfefffff0; valaddr_reg:x3; val_offset:6243*0 + 3*545*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6243*0 + 3*545*FLEN/8, x4, x1, x2)

inst_2082:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfefffff8; valaddr_reg:x3; val_offset:6246*0 + 3*546*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6246*0 + 3*546*FLEN/8, x4, x1, x2)

inst_2083:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfefffffc; valaddr_reg:x3; val_offset:6249*0 + 3*547*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6249*0 + 3*547*FLEN/8, x4, x1, x2)

inst_2084:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfefffffe; valaddr_reg:x3; val_offset:6252*0 + 3*548*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6252*0 + 3*548*FLEN/8, x4, x1, x2)

inst_2085:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xfeffffff; valaddr_reg:x3; val_offset:6255*0 + 3*549*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6255*0 + 3*549*FLEN/8, x4, x1, x2)

inst_2086:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xff000001; valaddr_reg:x3; val_offset:6258*0 + 3*550*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6258*0 + 3*550*FLEN/8, x4, x1, x2)

inst_2087:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xff000003; valaddr_reg:x3; val_offset:6261*0 + 3*551*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6261*0 + 3*551*FLEN/8, x4, x1, x2)

inst_2088:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xff000007; valaddr_reg:x3; val_offset:6264*0 + 3*552*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6264*0 + 3*552*FLEN/8, x4, x1, x2)

inst_2089:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xff199999; valaddr_reg:x3; val_offset:6267*0 + 3*553*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6267*0 + 3*553*FLEN/8, x4, x1, x2)

inst_2090:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xff249249; valaddr_reg:x3; val_offset:6270*0 + 3*554*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6270*0 + 3*554*FLEN/8, x4, x1, x2)

inst_2091:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xff333333; valaddr_reg:x3; val_offset:6273*0 + 3*555*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6273*0 + 3*555*FLEN/8, x4, x1, x2)

inst_2092:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xff36db6d; valaddr_reg:x3; val_offset:6276*0 + 3*556*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6276*0 + 3*556*FLEN/8, x4, x1, x2)

inst_2093:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:6279*0 + 3*557*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6279*0 + 3*557*FLEN/8, x4, x1, x2)

inst_2094:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xff444444; valaddr_reg:x3; val_offset:6282*0 + 3*558*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6282*0 + 3*558*FLEN/8, x4, x1, x2)

inst_2095:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xff4ccccc; valaddr_reg:x3; val_offset:6285*0 + 3*559*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6285*0 + 3*559*FLEN/8, x4, x1, x2)

inst_2096:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xff5b6db6; valaddr_reg:x3; val_offset:6288*0 + 3*560*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6288*0 + 3*560*FLEN/8, x4, x1, x2)

inst_2097:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xff666666; valaddr_reg:x3; val_offset:6291*0 + 3*561*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6291*0 + 3*561*FLEN/8, x4, x1, x2)

inst_2098:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xff6db6db; valaddr_reg:x3; val_offset:6294*0 + 3*562*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6294*0 + 3*562*FLEN/8, x4, x1, x2)

inst_2099:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xff7ffff8; valaddr_reg:x3; val_offset:6297*0 + 3*563*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6297*0 + 3*563*FLEN/8, x4, x1, x2)

inst_2100:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xff7ffffc; valaddr_reg:x3; val_offset:6300*0 + 3*564*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6300*0 + 3*564*FLEN/8, x4, x1, x2)

inst_2101:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1f68e8 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4d8ee8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d1f68e8; op2val:0xc1cd8ee8;
op3val:0xff7ffffe; valaddr_reg:x3; val_offset:6303*0 + 3*565*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6303*0 + 3*565*FLEN/8, x4, x1, x2)

inst_2102:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xbf800001; valaddr_reg:x3; val_offset:6306*0 + 3*566*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6306*0 + 3*566*FLEN/8, x4, x1, x2)

inst_2103:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xbf800003; valaddr_reg:x3; val_offset:6309*0 + 3*567*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6309*0 + 3*567*FLEN/8, x4, x1, x2)

inst_2104:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xbf800007; valaddr_reg:x3; val_offset:6312*0 + 3*568*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6312*0 + 3*568*FLEN/8, x4, x1, x2)

inst_2105:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xbf999999; valaddr_reg:x3; val_offset:6315*0 + 3*569*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6315*0 + 3*569*FLEN/8, x4, x1, x2)

inst_2106:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:6318*0 + 3*570*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6318*0 + 3*570*FLEN/8, x4, x1, x2)

inst_2107:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:6321*0 + 3*571*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6321*0 + 3*571*FLEN/8, x4, x1, x2)

inst_2108:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:6324*0 + 3*572*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6324*0 + 3*572*FLEN/8, x4, x1, x2)

inst_2109:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:6327*0 + 3*573*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6327*0 + 3*573*FLEN/8, x4, x1, x2)

inst_2110:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:6330*0 + 3*574*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6330*0 + 3*574*FLEN/8, x4, x1, x2)

inst_2111:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:6333*0 + 3*575*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6333*0 + 3*575*FLEN/8, x4, x1, x2)

inst_2112:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:6336*0 + 3*576*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6336*0 + 3*576*FLEN/8, x4, x1, x2)

inst_2113:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:6339*0 + 3*577*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6339*0 + 3*577*FLEN/8, x4, x1, x2)

inst_2114:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:6342*0 + 3*578*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6342*0 + 3*578*FLEN/8, x4, x1, x2)

inst_2115:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:6345*0 + 3*579*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6345*0 + 3*579*FLEN/8, x4, x1, x2)

inst_2116:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:6348*0 + 3*580*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6348*0 + 3*580*FLEN/8, x4, x1, x2)

inst_2117:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:6351*0 + 3*581*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6351*0 + 3*581*FLEN/8, x4, x1, x2)

inst_2118:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc1800000; valaddr_reg:x3; val_offset:6354*0 + 3*582*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6354*0 + 3*582*FLEN/8, x4, x1, x2)

inst_2119:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc1800001; valaddr_reg:x3; val_offset:6357*0 + 3*583*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6357*0 + 3*583*FLEN/8, x4, x1, x2)

inst_2120:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc1800003; valaddr_reg:x3; val_offset:6360*0 + 3*584*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6360*0 + 3*584*FLEN/8, x4, x1, x2)

inst_2121:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc1800007; valaddr_reg:x3; val_offset:6363*0 + 3*585*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6363*0 + 3*585*FLEN/8, x4, x1, x2)

inst_2122:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc180000f; valaddr_reg:x3; val_offset:6366*0 + 3*586*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6366*0 + 3*586*FLEN/8, x4, x1, x2)

inst_2123:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc180001f; valaddr_reg:x3; val_offset:6369*0 + 3*587*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6369*0 + 3*587*FLEN/8, x4, x1, x2)

inst_2124:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc180003f; valaddr_reg:x3; val_offset:6372*0 + 3*588*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6372*0 + 3*588*FLEN/8, x4, x1, x2)

inst_2125:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc180007f; valaddr_reg:x3; val_offset:6375*0 + 3*589*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6375*0 + 3*589*FLEN/8, x4, x1, x2)

inst_2126:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc18000ff; valaddr_reg:x3; val_offset:6378*0 + 3*590*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6378*0 + 3*590*FLEN/8, x4, x1, x2)

inst_2127:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc18001ff; valaddr_reg:x3; val_offset:6381*0 + 3*591*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6381*0 + 3*591*FLEN/8, x4, x1, x2)

inst_2128:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc18003ff; valaddr_reg:x3; val_offset:6384*0 + 3*592*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6384*0 + 3*592*FLEN/8, x4, x1, x2)

inst_2129:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc18007ff; valaddr_reg:x3; val_offset:6387*0 + 3*593*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6387*0 + 3*593*FLEN/8, x4, x1, x2)

inst_2130:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc1800fff; valaddr_reg:x3; val_offset:6390*0 + 3*594*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6390*0 + 3*594*FLEN/8, x4, x1, x2)

inst_2131:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc1801fff; valaddr_reg:x3; val_offset:6393*0 + 3*595*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6393*0 + 3*595*FLEN/8, x4, x1, x2)

inst_2132:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc1803fff; valaddr_reg:x3; val_offset:6396*0 + 3*596*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6396*0 + 3*596*FLEN/8, x4, x1, x2)

inst_2133:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc1807fff; valaddr_reg:x3; val_offset:6399*0 + 3*597*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6399*0 + 3*597*FLEN/8, x4, x1, x2)

inst_2134:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc180ffff; valaddr_reg:x3; val_offset:6402*0 + 3*598*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6402*0 + 3*598*FLEN/8, x4, x1, x2)

inst_2135:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc181ffff; valaddr_reg:x3; val_offset:6405*0 + 3*599*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6405*0 + 3*599*FLEN/8, x4, x1, x2)

inst_2136:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc183ffff; valaddr_reg:x3; val_offset:6408*0 + 3*600*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6408*0 + 3*600*FLEN/8, x4, x1, x2)

inst_2137:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc187ffff; valaddr_reg:x3; val_offset:6411*0 + 3*601*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6411*0 + 3*601*FLEN/8, x4, x1, x2)

inst_2138:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc18fffff; valaddr_reg:x3; val_offset:6414*0 + 3*602*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6414*0 + 3*602*FLEN/8, x4, x1, x2)

inst_2139:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc19fffff; valaddr_reg:x3; val_offset:6417*0 + 3*603*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6417*0 + 3*603*FLEN/8, x4, x1, x2)

inst_2140:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc1bfffff; valaddr_reg:x3; val_offset:6420*0 + 3*604*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6420*0 + 3*604*FLEN/8, x4, x1, x2)

inst_2141:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc1c00000; valaddr_reg:x3; val_offset:6423*0 + 3*605*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6423*0 + 3*605*FLEN/8, x4, x1, x2)

inst_2142:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc1e00000; valaddr_reg:x3; val_offset:6426*0 + 3*606*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6426*0 + 3*606*FLEN/8, x4, x1, x2)

inst_2143:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc1f00000; valaddr_reg:x3; val_offset:6429*0 + 3*607*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6429*0 + 3*607*FLEN/8, x4, x1, x2)

inst_2144:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc1f80000; valaddr_reg:x3; val_offset:6432*0 + 3*608*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6432*0 + 3*608*FLEN/8, x4, x1, x2)

inst_2145:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc1fc0000; valaddr_reg:x3; val_offset:6435*0 + 3*609*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6435*0 + 3*609*FLEN/8, x4, x1, x2)

inst_2146:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc1fe0000; valaddr_reg:x3; val_offset:6438*0 + 3*610*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6438*0 + 3*610*FLEN/8, x4, x1, x2)

inst_2147:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc1ff0000; valaddr_reg:x3; val_offset:6441*0 + 3*611*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6441*0 + 3*611*FLEN/8, x4, x1, x2)

inst_2148:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc1ff8000; valaddr_reg:x3; val_offset:6444*0 + 3*612*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6444*0 + 3*612*FLEN/8, x4, x1, x2)

inst_2149:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc1ffc000; valaddr_reg:x3; val_offset:6447*0 + 3*613*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6447*0 + 3*613*FLEN/8, x4, x1, x2)

inst_2150:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc1ffe000; valaddr_reg:x3; val_offset:6450*0 + 3*614*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6450*0 + 3*614*FLEN/8, x4, x1, x2)

inst_2151:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc1fff000; valaddr_reg:x3; val_offset:6453*0 + 3*615*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6453*0 + 3*615*FLEN/8, x4, x1, x2)

inst_2152:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc1fff800; valaddr_reg:x3; val_offset:6456*0 + 3*616*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6456*0 + 3*616*FLEN/8, x4, x1, x2)

inst_2153:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc1fffc00; valaddr_reg:x3; val_offset:6459*0 + 3*617*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6459*0 + 3*617*FLEN/8, x4, x1, x2)

inst_2154:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc1fffe00; valaddr_reg:x3; val_offset:6462*0 + 3*618*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6462*0 + 3*618*FLEN/8, x4, x1, x2)

inst_2155:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc1ffff00; valaddr_reg:x3; val_offset:6465*0 + 3*619*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6465*0 + 3*619*FLEN/8, x4, x1, x2)

inst_2156:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc1ffff80; valaddr_reg:x3; val_offset:6468*0 + 3*620*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6468*0 + 3*620*FLEN/8, x4, x1, x2)

inst_2157:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc1ffffc0; valaddr_reg:x3; val_offset:6471*0 + 3*621*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6471*0 + 3*621*FLEN/8, x4, x1, x2)

inst_2158:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc1ffffe0; valaddr_reg:x3; val_offset:6474*0 + 3*622*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6474*0 + 3*622*FLEN/8, x4, x1, x2)

inst_2159:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc1fffff0; valaddr_reg:x3; val_offset:6477*0 + 3*623*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6477*0 + 3*623*FLEN/8, x4, x1, x2)

inst_2160:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc1fffff8; valaddr_reg:x3; val_offset:6480*0 + 3*624*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6480*0 + 3*624*FLEN/8, x4, x1, x2)

inst_2161:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc1fffffc; valaddr_reg:x3; val_offset:6483*0 + 3*625*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6483*0 + 3*625*FLEN/8, x4, x1, x2)

inst_2162:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc1fffffe; valaddr_reg:x3; val_offset:6486*0 + 3*626*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6486*0 + 3*626*FLEN/8, x4, x1, x2)

inst_2163:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2872e3 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x428729 and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2872e3; op2val:0x81c28729;
op3val:0xc1ffffff; valaddr_reg:x3; val_offset:6489*0 + 3*627*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6489*0 + 3*627*FLEN/8, x4, x1, x2)

inst_2164:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf6000000; valaddr_reg:x3; val_offset:6492*0 + 3*628*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6492*0 + 3*628*FLEN/8, x4, x1, x2)

inst_2165:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf6000001; valaddr_reg:x3; val_offset:6495*0 + 3*629*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6495*0 + 3*629*FLEN/8, x4, x1, x2)

inst_2166:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf6000003; valaddr_reg:x3; val_offset:6498*0 + 3*630*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6498*0 + 3*630*FLEN/8, x4, x1, x2)

inst_2167:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf6000007; valaddr_reg:x3; val_offset:6501*0 + 3*631*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6501*0 + 3*631*FLEN/8, x4, x1, x2)

inst_2168:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf600000f; valaddr_reg:x3; val_offset:6504*0 + 3*632*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6504*0 + 3*632*FLEN/8, x4, x1, x2)

inst_2169:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf600001f; valaddr_reg:x3; val_offset:6507*0 + 3*633*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6507*0 + 3*633*FLEN/8, x4, x1, x2)

inst_2170:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf600003f; valaddr_reg:x3; val_offset:6510*0 + 3*634*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6510*0 + 3*634*FLEN/8, x4, x1, x2)

inst_2171:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf600007f; valaddr_reg:x3; val_offset:6513*0 + 3*635*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6513*0 + 3*635*FLEN/8, x4, x1, x2)

inst_2172:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf60000ff; valaddr_reg:x3; val_offset:6516*0 + 3*636*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6516*0 + 3*636*FLEN/8, x4, x1, x2)

inst_2173:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf60001ff; valaddr_reg:x3; val_offset:6519*0 + 3*637*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6519*0 + 3*637*FLEN/8, x4, x1, x2)

inst_2174:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf60003ff; valaddr_reg:x3; val_offset:6522*0 + 3*638*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6522*0 + 3*638*FLEN/8, x4, x1, x2)

inst_2175:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf60007ff; valaddr_reg:x3; val_offset:6525*0 + 3*639*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6525*0 + 3*639*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_6)

inst_2176:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf6000fff; valaddr_reg:x3; val_offset:6528*0 + 3*640*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6528*0 + 3*640*FLEN/8, x4, x1, x2)

inst_2177:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf6001fff; valaddr_reg:x3; val_offset:6531*0 + 3*641*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6531*0 + 3*641*FLEN/8, x4, x1, x2)

inst_2178:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf6003fff; valaddr_reg:x3; val_offset:6534*0 + 3*642*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6534*0 + 3*642*FLEN/8, x4, x1, x2)

inst_2179:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf6007fff; valaddr_reg:x3; val_offset:6537*0 + 3*643*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6537*0 + 3*643*FLEN/8, x4, x1, x2)

inst_2180:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf600ffff; valaddr_reg:x3; val_offset:6540*0 + 3*644*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6540*0 + 3*644*FLEN/8, x4, x1, x2)

inst_2181:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf601ffff; valaddr_reg:x3; val_offset:6543*0 + 3*645*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6543*0 + 3*645*FLEN/8, x4, x1, x2)

inst_2182:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf603ffff; valaddr_reg:x3; val_offset:6546*0 + 3*646*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6546*0 + 3*646*FLEN/8, x4, x1, x2)

inst_2183:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf607ffff; valaddr_reg:x3; val_offset:6549*0 + 3*647*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6549*0 + 3*647*FLEN/8, x4, x1, x2)

inst_2184:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf60fffff; valaddr_reg:x3; val_offset:6552*0 + 3*648*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6552*0 + 3*648*FLEN/8, x4, x1, x2)

inst_2185:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf61fffff; valaddr_reg:x3; val_offset:6555*0 + 3*649*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6555*0 + 3*649*FLEN/8, x4, x1, x2)

inst_2186:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf63fffff; valaddr_reg:x3; val_offset:6558*0 + 3*650*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6558*0 + 3*650*FLEN/8, x4, x1, x2)

inst_2187:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf6400000; valaddr_reg:x3; val_offset:6561*0 + 3*651*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6561*0 + 3*651*FLEN/8, x4, x1, x2)

inst_2188:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf6600000; valaddr_reg:x3; val_offset:6564*0 + 3*652*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6564*0 + 3*652*FLEN/8, x4, x1, x2)

inst_2189:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf6700000; valaddr_reg:x3; val_offset:6567*0 + 3*653*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6567*0 + 3*653*FLEN/8, x4, x1, x2)

inst_2190:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf6780000; valaddr_reg:x3; val_offset:6570*0 + 3*654*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6570*0 + 3*654*FLEN/8, x4, x1, x2)

inst_2191:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf67c0000; valaddr_reg:x3; val_offset:6573*0 + 3*655*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6573*0 + 3*655*FLEN/8, x4, x1, x2)

inst_2192:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf67e0000; valaddr_reg:x3; val_offset:6576*0 + 3*656*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6576*0 + 3*656*FLEN/8, x4, x1, x2)

inst_2193:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf67f0000; valaddr_reg:x3; val_offset:6579*0 + 3*657*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6579*0 + 3*657*FLEN/8, x4, x1, x2)

inst_2194:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf67f8000; valaddr_reg:x3; val_offset:6582*0 + 3*658*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6582*0 + 3*658*FLEN/8, x4, x1, x2)

inst_2195:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf67fc000; valaddr_reg:x3; val_offset:6585*0 + 3*659*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6585*0 + 3*659*FLEN/8, x4, x1, x2)

inst_2196:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf67fe000; valaddr_reg:x3; val_offset:6588*0 + 3*660*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6588*0 + 3*660*FLEN/8, x4, x1, x2)

inst_2197:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf67ff000; valaddr_reg:x3; val_offset:6591*0 + 3*661*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6591*0 + 3*661*FLEN/8, x4, x1, x2)

inst_2198:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf67ff800; valaddr_reg:x3; val_offset:6594*0 + 3*662*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6594*0 + 3*662*FLEN/8, x4, x1, x2)

inst_2199:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf67ffc00; valaddr_reg:x3; val_offset:6597*0 + 3*663*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6597*0 + 3*663*FLEN/8, x4, x1, x2)

inst_2200:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf67ffe00; valaddr_reg:x3; val_offset:6600*0 + 3*664*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6600*0 + 3*664*FLEN/8, x4, x1, x2)

inst_2201:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf67fff00; valaddr_reg:x3; val_offset:6603*0 + 3*665*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6603*0 + 3*665*FLEN/8, x4, x1, x2)

inst_2202:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf67fff80; valaddr_reg:x3; val_offset:6606*0 + 3*666*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6606*0 + 3*666*FLEN/8, x4, x1, x2)

inst_2203:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf67fffc0; valaddr_reg:x3; val_offset:6609*0 + 3*667*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6609*0 + 3*667*FLEN/8, x4, x1, x2)

inst_2204:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf67fffe0; valaddr_reg:x3; val_offset:6612*0 + 3*668*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6612*0 + 3*668*FLEN/8, x4, x1, x2)

inst_2205:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf67ffff0; valaddr_reg:x3; val_offset:6615*0 + 3*669*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6615*0 + 3*669*FLEN/8, x4, x1, x2)

inst_2206:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf67ffff8; valaddr_reg:x3; val_offset:6618*0 + 3*670*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6618*0 + 3*670*FLEN/8, x4, x1, x2)

inst_2207:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf67ffffc; valaddr_reg:x3; val_offset:6621*0 + 3*671*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6621*0 + 3*671*FLEN/8, x4, x1, x2)

inst_2208:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf67ffffe; valaddr_reg:x3; val_offset:6624*0 + 3*672*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6624*0 + 3*672*FLEN/8, x4, x1, x2)

inst_2209:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xf67fffff; valaddr_reg:x3; val_offset:6627*0 + 3*673*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6627*0 + 3*673*FLEN/8, x4, x1, x2)

inst_2210:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xff000001; valaddr_reg:x3; val_offset:6630*0 + 3*674*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6630*0 + 3*674*FLEN/8, x4, x1, x2)

inst_2211:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xff000003; valaddr_reg:x3; val_offset:6633*0 + 3*675*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6633*0 + 3*675*FLEN/8, x4, x1, x2)

inst_2212:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xff000007; valaddr_reg:x3; val_offset:6636*0 + 3*676*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6636*0 + 3*676*FLEN/8, x4, x1, x2)

inst_2213:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xff199999; valaddr_reg:x3; val_offset:6639*0 + 3*677*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6639*0 + 3*677*FLEN/8, x4, x1, x2)

inst_2214:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xff249249; valaddr_reg:x3; val_offset:6642*0 + 3*678*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6642*0 + 3*678*FLEN/8, x4, x1, x2)

inst_2215:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xff333333; valaddr_reg:x3; val_offset:6645*0 + 3*679*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6645*0 + 3*679*FLEN/8, x4, x1, x2)

inst_2216:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xff36db6d; valaddr_reg:x3; val_offset:6648*0 + 3*680*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6648*0 + 3*680*FLEN/8, x4, x1, x2)

inst_2217:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:6651*0 + 3*681*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6651*0 + 3*681*FLEN/8, x4, x1, x2)

inst_2218:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xff444444; valaddr_reg:x3; val_offset:6654*0 + 3*682*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6654*0 + 3*682*FLEN/8, x4, x1, x2)

inst_2219:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xff4ccccc; valaddr_reg:x3; val_offset:6657*0 + 3*683*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6657*0 + 3*683*FLEN/8, x4, x1, x2)

inst_2220:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xff5b6db6; valaddr_reg:x3; val_offset:6660*0 + 3*684*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6660*0 + 3*684*FLEN/8, x4, x1, x2)

inst_2221:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xff666666; valaddr_reg:x3; val_offset:6663*0 + 3*685*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6663*0 + 3*685*FLEN/8, x4, x1, x2)

inst_2222:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xff6db6db; valaddr_reg:x3; val_offset:6666*0 + 3*686*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6666*0 + 3*686*FLEN/8, x4, x1, x2)

inst_2223:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xff7ffff8; valaddr_reg:x3; val_offset:6669*0 + 3*687*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6669*0 + 3*687*FLEN/8, x4, x1, x2)

inst_2224:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xff7ffffc; valaddr_reg:x3; val_offset:6672*0 + 3*688*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6672*0 + 3*688*FLEN/8, x4, x1, x2)

inst_2225:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3773f1 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x329e38 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3773f1; op2val:0xc1b29e38;
op3val:0xff7ffffe; valaddr_reg:x3; val_offset:6675*0 + 3*689*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6675*0 + 3*689*FLEN/8, x4, x1, x2)

inst_2226:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x35800000; valaddr_reg:x3; val_offset:6678*0 + 3*690*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6678*0 + 3*690*FLEN/8, x4, x1, x2)

inst_2227:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x35800001; valaddr_reg:x3; val_offset:6681*0 + 3*691*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6681*0 + 3*691*FLEN/8, x4, x1, x2)

inst_2228:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x35800003; valaddr_reg:x3; val_offset:6684*0 + 3*692*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6684*0 + 3*692*FLEN/8, x4, x1, x2)

inst_2229:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x35800007; valaddr_reg:x3; val_offset:6687*0 + 3*693*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6687*0 + 3*693*FLEN/8, x4, x1, x2)

inst_2230:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x3580000f; valaddr_reg:x3; val_offset:6690*0 + 3*694*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6690*0 + 3*694*FLEN/8, x4, x1, x2)

inst_2231:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x3580001f; valaddr_reg:x3; val_offset:6693*0 + 3*695*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6693*0 + 3*695*FLEN/8, x4, x1, x2)

inst_2232:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x3580003f; valaddr_reg:x3; val_offset:6696*0 + 3*696*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6696*0 + 3*696*FLEN/8, x4, x1, x2)

inst_2233:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x3580007f; valaddr_reg:x3; val_offset:6699*0 + 3*697*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6699*0 + 3*697*FLEN/8, x4, x1, x2)

inst_2234:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x358000ff; valaddr_reg:x3; val_offset:6702*0 + 3*698*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6702*0 + 3*698*FLEN/8, x4, x1, x2)

inst_2235:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x358001ff; valaddr_reg:x3; val_offset:6705*0 + 3*699*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6705*0 + 3*699*FLEN/8, x4, x1, x2)

inst_2236:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x358003ff; valaddr_reg:x3; val_offset:6708*0 + 3*700*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6708*0 + 3*700*FLEN/8, x4, x1, x2)

inst_2237:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x358007ff; valaddr_reg:x3; val_offset:6711*0 + 3*701*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6711*0 + 3*701*FLEN/8, x4, x1, x2)

inst_2238:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x35800fff; valaddr_reg:x3; val_offset:6714*0 + 3*702*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6714*0 + 3*702*FLEN/8, x4, x1, x2)

inst_2239:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x35801fff; valaddr_reg:x3; val_offset:6717*0 + 3*703*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6717*0 + 3*703*FLEN/8, x4, x1, x2)

inst_2240:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x35803fff; valaddr_reg:x3; val_offset:6720*0 + 3*704*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6720*0 + 3*704*FLEN/8, x4, x1, x2)

inst_2241:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x35807fff; valaddr_reg:x3; val_offset:6723*0 + 3*705*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6723*0 + 3*705*FLEN/8, x4, x1, x2)

inst_2242:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x3580ffff; valaddr_reg:x3; val_offset:6726*0 + 3*706*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6726*0 + 3*706*FLEN/8, x4, x1, x2)

inst_2243:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x3581ffff; valaddr_reg:x3; val_offset:6729*0 + 3*707*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6729*0 + 3*707*FLEN/8, x4, x1, x2)

inst_2244:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x3583ffff; valaddr_reg:x3; val_offset:6732*0 + 3*708*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6732*0 + 3*708*FLEN/8, x4, x1, x2)

inst_2245:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x3587ffff; valaddr_reg:x3; val_offset:6735*0 + 3*709*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6735*0 + 3*709*FLEN/8, x4, x1, x2)

inst_2246:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x358fffff; valaddr_reg:x3; val_offset:6738*0 + 3*710*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6738*0 + 3*710*FLEN/8, x4, x1, x2)

inst_2247:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x359fffff; valaddr_reg:x3; val_offset:6741*0 + 3*711*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6741*0 + 3*711*FLEN/8, x4, x1, x2)

inst_2248:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x35bfffff; valaddr_reg:x3; val_offset:6744*0 + 3*712*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6744*0 + 3*712*FLEN/8, x4, x1, x2)

inst_2249:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x35c00000; valaddr_reg:x3; val_offset:6747*0 + 3*713*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6747*0 + 3*713*FLEN/8, x4, x1, x2)

inst_2250:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x35e00000; valaddr_reg:x3; val_offset:6750*0 + 3*714*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6750*0 + 3*714*FLEN/8, x4, x1, x2)

inst_2251:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x35f00000; valaddr_reg:x3; val_offset:6753*0 + 3*715*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6753*0 + 3*715*FLEN/8, x4, x1, x2)

inst_2252:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x35f80000; valaddr_reg:x3; val_offset:6756*0 + 3*716*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6756*0 + 3*716*FLEN/8, x4, x1, x2)

inst_2253:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x35fc0000; valaddr_reg:x3; val_offset:6759*0 + 3*717*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6759*0 + 3*717*FLEN/8, x4, x1, x2)

inst_2254:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x35fe0000; valaddr_reg:x3; val_offset:6762*0 + 3*718*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6762*0 + 3*718*FLEN/8, x4, x1, x2)

inst_2255:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x35ff0000; valaddr_reg:x3; val_offset:6765*0 + 3*719*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6765*0 + 3*719*FLEN/8, x4, x1, x2)

inst_2256:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x35ff8000; valaddr_reg:x3; val_offset:6768*0 + 3*720*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6768*0 + 3*720*FLEN/8, x4, x1, x2)

inst_2257:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x35ffc000; valaddr_reg:x3; val_offset:6771*0 + 3*721*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6771*0 + 3*721*FLEN/8, x4, x1, x2)

inst_2258:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x35ffe000; valaddr_reg:x3; val_offset:6774*0 + 3*722*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6774*0 + 3*722*FLEN/8, x4, x1, x2)

inst_2259:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x35fff000; valaddr_reg:x3; val_offset:6777*0 + 3*723*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6777*0 + 3*723*FLEN/8, x4, x1, x2)

inst_2260:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x35fff800; valaddr_reg:x3; val_offset:6780*0 + 3*724*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6780*0 + 3*724*FLEN/8, x4, x1, x2)

inst_2261:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x35fffc00; valaddr_reg:x3; val_offset:6783*0 + 3*725*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6783*0 + 3*725*FLEN/8, x4, x1, x2)

inst_2262:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x35fffe00; valaddr_reg:x3; val_offset:6786*0 + 3*726*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6786*0 + 3*726*FLEN/8, x4, x1, x2)

inst_2263:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x35ffff00; valaddr_reg:x3; val_offset:6789*0 + 3*727*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6789*0 + 3*727*FLEN/8, x4, x1, x2)

inst_2264:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x35ffff80; valaddr_reg:x3; val_offset:6792*0 + 3*728*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6792*0 + 3*728*FLEN/8, x4, x1, x2)

inst_2265:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x35ffffc0; valaddr_reg:x3; val_offset:6795*0 + 3*729*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6795*0 + 3*729*FLEN/8, x4, x1, x2)

inst_2266:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x35ffffe0; valaddr_reg:x3; val_offset:6798*0 + 3*730*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6798*0 + 3*730*FLEN/8, x4, x1, x2)

inst_2267:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x35fffff0; valaddr_reg:x3; val_offset:6801*0 + 3*731*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6801*0 + 3*731*FLEN/8, x4, x1, x2)

inst_2268:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x35fffff8; valaddr_reg:x3; val_offset:6804*0 + 3*732*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6804*0 + 3*732*FLEN/8, x4, x1, x2)

inst_2269:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x35fffffc; valaddr_reg:x3; val_offset:6807*0 + 3*733*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6807*0 + 3*733*FLEN/8, x4, x1, x2)

inst_2270:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x35fffffe; valaddr_reg:x3; val_offset:6810*0 + 3*734*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6810*0 + 3*734*FLEN/8, x4, x1, x2)

inst_2271:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x35ffffff; valaddr_reg:x3; val_offset:6813*0 + 3*735*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6813*0 + 3*735*FLEN/8, x4, x1, x2)

inst_2272:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x3f800001; valaddr_reg:x3; val_offset:6816*0 + 3*736*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6816*0 + 3*736*FLEN/8, x4, x1, x2)

inst_2273:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x3f800003; valaddr_reg:x3; val_offset:6819*0 + 3*737*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6819*0 + 3*737*FLEN/8, x4, x1, x2)

inst_2274:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x3f800007; valaddr_reg:x3; val_offset:6822*0 + 3*738*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6822*0 + 3*738*FLEN/8, x4, x1, x2)

inst_2275:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x3f999999; valaddr_reg:x3; val_offset:6825*0 + 3*739*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6825*0 + 3*739*FLEN/8, x4, x1, x2)

inst_2276:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x3fa49249; valaddr_reg:x3; val_offset:6828*0 + 3*740*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6828*0 + 3*740*FLEN/8, x4, x1, x2)

inst_2277:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x3fb33333; valaddr_reg:x3; val_offset:6831*0 + 3*741*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6831*0 + 3*741*FLEN/8, x4, x1, x2)

inst_2278:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:6834*0 + 3*742*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6834*0 + 3*742*FLEN/8, x4, x1, x2)

inst_2279:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:6837*0 + 3*743*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6837*0 + 3*743*FLEN/8, x4, x1, x2)

inst_2280:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x3fc44444; valaddr_reg:x3; val_offset:6840*0 + 3*744*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6840*0 + 3*744*FLEN/8, x4, x1, x2)

inst_2281:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x3fcccccc; valaddr_reg:x3; val_offset:6843*0 + 3*745*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6843*0 + 3*745*FLEN/8, x4, x1, x2)

inst_2282:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:6846*0 + 3*746*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6846*0 + 3*746*FLEN/8, x4, x1, x2)

inst_2283:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x3fe66666; valaddr_reg:x3; val_offset:6849*0 + 3*747*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6849*0 + 3*747*FLEN/8, x4, x1, x2)

inst_2284:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x3fedb6db; valaddr_reg:x3; val_offset:6852*0 + 3*748*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6852*0 + 3*748*FLEN/8, x4, x1, x2)

inst_2285:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x3ffffff8; valaddr_reg:x3; val_offset:6855*0 + 3*749*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6855*0 + 3*749*FLEN/8, x4, x1, x2)

inst_2286:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x3ffffffc; valaddr_reg:x3; val_offset:6858*0 + 3*750*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6858*0 + 3*750*FLEN/8, x4, x1, x2)

inst_2287:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x38913b and fs2 == 0 and fe2 == 0x03 and fm2 == 0x318a20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d38913b; op2val:0x1b18a20;
op3val:0x3ffffffe; valaddr_reg:x3; val_offset:6861*0 + 3*751*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6861*0 + 3*751*FLEN/8, x4, x1, x2)

inst_2288:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3a1788 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x3015c3 and fs3 == 0 and fe3 == 0x73 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3a1788; op2val:0x1b015c3;
op3val:0x39800000; valaddr_reg:x3; val_offset:6864*0 + 3*752*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6864*0 + 3*752*FLEN/8, x4, x1, x2)

inst_2289:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3a1788 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x3015c3 and fs3 == 0 and fe3 == 0x73 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3a1788; op2val:0x1b015c3;
op3val:0x39800001; valaddr_reg:x3; val_offset:6867*0 + 3*753*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6867*0 + 3*753*FLEN/8, x4, x1, x2)

inst_2290:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3a1788 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x3015c3 and fs3 == 0 and fe3 == 0x73 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3a1788; op2val:0x1b015c3;
op3val:0x39800003; valaddr_reg:x3; val_offset:6870*0 + 3*754*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6870*0 + 3*754*FLEN/8, x4, x1, x2)

inst_2291:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3a1788 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x3015c3 and fs3 == 0 and fe3 == 0x73 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3a1788; op2val:0x1b015c3;
op3val:0x39800007; valaddr_reg:x3; val_offset:6873*0 + 3*755*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6873*0 + 3*755*FLEN/8, x4, x1, x2)

inst_2292:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3a1788 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x3015c3 and fs3 == 0 and fe3 == 0x73 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3a1788; op2val:0x1b015c3;
op3val:0x3980000f; valaddr_reg:x3; val_offset:6876*0 + 3*756*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6876*0 + 3*756*FLEN/8, x4, x1, x2)

inst_2293:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3a1788 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x3015c3 and fs3 == 0 and fe3 == 0x73 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3a1788; op2val:0x1b015c3;
op3val:0x3980001f; valaddr_reg:x3; val_offset:6879*0 + 3*757*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6879*0 + 3*757*FLEN/8, x4, x1, x2)

inst_2294:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3a1788 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x3015c3 and fs3 == 0 and fe3 == 0x73 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3a1788; op2val:0x1b015c3;
op3val:0x3980003f; valaddr_reg:x3; val_offset:6882*0 + 3*758*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6882*0 + 3*758*FLEN/8, x4, x1, x2)

inst_2295:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3a1788 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x3015c3 and fs3 == 0 and fe3 == 0x73 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3a1788; op2val:0x1b015c3;
op3val:0x3980007f; valaddr_reg:x3; val_offset:6885*0 + 3*759*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6885*0 + 3*759*FLEN/8, x4, x1, x2)

inst_2296:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3a1788 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x3015c3 and fs3 == 0 and fe3 == 0x73 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3a1788; op2val:0x1b015c3;
op3val:0x398000ff; valaddr_reg:x3; val_offset:6888*0 + 3*760*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6888*0 + 3*760*FLEN/8, x4, x1, x2)

inst_2297:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3a1788 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x3015c3 and fs3 == 0 and fe3 == 0x73 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3a1788; op2val:0x1b015c3;
op3val:0x398001ff; valaddr_reg:x3; val_offset:6891*0 + 3*761*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6891*0 + 3*761*FLEN/8, x4, x1, x2)

inst_2298:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3a1788 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x3015c3 and fs3 == 0 and fe3 == 0x73 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3a1788; op2val:0x1b015c3;
op3val:0x398003ff; valaddr_reg:x3; val_offset:6894*0 + 3*762*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6894*0 + 3*762*FLEN/8, x4, x1, x2)

inst_2299:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3a1788 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x3015c3 and fs3 == 0 and fe3 == 0x73 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3a1788; op2val:0x1b015c3;
op3val:0x398007ff; valaddr_reg:x3; val_offset:6897*0 + 3*763*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6897*0 + 3*763*FLEN/8, x4, x1, x2)

inst_2300:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3a1788 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x3015c3 and fs3 == 0 and fe3 == 0x73 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3a1788; op2val:0x1b015c3;
op3val:0x39800fff; valaddr_reg:x3; val_offset:6900*0 + 3*764*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6900*0 + 3*764*FLEN/8, x4, x1, x2)

inst_2301:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3a1788 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x3015c3 and fs3 == 0 and fe3 == 0x73 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3a1788; op2val:0x1b015c3;
op3val:0x39801fff; valaddr_reg:x3; val_offset:6903*0 + 3*765*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6903*0 + 3*765*FLEN/8, x4, x1, x2)

inst_2302:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3a1788 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x3015c3 and fs3 == 0 and fe3 == 0x73 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3a1788; op2val:0x1b015c3;
op3val:0x39803fff; valaddr_reg:x3; val_offset:6906*0 + 3*766*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6906*0 + 3*766*FLEN/8, x4, x1, x2)

inst_2303:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3a1788 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x3015c3 and fs3 == 0 and fe3 == 0x73 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3a1788; op2val:0x1b015c3;
op3val:0x39807fff; valaddr_reg:x3; val_offset:6909*0 + 3*767*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6909*0 + 3*767*FLEN/8, x4, x1, x2)
#endif


RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(0x7d015d4c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8effff80,32,FLEN)
NAN_BOXED(0x7d015d4c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8effffc0,32,FLEN)
NAN_BOXED(0x7d015d4c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8effffe0,32,FLEN)
NAN_BOXED(0x7d015d4c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8efffff0,32,FLEN)
NAN_BOXED(0x7d015d4c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8efffff8,32,FLEN)
NAN_BOXED(0x7d015d4c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8efffffc,32,FLEN)
NAN_BOXED(0x7d015d4c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8efffffe,32,FLEN)
NAN_BOXED(0x7d015d4c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8effffff,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x28000000,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x28000001,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x28000003,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x28000007,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x2800000f,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x2800001f,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x2800003f,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x2800007f,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x280000ff,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x280001ff,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x280003ff,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x280007ff,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x28000fff,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x28001fff,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x28003fff,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x28007fff,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x2800ffff,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x2801ffff,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x2803ffff,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x2807ffff,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x280fffff,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x281fffff,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x283fffff,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x28400000,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x28600000,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x28700000,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x28780000,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x287c0000,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x287e0000,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x287f0000,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x287f8000,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x287fc000,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x287fe000,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x287ff000,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x287ff800,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x287ffc00,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x287ffe00,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x287fff00,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x287fff80,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x287fffc0,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x287fffe0,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x287ffff0,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x287ffff8,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x287ffffc,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x287ffffe,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x287fffff,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x3f800001,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x3f800003,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x3f800007,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x3f999999,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x3fa49249,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x3fb33333,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x3fb6db6d,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x3fbbbbbb,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x3fc44444,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x3fcccccc,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x3fdb6db6,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x3fe66666,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x3fedb6db,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x3ffffff8,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x3ffffffc,32,FLEN)
NAN_BOXED(0x7d025ce3,32,FLEN)
NAN_BOXED(0x1fb5c26,32,FLEN)
NAN_BOXED(0x3ffffffe,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe4800000,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe4800001,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe4800003,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe4800007,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe480000f,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe480001f,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe480003f,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe480007f,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe48000ff,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe48001ff,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe48003ff,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe48007ff,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe4800fff,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe4801fff,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe4803fff,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe4807fff,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe480ffff,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe481ffff,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe483ffff,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe487ffff,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe48fffff,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe49fffff,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe4bfffff,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe4c00000,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe4e00000,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe4f00000,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe4f80000,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe4fc0000,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe4fe0000,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe4ff0000,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe4ff8000,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe4ffc000,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe4ffe000,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe4fff000,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe4fff800,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe4fffc00,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe4fffe00,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe4ffff00,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe4ffff80,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe4ffffc0,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe4ffffe0,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe4fffff0,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe4fffff8,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe4fffffc,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe4fffffe,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xe4ffffff,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xff000001,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xff000003,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xff000007,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xff199999,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xff249249,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xff333333,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xff36db6d,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xff3bbbbb,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xff444444,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xff4ccccc,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xff5b6db6,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xff666666,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xff6db6db,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xff7ffff8,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xff7ffffc,32,FLEN)
NAN_BOXED(0x7d032ddf,32,FLEN)
NAN_BOXED(0xc1f9cbb3,32,FLEN)
NAN_BOXED(0xff7ffffe,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x199999,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x249249,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x333333,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x36db6d,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3bbbbb,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x444444,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ccccc,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5b6db6,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x666666,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6db6db,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff8,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffc,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffe,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa800000,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa800001,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa800003,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa800007,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa80000f,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa80001f,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa80003f,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa80007f,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa8000ff,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa8001ff,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa8003ff,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa8007ff,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa800fff,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa801fff,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa803fff,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa807fff,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa80ffff,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa81ffff,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa83ffff,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa87ffff,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa8fffff,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa9fffff,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xabfffff,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xac00000,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xae00000,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xaf00000,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xaf80000,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xafc0000,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xafe0000,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xaff0000,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xaff8000,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xaffc000,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xaffe000,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xafff000,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xafff800,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xafffc00,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xafffe00,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xaffff00,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xaffff80,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xaffffc0,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xaffffe0,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xafffff0,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xafffff8,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xafffffc,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xafffffe,32,FLEN)
NAN_BOXED(0x7d0372a9,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xaffffff,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1f800000,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1f800001,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1f800003,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1f800007,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1f80000f,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1f80001f,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1f80003f,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1f80007f,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1f8000ff,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1f8001ff,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1f8003ff,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1f8007ff,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1f800fff,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1f801fff,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1f803fff,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1f807fff,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1f80ffff,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1f81ffff,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1f83ffff,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1f87ffff,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1f8fffff,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1f9fffff,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1fbfffff,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1fc00000,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1fe00000,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1ff00000,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1ff80000,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1ffc0000,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1ffe0000,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1fff0000,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1fff8000,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1fffc000,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1fffe000,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1ffff000,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1ffff800,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1ffffc00,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1ffffe00,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1fffff00,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1fffff80,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1fffffc0,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1fffffe0,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1ffffff0,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1ffffff8,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1ffffffc,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1ffffffe,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x1fffffff,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x3f800001,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x3f800003,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x3f800007,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x3f999999,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x3fa49249,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x3fb33333,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x3fb6db6d,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x3fbbbbbb,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x3fc44444,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x3fcccccc,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x3fdb6db6,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x3fe66666,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x3fedb6db,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x3ffffff8,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x3ffffffc,32,FLEN)
NAN_BOXED(0x7d07c07a,32,FLEN)
NAN_BOXED(0x1f161af,32,FLEN)
NAN_BOXED(0x3ffffffe,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x20800000,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x20800001,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x20800003,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x20800007,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x2080000f,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x2080001f,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x2080003f,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x2080007f,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x208000ff,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x208001ff,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x208003ff,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x208007ff,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x20800fff,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x20801fff,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x20803fff,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x20807fff,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x2080ffff,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x2081ffff,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x2083ffff,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x2087ffff,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x208fffff,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x209fffff,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x20bfffff,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x20c00000,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x20e00000,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x20f00000,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x20f80000,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x20fc0000,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x20fe0000,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x20ff0000,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x20ff8000,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x20ffc000,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x20ffe000,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x20fff000,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x20fff800,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x20fffc00,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x20fffe00,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x20ffff00,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x20ffff80,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x20ffffc0,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x20ffffe0,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x20fffff0,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x20fffff8,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x20fffffc,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x20fffffe,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x20ffffff,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x3f800001,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x3f800003,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x3f800007,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x3f999999,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x3fa49249,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x3fb33333,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x3fb6db6d,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x3fbbbbbb,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x3fc44444,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x3fcccccc,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x3fdb6db6,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x3fe66666,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x3fedb6db,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x3ffffff8,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x3ffffffc,32,FLEN)
NAN_BOXED(0x7d0a0e71,32,FLEN)
NAN_BOXED(0x1ed5a2b,32,FLEN)
NAN_BOXED(0x3ffffffe,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad000000,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad000001,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad000003,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad000007,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad00000f,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad00001f,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad00003f,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad00007f,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad0000ff,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad0001ff,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad0003ff,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad0007ff,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad000fff,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad001fff,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad003fff,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad007fff,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad00ffff,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad01ffff,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad03ffff,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad07ffff,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad0fffff,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad1fffff,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad3fffff,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad400000,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad600000,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad700000,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad780000,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad7c0000,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad7e0000,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad7f0000,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad7f8000,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad7fc000,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad7fe000,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad7ff000,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad7ff800,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad7ffc00,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad7ffe00,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad7fff00,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad7fff80,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad7fffc0,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad7fffe0,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad7ffff0,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad7ffff8,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad7ffffc,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad7ffffe,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xad7fffff,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7d0a79d8,32,FLEN)
NAN_BOXED(0x81eca215,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbd800000,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbd800001,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbd800003,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbd800007,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbd80000f,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbd80001f,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbd80003f,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbd80007f,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbd8000ff,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbd8001ff,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbd8003ff,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbd8007ff,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbd800fff,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbd801fff,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbd803fff,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbd807fff,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbd80ffff,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbd81ffff,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbd83ffff,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbd87ffff,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbd8fffff,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbd9fffff,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbdbfffff,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbdc00000,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbde00000,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbdf00000,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbdf80000,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbdfc0000,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbdfe0000,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbdff0000,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbdff8000,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbdffc000,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbdffe000,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbdfff000,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbdfff800,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbdfffc00,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbdfffe00,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbdffff00,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbdffff80,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbdffffc0,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbdffffe0,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbdfffff0,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbdfffff8,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbdfffffc,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbdfffffe,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbdffffff,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7d196401,32,FLEN)
NAN_BOXED(0x81d59fdf,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf8800000,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf8800001,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
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NAN_BOXED(0xc1d0ace0,32,FLEN)
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NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf880001f,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf880003f,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf880007f,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf88000ff,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf88001ff,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf88003ff,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf88007ff,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf8800fff,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf8801fff,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf8803fff,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf8807fff,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf880ffff,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf881ffff,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf883ffff,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf887ffff,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf88fffff,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf89fffff,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf8bfffff,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf8c00000,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf8e00000,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf8f00000,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf8f80000,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf8fc0000,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf8fe0000,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf8ff0000,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf8ff8000,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf8ffc000,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf8ffe000,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf8fff000,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf8fff800,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf8fffc00,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf8fffe00,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf8ffff00,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf8ffff80,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf8ffffc0,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf8ffffe0,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf8fffff0,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf8fffff8,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf8fffffc,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf8fffffe,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xf8ffffff,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xff000001,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xff000003,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xff000007,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xff199999,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xff249249,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xff333333,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xff36db6d,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xff3bbbbb,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xff444444,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xff4ccccc,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xff5b6db6,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xff666666,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xff6db6db,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xff7ffff8,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xff7ffffc,32,FLEN)
NAN_BOXED(0x7d1d0754,32,FLEN)
NAN_BOXED(0xc1d0ace0,32,FLEN)
NAN_BOXED(0xff7ffffe,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfe800000,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfe800001,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfe800003,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfe800007,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfe80000f,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfe80001f,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfe80003f,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfe80007f,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfe8000ff,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfe8001ff,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfe8003ff,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfe8007ff,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfe800fff,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfe801fff,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfe803fff,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfe807fff,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfe80ffff,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfe81ffff,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfe83ffff,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfe87ffff,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfe8fffff,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfe9fffff,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfebfffff,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfec00000,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfee00000,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfef00000,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfef80000,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfefc0000,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfefe0000,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfeff0000,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfeff8000,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfeffc000,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfeffe000,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfefff000,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfefff800,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfefffc00,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfefffe00,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfeffff00,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfeffff80,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfeffffc0,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfeffffe0,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfefffff0,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfefffff8,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfefffffc,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfefffffe,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xfeffffff,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xff000001,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xff000003,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xff000007,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xff199999,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xff249249,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xff333333,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xff36db6d,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xff3bbbbb,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xff444444,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xff4ccccc,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xff5b6db6,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xff666666,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xff6db6db,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xff7ffff8,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xff7ffffc,32,FLEN)
NAN_BOXED(0x7d1f68e8,32,FLEN)
NAN_BOXED(0xc1cd8ee8,32,FLEN)
NAN_BOXED(0xff7ffffe,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc1800000,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc1800001,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc1800003,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc1800007,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc180000f,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc180001f,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc180003f,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc180007f,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc18000ff,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc18001ff,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc18003ff,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc18007ff,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc1800fff,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc1801fff,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc1803fff,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc1807fff,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc180ffff,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc181ffff,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc183ffff,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc187ffff,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc18fffff,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc19fffff,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc1bfffff,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc1c00000,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc1e00000,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc1f00000,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc1f80000,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc1fc0000,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc1fe0000,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc1ff0000,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc1ff8000,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc1ffc000,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc1ffe000,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc1fff000,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc1fff800,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc1fffc00,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc1fffe00,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc1ffff00,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc1ffff80,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc1ffffc0,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc1ffffe0,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc1fffff0,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc1fffff8,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc1fffffc,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc1fffffe,32,FLEN)
NAN_BOXED(0x7d2872e3,32,FLEN)
NAN_BOXED(0x81c28729,32,FLEN)
NAN_BOXED(0xc1ffffff,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf6000000,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf6000001,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf6000003,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf6000007,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf600000f,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf600001f,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf600003f,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf600007f,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf60000ff,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf60001ff,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf60003ff,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf60007ff,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf6000fff,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf6001fff,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf6003fff,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf6007fff,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf600ffff,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf601ffff,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf603ffff,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf607ffff,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf60fffff,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf61fffff,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf63fffff,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf6400000,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf6600000,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf6700000,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf6780000,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf67c0000,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf67e0000,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf67f0000,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf67f8000,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf67fc000,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf67fe000,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf67ff000,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf67ff800,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf67ffc00,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf67ffe00,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf67fff00,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf67fff80,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf67fffc0,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf67fffe0,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf67ffff0,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf67ffff8,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf67ffffc,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf67ffffe,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xf67fffff,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xff000001,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xff000003,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xff000007,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xff199999,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xff249249,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xff333333,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xff36db6d,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xff3bbbbb,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xff444444,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xff4ccccc,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xff5b6db6,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xff666666,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xff6db6db,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xff7ffff8,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xff7ffffc,32,FLEN)
NAN_BOXED(0x7d3773f1,32,FLEN)
NAN_BOXED(0xc1b29e38,32,FLEN)
NAN_BOXED(0xff7ffffe,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x35800000,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x35800001,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x35800003,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x35800007,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x3580000f,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x3580001f,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x3580003f,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x3580007f,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x358000ff,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x358001ff,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x358003ff,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x358007ff,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x35800fff,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x35801fff,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x35803fff,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x35807fff,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x3580ffff,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x3581ffff,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x3583ffff,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x3587ffff,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x358fffff,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x359fffff,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x35bfffff,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x35c00000,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x35e00000,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x35f00000,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x35f80000,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x35fc0000,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x35fe0000,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x35ff0000,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x35ff8000,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x35ffc000,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x35ffe000,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x35fff000,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x35fff800,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x35fffc00,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x35fffe00,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x35ffff00,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x35ffff80,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x35ffffc0,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x35ffffe0,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x35fffff0,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x35fffff8,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x35fffffc,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x35fffffe,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x35ffffff,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x3f800001,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x3f800003,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x3f800007,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x3f999999,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x3fa49249,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x3fb33333,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x3fb6db6d,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x3fbbbbbb,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x3fc44444,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x3fcccccc,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x3fdb6db6,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x3fe66666,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x3fedb6db,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x3ffffff8,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x3ffffffc,32,FLEN)
NAN_BOXED(0x7d38913b,32,FLEN)
NAN_BOXED(0x1b18a20,32,FLEN)
NAN_BOXED(0x3ffffffe,32,FLEN)
NAN_BOXED(0x7d3a1788,32,FLEN)
NAN_BOXED(0x1b015c3,32,FLEN)
NAN_BOXED(0x39800000,32,FLEN)
NAN_BOXED(0x7d3a1788,32,FLEN)
NAN_BOXED(0x1b015c3,32,FLEN)
NAN_BOXED(0x39800001,32,FLEN)
NAN_BOXED(0x7d3a1788,32,FLEN)
NAN_BOXED(0x1b015c3,32,FLEN)
NAN_BOXED(0x39800003,32,FLEN)
NAN_BOXED(0x7d3a1788,32,FLEN)
NAN_BOXED(0x1b015c3,32,FLEN)
NAN_BOXED(0x39800007,32,FLEN)
NAN_BOXED(0x7d3a1788,32,FLEN)
NAN_BOXED(0x1b015c3,32,FLEN)
NAN_BOXED(0x3980000f,32,FLEN)
NAN_BOXED(0x7d3a1788,32,FLEN)
NAN_BOXED(0x1b015c3,32,FLEN)
NAN_BOXED(0x3980001f,32,FLEN)
NAN_BOXED(0x7d3a1788,32,FLEN)
NAN_BOXED(0x1b015c3,32,FLEN)
NAN_BOXED(0x3980003f,32,FLEN)
NAN_BOXED(0x7d3a1788,32,FLEN)
NAN_BOXED(0x1b015c3,32,FLEN)
NAN_BOXED(0x3980007f,32,FLEN)
NAN_BOXED(0x7d3a1788,32,FLEN)
NAN_BOXED(0x1b015c3,32,FLEN)
NAN_BOXED(0x398000ff,32,FLEN)
NAN_BOXED(0x7d3a1788,32,FLEN)
NAN_BOXED(0x1b015c3,32,FLEN)
NAN_BOXED(0x398001ff,32,FLEN)
NAN_BOXED(0x7d3a1788,32,FLEN)
NAN_BOXED(0x1b015c3,32,FLEN)
NAN_BOXED(0x398003ff,32,FLEN)
NAN_BOXED(0x7d3a1788,32,FLEN)
NAN_BOXED(0x1b015c3,32,FLEN)
NAN_BOXED(0x398007ff,32,FLEN)
NAN_BOXED(0x7d3a1788,32,FLEN)
NAN_BOXED(0x1b015c3,32,FLEN)
NAN_BOXED(0x39800fff,32,FLEN)
NAN_BOXED(0x7d3a1788,32,FLEN)
NAN_BOXED(0x1b015c3,32,FLEN)
NAN_BOXED(0x39801fff,32,FLEN)
NAN_BOXED(0x7d3a1788,32,FLEN)
NAN_BOXED(0x1b015c3,32,FLEN)
NAN_BOXED(0x39803fff,32,FLEN)
NAN_BOXED(0x7d3a1788,32,FLEN)
NAN_BOXED(0x1b015c3,32,FLEN)
NAN_BOXED(0x39807fff,32,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;


signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_2:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_3:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_4:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_5:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_6:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine

tsig_begin_canary:
CANARY;
tsig_begin_canary:
CANARY;
mtrap_sigptr:
    .fill 64*(XLEN/32),4,0xdeadbeef
tsig_end_canary:
CANARY;
tsig_end_canary:
CANARY;

#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif

sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
