
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.7.1
// timestamp : Fri Jun 17 14:18:08 2022 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /scratch/pawan/work/normalised/RV32F/fnmsub.s.cgf \
 \
//                  -- xlen 32  \
//                  --randomize \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fnmsub.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fnmsub_b3 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fnmsub_b3)

RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_0:
// rd == rs2 == rs3 != rs1, rs1==f13, rs2==f0, rs3==f0, rd==f0,fs1 == 0 and fe1 == 0xf3 and fm1 == 0x3337a6 and fs2 == 1 and fe2 == 0x8a and fm2 == 0x067106 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3c3c81 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f13; op2:f0; op3:f0; dest:f0; op1val:0x79b337a6; op2val:0xc5067106;
op3val:0xc5067106; valaddr_reg:x3; val_offset:0*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f0, f13, f0, f0, dyn, 0, 0, x3, 0*FLEN/8, x4, x1, x2)

inst_1:
// rs1 == rs3 != rs2 and rs1 == rs3 != rd and rd != rs2, rs1==f3, rs2==f1, rs3==f3, rd==f10,fs1 == 0 and fe1 == 0xf3 and fm1 == 0x3337a6 and fs2 == 1 and fe2 == 0x8a and fm2 == 0x067106 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3c3c81 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f3; op2:f1; op3:f3; dest:f10; op1val:0x79b337a6; op2val:0xc5067106;
op3val:0x79b337a6; valaddr_reg:x3; val_offset:3*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f10, f3, f1, f3, dyn, 32, 0, x3, 3*FLEN/8, x4, x1, x2)

inst_2:
// rs2 == rd != rs1 and rs2 == rd != rs3 and rs3 != rs1, rs1==f2, rs2==f19, rs3==f7, rd==f19,fs1 == 0 and fe1 == 0xf3 and fm1 == 0x3337a6 and fs2 == 1 and fe2 == 0x8a and fm2 == 0x067106 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3c3c81 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f2; op2:f19; op3:f7; dest:f19; op1val:0x79b337a6; op2val:0xc5067106;
op3val:0x7f3c3c81; valaddr_reg:x3; val_offset:6*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f19, f2, f19, f7, dyn, 64, 0, x3, 6*FLEN/8, x4, x1, x2)

inst_3:
// rs1 != rs2 and rs1 != rd and rs1 != rs3 and rs2 != rs3 and rs2 != rd and rs3 != rd, rs1==f7, rs2==f29, rs3==f14, rd==f6,fs1 == 0 and fe1 == 0xf3 and fm1 == 0x3337a6 and fs2 == 1 and fe2 == 0x8a and fm2 == 0x067106 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3c3c81 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f7; op2:f29; op3:f14; dest:f6; op1val:0x79b337a6; op2val:0xc5067106;
op3val:0x7f3c3c81; valaddr_reg:x3; val_offset:9*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f6, f7, f29, f14, dyn, 96, 0, x3, 9*FLEN/8, x4, x1, x2)

inst_4:
// rs1 == rd != rs2 and rs1 == rd != rs3 and rs3 != rs2, rs1==f25, rs2==f30, rs3==f6, rd==f25,fs1 == 0 and fe1 == 0xf3 and fm1 == 0x3337a6 and fs2 == 1 and fe2 == 0x8a and fm2 == 0x067106 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3c3c81 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f25; op2:f30; op3:f6; dest:f25; op1val:0x79b337a6; op2val:0xc5067106;
op3val:0x7f3c3c81; valaddr_reg:x3; val_offset:12*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f25, f25, f30, f6, dyn, 128, 0, x3, 12*FLEN/8, x4, x1, x2)

inst_5:
// rs2 == rs3 != rs1 and rs2 == rs3 != rd and rd != rs1, rs1==f5, rs2==f16, rs3==f16, rd==f15,fs1 == 0 and fe1 == 0xf7 and fm1 == 0x244bd3 and fs2 == 1 and fe2 == 0x85 and fm2 == 0x37709b and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6b74f1 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f5; op2:f16; op3:f16; dest:f15; op1val:0x7ba44bd3; op2val:0xc2b7709b;
op3val:0xc2b7709b; valaddr_reg:x3; val_offset:15*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f15, f5, f16, f16, dyn, 0, 0, x3, 15*FLEN/8, x4, x1, x2)

inst_6:
// rs1 == rs2 == rs3 != rd, rs1==f8, rs2==f8, rs3==f8, rd==f12,fs1 == 0 and fe1 == 0xf7 and fm1 == 0x244bd3 and fs2 == 1 and fe2 == 0x85 and fm2 == 0x37709b and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6b74f1 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f8; op2:f8; op3:f8; dest:f12; op1val:0x7ba44bd3; op2val:0x7ba44bd3;
op3val:0x7ba44bd3; valaddr_reg:x3; val_offset:18*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f12, f8, f8, f8, dyn, 32, 0, x3, 18*FLEN/8, x4, x1, x2)

inst_7:
// rs1 == rs2 != rs3 and rs1 == rs2 != rd and rd != rs3, rs1==f28, rs2==f28, rs3==f24, rd==f16,fs1 == 0 and fe1 == 0xf7 and fm1 == 0x244bd3 and fs2 == 1 and fe2 == 0x85 and fm2 == 0x37709b and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6b74f1 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f28; op2:f28; op3:f24; dest:f16; op1val:0x7ba44bd3; op2val:0x7ba44bd3;
op3val:0x7eeb74f1; valaddr_reg:x3; val_offset:21*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f16, f28, f28, f24, dyn, 64, 0, x3, 21*FLEN/8, x4, x1, x2)

inst_8:
// rs1 == rs2 == rs3 == rd, rs1==f11, rs2==f11, rs3==f11, rd==f11,fs1 == 0 and fe1 == 0xf7 and fm1 == 0x244bd3 and fs2 == 1 and fe2 == 0x85 and fm2 == 0x37709b and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6b74f1 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f11; op2:f11; op3:f11; dest:f11; op1val:0x7ba44bd3; op2val:0x7ba44bd3;
op3val:0x7ba44bd3; valaddr_reg:x3; val_offset:24*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f11, f11, f11, f11, dyn, 96, 0, x3, 24*FLEN/8, x4, x1, x2)

inst_9:
// rs1 == rs2 == rd != rs3, rs1==f31, rs2==f31, rs3==f4, rd==f31,fs1 == 0 and fe1 == 0xf7 and fm1 == 0x244bd3 and fs2 == 1 and fe2 == 0x85 and fm2 == 0x37709b and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6b74f1 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f31; op2:f31; op3:f4; dest:f31; op1val:0x7ba44bd3; op2val:0x7ba44bd3;
op3val:0x7eeb74f1; valaddr_reg:x3; val_offset:27*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f31, f31, f4, dyn, 128, 0, x3, 27*FLEN/8, x4, x1, x2)

inst_10:
// rs1 == rd == rs3 != rs2, rs1==f20, rs2==f24, rs3==f20, rd==f20,fs1 == 0 and fe1 == 0xf8 and fm1 == 0x07b7d1 and fs2 == 1 and fe2 == 0x85 and fm2 == 0x132367 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1c02a4 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f20; op2:f24; op3:f20; dest:f20; op1val:0x7c07b7d1; op2val:0xc2932367;
op3val:0x7c07b7d1; valaddr_reg:x3; val_offset:30*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f20, f20, f24, f20, dyn, 0, 0, x3, 30*FLEN/8, x4, x1, x2)

inst_11:
// rs3 == rd != rs1 and rs3 == rd != rs2 and rs2 != rs1, rs1==f21, rs2==f6, rs3==f27, rd==f27,fs1 == 0 and fe1 == 0xf8 and fm1 == 0x07b7d1 and fs2 == 1 and fe2 == 0x85 and fm2 == 0x132367 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1c02a4 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f21; op2:f6; op3:f27; dest:f27; op1val:0x7c07b7d1; op2val:0xc2932367;
op3val:0x7f1c02a4; valaddr_reg:x3; val_offset:33*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f27, f21, f6, f27, dyn, 32, 0, x3, 33*FLEN/8, x4, x1, x2)

inst_12:
// rs1==f19, rs2==f22, rs3==f18, rd==f17,fs1 == 0 and fe1 == 0xf8 and fm1 == 0x07b7d1 and fs2 == 1 and fe2 == 0x85 and fm2 == 0x132367 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1c02a4 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f19; op2:f22; op3:f18; dest:f17; op1val:0x7c07b7d1; op2val:0xc2932367;
op3val:0x7f1c02a4; valaddr_reg:x3; val_offset:36*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f17, f19, f22, f18, dyn, 64, 0, x3, 36*FLEN/8, x4, x1, x2)

inst_13:
// rs1==f24, rs2==f17, rs3==f30, rd==f13,fs1 == 0 and fe1 == 0xf8 and fm1 == 0x07b7d1 and fs2 == 1 and fe2 == 0x85 and fm2 == 0x132367 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1c02a4 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f24; op2:f17; op3:f30; dest:f13; op1val:0x7c07b7d1; op2val:0xc2932367;
op3val:0x7f1c02a4; valaddr_reg:x3; val_offset:39*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f13, f24, f17, f30, dyn, 96, 0, x3, 39*FLEN/8, x4, x1, x2)

inst_14:
// rs1==f16, rs2==f10, rs3==f29, rd==f21,fs1 == 0 and fe1 == 0xf8 and fm1 == 0x07b7d1 and fs2 == 1 and fe2 == 0x85 and fm2 == 0x132367 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1c02a4 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f16; op2:f10; op3:f29; dest:f21; op1val:0x7c07b7d1; op2val:0xc2932367;
op3val:0x7f1c02a4; valaddr_reg:x3; val_offset:42*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f21, f16, f10, f29, dyn, 128, 0, x3, 42*FLEN/8, x4, x1, x2)

inst_15:
// rs1==f14, rs2==f13, rs3==f1, rd==f30,fs1 == 0 and fe1 == 0xf8 and fm1 == 0x126d0d and fs2 == 1 and fe2 == 0x83 and fm2 == 0x666e32 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x03cd01 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f14; op2:f13; op3:f1; dest:f30; op1val:0x7c126d0d; op2val:0xc1e66e32;
op3val:0x7e83cd01; valaddr_reg:x3; val_offset:45*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f30, f14, f13, f1, dyn, 0, 0, x3, 45*FLEN/8, x4, x1, x2)

inst_16:
// rs1==f26, rs2==f3, rs3==f17, rd==f22,fs1 == 0 and fe1 == 0xf8 and fm1 == 0x126d0d and fs2 == 1 and fe2 == 0x83 and fm2 == 0x666e32 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x03cd01 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f26; op2:f3; op3:f17; dest:f22; op1val:0x7c126d0d; op2val:0xc1e66e32;
op3val:0x7e83cd01; valaddr_reg:x3; val_offset:48*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f22, f26, f3, f17, dyn, 32, 0, x3, 48*FLEN/8, x4, x1, x2)

inst_17:
// rs1==f23, rs2==f12, rs3==f13, rd==f7,fs1 == 0 and fe1 == 0xf8 and fm1 == 0x126d0d and fs2 == 1 and fe2 == 0x83 and fm2 == 0x666e32 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x03cd01 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f23; op2:f12; op3:f13; dest:f7; op1val:0x7c126d0d; op2val:0xc1e66e32;
op3val:0x7e83cd01; valaddr_reg:x3; val_offset:51*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f7, f23, f12, f13, dyn, 64, 0, x3, 51*FLEN/8, x4, x1, x2)

inst_18:
// rs1==f17, rs2==f27, rs3==f22, rd==f23,fs1 == 0 and fe1 == 0xf8 and fm1 == 0x126d0d and fs2 == 1 and fe2 == 0x83 and fm2 == 0x666e32 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x03cd01 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f17; op2:f27; op3:f22; dest:f23; op1val:0x7c126d0d; op2val:0xc1e66e32;
op3val:0x7e83cd01; valaddr_reg:x3; val_offset:54*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f23, f17, f27, f22, dyn, 96, 0, x3, 54*FLEN/8, x4, x1, x2)

inst_19:
// rs1==f12, rs2==f15, rs3==f25, rd==f28,fs1 == 0 and fe1 == 0xf8 and fm1 == 0x126d0d and fs2 == 1 and fe2 == 0x83 and fm2 == 0x666e32 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x03cd01 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f12; op2:f15; op3:f25; dest:f28; op1val:0x7c126d0d; op2val:0xc1e66e32;
op3val:0x7e83cd01; valaddr_reg:x3; val_offset:57*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f28, f12, f15, f25, dyn, 128, 0, x3, 57*FLEN/8, x4, x1, x2)

inst_20:
// rs1==f15, rs2==f4, rs3==f23, rd==f2,fs1 == 0 and fe1 == 0xf8 and fm1 == 0x502f82 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x049553 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x57a3de and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f15; op2:f4; op3:f23; dest:f2; op1val:0x7c502f82; op2val:0xc1049553;
op3val:0x7dd7a3de; valaddr_reg:x3; val_offset:60*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f2, f15, f4, f23, dyn, 0, 0, x3, 60*FLEN/8, x4, x1, x2)

inst_21:
// rs1==f6, rs2==f23, rs3==f2, rd==f5,fs1 == 0 and fe1 == 0xf8 and fm1 == 0x502f82 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x049553 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x57a3de and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f6; op2:f23; op3:f2; dest:f5; op1val:0x7c502f82; op2val:0xc1049553;
op3val:0x7dd7a3de; valaddr_reg:x3; val_offset:63*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f5, f6, f23, f2, dyn, 32, 0, x3, 63*FLEN/8, x4, x1, x2)

inst_22:
// rs1==f10, rs2==f5, rs3==f19, rd==f9,fs1 == 0 and fe1 == 0xf8 and fm1 == 0x502f82 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x049553 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x57a3de and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f10; op2:f5; op3:f19; dest:f9; op1val:0x7c502f82; op2val:0xc1049553;
op3val:0x7dd7a3de; valaddr_reg:x3; val_offset:66*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f9, f10, f5, f19, dyn, 64, 0, x3, 66*FLEN/8, x4, x1, x2)

inst_23:
// rs1==f0, rs2==f21, rs3==f9, rd==f8,fs1 == 0 and fe1 == 0xf8 and fm1 == 0x502f82 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x049553 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x57a3de and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f0; op2:f21; op3:f9; dest:f8; op1val:0x7c502f82; op2val:0xc1049553;
op3val:0x7dd7a3de; valaddr_reg:x3; val_offset:69*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f8, f0, f21, f9, dyn, 96, 0, x3, 69*FLEN/8, x4, x1, x2)

inst_24:
// rs1==f18, rs2==f9, rs3==f21, rd==f1,fs1 == 0 and fe1 == 0xf8 and fm1 == 0x502f82 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x049553 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x57a3de and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f18; op2:f9; op3:f21; dest:f1; op1val:0x7c502f82; op2val:0xc1049553;
op3val:0x7dd7a3de; valaddr_reg:x3; val_offset:72*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f1, f18, f9, f21, dyn, 128, 0, x3, 72*FLEN/8, x4, x1, x2)

inst_25:
// rs1==f9, rs2==f7, rs3==f10, rd==f26,fs1 == 0 and fe1 == 0xf8 and fm1 == 0x75a735 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5581bc and fs3 == 0 and fe3 == 0xfc and fm3 == 0x4ce09d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f9; op2:f7; op3:f10; dest:f26; op1val:0x7c75a735; op2val:0xc15581bc;
op3val:0x7e4ce09d; valaddr_reg:x3; val_offset:75*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f26, f9, f7, f10, dyn, 0, 0, x3, 75*FLEN/8, x4, x1, x2)

inst_26:
// rs1==f4, rs2==f2, rs3==f12, rd==f3,fs1 == 0 and fe1 == 0xf8 and fm1 == 0x75a735 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5581bc and fs3 == 0 and fe3 == 0xfc and fm3 == 0x4ce09d and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f4; op2:f2; op3:f12; dest:f3; op1val:0x7c75a735; op2val:0xc15581bc;
op3val:0x7e4ce09d; valaddr_reg:x3; val_offset:78*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f3, f4, f2, f12, dyn, 32, 0, x3, 78*FLEN/8, x4, x1, x2)

inst_27:
// rs1==f27, rs2==f18, rs3==f28, rd==f24,fs1 == 0 and fe1 == 0xf8 and fm1 == 0x75a735 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5581bc and fs3 == 0 and fe3 == 0xfc and fm3 == 0x4ce09d and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f27; op2:f18; op3:f28; dest:f24; op1val:0x7c75a735; op2val:0xc15581bc;
op3val:0x7e4ce09d; valaddr_reg:x3; val_offset:81*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f24, f27, f18, f28, dyn, 64, 0, x3, 81*FLEN/8, x4, x1, x2)

inst_28:
// rs1==f22, rs2==f25, rs3==f31, rd==f29,fs1 == 0 and fe1 == 0xf8 and fm1 == 0x75a735 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5581bc and fs3 == 0 and fe3 == 0xfc and fm3 == 0x4ce09d and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f22; op2:f25; op3:f31; dest:f29; op1val:0x7c75a735; op2val:0xc15581bc;
op3val:0x7e4ce09d; valaddr_reg:x3; val_offset:84*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f29, f22, f25, f31, dyn, 96, 0, x3, 84*FLEN/8, x4, x1, x2)

inst_29:
// rs1==f1, rs2==f26, rs3==f5, rd==f14,fs1 == 0 and fe1 == 0xf8 and fm1 == 0x75a735 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5581bc and fs3 == 0 and fe3 == 0xfc and fm3 == 0x4ce09d and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f1; op2:f26; op3:f5; dest:f14; op1val:0x7c75a735; op2val:0xc15581bc;
op3val:0x7e4ce09d; valaddr_reg:x3; val_offset:87*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f14, f1, f26, f5, dyn, 128, 0, x3, 87*FLEN/8, x4, x1, x2)

inst_30:
// rs1==f29, rs2==f14, rs3==f26, rd==f4,fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476175 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x656195 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x32a62e and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f29; op2:f14; op3:f26; dest:f4; op1val:0x7cc76175; op2val:0xc0e56195;
op3val:0x7e32a62e; valaddr_reg:x3; val_offset:90*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f4, f29, f14, f26, dyn, 0, 0, x3, 90*FLEN/8, x4, x1, x2)

inst_31:
// rs1==f30, rs2==f20, rs3==f15, rd==f18,fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476175 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x656195 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x32a62e and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f20; op3:f15; dest:f18; op1val:0x7cc76175; op2val:0xc0e56195;
op3val:0x7e32a62e; valaddr_reg:x3; val_offset:93*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f18, f30, f20, f15, dyn, 32, 0, x3, 93*FLEN/8, x4, x1, x2)

inst_32:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476175 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x656195 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x32a62e and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc76175; op2val:0xc0e56195;
op3val:0x7e32a62e; valaddr_reg:x3; val_offset:96*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 96*FLEN/8, x4, x1, x2)

inst_33:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476175 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x656195 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x32a62e and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc76175; op2val:0xc0e56195;
op3val:0x7e32a62e; valaddr_reg:x3; val_offset:99*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 99*FLEN/8, x4, x1, x2)

inst_34:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x476175 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x656195 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x32a62e and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc76175; op2val:0xc0e56195;
op3val:0x7e32a62e; valaddr_reg:x3; val_offset:102*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 102*FLEN/8, x4, x1, x2)

inst_35:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x41cef4 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1d4815 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6e24fd and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d41cef4; op2val:0xc11d4815;
op3val:0x7eee24fd; valaddr_reg:x3; val_offset:105*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105*FLEN/8, x4, x1, x2)

inst_36:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x41cef4 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1d4815 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6e24fd and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d41cef4; op2val:0xc11d4815;
op3val:0x7eee24fd; valaddr_reg:x3; val_offset:108*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 108*FLEN/8, x4, x1, x2)

inst_37:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x41cef4 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1d4815 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6e24fd and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d41cef4; op2val:0xc11d4815;
op3val:0x7eee24fd; valaddr_reg:x3; val_offset:111*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 111*FLEN/8, x4, x1, x2)

inst_38:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x41cef4 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1d4815 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6e24fd and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d41cef4; op2val:0xc11d4815;
op3val:0x7eee24fd; valaddr_reg:x3; val_offset:114*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 114*FLEN/8, x4, x1, x2)

inst_39:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x41cef4 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1d4815 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6e24fd and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d41cef4; op2val:0xc11d4815;
op3val:0x7eee24fd; valaddr_reg:x3; val_offset:117*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 117*FLEN/8, x4, x1, x2)

inst_40:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4566d8 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x732561 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3b7d72 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4566d8; op2val:0xc0f32561;
op3val:0x7ebb7d72; valaddr_reg:x3; val_offset:120*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 120*FLEN/8, x4, x1, x2)

inst_41:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4566d8 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x732561 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3b7d72 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4566d8; op2val:0xc0f32561;
op3val:0x7ebb7d72; valaddr_reg:x3; val_offset:123*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 123*FLEN/8, x4, x1, x2)

inst_42:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4566d8 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x732561 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3b7d72 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4566d8; op2val:0xc0f32561;
op3val:0x7ebb7d72; valaddr_reg:x3; val_offset:126*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 126*FLEN/8, x4, x1, x2)

inst_43:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4566d8 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x732561 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3b7d72 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4566d8; op2val:0xc0f32561;
op3val:0x7ebb7d72; valaddr_reg:x3; val_offset:129*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 129*FLEN/8, x4, x1, x2)

inst_44:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4566d8 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x732561 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3b7d72 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4566d8; op2val:0xc0f32561;
op3val:0x7ebb7d72; valaddr_reg:x3; val_offset:132*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 132*FLEN/8, x4, x1, x2)

inst_45:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x52d2c7 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x2aec85 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0cc2c0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d52d2c7; op2val:0xc12aec85;
op3val:0x7f0cc2c0; valaddr_reg:x3; val_offset:135*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 135*FLEN/8, x4, x1, x2)

inst_46:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x52d2c7 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x2aec85 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0cc2c0 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d52d2c7; op2val:0xc12aec85;
op3val:0x7f0cc2c0; valaddr_reg:x3; val_offset:138*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 138*FLEN/8, x4, x1, x2)

inst_47:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x52d2c7 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x2aec85 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0cc2c0 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d52d2c7; op2val:0xc12aec85;
op3val:0x7f0cc2c0; valaddr_reg:x3; val_offset:141*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 141*FLEN/8, x4, x1, x2)

inst_48:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x52d2c7 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x2aec85 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0cc2c0 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d52d2c7; op2val:0xc12aec85;
op3val:0x7f0cc2c0; valaddr_reg:x3; val_offset:144*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 144*FLEN/8, x4, x1, x2)

inst_49:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x52d2c7 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x2aec85 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0cc2c0 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d52d2c7; op2val:0xc12aec85;
op3val:0x7f0cc2c0; valaddr_reg:x3; val_offset:147*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 147*FLEN/8, x4, x1, x2)

inst_50:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5b67a0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x4a57e5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2d6b19 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5b67a0; op2val:0xc14a57e5;
op3val:0x7f2d6b19; valaddr_reg:x3; val_offset:150*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 150*FLEN/8, x4, x1, x2)

inst_51:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5b67a0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x4a57e5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2d6b19 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5b67a0; op2val:0xc14a57e5;
op3val:0x7f2d6b19; valaddr_reg:x3; val_offset:153*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 153*FLEN/8, x4, x1, x2)

inst_52:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5b67a0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x4a57e5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2d6b19 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5b67a0; op2val:0xc14a57e5;
op3val:0x7f2d6b19; valaddr_reg:x3; val_offset:156*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 156*FLEN/8, x4, x1, x2)

inst_53:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5b67a0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x4a57e5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2d6b19 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5b67a0; op2val:0xc14a57e5;
op3val:0x7f2d6b19; valaddr_reg:x3; val_offset:159*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 159*FLEN/8, x4, x1, x2)

inst_54:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5b67a0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x4a57e5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2d6b19 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5b67a0; op2val:0xc14a57e5;
op3val:0x7f2d6b19; valaddr_reg:x3; val_offset:162*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 162*FLEN/8, x4, x1, x2)

inst_55:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x02d835 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x39e73f and fs3 == 0 and fe3 == 0xfc and fm3 == 0x3e08e0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d82d835; op2val:0xc039e73f;
op3val:0x7e3e08e0; valaddr_reg:x3; val_offset:165*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 165*FLEN/8, x4, x1, x2)

inst_56:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x02d835 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x39e73f and fs3 == 0 and fe3 == 0xfc and fm3 == 0x3e08e0 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d82d835; op2val:0xc039e73f;
op3val:0x7e3e08e0; valaddr_reg:x3; val_offset:168*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 168*FLEN/8, x4, x1, x2)

inst_57:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x02d835 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x39e73f and fs3 == 0 and fe3 == 0xfc and fm3 == 0x3e08e0 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d82d835; op2val:0xc039e73f;
op3val:0x7e3e08e0; valaddr_reg:x3; val_offset:171*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 171*FLEN/8, x4, x1, x2)

inst_58:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x02d835 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x39e73f and fs3 == 0 and fe3 == 0xfc and fm3 == 0x3e08e0 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d82d835; op2val:0xc039e73f;
op3val:0x7e3e08e0; valaddr_reg:x3; val_offset:174*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 174*FLEN/8, x4, x1, x2)

inst_59:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x02d835 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x39e73f and fs3 == 0 and fe3 == 0xfc and fm3 == 0x3e08e0 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d82d835; op2val:0xc039e73f;
op3val:0x7e3e08e0; valaddr_reg:x3; val_offset:177*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 177*FLEN/8, x4, x1, x2)

inst_60:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x07ec62 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x0f6574 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1845d2 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d87ec62; op2val:0xc10f6574;
op3val:0x7f1845d2; valaddr_reg:x3; val_offset:180*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 180*FLEN/8, x4, x1, x2)

inst_61:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x07ec62 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x0f6574 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1845d2 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d87ec62; op2val:0xc10f6574;
op3val:0x7f1845d2; valaddr_reg:x3; val_offset:183*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 183*FLEN/8, x4, x1, x2)

inst_62:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x07ec62 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x0f6574 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1845d2 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d87ec62; op2val:0xc10f6574;
op3val:0x7f1845d2; valaddr_reg:x3; val_offset:186*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 186*FLEN/8, x4, x1, x2)

inst_63:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x07ec62 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x0f6574 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1845d2 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d87ec62; op2val:0xc10f6574;
op3val:0x7f1845d2; valaddr_reg:x3; val_offset:189*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 189*FLEN/8, x4, x1, x2)

inst_64:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x07ec62 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x0f6574 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1845d2 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d87ec62; op2val:0xc10f6574;
op3val:0x7f1845d2; valaddr_reg:x3; val_offset:192*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 192*FLEN/8, x4, x1, x2)

inst_65:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0992a2 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x275676 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x33da3d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8992a2; op2val:0xc0275676;
op3val:0x7e33da3d; valaddr_reg:x3; val_offset:195*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 195*FLEN/8, x4, x1, x2)

inst_66:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0992a2 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x275676 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x33da3d and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8992a2; op2val:0xc0275676;
op3val:0x7e33da3d; valaddr_reg:x3; val_offset:198*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 198*FLEN/8, x4, x1, x2)

inst_67:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0992a2 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x275676 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x33da3d and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8992a2; op2val:0xc0275676;
op3val:0x7e33da3d; valaddr_reg:x3; val_offset:201*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 201*FLEN/8, x4, x1, x2)

inst_68:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0992a2 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x275676 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x33da3d and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8992a2; op2val:0xc0275676;
op3val:0x7e33da3d; valaddr_reg:x3; val_offset:204*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 204*FLEN/8, x4, x1, x2)

inst_69:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0992a2 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x275676 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x33da3d and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8992a2; op2val:0xc0275676;
op3val:0x7e33da3d; valaddr_reg:x3; val_offset:207*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 207*FLEN/8, x4, x1, x2)

inst_70:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0e6204 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x519284 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x691f07 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8e6204; op2val:0xc0d19284;
op3val:0x7ee91f07; valaddr_reg:x3; val_offset:210*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 210*FLEN/8, x4, x1, x2)

inst_71:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0e6204 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x519284 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x691f07 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8e6204; op2val:0xc0d19284;
op3val:0x7ee91f07; valaddr_reg:x3; val_offset:213*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 213*FLEN/8, x4, x1, x2)

inst_72:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0e6204 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x519284 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x691f07 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8e6204; op2val:0xc0d19284;
op3val:0x7ee91f07; valaddr_reg:x3; val_offset:216*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 216*FLEN/8, x4, x1, x2)

inst_73:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0e6204 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x519284 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x691f07 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8e6204; op2val:0xc0d19284;
op3val:0x7ee91f07; valaddr_reg:x3; val_offset:219*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 219*FLEN/8, x4, x1, x2)

inst_74:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0e6204 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x519284 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x691f07 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8e6204; op2val:0xc0d19284;
op3val:0x7ee91f07; valaddr_reg:x3; val_offset:222*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 222*FLEN/8, x4, x1, x2)

inst_75:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f5d14 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x25e6e4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x39d098 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f5d14; op2val:0xc125e6e4;
op3val:0x7f39d098; valaddr_reg:x3; val_offset:225*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 225*FLEN/8, x4, x1, x2)

inst_76:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f5d14 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x25e6e4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x39d098 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f5d14; op2val:0xc125e6e4;
op3val:0x7f39d098; valaddr_reg:x3; val_offset:228*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 228*FLEN/8, x4, x1, x2)

inst_77:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f5d14 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x25e6e4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x39d098 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f5d14; op2val:0xc125e6e4;
op3val:0x7f39d098; valaddr_reg:x3; val_offset:231*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 231*FLEN/8, x4, x1, x2)

inst_78:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f5d14 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x25e6e4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x39d098 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f5d14; op2val:0xc125e6e4;
op3val:0x7f39d098; valaddr_reg:x3; val_offset:234*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 234*FLEN/8, x4, x1, x2)

inst_79:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f5d14 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x25e6e4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x39d098 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f5d14; op2val:0xc125e6e4;
op3val:0x7f39d098; valaddr_reg:x3; val_offset:237*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 237*FLEN/8, x4, x1, x2)

inst_80:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x121772 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6578e7 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x02f3f8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d921772; op2val:0xbf6578e7;
op3val:0x7d82f3f8; valaddr_reg:x3; val_offset:240*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 240*FLEN/8, x4, x1, x2)

inst_81:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x121772 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6578e7 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x02f3f8 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d921772; op2val:0xbf6578e7;
op3val:0x7d82f3f8; valaddr_reg:x3; val_offset:243*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 243*FLEN/8, x4, x1, x2)

inst_82:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x121772 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6578e7 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x02f3f8 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d921772; op2val:0xbf6578e7;
op3val:0x7d82f3f8; valaddr_reg:x3; val_offset:246*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 246*FLEN/8, x4, x1, x2)

inst_83:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x121772 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6578e7 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x02f3f8 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d921772; op2val:0xbf6578e7;
op3val:0x7d82f3f8; valaddr_reg:x3; val_offset:249*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 249*FLEN/8, x4, x1, x2)

inst_84:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x121772 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6578e7 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x02f3f8 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d921772; op2val:0xbf6578e7;
op3val:0x7d82f3f8; valaddr_reg:x3; val_offset:252*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 252*FLEN/8, x4, x1, x2)

inst_85:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1336d5 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2a9b0a and fs3 == 0 and fe3 == 0xfd and fm3 == 0x443724 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9336d5; op2val:0xc0aa9b0a;
op3val:0x7ec43724; valaddr_reg:x3; val_offset:255*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 255*FLEN/8, x4, x1, x2)

inst_86:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1336d5 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2a9b0a and fs3 == 0 and fe3 == 0xfd and fm3 == 0x443724 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9336d5; op2val:0xc0aa9b0a;
op3val:0x7ec43724; valaddr_reg:x3; val_offset:258*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 258*FLEN/8, x4, x1, x2)

inst_87:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1336d5 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2a9b0a and fs3 == 0 and fe3 == 0xfd and fm3 == 0x443724 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9336d5; op2val:0xc0aa9b0a;
op3val:0x7ec43724; valaddr_reg:x3; val_offset:261*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 261*FLEN/8, x4, x1, x2)

inst_88:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1336d5 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2a9b0a and fs3 == 0 and fe3 == 0xfd and fm3 == 0x443724 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9336d5; op2val:0xc0aa9b0a;
op3val:0x7ec43724; valaddr_reg:x3; val_offset:264*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 264*FLEN/8, x4, x1, x2)

inst_89:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1336d5 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2a9b0a and fs3 == 0 and fe3 == 0xfd and fm3 == 0x443724 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9336d5; op2val:0xc0aa9b0a;
op3val:0x7ec43724; valaddr_reg:x3; val_offset:267*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 267*FLEN/8, x4, x1, x2)

inst_90:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x15f05d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x62402e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0483c9 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d95f05d; op2val:0xc0e2402e;
op3val:0x7f0483c9; valaddr_reg:x3; val_offset:270*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 270*FLEN/8, x4, x1, x2)

inst_91:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x15f05d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x62402e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0483c9 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d95f05d; op2val:0xc0e2402e;
op3val:0x7f0483c9; valaddr_reg:x3; val_offset:273*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 273*FLEN/8, x4, x1, x2)

inst_92:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x15f05d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x62402e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0483c9 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d95f05d; op2val:0xc0e2402e;
op3val:0x7f0483c9; valaddr_reg:x3; val_offset:276*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 276*FLEN/8, x4, x1, x2)

inst_93:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x15f05d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x62402e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0483c9 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d95f05d; op2val:0xc0e2402e;
op3val:0x7f0483c9; valaddr_reg:x3; val_offset:279*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 279*FLEN/8, x4, x1, x2)

inst_94:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x15f05d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x62402e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0483c9 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d95f05d; op2val:0xc0e2402e;
op3val:0x7f0483c9; valaddr_reg:x3; val_offset:282*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 282*FLEN/8, x4, x1, x2)

inst_95:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x239eb4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1c7e58 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x480aed and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da39eb4; op2val:0xc09c7e58;
op3val:0x7ec80aed; valaddr_reg:x3; val_offset:285*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 285*FLEN/8, x4, x1, x2)

inst_96:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x239eb4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1c7e58 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x480aed and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da39eb4; op2val:0xc09c7e58;
op3val:0x7ec80aed; valaddr_reg:x3; val_offset:288*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 288*FLEN/8, x4, x1, x2)

inst_97:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x239eb4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1c7e58 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x480aed and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da39eb4; op2val:0xc09c7e58;
op3val:0x7ec80aed; valaddr_reg:x3; val_offset:291*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 291*FLEN/8, x4, x1, x2)

inst_98:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x239eb4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1c7e58 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x480aed and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da39eb4; op2val:0xc09c7e58;
op3val:0x7ec80aed; valaddr_reg:x3; val_offset:294*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 294*FLEN/8, x4, x1, x2)

inst_99:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x239eb4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1c7e58 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x480aed and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da39eb4; op2val:0xc09c7e58;
op3val:0x7ec80aed; valaddr_reg:x3; val_offset:297*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 297*FLEN/8, x4, x1, x2)

inst_100:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x277072 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x6ef63b and fs3 == 0 and fe3 == 0xfa and fm3 == 0x1c4b97 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da77072; op2val:0xbeeef63b;
op3val:0x7d1c4b97; valaddr_reg:x3; val_offset:300*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 300*FLEN/8, x4, x1, x2)

inst_101:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x277072 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x6ef63b and fs3 == 0 and fe3 == 0xfa and fm3 == 0x1c4b97 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da77072; op2val:0xbeeef63b;
op3val:0x7d1c4b97; valaddr_reg:x3; val_offset:303*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 303*FLEN/8, x4, x1, x2)

inst_102:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x277072 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x6ef63b and fs3 == 0 and fe3 == 0xfa and fm3 == 0x1c4b97 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da77072; op2val:0xbeeef63b;
op3val:0x7d1c4b97; valaddr_reg:x3; val_offset:306*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 306*FLEN/8, x4, x1, x2)

inst_103:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x277072 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x6ef63b and fs3 == 0 and fe3 == 0xfa and fm3 == 0x1c4b97 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da77072; op2val:0xbeeef63b;
op3val:0x7d1c4b97; valaddr_reg:x3; val_offset:309*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 309*FLEN/8, x4, x1, x2)

inst_104:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x277072 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x6ef63b and fs3 == 0 and fe3 == 0xfa and fm3 == 0x1c4b97 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da77072; op2val:0xbeeef63b;
op3val:0x7d1c4b97; valaddr_reg:x3; val_offset:312*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 312*FLEN/8, x4, x1, x2)

inst_105:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31abfa and fs2 == 1 and fe2 == 0x7d and fm2 == 0x21f85f and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x60d312 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1abfa; op2val:0xbea1f85f;
op3val:0x7ce0d312; valaddr_reg:x3; val_offset:315*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 315*FLEN/8, x4, x1, x2)

inst_106:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31abfa and fs2 == 1 and fe2 == 0x7d and fm2 == 0x21f85f and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x60d312 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1abfa; op2val:0xbea1f85f;
op3val:0x7ce0d312; valaddr_reg:x3; val_offset:318*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 318*FLEN/8, x4, x1, x2)

inst_107:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31abfa and fs2 == 1 and fe2 == 0x7d and fm2 == 0x21f85f and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x60d312 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1abfa; op2val:0xbea1f85f;
op3val:0x7ce0d312; valaddr_reg:x3; val_offset:321*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 321*FLEN/8, x4, x1, x2)

inst_108:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31abfa and fs2 == 1 and fe2 == 0x7d and fm2 == 0x21f85f and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x60d312 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1abfa; op2val:0xbea1f85f;
op3val:0x7ce0d312; valaddr_reg:x3; val_offset:324*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 324*FLEN/8, x4, x1, x2)

inst_109:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31abfa and fs2 == 1 and fe2 == 0x7d and fm2 == 0x21f85f and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x60d312 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1abfa; op2val:0xbea1f85f;
op3val:0x7ce0d312; valaddr_reg:x3; val_offset:327*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 327*FLEN/8, x4, x1, x2)

inst_110:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x33c6fa and fs2 == 1 and fe2 == 0x81 and fm2 == 0x62be6e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1f3b63 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db3c6fa; op2val:0xc0e2be6e;
op3val:0x7f1f3b63; valaddr_reg:x3; val_offset:330*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 330*FLEN/8, x4, x1, x2)

inst_111:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x33c6fa and fs2 == 1 and fe2 == 0x81 and fm2 == 0x62be6e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1f3b63 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db3c6fa; op2val:0xc0e2be6e;
op3val:0x7f1f3b63; valaddr_reg:x3; val_offset:333*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 333*FLEN/8, x4, x1, x2)

inst_112:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x33c6fa and fs2 == 1 and fe2 == 0x81 and fm2 == 0x62be6e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1f3b63 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db3c6fa; op2val:0xc0e2be6e;
op3val:0x7f1f3b63; valaddr_reg:x3; val_offset:336*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 336*FLEN/8, x4, x1, x2)

inst_113:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x33c6fa and fs2 == 1 and fe2 == 0x81 and fm2 == 0x62be6e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1f3b63 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db3c6fa; op2val:0xc0e2be6e;
op3val:0x7f1f3b63; valaddr_reg:x3; val_offset:339*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 339*FLEN/8, x4, x1, x2)

inst_114:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x33c6fa and fs2 == 1 and fe2 == 0x81 and fm2 == 0x62be6e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1f3b63 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db3c6fa; op2val:0xc0e2be6e;
op3val:0x7f1f3b63; valaddr_reg:x3; val_offset:342*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 342*FLEN/8, x4, x1, x2)

inst_115:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3b6d02 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x184bfd and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5f00b7 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbb6d02; op2val:0xc0984bfd;
op3val:0x7edf00b7; valaddr_reg:x3; val_offset:345*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 345*FLEN/8, x4, x1, x2)

inst_116:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3b6d02 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x184bfd and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5f00b7 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbb6d02; op2val:0xc0984bfd;
op3val:0x7edf00b7; valaddr_reg:x3; val_offset:348*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 348*FLEN/8, x4, x1, x2)

inst_117:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3b6d02 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x184bfd and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5f00b7 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbb6d02; op2val:0xc0984bfd;
op3val:0x7edf00b7; valaddr_reg:x3; val_offset:351*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 351*FLEN/8, x4, x1, x2)

inst_118:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3b6d02 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x184bfd and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5f00b7 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbb6d02; op2val:0xc0984bfd;
op3val:0x7edf00b7; valaddr_reg:x3; val_offset:354*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 354*FLEN/8, x4, x1, x2)

inst_119:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3b6d02 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x184bfd and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5f00b7 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbb6d02; op2val:0xc0984bfd;
op3val:0x7edf00b7; valaddr_reg:x3; val_offset:357*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 357*FLEN/8, x4, x1, x2)

inst_120:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x420b54 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x328842 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x075328 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc20b54; op2val:0xc0b28842;
op3val:0x7f075328; valaddr_reg:x3; val_offset:360*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 360*FLEN/8, x4, x1, x2)

inst_121:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x420b54 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x328842 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x075328 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc20b54; op2val:0xc0b28842;
op3val:0x7f075328; valaddr_reg:x3; val_offset:363*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 363*FLEN/8, x4, x1, x2)

inst_122:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x420b54 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x328842 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x075328 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc20b54; op2val:0xc0b28842;
op3val:0x7f075328; valaddr_reg:x3; val_offset:366*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 366*FLEN/8, x4, x1, x2)

inst_123:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x420b54 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x328842 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x075328 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc20b54; op2val:0xc0b28842;
op3val:0x7f075328; valaddr_reg:x3; val_offset:369*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 369*FLEN/8, x4, x1, x2)

inst_124:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x420b54 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x328842 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x075328 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc20b54; op2val:0xc0b28842;
op3val:0x7f075328; valaddr_reg:x3; val_offset:372*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 372*FLEN/8, x4, x1, x2)

inst_125:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x43b11b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x723ea7 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x392d50 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc3b11b; op2val:0xc0f23ea7;
op3val:0x7f392d50; valaddr_reg:x3; val_offset:375*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 375*FLEN/8, x4, x1, x2)

inst_126:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x43b11b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x723ea7 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x392d50 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc3b11b; op2val:0xc0f23ea7;
op3val:0x7f392d50; valaddr_reg:x3; val_offset:378*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 378*FLEN/8, x4, x1, x2)

inst_127:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x43b11b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x723ea7 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x392d50 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc3b11b; op2val:0xc0f23ea7;
op3val:0x7f392d50; valaddr_reg:x3; val_offset:381*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 381*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_2)

inst_128:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x43b11b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x723ea7 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x392d50 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc3b11b; op2val:0xc0f23ea7;
op3val:0x7f392d50; valaddr_reg:x3; val_offset:384*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 384*FLEN/8, x4, x1, x2)

inst_129:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x43b11b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x723ea7 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x392d50 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc3b11b; op2val:0xc0f23ea7;
op3val:0x7f392d50; valaddr_reg:x3; val_offset:387*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 387*FLEN/8, x4, x1, x2)

inst_130:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4bc1b7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1dafc1 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7b0361 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcbc1b7; op2val:0xc01dafc1;
op3val:0x7e7b0361; valaddr_reg:x3; val_offset:390*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 390*FLEN/8, x4, x1, x2)

inst_131:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4bc1b7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1dafc1 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7b0361 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcbc1b7; op2val:0xc01dafc1;
op3val:0x7e7b0361; valaddr_reg:x3; val_offset:393*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 393*FLEN/8, x4, x1, x2)

inst_132:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4bc1b7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1dafc1 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7b0361 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcbc1b7; op2val:0xc01dafc1;
op3val:0x7e7b0361; valaddr_reg:x3; val_offset:396*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 396*FLEN/8, x4, x1, x2)

inst_133:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4bc1b7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1dafc1 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7b0361 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcbc1b7; op2val:0xc01dafc1;
op3val:0x7e7b0361; valaddr_reg:x3; val_offset:399*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 399*FLEN/8, x4, x1, x2)

inst_134:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4bc1b7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1dafc1 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7b0361 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcbc1b7; op2val:0xc01dafc1;
op3val:0x7e7b0361; valaddr_reg:x3; val_offset:402*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 402*FLEN/8, x4, x1, x2)

inst_135:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4f529d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3532e8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x12bea4 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcf529d; op2val:0xc0b532e8;
op3val:0x7f12bea4; valaddr_reg:x3; val_offset:405*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 405*FLEN/8, x4, x1, x2)

inst_136:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4f529d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3532e8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x12bea4 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcf529d; op2val:0xc0b532e8;
op3val:0x7f12bea4; valaddr_reg:x3; val_offset:408*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 408*FLEN/8, x4, x1, x2)

inst_137:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4f529d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3532e8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x12bea4 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcf529d; op2val:0xc0b532e8;
op3val:0x7f12bea4; valaddr_reg:x3; val_offset:411*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 411*FLEN/8, x4, x1, x2)

inst_138:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4f529d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3532e8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x12bea4 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcf529d; op2val:0xc0b532e8;
op3val:0x7f12bea4; valaddr_reg:x3; val_offset:414*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 414*FLEN/8, x4, x1, x2)

inst_139:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4f529d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3532e8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x12bea4 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcf529d; op2val:0xc0b532e8;
op3val:0x7f12bea4; valaddr_reg:x3; val_offset:417*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 417*FLEN/8, x4, x1, x2)

inst_140:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5221f9 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ec065 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6a5989 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd221f9; op2val:0xc08ec065;
op3val:0x7eea5989; valaddr_reg:x3; val_offset:420*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 420*FLEN/8, x4, x1, x2)

inst_141:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5221f9 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ec065 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6a5989 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd221f9; op2val:0xc08ec065;
op3val:0x7eea5989; valaddr_reg:x3; val_offset:423*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 423*FLEN/8, x4, x1, x2)

inst_142:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5221f9 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ec065 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6a5989 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd221f9; op2val:0xc08ec065;
op3val:0x7eea5989; valaddr_reg:x3; val_offset:426*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 426*FLEN/8, x4, x1, x2)

inst_143:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5221f9 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ec065 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6a5989 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd221f9; op2val:0xc08ec065;
op3val:0x7eea5989; valaddr_reg:x3; val_offset:429*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 429*FLEN/8, x4, x1, x2)

inst_144:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5221f9 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ec065 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6a5989 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd221f9; op2val:0xc08ec065;
op3val:0x7eea5989; valaddr_reg:x3; val_offset:432*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 432*FLEN/8, x4, x1, x2)

inst_145:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x581c21 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2176e1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x084e0c and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd81c21; op2val:0xc0a176e1;
op3val:0x7f084e0c; valaddr_reg:x3; val_offset:435*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 435*FLEN/8, x4, x1, x2)

inst_146:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x581c21 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2176e1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x084e0c and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd81c21; op2val:0xc0a176e1;
op3val:0x7f084e0c; valaddr_reg:x3; val_offset:438*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 438*FLEN/8, x4, x1, x2)

inst_147:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x581c21 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2176e1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x084e0c and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd81c21; op2val:0xc0a176e1;
op3val:0x7f084e0c; valaddr_reg:x3; val_offset:441*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 441*FLEN/8, x4, x1, x2)

inst_148:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x581c21 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2176e1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x084e0c and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd81c21; op2val:0xc0a176e1;
op3val:0x7f084e0c; valaddr_reg:x3; val_offset:444*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 444*FLEN/8, x4, x1, x2)

inst_149:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x581c21 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2176e1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x084e0c and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd81c21; op2val:0xc0a176e1;
op3val:0x7f084e0c; valaddr_reg:x3; val_offset:447*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 447*FLEN/8, x4, x1, x2)

inst_150:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5a52ec and fs2 == 1 and fe2 == 0x7d and fm2 == 0x67e1c6 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x45c160 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dda52ec; op2val:0xbee7e1c6;
op3val:0x7d45c160; valaddr_reg:x3; val_offset:450*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 450*FLEN/8, x4, x1, x2)

inst_151:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5a52ec and fs2 == 1 and fe2 == 0x7d and fm2 == 0x67e1c6 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x45c160 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dda52ec; op2val:0xbee7e1c6;
op3val:0x7d45c160; valaddr_reg:x3; val_offset:453*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 453*FLEN/8, x4, x1, x2)

inst_152:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5a52ec and fs2 == 1 and fe2 == 0x7d and fm2 == 0x67e1c6 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x45c160 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dda52ec; op2val:0xbee7e1c6;
op3val:0x7d45c160; valaddr_reg:x3; val_offset:456*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 456*FLEN/8, x4, x1, x2)

inst_153:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5a52ec and fs2 == 1 and fe2 == 0x7d and fm2 == 0x67e1c6 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x45c160 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dda52ec; op2val:0xbee7e1c6;
op3val:0x7d45c160; valaddr_reg:x3; val_offset:459*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 459*FLEN/8, x4, x1, x2)

inst_154:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5a52ec and fs2 == 1 and fe2 == 0x7d and fm2 == 0x67e1c6 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x45c160 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dda52ec; op2val:0xbee7e1c6;
op3val:0x7d45c160; valaddr_reg:x3; val_offset:462*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 462*FLEN/8, x4, x1, x2)

inst_155:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x606a5f and fs2 == 1 and fe2 == 0x81 and fm2 == 0x344e7e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1e0f9a and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de06a5f; op2val:0xc0b44e7e;
op3val:0x7f1e0f9a; valaddr_reg:x3; val_offset:465*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 465*FLEN/8, x4, x1, x2)

inst_156:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x606a5f and fs2 == 1 and fe2 == 0x81 and fm2 == 0x344e7e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1e0f9a and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de06a5f; op2val:0xc0b44e7e;
op3val:0x7f1e0f9a; valaddr_reg:x3; val_offset:468*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 468*FLEN/8, x4, x1, x2)

inst_157:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x606a5f and fs2 == 1 and fe2 == 0x81 and fm2 == 0x344e7e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1e0f9a and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de06a5f; op2val:0xc0b44e7e;
op3val:0x7f1e0f9a; valaddr_reg:x3; val_offset:471*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 471*FLEN/8, x4, x1, x2)

inst_158:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x606a5f and fs2 == 1 and fe2 == 0x81 and fm2 == 0x344e7e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1e0f9a and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de06a5f; op2val:0xc0b44e7e;
op3val:0x7f1e0f9a; valaddr_reg:x3; val_offset:474*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 474*FLEN/8, x4, x1, x2)

inst_159:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x606a5f and fs2 == 1 and fe2 == 0x81 and fm2 == 0x344e7e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1e0f9a and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de06a5f; op2val:0xc0b44e7e;
op3val:0x7f1e0f9a; valaddr_reg:x3; val_offset:477*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 477*FLEN/8, x4, x1, x2)

inst_160:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x62f664 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x7ccd08 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x602051 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de2f664; op2val:0xbf7ccd08;
op3val:0x7de02051; valaddr_reg:x3; val_offset:480*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 480*FLEN/8, x4, x1, x2)

inst_161:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x62f664 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x7ccd08 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x602051 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de2f664; op2val:0xbf7ccd08;
op3val:0x7de02051; valaddr_reg:x3; val_offset:483*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 483*FLEN/8, x4, x1, x2)

inst_162:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x62f664 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x7ccd08 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x602051 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de2f664; op2val:0xbf7ccd08;
op3val:0x7de02051; valaddr_reg:x3; val_offset:486*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 486*FLEN/8, x4, x1, x2)

inst_163:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x62f664 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x7ccd08 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x602051 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de2f664; op2val:0xbf7ccd08;
op3val:0x7de02051; valaddr_reg:x3; val_offset:489*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 489*FLEN/8, x4, x1, x2)

inst_164:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x62f664 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x7ccd08 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x602051 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de2f664; op2val:0xbf7ccd08;
op3val:0x7de02051; valaddr_reg:x3; val_offset:492*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 492*FLEN/8, x4, x1, x2)

inst_165:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x755b75 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x4c4428 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x43c635 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df55b75; op2val:0xbfcc4428;
op3val:0x7e43c635; valaddr_reg:x3; val_offset:495*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 495*FLEN/8, x4, x1, x2)

inst_166:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x755b75 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x4c4428 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x43c635 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df55b75; op2val:0xbfcc4428;
op3val:0x7e43c635; valaddr_reg:x3; val_offset:498*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 498*FLEN/8, x4, x1, x2)

inst_167:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x755b75 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x4c4428 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x43c635 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df55b75; op2val:0xbfcc4428;
op3val:0x7e43c635; valaddr_reg:x3; val_offset:501*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 501*FLEN/8, x4, x1, x2)

inst_168:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x755b75 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x4c4428 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x43c635 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df55b75; op2val:0xbfcc4428;
op3val:0x7e43c635; valaddr_reg:x3; val_offset:504*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 504*FLEN/8, x4, x1, x2)

inst_169:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x755b75 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x4c4428 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x43c635 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df55b75; op2val:0xbfcc4428;
op3val:0x7e43c635; valaddr_reg:x3; val_offset:507*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 507*FLEN/8, x4, x1, x2)

inst_170:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ae3a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x23d78d and fs3 == 0 and fe3 == 0xfd and fm3 == 0x2745f0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ae3a; op2val:0xc023d78d;
op3val:0x7ea745f0; valaddr_reg:x3; val_offset:510*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 510*FLEN/8, x4, x1, x2)

inst_171:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ae3a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x23d78d and fs3 == 0 and fe3 == 0xfd and fm3 == 0x2745f0 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ae3a; op2val:0xc023d78d;
op3val:0x7ea745f0; valaddr_reg:x3; val_offset:513*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 513*FLEN/8, x4, x1, x2)

inst_172:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ae3a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x23d78d and fs3 == 0 and fe3 == 0xfd and fm3 == 0x2745f0 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ae3a; op2val:0xc023d78d;
op3val:0x7ea745f0; valaddr_reg:x3; val_offset:516*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 516*FLEN/8, x4, x1, x2)

inst_173:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ae3a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x23d78d and fs3 == 0 and fe3 == 0xfd and fm3 == 0x2745f0 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ae3a; op2val:0xc023d78d;
op3val:0x7ea745f0; valaddr_reg:x3; val_offset:519*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 519*FLEN/8, x4, x1, x2)

inst_174:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ae3a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x23d78d and fs3 == 0 and fe3 == 0xfd and fm3 == 0x2745f0 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ae3a; op2val:0xc023d78d;
op3val:0x7ea745f0; valaddr_reg:x3; val_offset:522*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 522*FLEN/8, x4, x1, x2)

inst_175:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x07b179 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x07ba67 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0fe2c9 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e07b179; op2val:0xc087ba67;
op3val:0x7f0fe2c9; valaddr_reg:x3; val_offset:525*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 525*FLEN/8, x4, x1, x2)

inst_176:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x07b179 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x07ba67 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0fe2c9 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e07b179; op2val:0xc087ba67;
op3val:0x7f0fe2c9; valaddr_reg:x3; val_offset:528*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 528*FLEN/8, x4, x1, x2)

inst_177:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x07b179 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x07ba67 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0fe2c9 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e07b179; op2val:0xc087ba67;
op3val:0x7f0fe2c9; valaddr_reg:x3; val_offset:531*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 531*FLEN/8, x4, x1, x2)

inst_178:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x07b179 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x07ba67 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0fe2c9 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e07b179; op2val:0xc087ba67;
op3val:0x7f0fe2c9; valaddr_reg:x3; val_offset:534*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 534*FLEN/8, x4, x1, x2)

inst_179:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x07b179 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x07ba67 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0fe2c9 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e07b179; op2val:0xc087ba67;
op3val:0x7f0fe2c9; valaddr_reg:x3; val_offset:537*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 537*FLEN/8, x4, x1, x2)

inst_180:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x088c83 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2e8e76 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3a36fc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e088c83; op2val:0xc0ae8e76;
op3val:0x7f3a36fc; valaddr_reg:x3; val_offset:540*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 540*FLEN/8, x4, x1, x2)

inst_181:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x088c83 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2e8e76 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3a36fc and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e088c83; op2val:0xc0ae8e76;
op3val:0x7f3a36fc; valaddr_reg:x3; val_offset:543*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 543*FLEN/8, x4, x1, x2)

inst_182:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x088c83 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2e8e76 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3a36fc and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e088c83; op2val:0xc0ae8e76;
op3val:0x7f3a36fc; valaddr_reg:x3; val_offset:546*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 546*FLEN/8, x4, x1, x2)

inst_183:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x088c83 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2e8e76 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3a36fc and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e088c83; op2val:0xc0ae8e76;
op3val:0x7f3a36fc; valaddr_reg:x3; val_offset:549*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 549*FLEN/8, x4, x1, x2)

inst_184:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x088c83 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2e8e76 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3a36fc and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e088c83; op2val:0xc0ae8e76;
op3val:0x7f3a36fc; valaddr_reg:x3; val_offset:552*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 552*FLEN/8, x4, x1, x2)

inst_185:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0dd078 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x48fee8 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5eb026 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0dd078; op2val:0xc048fee8;
op3val:0x7edeb026; valaddr_reg:x3; val_offset:555*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 555*FLEN/8, x4, x1, x2)

inst_186:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0dd078 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x48fee8 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5eb026 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0dd078; op2val:0xc048fee8;
op3val:0x7edeb026; valaddr_reg:x3; val_offset:558*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 558*FLEN/8, x4, x1, x2)

inst_187:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0dd078 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x48fee8 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5eb026 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0dd078; op2val:0xc048fee8;
op3val:0x7edeb026; valaddr_reg:x3; val_offset:561*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 561*FLEN/8, x4, x1, x2)

inst_188:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0dd078 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x48fee8 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5eb026 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0dd078; op2val:0xc048fee8;
op3val:0x7edeb026; valaddr_reg:x3; val_offset:564*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 564*FLEN/8, x4, x1, x2)

inst_189:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0dd078 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x48fee8 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5eb026 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0dd078; op2val:0xc048fee8;
op3val:0x7edeb026; valaddr_reg:x3; val_offset:567*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 567*FLEN/8, x4, x1, x2)

inst_190:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x13a21e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0a4105 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1f75c7 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e13a21e; op2val:0xc08a4105;
op3val:0x7f1f75c7; valaddr_reg:x3; val_offset:570*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 570*FLEN/8, x4, x1, x2)

inst_191:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x13a21e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0a4105 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1f75c7 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e13a21e; op2val:0xc08a4105;
op3val:0x7f1f75c7; valaddr_reg:x3; val_offset:573*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 573*FLEN/8, x4, x1, x2)

inst_192:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x13a21e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0a4105 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1f75c7 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e13a21e; op2val:0xc08a4105;
op3val:0x7f1f75c7; valaddr_reg:x3; val_offset:576*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 576*FLEN/8, x4, x1, x2)

inst_193:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x13a21e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0a4105 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1f75c7 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e13a21e; op2val:0xc08a4105;
op3val:0x7f1f75c7; valaddr_reg:x3; val_offset:579*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 579*FLEN/8, x4, x1, x2)

inst_194:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x13a21e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0a4105 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1f75c7 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e13a21e; op2val:0xc08a4105;
op3val:0x7f1f75c7; valaddr_reg:x3; val_offset:582*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 582*FLEN/8, x4, x1, x2)

inst_195:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x14e13e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1c2a84 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x35a3f8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e14e13e; op2val:0xc09c2a84;
op3val:0x7f35a3f8; valaddr_reg:x3; val_offset:585*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 585*FLEN/8, x4, x1, x2)

inst_196:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x14e13e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1c2a84 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x35a3f8 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e14e13e; op2val:0xc09c2a84;
op3val:0x7f35a3f8; valaddr_reg:x3; val_offset:588*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 588*FLEN/8, x4, x1, x2)

inst_197:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x14e13e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1c2a84 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x35a3f8 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e14e13e; op2val:0xc09c2a84;
op3val:0x7f35a3f8; valaddr_reg:x3; val_offset:591*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 591*FLEN/8, x4, x1, x2)

inst_198:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x14e13e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1c2a84 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x35a3f8 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e14e13e; op2val:0xc09c2a84;
op3val:0x7f35a3f8; valaddr_reg:x3; val_offset:594*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 594*FLEN/8, x4, x1, x2)

inst_199:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x14e13e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1c2a84 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x35a3f8 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e14e13e; op2val:0xc09c2a84;
op3val:0x7f35a3f8; valaddr_reg:x3; val_offset:597*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 597*FLEN/8, x4, x1, x2)

inst_200:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x17cb34 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x427de0 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x66a542 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e17cb34; op2val:0xbf427de0;
op3val:0x7de6a542; valaddr_reg:x3; val_offset:600*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 600*FLEN/8, x4, x1, x2)

inst_201:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x17cb34 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x427de0 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x66a542 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e17cb34; op2val:0xbf427de0;
op3val:0x7de6a542; valaddr_reg:x3; val_offset:603*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 603*FLEN/8, x4, x1, x2)

inst_202:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x17cb34 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x427de0 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x66a542 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e17cb34; op2val:0xbf427de0;
op3val:0x7de6a542; valaddr_reg:x3; val_offset:606*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 606*FLEN/8, x4, x1, x2)

inst_203:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x17cb34 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x427de0 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x66a542 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e17cb34; op2val:0xbf427de0;
op3val:0x7de6a542; valaddr_reg:x3; val_offset:609*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 609*FLEN/8, x4, x1, x2)

inst_204:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x17cb34 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x427de0 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x66a542 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e17cb34; op2val:0xbf427de0;
op3val:0x7de6a542; valaddr_reg:x3; val_offset:612*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 612*FLEN/8, x4, x1, x2)

inst_205:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x18f003 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x0ec689 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x2a977b and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e18f003; op2val:0xbe0ec689;
op3val:0x7caa977b; valaddr_reg:x3; val_offset:615*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 615*FLEN/8, x4, x1, x2)

inst_206:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x18f003 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x0ec689 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x2a977b and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e18f003; op2val:0xbe0ec689;
op3val:0x7caa977b; valaddr_reg:x3; val_offset:618*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 618*FLEN/8, x4, x1, x2)

inst_207:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x18f003 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x0ec689 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x2a977b and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e18f003; op2val:0xbe0ec689;
op3val:0x7caa977b; valaddr_reg:x3; val_offset:621*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 621*FLEN/8, x4, x1, x2)

inst_208:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x18f003 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x0ec689 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x2a977b and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e18f003; op2val:0xbe0ec689;
op3val:0x7caa977b; valaddr_reg:x3; val_offset:624*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 624*FLEN/8, x4, x1, x2)

inst_209:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x18f003 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x0ec689 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x2a977b and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e18f003; op2val:0xbe0ec689;
op3val:0x7caa977b; valaddr_reg:x3; val_offset:627*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 627*FLEN/8, x4, x1, x2)

inst_210:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1afd1d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7312ff and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1329c3 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1afd1d; op2val:0xc07312ff;
op3val:0x7f1329c3; valaddr_reg:x3; val_offset:630*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 630*FLEN/8, x4, x1, x2)

inst_211:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1afd1d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7312ff and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1329c3 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1afd1d; op2val:0xc07312ff;
op3val:0x7f1329c3; valaddr_reg:x3; val_offset:633*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 633*FLEN/8, x4, x1, x2)

inst_212:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1afd1d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7312ff and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1329c3 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1afd1d; op2val:0xc07312ff;
op3val:0x7f1329c3; valaddr_reg:x3; val_offset:636*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 636*FLEN/8, x4, x1, x2)

inst_213:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1afd1d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7312ff and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1329c3 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1afd1d; op2val:0xc07312ff;
op3val:0x7f1329c3; valaddr_reg:x3; val_offset:639*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 639*FLEN/8, x4, x1, x2)

inst_214:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1afd1d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7312ff and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1329c3 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1afd1d; op2val:0xc07312ff;
op3val:0x7f1329c3; valaddr_reg:x3; val_offset:642*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 642*FLEN/8, x4, x1, x2)

inst_215:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2015ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x54aed3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x04ff7d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2015ef; op2val:0xc054aed3;
op3val:0x7f04ff7d; valaddr_reg:x3; val_offset:645*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 645*FLEN/8, x4, x1, x2)

inst_216:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2015ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x54aed3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x04ff7d and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2015ef; op2val:0xc054aed3;
op3val:0x7f04ff7d; valaddr_reg:x3; val_offset:648*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 648*FLEN/8, x4, x1, x2)

inst_217:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2015ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x54aed3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x04ff7d and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2015ef; op2val:0xc054aed3;
op3val:0x7f04ff7d; valaddr_reg:x3; val_offset:651*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 651*FLEN/8, x4, x1, x2)

inst_218:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2015ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x54aed3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x04ff7d and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2015ef; op2val:0xc054aed3;
op3val:0x7f04ff7d; valaddr_reg:x3; val_offset:654*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 654*FLEN/8, x4, x1, x2)

inst_219:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2015ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x54aed3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x04ff7d and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2015ef; op2val:0xc054aed3;
op3val:0x7f04ff7d; valaddr_reg:x3; val_offset:657*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 657*FLEN/8, x4, x1, x2)

inst_220:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27090d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1aee25 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4a2da9 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27090d; op2val:0xc01aee25;
op3val:0x7eca2da9; valaddr_reg:x3; val_offset:660*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 660*FLEN/8, x4, x1, x2)

inst_221:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27090d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1aee25 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4a2da9 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27090d; op2val:0xc01aee25;
op3val:0x7eca2da9; valaddr_reg:x3; val_offset:663*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 663*FLEN/8, x4, x1, x2)

inst_222:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27090d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1aee25 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4a2da9 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27090d; op2val:0xc01aee25;
op3val:0x7eca2da9; valaddr_reg:x3; val_offset:666*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 666*FLEN/8, x4, x1, x2)

inst_223:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27090d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1aee25 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4a2da9 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27090d; op2val:0xc01aee25;
op3val:0x7eca2da9; valaddr_reg:x3; val_offset:669*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 669*FLEN/8, x4, x1, x2)

inst_224:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27090d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1aee25 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4a2da9 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27090d; op2val:0xc01aee25;
op3val:0x7eca2da9; valaddr_reg:x3; val_offset:672*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 672*FLEN/8, x4, x1, x2)

inst_225:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28ecea and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0ded2e and fs3 == 0 and fe3 == 0xfc and fm3 == 0x3b4dfe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28ecea; op2val:0xbf8ded2e;
op3val:0x7e3b4dfe; valaddr_reg:x3; val_offset:675*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 675*FLEN/8, x4, x1, x2)

inst_226:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28ecea and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0ded2e and fs3 == 0 and fe3 == 0xfc and fm3 == 0x3b4dfe and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28ecea; op2val:0xbf8ded2e;
op3val:0x7e3b4dfe; valaddr_reg:x3; val_offset:678*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 678*FLEN/8, x4, x1, x2)

inst_227:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28ecea and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0ded2e and fs3 == 0 and fe3 == 0xfc and fm3 == 0x3b4dfe and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28ecea; op2val:0xbf8ded2e;
op3val:0x7e3b4dfe; valaddr_reg:x3; val_offset:681*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 681*FLEN/8, x4, x1, x2)

inst_228:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28ecea and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0ded2e and fs3 == 0 and fe3 == 0xfc and fm3 == 0x3b4dfe and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28ecea; op2val:0xbf8ded2e;
op3val:0x7e3b4dfe; valaddr_reg:x3; val_offset:684*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 684*FLEN/8, x4, x1, x2)

inst_229:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28ecea and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0ded2e and fs3 == 0 and fe3 == 0xfc and fm3 == 0x3b4dfe and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28ecea; op2val:0xbf8ded2e;
op3val:0x7e3b4dfe; valaddr_reg:x3; val_offset:687*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 687*FLEN/8, x4, x1, x2)

inst_230:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2af59a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2891e9 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x61253d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2af59a; op2val:0xbfa891e9;
op3val:0x7e61253d; valaddr_reg:x3; val_offset:690*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 690*FLEN/8, x4, x1, x2)

inst_231:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2af59a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2891e9 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x61253d and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2af59a; op2val:0xbfa891e9;
op3val:0x7e61253d; valaddr_reg:x3; val_offset:693*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 693*FLEN/8, x4, x1, x2)

inst_232:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2af59a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2891e9 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x61253d and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2af59a; op2val:0xbfa891e9;
op3val:0x7e61253d; valaddr_reg:x3; val_offset:696*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 696*FLEN/8, x4, x1, x2)

inst_233:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2af59a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2891e9 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x61253d and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2af59a; op2val:0xbfa891e9;
op3val:0x7e61253d; valaddr_reg:x3; val_offset:699*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 699*FLEN/8, x4, x1, x2)

inst_234:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2af59a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2891e9 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x61253d and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2af59a; op2val:0xbfa891e9;
op3val:0x7e61253d; valaddr_reg:x3; val_offset:702*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 702*FLEN/8, x4, x1, x2)

inst_235:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2bc6f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x29a240 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x63a66a and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2bc6f2; op2val:0xbfa9a240;
op3val:0x7e63a66a; valaddr_reg:x3; val_offset:705*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 705*FLEN/8, x4, x1, x2)

inst_236:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2bc6f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x29a240 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x63a66a and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2bc6f2; op2val:0xbfa9a240;
op3val:0x7e63a66a; valaddr_reg:x3; val_offset:708*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 708*FLEN/8, x4, x1, x2)

inst_237:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2bc6f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x29a240 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x63a66a and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2bc6f2; op2val:0xbfa9a240;
op3val:0x7e63a66a; valaddr_reg:x3; val_offset:711*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 711*FLEN/8, x4, x1, x2)

inst_238:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2bc6f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x29a240 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x63a66a and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2bc6f2; op2val:0xbfa9a240;
op3val:0x7e63a66a; valaddr_reg:x3; val_offset:714*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 714*FLEN/8, x4, x1, x2)

inst_239:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2bc6f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x29a240 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x63a66a and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2bc6f2; op2val:0xbfa9a240;
op3val:0x7e63a66a; valaddr_reg:x3; val_offset:717*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 717*FLEN/8, x4, x1, x2)

inst_240:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2d32f7 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x60337c and fs3 == 0 and fe3 == 0xfc and fm3 == 0x17af6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2d32f7; op2val:0xbf60337c;
op3val:0x7e17af6d; valaddr_reg:x3; val_offset:720*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 720*FLEN/8, x4, x1, x2)

inst_241:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2d32f7 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x60337c and fs3 == 0 and fe3 == 0xfc and fm3 == 0x17af6d and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2d32f7; op2val:0xbf60337c;
op3val:0x7e17af6d; valaddr_reg:x3; val_offset:723*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 723*FLEN/8, x4, x1, x2)

inst_242:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2d32f7 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x60337c and fs3 == 0 and fe3 == 0xfc and fm3 == 0x17af6d and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2d32f7; op2val:0xbf60337c;
op3val:0x7e17af6d; valaddr_reg:x3; val_offset:726*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 726*FLEN/8, x4, x1, x2)

inst_243:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2d32f7 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x60337c and fs3 == 0 and fe3 == 0xfc and fm3 == 0x17af6d and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2d32f7; op2val:0xbf60337c;
op3val:0x7e17af6d; valaddr_reg:x3; val_offset:729*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 729*FLEN/8, x4, x1, x2)

inst_244:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2d32f7 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x60337c and fs3 == 0 and fe3 == 0xfc and fm3 == 0x17af6d and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2d32f7; op2val:0xbf60337c;
op3val:0x7e17af6d; valaddr_reg:x3; val_offset:732*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 732*FLEN/8, x4, x1, x2)

inst_245:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e1c2f and fs2 == 1 and fe2 == 0x81 and fm2 == 0x07d476 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x38c2b9 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2e1c2f; op2val:0xc087d476;
op3val:0x7f38c2b9; valaddr_reg:x3; val_offset:735*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 735*FLEN/8, x4, x1, x2)

inst_246:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e1c2f and fs2 == 1 and fe2 == 0x81 and fm2 == 0x07d476 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x38c2b9 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2e1c2f; op2val:0xc087d476;
op3val:0x7f38c2b9; valaddr_reg:x3; val_offset:738*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 738*FLEN/8, x4, x1, x2)

inst_247:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e1c2f and fs2 == 1 and fe2 == 0x81 and fm2 == 0x07d476 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x38c2b9 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2e1c2f; op2val:0xc087d476;
op3val:0x7f38c2b9; valaddr_reg:x3; val_offset:741*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 741*FLEN/8, x4, x1, x2)

inst_248:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e1c2f and fs2 == 1 and fe2 == 0x81 and fm2 == 0x07d476 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x38c2b9 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2e1c2f; op2val:0xc087d476;
op3val:0x7f38c2b9; valaddr_reg:x3; val_offset:744*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 744*FLEN/8, x4, x1, x2)

inst_249:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e1c2f and fs2 == 1 and fe2 == 0x81 and fm2 == 0x07d476 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x38c2b9 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2e1c2f; op2val:0xc087d476;
op3val:0x7f38c2b9; valaddr_reg:x3; val_offset:747*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 747*FLEN/8, x4, x1, x2)

inst_250:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3034a2 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12a75c and fs3 == 0 and fe3 == 0xfd and fm3 == 0x49e26c and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3034a2; op2val:0xc012a75c;
op3val:0x7ec9e26c; valaddr_reg:x3; val_offset:750*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 750*FLEN/8, x4, x1, x2)

inst_251:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3034a2 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12a75c and fs3 == 0 and fe3 == 0xfd and fm3 == 0x49e26c and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3034a2; op2val:0xc012a75c;
op3val:0x7ec9e26c; valaddr_reg:x3; val_offset:753*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 753*FLEN/8, x4, x1, x2)

inst_252:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3034a2 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12a75c and fs3 == 0 and fe3 == 0xfd and fm3 == 0x49e26c and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3034a2; op2val:0xc012a75c;
op3val:0x7ec9e26c; valaddr_reg:x3; val_offset:756*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 756*FLEN/8, x4, x1, x2)

inst_253:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3034a2 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12a75c and fs3 == 0 and fe3 == 0xfd and fm3 == 0x49e26c and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3034a2; op2val:0xc012a75c;
op3val:0x7ec9e26c; valaddr_reg:x3; val_offset:759*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 759*FLEN/8, x4, x1, x2)

inst_254:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3034a2 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12a75c and fs3 == 0 and fe3 == 0xfd and fm3 == 0x49e26c and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3034a2; op2val:0xc012a75c;
op3val:0x7ec9e26c; valaddr_reg:x3; val_offset:762*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 762*FLEN/8, x4, x1, x2)

inst_255:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31f5db and fs2 == 1 and fe2 == 0x7f and fm2 == 0x628967 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x1d7a90 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31f5db; op2val:0xbfe28967;
op3val:0x7e9d7a90; valaddr_reg:x3; val_offset:765*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 765*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_3)

inst_256:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31f5db and fs2 == 1 and fe2 == 0x7f and fm2 == 0x628967 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x1d7a90 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31f5db; op2val:0xbfe28967;
op3val:0x7e9d7a90; valaddr_reg:x3; val_offset:768*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 768*FLEN/8, x4, x1, x2)

inst_257:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31f5db and fs2 == 1 and fe2 == 0x7f and fm2 == 0x628967 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x1d7a90 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31f5db; op2val:0xbfe28967;
op3val:0x7e9d7a90; valaddr_reg:x3; val_offset:771*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 771*FLEN/8, x4, x1, x2)

inst_258:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31f5db and fs2 == 1 and fe2 == 0x7f and fm2 == 0x628967 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x1d7a90 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31f5db; op2val:0xbfe28967;
op3val:0x7e9d7a90; valaddr_reg:x3; val_offset:774*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 774*FLEN/8, x4, x1, x2)

inst_259:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31f5db and fs2 == 1 and fe2 == 0x7f and fm2 == 0x628967 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x1d7a90 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31f5db; op2val:0xbfe28967;
op3val:0x7e9d7a90; valaddr_reg:x3; val_offset:777*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 777*FLEN/8, x4, x1, x2)

inst_260:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35114f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x46436e and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0c3b14 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35114f; op2val:0xbfc6436e;
op3val:0x7e8c3b14; valaddr_reg:x3; val_offset:780*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 780*FLEN/8, x4, x1, x2)

inst_261:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35114f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x46436e and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0c3b14 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35114f; op2val:0xbfc6436e;
op3val:0x7e8c3b14; valaddr_reg:x3; val_offset:783*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 783*FLEN/8, x4, x1, x2)

inst_262:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35114f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x46436e and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0c3b14 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35114f; op2val:0xbfc6436e;
op3val:0x7e8c3b14; valaddr_reg:x3; val_offset:786*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 786*FLEN/8, x4, x1, x2)

inst_263:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35114f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x46436e and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0c3b14 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35114f; op2val:0xbfc6436e;
op3val:0x7e8c3b14; valaddr_reg:x3; val_offset:789*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 789*FLEN/8, x4, x1, x2)

inst_264:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35114f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x46436e and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0c3b14 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35114f; op2val:0xbfc6436e;
op3val:0x7e8c3b14; valaddr_reg:x3; val_offset:792*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 792*FLEN/8, x4, x1, x2)

inst_265:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x424f27 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2f8ce0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x053f09 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e424f27; op2val:0xc02f8ce0;
op3val:0x7f053f09; valaddr_reg:x3; val_offset:795*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 795*FLEN/8, x4, x1, x2)

inst_266:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x424f27 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2f8ce0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x053f09 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e424f27; op2val:0xc02f8ce0;
op3val:0x7f053f09; valaddr_reg:x3; val_offset:798*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 798*FLEN/8, x4, x1, x2)

inst_267:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x424f27 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2f8ce0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x053f09 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e424f27; op2val:0xc02f8ce0;
op3val:0x7f053f09; valaddr_reg:x3; val_offset:801*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 801*FLEN/8, x4, x1, x2)

inst_268:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x424f27 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2f8ce0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x053f09 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e424f27; op2val:0xc02f8ce0;
op3val:0x7f053f09; valaddr_reg:x3; val_offset:804*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 804*FLEN/8, x4, x1, x2)

inst_269:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x424f27 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2f8ce0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x053f09 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e424f27; op2val:0xc02f8ce0;
op3val:0x7f053f09; valaddr_reg:x3; val_offset:807*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 807*FLEN/8, x4, x1, x2)

inst_270:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x466afe and fs2 == 1 and fe2 == 0x80 and fm2 == 0x75a3a7 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3e633d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e466afe; op2val:0xc075a3a7;
op3val:0x7f3e633d; valaddr_reg:x3; val_offset:810*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 810*FLEN/8, x4, x1, x2)

inst_271:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x466afe and fs2 == 1 and fe2 == 0x80 and fm2 == 0x75a3a7 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3e633d and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e466afe; op2val:0xc075a3a7;
op3val:0x7f3e633d; valaddr_reg:x3; val_offset:813*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 813*FLEN/8, x4, x1, x2)

inst_272:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x466afe and fs2 == 1 and fe2 == 0x80 and fm2 == 0x75a3a7 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3e633d and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e466afe; op2val:0xc075a3a7;
op3val:0x7f3e633d; valaddr_reg:x3; val_offset:816*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 816*FLEN/8, x4, x1, x2)

inst_273:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x466afe and fs2 == 1 and fe2 == 0x80 and fm2 == 0x75a3a7 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3e633d and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e466afe; op2val:0xc075a3a7;
op3val:0x7f3e633d; valaddr_reg:x3; val_offset:819*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 819*FLEN/8, x4, x1, x2)

inst_274:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x466afe and fs2 == 1 and fe2 == 0x80 and fm2 == 0x75a3a7 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3e633d and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e466afe; op2val:0xc075a3a7;
op3val:0x7f3e633d; valaddr_reg:x3; val_offset:822*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 822*FLEN/8, x4, x1, x2)

inst_275:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4a1236 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7e18d0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4891a8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4a1236; op2val:0xbffe18d0;
op3val:0x7ec891a8; valaddr_reg:x3; val_offset:825*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 825*FLEN/8, x4, x1, x2)

inst_276:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4a1236 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7e18d0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4891a8 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4a1236; op2val:0xbffe18d0;
op3val:0x7ec891a8; valaddr_reg:x3; val_offset:828*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 828*FLEN/8, x4, x1, x2)

inst_277:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4a1236 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7e18d0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4891a8 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4a1236; op2val:0xbffe18d0;
op3val:0x7ec891a8; valaddr_reg:x3; val_offset:831*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 831*FLEN/8, x4, x1, x2)

inst_278:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4a1236 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7e18d0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4891a8 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4a1236; op2val:0xbffe18d0;
op3val:0x7ec891a8; valaddr_reg:x3; val_offset:834*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 834*FLEN/8, x4, x1, x2)

inst_279:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4a1236 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7e18d0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4891a8 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4a1236; op2val:0xbffe18d0;
op3val:0x7ec891a8; valaddr_reg:x3; val_offset:837*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 837*FLEN/8, x4, x1, x2)

inst_280:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4cef54 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x4b1960 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x229618 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4cef54; op2val:0xbfcb1960;
op3val:0x7ea29618; valaddr_reg:x3; val_offset:840*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 840*FLEN/8, x4, x1, x2)

inst_281:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4cef54 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x4b1960 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x229618 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4cef54; op2val:0xbfcb1960;
op3val:0x7ea29618; valaddr_reg:x3; val_offset:843*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 843*FLEN/8, x4, x1, x2)

inst_282:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4cef54 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x4b1960 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x229618 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4cef54; op2val:0xbfcb1960;
op3val:0x7ea29618; valaddr_reg:x3; val_offset:846*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 846*FLEN/8, x4, x1, x2)

inst_283:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4cef54 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x4b1960 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x229618 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4cef54; op2val:0xbfcb1960;
op3val:0x7ea29618; valaddr_reg:x3; val_offset:849*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 849*FLEN/8, x4, x1, x2)

inst_284:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4cef54 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x4b1960 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x229618 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4cef54; op2val:0xbfcb1960;
op3val:0x7ea29618; valaddr_reg:x3; val_offset:852*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 852*FLEN/8, x4, x1, x2)

inst_285:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5009d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x465633 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x212daa and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5009d7; op2val:0xbfc65633;
op3val:0x7ea12daa; valaddr_reg:x3; val_offset:855*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 855*FLEN/8, x4, x1, x2)

inst_286:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5009d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x465633 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x212daa and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5009d7; op2val:0xbfc65633;
op3val:0x7ea12daa; valaddr_reg:x3; val_offset:858*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 858*FLEN/8, x4, x1, x2)

inst_287:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5009d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x465633 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x212daa and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5009d7; op2val:0xbfc65633;
op3val:0x7ea12daa; valaddr_reg:x3; val_offset:861*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 861*FLEN/8, x4, x1, x2)

inst_288:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5009d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x465633 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x212daa and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5009d7; op2val:0xbfc65633;
op3val:0x7ea12daa; valaddr_reg:x3; val_offset:864*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 864*FLEN/8, x4, x1, x2)

inst_289:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5009d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x465633 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x212daa and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5009d7; op2val:0xbfc65633;
op3val:0x7ea12daa; valaddr_reg:x3; val_offset:867*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 867*FLEN/8, x4, x1, x2)

inst_290:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x526383 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x084582 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x5ffbfb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e526383; op2val:0xbf884582;
op3val:0x7e5ffbfb; valaddr_reg:x3; val_offset:870*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 870*FLEN/8, x4, x1, x2)

inst_291:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x526383 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x084582 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x5ffbfb and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e526383; op2val:0xbf884582;
op3val:0x7e5ffbfb; valaddr_reg:x3; val_offset:873*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 873*FLEN/8, x4, x1, x2)

inst_292:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x526383 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x084582 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x5ffbfb and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e526383; op2val:0xbf884582;
op3val:0x7e5ffbfb; valaddr_reg:x3; val_offset:876*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 876*FLEN/8, x4, x1, x2)

inst_293:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x526383 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x084582 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x5ffbfb and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e526383; op2val:0xbf884582;
op3val:0x7e5ffbfb; valaddr_reg:x3; val_offset:879*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 879*FLEN/8, x4, x1, x2)

inst_294:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x526383 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x084582 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x5ffbfb and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e526383; op2val:0xbf884582;
op3val:0x7e5ffbfb; valaddr_reg:x3; val_offset:882*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 882*FLEN/8, x4, x1, x2)

inst_295:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54fd1e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4d0497 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2a9283 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54fd1e; op2val:0xc04d0497;
op3val:0x7f2a9283; valaddr_reg:x3; val_offset:885*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 885*FLEN/8, x4, x1, x2)

inst_296:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54fd1e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4d0497 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2a9283 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54fd1e; op2val:0xc04d0497;
op3val:0x7f2a9283; valaddr_reg:x3; val_offset:888*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 888*FLEN/8, x4, x1, x2)

inst_297:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54fd1e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4d0497 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2a9283 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54fd1e; op2val:0xc04d0497;
op3val:0x7f2a9283; valaddr_reg:x3; val_offset:891*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 891*FLEN/8, x4, x1, x2)

inst_298:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54fd1e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4d0497 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2a9283 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54fd1e; op2val:0xc04d0497;
op3val:0x7f2a9283; valaddr_reg:x3; val_offset:894*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 894*FLEN/8, x4, x1, x2)

inst_299:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54fd1e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4d0497 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2a9283 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54fd1e; op2val:0xc04d0497;
op3val:0x7f2a9283; valaddr_reg:x3; val_offset:897*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 897*FLEN/8, x4, x1, x2)

inst_300:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f19b2 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x070f39 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6b67a3 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f19b2; op2val:0xc0070f39;
op3val:0x7eeb67a3; valaddr_reg:x3; val_offset:900*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 900*FLEN/8, x4, x1, x2)

inst_301:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f19b2 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x070f39 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6b67a3 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f19b2; op2val:0xc0070f39;
op3val:0x7eeb67a3; valaddr_reg:x3; val_offset:903*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 903*FLEN/8, x4, x1, x2)

inst_302:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f19b2 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x070f39 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6b67a3 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f19b2; op2val:0xc0070f39;
op3val:0x7eeb67a3; valaddr_reg:x3; val_offset:906*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 906*FLEN/8, x4, x1, x2)

inst_303:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f19b2 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x070f39 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6b67a3 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f19b2; op2val:0xc0070f39;
op3val:0x7eeb67a3; valaddr_reg:x3; val_offset:909*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 909*FLEN/8, x4, x1, x2)

inst_304:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f19b2 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x070f39 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6b67a3 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f19b2; op2val:0xc0070f39;
op3val:0x7eeb67a3; valaddr_reg:x3; val_offset:912*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 912*FLEN/8, x4, x1, x2)

inst_305:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x666f32 and fs2 == 1 and fe2 == 0x7a and fm2 == 0x34700f and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x226b0e and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e666f32; op2val:0xbd34700f;
op3val:0x7c226b0e; valaddr_reg:x3; val_offset:915*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 915*FLEN/8, x4, x1, x2)

inst_306:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x666f32 and fs2 == 1 and fe2 == 0x7a and fm2 == 0x34700f and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x226b0e and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e666f32; op2val:0xbd34700f;
op3val:0x7c226b0e; valaddr_reg:x3; val_offset:918*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 918*FLEN/8, x4, x1, x2)

inst_307:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x666f32 and fs2 == 1 and fe2 == 0x7a and fm2 == 0x34700f and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x226b0e and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e666f32; op2val:0xbd34700f;
op3val:0x7c226b0e; valaddr_reg:x3; val_offset:921*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 921*FLEN/8, x4, x1, x2)

inst_308:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x666f32 and fs2 == 1 and fe2 == 0x7a and fm2 == 0x34700f and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x226b0e and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e666f32; op2val:0xbd34700f;
op3val:0x7c226b0e; valaddr_reg:x3; val_offset:924*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 924*FLEN/8, x4, x1, x2)

inst_309:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x666f32 and fs2 == 1 and fe2 == 0x7a and fm2 == 0x34700f and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x226b0e and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e666f32; op2val:0xbd34700f;
op3val:0x7c226b0e; valaddr_reg:x3; val_offset:927*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 927*FLEN/8, x4, x1, x2)

inst_310:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6d2bf9 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0cf386 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0295a9 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6d2bf9; op2val:0xc00cf386;
op3val:0x7f0295a9; valaddr_reg:x3; val_offset:930*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 930*FLEN/8, x4, x1, x2)

inst_311:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6d2bf9 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0cf386 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0295a9 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6d2bf9; op2val:0xc00cf386;
op3val:0x7f0295a9; valaddr_reg:x3; val_offset:933*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 933*FLEN/8, x4, x1, x2)

inst_312:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6d2bf9 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0cf386 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0295a9 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6d2bf9; op2val:0xc00cf386;
op3val:0x7f0295a9; valaddr_reg:x3; val_offset:936*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 936*FLEN/8, x4, x1, x2)

inst_313:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6d2bf9 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0cf386 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0295a9 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6d2bf9; op2val:0xc00cf386;
op3val:0x7f0295a9; valaddr_reg:x3; val_offset:939*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 939*FLEN/8, x4, x1, x2)

inst_314:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6d2bf9 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0cf386 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0295a9 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6d2bf9; op2val:0xc00cf386;
op3val:0x7f0295a9; valaddr_reg:x3; val_offset:942*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 942*FLEN/8, x4, x1, x2)

inst_315:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x716164 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x46f058 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3b93f2 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e716164; op2val:0xc046f058;
op3val:0x7f3b93f2; valaddr_reg:x3; val_offset:945*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 945*FLEN/8, x4, x1, x2)

inst_316:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x716164 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x46f058 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3b93f2 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e716164; op2val:0xc046f058;
op3val:0x7f3b93f2; valaddr_reg:x3; val_offset:948*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 948*FLEN/8, x4, x1, x2)

inst_317:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x716164 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x46f058 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3b93f2 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e716164; op2val:0xc046f058;
op3val:0x7f3b93f2; valaddr_reg:x3; val_offset:951*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 951*FLEN/8, x4, x1, x2)

inst_318:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x716164 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x46f058 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3b93f2 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e716164; op2val:0xc046f058;
op3val:0x7f3b93f2; valaddr_reg:x3; val_offset:954*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 954*FLEN/8, x4, x1, x2)

inst_319:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x716164 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x46f058 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3b93f2 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e716164; op2val:0xc046f058;
op3val:0x7f3b93f2; valaddr_reg:x3; val_offset:957*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 957*FLEN/8, x4, x1, x2)

inst_320:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7537d6 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6dccdf and fs3 == 0 and fe3 == 0xfc and fm3 == 0x63c8ef and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7537d6; op2val:0xbf6dccdf;
op3val:0x7e63c8ef; valaddr_reg:x3; val_offset:960*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 960*FLEN/8, x4, x1, x2)

inst_321:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7537d6 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6dccdf and fs3 == 0 and fe3 == 0xfc and fm3 == 0x63c8ef and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7537d6; op2val:0xbf6dccdf;
op3val:0x7e63c8ef; valaddr_reg:x3; val_offset:963*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 963*FLEN/8, x4, x1, x2)

inst_322:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7537d6 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6dccdf and fs3 == 0 and fe3 == 0xfc and fm3 == 0x63c8ef and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7537d6; op2val:0xbf6dccdf;
op3val:0x7e63c8ef; valaddr_reg:x3; val_offset:966*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 966*FLEN/8, x4, x1, x2)

inst_323:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7537d6 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6dccdf and fs3 == 0 and fe3 == 0xfc and fm3 == 0x63c8ef and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7537d6; op2val:0xbf6dccdf;
op3val:0x7e63c8ef; valaddr_reg:x3; val_offset:969*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 969*FLEN/8, x4, x1, x2)

inst_324:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7537d6 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6dccdf and fs3 == 0 and fe3 == 0xfc and fm3 == 0x63c8ef and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7537d6; op2val:0xbf6dccdf;
op3val:0x7e63c8ef; valaddr_reg:x3; val_offset:972*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 972*FLEN/8, x4, x1, x2)

inst_325:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75b2ba and fs2 == 1 and fe2 == 0x7b and fm2 == 0x77d04c and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x6dd75c and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75b2ba; op2val:0xbdf7d04c;
op3val:0x7cedd75c; valaddr_reg:x3; val_offset:975*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 975*FLEN/8, x4, x1, x2)

inst_326:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75b2ba and fs2 == 1 and fe2 == 0x7b and fm2 == 0x77d04c and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x6dd75c and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75b2ba; op2val:0xbdf7d04c;
op3val:0x7cedd75c; valaddr_reg:x3; val_offset:978*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 978*FLEN/8, x4, x1, x2)

inst_327:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75b2ba and fs2 == 1 and fe2 == 0x7b and fm2 == 0x77d04c and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x6dd75c and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75b2ba; op2val:0xbdf7d04c;
op3val:0x7cedd75c; valaddr_reg:x3; val_offset:981*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 981*FLEN/8, x4, x1, x2)

inst_328:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75b2ba and fs2 == 1 and fe2 == 0x7b and fm2 == 0x77d04c and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x6dd75c and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75b2ba; op2val:0xbdf7d04c;
op3val:0x7cedd75c; valaddr_reg:x3; val_offset:984*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 984*FLEN/8, x4, x1, x2)

inst_329:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75b2ba and fs2 == 1 and fe2 == 0x7b and fm2 == 0x77d04c and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x6dd75c and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75b2ba; op2val:0xbdf7d04c;
op3val:0x7cedd75c; valaddr_reg:x3; val_offset:987*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 987*FLEN/8, x4, x1, x2)

inst_330:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7af3fb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2cbaf4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x295332 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7af3fb; op2val:0xc02cbaf4;
op3val:0x7f295332; valaddr_reg:x3; val_offset:990*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 990*FLEN/8, x4, x1, x2)

inst_331:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7af3fb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2cbaf4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x295332 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7af3fb; op2val:0xc02cbaf4;
op3val:0x7f295332; valaddr_reg:x3; val_offset:993*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 993*FLEN/8, x4, x1, x2)

inst_332:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7af3fb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2cbaf4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x295332 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7af3fb; op2val:0xc02cbaf4;
op3val:0x7f295332; valaddr_reg:x3; val_offset:996*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 996*FLEN/8, x4, x1, x2)

inst_333:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7af3fb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2cbaf4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x295332 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7af3fb; op2val:0xc02cbaf4;
op3val:0x7f295332; valaddr_reg:x3; val_offset:999*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 999*FLEN/8, x4, x1, x2)

inst_334:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7af3fb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2cbaf4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x295332 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7af3fb; op2val:0xc02cbaf4;
op3val:0x7f295332; valaddr_reg:x3; val_offset:1002*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1002*FLEN/8, x4, x1, x2)

inst_335:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cb9b3 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x263804 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2417b7 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cb9b3; op2val:0xc0263804;
op3val:0x7f2417b7; valaddr_reg:x3; val_offset:1005*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1005*FLEN/8, x4, x1, x2)

inst_336:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cb9b3 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x263804 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2417b7 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cb9b3; op2val:0xc0263804;
op3val:0x7f2417b7; valaddr_reg:x3; val_offset:1008*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1008*FLEN/8, x4, x1, x2)

inst_337:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cb9b3 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x263804 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2417b7 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cb9b3; op2val:0xc0263804;
op3val:0x7f2417b7; valaddr_reg:x3; val_offset:1011*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1011*FLEN/8, x4, x1, x2)

inst_338:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cb9b3 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x263804 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2417b7 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cb9b3; op2val:0xc0263804;
op3val:0x7f2417b7; valaddr_reg:x3; val_offset:1014*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1014*FLEN/8, x4, x1, x2)

inst_339:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cb9b3 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x263804 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2417b7 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cb9b3; op2val:0xc0263804;
op3val:0x7f2417b7; valaddr_reg:x3; val_offset:1017*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1017*FLEN/8, x4, x1, x2)

inst_340:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01f5dd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x02ba3e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x04bacd and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81f5dd; op2val:0xc002ba3e;
op3val:0x7f04bacd; valaddr_reg:x3; val_offset:1020*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1020*FLEN/8, x4, x1, x2)

inst_341:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01f5dd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x02ba3e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x04bacd and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81f5dd; op2val:0xc002ba3e;
op3val:0x7f04bacd; valaddr_reg:x3; val_offset:1023*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1023*FLEN/8, x4, x1, x2)

inst_342:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01f5dd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x02ba3e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x04bacd and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81f5dd; op2val:0xc002ba3e;
op3val:0x7f04bacd; valaddr_reg:x3; val_offset:1026*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1026*FLEN/8, x4, x1, x2)

inst_343:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01f5dd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x02ba3e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x04bacd and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81f5dd; op2val:0xc002ba3e;
op3val:0x7f04bacd; valaddr_reg:x3; val_offset:1029*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1029*FLEN/8, x4, x1, x2)

inst_344:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01f5dd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x02ba3e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x04bacd and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81f5dd; op2val:0xc002ba3e;
op3val:0x7f04bacd; valaddr_reg:x3; val_offset:1032*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1032*FLEN/8, x4, x1, x2)

inst_345:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04f86c and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0969f0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0ebff1 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84f86c; op2val:0xbf8969f0;
op3val:0x7e8ebff1; valaddr_reg:x3; val_offset:1035*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1035*FLEN/8, x4, x1, x2)

inst_346:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04f86c and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0969f0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0ebff1 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84f86c; op2val:0xbf8969f0;
op3val:0x7e8ebff1; valaddr_reg:x3; val_offset:1038*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1038*FLEN/8, x4, x1, x2)

inst_347:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04f86c and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0969f0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0ebff1 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84f86c; op2val:0xbf8969f0;
op3val:0x7e8ebff1; valaddr_reg:x3; val_offset:1041*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1041*FLEN/8, x4, x1, x2)

inst_348:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04f86c and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0969f0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0ebff1 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84f86c; op2val:0xbf8969f0;
op3val:0x7e8ebff1; valaddr_reg:x3; val_offset:1044*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1044*FLEN/8, x4, x1, x2)

inst_349:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04f86c and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0969f0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0ebff1 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84f86c; op2val:0xbf8969f0;
op3val:0x7e8ebff1; valaddr_reg:x3; val_offset:1047*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1047*FLEN/8, x4, x1, x2)

inst_350:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0543e0 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x00e517 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x063264 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8543e0; op2val:0xc000e517;
op3val:0x7f063264; valaddr_reg:x3; val_offset:1050*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1050*FLEN/8, x4, x1, x2)

inst_351:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0543e0 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x00e517 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x063264 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8543e0; op2val:0xc000e517;
op3val:0x7f063264; valaddr_reg:x3; val_offset:1053*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1053*FLEN/8, x4, x1, x2)

inst_352:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0543e0 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x00e517 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x063264 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8543e0; op2val:0xc000e517;
op3val:0x7f063264; valaddr_reg:x3; val_offset:1056*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1056*FLEN/8, x4, x1, x2)

inst_353:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0543e0 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x00e517 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x063264 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8543e0; op2val:0xc000e517;
op3val:0x7f063264; valaddr_reg:x3; val_offset:1059*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1059*FLEN/8, x4, x1, x2)

inst_354:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0543e0 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x00e517 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x063264 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8543e0; op2val:0xc000e517;
op3val:0x7f063264; valaddr_reg:x3; val_offset:1062*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1062*FLEN/8, x4, x1, x2)

inst_355:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x08f8b6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1d8c50 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x289736 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e88f8b6; op2val:0xc01d8c50;
op3val:0x7f289736; valaddr_reg:x3; val_offset:1065*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1065*FLEN/8, x4, x1, x2)

inst_356:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x08f8b6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1d8c50 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x289736 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e88f8b6; op2val:0xc01d8c50;
op3val:0x7f289736; valaddr_reg:x3; val_offset:1068*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1068*FLEN/8, x4, x1, x2)

inst_357:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x08f8b6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1d8c50 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x289736 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e88f8b6; op2val:0xc01d8c50;
op3val:0x7f289736; valaddr_reg:x3; val_offset:1071*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1071*FLEN/8, x4, x1, x2)

inst_358:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x08f8b6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1d8c50 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x289736 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e88f8b6; op2val:0xc01d8c50;
op3val:0x7f289736; valaddr_reg:x3; val_offset:1074*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1074*FLEN/8, x4, x1, x2)

inst_359:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x08f8b6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1d8c50 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x289736 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e88f8b6; op2val:0xc01d8c50;
op3val:0x7f289736; valaddr_reg:x3; val_offset:1077*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1077*FLEN/8, x4, x1, x2)

inst_360:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0946d5 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6a03fc and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7af9c4 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8946d5; op2val:0xbf6a03fc;
op3val:0x7e7af9c4; valaddr_reg:x3; val_offset:1080*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1080*FLEN/8, x4, x1, x2)

inst_361:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0946d5 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6a03fc and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7af9c4 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8946d5; op2val:0xbf6a03fc;
op3val:0x7e7af9c4; valaddr_reg:x3; val_offset:1083*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1083*FLEN/8, x4, x1, x2)

inst_362:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0946d5 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6a03fc and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7af9c4 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8946d5; op2val:0xbf6a03fc;
op3val:0x7e7af9c4; valaddr_reg:x3; val_offset:1086*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1086*FLEN/8, x4, x1, x2)

inst_363:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0946d5 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6a03fc and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7af9c4 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8946d5; op2val:0xbf6a03fc;
op3val:0x7e7af9c4; valaddr_reg:x3; val_offset:1089*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1089*FLEN/8, x4, x1, x2)

inst_364:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0946d5 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6a03fc and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7af9c4 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8946d5; op2val:0xbf6a03fc;
op3val:0x7e7af9c4; valaddr_reg:x3; val_offset:1092*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1092*FLEN/8, x4, x1, x2)

inst_365:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0a4d8c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f8696 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1b140f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8a4d8c; op2val:0xc00f8696;
op3val:0x7f1b140f; valaddr_reg:x3; val_offset:1095*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1095*FLEN/8, x4, x1, x2)

inst_366:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0a4d8c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f8696 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1b140f and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8a4d8c; op2val:0xc00f8696;
op3val:0x7f1b140f; valaddr_reg:x3; val_offset:1098*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1098*FLEN/8, x4, x1, x2)

inst_367:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0a4d8c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f8696 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1b140f and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8a4d8c; op2val:0xc00f8696;
op3val:0x7f1b140f; valaddr_reg:x3; val_offset:1101*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1101*FLEN/8, x4, x1, x2)

inst_368:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0a4d8c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f8696 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1b140f and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8a4d8c; op2val:0xc00f8696;
op3val:0x7f1b140f; valaddr_reg:x3; val_offset:1104*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1104*FLEN/8, x4, x1, x2)

inst_369:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0a4d8c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f8696 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1b140f and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8a4d8c; op2val:0xc00f8696;
op3val:0x7f1b140f; valaddr_reg:x3; val_offset:1107*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1107*FLEN/8, x4, x1, x2)

inst_370:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0a6e21 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x021aed and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0cb4f9 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8a6e21; op2val:0xbf821aed;
op3val:0x7e8cb4f9; valaddr_reg:x3; val_offset:1110*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1110*FLEN/8, x4, x1, x2)

inst_371:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0a6e21 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x021aed and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0cb4f9 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8a6e21; op2val:0xbf821aed;
op3val:0x7e8cb4f9; valaddr_reg:x3; val_offset:1113*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1113*FLEN/8, x4, x1, x2)

inst_372:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0a6e21 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x021aed and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0cb4f9 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8a6e21; op2val:0xbf821aed;
op3val:0x7e8cb4f9; valaddr_reg:x3; val_offset:1116*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1116*FLEN/8, x4, x1, x2)

inst_373:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0a6e21 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x021aed and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0cb4f9 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8a6e21; op2val:0xbf821aed;
op3val:0x7e8cb4f9; valaddr_reg:x3; val_offset:1119*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1119*FLEN/8, x4, x1, x2)

inst_374:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0a6e21 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x021aed and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0cb4f9 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8a6e21; op2val:0xbf821aed;
op3val:0x7e8cb4f9; valaddr_reg:x3; val_offset:1122*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1122*FLEN/8, x4, x1, x2)

inst_375:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ac422 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x54b01c and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6693c5 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ac422; op2val:0xbfd4b01c;
op3val:0x7ee693c5; valaddr_reg:x3; val_offset:1125*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1125*FLEN/8, x4, x1, x2)

inst_376:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ac422 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x54b01c and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6693c5 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ac422; op2val:0xbfd4b01c;
op3val:0x7ee693c5; valaddr_reg:x3; val_offset:1128*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1128*FLEN/8, x4, x1, x2)

inst_377:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ac422 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x54b01c and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6693c5 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ac422; op2val:0xbfd4b01c;
op3val:0x7ee693c5; valaddr_reg:x3; val_offset:1131*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1131*FLEN/8, x4, x1, x2)

inst_378:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ac422 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x54b01c and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6693c5 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ac422; op2val:0xbfd4b01c;
op3val:0x7ee693c5; valaddr_reg:x3; val_offset:1134*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1134*FLEN/8, x4, x1, x2)

inst_379:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ac422 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x54b01c and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6693c5 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ac422; op2val:0xbfd4b01c;
op3val:0x7ee693c5; valaddr_reg:x3; val_offset:1137*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1137*FLEN/8, x4, x1, x2)

inst_380:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0b140c and fs2 == 1 and fe2 == 0x7f and fm2 == 0x171595 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x24291a and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8b140c; op2val:0xbf971595;
op3val:0x7ea4291a; valaddr_reg:x3; val_offset:1140*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1140*FLEN/8, x4, x1, x2)

inst_381:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0b140c and fs2 == 1 and fe2 == 0x7f and fm2 == 0x171595 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x24291a and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8b140c; op2val:0xbf971595;
op3val:0x7ea4291a; valaddr_reg:x3; val_offset:1143*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1143*FLEN/8, x4, x1, x2)

inst_382:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0b140c and fs2 == 1 and fe2 == 0x7f and fm2 == 0x171595 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x24291a and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8b140c; op2val:0xbf971595;
op3val:0x7ea4291a; valaddr_reg:x3; val_offset:1146*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1146*FLEN/8, x4, x1, x2)

inst_383:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0b140c and fs2 == 1 and fe2 == 0x7f and fm2 == 0x171595 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x24291a and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8b140c; op2val:0xbf971595;
op3val:0x7ea4291a; valaddr_reg:x3; val_offset:1149*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1149*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_4)

inst_384:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0b140c and fs2 == 1 and fe2 == 0x7f and fm2 == 0x171595 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x24291a and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8b140c; op2val:0xbf971595;
op3val:0x7ea4291a; valaddr_reg:x3; val_offset:1152*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1152*FLEN/8, x4, x1, x2)

inst_385:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0bd04c and fs2 == 1 and fe2 == 0x7f and fm2 == 0x1804d2 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x260c9f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8bd04c; op2val:0xbf9804d2;
op3val:0x7ea60c9f; valaddr_reg:x3; val_offset:1155*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1155*FLEN/8, x4, x1, x2)

inst_386:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0bd04c and fs2 == 1 and fe2 == 0x7f and fm2 == 0x1804d2 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x260c9f and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8bd04c; op2val:0xbf9804d2;
op3val:0x7ea60c9f; valaddr_reg:x3; val_offset:1158*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1158*FLEN/8, x4, x1, x2)

inst_387:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0bd04c and fs2 == 1 and fe2 == 0x7f and fm2 == 0x1804d2 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x260c9f and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8bd04c; op2val:0xbf9804d2;
op3val:0x7ea60c9f; valaddr_reg:x3; val_offset:1161*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1161*FLEN/8, x4, x1, x2)

inst_388:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0bd04c and fs2 == 1 and fe2 == 0x7f and fm2 == 0x1804d2 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x260c9f and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8bd04c; op2val:0xbf9804d2;
op3val:0x7ea60c9f; valaddr_reg:x3; val_offset:1164*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1164*FLEN/8, x4, x1, x2)

inst_389:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0bd04c and fs2 == 1 and fe2 == 0x7f and fm2 == 0x1804d2 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x260c9f and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8bd04c; op2val:0xbf9804d2;
op3val:0x7ea60c9f; valaddr_reg:x3; val_offset:1167*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1167*FLEN/8, x4, x1, x2)

inst_390:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0dcb1e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x232b7a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x34c0d2 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8dcb1e; op2val:0xc0232b7a;
op3val:0x7f34c0d2; valaddr_reg:x3; val_offset:1170*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1170*FLEN/8, x4, x1, x2)

inst_391:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0dcb1e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x232b7a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x34c0d2 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8dcb1e; op2val:0xc0232b7a;
op3val:0x7f34c0d2; valaddr_reg:x3; val_offset:1173*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1173*FLEN/8, x4, x1, x2)

inst_392:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0dcb1e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x232b7a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x34c0d2 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8dcb1e; op2val:0xc0232b7a;
op3val:0x7f34c0d2; valaddr_reg:x3; val_offset:1176*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1176*FLEN/8, x4, x1, x2)

inst_393:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0dcb1e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x232b7a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x34c0d2 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8dcb1e; op2val:0xc0232b7a;
op3val:0x7f34c0d2; valaddr_reg:x3; val_offset:1179*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1179*FLEN/8, x4, x1, x2)

inst_394:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0dcb1e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x232b7a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x34c0d2 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8dcb1e; op2val:0xc0232b7a;
op3val:0x7f34c0d2; valaddr_reg:x3; val_offset:1182*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1182*FLEN/8, x4, x1, x2)

inst_395:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0e11bf and fs2 == 1 and fe2 == 0x80 and fm2 == 0x25d24d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x380c4c and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8e11bf; op2val:0xc025d24d;
op3val:0x7f380c4c; valaddr_reg:x3; val_offset:1185*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1185*FLEN/8, x4, x1, x2)

inst_396:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0e11bf and fs2 == 1 and fe2 == 0x80 and fm2 == 0x25d24d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x380c4c and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8e11bf; op2val:0xc025d24d;
op3val:0x7f380c4c; valaddr_reg:x3; val_offset:1188*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1188*FLEN/8, x4, x1, x2)

inst_397:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0e11bf and fs2 == 1 and fe2 == 0x80 and fm2 == 0x25d24d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x380c4c and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8e11bf; op2val:0xc025d24d;
op3val:0x7f380c4c; valaddr_reg:x3; val_offset:1191*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1191*FLEN/8, x4, x1, x2)

inst_398:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0e11bf and fs2 == 1 and fe2 == 0x80 and fm2 == 0x25d24d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x380c4c and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8e11bf; op2val:0xc025d24d;
op3val:0x7f380c4c; valaddr_reg:x3; val_offset:1194*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1194*FLEN/8, x4, x1, x2)

inst_399:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0e11bf and fs2 == 1 and fe2 == 0x80 and fm2 == 0x25d24d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x380c4c and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8e11bf; op2val:0xc025d24d;
op3val:0x7f380c4c; valaddr_reg:x3; val_offset:1197*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1197*FLEN/8, x4, x1, x2)

inst_400:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ea689 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x22c32f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x35644c and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ea689; op2val:0xc022c32f;
op3val:0x7f35644c; valaddr_reg:x3; val_offset:1200*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1200*FLEN/8, x4, x1, x2)

inst_401:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ea689 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x22c32f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x35644c and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ea689; op2val:0xc022c32f;
op3val:0x7f35644c; valaddr_reg:x3; val_offset:1203*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1203*FLEN/8, x4, x1, x2)

inst_402:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ea689 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x22c32f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x35644c and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ea689; op2val:0xc022c32f;
op3val:0x7f35644c; valaddr_reg:x3; val_offset:1206*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1206*FLEN/8, x4, x1, x2)

inst_403:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ea689 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x22c32f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x35644c and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ea689; op2val:0xc022c32f;
op3val:0x7f35644c; valaddr_reg:x3; val_offset:1209*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1209*FLEN/8, x4, x1, x2)

inst_404:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ea689 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x22c32f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x35644c and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ea689; op2val:0xc022c32f;
op3val:0x7f35644c; valaddr_reg:x3; val_offset:1212*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1212*FLEN/8, x4, x1, x2)

inst_405:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10bd56 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0da990 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x20304e and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90bd56; op2val:0xc00da990;
op3val:0x7f20304e; valaddr_reg:x3; val_offset:1215*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1215*FLEN/8, x4, x1, x2)

inst_406:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10bd56 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0da990 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x20304e and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90bd56; op2val:0xc00da990;
op3val:0x7f20304e; valaddr_reg:x3; val_offset:1218*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1218*FLEN/8, x4, x1, x2)

inst_407:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10bd56 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0da990 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x20304e and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90bd56; op2val:0xc00da990;
op3val:0x7f20304e; valaddr_reg:x3; val_offset:1221*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1221*FLEN/8, x4, x1, x2)

inst_408:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10bd56 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0da990 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x20304e and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90bd56; op2val:0xc00da990;
op3val:0x7f20304e; valaddr_reg:x3; val_offset:1224*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1224*FLEN/8, x4, x1, x2)

inst_409:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10bd56 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0da990 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x20304e and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90bd56; op2val:0xc00da990;
op3val:0x7f20304e; valaddr_reg:x3; val_offset:1227*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1227*FLEN/8, x4, x1, x2)

inst_410:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10d8c5 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x603fc7 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7dc386 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90d8c5; op2val:0xbfe03fc7;
op3val:0x7efdc386; valaddr_reg:x3; val_offset:1230*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1230*FLEN/8, x4, x1, x2)

inst_411:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10d8c5 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x603fc7 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7dc386 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90d8c5; op2val:0xbfe03fc7;
op3val:0x7efdc386; valaddr_reg:x3; val_offset:1233*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1233*FLEN/8, x4, x1, x2)

inst_412:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10d8c5 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x603fc7 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7dc386 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90d8c5; op2val:0xbfe03fc7;
op3val:0x7efdc386; valaddr_reg:x3; val_offset:1236*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1236*FLEN/8, x4, x1, x2)

inst_413:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10d8c5 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x603fc7 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7dc386 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90d8c5; op2val:0xbfe03fc7;
op3val:0x7efdc386; valaddr_reg:x3; val_offset:1239*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1239*FLEN/8, x4, x1, x2)

inst_414:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10d8c5 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x603fc7 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7dc386 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90d8c5; op2val:0xbfe03fc7;
op3val:0x7efdc386; valaddr_reg:x3; val_offset:1242*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1242*FLEN/8, x4, x1, x2)

inst_415:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1190a0 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x199c78 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x2eb0d1 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9190a0; op2val:0xbe999c78;
op3val:0x7daeb0d1; valaddr_reg:x3; val_offset:1245*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1245*FLEN/8, x4, x1, x2)

inst_416:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1190a0 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x199c78 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x2eb0d1 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9190a0; op2val:0xbe999c78;
op3val:0x7daeb0d1; valaddr_reg:x3; val_offset:1248*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1248*FLEN/8, x4, x1, x2)

inst_417:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1190a0 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x199c78 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x2eb0d1 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9190a0; op2val:0xbe999c78;
op3val:0x7daeb0d1; valaddr_reg:x3; val_offset:1251*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1251*FLEN/8, x4, x1, x2)

inst_418:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1190a0 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x199c78 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x2eb0d1 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9190a0; op2val:0xbe999c78;
op3val:0x7daeb0d1; valaddr_reg:x3; val_offset:1254*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1254*FLEN/8, x4, x1, x2)

inst_419:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1190a0 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x199c78 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x2eb0d1 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9190a0; op2val:0xbe999c78;
op3val:0x7daeb0d1; valaddr_reg:x3; val_offset:1257*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1257*FLEN/8, x4, x1, x2)

inst_420:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x134fd6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x366346 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x51e7c5 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e934fd6; op2val:0xbfb66346;
op3val:0x7ed1e7c5; valaddr_reg:x3; val_offset:1260*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1260*FLEN/8, x4, x1, x2)

inst_421:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x134fd6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x366346 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x51e7c5 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e934fd6; op2val:0xbfb66346;
op3val:0x7ed1e7c5; valaddr_reg:x3; val_offset:1263*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1263*FLEN/8, x4, x1, x2)

inst_422:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x134fd6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x366346 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x51e7c5 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e934fd6; op2val:0xbfb66346;
op3val:0x7ed1e7c5; valaddr_reg:x3; val_offset:1266*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1266*FLEN/8, x4, x1, x2)

inst_423:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x134fd6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x366346 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x51e7c5 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e934fd6; op2val:0xbfb66346;
op3val:0x7ed1e7c5; valaddr_reg:x3; val_offset:1269*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1269*FLEN/8, x4, x1, x2)

inst_424:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x134fd6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x366346 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x51e7c5 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e934fd6; op2val:0xbfb66346;
op3val:0x7ed1e7c5; valaddr_reg:x3; val_offset:1272*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1272*FLEN/8, x4, x1, x2)

inst_425:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x145a12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3e11a6 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5c4a28 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e945a12; op2val:0xbfbe11a6;
op3val:0x7edc4a28; valaddr_reg:x3; val_offset:1275*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1275*FLEN/8, x4, x1, x2)

inst_426:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x145a12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3e11a6 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5c4a28 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e945a12; op2val:0xbfbe11a6;
op3val:0x7edc4a28; valaddr_reg:x3; val_offset:1278*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1278*FLEN/8, x4, x1, x2)

inst_427:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x145a12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3e11a6 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5c4a28 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e945a12; op2val:0xbfbe11a6;
op3val:0x7edc4a28; valaddr_reg:x3; val_offset:1281*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1281*FLEN/8, x4, x1, x2)

inst_428:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x145a12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3e11a6 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5c4a28 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e945a12; op2val:0xbfbe11a6;
op3val:0x7edc4a28; valaddr_reg:x3; val_offset:1284*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1284*FLEN/8, x4, x1, x2)

inst_429:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x145a12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3e11a6 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5c4a28 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e945a12; op2val:0xbfbe11a6;
op3val:0x7edc4a28; valaddr_reg:x3; val_offset:1287*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1287*FLEN/8, x4, x1, x2)

inst_430:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x14f81b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x58038b and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7b66cd and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e94f81b; op2val:0xbfd8038b;
op3val:0x7efb66cd; valaddr_reg:x3; val_offset:1290*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1290*FLEN/8, x4, x1, x2)

inst_431:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x14f81b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x58038b and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7b66cd and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e94f81b; op2val:0xbfd8038b;
op3val:0x7efb66cd; valaddr_reg:x3; val_offset:1293*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1293*FLEN/8, x4, x1, x2)

inst_432:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x14f81b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x58038b and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7b66cd and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e94f81b; op2val:0xbfd8038b;
op3val:0x7efb66cd; valaddr_reg:x3; val_offset:1296*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1296*FLEN/8, x4, x1, x2)

inst_433:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x14f81b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x58038b and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7b66cd and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e94f81b; op2val:0xbfd8038b;
op3val:0x7efb66cd; valaddr_reg:x3; val_offset:1299*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1299*FLEN/8, x4, x1, x2)

inst_434:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x14f81b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x58038b and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7b66cd and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e94f81b; op2val:0xbfd8038b;
op3val:0x7efb66cd; valaddr_reg:x3; val_offset:1302*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1302*FLEN/8, x4, x1, x2)

inst_435:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x157cfe and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0dc9a3 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x25972e and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e957cfe; op2val:0xbf8dc9a3;
op3val:0x7ea5972e; valaddr_reg:x3; val_offset:1305*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1305*FLEN/8, x4, x1, x2)

inst_436:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x157cfe and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0dc9a3 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x25972e and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e957cfe; op2val:0xbf8dc9a3;
op3val:0x7ea5972e; valaddr_reg:x3; val_offset:1308*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1308*FLEN/8, x4, x1, x2)

inst_437:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x157cfe and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0dc9a3 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x25972e and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e957cfe; op2val:0xbf8dc9a3;
op3val:0x7ea5972e; valaddr_reg:x3; val_offset:1311*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1311*FLEN/8, x4, x1, x2)

inst_438:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x157cfe and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0dc9a3 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x25972e and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e957cfe; op2val:0xbf8dc9a3;
op3val:0x7ea5972e; valaddr_reg:x3; val_offset:1314*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1314*FLEN/8, x4, x1, x2)

inst_439:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x157cfe and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0dc9a3 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x25972e and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e957cfe; op2val:0xbf8dc9a3;
op3val:0x7ea5972e; valaddr_reg:x3; val_offset:1317*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1317*FLEN/8, x4, x1, x2)

inst_440:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17337c and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6a94aa and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0a8cde and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97337c; op2val:0xbf6a94aa;
op3val:0x7e8a8cde; valaddr_reg:x3; val_offset:1320*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1320*FLEN/8, x4, x1, x2)

inst_441:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17337c and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6a94aa and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0a8cde and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97337c; op2val:0xbf6a94aa;
op3val:0x7e8a8cde; valaddr_reg:x3; val_offset:1323*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1323*FLEN/8, x4, x1, x2)

inst_442:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17337c and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6a94aa and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0a8cde and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97337c; op2val:0xbf6a94aa;
op3val:0x7e8a8cde; valaddr_reg:x3; val_offset:1326*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1326*FLEN/8, x4, x1, x2)

inst_443:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17337c and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6a94aa and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0a8cde and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97337c; op2val:0xbf6a94aa;
op3val:0x7e8a8cde; valaddr_reg:x3; val_offset:1329*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1329*FLEN/8, x4, x1, x2)

inst_444:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17337c and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6a94aa and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0a8cde and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97337c; op2val:0xbf6a94aa;
op3val:0x7e8a8cde; valaddr_reg:x3; val_offset:1332*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1332*FLEN/8, x4, x1, x2)

inst_445:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x175320 and fs2 == 1 and fe2 == 0x7b and fm2 == 0x35a312 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x56bc56 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e975320; op2val:0xbdb5a312;
op3val:0x7cd6bc56; valaddr_reg:x3; val_offset:1335*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1335*FLEN/8, x4, x1, x2)

inst_446:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x175320 and fs2 == 1 and fe2 == 0x7b and fm2 == 0x35a312 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x56bc56 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e975320; op2val:0xbdb5a312;
op3val:0x7cd6bc56; valaddr_reg:x3; val_offset:1338*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1338*FLEN/8, x4, x1, x2)

inst_447:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x175320 and fs2 == 1 and fe2 == 0x7b and fm2 == 0x35a312 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x56bc56 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e975320; op2val:0xbdb5a312;
op3val:0x7cd6bc56; valaddr_reg:x3; val_offset:1341*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1341*FLEN/8, x4, x1, x2)

inst_448:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x175320 and fs2 == 1 and fe2 == 0x7b and fm2 == 0x35a312 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x56bc56 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e975320; op2val:0xbdb5a312;
op3val:0x7cd6bc56; valaddr_reg:x3; val_offset:1344*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1344*FLEN/8, x4, x1, x2)

inst_449:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x175320 and fs2 == 1 and fe2 == 0x7b and fm2 == 0x35a312 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x56bc56 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e975320; op2val:0xbdb5a312;
op3val:0x7cd6bc56; valaddr_reg:x3; val_offset:1347*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1347*FLEN/8, x4, x1, x2)

inst_450:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x182a54 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x56b7cf and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7f4148 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e982a54; op2val:0xbed6b7cf;
op3val:0x7dff4148; valaddr_reg:x3; val_offset:1350*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1350*FLEN/8, x4, x1, x2)

inst_451:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x182a54 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x56b7cf and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7f4148 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e982a54; op2val:0xbed6b7cf;
op3val:0x7dff4148; valaddr_reg:x3; val_offset:1353*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1353*FLEN/8, x4, x1, x2)

inst_452:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x182a54 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x56b7cf and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7f4148 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e982a54; op2val:0xbed6b7cf;
op3val:0x7dff4148; valaddr_reg:x3; val_offset:1356*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1356*FLEN/8, x4, x1, x2)

inst_453:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x182a54 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x56b7cf and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7f4148 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e982a54; op2val:0xbed6b7cf;
op3val:0x7dff4148; valaddr_reg:x3; val_offset:1359*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1359*FLEN/8, x4, x1, x2)

inst_454:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x182a54 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x56b7cf and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7f4148 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e982a54; op2val:0xbed6b7cf;
op3val:0x7dff4148; valaddr_reg:x3; val_offset:1362*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1362*FLEN/8, x4, x1, x2)

inst_455:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x186690 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5f8822 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x051262 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e986690; op2val:0xbfdf8822;
op3val:0x7f051262; valaddr_reg:x3; val_offset:1365*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1365*FLEN/8, x4, x1, x2)

inst_456:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x186690 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5f8822 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x051262 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e986690; op2val:0xbfdf8822;
op3val:0x7f051262; valaddr_reg:x3; val_offset:1368*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1368*FLEN/8, x4, x1, x2)

inst_457:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x186690 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5f8822 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x051262 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e986690; op2val:0xbfdf8822;
op3val:0x7f051262; valaddr_reg:x3; val_offset:1371*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1371*FLEN/8, x4, x1, x2)

inst_458:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x186690 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5f8822 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x051262 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e986690; op2val:0xbfdf8822;
op3val:0x7f051262; valaddr_reg:x3; val_offset:1374*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1374*FLEN/8, x4, x1, x2)

inst_459:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x186690 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5f8822 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x051262 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e986690; op2val:0xbfdf8822;
op3val:0x7f051262; valaddr_reg:x3; val_offset:1377*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1377*FLEN/8, x4, x1, x2)

inst_460:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1c8afc and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0d9df0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2d3243 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9c8afc; op2val:0xc00d9df0;
op3val:0x7f2d3243; valaddr_reg:x3; val_offset:1380*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1380*FLEN/8, x4, x1, x2)

inst_461:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1c8afc and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0d9df0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2d3243 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9c8afc; op2val:0xc00d9df0;
op3val:0x7f2d3243; valaddr_reg:x3; val_offset:1383*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1383*FLEN/8, x4, x1, x2)

inst_462:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1c8afc and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0d9df0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2d3243 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9c8afc; op2val:0xc00d9df0;
op3val:0x7f2d3243; valaddr_reg:x3; val_offset:1386*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1386*FLEN/8, x4, x1, x2)

inst_463:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1c8afc and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0d9df0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2d3243 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9c8afc; op2val:0xc00d9df0;
op3val:0x7f2d3243; valaddr_reg:x3; val_offset:1389*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1389*FLEN/8, x4, x1, x2)

inst_464:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1c8afc and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0d9df0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2d3243 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9c8afc; op2val:0xc00d9df0;
op3val:0x7f2d3243; valaddr_reg:x3; val_offset:1392*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1392*FLEN/8, x4, x1, x2)

inst_465:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1c9a88 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x541f4f and fs3 == 0 and fe3 == 0xfc and fm3 == 0x01c320 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9c9a88; op2val:0xbed41f4f;
op3val:0x7e01c320; valaddr_reg:x3; val_offset:1395*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1395*FLEN/8, x4, x1, x2)

inst_466:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1c9a88 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x541f4f and fs3 == 0 and fe3 == 0xfc and fm3 == 0x01c320 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9c9a88; op2val:0xbed41f4f;
op3val:0x7e01c320; valaddr_reg:x3; val_offset:1398*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1398*FLEN/8, x4, x1, x2)

inst_467:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1c9a88 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x541f4f and fs3 == 0 and fe3 == 0xfc and fm3 == 0x01c320 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9c9a88; op2val:0xbed41f4f;
op3val:0x7e01c320; valaddr_reg:x3; val_offset:1401*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1401*FLEN/8, x4, x1, x2)

inst_468:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1c9a88 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x541f4f and fs3 == 0 and fe3 == 0xfc and fm3 == 0x01c320 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9c9a88; op2val:0xbed41f4f;
op3val:0x7e01c320; valaddr_reg:x3; val_offset:1404*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1404*FLEN/8, x4, x1, x2)

inst_469:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1c9a88 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x541f4f and fs3 == 0 and fe3 == 0xfc and fm3 == 0x01c320 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9c9a88; op2val:0xbed41f4f;
op3val:0x7e01c320; valaddr_reg:x3; val_offset:1407*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1407*FLEN/8, x4, x1, x2)

inst_470:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1e21df and fs2 == 1 and fe2 == 0x7e and fm2 == 0x60a463 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0ac32e and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9e21df; op2val:0xbf60a463;
op3val:0x7e8ac32e; valaddr_reg:x3; val_offset:1410*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1410*FLEN/8, x4, x1, x2)

inst_471:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1e21df and fs2 == 1 and fe2 == 0x7e and fm2 == 0x60a463 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0ac32e and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9e21df; op2val:0xbf60a463;
op3val:0x7e8ac32e; valaddr_reg:x3; val_offset:1413*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1413*FLEN/8, x4, x1, x2)

inst_472:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1e21df and fs2 == 1 and fe2 == 0x7e and fm2 == 0x60a463 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0ac32e and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9e21df; op2val:0xbf60a463;
op3val:0x7e8ac32e; valaddr_reg:x3; val_offset:1416*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1416*FLEN/8, x4, x1, x2)

inst_473:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1e21df and fs2 == 1 and fe2 == 0x7e and fm2 == 0x60a463 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0ac32e and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9e21df; op2val:0xbf60a463;
op3val:0x7e8ac32e; valaddr_reg:x3; val_offset:1419*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1419*FLEN/8, x4, x1, x2)

inst_474:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1e21df and fs2 == 1 and fe2 == 0x7e and fm2 == 0x60a463 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0ac32e and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9e21df; op2val:0xbf60a463;
op3val:0x7e8ac32e; valaddr_reg:x3; val_offset:1422*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1422*FLEN/8, x4, x1, x2)

inst_475:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f2b29 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0cb440 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2ef75a and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f2b29; op2val:0xc00cb440;
op3val:0x7f2ef75a; valaddr_reg:x3; val_offset:1425*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1425*FLEN/8, x4, x1, x2)

inst_476:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f2b29 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0cb440 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2ef75a and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f2b29; op2val:0xc00cb440;
op3val:0x7f2ef75a; valaddr_reg:x3; val_offset:1428*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1428*FLEN/8, x4, x1, x2)

inst_477:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f2b29 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0cb440 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2ef75a and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f2b29; op2val:0xc00cb440;
op3val:0x7f2ef75a; valaddr_reg:x3; val_offset:1431*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1431*FLEN/8, x4, x1, x2)

inst_478:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f2b29 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0cb440 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2ef75a and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f2b29; op2val:0xc00cb440;
op3val:0x7f2ef75a; valaddr_reg:x3; val_offset:1434*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1434*FLEN/8, x4, x1, x2)

inst_479:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f2b29 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0cb440 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2ef75a and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f2b29; op2val:0xc00cb440;
op3val:0x7f2ef75a; valaddr_reg:x3; val_offset:1437*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1437*FLEN/8, x4, x1, x2)

inst_480:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2366fd and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3d9765 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x720757 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea366fd; op2val:0xbfbd9765;
op3val:0x7ef20757; valaddr_reg:x3; val_offset:1440*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1440*FLEN/8, x4, x1, x2)

inst_481:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2366fd and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3d9765 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x720757 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea366fd; op2val:0xbfbd9765;
op3val:0x7ef20757; valaddr_reg:x3; val_offset:1443*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1443*FLEN/8, x4, x1, x2)

inst_482:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2366fd and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3d9765 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x720757 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea366fd; op2val:0xbfbd9765;
op3val:0x7ef20757; valaddr_reg:x3; val_offset:1446*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1446*FLEN/8, x4, x1, x2)

inst_483:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2366fd and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3d9765 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x720757 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea366fd; op2val:0xbfbd9765;
op3val:0x7ef20757; valaddr_reg:x3; val_offset:1449*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1449*FLEN/8, x4, x1, x2)

inst_484:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2366fd and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3d9765 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x720757 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea366fd; op2val:0xbfbd9765;
op3val:0x7ef20757; valaddr_reg:x3; val_offset:1452*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1452*FLEN/8, x4, x1, x2)

inst_485:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x28c2ff and fs2 == 1 and fe2 == 0x7f and fm2 == 0x534f40 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0b4cf7 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea8c2ff; op2val:0xbfd34f40;
op3val:0x7f0b4cf7; valaddr_reg:x3; val_offset:1455*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1455*FLEN/8, x4, x1, x2)

inst_486:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x28c2ff and fs2 == 1 and fe2 == 0x7f and fm2 == 0x534f40 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0b4cf7 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea8c2ff; op2val:0xbfd34f40;
op3val:0x7f0b4cf7; valaddr_reg:x3; val_offset:1458*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1458*FLEN/8, x4, x1, x2)

inst_487:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x28c2ff and fs2 == 1 and fe2 == 0x7f and fm2 == 0x534f40 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0b4cf7 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea8c2ff; op2val:0xbfd34f40;
op3val:0x7f0b4cf7; valaddr_reg:x3; val_offset:1461*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1461*FLEN/8, x4, x1, x2)

inst_488:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x28c2ff and fs2 == 1 and fe2 == 0x7f and fm2 == 0x534f40 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0b4cf7 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea8c2ff; op2val:0xbfd34f40;
op3val:0x7f0b4cf7; valaddr_reg:x3; val_offset:1464*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1464*FLEN/8, x4, x1, x2)

inst_489:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x28c2ff and fs2 == 1 and fe2 == 0x7f and fm2 == 0x534f40 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0b4cf7 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea8c2ff; op2val:0xbfd34f40;
op3val:0x7f0b4cf7; valaddr_reg:x3; val_offset:1467*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1467*FLEN/8, x4, x1, x2)

inst_490:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x298b8f and fs2 == 1 and fe2 == 0x7c and fm2 == 0x4151e0 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x000870 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea98b8f; op2val:0xbe4151e0;
op3val:0x7d800870; valaddr_reg:x3; val_offset:1470*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1470*FLEN/8, x4, x1, x2)

inst_491:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x298b8f and fs2 == 1 and fe2 == 0x7c and fm2 == 0x4151e0 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x000870 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea98b8f; op2val:0xbe4151e0;
op3val:0x7d800870; valaddr_reg:x3; val_offset:1473*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1473*FLEN/8, x4, x1, x2)

inst_492:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x298b8f and fs2 == 1 and fe2 == 0x7c and fm2 == 0x4151e0 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x000870 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea98b8f; op2val:0xbe4151e0;
op3val:0x7d800870; valaddr_reg:x3; val_offset:1476*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1476*FLEN/8, x4, x1, x2)

inst_493:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x298b8f and fs2 == 1 and fe2 == 0x7c and fm2 == 0x4151e0 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x000870 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea98b8f; op2val:0xbe4151e0;
op3val:0x7d800870; valaddr_reg:x3; val_offset:1479*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1479*FLEN/8, x4, x1, x2)

inst_494:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x298b8f and fs2 == 1 and fe2 == 0x7c and fm2 == 0x4151e0 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x000870 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea98b8f; op2val:0xbe4151e0;
op3val:0x7d800870; valaddr_reg:x3; val_offset:1482*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1482*FLEN/8, x4, x1, x2)

inst_495:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b48d4 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6fe0a2 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x207f4a and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab48d4; op2val:0xbf6fe0a2;
op3val:0x7ea07f4a; valaddr_reg:x3; val_offset:1485*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1485*FLEN/8, x4, x1, x2)

inst_496:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b48d4 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6fe0a2 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x207f4a and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab48d4; op2val:0xbf6fe0a2;
op3val:0x7ea07f4a; valaddr_reg:x3; val_offset:1488*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1488*FLEN/8, x4, x1, x2)

inst_497:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b48d4 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6fe0a2 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x207f4a and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab48d4; op2val:0xbf6fe0a2;
op3val:0x7ea07f4a; valaddr_reg:x3; val_offset:1491*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1491*FLEN/8, x4, x1, x2)

inst_498:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b48d4 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6fe0a2 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x207f4a and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab48d4; op2val:0xbf6fe0a2;
op3val:0x7ea07f4a; valaddr_reg:x3; val_offset:1494*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1494*FLEN/8, x4, x1, x2)

inst_499:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b48d4 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6fe0a2 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x207f4a and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab48d4; op2val:0xbf6fe0a2;
op3val:0x7ea07f4a; valaddr_reg:x3; val_offset:1497*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1497*FLEN/8, x4, x1, x2)

inst_500:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b5958 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x7842da and fs3 == 0 and fe3 == 0xfb and fm3 == 0x262b4d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab5958; op2val:0xbe7842da;
op3val:0x7da62b4d; valaddr_reg:x3; val_offset:1500*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1500*FLEN/8, x4, x1, x2)

inst_501:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b5958 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x7842da and fs3 == 0 and fe3 == 0xfb and fm3 == 0x262b4d and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab5958; op2val:0xbe7842da;
op3val:0x7da62b4d; valaddr_reg:x3; val_offset:1503*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1503*FLEN/8, x4, x1, x2)

inst_502:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b5958 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x7842da and fs3 == 0 and fe3 == 0xfb and fm3 == 0x262b4d and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab5958; op2val:0xbe7842da;
op3val:0x7da62b4d; valaddr_reg:x3; val_offset:1506*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1506*FLEN/8, x4, x1, x2)

inst_503:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b5958 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x7842da and fs3 == 0 and fe3 == 0xfb and fm3 == 0x262b4d and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab5958; op2val:0xbe7842da;
op3val:0x7da62b4d; valaddr_reg:x3; val_offset:1509*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1509*FLEN/8, x4, x1, x2)

inst_504:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b5958 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x7842da and fs3 == 0 and fe3 == 0xfb and fm3 == 0x262b4d and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab5958; op2val:0xbe7842da;
op3val:0x7da62b4d; valaddr_reg:x3; val_offset:1512*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1512*FLEN/8, x4, x1, x2)

inst_505:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2dd528 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x0f04f9 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x423ae4 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eadd528; op2val:0xbe8f04f9;
op3val:0x7dc23ae4; valaddr_reg:x3; val_offset:1515*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1515*FLEN/8, x4, x1, x2)

inst_506:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2dd528 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x0f04f9 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x423ae4 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eadd528; op2val:0xbe8f04f9;
op3val:0x7dc23ae4; valaddr_reg:x3; val_offset:1518*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1518*FLEN/8, x4, x1, x2)

inst_507:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2dd528 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x0f04f9 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x423ae4 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eadd528; op2val:0xbe8f04f9;
op3val:0x7dc23ae4; valaddr_reg:x3; val_offset:1521*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1521*FLEN/8, x4, x1, x2)

inst_508:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2dd528 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x0f04f9 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x423ae4 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eadd528; op2val:0xbe8f04f9;
op3val:0x7dc23ae4; valaddr_reg:x3; val_offset:1524*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1524*FLEN/8, x4, x1, x2)

inst_509:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2dd528 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x0f04f9 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x423ae4 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eadd528; op2val:0xbe8f04f9;
op3val:0x7dc23ae4; valaddr_reg:x3; val_offset:1527*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1527*FLEN/8, x4, x1, x2)

inst_510:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e00ba and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0bd260 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3e12c6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae00ba; op2val:0xbf8bd260;
op3val:0x7ebe12c6; valaddr_reg:x3; val_offset:1530*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1530*FLEN/8, x4, x1, x2)

inst_511:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e00ba and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0bd260 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3e12c6 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae00ba; op2val:0xbf8bd260;
op3val:0x7ebe12c6; valaddr_reg:x3; val_offset:1533*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1533*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_5)

inst_512:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e00ba and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0bd260 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3e12c6 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae00ba; op2val:0xbf8bd260;
op3val:0x7ebe12c6; valaddr_reg:x3; val_offset:1536*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1536*FLEN/8, x4, x1, x2)

inst_513:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e00ba and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0bd260 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3e12c6 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae00ba; op2val:0xbf8bd260;
op3val:0x7ebe12c6; valaddr_reg:x3; val_offset:1539*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1539*FLEN/8, x4, x1, x2)

inst_514:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e00ba and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0bd260 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3e12c6 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae00ba; op2val:0xbf8bd260;
op3val:0x7ebe12c6; valaddr_reg:x3; val_offset:1542*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1542*FLEN/8, x4, x1, x2)

inst_515:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2f4548 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x03d01a and fs3 == 0 and fe3 == 0xfd and fm3 == 0x347ddd and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaf4548; op2val:0xbf83d01a;
op3val:0x7eb47ddd; valaddr_reg:x3; val_offset:1545*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1545*FLEN/8, x4, x1, x2)

inst_516:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2f4548 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x03d01a and fs3 == 0 and fe3 == 0xfd and fm3 == 0x347ddd and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaf4548; op2val:0xbf83d01a;
op3val:0x7eb47ddd; valaddr_reg:x3; val_offset:1548*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1548*FLEN/8, x4, x1, x2)

inst_517:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2f4548 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x03d01a and fs3 == 0 and fe3 == 0xfd and fm3 == 0x347ddd and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaf4548; op2val:0xbf83d01a;
op3val:0x7eb47ddd; valaddr_reg:x3; val_offset:1551*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1551*FLEN/8, x4, x1, x2)

inst_518:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2f4548 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x03d01a and fs3 == 0 and fe3 == 0xfd and fm3 == 0x347ddd and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaf4548; op2val:0xbf83d01a;
op3val:0x7eb47ddd; valaddr_reg:x3; val_offset:1554*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1554*FLEN/8, x4, x1, x2)

inst_519:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2f4548 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x03d01a and fs3 == 0 and fe3 == 0xfd and fm3 == 0x347ddd and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaf4548; op2val:0xbf83d01a;
op3val:0x7eb47ddd; valaddr_reg:x3; val_offset:1557*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1557*FLEN/8, x4, x1, x2)

inst_520:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31ac5f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x70529b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x26caee and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1ac5f; op2val:0xbff0529b;
op3val:0x7f26caee; valaddr_reg:x3; val_offset:1560*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1560*FLEN/8, x4, x1, x2)

inst_521:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31ac5f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x70529b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x26caee and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1ac5f; op2val:0xbff0529b;
op3val:0x7f26caee; valaddr_reg:x3; val_offset:1563*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1563*FLEN/8, x4, x1, x2)

inst_522:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31ac5f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x70529b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x26caee and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1ac5f; op2val:0xbff0529b;
op3val:0x7f26caee; valaddr_reg:x3; val_offset:1566*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1566*FLEN/8, x4, x1, x2)

inst_523:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31ac5f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x70529b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x26caee and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1ac5f; op2val:0xbff0529b;
op3val:0x7f26caee; valaddr_reg:x3; val_offset:1569*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1569*FLEN/8, x4, x1, x2)

inst_524:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31ac5f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x70529b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x26caee and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1ac5f; op2val:0xbff0529b;
op3val:0x7f26caee; valaddr_reg:x3; val_offset:1572*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1572*FLEN/8, x4, x1, x2)

inst_525:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x35b43e and fs2 == 1 and fe2 == 0x7d and fm2 == 0x273191 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x6d5787 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb5b43e; op2val:0xbea73191;
op3val:0x7ded5787; valaddr_reg:x3; val_offset:1575*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1575*FLEN/8, x4, x1, x2)

inst_526:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x35b43e and fs2 == 1 and fe2 == 0x7d and fm2 == 0x273191 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x6d5787 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb5b43e; op2val:0xbea73191;
op3val:0x7ded5787; valaddr_reg:x3; val_offset:1578*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1578*FLEN/8, x4, x1, x2)

inst_527:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x35b43e and fs2 == 1 and fe2 == 0x7d and fm2 == 0x273191 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x6d5787 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb5b43e; op2val:0xbea73191;
op3val:0x7ded5787; valaddr_reg:x3; val_offset:1581*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1581*FLEN/8, x4, x1, x2)

inst_528:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x35b43e and fs2 == 1 and fe2 == 0x7d and fm2 == 0x273191 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x6d5787 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb5b43e; op2val:0xbea73191;
op3val:0x7ded5787; valaddr_reg:x3; val_offset:1584*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1584*FLEN/8, x4, x1, x2)

inst_529:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x35b43e and fs2 == 1 and fe2 == 0x7d and fm2 == 0x273191 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x6d5787 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb5b43e; op2val:0xbea73191;
op3val:0x7ded5787; valaddr_reg:x3; val_offset:1587*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1587*FLEN/8, x4, x1, x2)

inst_530:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36bc41 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x09993b and fs3 == 0 and fe3 == 0xfb and fm3 == 0x447040 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6bc41; op2val:0xbe89993b;
op3val:0x7dc47040; valaddr_reg:x3; val_offset:1590*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1590*FLEN/8, x4, x1, x2)

inst_531:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36bc41 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x09993b and fs3 == 0 and fe3 == 0xfb and fm3 == 0x447040 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6bc41; op2val:0xbe89993b;
op3val:0x7dc47040; valaddr_reg:x3; val_offset:1593*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1593*FLEN/8, x4, x1, x2)

inst_532:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36bc41 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x09993b and fs3 == 0 and fe3 == 0xfb and fm3 == 0x447040 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6bc41; op2val:0xbe89993b;
op3val:0x7dc47040; valaddr_reg:x3; val_offset:1596*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1596*FLEN/8, x4, x1, x2)

inst_533:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36bc41 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x09993b and fs3 == 0 and fe3 == 0xfb and fm3 == 0x447040 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6bc41; op2val:0xbe89993b;
op3val:0x7dc47040; valaddr_reg:x3; val_offset:1599*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1599*FLEN/8, x4, x1, x2)

inst_534:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36bc41 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x09993b and fs3 == 0 and fe3 == 0xfb and fm3 == 0x447040 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6bc41; op2val:0xbe89993b;
op3val:0x7dc47040; valaddr_reg:x3; val_offset:1602*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1602*FLEN/8, x4, x1, x2)

inst_535:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37099a and fs2 == 1 and fe2 == 0x7d and fm2 == 0x365417 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x025cf4 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7099a; op2val:0xbeb65417;
op3val:0x7e025cf4; valaddr_reg:x3; val_offset:1605*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1605*FLEN/8, x4, x1, x2)

inst_536:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37099a and fs2 == 1 and fe2 == 0x7d and fm2 == 0x365417 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x025cf4 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7099a; op2val:0xbeb65417;
op3val:0x7e025cf4; valaddr_reg:x3; val_offset:1608*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1608*FLEN/8, x4, x1, x2)

inst_537:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37099a and fs2 == 1 and fe2 == 0x7d and fm2 == 0x365417 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x025cf4 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7099a; op2val:0xbeb65417;
op3val:0x7e025cf4; valaddr_reg:x3; val_offset:1611*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1611*FLEN/8, x4, x1, x2)

inst_538:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37099a and fs2 == 1 and fe2 == 0x7d and fm2 == 0x365417 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x025cf4 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7099a; op2val:0xbeb65417;
op3val:0x7e025cf4; valaddr_reg:x3; val_offset:1614*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1614*FLEN/8, x4, x1, x2)

inst_539:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37099a and fs2 == 1 and fe2 == 0x7d and fm2 == 0x365417 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x025cf4 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7099a; op2val:0xbeb65417;
op3val:0x7e025cf4; valaddr_reg:x3; val_offset:1617*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1617*FLEN/8, x4, x1, x2)

inst_540:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38e8da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0316c5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3d5f35 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8e8da; op2val:0xc00316c5;
op3val:0x7f3d5f35; valaddr_reg:x3; val_offset:1620*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1620*FLEN/8, x4, x1, x2)

inst_541:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38e8da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0316c5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3d5f35 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8e8da; op2val:0xc00316c5;
op3val:0x7f3d5f35; valaddr_reg:x3; val_offset:1623*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1623*FLEN/8, x4, x1, x2)

inst_542:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38e8da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0316c5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3d5f35 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8e8da; op2val:0xc00316c5;
op3val:0x7f3d5f35; valaddr_reg:x3; val_offset:1626*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1626*FLEN/8, x4, x1, x2)

inst_543:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38e8da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0316c5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3d5f35 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8e8da; op2val:0xc00316c5;
op3val:0x7f3d5f35; valaddr_reg:x3; val_offset:1629*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1629*FLEN/8, x4, x1, x2)

inst_544:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38e8da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0316c5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3d5f35 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8e8da; op2val:0xc00316c5;
op3val:0x7f3d5f35; valaddr_reg:x3; val_offset:1632*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1632*FLEN/8, x4, x1, x2)

inst_545:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c0477 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x3fa5b4 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0cc108 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc0477; op2val:0xbf3fa5b4;
op3val:0x7e8cc108; valaddr_reg:x3; val_offset:1635*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1635*FLEN/8, x4, x1, x2)

inst_546:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c0477 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x3fa5b4 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0cc108 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc0477; op2val:0xbf3fa5b4;
op3val:0x7e8cc108; valaddr_reg:x3; val_offset:1638*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1638*FLEN/8, x4, x1, x2)

inst_547:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c0477 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x3fa5b4 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0cc108 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc0477; op2val:0xbf3fa5b4;
op3val:0x7e8cc108; valaddr_reg:x3; val_offset:1641*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1641*FLEN/8, x4, x1, x2)

inst_548:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c0477 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x3fa5b4 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0cc108 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc0477; op2val:0xbf3fa5b4;
op3val:0x7e8cc108; valaddr_reg:x3; val_offset:1644*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1644*FLEN/8, x4, x1, x2)

inst_549:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c0477 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x3fa5b4 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0cc108 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc0477; op2val:0xbf3fa5b4;
op3val:0x7e8cc108; valaddr_reg:x3; val_offset:1647*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1647*FLEN/8, x4, x1, x2)

inst_550:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2348 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0a2fcd and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4b1c4d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2348; op2val:0xbf8a2fcd;
op3val:0x7ecb1c4d; valaddr_reg:x3; val_offset:1650*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1650*FLEN/8, x4, x1, x2)

inst_551:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2348 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0a2fcd and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4b1c4d and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2348; op2val:0xbf8a2fcd;
op3val:0x7ecb1c4d; valaddr_reg:x3; val_offset:1653*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1653*FLEN/8, x4, x1, x2)

inst_552:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2348 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0a2fcd and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4b1c4d and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2348; op2val:0xbf8a2fcd;
op3val:0x7ecb1c4d; valaddr_reg:x3; val_offset:1656*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1656*FLEN/8, x4, x1, x2)

inst_553:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2348 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0a2fcd and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4b1c4d and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2348; op2val:0xbf8a2fcd;
op3val:0x7ecb1c4d; valaddr_reg:x3; val_offset:1659*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1659*FLEN/8, x4, x1, x2)

inst_554:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2348 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0a2fcd and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4b1c4d and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2348; op2val:0xbf8a2fcd;
op3val:0x7ecb1c4d; valaddr_reg:x3; val_offset:1662*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1662*FLEN/8, x4, x1, x2)

inst_555:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f1227 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x27232f and fs3 == 0 and fe3 == 0xfd and fm3 == 0x797e34 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf1227; op2val:0xbfa7232f;
op3val:0x7ef97e34; valaddr_reg:x3; val_offset:1665*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1665*FLEN/8, x4, x1, x2)

inst_556:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f1227 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x27232f and fs3 == 0 and fe3 == 0xfd and fm3 == 0x797e34 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf1227; op2val:0xbfa7232f;
op3val:0x7ef97e34; valaddr_reg:x3; val_offset:1668*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1668*FLEN/8, x4, x1, x2)

inst_557:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f1227 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x27232f and fs3 == 0 and fe3 == 0xfd and fm3 == 0x797e34 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf1227; op2val:0xbfa7232f;
op3val:0x7ef97e34; valaddr_reg:x3; val_offset:1671*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1671*FLEN/8, x4, x1, x2)

inst_558:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f1227 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x27232f and fs3 == 0 and fe3 == 0xfd and fm3 == 0x797e34 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf1227; op2val:0xbfa7232f;
op3val:0x7ef97e34; valaddr_reg:x3; val_offset:1674*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1674*FLEN/8, x4, x1, x2)

inst_559:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f1227 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x27232f and fs3 == 0 and fe3 == 0xfd and fm3 == 0x797e34 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf1227; op2val:0xbfa7232f;
op3val:0x7ef97e34; valaddr_reg:x3; val_offset:1677*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1677*FLEN/8, x4, x1, x2)

inst_560:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41e3fa and fs2 == 1 and fe2 == 0x7f and fm2 == 0x338693 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x07f854 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1e3fa; op2val:0xbfb38693;
op3val:0x7f07f854; valaddr_reg:x3; val_offset:1680*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1680*FLEN/8, x4, x1, x2)

inst_561:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41e3fa and fs2 == 1 and fe2 == 0x7f and fm2 == 0x338693 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x07f854 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1e3fa; op2val:0xbfb38693;
op3val:0x7f07f854; valaddr_reg:x3; val_offset:1683*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1683*FLEN/8, x4, x1, x2)

inst_562:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41e3fa and fs2 == 1 and fe2 == 0x7f and fm2 == 0x338693 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x07f854 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1e3fa; op2val:0xbfb38693;
op3val:0x7f07f854; valaddr_reg:x3; val_offset:1686*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1686*FLEN/8, x4, x1, x2)

inst_563:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41e3fa and fs2 == 1 and fe2 == 0x7f and fm2 == 0x338693 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x07f854 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1e3fa; op2val:0xbfb38693;
op3val:0x7f07f854; valaddr_reg:x3; val_offset:1689*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1689*FLEN/8, x4, x1, x2)

inst_564:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41e3fa and fs2 == 1 and fe2 == 0x7f and fm2 == 0x338693 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x07f854 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1e3fa; op2val:0xbfb38693;
op3val:0x7f07f854; valaddr_reg:x3; val_offset:1692*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1692*FLEN/8, x4, x1, x2)

inst_565:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x42d924 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x30e83a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x06a60a and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec2d924; op2val:0xbfb0e83a;
op3val:0x7f06a60a; valaddr_reg:x3; val_offset:1695*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1695*FLEN/8, x4, x1, x2)

inst_566:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x42d924 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x30e83a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x06a60a and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec2d924; op2val:0xbfb0e83a;
op3val:0x7f06a60a; valaddr_reg:x3; val_offset:1698*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1698*FLEN/8, x4, x1, x2)

inst_567:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x42d924 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x30e83a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x06a60a and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec2d924; op2val:0xbfb0e83a;
op3val:0x7f06a60a; valaddr_reg:x3; val_offset:1701*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1701*FLEN/8, x4, x1, x2)

inst_568:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x42d924 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x30e83a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x06a60a and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec2d924; op2val:0xbfb0e83a;
op3val:0x7f06a60a; valaddr_reg:x3; val_offset:1704*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1704*FLEN/8, x4, x1, x2)

inst_569:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x42d924 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x30e83a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x06a60a and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec2d924; op2val:0xbfb0e83a;
op3val:0x7f06a60a; valaddr_reg:x3; val_offset:1707*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1707*FLEN/8, x4, x1, x2)

inst_570:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x47b364 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x607517 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x2f184f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec7b364; op2val:0xbe607517;
op3val:0x7daf184f; valaddr_reg:x3; val_offset:1710*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1710*FLEN/8, x4, x1, x2)

inst_571:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x47b364 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x607517 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x2f184f and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec7b364; op2val:0xbe607517;
op3val:0x7daf184f; valaddr_reg:x3; val_offset:1713*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1713*FLEN/8, x4, x1, x2)

inst_572:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x47b364 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x607517 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x2f184f and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec7b364; op2val:0xbe607517;
op3val:0x7daf184f; valaddr_reg:x3; val_offset:1716*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1716*FLEN/8, x4, x1, x2)

inst_573:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x47b364 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x607517 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x2f184f and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec7b364; op2val:0xbe607517;
op3val:0x7daf184f; valaddr_reg:x3; val_offset:1719*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1719*FLEN/8, x4, x1, x2)

inst_574:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x47b364 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x607517 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x2f184f and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec7b364; op2val:0xbe607517;
op3val:0x7daf184f; valaddr_reg:x3; val_offset:1722*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1722*FLEN/8, x4, x1, x2)

inst_575:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b074e and fs2 == 1 and fe2 == 0x7e and fm2 == 0x76d5a9 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x43c279 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb074e; op2val:0xbf76d5a9;
op3val:0x7ec3c279; valaddr_reg:x3; val_offset:1725*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1725*FLEN/8, x4, x1, x2)

inst_576:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b074e and fs2 == 1 and fe2 == 0x7e and fm2 == 0x76d5a9 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x43c279 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb074e; op2val:0xbf76d5a9;
op3val:0x7ec3c279; valaddr_reg:x3; val_offset:1728*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1728*FLEN/8, x4, x1, x2)

inst_577:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b074e and fs2 == 1 and fe2 == 0x7e and fm2 == 0x76d5a9 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x43c279 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb074e; op2val:0xbf76d5a9;
op3val:0x7ec3c279; valaddr_reg:x3; val_offset:1731*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1731*FLEN/8, x4, x1, x2)

inst_578:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b074e and fs2 == 1 and fe2 == 0x7e and fm2 == 0x76d5a9 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x43c279 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb074e; op2val:0xbf76d5a9;
op3val:0x7ec3c279; valaddr_reg:x3; val_offset:1734*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1734*FLEN/8, x4, x1, x2)

inst_579:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b074e and fs2 == 1 and fe2 == 0x7e and fm2 == 0x76d5a9 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x43c279 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb074e; op2val:0xbf76d5a9;
op3val:0x7ec3c279; valaddr_reg:x3; val_offset:1737*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1737*FLEN/8, x4, x1, x2)

inst_580:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x522d92 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x646f26 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3b8bd7 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed22d92; op2val:0xbfe46f26;
op3val:0x7f3b8bd7; valaddr_reg:x3; val_offset:1740*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1740*FLEN/8, x4, x1, x2)

inst_581:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x522d92 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x646f26 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3b8bd7 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed22d92; op2val:0xbfe46f26;
op3val:0x7f3b8bd7; valaddr_reg:x3; val_offset:1743*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1743*FLEN/8, x4, x1, x2)

inst_582:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x522d92 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x646f26 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3b8bd7 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed22d92; op2val:0xbfe46f26;
op3val:0x7f3b8bd7; valaddr_reg:x3; val_offset:1746*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1746*FLEN/8, x4, x1, x2)

inst_583:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x522d92 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x646f26 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3b8bd7 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed22d92; op2val:0xbfe46f26;
op3val:0x7f3b8bd7; valaddr_reg:x3; val_offset:1749*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1749*FLEN/8, x4, x1, x2)

inst_584:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x522d92 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x646f26 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3b8bd7 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed22d92; op2val:0xbfe46f26;
op3val:0x7f3b8bd7; valaddr_reg:x3; val_offset:1752*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1752*FLEN/8, x4, x1, x2)

inst_585:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x557298 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2985e0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0d5846 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed57298; op2val:0xbfa985e0;
op3val:0x7f0d5846; valaddr_reg:x3; val_offset:1755*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1755*FLEN/8, x4, x1, x2)

inst_586:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x557298 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2985e0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0d5846 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed57298; op2val:0xbfa985e0;
op3val:0x7f0d5846; valaddr_reg:x3; val_offset:1758*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1758*FLEN/8, x4, x1, x2)

inst_587:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x557298 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2985e0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0d5846 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed57298; op2val:0xbfa985e0;
op3val:0x7f0d5846; valaddr_reg:x3; val_offset:1761*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1761*FLEN/8, x4, x1, x2)

inst_588:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x557298 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2985e0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0d5846 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed57298; op2val:0xbfa985e0;
op3val:0x7f0d5846; valaddr_reg:x3; val_offset:1764*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1764*FLEN/8, x4, x1, x2)

inst_589:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x557298 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2985e0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0d5846 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed57298; op2val:0xbfa985e0;
op3val:0x7f0d5846; valaddr_reg:x3; val_offset:1767*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1767*FLEN/8, x4, x1, x2)

inst_590:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x579d68 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x09912b and fs3 == 0 and fe3 == 0xfc and fm3 == 0x67bb04 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed79d68; op2val:0xbf09912b;
op3val:0x7e67bb04; valaddr_reg:x3; val_offset:1770*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1770*FLEN/8, x4, x1, x2)

inst_591:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x579d68 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x09912b and fs3 == 0 and fe3 == 0xfc and fm3 == 0x67bb04 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed79d68; op2val:0xbf09912b;
op3val:0x7e67bb04; valaddr_reg:x3; val_offset:1773*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1773*FLEN/8, x4, x1, x2)

inst_592:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x579d68 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x09912b and fs3 == 0 and fe3 == 0xfc and fm3 == 0x67bb04 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed79d68; op2val:0xbf09912b;
op3val:0x7e67bb04; valaddr_reg:x3; val_offset:1776*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1776*FLEN/8, x4, x1, x2)

inst_593:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x579d68 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x09912b and fs3 == 0 and fe3 == 0xfc and fm3 == 0x67bb04 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed79d68; op2val:0xbf09912b;
op3val:0x7e67bb04; valaddr_reg:x3; val_offset:1779*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1779*FLEN/8, x4, x1, x2)

inst_594:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x579d68 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x09912b and fs3 == 0 and fe3 == 0xfc and fm3 == 0x67bb04 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed79d68; op2val:0xbf09912b;
op3val:0x7e67bb04; valaddr_reg:x3; val_offset:1782*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1782*FLEN/8, x4, x1, x2)

inst_595:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58215c and fs2 == 1 and fe2 == 0x7f and fm2 == 0x54e017 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x33b8d2 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8215c; op2val:0xbfd4e017;
op3val:0x7f33b8d2; valaddr_reg:x3; val_offset:1785*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1785*FLEN/8, x4, x1, x2)

inst_596:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58215c and fs2 == 1 and fe2 == 0x7f and fm2 == 0x54e017 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x33b8d2 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8215c; op2val:0xbfd4e017;
op3val:0x7f33b8d2; valaddr_reg:x3; val_offset:1788*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1788*FLEN/8, x4, x1, x2)

inst_597:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58215c and fs2 == 1 and fe2 == 0x7f and fm2 == 0x54e017 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x33b8d2 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8215c; op2val:0xbfd4e017;
op3val:0x7f33b8d2; valaddr_reg:x3; val_offset:1791*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1791*FLEN/8, x4, x1, x2)

inst_598:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58215c and fs2 == 1 and fe2 == 0x7f and fm2 == 0x54e017 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x33b8d2 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8215c; op2val:0xbfd4e017;
op3val:0x7f33b8d2; valaddr_reg:x3; val_offset:1794*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1794*FLEN/8, x4, x1, x2)

inst_599:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58215c and fs2 == 1 and fe2 == 0x7f and fm2 == 0x54e017 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x33b8d2 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8215c; op2val:0xbfd4e017;
op3val:0x7f33b8d2; valaddr_reg:x3; val_offset:1797*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1797*FLEN/8, x4, x1, x2)

inst_600:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d24f8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0e6154 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x75fd2b and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd24f8; op2val:0xbf8e6154;
op3val:0x7ef5fd2b; valaddr_reg:x3; val_offset:1800*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1800*FLEN/8, x4, x1, x2)

inst_601:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d24f8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0e6154 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x75fd2b and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd24f8; op2val:0xbf8e6154;
op3val:0x7ef5fd2b; valaddr_reg:x3; val_offset:1803*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1803*FLEN/8, x4, x1, x2)

inst_602:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d24f8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0e6154 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x75fd2b and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd24f8; op2val:0xbf8e6154;
op3val:0x7ef5fd2b; valaddr_reg:x3; val_offset:1806*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1806*FLEN/8, x4, x1, x2)

inst_603:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d24f8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0e6154 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x75fd2b and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd24f8; op2val:0xbf8e6154;
op3val:0x7ef5fd2b; valaddr_reg:x3; val_offset:1809*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1809*FLEN/8, x4, x1, x2)

inst_604:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d24f8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0e6154 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x75fd2b and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd24f8; op2val:0xbf8e6154;
op3val:0x7ef5fd2b; valaddr_reg:x3; val_offset:1812*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1812*FLEN/8, x4, x1, x2)

inst_605:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e1a0d and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2300f3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0d6b6a and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede1a0d; op2val:0xbfa300f3;
op3val:0x7f0d6b6a; valaddr_reg:x3; val_offset:1815*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1815*FLEN/8, x4, x1, x2)

inst_606:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e1a0d and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2300f3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0d6b6a and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede1a0d; op2val:0xbfa300f3;
op3val:0x7f0d6b6a; valaddr_reg:x3; val_offset:1818*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1818*FLEN/8, x4, x1, x2)

inst_607:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e1a0d and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2300f3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0d6b6a and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede1a0d; op2val:0xbfa300f3;
op3val:0x7f0d6b6a; valaddr_reg:x3; val_offset:1821*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1821*FLEN/8, x4, x1, x2)

inst_608:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e1a0d and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2300f3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0d6b6a and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede1a0d; op2val:0xbfa300f3;
op3val:0x7f0d6b6a; valaddr_reg:x3; val_offset:1824*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1824*FLEN/8, x4, x1, x2)

inst_609:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e1a0d and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2300f3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0d6b6a and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede1a0d; op2val:0xbfa300f3;
op3val:0x7f0d6b6a; valaddr_reg:x3; val_offset:1827*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1827*FLEN/8, x4, x1, x2)

inst_610:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5241 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x212887 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0bf4ed and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5241; op2val:0xbfa12887;
op3val:0x7f0bf4ed; valaddr_reg:x3; val_offset:1830*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1830*FLEN/8, x4, x1, x2)

inst_611:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5241 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x212887 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0bf4ed and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5241; op2val:0xbfa12887;
op3val:0x7f0bf4ed; valaddr_reg:x3; val_offset:1833*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1833*FLEN/8, x4, x1, x2)

inst_612:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5241 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x212887 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0bf4ed and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5241; op2val:0xbfa12887;
op3val:0x7f0bf4ed; valaddr_reg:x3; val_offset:1836*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1836*FLEN/8, x4, x1, x2)

inst_613:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5241 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x212887 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0bf4ed and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5241; op2val:0xbfa12887;
op3val:0x7f0bf4ed; valaddr_reg:x3; val_offset:1839*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1839*FLEN/8, x4, x1, x2)

inst_614:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5241 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x212887 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0bf4ed and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5241; op2val:0xbfa12887;
op3val:0x7f0bf4ed; valaddr_reg:x3; val_offset:1842*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1842*FLEN/8, x4, x1, x2)

inst_615:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x604709 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x649fbb and fs3 == 0 and fe3 == 0xfc and fm3 == 0x484b34 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee04709; op2val:0xbee49fbb;
op3val:0x7e484b34; valaddr_reg:x3; val_offset:1845*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1845*FLEN/8, x4, x1, x2)

inst_616:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x604709 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x649fbb and fs3 == 0 and fe3 == 0xfc and fm3 == 0x484b34 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee04709; op2val:0xbee49fbb;
op3val:0x7e484b34; valaddr_reg:x3; val_offset:1848*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1848*FLEN/8, x4, x1, x2)

inst_617:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x604709 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x649fbb and fs3 == 0 and fe3 == 0xfc and fm3 == 0x484b34 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee04709; op2val:0xbee49fbb;
op3val:0x7e484b34; valaddr_reg:x3; val_offset:1851*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1851*FLEN/8, x4, x1, x2)

inst_618:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x604709 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x649fbb and fs3 == 0 and fe3 == 0xfc and fm3 == 0x484b34 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee04709; op2val:0xbee49fbb;
op3val:0x7e484b34; valaddr_reg:x3; val_offset:1854*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1854*FLEN/8, x4, x1, x2)

inst_619:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x604709 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x649fbb and fs3 == 0 and fe3 == 0xfc and fm3 == 0x484b34 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee04709; op2val:0xbee49fbb;
op3val:0x7e484b34; valaddr_reg:x3; val_offset:1857*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1857*FLEN/8, x4, x1, x2)

inst_620:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61fcc2 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x7b34ce and fs3 == 0 and fe3 == 0xfc and fm3 == 0x5dc16f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1fcc2; op2val:0xbefb34ce;
op3val:0x7e5dc16f; valaddr_reg:x3; val_offset:1860*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1860*FLEN/8, x4, x1, x2)

inst_621:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61fcc2 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x7b34ce and fs3 == 0 and fe3 == 0xfc and fm3 == 0x5dc16f and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1fcc2; op2val:0xbefb34ce;
op3val:0x7e5dc16f; valaddr_reg:x3; val_offset:1863*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1863*FLEN/8, x4, x1, x2)

inst_622:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61fcc2 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x7b34ce and fs3 == 0 and fe3 == 0xfc and fm3 == 0x5dc16f and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1fcc2; op2val:0xbefb34ce;
op3val:0x7e5dc16f; valaddr_reg:x3; val_offset:1866*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1866*FLEN/8, x4, x1, x2)

inst_623:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61fcc2 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x7b34ce and fs3 == 0 and fe3 == 0xfc and fm3 == 0x5dc16f and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1fcc2; op2val:0xbefb34ce;
op3val:0x7e5dc16f; valaddr_reg:x3; val_offset:1869*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1869*FLEN/8, x4, x1, x2)

inst_624:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61fcc2 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x7b34ce and fs3 == 0 and fe3 == 0xfc and fm3 == 0x5dc16f and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1fcc2; op2val:0xbefb34ce;
op3val:0x7e5dc16f; valaddr_reg:x3; val_offset:1872*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1872*FLEN/8, x4, x1, x2)

inst_625:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6557cf and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0cc5e8 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7c3aa4 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee557cf; op2val:0xbf8cc5e8;
op3val:0x7efc3aa4; valaddr_reg:x3; val_offset:1875*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1875*FLEN/8, x4, x1, x2)

inst_626:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6557cf and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0cc5e8 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7c3aa4 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee557cf; op2val:0xbf8cc5e8;
op3val:0x7efc3aa4; valaddr_reg:x3; val_offset:1878*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1878*FLEN/8, x4, x1, x2)

inst_627:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6557cf and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0cc5e8 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7c3aa4 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee557cf; op2val:0xbf8cc5e8;
op3val:0x7efc3aa4; valaddr_reg:x3; val_offset:1881*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1881*FLEN/8, x4, x1, x2)

inst_628:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6557cf and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0cc5e8 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7c3aa4 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee557cf; op2val:0xbf8cc5e8;
op3val:0x7efc3aa4; valaddr_reg:x3; val_offset:1884*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1884*FLEN/8, x4, x1, x2)

inst_629:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6557cf and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0cc5e8 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7c3aa4 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee557cf; op2val:0xbf8cc5e8;
op3val:0x7efc3aa4; valaddr_reg:x3; val_offset:1887*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1887*FLEN/8, x4, x1, x2)

inst_630:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66e0be and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0ba42e and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7be033 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6e0be; op2val:0xbf8ba42e;
op3val:0x7efbe033; valaddr_reg:x3; val_offset:1890*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1890*FLEN/8, x4, x1, x2)

inst_631:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66e0be and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0ba42e and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7be033 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6e0be; op2val:0xbf8ba42e;
op3val:0x7efbe033; valaddr_reg:x3; val_offset:1893*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1893*FLEN/8, x4, x1, x2)

inst_632:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66e0be and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0ba42e and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7be033 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6e0be; op2val:0xbf8ba42e;
op3val:0x7efbe033; valaddr_reg:x3; val_offset:1896*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1896*FLEN/8, x4, x1, x2)

inst_633:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66e0be and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0ba42e and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7be033 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6e0be; op2val:0xbf8ba42e;
op3val:0x7efbe033; valaddr_reg:x3; val_offset:1899*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1899*FLEN/8, x4, x1, x2)

inst_634:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66e0be and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0ba42e and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7be033 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6e0be; op2val:0xbf8ba42e;
op3val:0x7efbe033; valaddr_reg:x3; val_offset:1902*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1902*FLEN/8, x4, x1, x2)

inst_635:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x678370 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2c6a16 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x1bec3f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee78370; op2val:0xbf2c6a16;
op3val:0x7e9bec3f; valaddr_reg:x3; val_offset:1905*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1905*FLEN/8, x4, x1, x2)

inst_636:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x678370 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2c6a16 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x1bec3f and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee78370; op2val:0xbf2c6a16;
op3val:0x7e9bec3f; valaddr_reg:x3; val_offset:1908*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1908*FLEN/8, x4, x1, x2)

inst_637:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x678370 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2c6a16 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x1bec3f and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee78370; op2val:0xbf2c6a16;
op3val:0x7e9bec3f; valaddr_reg:x3; val_offset:1911*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1911*FLEN/8, x4, x1, x2)

inst_638:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x678370 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2c6a16 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x1bec3f and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee78370; op2val:0xbf2c6a16;
op3val:0x7e9bec3f; valaddr_reg:x3; val_offset:1914*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1914*FLEN/8, x4, x1, x2)

inst_639:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x678370 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2c6a16 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x1bec3f and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee78370; op2val:0xbf2c6a16;
op3val:0x7e9bec3f; valaddr_reg:x3; val_offset:1917*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1917*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_6)

inst_640:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x687969 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x523fce and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3eed89 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee87969; op2val:0xbf523fce;
op3val:0x7ebeed89; valaddr_reg:x3; val_offset:1920*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1920*FLEN/8, x4, x1, x2)

inst_641:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x687969 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x523fce and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3eed89 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee87969; op2val:0xbf523fce;
op3val:0x7ebeed89; valaddr_reg:x3; val_offset:1923*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1923*FLEN/8, x4, x1, x2)

inst_642:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x687969 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x523fce and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3eed89 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee87969; op2val:0xbf523fce;
op3val:0x7ebeed89; valaddr_reg:x3; val_offset:1926*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1926*FLEN/8, x4, x1, x2)

inst_643:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x687969 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x523fce and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3eed89 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee87969; op2val:0xbf523fce;
op3val:0x7ebeed89; valaddr_reg:x3; val_offset:1929*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1929*FLEN/8, x4, x1, x2)

inst_644:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x687969 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x523fce and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3eed89 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee87969; op2val:0xbf523fce;
op3val:0x7ebeed89; valaddr_reg:x3; val_offset:1932*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1932*FLEN/8, x4, x1, x2)

inst_645:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ad2b2 and fs2 == 1 and fe2 == 0x7a and fm2 == 0x177e4a and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x0af61f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eead2b2; op2val:0xbd177e4a;
op3val:0x7c8af61f; valaddr_reg:x3; val_offset:1935*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1935*FLEN/8, x4, x1, x2)

inst_646:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ad2b2 and fs2 == 1 and fe2 == 0x7a and fm2 == 0x177e4a and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x0af61f and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eead2b2; op2val:0xbd177e4a;
op3val:0x7c8af61f; valaddr_reg:x3; val_offset:1938*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1938*FLEN/8, x4, x1, x2)

inst_647:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ad2b2 and fs2 == 1 and fe2 == 0x7a and fm2 == 0x177e4a and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x0af61f and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eead2b2; op2val:0xbd177e4a;
op3val:0x7c8af61f; valaddr_reg:x3; val_offset:1941*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1941*FLEN/8, x4, x1, x2)

inst_648:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ad2b2 and fs2 == 1 and fe2 == 0x7a and fm2 == 0x177e4a and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x0af61f and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eead2b2; op2val:0xbd177e4a;
op3val:0x7c8af61f; valaddr_reg:x3; val_offset:1944*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1944*FLEN/8, x4, x1, x2)

inst_649:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ad2b2 and fs2 == 1 and fe2 == 0x7a and fm2 == 0x177e4a and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x0af61f and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eead2b2; op2val:0xbd177e4a;
op3val:0x7c8af61f; valaddr_reg:x3; val_offset:1947*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1947*FLEN/8, x4, x1, x2)

inst_650:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6baf59 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2d06ce and fs3 == 0 and fe3 == 0xfd and fm3 == 0x1f4bc3 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eebaf59; op2val:0xbf2d06ce;
op3val:0x7e9f4bc3; valaddr_reg:x3; val_offset:1950*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1950*FLEN/8, x4, x1, x2)

inst_651:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6baf59 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2d06ce and fs3 == 0 and fe3 == 0xfd and fm3 == 0x1f4bc3 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eebaf59; op2val:0xbf2d06ce;
op3val:0x7e9f4bc3; valaddr_reg:x3; val_offset:1953*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1953*FLEN/8, x4, x1, x2)

inst_652:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6baf59 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2d06ce and fs3 == 0 and fe3 == 0xfd and fm3 == 0x1f4bc3 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eebaf59; op2val:0xbf2d06ce;
op3val:0x7e9f4bc3; valaddr_reg:x3; val_offset:1956*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1956*FLEN/8, x4, x1, x2)

inst_653:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6baf59 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2d06ce and fs3 == 0 and fe3 == 0xfd and fm3 == 0x1f4bc3 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eebaf59; op2val:0xbf2d06ce;
op3val:0x7e9f4bc3; valaddr_reg:x3; val_offset:1959*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1959*FLEN/8, x4, x1, x2)

inst_654:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6baf59 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2d06ce and fs3 == 0 and fe3 == 0xfd and fm3 == 0x1f4bc3 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eebaf59; op2val:0xbf2d06ce;
op3val:0x7e9f4bc3; valaddr_reg:x3; val_offset:1962*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1962*FLEN/8, x4, x1, x2)

inst_655:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ea107 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x6c02b1 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x5bfef4 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeea107; op2val:0xbe6c02b1;
op3val:0x7ddbfef4; valaddr_reg:x3; val_offset:1965*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1965*FLEN/8, x4, x1, x2)

inst_656:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ea107 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x6c02b1 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x5bfef4 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeea107; op2val:0xbe6c02b1;
op3val:0x7ddbfef4; valaddr_reg:x3; val_offset:1968*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1968*FLEN/8, x4, x1, x2)

inst_657:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ea107 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x6c02b1 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x5bfef4 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeea107; op2val:0xbe6c02b1;
op3val:0x7ddbfef4; valaddr_reg:x3; val_offset:1971*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1971*FLEN/8, x4, x1, x2)

inst_658:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ea107 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x6c02b1 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x5bfef4 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeea107; op2val:0xbe6c02b1;
op3val:0x7ddbfef4; valaddr_reg:x3; val_offset:1974*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1974*FLEN/8, x4, x1, x2)

inst_659:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6ea107 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x6c02b1 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x5bfef4 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeea107; op2val:0xbe6c02b1;
op3val:0x7ddbfef4; valaddr_reg:x3; val_offset:1977*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1977*FLEN/8, x4, x1, x2)

inst_660:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x700b05 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x43f817 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x37c106 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef00b05; op2val:0xbfc3f817;
op3val:0x7f37c106; valaddr_reg:x3; val_offset:1980*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1980*FLEN/8, x4, x1, x2)

inst_661:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x700b05 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x43f817 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x37c106 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef00b05; op2val:0xbfc3f817;
op3val:0x7f37c106; valaddr_reg:x3; val_offset:1983*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1983*FLEN/8, x4, x1, x2)

inst_662:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x700b05 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x43f817 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x37c106 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef00b05; op2val:0xbfc3f817;
op3val:0x7f37c106; valaddr_reg:x3; val_offset:1986*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 1986*FLEN/8, x4, x1, x2)

inst_663:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x700b05 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x43f817 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x37c106 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef00b05; op2val:0xbfc3f817;
op3val:0x7f37c106; valaddr_reg:x3; val_offset:1989*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 1989*FLEN/8, x4, x1, x2)

inst_664:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x700b05 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x43f817 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x37c106 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef00b05; op2val:0xbfc3f817;
op3val:0x7f37c106; valaddr_reg:x3; val_offset:1992*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 1992*FLEN/8, x4, x1, x2)

inst_665:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716a4d and fs2 == 1 and fe2 == 0x7a and fm2 == 0x7b5d15 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x6d0b02 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef16a4d; op2val:0xbd7b5d15;
op3val:0x7ced0b02; valaddr_reg:x3; val_offset:1995*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1995*FLEN/8, x4, x1, x2)

inst_666:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716a4d and fs2 == 1 and fe2 == 0x7a and fm2 == 0x7b5d15 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x6d0b02 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef16a4d; op2val:0xbd7b5d15;
op3val:0x7ced0b02; valaddr_reg:x3; val_offset:1998*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 1998*FLEN/8, x4, x1, x2)

inst_667:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716a4d and fs2 == 1 and fe2 == 0x7a and fm2 == 0x7b5d15 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x6d0b02 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef16a4d; op2val:0xbd7b5d15;
op3val:0x7ced0b02; valaddr_reg:x3; val_offset:2001*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2001*FLEN/8, x4, x1, x2)

inst_668:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716a4d and fs2 == 1 and fe2 == 0x7a and fm2 == 0x7b5d15 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x6d0b02 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef16a4d; op2val:0xbd7b5d15;
op3val:0x7ced0b02; valaddr_reg:x3; val_offset:2004*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2004*FLEN/8, x4, x1, x2)

inst_669:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716a4d and fs2 == 1 and fe2 == 0x7a and fm2 == 0x7b5d15 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x6d0b02 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef16a4d; op2val:0xbd7b5d15;
op3val:0x7ced0b02; valaddr_reg:x3; val_offset:2007*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2007*FLEN/8, x4, x1, x2)

inst_670:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x719d36 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x4b1faf and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3fb592 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef19d36; op2val:0xbf4b1faf;
op3val:0x7ebfb592; valaddr_reg:x3; val_offset:2010*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2010*FLEN/8, x4, x1, x2)

inst_671:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x719d36 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x4b1faf and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3fb592 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef19d36; op2val:0xbf4b1faf;
op3val:0x7ebfb592; valaddr_reg:x3; val_offset:2013*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2013*FLEN/8, x4, x1, x2)

inst_672:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x719d36 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x4b1faf and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3fb592 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef19d36; op2val:0xbf4b1faf;
op3val:0x7ebfb592; valaddr_reg:x3; val_offset:2016*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2016*FLEN/8, x4, x1, x2)

inst_673:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x719d36 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x4b1faf and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3fb592 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef19d36; op2val:0xbf4b1faf;
op3val:0x7ebfb592; valaddr_reg:x3; val_offset:2019*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2019*FLEN/8, x4, x1, x2)

inst_674:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x719d36 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x4b1faf and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3fb592 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef19d36; op2val:0xbf4b1faf;
op3val:0x7ebfb592; valaddr_reg:x3; val_offset:2022*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2022*FLEN/8, x4, x1, x2)

inst_675:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x743c57 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x4c0046 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x42a058 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef43c57; op2val:0xbecc0046;
op3val:0x7e42a058; valaddr_reg:x3; val_offset:2025*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2025*FLEN/8, x4, x1, x2)

inst_676:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x743c57 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x4c0046 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x42a058 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef43c57; op2val:0xbecc0046;
op3val:0x7e42a058; valaddr_reg:x3; val_offset:2028*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2028*FLEN/8, x4, x1, x2)

inst_677:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x743c57 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x4c0046 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x42a058 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef43c57; op2val:0xbecc0046;
op3val:0x7e42a058; valaddr_reg:x3; val_offset:2031*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2031*FLEN/8, x4, x1, x2)

inst_678:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x743c57 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x4c0046 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x42a058 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef43c57; op2val:0xbecc0046;
op3val:0x7e42a058; valaddr_reg:x3; val_offset:2034*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2034*FLEN/8, x4, x1, x2)

inst_679:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x743c57 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x4c0046 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x42a058 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef43c57; op2val:0xbecc0046;
op3val:0x7e42a058; valaddr_reg:x3; val_offset:2037*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2037*FLEN/8, x4, x1, x2)

inst_680:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x767a3b and fs2 == 1 and fe2 == 0x7e and fm2 == 0x371e70 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x304eaf and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef67a3b; op2val:0xbf371e70;
op3val:0x7eb04eaf; valaddr_reg:x3; val_offset:2040*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2040*FLEN/8, x4, x1, x2)

inst_681:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x767a3b and fs2 == 1 and fe2 == 0x7e and fm2 == 0x371e70 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x304eaf and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef67a3b; op2val:0xbf371e70;
op3val:0x7eb04eaf; valaddr_reg:x3; val_offset:2043*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2043*FLEN/8, x4, x1, x2)

inst_682:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x767a3b and fs2 == 1 and fe2 == 0x7e and fm2 == 0x371e70 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x304eaf and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef67a3b; op2val:0xbf371e70;
op3val:0x7eb04eaf; valaddr_reg:x3; val_offset:2046*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2046*FLEN/8, x4, x1, x2)

inst_683:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x767a3b and fs2 == 1 and fe2 == 0x7e and fm2 == 0x371e70 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x304eaf and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef67a3b; op2val:0xbf371e70;
op3val:0x7eb04eaf; valaddr_reg:x3; val_offset:2049*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2049*FLEN/8, x4, x1, x2)

inst_684:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x767a3b and fs2 == 1 and fe2 == 0x7e and fm2 == 0x371e70 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x304eaf and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef67a3b; op2val:0xbf371e70;
op3val:0x7eb04eaf; valaddr_reg:x3; val_offset:2052*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2052*FLEN/8, x4, x1, x2)

inst_685:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x78760e and fs2 == 1 and fe2 == 0x7f and fm2 == 0x1b7994 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x16e57a and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef8760e; op2val:0xbf9b7994;
op3val:0x7f16e57a; valaddr_reg:x3; val_offset:2055*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2055*FLEN/8, x4, x1, x2)

inst_686:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x78760e and fs2 == 1 and fe2 == 0x7f and fm2 == 0x1b7994 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x16e57a and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef8760e; op2val:0xbf9b7994;
op3val:0x7f16e57a; valaddr_reg:x3; val_offset:2058*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2058*FLEN/8, x4, x1, x2)

inst_687:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x78760e and fs2 == 1 and fe2 == 0x7f and fm2 == 0x1b7994 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x16e57a and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef8760e; op2val:0xbf9b7994;
op3val:0x7f16e57a; valaddr_reg:x3; val_offset:2061*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2061*FLEN/8, x4, x1, x2)

inst_688:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x78760e and fs2 == 1 and fe2 == 0x7f and fm2 == 0x1b7994 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x16e57a and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef8760e; op2val:0xbf9b7994;
op3val:0x7f16e57a; valaddr_reg:x3; val_offset:2064*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2064*FLEN/8, x4, x1, x2)

inst_689:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x78760e and fs2 == 1 and fe2 == 0x7f and fm2 == 0x1b7994 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x16e57a and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef8760e; op2val:0xbf9b7994;
op3val:0x7f16e57a; valaddr_reg:x3; val_offset:2067*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2067*FLEN/8, x4, x1, x2)

inst_690:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x789da9 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x448a7d and fs3 == 0 and fe3 == 0xfb and fm3 == 0x3edf34 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef89da9; op2val:0xbe448a7d;
op3val:0x7dbedf34; valaddr_reg:x3; val_offset:2070*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2070*FLEN/8, x4, x1, x2)

inst_691:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x789da9 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x448a7d and fs3 == 0 and fe3 == 0xfb and fm3 == 0x3edf34 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef89da9; op2val:0xbe448a7d;
op3val:0x7dbedf34; valaddr_reg:x3; val_offset:2073*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2073*FLEN/8, x4, x1, x2)

inst_692:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x789da9 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x448a7d and fs3 == 0 and fe3 == 0xfb and fm3 == 0x3edf34 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef89da9; op2val:0xbe448a7d;
op3val:0x7dbedf34; valaddr_reg:x3; val_offset:2076*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2076*FLEN/8, x4, x1, x2)

inst_693:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x789da9 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x448a7d and fs3 == 0 and fe3 == 0xfb and fm3 == 0x3edf34 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef89da9; op2val:0xbe448a7d;
op3val:0x7dbedf34; valaddr_reg:x3; val_offset:2079*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2079*FLEN/8, x4, x1, x2)

inst_694:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x789da9 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x448a7d and fs3 == 0 and fe3 == 0xfb and fm3 == 0x3edf34 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef89da9; op2val:0xbe448a7d;
op3val:0x7dbedf34; valaddr_reg:x3; val_offset:2082*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2082*FLEN/8, x4, x1, x2)

inst_695:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7affa3 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x0f7139 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0ca3cf and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaffa3; op2val:0xbf0f7139;
op3val:0x7e8ca3cf; valaddr_reg:x3; val_offset:2085*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2085*FLEN/8, x4, x1, x2)

inst_696:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7affa3 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x0f7139 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0ca3cf and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaffa3; op2val:0xbf0f7139;
op3val:0x7e8ca3cf; valaddr_reg:x3; val_offset:2088*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2088*FLEN/8, x4, x1, x2)

inst_697:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7affa3 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x0f7139 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0ca3cf and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaffa3; op2val:0xbf0f7139;
op3val:0x7e8ca3cf; valaddr_reg:x3; val_offset:2091*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2091*FLEN/8, x4, x1, x2)

inst_698:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7affa3 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x0f7139 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0ca3cf and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaffa3; op2val:0xbf0f7139;
op3val:0x7e8ca3cf; valaddr_reg:x3; val_offset:2094*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2094*FLEN/8, x4, x1, x2)

inst_699:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7affa3 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x0f7139 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0ca3cf and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaffa3; op2val:0xbf0f7139;
op3val:0x7e8ca3cf; valaddr_reg:x3; val_offset:2097*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2097*FLEN/8, x4, x1, x2)

inst_700:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7b1520 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x0584ae and fs3 == 0 and fe3 == 0xfd and fm3 == 0x02f41c and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efb1520; op2val:0xbf0584ae;
op3val:0x7e82f41c; valaddr_reg:x3; val_offset:2100*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2100*FLEN/8, x4, x1, x2)

inst_701:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7b1520 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x0584ae and fs3 == 0 and fe3 == 0xfd and fm3 == 0x02f41c and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efb1520; op2val:0xbf0584ae;
op3val:0x7e82f41c; valaddr_reg:x3; val_offset:2103*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2103*FLEN/8, x4, x1, x2)

inst_702:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7b1520 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x0584ae and fs3 == 0 and fe3 == 0xfd and fm3 == 0x02f41c and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efb1520; op2val:0xbf0584ae;
op3val:0x7e82f41c; valaddr_reg:x3; val_offset:2106*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2106*FLEN/8, x4, x1, x2)

inst_703:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7b1520 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x0584ae and fs3 == 0 and fe3 == 0xfd and fm3 == 0x02f41c and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efb1520; op2val:0xbf0584ae;
op3val:0x7e82f41c; valaddr_reg:x3; val_offset:2109*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2109*FLEN/8, x4, x1, x2)

inst_704:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7b1520 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x0584ae and fs3 == 0 and fe3 == 0xfd and fm3 == 0x02f41c and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efb1520; op2val:0xbf0584ae;
op3val:0x7e82f41c; valaddr_reg:x3; val_offset:2112*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2112*FLEN/8, x4, x1, x2)

inst_705:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ea866 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3c2825 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3b2b9b and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efea866; op2val:0xbfbc2825;
op3val:0x7f3b2b9b; valaddr_reg:x3; val_offset:2115*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2115*FLEN/8, x4, x1, x2)

inst_706:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ea866 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3c2825 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3b2b9b and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efea866; op2val:0xbfbc2825;
op3val:0x7f3b2b9b; valaddr_reg:x3; val_offset:2118*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2118*FLEN/8, x4, x1, x2)

inst_707:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ea866 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3c2825 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3b2b9b and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efea866; op2val:0xbfbc2825;
op3val:0x7f3b2b9b; valaddr_reg:x3; val_offset:2121*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2121*FLEN/8, x4, x1, x2)

inst_708:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ea866 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3c2825 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3b2b9b and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efea866; op2val:0xbfbc2825;
op3val:0x7f3b2b9b; valaddr_reg:x3; val_offset:2124*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2124*FLEN/8, x4, x1, x2)

inst_709:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ea866 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3c2825 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3b2b9b and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efea866; op2val:0xbfbc2825;
op3val:0x7f3b2b9b; valaddr_reg:x3; val_offset:2127*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2127*FLEN/8, x4, x1, x2)

inst_710:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f5c48 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x0548d9 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x04f39c and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff5c48; op2val:0xbf0548d9;
op3val:0x7e84f39c; valaddr_reg:x3; val_offset:2130*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2130*FLEN/8, x4, x1, x2)

inst_711:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f5c48 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x0548d9 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x04f39c and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff5c48; op2val:0xbf0548d9;
op3val:0x7e84f39c; valaddr_reg:x3; val_offset:2133*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2133*FLEN/8, x4, x1, x2)

inst_712:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f5c48 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x0548d9 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x04f39c and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff5c48; op2val:0xbf0548d9;
op3val:0x7e84f39c; valaddr_reg:x3; val_offset:2136*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2136*FLEN/8, x4, x1, x2)

inst_713:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f5c48 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x0548d9 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x04f39c and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff5c48; op2val:0xbf0548d9;
op3val:0x7e84f39c; valaddr_reg:x3; val_offset:2139*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2139*FLEN/8, x4, x1, x2)

inst_714:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f5c48 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x0548d9 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x04f39c and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff5c48; op2val:0xbf0548d9;
op3val:0x7e84f39c; valaddr_reg:x3; val_offset:2142*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2142*FLEN/8, x4, x1, x2)

inst_715:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03870c and fs2 == 1 and fe2 == 0x7c and fm2 == 0x021d71 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x05b36a and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03870c; op2val:0xbe021d71;
op3val:0x7d85b36a; valaddr_reg:x3; val_offset:2145*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2145*FLEN/8, x4, x1, x2)

inst_716:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03870c and fs2 == 1 and fe2 == 0x7c and fm2 == 0x021d71 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x05b36a and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03870c; op2val:0xbe021d71;
op3val:0x7d85b36a; valaddr_reg:x3; val_offset:2148*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2148*FLEN/8, x4, x1, x2)

inst_717:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03870c and fs2 == 1 and fe2 == 0x7c and fm2 == 0x021d71 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x05b36a and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03870c; op2val:0xbe021d71;
op3val:0x7d85b36a; valaddr_reg:x3; val_offset:2151*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2151*FLEN/8, x4, x1, x2)

inst_718:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03870c and fs2 == 1 and fe2 == 0x7c and fm2 == 0x021d71 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x05b36a and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03870c; op2val:0xbe021d71;
op3val:0x7d85b36a; valaddr_reg:x3; val_offset:2154*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2154*FLEN/8, x4, x1, x2)

inst_719:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03870c and fs2 == 1 and fe2 == 0x7c and fm2 == 0x021d71 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x05b36a and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03870c; op2val:0xbe021d71;
op3val:0x7d85b36a; valaddr_reg:x3; val_offset:2157*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2157*FLEN/8, x4, x1, x2)

inst_720:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x042c30 and fs2 == 1 and fe2 == 0x7b and fm2 == 0x6d24b7 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x74dfbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f042c30; op2val:0xbded24b7;
op3val:0x7d74dfbb; valaddr_reg:x3; val_offset:2160*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2160*FLEN/8, x4, x1, x2)

inst_721:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x042c30 and fs2 == 1 and fe2 == 0x7b and fm2 == 0x6d24b7 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x74dfbb and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f042c30; op2val:0xbded24b7;
op3val:0x7d74dfbb; valaddr_reg:x3; val_offset:2163*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2163*FLEN/8, x4, x1, x2)

inst_722:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x042c30 and fs2 == 1 and fe2 == 0x7b and fm2 == 0x6d24b7 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x74dfbb and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f042c30; op2val:0xbded24b7;
op3val:0x7d74dfbb; valaddr_reg:x3; val_offset:2166*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2166*FLEN/8, x4, x1, x2)

inst_723:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x042c30 and fs2 == 1 and fe2 == 0x7b and fm2 == 0x6d24b7 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x74dfbb and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f042c30; op2val:0xbded24b7;
op3val:0x7d74dfbb; valaddr_reg:x3; val_offset:2169*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2169*FLEN/8, x4, x1, x2)

inst_724:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x042c30 and fs2 == 1 and fe2 == 0x7b and fm2 == 0x6d24b7 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x74dfbb and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f042c30; op2val:0xbded24b7;
op3val:0x7d74dfbb; valaddr_reg:x3; val_offset:2172*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2172*FLEN/8, x4, x1, x2)

inst_725:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04e2ff and fs2 == 1 and fe2 == 0x7f and fm2 == 0x35dcee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3cce5b and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04e2ff; op2val:0xbfb5dcee;
op3val:0x7f3cce5b; valaddr_reg:x3; val_offset:2175*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2175*FLEN/8, x4, x1, x2)

inst_726:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04e2ff and fs2 == 1 and fe2 == 0x7f and fm2 == 0x35dcee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3cce5b and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04e2ff; op2val:0xbfb5dcee;
op3val:0x7f3cce5b; valaddr_reg:x3; val_offset:2178*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2178*FLEN/8, x4, x1, x2)

inst_727:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04e2ff and fs2 == 1 and fe2 == 0x7f and fm2 == 0x35dcee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3cce5b and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04e2ff; op2val:0xbfb5dcee;
op3val:0x7f3cce5b; valaddr_reg:x3; val_offset:2181*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2181*FLEN/8, x4, x1, x2)

inst_728:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04e2ff and fs2 == 1 and fe2 == 0x7f and fm2 == 0x35dcee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3cce5b and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04e2ff; op2val:0xbfb5dcee;
op3val:0x7f3cce5b; valaddr_reg:x3; val_offset:2184*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2184*FLEN/8, x4, x1, x2)

inst_729:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04e2ff and fs2 == 1 and fe2 == 0x7f and fm2 == 0x35dcee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3cce5b and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04e2ff; op2val:0xbfb5dcee;
op3val:0x7f3cce5b; valaddr_reg:x3; val_offset:2187*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2187*FLEN/8, x4, x1, x2)

inst_730:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05a355 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x25e8ec and fs3 == 0 and fe3 == 0xfc and fm3 == 0x2d37bb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05a355; op2val:0xbea5e8ec;
op3val:0x7e2d37bb; valaddr_reg:x3; val_offset:2190*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2190*FLEN/8, x4, x1, x2)

inst_731:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05a355 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x25e8ec and fs3 == 0 and fe3 == 0xfc and fm3 == 0x2d37bb and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05a355; op2val:0xbea5e8ec;
op3val:0x7e2d37bb; valaddr_reg:x3; val_offset:2193*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2193*FLEN/8, x4, x1, x2)

inst_732:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05a355 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x25e8ec and fs3 == 0 and fe3 == 0xfc and fm3 == 0x2d37bb and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05a355; op2val:0xbea5e8ec;
op3val:0x7e2d37bb; valaddr_reg:x3; val_offset:2196*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2196*FLEN/8, x4, x1, x2)

inst_733:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05a355 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x25e8ec and fs3 == 0 and fe3 == 0xfc and fm3 == 0x2d37bb and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05a355; op2val:0xbea5e8ec;
op3val:0x7e2d37bb; valaddr_reg:x3; val_offset:2199*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2199*FLEN/8, x4, x1, x2)

inst_734:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05a355 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x25e8ec and fs3 == 0 and fe3 == 0xfc and fm3 == 0x2d37bb and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05a355; op2val:0xbea5e8ec;
op3val:0x7e2d37bb; valaddr_reg:x3; val_offset:2202*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2202*FLEN/8, x4, x1, x2)

inst_735:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x069abc and fs2 == 1 and fe2 == 0x7d and fm2 == 0x0a0331 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x11222e and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f069abc; op2val:0xbe8a0331;
op3val:0x7e11222e; valaddr_reg:x3; val_offset:2205*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2205*FLEN/8, x4, x1, x2)

inst_736:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x069abc and fs2 == 1 and fe2 == 0x7d and fm2 == 0x0a0331 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x11222e and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f069abc; op2val:0xbe8a0331;
op3val:0x7e11222e; valaddr_reg:x3; val_offset:2208*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2208*FLEN/8, x4, x1, x2)

inst_737:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x069abc and fs2 == 1 and fe2 == 0x7d and fm2 == 0x0a0331 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x11222e and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f069abc; op2val:0xbe8a0331;
op3val:0x7e11222e; valaddr_reg:x3; val_offset:2211*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2211*FLEN/8, x4, x1, x2)

inst_738:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x069abc and fs2 == 1 and fe2 == 0x7d and fm2 == 0x0a0331 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x11222e and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f069abc; op2val:0xbe8a0331;
op3val:0x7e11222e; valaddr_reg:x3; val_offset:2214*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2214*FLEN/8, x4, x1, x2)

inst_739:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x069abc and fs2 == 1 and fe2 == 0x7d and fm2 == 0x0a0331 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x11222e and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f069abc; op2val:0xbe8a0331;
op3val:0x7e11222e; valaddr_reg:x3; val_offset:2217*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2217*FLEN/8, x4, x1, x2)

inst_740:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06cfd9 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d2ef6 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x366662 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06cfd9; op2val:0xbfad2ef6;
op3val:0x7f366662; valaddr_reg:x3; val_offset:2220*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2220*FLEN/8, x4, x1, x2)

inst_741:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06cfd9 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d2ef6 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x366662 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06cfd9; op2val:0xbfad2ef6;
op3val:0x7f366662; valaddr_reg:x3; val_offset:2223*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2223*FLEN/8, x4, x1, x2)

inst_742:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06cfd9 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d2ef6 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x366662 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06cfd9; op2val:0xbfad2ef6;
op3val:0x7f366662; valaddr_reg:x3; val_offset:2226*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2226*FLEN/8, x4, x1, x2)

inst_743:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06cfd9 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d2ef6 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x366662 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06cfd9; op2val:0xbfad2ef6;
op3val:0x7f366662; valaddr_reg:x3; val_offset:2229*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2229*FLEN/8, x4, x1, x2)

inst_744:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06cfd9 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d2ef6 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x366662 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06cfd9; op2val:0xbfad2ef6;
op3val:0x7f366662; valaddr_reg:x3; val_offset:2232*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2232*FLEN/8, x4, x1, x2)

inst_745:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07648d and fs2 == 1 and fe2 == 0x7d and fm2 == 0x11b440 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x1a1e91 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07648d; op2val:0xbe91b440;
op3val:0x7e1a1e91; valaddr_reg:x3; val_offset:2235*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2235*FLEN/8, x4, x1, x2)

inst_746:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07648d and fs2 == 1 and fe2 == 0x7d and fm2 == 0x11b440 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x1a1e91 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07648d; op2val:0xbe91b440;
op3val:0x7e1a1e91; valaddr_reg:x3; val_offset:2238*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2238*FLEN/8, x4, x1, x2)

inst_747:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07648d and fs2 == 1 and fe2 == 0x7d and fm2 == 0x11b440 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x1a1e91 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07648d; op2val:0xbe91b440;
op3val:0x7e1a1e91; valaddr_reg:x3; val_offset:2241*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2241*FLEN/8, x4, x1, x2)

inst_748:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07648d and fs2 == 1 and fe2 == 0x7d and fm2 == 0x11b440 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x1a1e91 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07648d; op2val:0xbe91b440;
op3val:0x7e1a1e91; valaddr_reg:x3; val_offset:2244*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2244*FLEN/8, x4, x1, x2)

inst_749:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07648d and fs2 == 1 and fe2 == 0x7d and fm2 == 0x11b440 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x1a1e91 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07648d; op2val:0xbe91b440;
op3val:0x7e1a1e91; valaddr_reg:x3; val_offset:2247*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2247*FLEN/8, x4, x1, x2)

inst_750:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x083174 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x7ace38 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x056e01 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f083174; op2val:0xbe7ace38;
op3val:0x7e056e01; valaddr_reg:x3; val_offset:2250*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2250*FLEN/8, x4, x1, x2)

inst_751:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x083174 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x7ace38 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x056e01 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f083174; op2val:0xbe7ace38;
op3val:0x7e056e01; valaddr_reg:x3; val_offset:2253*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2253*FLEN/8, x4, x1, x2)

inst_752:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x083174 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x7ace38 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x056e01 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f083174; op2val:0xbe7ace38;
op3val:0x7e056e01; valaddr_reg:x3; val_offset:2256*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2256*FLEN/8, x4, x1, x2)

inst_753:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x083174 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x7ace38 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x056e01 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f083174; op2val:0xbe7ace38;
op3val:0x7e056e01; valaddr_reg:x3; val_offset:2259*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2259*FLEN/8, x4, x1, x2)

inst_754:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x083174 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x7ace38 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x056e01 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f083174; op2val:0xbe7ace38;
op3val:0x7e056e01; valaddr_reg:x3; val_offset:2262*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2262*FLEN/8, x4, x1, x2)

inst_755:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08363b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2ba134 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36a3fe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08363b; op2val:0xbfaba134;
op3val:0x7f36a3fe; valaddr_reg:x3; val_offset:2265*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2265*FLEN/8, x4, x1, x2)

inst_756:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08363b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2ba134 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36a3fe and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08363b; op2val:0xbfaba134;
op3val:0x7f36a3fe; valaddr_reg:x3; val_offset:2268*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2268*FLEN/8, x4, x1, x2)

inst_757:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08363b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2ba134 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36a3fe and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08363b; op2val:0xbfaba134;
op3val:0x7f36a3fe; valaddr_reg:x3; val_offset:2271*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2271*FLEN/8, x4, x1, x2)

inst_758:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08363b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2ba134 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36a3fe and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08363b; op2val:0xbfaba134;
op3val:0x7f36a3fe; valaddr_reg:x3; val_offset:2274*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2274*FLEN/8, x4, x1, x2)

inst_759:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08363b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2ba134 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36a3fe and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08363b; op2val:0xbfaba134;
op3val:0x7f36a3fe; valaddr_reg:x3; val_offset:2277*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2277*FLEN/8, x4, x1, x2)

inst_760:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x095fbb and fs2 == 1 and fe2 == 0x7e and fm2 == 0x28a10b and fs3 == 0 and fe3 == 0xfd and fm3 == 0x34fa7d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f095fbb; op2val:0xbf28a10b;
op3val:0x7eb4fa7d; valaddr_reg:x3; val_offset:2280*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2280*FLEN/8, x4, x1, x2)

inst_761:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x095fbb and fs2 == 1 and fe2 == 0x7e and fm2 == 0x28a10b and fs3 == 0 and fe3 == 0xfd and fm3 == 0x34fa7d and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f095fbb; op2val:0xbf28a10b;
op3val:0x7eb4fa7d; valaddr_reg:x3; val_offset:2283*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2283*FLEN/8, x4, x1, x2)

inst_762:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x095fbb and fs2 == 1 and fe2 == 0x7e and fm2 == 0x28a10b and fs3 == 0 and fe3 == 0xfd and fm3 == 0x34fa7d and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f095fbb; op2val:0xbf28a10b;
op3val:0x7eb4fa7d; valaddr_reg:x3; val_offset:2286*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2286*FLEN/8, x4, x1, x2)

inst_763:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x095fbb and fs2 == 1 and fe2 == 0x7e and fm2 == 0x28a10b and fs3 == 0 and fe3 == 0xfd and fm3 == 0x34fa7d and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f095fbb; op2val:0xbf28a10b;
op3val:0x7eb4fa7d; valaddr_reg:x3; val_offset:2289*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2289*FLEN/8, x4, x1, x2)

inst_764:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x095fbb and fs2 == 1 and fe2 == 0x7e and fm2 == 0x28a10b and fs3 == 0 and fe3 == 0xfd and fm3 == 0x34fa7d and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f095fbb; op2val:0xbf28a10b;
op3val:0x7eb4fa7d; valaddr_reg:x3; val_offset:2292*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2292*FLEN/8, x4, x1, x2)

inst_765:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09a252 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2f5462 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3c86a9 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09a252; op2val:0xbfaf5462;
op3val:0x7f3c86a9; valaddr_reg:x3; val_offset:2295*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2295*FLEN/8, x4, x1, x2)

inst_766:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09a252 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2f5462 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3c86a9 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09a252; op2val:0xbfaf5462;
op3val:0x7f3c86a9; valaddr_reg:x3; val_offset:2298*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2298*FLEN/8, x4, x1, x2)

inst_767:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09a252 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2f5462 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3c86a9 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09a252; op2val:0xbfaf5462;
op3val:0x7f3c86a9; valaddr_reg:x3; val_offset:2301*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2301*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_7)

inst_768:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09a252 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2f5462 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3c86a9 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09a252; op2val:0xbfaf5462;
op3val:0x7f3c86a9; valaddr_reg:x3; val_offset:2304*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2304*FLEN/8, x4, x1, x2)

inst_769:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09a252 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2f5462 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3c86a9 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09a252; op2val:0xbfaf5462;
op3val:0x7f3c86a9; valaddr_reg:x3; val_offset:2307*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2307*FLEN/8, x4, x1, x2)

inst_770:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09f4cb and fs2 == 1 and fe2 == 0x7d and fm2 == 0x16f1ff and fs3 == 0 and fe3 == 0xfc and fm3 == 0x22afb1 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09f4cb; op2val:0xbe96f1ff;
op3val:0x7e22afb1; valaddr_reg:x3; val_offset:2310*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2310*FLEN/8, x4, x1, x2)

inst_771:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09f4cb and fs2 == 1 and fe2 == 0x7d and fm2 == 0x16f1ff and fs3 == 0 and fe3 == 0xfc and fm3 == 0x22afb1 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09f4cb; op2val:0xbe96f1ff;
op3val:0x7e22afb1; valaddr_reg:x3; val_offset:2313*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2313*FLEN/8, x4, x1, x2)

inst_772:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09f4cb and fs2 == 1 and fe2 == 0x7d and fm2 == 0x16f1ff and fs3 == 0 and fe3 == 0xfc and fm3 == 0x22afb1 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09f4cb; op2val:0xbe96f1ff;
op3val:0x7e22afb1; valaddr_reg:x3; val_offset:2316*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2316*FLEN/8, x4, x1, x2)

inst_773:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09f4cb and fs2 == 1 and fe2 == 0x7d and fm2 == 0x16f1ff and fs3 == 0 and fe3 == 0xfc and fm3 == 0x22afb1 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09f4cb; op2val:0xbe96f1ff;
op3val:0x7e22afb1; valaddr_reg:x3; val_offset:2319*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2319*FLEN/8, x4, x1, x2)

inst_774:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09f4cb and fs2 == 1 and fe2 == 0x7d and fm2 == 0x16f1ff and fs3 == 0 and fe3 == 0xfc and fm3 == 0x22afb1 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09f4cb; op2val:0xbe96f1ff;
op3val:0x7e22afb1; valaddr_reg:x3; val_offset:2322*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2322*FLEN/8, x4, x1, x2)

inst_775:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a8170 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x770672 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x05a65f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a8170; op2val:0xbef70672;
op3val:0x7e85a65f; valaddr_reg:x3; val_offset:2325*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2325*FLEN/8, x4, x1, x2)

inst_776:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a8170 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x770672 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x05a65f and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a8170; op2val:0xbef70672;
op3val:0x7e85a65f; valaddr_reg:x3; val_offset:2328*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2328*FLEN/8, x4, x1, x2)

inst_777:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a8170 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x770672 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x05a65f and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a8170; op2val:0xbef70672;
op3val:0x7e85a65f; valaddr_reg:x3; val_offset:2331*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2331*FLEN/8, x4, x1, x2)

inst_778:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a8170 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x770672 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x05a65f and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a8170; op2val:0xbef70672;
op3val:0x7e85a65f; valaddr_reg:x3; val_offset:2334*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2334*FLEN/8, x4, x1, x2)

inst_779:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a8170 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x770672 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x05a65f and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a8170; op2val:0xbef70672;
op3val:0x7e85a65f; valaddr_reg:x3; val_offset:2337*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2337*FLEN/8, x4, x1, x2)

inst_780:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b252f and fs2 == 1 and fe2 == 0x7e and fm2 == 0x53da48 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x664c95 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b252f; op2val:0xbf53da48;
op3val:0x7ee64c95; valaddr_reg:x3; val_offset:2340*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2340*FLEN/8, x4, x1, x2)

inst_781:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b252f and fs2 == 1 and fe2 == 0x7e and fm2 == 0x53da48 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x664c95 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b252f; op2val:0xbf53da48;
op3val:0x7ee64c95; valaddr_reg:x3; val_offset:2343*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2343*FLEN/8, x4, x1, x2)

inst_782:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b252f and fs2 == 1 and fe2 == 0x7e and fm2 == 0x53da48 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x664c95 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b252f; op2val:0xbf53da48;
op3val:0x7ee64c95; valaddr_reg:x3; val_offset:2346*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2346*FLEN/8, x4, x1, x2)

inst_783:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b252f and fs2 == 1 and fe2 == 0x7e and fm2 == 0x53da48 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x664c95 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b252f; op2val:0xbf53da48;
op3val:0x7ee64c95; valaddr_reg:x3; val_offset:2349*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2349*FLEN/8, x4, x1, x2)

inst_784:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b252f and fs2 == 1 and fe2 == 0x7e and fm2 == 0x53da48 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x664c95 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b252f; op2val:0xbf53da48;
op3val:0x7ee64c95; valaddr_reg:x3; val_offset:2352*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2352*FLEN/8, x4, x1, x2)

inst_785:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b3a21 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x7a0fde and fs3 == 0 and fe3 == 0xfe and fm3 == 0x07ff65 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b3a21; op2val:0xbf7a0fde;
op3val:0x7f07ff65; valaddr_reg:x3; val_offset:2355*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2355*FLEN/8, x4, x1, x2)

inst_786:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b3a21 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x7a0fde and fs3 == 0 and fe3 == 0xfe and fm3 == 0x07ff65 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b3a21; op2val:0xbf7a0fde;
op3val:0x7f07ff65; valaddr_reg:x3; val_offset:2358*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2358*FLEN/8, x4, x1, x2)

inst_787:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b3a21 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x7a0fde and fs3 == 0 and fe3 == 0xfe and fm3 == 0x07ff65 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b3a21; op2val:0xbf7a0fde;
op3val:0x7f07ff65; valaddr_reg:x3; val_offset:2361*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2361*FLEN/8, x4, x1, x2)

inst_788:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b3a21 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x7a0fde and fs3 == 0 and fe3 == 0xfe and fm3 == 0x07ff65 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b3a21; op2val:0xbf7a0fde;
op3val:0x7f07ff65; valaddr_reg:x3; val_offset:2364*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2364*FLEN/8, x4, x1, x2)

inst_789:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b3a21 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x7a0fde and fs3 == 0 and fe3 == 0xfe and fm3 == 0x07ff65 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b3a21; op2val:0xbf7a0fde;
op3val:0x7f07ff65; valaddr_reg:x3; val_offset:2367*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2367*FLEN/8, x4, x1, x2)

inst_790:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d53bc and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0043ea and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0d9eb9 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d53bc; op2val:0xbf8043ea;
op3val:0x7f0d9eb9; valaddr_reg:x3; val_offset:2370*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2370*FLEN/8, x4, x1, x2)

inst_791:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d53bc and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0043ea and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0d9eb9 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d53bc; op2val:0xbf8043ea;
op3val:0x7f0d9eb9; valaddr_reg:x3; val_offset:2373*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2373*FLEN/8, x4, x1, x2)

inst_792:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d53bc and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0043ea and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0d9eb9 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d53bc; op2val:0xbf8043ea;
op3val:0x7f0d9eb9; valaddr_reg:x3; val_offset:2376*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2376*FLEN/8, x4, x1, x2)

inst_793:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d53bc and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0043ea and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0d9eb9 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d53bc; op2val:0xbf8043ea;
op3val:0x7f0d9eb9; valaddr_reg:x3; val_offset:2379*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2379*FLEN/8, x4, x1, x2)

inst_794:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d53bc and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0043ea and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0d9eb9 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d53bc; op2val:0xbf8043ea;
op3val:0x7f0d9eb9; valaddr_reg:x3; val_offset:2382*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2382*FLEN/8, x4, x1, x2)

inst_795:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d5723 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x26896f and fs3 == 0 and fe3 == 0xfd and fm3 == 0x37e4c4 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d5723; op2val:0xbf26896f;
op3val:0x7eb7e4c4; valaddr_reg:x3; val_offset:2385*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2385*FLEN/8, x4, x1, x2)

inst_796:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d5723 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x26896f and fs3 == 0 and fe3 == 0xfd and fm3 == 0x37e4c4 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d5723; op2val:0xbf26896f;
op3val:0x7eb7e4c4; valaddr_reg:x3; val_offset:2388*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2388*FLEN/8, x4, x1, x2)

inst_797:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d5723 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x26896f and fs3 == 0 and fe3 == 0xfd and fm3 == 0x37e4c4 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d5723; op2val:0xbf26896f;
op3val:0x7eb7e4c4; valaddr_reg:x3; val_offset:2391*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2391*FLEN/8, x4, x1, x2)

inst_798:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d5723 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x26896f and fs3 == 0 and fe3 == 0xfd and fm3 == 0x37e4c4 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d5723; op2val:0xbf26896f;
op3val:0x7eb7e4c4; valaddr_reg:x3; val_offset:2394*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2394*FLEN/8, x4, x1, x2)

inst_799:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d5723 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x26896f and fs3 == 0 and fe3 == 0xfd and fm3 == 0x37e4c4 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d5723; op2val:0xbf26896f;
op3val:0x7eb7e4c4; valaddr_reg:x3; val_offset:2397*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2397*FLEN/8, x4, x1, x2)

inst_800:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ecce4 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x71ef4d and fs3 == 0 and fe3 == 0xfd and fm3 == 0x06f460 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ecce4; op2val:0xbef1ef4d;
op3val:0x7e86f460; valaddr_reg:x3; val_offset:2400*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2400*FLEN/8, x4, x1, x2)

inst_801:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ecce4 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x71ef4d and fs3 == 0 and fe3 == 0xfd and fm3 == 0x06f460 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ecce4; op2val:0xbef1ef4d;
op3val:0x7e86f460; valaddr_reg:x3; val_offset:2403*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2403*FLEN/8, x4, x1, x2)

inst_802:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ecce4 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x71ef4d and fs3 == 0 and fe3 == 0xfd and fm3 == 0x06f460 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ecce4; op2val:0xbef1ef4d;
op3val:0x7e86f460; valaddr_reg:x3; val_offset:2406*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2406*FLEN/8, x4, x1, x2)

inst_803:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ecce4 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x71ef4d and fs3 == 0 and fe3 == 0xfd and fm3 == 0x06f460 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ecce4; op2val:0xbef1ef4d;
op3val:0x7e86f460; valaddr_reg:x3; val_offset:2409*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2409*FLEN/8, x4, x1, x2)

inst_804:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ecce4 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x71ef4d and fs3 == 0 and fe3 == 0xfd and fm3 == 0x06f460 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ecce4; op2val:0xbef1ef4d;
op3val:0x7e86f460; valaddr_reg:x3; val_offset:2412*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2412*FLEN/8, x4, x1, x2)

inst_805:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ed6ae and fs2 == 1 and fe2 == 0x7e and fm2 == 0x5ebb57 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x788d65 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ed6ae; op2val:0xbf5ebb57;
op3val:0x7ef88d65; valaddr_reg:x3; val_offset:2415*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2415*FLEN/8, x4, x1, x2)

inst_806:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ed6ae and fs2 == 1 and fe2 == 0x7e and fm2 == 0x5ebb57 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x788d65 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ed6ae; op2val:0xbf5ebb57;
op3val:0x7ef88d65; valaddr_reg:x3; val_offset:2418*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2418*FLEN/8, x4, x1, x2)

inst_807:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ed6ae and fs2 == 1 and fe2 == 0x7e and fm2 == 0x5ebb57 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x788d65 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ed6ae; op2val:0xbf5ebb57;
op3val:0x7ef88d65; valaddr_reg:x3; val_offset:2421*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2421*FLEN/8, x4, x1, x2)

inst_808:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ed6ae and fs2 == 1 and fe2 == 0x7e and fm2 == 0x5ebb57 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x788d65 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ed6ae; op2val:0xbf5ebb57;
op3val:0x7ef88d65; valaddr_reg:x3; val_offset:2424*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2424*FLEN/8, x4, x1, x2)

inst_809:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ed6ae and fs2 == 1 and fe2 == 0x7e and fm2 == 0x5ebb57 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x788d65 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ed6ae; op2val:0xbf5ebb57;
op3val:0x7ef88d65; valaddr_reg:x3; val_offset:2427*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2427*FLEN/8, x4, x1, x2)

inst_810:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f7f8a and fs2 == 1 and fe2 == 0x7d and fm2 == 0x2b31ba and fs3 == 0 and fe3 == 0xfc and fm3 == 0x3fec23 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f7f8a; op2val:0xbeab31ba;
op3val:0x7e3fec23; valaddr_reg:x3; val_offset:2430*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2430*FLEN/8, x4, x1, x2)

inst_811:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f7f8a and fs2 == 1 and fe2 == 0x7d and fm2 == 0x2b31ba and fs3 == 0 and fe3 == 0xfc and fm3 == 0x3fec23 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f7f8a; op2val:0xbeab31ba;
op3val:0x7e3fec23; valaddr_reg:x3; val_offset:2433*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2433*FLEN/8, x4, x1, x2)

inst_812:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f7f8a and fs2 == 1 and fe2 == 0x7d and fm2 == 0x2b31ba and fs3 == 0 and fe3 == 0xfc and fm3 == 0x3fec23 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f7f8a; op2val:0xbeab31ba;
op3val:0x7e3fec23; valaddr_reg:x3; val_offset:2436*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2436*FLEN/8, x4, x1, x2)

inst_813:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f7f8a and fs2 == 1 and fe2 == 0x7d and fm2 == 0x2b31ba and fs3 == 0 and fe3 == 0xfc and fm3 == 0x3fec23 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f7f8a; op2val:0xbeab31ba;
op3val:0x7e3fec23; valaddr_reg:x3; val_offset:2439*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2439*FLEN/8, x4, x1, x2)

inst_814:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f7f8a and fs2 == 1 and fe2 == 0x7d and fm2 == 0x2b31ba and fs3 == 0 and fe3 == 0xfc and fm3 == 0x3fec23 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f7f8a; op2val:0xbeab31ba;
op3val:0x7e3fec23; valaddr_reg:x3; val_offset:2442*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2442*FLEN/8, x4, x1, x2)

inst_815:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1114c8 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2a450f and fs3 == 0 and fe3 == 0xfd and fm3 == 0x40fde0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1114c8; op2val:0xbf2a450f;
op3val:0x7ec0fde0; valaddr_reg:x3; val_offset:2445*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2445*FLEN/8, x4, x1, x2)

inst_816:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1114c8 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2a450f and fs3 == 0 and fe3 == 0xfd and fm3 == 0x40fde0 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1114c8; op2val:0xbf2a450f;
op3val:0x7ec0fde0; valaddr_reg:x3; val_offset:2448*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2448*FLEN/8, x4, x1, x2)

inst_817:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1114c8 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2a450f and fs3 == 0 and fe3 == 0xfd and fm3 == 0x40fde0 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1114c8; op2val:0xbf2a450f;
op3val:0x7ec0fde0; valaddr_reg:x3; val_offset:2451*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2451*FLEN/8, x4, x1, x2)

inst_818:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1114c8 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2a450f and fs3 == 0 and fe3 == 0xfd and fm3 == 0x40fde0 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1114c8; op2val:0xbf2a450f;
op3val:0x7ec0fde0; valaddr_reg:x3; val_offset:2454*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2454*FLEN/8, x4, x1, x2)

inst_819:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1114c8 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2a450f and fs3 == 0 and fe3 == 0xfd and fm3 == 0x40fde0 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1114c8; op2val:0xbf2a450f;
op3val:0x7ec0fde0; valaddr_reg:x3; val_offset:2457*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2457*FLEN/8, x4, x1, x2)

inst_820:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11bea7 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x12ceae and fs3 == 0 and fe3 == 0xfc and fm3 == 0x2728cd and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11bea7; op2val:0xbe92ceae;
op3val:0x7e2728cd; valaddr_reg:x3; val_offset:2460*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2460*FLEN/8, x4, x1, x2)

inst_821:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11bea7 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x12ceae and fs3 == 0 and fe3 == 0xfc and fm3 == 0x2728cd and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11bea7; op2val:0xbe92ceae;
op3val:0x7e2728cd; valaddr_reg:x3; val_offset:2463*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2463*FLEN/8, x4, x1, x2)

inst_822:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11bea7 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x12ceae and fs3 == 0 and fe3 == 0xfc and fm3 == 0x2728cd and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11bea7; op2val:0xbe92ceae;
op3val:0x7e2728cd; valaddr_reg:x3; val_offset:2466*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2466*FLEN/8, x4, x1, x2)

inst_823:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11bea7 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x12ceae and fs3 == 0 and fe3 == 0xfc and fm3 == 0x2728cd and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11bea7; op2val:0xbe92ceae;
op3val:0x7e2728cd; valaddr_reg:x3; val_offset:2469*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2469*FLEN/8, x4, x1, x2)

inst_824:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11bea7 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x12ceae and fs3 == 0 and fe3 == 0xfc and fm3 == 0x2728cd and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11bea7; op2val:0xbe92ceae;
op3val:0x7e2728cd; valaddr_reg:x3; val_offset:2472*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2472*FLEN/8, x4, x1, x2)

inst_825:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125073 and fs2 == 1 and fe2 == 0x7b and fm2 == 0x23864f and fs3 == 0 and fe3 == 0xfa and fm3 == 0x3aebfa and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125073; op2val:0xbda3864f;
op3val:0x7d3aebfa; valaddr_reg:x3; val_offset:2475*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2475*FLEN/8, x4, x1, x2)

inst_826:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125073 and fs2 == 1 and fe2 == 0x7b and fm2 == 0x23864f and fs3 == 0 and fe3 == 0xfa and fm3 == 0x3aebfa and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125073; op2val:0xbda3864f;
op3val:0x7d3aebfa; valaddr_reg:x3; val_offset:2478*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2478*FLEN/8, x4, x1, x2)

inst_827:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125073 and fs2 == 1 and fe2 == 0x7b and fm2 == 0x23864f and fs3 == 0 and fe3 == 0xfa and fm3 == 0x3aebfa and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125073; op2val:0xbda3864f;
op3val:0x7d3aebfa; valaddr_reg:x3; val_offset:2481*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2481*FLEN/8, x4, x1, x2)

inst_828:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125073 and fs2 == 1 and fe2 == 0x7b and fm2 == 0x23864f and fs3 == 0 and fe3 == 0xfa and fm3 == 0x3aebfa and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125073; op2val:0xbda3864f;
op3val:0x7d3aebfa; valaddr_reg:x3; val_offset:2484*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2484*FLEN/8, x4, x1, x2)

inst_829:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125073 and fs2 == 1 and fe2 == 0x7b and fm2 == 0x23864f and fs3 == 0 and fe3 == 0xfa and fm3 == 0x3aebfa and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125073; op2val:0xbda3864f;
op3val:0x7d3aebfa; valaddr_reg:x3; val_offset:2487*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2487*FLEN/8, x4, x1, x2)

inst_830:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x12bec8 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x64fb22 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0341df and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f12bec8; op2val:0xbee4fb22;
op3val:0x7e8341df; valaddr_reg:x3; val_offset:2490*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2490*FLEN/8, x4, x1, x2)

inst_831:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x12bec8 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x64fb22 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0341df and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f12bec8; op2val:0xbee4fb22;
op3val:0x7e8341df; valaddr_reg:x3; val_offset:2493*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2493*FLEN/8, x4, x1, x2)

inst_832:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x12bec8 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x64fb22 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0341df and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f12bec8; op2val:0xbee4fb22;
op3val:0x7e8341df; valaddr_reg:x3; val_offset:2496*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2496*FLEN/8, x4, x1, x2)

inst_833:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x12bec8 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x64fb22 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0341df and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f12bec8; op2val:0xbee4fb22;
op3val:0x7e8341df; valaddr_reg:x3; val_offset:2499*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2499*FLEN/8, x4, x1, x2)

inst_834:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x12bec8 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x64fb22 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0341df and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f12bec8; op2val:0xbee4fb22;
op3val:0x7e8341df; valaddr_reg:x3; val_offset:2502*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2502*FLEN/8, x4, x1, x2)

inst_835:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x133609 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x09b51b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1e6020 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f133609; op2val:0xbf89b51b;
op3val:0x7f1e6020; valaddr_reg:x3; val_offset:2505*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2505*FLEN/8, x4, x1, x2)

inst_836:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x133609 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x09b51b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1e6020 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f133609; op2val:0xbf89b51b;
op3val:0x7f1e6020; valaddr_reg:x3; val_offset:2508*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2508*FLEN/8, x4, x1, x2)

inst_837:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x133609 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x09b51b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1e6020 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f133609; op2val:0xbf89b51b;
op3val:0x7f1e6020; valaddr_reg:x3; val_offset:2511*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2511*FLEN/8, x4, x1, x2)

inst_838:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x133609 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x09b51b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1e6020 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f133609; op2val:0xbf89b51b;
op3val:0x7f1e6020; valaddr_reg:x3; val_offset:2514*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2514*FLEN/8, x4, x1, x2)

inst_839:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x133609 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x09b51b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1e6020 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f133609; op2val:0xbf89b51b;
op3val:0x7f1e6020; valaddr_reg:x3; val_offset:2517*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2517*FLEN/8, x4, x1, x2)

inst_840:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15ce5c and fs2 == 1 and fe2 == 0x7f and fm2 == 0x22ead4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3eac02 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15ce5c; op2val:0xbfa2ead4;
op3val:0x7f3eac02; valaddr_reg:x3; val_offset:2520*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2520*FLEN/8, x4, x1, x2)

inst_841:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15ce5c and fs2 == 1 and fe2 == 0x7f and fm2 == 0x22ead4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3eac02 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15ce5c; op2val:0xbfa2ead4;
op3val:0x7f3eac02; valaddr_reg:x3; val_offset:2523*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2523*FLEN/8, x4, x1, x2)

inst_842:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15ce5c and fs2 == 1 and fe2 == 0x7f and fm2 == 0x22ead4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3eac02 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15ce5c; op2val:0xbfa2ead4;
op3val:0x7f3eac02; valaddr_reg:x3; val_offset:2526*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2526*FLEN/8, x4, x1, x2)

inst_843:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15ce5c and fs2 == 1 and fe2 == 0x7f and fm2 == 0x22ead4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3eac02 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15ce5c; op2val:0xbfa2ead4;
op3val:0x7f3eac02; valaddr_reg:x3; val_offset:2529*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2529*FLEN/8, x4, x1, x2)

inst_844:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15ce5c and fs2 == 1 and fe2 == 0x7f and fm2 == 0x22ead4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3eac02 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15ce5c; op2val:0xbfa2ead4;
op3val:0x7f3eac02; valaddr_reg:x3; val_offset:2532*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2532*FLEN/8, x4, x1, x2)

inst_845:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15e839 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0213cf and fs3 == 0 and fe3 == 0xfe and fm3 == 0x18570d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15e839; op2val:0xbf8213cf;
op3val:0x7f18570d; valaddr_reg:x3; val_offset:2535*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2535*FLEN/8, x4, x1, x2)

inst_846:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15e839 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0213cf and fs3 == 0 and fe3 == 0xfe and fm3 == 0x18570d and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15e839; op2val:0xbf8213cf;
op3val:0x7f18570d; valaddr_reg:x3; val_offset:2538*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2538*FLEN/8, x4, x1, x2)

inst_847:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15e839 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0213cf and fs3 == 0 and fe3 == 0xfe and fm3 == 0x18570d and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15e839; op2val:0xbf8213cf;
op3val:0x7f18570d; valaddr_reg:x3; val_offset:2541*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2541*FLEN/8, x4, x1, x2)

inst_848:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15e839 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0213cf and fs3 == 0 and fe3 == 0xfe and fm3 == 0x18570d and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15e839; op2val:0xbf8213cf;
op3val:0x7f18570d; valaddr_reg:x3; val_offset:2544*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2544*FLEN/8, x4, x1, x2)

inst_849:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15e839 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0213cf and fs3 == 0 and fe3 == 0xfe and fm3 == 0x18570d and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15e839; op2val:0xbf8213cf;
op3val:0x7f18570d; valaddr_reg:x3; val_offset:2547*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2547*FLEN/8, x4, x1, x2)

inst_850:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162ed7 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x029e84 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x194190 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162ed7; op2val:0xbe029e84;
op3val:0x7d994190; valaddr_reg:x3; val_offset:2550*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2550*FLEN/8, x4, x1, x2)

inst_851:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162ed7 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x029e84 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x194190 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162ed7; op2val:0xbe029e84;
op3val:0x7d994190; valaddr_reg:x3; val_offset:2553*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2553*FLEN/8, x4, x1, x2)

inst_852:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162ed7 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x029e84 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x194190 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162ed7; op2val:0xbe029e84;
op3val:0x7d994190; valaddr_reg:x3; val_offset:2556*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2556*FLEN/8, x4, x1, x2)

inst_853:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162ed7 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x029e84 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x194190 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162ed7; op2val:0xbe029e84;
op3val:0x7d994190; valaddr_reg:x3; val_offset:2559*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2559*FLEN/8, x4, x1, x2)

inst_854:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162ed7 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x029e84 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x194190 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162ed7; op2val:0xbe029e84;
op3val:0x7d994190; valaddr_reg:x3; val_offset:2562*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2562*FLEN/8, x4, x1, x2)

inst_855:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1660d9 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x72578d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0e5afb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1660d9; op2val:0xbf72578d;
op3val:0x7f0e5afb; valaddr_reg:x3; val_offset:2565*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2565*FLEN/8, x4, x1, x2)

inst_856:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1660d9 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x72578d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0e5afb and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1660d9; op2val:0xbf72578d;
op3val:0x7f0e5afb; valaddr_reg:x3; val_offset:2568*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2568*FLEN/8, x4, x1, x2)

inst_857:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1660d9 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x72578d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0e5afb and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1660d9; op2val:0xbf72578d;
op3val:0x7f0e5afb; valaddr_reg:x3; val_offset:2571*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2571*FLEN/8, x4, x1, x2)

inst_858:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1660d9 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x72578d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0e5afb and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1660d9; op2val:0xbf72578d;
op3val:0x7f0e5afb; valaddr_reg:x3; val_offset:2574*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2574*FLEN/8, x4, x1, x2)

inst_859:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1660d9 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x72578d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0e5afb and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1660d9; op2val:0xbf72578d;
op3val:0x7f0e5afb; valaddr_reg:x3; val_offset:2577*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2577*FLEN/8, x4, x1, x2)

inst_860:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x166373 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x415f53 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x6331f4 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f166373; op2val:0xbec15f53;
op3val:0x7e6331f4; valaddr_reg:x3; val_offset:2580*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2580*FLEN/8, x4, x1, x2)

inst_861:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x166373 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x415f53 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x6331f4 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f166373; op2val:0xbec15f53;
op3val:0x7e6331f4; valaddr_reg:x3; val_offset:2583*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2583*FLEN/8, x4, x1, x2)

inst_862:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x166373 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x415f53 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x6331f4 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f166373; op2val:0xbec15f53;
op3val:0x7e6331f4; valaddr_reg:x3; val_offset:2586*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2586*FLEN/8, x4, x1, x2)

inst_863:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x166373 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x415f53 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x6331f4 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f166373; op2val:0xbec15f53;
op3val:0x7e6331f4; valaddr_reg:x3; val_offset:2589*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2589*FLEN/8, x4, x1, x2)

inst_864:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x166373 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x415f53 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x6331f4 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f166373; op2val:0xbec15f53;
op3val:0x7e6331f4; valaddr_reg:x3; val_offset:2592*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2592*FLEN/8, x4, x1, x2)

inst_865:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a693b and fs2 == 1 and fe2 == 0x7e and fm2 == 0x208215 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x41a077 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a693b; op2val:0xbf208215;
op3val:0x7ec1a077; valaddr_reg:x3; val_offset:2595*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2595*FLEN/8, x4, x1, x2)

inst_866:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a693b and fs2 == 1 and fe2 == 0x7e and fm2 == 0x208215 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x41a077 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a693b; op2val:0xbf208215;
op3val:0x7ec1a077; valaddr_reg:x3; val_offset:2598*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2598*FLEN/8, x4, x1, x2)

inst_867:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a693b and fs2 == 1 and fe2 == 0x7e and fm2 == 0x208215 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x41a077 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a693b; op2val:0xbf208215;
op3val:0x7ec1a077; valaddr_reg:x3; val_offset:2601*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2601*FLEN/8, x4, x1, x2)

inst_868:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a693b and fs2 == 1 and fe2 == 0x7e and fm2 == 0x208215 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x41a077 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a693b; op2val:0xbf208215;
op3val:0x7ec1a077; valaddr_reg:x3; val_offset:2604*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2604*FLEN/8, x4, x1, x2)

inst_869:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a693b and fs2 == 1 and fe2 == 0x7e and fm2 == 0x208215 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x41a077 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a693b; op2val:0xbf208215;
op3val:0x7ec1a077; valaddr_reg:x3; val_offset:2607*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2607*FLEN/8, x4, x1, x2)

inst_870:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b0221 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x4fc770 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7b9ef7 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b0221; op2val:0xbf4fc770;
op3val:0x7efb9ef7; valaddr_reg:x3; val_offset:2610*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2610*FLEN/8, x4, x1, x2)

inst_871:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b0221 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x4fc770 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7b9ef7 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b0221; op2val:0xbf4fc770;
op3val:0x7efb9ef7; valaddr_reg:x3; val_offset:2613*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2613*FLEN/8, x4, x1, x2)

inst_872:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b0221 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x4fc770 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7b9ef7 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b0221; op2val:0xbf4fc770;
op3val:0x7efb9ef7; valaddr_reg:x3; val_offset:2616*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2616*FLEN/8, x4, x1, x2)

inst_873:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b0221 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x4fc770 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7b9ef7 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b0221; op2val:0xbf4fc770;
op3val:0x7efb9ef7; valaddr_reg:x3; val_offset:2619*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2619*FLEN/8, x4, x1, x2)

inst_874:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b0221 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x4fc770 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7b9ef7 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b0221; op2val:0xbf4fc770;
op3val:0x7efb9ef7; valaddr_reg:x3; val_offset:2622*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2622*FLEN/8, x4, x1, x2)

inst_875:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b2767 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x6d8ad3 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0ff79e and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b2767; op2val:0xbeed8ad3;
op3val:0x7e8ff79e; valaddr_reg:x3; val_offset:2625*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2625*FLEN/8, x4, x1, x2)

inst_876:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b2767 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x6d8ad3 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0ff79e and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b2767; op2val:0xbeed8ad3;
op3val:0x7e8ff79e; valaddr_reg:x3; val_offset:2628*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2628*FLEN/8, x4, x1, x2)

inst_877:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b2767 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x6d8ad3 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0ff79e and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b2767; op2val:0xbeed8ad3;
op3val:0x7e8ff79e; valaddr_reg:x3; val_offset:2631*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2631*FLEN/8, x4, x1, x2)

inst_878:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b2767 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x6d8ad3 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0ff79e and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b2767; op2val:0xbeed8ad3;
op3val:0x7e8ff79e; valaddr_reg:x3; val_offset:2634*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2634*FLEN/8, x4, x1, x2)

inst_879:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b2767 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x6d8ad3 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0ff79e and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b2767; op2val:0xbeed8ad3;
op3val:0x7e8ff79e; valaddr_reg:x3; val_offset:2637*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2637*FLEN/8, x4, x1, x2)

inst_880:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c25fe and fs2 == 1 and fe2 == 0x7e and fm2 == 0x3bcbbf and fs3 == 0 and fe3 == 0xfd and fm3 == 0x651810 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c25fe; op2val:0xbf3bcbbf;
op3val:0x7ee51810; valaddr_reg:x3; val_offset:2640*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2640*FLEN/8, x4, x1, x2)

inst_881:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c25fe and fs2 == 1 and fe2 == 0x7e and fm2 == 0x3bcbbf and fs3 == 0 and fe3 == 0xfd and fm3 == 0x651810 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c25fe; op2val:0xbf3bcbbf;
op3val:0x7ee51810; valaddr_reg:x3; val_offset:2643*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2643*FLEN/8, x4, x1, x2)

inst_882:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c25fe and fs2 == 1 and fe2 == 0x7e and fm2 == 0x3bcbbf and fs3 == 0 and fe3 == 0xfd and fm3 == 0x651810 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c25fe; op2val:0xbf3bcbbf;
op3val:0x7ee51810; valaddr_reg:x3; val_offset:2646*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2646*FLEN/8, x4, x1, x2)

inst_883:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c25fe and fs2 == 1 and fe2 == 0x7e and fm2 == 0x3bcbbf and fs3 == 0 and fe3 == 0xfd and fm3 == 0x651810 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c25fe; op2val:0xbf3bcbbf;
op3val:0x7ee51810; valaddr_reg:x3; val_offset:2649*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2649*FLEN/8, x4, x1, x2)

inst_884:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c25fe and fs2 == 1 and fe2 == 0x7e and fm2 == 0x3bcbbf and fs3 == 0 and fe3 == 0xfd and fm3 == 0x651810 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c25fe; op2val:0xbf3bcbbf;
op3val:0x7ee51810; valaddr_reg:x3; val_offset:2652*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2652*FLEN/8, x4, x1, x2)

inst_885:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d9df6 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x3ca571 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x684bbc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d9df6; op2val:0xbf3ca571;
op3val:0x7ee84bbc; valaddr_reg:x3; val_offset:2655*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2655*FLEN/8, x4, x1, x2)

inst_886:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d9df6 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x3ca571 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x684bbc and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d9df6; op2val:0xbf3ca571;
op3val:0x7ee84bbc; valaddr_reg:x3; val_offset:2658*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2658*FLEN/8, x4, x1, x2)

inst_887:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d9df6 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x3ca571 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x684bbc and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d9df6; op2val:0xbf3ca571;
op3val:0x7ee84bbc; valaddr_reg:x3; val_offset:2661*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2661*FLEN/8, x4, x1, x2)

inst_888:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d9df6 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x3ca571 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x684bbc and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d9df6; op2val:0xbf3ca571;
op3val:0x7ee84bbc; valaddr_reg:x3; val_offset:2664*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2664*FLEN/8, x4, x1, x2)

inst_889:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d9df6 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x3ca571 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x684bbc and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d9df6; op2val:0xbf3ca571;
op3val:0x7ee84bbc; valaddr_reg:x3; val_offset:2667*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2667*FLEN/8, x4, x1, x2)

inst_890:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6a36 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2d9764 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x56d6eb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6a36; op2val:0xbf2d9764;
op3val:0x7ed6d6eb; valaddr_reg:x3; val_offset:2670*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2670*FLEN/8, x4, x1, x2)

inst_891:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6a36 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2d9764 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x56d6eb and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6a36; op2val:0xbf2d9764;
op3val:0x7ed6d6eb; valaddr_reg:x3; val_offset:2673*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2673*FLEN/8, x4, x1, x2)

inst_892:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6a36 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2d9764 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x56d6eb and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6a36; op2val:0xbf2d9764;
op3val:0x7ed6d6eb; valaddr_reg:x3; val_offset:2676*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2676*FLEN/8, x4, x1, x2)

inst_893:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6a36 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2d9764 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x56d6eb and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6a36; op2val:0xbf2d9764;
op3val:0x7ed6d6eb; valaddr_reg:x3; val_offset:2679*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2679*FLEN/8, x4, x1, x2)

inst_894:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6a36 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2d9764 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x56d6eb and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6a36; op2val:0xbf2d9764;
op3val:0x7ed6d6eb; valaddr_reg:x3; val_offset:2682*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2682*FLEN/8, x4, x1, x2)

inst_895:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f0fb5 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x7bc8f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1c7142 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f0fb5; op2val:0xbf7bc8f4;
op3val:0x7f1c7142; valaddr_reg:x3; val_offset:2685*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2685*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_8)

inst_896:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f0fb5 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x7bc8f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1c7142 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f0fb5; op2val:0xbf7bc8f4;
op3val:0x7f1c7142; valaddr_reg:x3; val_offset:2688*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2688*FLEN/8, x4, x1, x2)

inst_897:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f0fb5 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x7bc8f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1c7142 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f0fb5; op2val:0xbf7bc8f4;
op3val:0x7f1c7142; valaddr_reg:x3; val_offset:2691*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2691*FLEN/8, x4, x1, x2)

inst_898:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f0fb5 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x7bc8f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1c7142 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f0fb5; op2val:0xbf7bc8f4;
op3val:0x7f1c7142; valaddr_reg:x3; val_offset:2694*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2694*FLEN/8, x4, x1, x2)

inst_899:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f0fb5 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x7bc8f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1c7142 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f0fb5; op2val:0xbf7bc8f4;
op3val:0x7f1c7142; valaddr_reg:x3; val_offset:2697*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2697*FLEN/8, x4, x1, x2)

inst_900:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f4ea2 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x630bb6 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0d4a04 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f4ea2; op2val:0xbee30bb6;
op3val:0x7e8d4a04; valaddr_reg:x3; val_offset:2700*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2700*FLEN/8, x4, x1, x2)

inst_901:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f4ea2 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x630bb6 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0d4a04 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f4ea2; op2val:0xbee30bb6;
op3val:0x7e8d4a04; valaddr_reg:x3; val_offset:2703*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2703*FLEN/8, x4, x1, x2)

inst_902:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f4ea2 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x630bb6 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0d4a04 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f4ea2; op2val:0xbee30bb6;
op3val:0x7e8d4a04; valaddr_reg:x3; val_offset:2706*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2706*FLEN/8, x4, x1, x2)

inst_903:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f4ea2 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x630bb6 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0d4a04 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f4ea2; op2val:0xbee30bb6;
op3val:0x7e8d4a04; valaddr_reg:x3; val_offset:2709*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2709*FLEN/8, x4, x1, x2)

inst_904:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f4ea2 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x630bb6 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0d4a04 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f4ea2; op2val:0xbee30bb6;
op3val:0x7e8d4a04; valaddr_reg:x3; val_offset:2712*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2712*FLEN/8, x4, x1, x2)

inst_905:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207343 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x00b64e and fs3 == 0 and fe3 == 0xfc and fm3 == 0x2157c9 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207343; op2val:0xbe80b64e;
op3val:0x7e2157c9; valaddr_reg:x3; val_offset:2715*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2715*FLEN/8, x4, x1, x2)

inst_906:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207343 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x00b64e and fs3 == 0 and fe3 == 0xfc and fm3 == 0x2157c9 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207343; op2val:0xbe80b64e;
op3val:0x7e2157c9; valaddr_reg:x3; val_offset:2718*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2718*FLEN/8, x4, x1, x2)

inst_907:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207343 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x00b64e and fs3 == 0 and fe3 == 0xfc and fm3 == 0x2157c9 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207343; op2val:0xbe80b64e;
op3val:0x7e2157c9; valaddr_reg:x3; val_offset:2721*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2721*FLEN/8, x4, x1, x2)

inst_908:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207343 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x00b64e and fs3 == 0 and fe3 == 0xfc and fm3 == 0x2157c9 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207343; op2val:0xbe80b64e;
op3val:0x7e2157c9; valaddr_reg:x3; val_offset:2724*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2724*FLEN/8, x4, x1, x2)

inst_909:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207343 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x00b64e and fs3 == 0 and fe3 == 0xfc and fm3 == 0x2157c9 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207343; op2val:0xbe80b64e;
op3val:0x7e2157c9; valaddr_reg:x3; val_offset:2727*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2727*FLEN/8, x4, x1, x2)

inst_910:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dd6a and fs2 == 1 and fe2 == 0x7e and fm2 == 0x18c1e6 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3ffa9e and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dd6a; op2val:0xbf18c1e6;
op3val:0x7ebffa9e; valaddr_reg:x3; val_offset:2730*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2730*FLEN/8, x4, x1, x2)

inst_911:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dd6a and fs2 == 1 and fe2 == 0x7e and fm2 == 0x18c1e6 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3ffa9e and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dd6a; op2val:0xbf18c1e6;
op3val:0x7ebffa9e; valaddr_reg:x3; val_offset:2733*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2733*FLEN/8, x4, x1, x2)

inst_912:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dd6a and fs2 == 1 and fe2 == 0x7e and fm2 == 0x18c1e6 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3ffa9e and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dd6a; op2val:0xbf18c1e6;
op3val:0x7ebffa9e; valaddr_reg:x3; val_offset:2736*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2736*FLEN/8, x4, x1, x2)

inst_913:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dd6a and fs2 == 1 and fe2 == 0x7e and fm2 == 0x18c1e6 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3ffa9e and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dd6a; op2val:0xbf18c1e6;
op3val:0x7ebffa9e; valaddr_reg:x3; val_offset:2739*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2739*FLEN/8, x4, x1, x2)

inst_914:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dd6a and fs2 == 1 and fe2 == 0x7e and fm2 == 0x18c1e6 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3ffa9e and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dd6a; op2val:0xbf18c1e6;
op3val:0x7ebffa9e; valaddr_reg:x3; val_offset:2742*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2742*FLEN/8, x4, x1, x2)

inst_915:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20eedb and fs2 == 1 and fe2 == 0x7d and fm2 == 0x24389c and fs3 == 0 and fe3 == 0xfc and fm3 == 0x4e7935 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20eedb; op2val:0xbea4389c;
op3val:0x7e4e7935; valaddr_reg:x3; val_offset:2745*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2745*FLEN/8, x4, x1, x2)

inst_916:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20eedb and fs2 == 1 and fe2 == 0x7d and fm2 == 0x24389c and fs3 == 0 and fe3 == 0xfc and fm3 == 0x4e7935 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20eedb; op2val:0xbea4389c;
op3val:0x7e4e7935; valaddr_reg:x3; val_offset:2748*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2748*FLEN/8, x4, x1, x2)

inst_917:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20eedb and fs2 == 1 and fe2 == 0x7d and fm2 == 0x24389c and fs3 == 0 and fe3 == 0xfc and fm3 == 0x4e7935 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20eedb; op2val:0xbea4389c;
op3val:0x7e4e7935; valaddr_reg:x3; val_offset:2751*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2751*FLEN/8, x4, x1, x2)

inst_918:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20eedb and fs2 == 1 and fe2 == 0x7d and fm2 == 0x24389c and fs3 == 0 and fe3 == 0xfc and fm3 == 0x4e7935 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20eedb; op2val:0xbea4389c;
op3val:0x7e4e7935; valaddr_reg:x3; val_offset:2754*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2754*FLEN/8, x4, x1, x2)

inst_919:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20eedb and fs2 == 1 and fe2 == 0x7d and fm2 == 0x24389c and fs3 == 0 and fe3 == 0xfc and fm3 == 0x4e7935 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20eedb; op2val:0xbea4389c;
op3val:0x7e4e7935; valaddr_reg:x3; val_offset:2757*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2757*FLEN/8, x4, x1, x2)

inst_920:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x218e29 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x3034b9 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x5e6605 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f218e29; op2val:0xbeb034b9;
op3val:0x7e5e6605; valaddr_reg:x3; val_offset:2760*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2760*FLEN/8, x4, x1, x2)

inst_921:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x218e29 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x3034b9 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x5e6605 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f218e29; op2val:0xbeb034b9;
op3val:0x7e5e6605; valaddr_reg:x3; val_offset:2763*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2763*FLEN/8, x4, x1, x2)

inst_922:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x218e29 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x3034b9 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x5e6605 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f218e29; op2val:0xbeb034b9;
op3val:0x7e5e6605; valaddr_reg:x3; val_offset:2766*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2766*FLEN/8, x4, x1, x2)

inst_923:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x218e29 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x3034b9 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x5e6605 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f218e29; op2val:0xbeb034b9;
op3val:0x7e5e6605; valaddr_reg:x3; val_offset:2769*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2769*FLEN/8, x4, x1, x2)

inst_924:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x218e29 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x3034b9 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x5e6605 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f218e29; op2val:0xbeb034b9;
op3val:0x7e5e6605; valaddr_reg:x3; val_offset:2772*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2772*FLEN/8, x4, x1, x2)

inst_925:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21c953 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x4fe858 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0364a1 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21c953; op2val:0xbf4fe858;
op3val:0x7f0364a1; valaddr_reg:x3; val_offset:2775*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2775*FLEN/8, x4, x1, x2)

inst_926:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21c953 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x4fe858 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0364a1 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21c953; op2val:0xbf4fe858;
op3val:0x7f0364a1; valaddr_reg:x3; val_offset:2778*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2778*FLEN/8, x4, x1, x2)

inst_927:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21c953 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x4fe858 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0364a1 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21c953; op2val:0xbf4fe858;
op3val:0x7f0364a1; valaddr_reg:x3; val_offset:2781*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2781*FLEN/8, x4, x1, x2)

inst_928:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21c953 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x4fe858 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0364a1 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21c953; op2val:0xbf4fe858;
op3val:0x7f0364a1; valaddr_reg:x3; val_offset:2784*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2784*FLEN/8, x4, x1, x2)

inst_929:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21c953 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x4fe858 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0364a1 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21c953; op2val:0xbf4fe858;
op3val:0x7f0364a1; valaddr_reg:x3; val_offset:2787*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2787*FLEN/8, x4, x1, x2)

inst_930:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21f35d and fs2 == 1 and fe2 == 0x7e and fm2 == 0x18d959 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4163ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21f35d; op2val:0xbf18d959;
op3val:0x7ec163ff; valaddr_reg:x3; val_offset:2790*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2790*FLEN/8, x4, x1, x2)

inst_931:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21f35d and fs2 == 1 and fe2 == 0x7e and fm2 == 0x18d959 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4163ff and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21f35d; op2val:0xbf18d959;
op3val:0x7ec163ff; valaddr_reg:x3; val_offset:2793*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2793*FLEN/8, x4, x1, x2)

inst_932:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21f35d and fs2 == 1 and fe2 == 0x7e and fm2 == 0x18d959 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4163ff and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21f35d; op2val:0xbf18d959;
op3val:0x7ec163ff; valaddr_reg:x3; val_offset:2796*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2796*FLEN/8, x4, x1, x2)

inst_933:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21f35d and fs2 == 1 and fe2 == 0x7e and fm2 == 0x18d959 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4163ff and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21f35d; op2val:0xbf18d959;
op3val:0x7ec163ff; valaddr_reg:x3; val_offset:2799*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2799*FLEN/8, x4, x1, x2)

inst_934:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21f35d and fs2 == 1 and fe2 == 0x7e and fm2 == 0x18d959 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4163ff and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21f35d; op2val:0xbf18d959;
op3val:0x7ec163ff; valaddr_reg:x3; val_offset:2802*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2802*FLEN/8, x4, x1, x2)

inst_935:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220c6a and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2025e5 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4abf7f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220c6a; op2val:0xbf2025e5;
op3val:0x7ecabf7f; valaddr_reg:x3; val_offset:2805*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2805*FLEN/8, x4, x1, x2)

inst_936:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220c6a and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2025e5 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4abf7f and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220c6a; op2val:0xbf2025e5;
op3val:0x7ecabf7f; valaddr_reg:x3; val_offset:2808*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2808*FLEN/8, x4, x1, x2)

inst_937:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220c6a and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2025e5 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4abf7f and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220c6a; op2val:0xbf2025e5;
op3val:0x7ecabf7f; valaddr_reg:x3; val_offset:2811*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2811*FLEN/8, x4, x1, x2)

inst_938:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220c6a and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2025e5 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4abf7f and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220c6a; op2val:0xbf2025e5;
op3val:0x7ecabf7f; valaddr_reg:x3; val_offset:2814*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2814*FLEN/8, x4, x1, x2)

inst_939:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220c6a and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2025e5 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4abf7f and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220c6a; op2val:0xbf2025e5;
op3val:0x7ecabf7f; valaddr_reg:x3; val_offset:2817*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2817*FLEN/8, x4, x1, x2)

inst_940:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2260a9 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x6d0137 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x165442 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2260a9; op2val:0xbe6d0137;
op3val:0x7e165442; valaddr_reg:x3; val_offset:2820*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2820*FLEN/8, x4, x1, x2)

inst_941:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2260a9 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x6d0137 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x165442 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2260a9; op2val:0xbe6d0137;
op3val:0x7e165442; valaddr_reg:x3; val_offset:2823*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2823*FLEN/8, x4, x1, x2)

inst_942:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2260a9 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x6d0137 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x165442 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2260a9; op2val:0xbe6d0137;
op3val:0x7e165442; valaddr_reg:x3; val_offset:2826*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2826*FLEN/8, x4, x1, x2)

inst_943:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2260a9 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x6d0137 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x165442 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2260a9; op2val:0xbe6d0137;
op3val:0x7e165442; valaddr_reg:x3; val_offset:2829*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2829*FLEN/8, x4, x1, x2)

inst_944:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2260a9 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x6d0137 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x165442 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2260a9; op2val:0xbe6d0137;
op3val:0x7e165442; valaddr_reg:x3; val_offset:2832*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2832*FLEN/8, x4, x1, x2)

inst_945:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22a277 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x3c9501 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x6f9bf2 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22a277; op2val:0xbebc9501;
op3val:0x7e6f9bf2; valaddr_reg:x3; val_offset:2835*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2835*FLEN/8, x4, x1, x2)

inst_946:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22a277 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x3c9501 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x6f9bf2 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22a277; op2val:0xbebc9501;
op3val:0x7e6f9bf2; valaddr_reg:x3; val_offset:2838*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2838*FLEN/8, x4, x1, x2)

inst_947:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22a277 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x3c9501 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x6f9bf2 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22a277; op2val:0xbebc9501;
op3val:0x7e6f9bf2; valaddr_reg:x3; val_offset:2841*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2841*FLEN/8, x4, x1, x2)

inst_948:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22a277 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x3c9501 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x6f9bf2 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22a277; op2val:0xbebc9501;
op3val:0x7e6f9bf2; valaddr_reg:x3; val_offset:2844*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2844*FLEN/8, x4, x1, x2)

inst_949:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22a277 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x3c9501 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x6f9bf2 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22a277; op2val:0xbebc9501;
op3val:0x7e6f9bf2; valaddr_reg:x3; val_offset:2847*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2847*FLEN/8, x4, x1, x2)

inst_950:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234aea and fs2 == 1 and fe2 == 0x7e and fm2 == 0x1b66c2 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x463fd0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234aea; op2val:0xbf1b66c2;
op3val:0x7ec63fd0; valaddr_reg:x3; val_offset:2850*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2850*FLEN/8, x4, x1, x2)

inst_951:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234aea and fs2 == 1 and fe2 == 0x7e and fm2 == 0x1b66c2 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x463fd0 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234aea; op2val:0xbf1b66c2;
op3val:0x7ec63fd0; valaddr_reg:x3; val_offset:2853*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2853*FLEN/8, x4, x1, x2)

inst_952:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234aea and fs2 == 1 and fe2 == 0x7e and fm2 == 0x1b66c2 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x463fd0 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234aea; op2val:0xbf1b66c2;
op3val:0x7ec63fd0; valaddr_reg:x3; val_offset:2856*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2856*FLEN/8, x4, x1, x2)

inst_953:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234aea and fs2 == 1 and fe2 == 0x7e and fm2 == 0x1b66c2 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x463fd0 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234aea; op2val:0xbf1b66c2;
op3val:0x7ec63fd0; valaddr_reg:x3; val_offset:2859*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2859*FLEN/8, x4, x1, x2)

inst_954:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234aea and fs2 == 1 and fe2 == 0x7e and fm2 == 0x1b66c2 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x463fd0 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234aea; op2val:0xbf1b66c2;
op3val:0x7ec63fd0; valaddr_reg:x3; val_offset:2862*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2862*FLEN/8, x4, x1, x2)

inst_955:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2522c3 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x05162a and fs3 == 0 and fe3 == 0xfd and fm3 == 0x2bb2b6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2522c3; op2val:0xbf05162a;
op3val:0x7eabb2b6; valaddr_reg:x3; val_offset:2865*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2865*FLEN/8, x4, x1, x2)

inst_956:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2522c3 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x05162a and fs3 == 0 and fe3 == 0xfd and fm3 == 0x2bb2b6 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2522c3; op2val:0xbf05162a;
op3val:0x7eabb2b6; valaddr_reg:x3; val_offset:2868*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2868*FLEN/8, x4, x1, x2)

inst_957:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2522c3 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x05162a and fs3 == 0 and fe3 == 0xfd and fm3 == 0x2bb2b6 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2522c3; op2val:0xbf05162a;
op3val:0x7eabb2b6; valaddr_reg:x3; val_offset:2871*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2871*FLEN/8, x4, x1, x2)

inst_958:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2522c3 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x05162a and fs3 == 0 and fe3 == 0xfd and fm3 == 0x2bb2b6 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2522c3; op2val:0xbf05162a;
op3val:0x7eabb2b6; valaddr_reg:x3; val_offset:2874*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2874*FLEN/8, x4, x1, x2)

inst_959:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2522c3 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x05162a and fs3 == 0 and fe3 == 0xfd and fm3 == 0x2bb2b6 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2522c3; op2val:0xbf05162a;
op3val:0x7eabb2b6; valaddr_reg:x3; val_offset:2877*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2877*FLEN/8, x4, x1, x2)

inst_960:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2614fd and fs2 == 1 and fe2 == 0x7e and fm2 == 0x412b5a and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7aa3e6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2614fd; op2val:0xbf412b5a;
op3val:0x7efaa3e6; valaddr_reg:x3; val_offset:2880*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2880*FLEN/8, x4, x1, x2)

inst_961:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2614fd and fs2 == 1 and fe2 == 0x7e and fm2 == 0x412b5a and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7aa3e6 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2614fd; op2val:0xbf412b5a;
op3val:0x7efaa3e6; valaddr_reg:x3; val_offset:2883*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2883*FLEN/8, x4, x1, x2)

inst_962:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2614fd and fs2 == 1 and fe2 == 0x7e and fm2 == 0x412b5a and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7aa3e6 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2614fd; op2val:0xbf412b5a;
op3val:0x7efaa3e6; valaddr_reg:x3; val_offset:2886*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2886*FLEN/8, x4, x1, x2)

inst_963:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2614fd and fs2 == 1 and fe2 == 0x7e and fm2 == 0x412b5a and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7aa3e6 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2614fd; op2val:0xbf412b5a;
op3val:0x7efaa3e6; valaddr_reg:x3; val_offset:2889*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2889*FLEN/8, x4, x1, x2)

inst_964:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2614fd and fs2 == 1 and fe2 == 0x7e and fm2 == 0x412b5a and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7aa3e6 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2614fd; op2val:0xbf412b5a;
op3val:0x7efaa3e6; valaddr_reg:x3; val_offset:2892*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2892*FLEN/8, x4, x1, x2)

inst_965:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x265cd2 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6681f8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x15cbdb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f265cd2; op2val:0xbf6681f8;
op3val:0x7f15cbdb; valaddr_reg:x3; val_offset:2895*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2895*FLEN/8, x4, x1, x2)

inst_966:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x265cd2 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6681f8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x15cbdb and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f265cd2; op2val:0xbf6681f8;
op3val:0x7f15cbdb; valaddr_reg:x3; val_offset:2898*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2898*FLEN/8, x4, x1, x2)

inst_967:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x265cd2 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6681f8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x15cbdb and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f265cd2; op2val:0xbf6681f8;
op3val:0x7f15cbdb; valaddr_reg:x3; val_offset:2901*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2901*FLEN/8, x4, x1, x2)

inst_968:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x265cd2 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6681f8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x15cbdb and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f265cd2; op2val:0xbf6681f8;
op3val:0x7f15cbdb; valaddr_reg:x3; val_offset:2904*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2904*FLEN/8, x4, x1, x2)

inst_969:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x265cd2 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6681f8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x15cbdb and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f265cd2; op2val:0xbf6681f8;
op3val:0x7f15cbdb; valaddr_reg:x3; val_offset:2907*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2907*FLEN/8, x4, x1, x2)

inst_970:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2808ce and fs2 == 1 and fe2 == 0x7a and fm2 == 0x1b03ba and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x4b7f8f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2808ce; op2val:0xbd1b03ba;
op3val:0x7ccb7f8f; valaddr_reg:x3; val_offset:2910*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2910*FLEN/8, x4, x1, x2)

inst_971:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2808ce and fs2 == 1 and fe2 == 0x7a and fm2 == 0x1b03ba and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x4b7f8f and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2808ce; op2val:0xbd1b03ba;
op3val:0x7ccb7f8f; valaddr_reg:x3; val_offset:2913*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2913*FLEN/8, x4, x1, x2)

inst_972:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2808ce and fs2 == 1 and fe2 == 0x7a and fm2 == 0x1b03ba and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x4b7f8f and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2808ce; op2val:0xbd1b03ba;
op3val:0x7ccb7f8f; valaddr_reg:x3; val_offset:2916*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2916*FLEN/8, x4, x1, x2)

inst_973:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2808ce and fs2 == 1 and fe2 == 0x7a and fm2 == 0x1b03ba and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x4b7f8f and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2808ce; op2val:0xbd1b03ba;
op3val:0x7ccb7f8f; valaddr_reg:x3; val_offset:2919*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2919*FLEN/8, x4, x1, x2)

inst_974:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2808ce and fs2 == 1 and fe2 == 0x7a and fm2 == 0x1b03ba and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x4b7f8f and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2808ce; op2val:0xbd1b03ba;
op3val:0x7ccb7f8f; valaddr_reg:x3; val_offset:2922*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2922*FLEN/8, x4, x1, x2)

inst_975:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2924ed and fs2 == 1 and fe2 == 0x7d and fm2 == 0x260466 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x5b61b5 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2924ed; op2val:0xbea60466;
op3val:0x7e5b61b5; valaddr_reg:x3; val_offset:2925*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2925*FLEN/8, x4, x1, x2)

inst_976:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2924ed and fs2 == 1 and fe2 == 0x7d and fm2 == 0x260466 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x5b61b5 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2924ed; op2val:0xbea60466;
op3val:0x7e5b61b5; valaddr_reg:x3; val_offset:2928*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2928*FLEN/8, x4, x1, x2)

inst_977:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2924ed and fs2 == 1 and fe2 == 0x7d and fm2 == 0x260466 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x5b61b5 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2924ed; op2val:0xbea60466;
op3val:0x7e5b61b5; valaddr_reg:x3; val_offset:2931*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2931*FLEN/8, x4, x1, x2)

inst_978:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2924ed and fs2 == 1 and fe2 == 0x7d and fm2 == 0x260466 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x5b61b5 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2924ed; op2val:0xbea60466;
op3val:0x7e5b61b5; valaddr_reg:x3; val_offset:2934*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2934*FLEN/8, x4, x1, x2)

inst_979:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2924ed and fs2 == 1 and fe2 == 0x7d and fm2 == 0x260466 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x5b61b5 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2924ed; op2val:0xbea60466;
op3val:0x7e5b61b5; valaddr_reg:x3; val_offset:2937*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2937*FLEN/8, x4, x1, x2)

inst_980:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29472d and fs2 == 1 and fe2 == 0x7c and fm2 == 0x65286c and fs3 == 0 and fe3 == 0xfc and fm3 == 0x178766 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29472d; op2val:0xbe65286c;
op3val:0x7e178766; valaddr_reg:x3; val_offset:2940*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2940*FLEN/8, x4, x1, x2)

inst_981:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29472d and fs2 == 1 and fe2 == 0x7c and fm2 == 0x65286c and fs3 == 0 and fe3 == 0xfc and fm3 == 0x178766 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29472d; op2val:0xbe65286c;
op3val:0x7e178766; valaddr_reg:x3; val_offset:2943*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2943*FLEN/8, x4, x1, x2)

inst_982:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29472d and fs2 == 1 and fe2 == 0x7c and fm2 == 0x65286c and fs3 == 0 and fe3 == 0xfc and fm3 == 0x178766 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29472d; op2val:0xbe65286c;
op3val:0x7e178766; valaddr_reg:x3; val_offset:2946*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2946*FLEN/8, x4, x1, x2)

inst_983:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29472d and fs2 == 1 and fe2 == 0x7c and fm2 == 0x65286c and fs3 == 0 and fe3 == 0xfc and fm3 == 0x178766 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29472d; op2val:0xbe65286c;
op3val:0x7e178766; valaddr_reg:x3; val_offset:2949*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2949*FLEN/8, x4, x1, x2)

inst_984:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29472d and fs2 == 1 and fe2 == 0x7c and fm2 == 0x65286c and fs3 == 0 and fe3 == 0xfc and fm3 == 0x178766 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29472d; op2val:0xbe65286c;
op3val:0x7e178766; valaddr_reg:x3; val_offset:2952*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2952*FLEN/8, x4, x1, x2)

inst_985:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2a6406 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x28ea23 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x60daf6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2a6406; op2val:0xbf28ea23;
op3val:0x7ee0daf6; valaddr_reg:x3; val_offset:2955*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2955*FLEN/8, x4, x1, x2)

inst_986:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2a6406 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x28ea23 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x60daf6 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2a6406; op2val:0xbf28ea23;
op3val:0x7ee0daf6; valaddr_reg:x3; val_offset:2958*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2958*FLEN/8, x4, x1, x2)

inst_987:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2a6406 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x28ea23 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x60daf6 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2a6406; op2val:0xbf28ea23;
op3val:0x7ee0daf6; valaddr_reg:x3; val_offset:2961*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2961*FLEN/8, x4, x1, x2)

inst_988:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2a6406 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x28ea23 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x60daf6 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2a6406; op2val:0xbf28ea23;
op3val:0x7ee0daf6; valaddr_reg:x3; val_offset:2964*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2964*FLEN/8, x4, x1, x2)

inst_989:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2a6406 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x28ea23 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x60daf6 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2a6406; op2val:0xbf28ea23;
op3val:0x7ee0daf6; valaddr_reg:x3; val_offset:2967*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2967*FLEN/8, x4, x1, x2)

inst_990:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2afdd1 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x3404d4 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x707b62 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2afdd1; op2val:0xbeb404d4;
op3val:0x7e707b62; valaddr_reg:x3; val_offset:2970*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2970*FLEN/8, x4, x1, x2)

inst_991:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2afdd1 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x3404d4 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x707b62 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2afdd1; op2val:0xbeb404d4;
op3val:0x7e707b62; valaddr_reg:x3; val_offset:2973*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2973*FLEN/8, x4, x1, x2)

inst_992:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2afdd1 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x3404d4 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x707b62 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2afdd1; op2val:0xbeb404d4;
op3val:0x7e707b62; valaddr_reg:x3; val_offset:2976*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2976*FLEN/8, x4, x1, x2)

inst_993:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2afdd1 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x3404d4 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x707b62 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2afdd1; op2val:0xbeb404d4;
op3val:0x7e707b62; valaddr_reg:x3; val_offset:2979*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2979*FLEN/8, x4, x1, x2)

inst_994:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2afdd1 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x3404d4 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x707b62 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2afdd1; op2val:0xbeb404d4;
op3val:0x7e707b62; valaddr_reg:x3; val_offset:2982*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2982*FLEN/8, x4, x1, x2)

inst_995:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b296b and fs2 == 1 and fe2 == 0x7c and fm2 == 0x494e1c and fs3 == 0 and fe3 == 0xfc and fm3 == 0x0697be and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b296b; op2val:0xbe494e1c;
op3val:0x7e0697be; valaddr_reg:x3; val_offset:2985*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2985*FLEN/8, x4, x1, x2)

inst_996:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b296b and fs2 == 1 and fe2 == 0x7c and fm2 == 0x494e1c and fs3 == 0 and fe3 == 0xfc and fm3 == 0x0697be and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b296b; op2val:0xbe494e1c;
op3val:0x7e0697be; valaddr_reg:x3; val_offset:2988*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 2988*FLEN/8, x4, x1, x2)

inst_997:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b296b and fs2 == 1 and fe2 == 0x7c and fm2 == 0x494e1c and fs3 == 0 and fe3 == 0xfc and fm3 == 0x0697be and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b296b; op2val:0xbe494e1c;
op3val:0x7e0697be; valaddr_reg:x3; val_offset:2991*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 2991*FLEN/8, x4, x1, x2)

inst_998:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b296b and fs2 == 1 and fe2 == 0x7c and fm2 == 0x494e1c and fs3 == 0 and fe3 == 0xfc and fm3 == 0x0697be and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b296b; op2val:0xbe494e1c;
op3val:0x7e0697be; valaddr_reg:x3; val_offset:2994*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 2994*FLEN/8, x4, x1, x2)

inst_999:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b296b and fs2 == 1 and fe2 == 0x7c and fm2 == 0x494e1c and fs3 == 0 and fe3 == 0xfc and fm3 == 0x0697be and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b296b; op2val:0xbe494e1c;
op3val:0x7e0697be; valaddr_reg:x3; val_offset:2997*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 2997*FLEN/8, x4, x1, x2)

inst_1000:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2373 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x03bb5d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x312842 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c2373; op2val:0xbf83bb5d;
op3val:0x7f312842; valaddr_reg:x3; val_offset:3000*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3000*FLEN/8, x4, x1, x2)

inst_1001:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2373 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x03bb5d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x312842 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c2373; op2val:0xbf83bb5d;
op3val:0x7f312842; valaddr_reg:x3; val_offset:3003*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 3003*FLEN/8, x4, x1, x2)

inst_1002:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2373 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x03bb5d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x312842 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c2373; op2val:0xbf83bb5d;
op3val:0x7f312842; valaddr_reg:x3; val_offset:3006*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 3006*FLEN/8, x4, x1, x2)

inst_1003:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2373 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x03bb5d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x312842 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c2373; op2val:0xbf83bb5d;
op3val:0x7f312842; valaddr_reg:x3; val_offset:3009*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 3009*FLEN/8, x4, x1, x2)

inst_1004:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2373 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x03bb5d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x312842 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c2373; op2val:0xbf83bb5d;
op3val:0x7f312842; valaddr_reg:x3; val_offset:3012*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 3012*FLEN/8, x4, x1, x2)

inst_1005:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d1061 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x25299a and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5f4f5d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d1061; op2val:0xbf25299a;
op3val:0x7edf4f5d; valaddr_reg:x3; val_offset:3015*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3015*FLEN/8, x4, x1, x2)

inst_1006:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d1061 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x25299a and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5f4f5d and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d1061; op2val:0xbf25299a;
op3val:0x7edf4f5d; valaddr_reg:x3; val_offset:3018*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 3018*FLEN/8, x4, x1, x2)

inst_1007:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d1061 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x25299a and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5f4f5d and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d1061; op2val:0xbf25299a;
op3val:0x7edf4f5d; valaddr_reg:x3; val_offset:3021*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 3021*FLEN/8, x4, x1, x2)

inst_1008:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d1061 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x25299a and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5f4f5d and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d1061; op2val:0xbf25299a;
op3val:0x7edf4f5d; valaddr_reg:x3; val_offset:3024*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 3024*FLEN/8, x4, x1, x2)

inst_1009:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d1061 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x25299a and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5f4f5d and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d1061; op2val:0xbf25299a;
op3val:0x7edf4f5d; valaddr_reg:x3; val_offset:3027*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 3027*FLEN/8, x4, x1, x2)

inst_1010:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2dd7a3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x02cfaf and fs3 == 0 and fe3 == 0xfe and fm3 == 0x31a913 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2dd7a3; op2val:0xbf82cfaf;
op3val:0x7f31a913; valaddr_reg:x3; val_offset:3030*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3030*FLEN/8, x4, x1, x2)

inst_1011:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2dd7a3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x02cfaf and fs3 == 0 and fe3 == 0xfe and fm3 == 0x31a913 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2dd7a3; op2val:0xbf82cfaf;
op3val:0x7f31a913; valaddr_reg:x3; val_offset:3033*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 3033*FLEN/8, x4, x1, x2)

inst_1012:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2dd7a3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x02cfaf and fs3 == 0 and fe3 == 0xfe and fm3 == 0x31a913 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2dd7a3; op2val:0xbf82cfaf;
op3val:0x7f31a913; valaddr_reg:x3; val_offset:3036*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 3036*FLEN/8, x4, x1, x2)

inst_1013:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2dd7a3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x02cfaf and fs3 == 0 and fe3 == 0xfe and fm3 == 0x31a913 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2dd7a3; op2val:0xbf82cfaf;
op3val:0x7f31a913; valaddr_reg:x3; val_offset:3039*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 3039*FLEN/8, x4, x1, x2)

inst_1014:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2dd7a3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x02cfaf and fs3 == 0 and fe3 == 0xfe and fm3 == 0x31a913 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2dd7a3; op2val:0xbf82cfaf;
op3val:0x7f31a913; valaddr_reg:x3; val_offset:3042*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 3042*FLEN/8, x4, x1, x2)

inst_1015:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2de7b9 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x704eea and fs3 == 0 and fe3 == 0xfd and fm3 == 0x233ed9 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2de7b9; op2val:0xbef04eea;
op3val:0x7ea33ed9; valaddr_reg:x3; val_offset:3045*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3045*FLEN/8, x4, x1, x2)

inst_1016:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2de7b9 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x704eea and fs3 == 0 and fe3 == 0xfd and fm3 == 0x233ed9 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2de7b9; op2val:0xbef04eea;
op3val:0x7ea33ed9; valaddr_reg:x3; val_offset:3048*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 3048*FLEN/8, x4, x1, x2)

inst_1017:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2de7b9 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x704eea and fs3 == 0 and fe3 == 0xfd and fm3 == 0x233ed9 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2de7b9; op2val:0xbef04eea;
op3val:0x7ea33ed9; valaddr_reg:x3; val_offset:3051*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 3051*FLEN/8, x4, x1, x2)

inst_1018:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2de7b9 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x704eea and fs3 == 0 and fe3 == 0xfd and fm3 == 0x233ed9 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2de7b9; op2val:0xbef04eea;
op3val:0x7ea33ed9; valaddr_reg:x3; val_offset:3054*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 3054*FLEN/8, x4, x1, x2)

inst_1019:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2de7b9 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x704eea and fs3 == 0 and fe3 == 0xfd and fm3 == 0x233ed9 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2de7b9; op2val:0xbef04eea;
op3val:0x7ea33ed9; valaddr_reg:x3; val_offset:3057*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 3057*FLEN/8, x4, x1, x2)

inst_1020:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7fda and fs2 == 1 and fe2 == 0x7e and fm2 == 0x515d9b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0eb630 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7fda; op2val:0xbf515d9b;
op3val:0x7f0eb630; valaddr_reg:x3; val_offset:3060*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3060*FLEN/8, x4, x1, x2)

inst_1021:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7fda and fs2 == 1 and fe2 == 0x7e and fm2 == 0x515d9b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0eb630 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7fda; op2val:0xbf515d9b;
op3val:0x7f0eb630; valaddr_reg:x3; val_offset:3063*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 3063*FLEN/8, x4, x1, x2)

inst_1022:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7fda and fs2 == 1 and fe2 == 0x7e and fm2 == 0x515d9b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0eb630 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7fda; op2val:0xbf515d9b;
op3val:0x7f0eb630; valaddr_reg:x3; val_offset:3066*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 3066*FLEN/8, x4, x1, x2)

inst_1023:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7fda and fs2 == 1 and fe2 == 0x7e and fm2 == 0x515d9b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0eb630 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7fda; op2val:0xbf515d9b;
op3val:0x7f0eb630; valaddr_reg:x3; val_offset:3069*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 3069*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_9)

inst_1024:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7fda and fs2 == 1 and fe2 == 0x7e and fm2 == 0x515d9b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0eb630 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7fda; op2val:0xbf515d9b;
op3val:0x7f0eb630; valaddr_reg:x3; val_offset:3072*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 3072*FLEN/8, x4, x1, x2)

inst_1025:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3099a4 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6f195a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x24f0ee and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3099a4; op2val:0xbf6f195a;
op3val:0x7f24f0ee; valaddr_reg:x3; val_offset:3075*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3075*FLEN/8, x4, x1, x2)

inst_1026:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3099a4 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6f195a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x24f0ee and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3099a4; op2val:0xbf6f195a;
op3val:0x7f24f0ee; valaddr_reg:x3; val_offset:3078*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 3078*FLEN/8, x4, x1, x2)

inst_1027:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3099a4 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6f195a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x24f0ee and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3099a4; op2val:0xbf6f195a;
op3val:0x7f24f0ee; valaddr_reg:x3; val_offset:3081*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 3081*FLEN/8, x4, x1, x2)

inst_1028:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3099a4 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6f195a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x24f0ee and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3099a4; op2val:0xbf6f195a;
op3val:0x7f24f0ee; valaddr_reg:x3; val_offset:3084*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 3084*FLEN/8, x4, x1, x2)

inst_1029:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3099a4 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6f195a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x24f0ee and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3099a4; op2val:0xbf6f195a;
op3val:0x7f24f0ee; valaddr_reg:x3; val_offset:3087*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 3087*FLEN/8, x4, x1, x2)

inst_1030:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ba02 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x5aacdd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x16f5bb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ba02; op2val:0xbf5aacdd;
op3val:0x7f16f5bb; valaddr_reg:x3; val_offset:3090*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3090*FLEN/8, x4, x1, x2)

inst_1031:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ba02 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x5aacdd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x16f5bb and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ba02; op2val:0xbf5aacdd;
op3val:0x7f16f5bb; valaddr_reg:x3; val_offset:3093*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 3093*FLEN/8, x4, x1, x2)

inst_1032:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ba02 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x5aacdd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x16f5bb and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ba02; op2val:0xbf5aacdd;
op3val:0x7f16f5bb; valaddr_reg:x3; val_offset:3096*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 3096*FLEN/8, x4, x1, x2)

inst_1033:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ba02 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x5aacdd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x16f5bb and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ba02; op2val:0xbf5aacdd;
op3val:0x7f16f5bb; valaddr_reg:x3; val_offset:3099*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 3099*FLEN/8, x4, x1, x2)

inst_1034:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ba02 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x5aacdd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x16f5bb and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ba02; op2val:0xbf5aacdd;
op3val:0x7f16f5bb; valaddr_reg:x3; val_offset:3102*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 3102*FLEN/8, x4, x1, x2)

inst_1035:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x321868 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0778f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3c7e09 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f321868; op2val:0xbf8778f4;
op3val:0x7f3c7e09; valaddr_reg:x3; val_offset:3105*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3105*FLEN/8, x4, x1, x2)

inst_1036:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x321868 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0778f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3c7e09 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f321868; op2val:0xbf8778f4;
op3val:0x7f3c7e09; valaddr_reg:x3; val_offset:3108*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 3108*FLEN/8, x4, x1, x2)

inst_1037:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x321868 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0778f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3c7e09 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f321868; op2val:0xbf8778f4;
op3val:0x7f3c7e09; valaddr_reg:x3; val_offset:3111*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 3111*FLEN/8, x4, x1, x2)

inst_1038:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x321868 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0778f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3c7e09 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f321868; op2val:0xbf8778f4;
op3val:0x7f3c7e09; valaddr_reg:x3; val_offset:3114*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 3114*FLEN/8, x4, x1, x2)

inst_1039:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x321868 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0778f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3c7e09 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f321868; op2val:0xbf8778f4;
op3val:0x7f3c7e09; valaddr_reg:x3; val_offset:3117*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 3117*FLEN/8, x4, x1, x2)

inst_1040:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33b8ad and fs2 == 1 and fe2 == 0x7e and fm2 == 0x471c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0bc845 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33b8ad; op2val:0xbf471c14;
op3val:0x7f0bc845; valaddr_reg:x3; val_offset:3120*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3120*FLEN/8, x4, x1, x2)

inst_1041:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33b8ad and fs2 == 1 and fe2 == 0x7e and fm2 == 0x471c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0bc845 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33b8ad; op2val:0xbf471c14;
op3val:0x7f0bc845; valaddr_reg:x3; val_offset:3123*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 3123*FLEN/8, x4, x1, x2)

inst_1042:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33b8ad and fs2 == 1 and fe2 == 0x7e and fm2 == 0x471c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0bc845 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33b8ad; op2val:0xbf471c14;
op3val:0x7f0bc845; valaddr_reg:x3; val_offset:3126*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 3126*FLEN/8, x4, x1, x2)

inst_1043:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33b8ad and fs2 == 1 and fe2 == 0x7e and fm2 == 0x471c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0bc845 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33b8ad; op2val:0xbf471c14;
op3val:0x7f0bc845; valaddr_reg:x3; val_offset:3129*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 3129*FLEN/8, x4, x1, x2)

inst_1044:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33b8ad and fs2 == 1 and fe2 == 0x7e and fm2 == 0x471c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0bc845 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33b8ad; op2val:0xbf471c14;
op3val:0x7f0bc845; valaddr_reg:x3; val_offset:3132*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 3132*FLEN/8, x4, x1, x2)

inst_1045:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cf6c and fs2 == 1 and fe2 == 0x7e and fm2 == 0x1e17e3 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5e1598 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cf6c; op2val:0xbf1e17e3;
op3val:0x7ede1598; valaddr_reg:x3; val_offset:3135*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3135*FLEN/8, x4, x1, x2)

inst_1046:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cf6c and fs2 == 1 and fe2 == 0x7e and fm2 == 0x1e17e3 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5e1598 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cf6c; op2val:0xbf1e17e3;
op3val:0x7ede1598; valaddr_reg:x3; val_offset:3138*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 3138*FLEN/8, x4, x1, x2)

inst_1047:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cf6c and fs2 == 1 and fe2 == 0x7e and fm2 == 0x1e17e3 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5e1598 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cf6c; op2val:0xbf1e17e3;
op3val:0x7ede1598; valaddr_reg:x3; val_offset:3141*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 3141*FLEN/8, x4, x1, x2)

inst_1048:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cf6c and fs2 == 1 and fe2 == 0x7e and fm2 == 0x1e17e3 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5e1598 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cf6c; op2val:0xbf1e17e3;
op3val:0x7ede1598; valaddr_reg:x3; val_offset:3144*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 3144*FLEN/8, x4, x1, x2)

inst_1049:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cf6c and fs2 == 1 and fe2 == 0x7e and fm2 == 0x1e17e3 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5e1598 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cf6c; op2val:0xbf1e17e3;
op3val:0x7ede1598; valaddr_reg:x3; val_offset:3147*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 3147*FLEN/8, x4, x1, x2)

inst_1050:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33dfb8 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x1e050d and fs3 == 0 and fe3 == 0xfc and fm3 == 0x5e0f41 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33dfb8; op2val:0xbe9e050d;
op3val:0x7e5e0f41; valaddr_reg:x3; val_offset:3150*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3150*FLEN/8, x4, x1, x2)

inst_1051:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33dfb8 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x1e050d and fs3 == 0 and fe3 == 0xfc and fm3 == 0x5e0f41 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33dfb8; op2val:0xbe9e050d;
op3val:0x7e5e0f41; valaddr_reg:x3; val_offset:3153*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 3153*FLEN/8, x4, x1, x2)

inst_1052:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33dfb8 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x1e050d and fs3 == 0 and fe3 == 0xfc and fm3 == 0x5e0f41 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33dfb8; op2val:0xbe9e050d;
op3val:0x7e5e0f41; valaddr_reg:x3; val_offset:3156*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 3156*FLEN/8, x4, x1, x2)

inst_1053:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33dfb8 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x1e050d and fs3 == 0 and fe3 == 0xfc and fm3 == 0x5e0f41 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33dfb8; op2val:0xbe9e050d;
op3val:0x7e5e0f41; valaddr_reg:x3; val_offset:3159*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 3159*FLEN/8, x4, x1, x2)

inst_1054:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33dfb8 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x1e050d and fs3 == 0 and fe3 == 0xfc and fm3 == 0x5e0f41 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33dfb8; op2val:0xbe9e050d;
op3val:0x7e5e0f41; valaddr_reg:x3; val_offset:3162*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 3162*FLEN/8, x4, x1, x2)

inst_1055:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35a451 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x043b82 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3ba5e6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35a451; op2val:0xbf043b82;
op3val:0x7ebba5e6; valaddr_reg:x3; val_offset:3165*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3165*FLEN/8, x4, x1, x2)

inst_1056:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35a451 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x043b82 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3ba5e6 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35a451; op2val:0xbf043b82;
op3val:0x7ebba5e6; valaddr_reg:x3; val_offset:3168*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 3168*FLEN/8, x4, x1, x2)

inst_1057:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35a451 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x043b82 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3ba5e6 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35a451; op2val:0xbf043b82;
op3val:0x7ebba5e6; valaddr_reg:x3; val_offset:3171*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 3171*FLEN/8, x4, x1, x2)

inst_1058:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35a451 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x043b82 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3ba5e6 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35a451; op2val:0xbf043b82;
op3val:0x7ebba5e6; valaddr_reg:x3; val_offset:3174*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 3174*FLEN/8, x4, x1, x2)

inst_1059:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35a451 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x043b82 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3ba5e6 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35a451; op2val:0xbf043b82;
op3val:0x7ebba5e6; valaddr_reg:x3; val_offset:3177*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 3177*FLEN/8, x4, x1, x2)

inst_1060:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c708 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2fcfdc and fs3 == 0 and fe3 == 0xfd and fm3 == 0x79ad4e and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c708; op2val:0xbf2fcfdc;
op3val:0x7ef9ad4e; valaddr_reg:x3; val_offset:3180*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3180*FLEN/8, x4, x1, x2)

inst_1061:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c708 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2fcfdc and fs3 == 0 and fe3 == 0xfd and fm3 == 0x79ad4e and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c708; op2val:0xbf2fcfdc;
op3val:0x7ef9ad4e; valaddr_reg:x3; val_offset:3183*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 3183*FLEN/8, x4, x1, x2)

inst_1062:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c708 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2fcfdc and fs3 == 0 and fe3 == 0xfd and fm3 == 0x79ad4e and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c708; op2val:0xbf2fcfdc;
op3val:0x7ef9ad4e; valaddr_reg:x3; val_offset:3186*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 3186*FLEN/8, x4, x1, x2)

inst_1063:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c708 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2fcfdc and fs3 == 0 and fe3 == 0xfd and fm3 == 0x79ad4e and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c708; op2val:0xbf2fcfdc;
op3val:0x7ef9ad4e; valaddr_reg:x3; val_offset:3189*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 3189*FLEN/8, x4, x1, x2)

inst_1064:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c708 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2fcfdc and fs3 == 0 and fe3 == 0xfd and fm3 == 0x79ad4e and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c708; op2val:0xbf2fcfdc;
op3val:0x7ef9ad4e; valaddr_reg:x3; val_offset:3192*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 3192*FLEN/8, x4, x1, x2)

inst_1065:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3945d0 and fs2 == 1 and fe2 == 0x76 and fm2 == 0x47af30 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x10840f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3945d0; op2val:0xbb47af30;
op3val:0x7b10840f; valaddr_reg:x3; val_offset:3195*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3195*FLEN/8, x4, x1, x2)

inst_1066:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3945d0 and fs2 == 1 and fe2 == 0x76 and fm2 == 0x47af30 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x10840f and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3945d0; op2val:0xbb47af30;
op3val:0x7b10840f; valaddr_reg:x3; val_offset:3198*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 3198*FLEN/8, x4, x1, x2)

inst_1067:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3945d0 and fs2 == 1 and fe2 == 0x76 and fm2 == 0x47af30 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x10840f and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3945d0; op2val:0xbb47af30;
op3val:0x7b10840f; valaddr_reg:x3; val_offset:3201*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 3201*FLEN/8, x4, x1, x2)

inst_1068:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3945d0 and fs2 == 1 and fe2 == 0x76 and fm2 == 0x47af30 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x10840f and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3945d0; op2val:0xbb47af30;
op3val:0x7b10840f; valaddr_reg:x3; val_offset:3204*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 3204*FLEN/8, x4, x1, x2)

inst_1069:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3945d0 and fs2 == 1 and fe2 == 0x76 and fm2 == 0x47af30 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x10840f and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3945d0; op2val:0xbb47af30;
op3val:0x7b10840f; valaddr_reg:x3; val_offset:3207*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 3207*FLEN/8, x4, x1, x2)

inst_1070:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x394df5 and fs2 == 1 and fe2 == 0x7b and fm2 == 0x6542ef and fs3 == 0 and fe3 == 0xfb and fm3 == 0x25f32f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f394df5; op2val:0xbde542ef;
op3val:0x7da5f32f; valaddr_reg:x3; val_offset:3210*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3210*FLEN/8, x4, x1, x2)

inst_1071:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x394df5 and fs2 == 1 and fe2 == 0x7b and fm2 == 0x6542ef and fs3 == 0 and fe3 == 0xfb and fm3 == 0x25f32f and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f394df5; op2val:0xbde542ef;
op3val:0x7da5f32f; valaddr_reg:x3; val_offset:3213*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 3213*FLEN/8, x4, x1, x2)

inst_1072:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x394df5 and fs2 == 1 and fe2 == 0x7b and fm2 == 0x6542ef and fs3 == 0 and fe3 == 0xfb and fm3 == 0x25f32f and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f394df5; op2val:0xbde542ef;
op3val:0x7da5f32f; valaddr_reg:x3; val_offset:3216*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 3216*FLEN/8, x4, x1, x2)

inst_1073:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x394df5 and fs2 == 1 and fe2 == 0x7b and fm2 == 0x6542ef and fs3 == 0 and fe3 == 0xfb and fm3 == 0x25f32f and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f394df5; op2val:0xbde542ef;
op3val:0x7da5f32f; valaddr_reg:x3; val_offset:3219*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 3219*FLEN/8, x4, x1, x2)

inst_1074:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x394df5 and fs2 == 1 and fe2 == 0x7b and fm2 == 0x6542ef and fs3 == 0 and fe3 == 0xfb and fm3 == 0x25f32f and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f394df5; op2val:0xbde542ef;
op3val:0x7da5f32f; valaddr_reg:x3; val_offset:3222*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 3222*FLEN/8, x4, x1, x2)

inst_1075:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x394fae and fs2 == 1 and fe2 == 0x7e and fm2 == 0x496ae5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x11ccf0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f394fae; op2val:0xbf496ae5;
op3val:0x7f11ccf0; valaddr_reg:x3; val_offset:3225*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3225*FLEN/8, x4, x1, x2)

inst_1076:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x394fae and fs2 == 1 and fe2 == 0x7e and fm2 == 0x496ae5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x11ccf0 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f394fae; op2val:0xbf496ae5;
op3val:0x7f11ccf0; valaddr_reg:x3; val_offset:3228*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 3228*FLEN/8, x4, x1, x2)

inst_1077:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x394fae and fs2 == 1 and fe2 == 0x7e and fm2 == 0x496ae5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x11ccf0 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f394fae; op2val:0xbf496ae5;
op3val:0x7f11ccf0; valaddr_reg:x3; val_offset:3231*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 3231*FLEN/8, x4, x1, x2)

inst_1078:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x394fae and fs2 == 1 and fe2 == 0x7e and fm2 == 0x496ae5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x11ccf0 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f394fae; op2val:0xbf496ae5;
op3val:0x7f11ccf0; valaddr_reg:x3; val_offset:3234*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 3234*FLEN/8, x4, x1, x2)

inst_1079:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x394fae and fs2 == 1 and fe2 == 0x7e and fm2 == 0x496ae5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x11ccf0 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f394fae; op2val:0xbf496ae5;
op3val:0x7f11ccf0; valaddr_reg:x3; val_offset:3237*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 3237*FLEN/8, x4, x1, x2)

inst_1080:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395d94 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x518582 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x17b612 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395d94; op2val:0xbf518582;
op3val:0x7f17b612; valaddr_reg:x3; val_offset:3240*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3240*FLEN/8, x4, x1, x2)

inst_1081:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395d94 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x518582 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x17b612 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395d94; op2val:0xbf518582;
op3val:0x7f17b612; valaddr_reg:x3; val_offset:3243*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 3243*FLEN/8, x4, x1, x2)

inst_1082:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395d94 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x518582 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x17b612 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395d94; op2val:0xbf518582;
op3val:0x7f17b612; valaddr_reg:x3; val_offset:3246*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 3246*FLEN/8, x4, x1, x2)

inst_1083:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395d94 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x518582 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x17b612 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395d94; op2val:0xbf518582;
op3val:0x7f17b612; valaddr_reg:x3; val_offset:3249*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 3249*FLEN/8, x4, x1, x2)

inst_1084:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395d94 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x518582 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x17b612 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395d94; op2val:0xbf518582;
op3val:0x7f17b612; valaddr_reg:x3; val_offset:3252*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 3252*FLEN/8, x4, x1, x2)

inst_1085:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a8a7e and fs2 == 1 and fe2 == 0x7e and fm2 == 0x0c9d85 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4ced0a and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a8a7e; op2val:0xbf0c9d85;
op3val:0x7ecced0a; valaddr_reg:x3; val_offset:3255*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3255*FLEN/8, x4, x1, x2)

inst_1086:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a8a7e and fs2 == 1 and fe2 == 0x7e and fm2 == 0x0c9d85 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4ced0a and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a8a7e; op2val:0xbf0c9d85;
op3val:0x7ecced0a; valaddr_reg:x3; val_offset:3258*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 3258*FLEN/8, x4, x1, x2)

inst_1087:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a8a7e and fs2 == 1 and fe2 == 0x7e and fm2 == 0x0c9d85 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4ced0a and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a8a7e; op2val:0xbf0c9d85;
op3val:0x7ecced0a; valaddr_reg:x3; val_offset:3261*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 3261*FLEN/8, x4, x1, x2)

inst_1088:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a8a7e and fs2 == 1 and fe2 == 0x7e and fm2 == 0x0c9d85 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4ced0a and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a8a7e; op2val:0xbf0c9d85;
op3val:0x7ecced0a; valaddr_reg:x3; val_offset:3264*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 3264*FLEN/8, x4, x1, x2)

inst_1089:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a8a7e and fs2 == 1 and fe2 == 0x7e and fm2 == 0x0c9d85 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4ced0a and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a8a7e; op2val:0xbf0c9d85;
op3val:0x7ecced0a; valaddr_reg:x3; val_offset:3267*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 3267*FLEN/8, x4, x1, x2)

inst_1090:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c2c79 and fs2 == 1 and fe2 == 0x7b and fm2 == 0x0397ce and fs3 == 0 and fe3 == 0xfa and fm3 == 0x4174b0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c2c79; op2val:0xbd8397ce;
op3val:0x7d4174b0; valaddr_reg:x3; val_offset:3270*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3270*FLEN/8, x4, x1, x2)

inst_1091:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c2c79 and fs2 == 1 and fe2 == 0x7b and fm2 == 0x0397ce and fs3 == 0 and fe3 == 0xfa and fm3 == 0x4174b0 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c2c79; op2val:0xbd8397ce;
op3val:0x7d4174b0; valaddr_reg:x3; val_offset:3273*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 3273*FLEN/8, x4, x1, x2)

inst_1092:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c2c79 and fs2 == 1 and fe2 == 0x7b and fm2 == 0x0397ce and fs3 == 0 and fe3 == 0xfa and fm3 == 0x4174b0 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c2c79; op2val:0xbd8397ce;
op3val:0x7d4174b0; valaddr_reg:x3; val_offset:3276*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 3276*FLEN/8, x4, x1, x2)

inst_1093:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c2c79 and fs2 == 1 and fe2 == 0x7b and fm2 == 0x0397ce and fs3 == 0 and fe3 == 0xfa and fm3 == 0x4174b0 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c2c79; op2val:0xbd8397ce;
op3val:0x7d4174b0; valaddr_reg:x3; val_offset:3279*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 3279*FLEN/8, x4, x1, x2)

inst_1094:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c2c79 and fs2 == 1 and fe2 == 0x7b and fm2 == 0x0397ce and fs3 == 0 and fe3 == 0xfa and fm3 == 0x4174b0 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c2c79; op2val:0xbd8397ce;
op3val:0x7d4174b0; valaddr_reg:x3; val_offset:3282*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 3282*FLEN/8, x4, x1, x2)

inst_1095:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d4865 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x39ff7a and fs3 == 0 and fe3 == 0xfd and fm3 == 0x098636 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d4865; op2val:0xbeb9ff7a;
op3val:0x7e898636; valaddr_reg:x3; val_offset:3285*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3285*FLEN/8, x4, x1, x2)

inst_1096:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d4865 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x39ff7a and fs3 == 0 and fe3 == 0xfd and fm3 == 0x098636 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d4865; op2val:0xbeb9ff7a;
op3val:0x7e898636; valaddr_reg:x3; val_offset:3288*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 3288*FLEN/8, x4, x1, x2)

inst_1097:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d4865 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x39ff7a and fs3 == 0 and fe3 == 0xfd and fm3 == 0x098636 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d4865; op2val:0xbeb9ff7a;
op3val:0x7e898636; valaddr_reg:x3; val_offset:3291*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 3291*FLEN/8, x4, x1, x2)

inst_1098:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d4865 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x39ff7a and fs3 == 0 and fe3 == 0xfd and fm3 == 0x098636 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d4865; op2val:0xbeb9ff7a;
op3val:0x7e898636; valaddr_reg:x3; val_offset:3294*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 3294*FLEN/8, x4, x1, x2)

inst_1099:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d4865 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x39ff7a and fs3 == 0 and fe3 == 0xfd and fm3 == 0x098636 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d4865; op2val:0xbeb9ff7a;
op3val:0x7e898636; valaddr_reg:x3; val_offset:3297*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 3297*FLEN/8, x4, x1, x2)

inst_1100:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3e2b14 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x15e986 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5eb917 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3e2b14; op2val:0xbf15e986;
op3val:0x7edeb917; valaddr_reg:x3; val_offset:3300*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3300*FLEN/8, x4, x1, x2)

inst_1101:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3e2b14 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x15e986 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5eb917 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3e2b14; op2val:0xbf15e986;
op3val:0x7edeb917; valaddr_reg:x3; val_offset:3303*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 3303*FLEN/8, x4, x1, x2)

inst_1102:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3e2b14 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x15e986 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5eb917 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3e2b14; op2val:0xbf15e986;
op3val:0x7edeb917; valaddr_reg:x3; val_offset:3306*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 3306*FLEN/8, x4, x1, x2)

inst_1103:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3e2b14 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x15e986 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5eb917 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3e2b14; op2val:0xbf15e986;
op3val:0x7edeb917; valaddr_reg:x3; val_offset:3309*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 3309*FLEN/8, x4, x1, x2)

inst_1104:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3e2b14 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x15e986 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5eb917 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3e2b14; op2val:0xbf15e986;
op3val:0x7edeb917; valaddr_reg:x3; val_offset:3312*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 3312*FLEN/8, x4, x1, x2)

inst_1105:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f7e14 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6f07dc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x32cc96 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f7e14; op2val:0xbf6f07dc;
op3val:0x7f32cc96; valaddr_reg:x3; val_offset:3315*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3315*FLEN/8, x4, x1, x2)

inst_1106:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f7e14 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6f07dc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x32cc96 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f7e14; op2val:0xbf6f07dc;
op3val:0x7f32cc96; valaddr_reg:x3; val_offset:3318*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 3318*FLEN/8, x4, x1, x2)

inst_1107:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f7e14 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6f07dc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x32cc96 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f7e14; op2val:0xbf6f07dc;
op3val:0x7f32cc96; valaddr_reg:x3; val_offset:3321*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 3321*FLEN/8, x4, x1, x2)

inst_1108:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f7e14 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6f07dc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x32cc96 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f7e14; op2val:0xbf6f07dc;
op3val:0x7f32cc96; valaddr_reg:x3; val_offset:3324*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 3324*FLEN/8, x4, x1, x2)

inst_1109:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f7e14 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6f07dc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x32cc96 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f7e14; op2val:0xbf6f07dc;
op3val:0x7f32cc96; valaddr_reg:x3; val_offset:3327*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 3327*FLEN/8, x4, x1, x2)

inst_1110:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd2a7 and fs2 == 1 and fe2 == 0x7a and fm2 == 0x225cdc and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7351c5 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd2a7; op2val:0xbd225cdc;
op3val:0x7cf351c5; valaddr_reg:x3; val_offset:3330*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3330*FLEN/8, x4, x1, x2)

inst_1111:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd2a7 and fs2 == 1 and fe2 == 0x7a and fm2 == 0x225cdc and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7351c5 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd2a7; op2val:0xbd225cdc;
op3val:0x7cf351c5; valaddr_reg:x3; val_offset:3333*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 3333*FLEN/8, x4, x1, x2)

inst_1112:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd2a7 and fs2 == 1 and fe2 == 0x7a and fm2 == 0x225cdc and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7351c5 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd2a7; op2val:0xbd225cdc;
op3val:0x7cf351c5; valaddr_reg:x3; val_offset:3336*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 3336*FLEN/8, x4, x1, x2)

inst_1113:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd2a7 and fs2 == 1 and fe2 == 0x7a and fm2 == 0x225cdc and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7351c5 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd2a7; op2val:0xbd225cdc;
op3val:0x7cf351c5; valaddr_reg:x3; val_offset:3339*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 3339*FLEN/8, x4, x1, x2)

inst_1114:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd2a7 and fs2 == 1 and fe2 == 0x7a and fm2 == 0x225cdc and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7351c5 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd2a7; op2val:0xbd225cdc;
op3val:0x7cf351c5; valaddr_reg:x3; val_offset:3342*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 3342*FLEN/8, x4, x1, x2)

inst_1115:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd529 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x569c36 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x20d13f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd529; op2val:0xbe569c36;
op3val:0x7e20d13f; valaddr_reg:x3; val_offset:3345*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3345*FLEN/8, x4, x1, x2)

inst_1116:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd529 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x569c36 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x20d13f and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd529; op2val:0xbe569c36;
op3val:0x7e20d13f; valaddr_reg:x3; val_offset:3348*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 3348*FLEN/8, x4, x1, x2)

inst_1117:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd529 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x569c36 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x20d13f and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd529; op2val:0xbe569c36;
op3val:0x7e20d13f; valaddr_reg:x3; val_offset:3351*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 3351*FLEN/8, x4, x1, x2)

inst_1118:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd529 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x569c36 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x20d13f and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd529; op2val:0xbe569c36;
op3val:0x7e20d13f; valaddr_reg:x3; val_offset:3354*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 3354*FLEN/8, x4, x1, x2)

inst_1119:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd529 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x569c36 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x20d13f and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd529; op2val:0xbe569c36;
op3val:0x7e20d13f; valaddr_reg:x3; val_offset:3357*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 3357*FLEN/8, x4, x1, x2)

inst_1120:
// fs1 == 0 and fe1 == 0xf3 and fm1 == 0x3337a6 and fs2 == 1 and fe2 == 0x8a and fm2 == 0x067106 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3c3c81 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x79b337a6; op2val:0xc5067106;
op3val:0x7f3c3c81; valaddr_reg:x3; val_offset:3360*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3360*FLEN/8, x4, x1, x2)

inst_1121:
// fs1 == 0 and fe1 == 0xf3 and fm1 == 0x3337a6 and fs2 == 1 and fe2 == 0x8a and fm2 == 0x067106 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3c3c81 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x79b337a6; op2val:0xc5067106;
op3val:0x7f3c3c81; valaddr_reg:x3; val_offset:3363*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 3363*FLEN/8, x4, x1, x2)

inst_1122:
// fs1 == 0 and fe1 == 0xf3 and fm1 == 0x3337a6 and fs2 == 1 and fe2 == 0x8a and fm2 == 0x067106 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3c3c81 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x79b337a6; op2val:0xc5067106;
op3val:0x7f3c3c81; valaddr_reg:x3; val_offset:3366*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 3366*FLEN/8, x4, x1, x2)

inst_1123:
// fs1 == 0 and fe1 == 0xf3 and fm1 == 0x3337a6 and fs2 == 1 and fe2 == 0x8a and fm2 == 0x067106 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3c3c81 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x79b337a6; op2val:0xc5067106;
op3val:0x7f3c3c81; valaddr_reg:x3; val_offset:3369*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 3369*FLEN/8, x4, x1, x2)

inst_1124:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x244bd3 and fs2 == 1 and fe2 == 0x85 and fm2 == 0x37709b and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6b74f1 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ba44bd3; op2val:0xc2b7709b;
op3val:0x7eeb74f1; valaddr_reg:x3; val_offset:3372*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3372*FLEN/8, x4, x1, x2)

inst_1125:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x244bd3 and fs2 == 1 and fe2 == 0x85 and fm2 == 0x37709b and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6b74f1 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ba44bd3; op2val:0xc2b7709b;
op3val:0x7eeb74f1; valaddr_reg:x3; val_offset:3375*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 3375*FLEN/8, x4, x1, x2)

inst_1126:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x244bd3 and fs2 == 1 and fe2 == 0x85 and fm2 == 0x37709b and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6b74f1 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ba44bd3; op2val:0xc2b7709b;
op3val:0x7eeb74f1; valaddr_reg:x3; val_offset:3378*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 64, 0, x3, 3378*FLEN/8, x4, x1, x2)

inst_1127:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x244bd3 and fs2 == 1 and fe2 == 0x85 and fm2 == 0x37709b and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6b74f1 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ba44bd3; op2val:0xc2b7709b;
op3val:0x7eeb74f1; valaddr_reg:x3; val_offset:3381*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 96, 0, x3, 3381*FLEN/8, x4, x1, x2)

inst_1128:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x244bd3 and fs2 == 1 and fe2 == 0x85 and fm2 == 0x37709b and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6b74f1 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ba44bd3; op2val:0xc2b7709b;
op3val:0x7eeb74f1; valaddr_reg:x3; val_offset:3384*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 128, 0, x3, 3384*FLEN/8, x4, x1, x2)

inst_1129:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x07b7d1 and fs2 == 1 and fe2 == 0x85 and fm2 == 0x132367 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1c02a4 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c07b7d1; op2val:0xc2932367;
op3val:0x7f1c02a4; valaddr_reg:x3; val_offset:3387*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3387*FLEN/8, x4, x1, x2)

inst_1130:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x07b7d1 and fs2 == 1 and fe2 == 0x85 and fm2 == 0x132367 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1c02a4 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c07b7d1; op2val:0xc2932367;
op3val:0x7f1c02a4; valaddr_reg:x3; val_offset:3390*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 32, 0, x3, 3390*FLEN/8, x4, x1, x2)
#endif


RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(0x79b337a6041788326,32,FLEN)
NAN_BOXED(0xc5067106305533702,32,FLEN)
NAN_BOXED(0xc5067106305533702,32,FLEN)
NAN_BOXED(0x79b337a6041788326,32,FLEN)
NAN_BOXED(0xc5067106305533702,32,FLEN)
NAN_BOXED(0x79b337a6041788326,32,FLEN)
NAN_BOXED(0x79b337a6041788326,32,FLEN)
NAN_BOXED(0xc5067106305533702,32,FLEN)
NAN_BOXED(0x7f3c3c81134654081,32,FLEN)
NAN_BOXED(0x79b337a6041788326,32,FLEN)
NAN_BOXED(0xc5067106305533702,32,FLEN)
NAN_BOXED(0x7f3c3c81134654081,32,FLEN)
NAN_BOXED(0x79b337a6041788326,32,FLEN)
NAN_BOXED(0xc5067106305533702,32,FLEN)
NAN_BOXED(0x7f3c3c81134654081,32,FLEN)
NAN_BOXED(0x7ba44bd3074364883,32,FLEN)
NAN_BOXED(0xc2b7709b266801819,32,FLEN)
NAN_BOXED(0xc2b7709b266801819,32,FLEN)
NAN_BOXED(0x7ba44bd3074364883,32,FLEN)
NAN_BOXED(0x7ba44bd3074364883,32,FLEN)
NAN_BOXED(0x7ba44bd3074364883,32,FLEN)
NAN_BOXED(0x7ba44bd3074364883,32,FLEN)
NAN_BOXED(0x7ba44bd3074364883,32,FLEN)
NAN_BOXED(0x7eeb74f1129360113,32,FLEN)
NAN_BOXED(0x7ba44bd3074364883,32,FLEN)
NAN_BOXED(0x7ba44bd3074364883,32,FLEN)
NAN_BOXED(0x7ba44bd3074364883,32,FLEN)
NAN_BOXED(0x7ba44bd3074364883,32,FLEN)
NAN_BOXED(0x7ba44bd3074364883,32,FLEN)
NAN_BOXED(0x7eeb74f1129360113,32,FLEN)
NAN_BOXED(0x7c07b7d1080880593,32,FLEN)
NAN_BOXED(0xc2932367264422759,32,FLEN)
NAN_BOXED(0x7c07b7d1080880593,32,FLEN)
NAN_BOXED(0x7c07b7d1080880593,32,FLEN)
NAN_BOXED(0xc2932367264422759,32,FLEN)
NAN_BOXED(0x7f1c02a4132542116,32,FLEN)
NAN_BOXED(0x7c07b7d1080880593,32,FLEN)
NAN_BOXED(0xc2932367264422759,32,FLEN)
NAN_BOXED(0x7f1c02a4132542116,32,FLEN)
NAN_BOXED(0x7c07b7d1080880593,32,FLEN)
NAN_BOXED(0xc2932367264422759,32,FLEN)
NAN_BOXED(0x7f1c02a4132542116,32,FLEN)
NAN_BOXED(0x7c07b7d1080880593,32,FLEN)
NAN_BOXED(0xc2932367264422759,32,FLEN)
NAN_BOXED(0x7f1c02a4132542116,32,FLEN)
NAN_BOXED(0x7c126d0d081582349,32,FLEN)
NAN_BOXED(0xc1e66e32253104178,32,FLEN)
NAN_BOXED(0x7e83cd01122566913,32,FLEN)
NAN_BOXED(0x7c126d0d081582349,32,FLEN)
NAN_BOXED(0xc1e66e32253104178,32,FLEN)
NAN_BOXED(0x7e83cd01122566913,32,FLEN)
NAN_BOXED(0x7c126d0d081582349,32,FLEN)
NAN_BOXED(0xc1e66e32253104178,32,FLEN)
NAN_BOXED(0x7e83cd01122566913,32,FLEN)
NAN_BOXED(0x7c126d0d081582349,32,FLEN)
NAN_BOXED(0xc1e66e32253104178,32,FLEN)
NAN_BOXED(0x7e83cd01122566913,32,FLEN)
NAN_BOXED(0x7c126d0d081582349,32,FLEN)
NAN_BOXED(0xc1e66e32253104178,32,FLEN)
NAN_BOXED(0x7e83cd01122566913,32,FLEN)
NAN_BOXED(0x7c502f82085629826,32,FLEN)
NAN_BOXED(0xc1049553238303059,32,FLEN)
NAN_BOXED(0x7dd7a3de111284190,32,FLEN)
NAN_BOXED(0x7c502f82085629826,32,FLEN)
NAN_BOXED(0xc1049553238303059,32,FLEN)
NAN_BOXED(0x7dd7a3de111284190,32,FLEN)
NAN_BOXED(0x7c502f82085629826,32,FLEN)
NAN_BOXED(0xc1049553238303059,32,FLEN)
NAN_BOXED(0x7dd7a3de111284190,32,FLEN)
NAN_BOXED(0x7c502f82085629826,32,FLEN)
NAN_BOXED(0xc1049553238303059,32,FLEN)
NAN_BOXED(0x7dd7a3de111284190,32,FLEN)
NAN_BOXED(0x7c502f82085629826,32,FLEN)
NAN_BOXED(0xc1049553238303059,32,FLEN)
NAN_BOXED(0x7dd7a3de111284190,32,FLEN)
NAN_BOXED(0x7c75a735088085301,32,FLEN)
NAN_BOXED(0xc15581bc243606460,32,FLEN)
NAN_BOXED(0x7e4ce09d118967453,32,FLEN)
NAN_BOXED(0x7c75a735088085301,32,FLEN)
NAN_BOXED(0xc15581bc243606460,32,FLEN)
NAN_BOXED(0x7e4ce09d118967453,32,FLEN)
NAN_BOXED(0x7c75a735088085301,32,FLEN)
NAN_BOXED(0xc15581bc243606460,32,FLEN)
NAN_BOXED(0x7e4ce09d118967453,32,FLEN)
NAN_BOXED(0x7c75a735088085301,32,FLEN)
NAN_BOXED(0xc15581bc243606460,32,FLEN)
NAN_BOXED(0x7e4ce09d118967453,32,FLEN)
NAN_BOXED(0x7c75a735088085301,32,FLEN)
NAN_BOXED(0xc15581bc243606460,32,FLEN)
NAN_BOXED(0x7e4ce09d118967453,32,FLEN)
NAN_BOXED(0x7cc76175093441397,32,FLEN)
NAN_BOXED(0xc0e56195236258197,32,FLEN)
NAN_BOXED(0x7e32a62e117248558,32,FLEN)
NAN_BOXED(0x7cc76175093441397,32,FLEN)
NAN_BOXED(0xc0e56195236258197,32,FLEN)
NAN_BOXED(0x7e32a62e117248558,32,FLEN)
NAN_BOXED(0x7cc76175093441397,32,FLEN)
NAN_BOXED(0xc0e56195236258197,32,FLEN)
NAN_BOXED(0x7e32a62e117248558,32,FLEN)
NAN_BOXED(0x7cc76175093441397,32,FLEN)
NAN_BOXED(0xc0e56195236258197,32,FLEN)
NAN_BOXED(0x7e32a62e117248558,32,FLEN)
NAN_BOXED(0x7cc76175093441397,32,FLEN)
NAN_BOXED(0xc0e56195236258197,32,FLEN)
NAN_BOXED(0x7e32a62e117248558,32,FLEN)
NAN_BOXED(0x7d41cef4101464820,32,FLEN)
NAN_BOXED(0xc11d4815239921685,32,FLEN)
NAN_BOXED(0x7eee24fd129536253,32,FLEN)
NAN_BOXED(0x7d41cef4101464820,32,FLEN)
NAN_BOXED(0xc11d4815239921685,32,FLEN)
NAN_BOXED(0x7eee24fd129536253,32,FLEN)
NAN_BOXED(0x7d41cef4101464820,32,FLEN)
NAN_BOXED(0xc11d4815239921685,32,FLEN)
NAN_BOXED(0x7eee24fd129536253,32,FLEN)
NAN_BOXED(0x7d41cef4101464820,32,FLEN)
NAN_BOXED(0xc11d4815239921685,32,FLEN)
NAN_BOXED(0x7eee24fd129536253,32,FLEN)
NAN_BOXED(0x7d41cef4101464820,32,FLEN)
NAN_BOXED(0xc11d4815239921685,32,FLEN)
NAN_BOXED(0x7eee24fd129536253,32,FLEN)
NAN_BOXED(0x7d4566d8101700312,32,FLEN)
NAN_BOXED(0xc0f32561237160289,32,FLEN)
NAN_BOXED(0x7ebb7d72126216562,32,FLEN)
NAN_BOXED(0x7d4566d8101700312,32,FLEN)
NAN_BOXED(0xc0f32561237160289,32,FLEN)
NAN_BOXED(0x7ebb7d72126216562,32,FLEN)
NAN_BOXED(0x7d4566d8101700312,32,FLEN)
NAN_BOXED(0xc0f32561237160289,32,FLEN)
NAN_BOXED(0x7ebb7d72126216562,32,FLEN)
NAN_BOXED(0x7d4566d8101700312,32,FLEN)
NAN_BOXED(0xc0f32561237160289,32,FLEN)
NAN_BOXED(0x7ebb7d72126216562,32,FLEN)
NAN_BOXED(0x7d4566d8101700312,32,FLEN)
NAN_BOXED(0xc0f32561237160289,32,FLEN)
NAN_BOXED(0x7ebb7d72126216562,32,FLEN)
NAN_BOXED(0x7d52d2c7102579911,32,FLEN)
NAN_BOXED(0xc12aec85240815749,32,FLEN)
NAN_BOXED(0x7f0cc2c0131542720,32,FLEN)
NAN_BOXED(0x7d52d2c7102579911,32,FLEN)
NAN_BOXED(0xc12aec85240815749,32,FLEN)
NAN_BOXED(0x7f0cc2c0131542720,32,FLEN)
NAN_BOXED(0x7d52d2c7102579911,32,FLEN)
NAN_BOXED(0xc12aec85240815749,32,FLEN)
NAN_BOXED(0x7f0cc2c0131542720,32,FLEN)
NAN_BOXED(0x7d52d2c7102579911,32,FLEN)
NAN_BOXED(0xc12aec85240815749,32,FLEN)
NAN_BOXED(0x7f0cc2c0131542720,32,FLEN)
NAN_BOXED(0x7d52d2c7102579911,32,FLEN)
NAN_BOXED(0xc12aec85240815749,32,FLEN)
NAN_BOXED(0x7f0cc2c0131542720,32,FLEN)
NAN_BOXED(0x7d5b67a0103142304,32,FLEN)
NAN_BOXED(0xc14a57e5242874853,32,FLEN)
NAN_BOXED(0x7f2d6b19133682969,32,FLEN)
NAN_BOXED(0x7d5b67a0103142304,32,FLEN)
NAN_BOXED(0xc14a57e5242874853,32,FLEN)
NAN_BOXED(0x7f2d6b19133682969,32,FLEN)
NAN_BOXED(0x7d5b67a0103142304,32,FLEN)
NAN_BOXED(0xc14a57e5242874853,32,FLEN)
NAN_BOXED(0x7f2d6b19133682969,32,FLEN)
NAN_BOXED(0x7d5b67a0103142304,32,FLEN)
NAN_BOXED(0xc14a57e5242874853,32,FLEN)
NAN_BOXED(0x7f2d6b19133682969,32,FLEN)
NAN_BOXED(0x7d5b67a0103142304,32,FLEN)
NAN_BOXED(0xc14a57e5242874853,32,FLEN)
NAN_BOXED(0x7f2d6b19133682969,32,FLEN)
NAN_BOXED(0x7d82d835105727029,32,FLEN)
NAN_BOXED(0xc039e73f225020223,32,FLEN)
NAN_BOXED(0x7e3e08e0117994720,32,FLEN)
NAN_BOXED(0x7d82d835105727029,32,FLEN)
NAN_BOXED(0xc039e73f225020223,32,FLEN)
NAN_BOXED(0x7e3e08e0117994720,32,FLEN)
NAN_BOXED(0x7d82d835105727029,32,FLEN)
NAN_BOXED(0xc039e73f225020223,32,FLEN)
NAN_BOXED(0x7e3e08e0117994720,32,FLEN)
NAN_BOXED(0x7d82d835105727029,32,FLEN)
NAN_BOXED(0xc039e73f225020223,32,FLEN)
NAN_BOXED(0x7e3e08e0117994720,32,FLEN)
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NAN_BOXED(0x7f16f5bb132211131,32,FLEN)
NAN_BOXED(0x7f30ba02133899778,32,FLEN)
NAN_BOXED(0xbf5aacdd210390749,32,FLEN)
NAN_BOXED(0x7f16f5bb132211131,32,FLEN)
NAN_BOXED(0x7f321868133989480,32,FLEN)
NAN_BOXED(0xbf8778f4213326580,32,FLEN)
NAN_BOXED(0x7f3c7e09134670857,32,FLEN)
NAN_BOXED(0x7f321868133989480,32,FLEN)
NAN_BOXED(0xbf8778f4213326580,32,FLEN)
NAN_BOXED(0x7f3c7e09134670857,32,FLEN)
NAN_BOXED(0x7f321868133989480,32,FLEN)
NAN_BOXED(0xbf8778f4213326580,32,FLEN)
NAN_BOXED(0x7f3c7e09134670857,32,FLEN)
NAN_BOXED(0x7f321868133989480,32,FLEN)
NAN_BOXED(0xbf8778f4213326580,32,FLEN)
NAN_BOXED(0x7f3c7e09134670857,32,FLEN)
NAN_BOXED(0x7f321868133989480,32,FLEN)
NAN_BOXED(0xbf8778f4213326580,32,FLEN)
NAN_BOXED(0x7f3c7e09134670857,32,FLEN)
NAN_BOXED(0x7f33b8ad134096045,32,FLEN)
NAN_BOXED(0xbf471c14209108500,32,FLEN)
NAN_BOXED(0x7f0bc845131478597,32,FLEN)
NAN_BOXED(0x7f33b8ad134096045,32,FLEN)
NAN_BOXED(0xbf471c14209108500,32,FLEN)
NAN_BOXED(0x7f0bc845131478597,32,FLEN)
NAN_BOXED(0x7f33b8ad134096045,32,FLEN)
NAN_BOXED(0xbf471c14209108500,32,FLEN)
NAN_BOXED(0x7f0bc845131478597,32,FLEN)
NAN_BOXED(0x7f33b8ad134096045,32,FLEN)
NAN_BOXED(0xbf471c14209108500,32,FLEN)
NAN_BOXED(0x7f0bc845131478597,32,FLEN)
NAN_BOXED(0x7f33b8ad134096045,32,FLEN)
NAN_BOXED(0xbf471c14209108500,32,FLEN)
NAN_BOXED(0x7f0bc845131478597,32,FLEN)
NAN_BOXED(0x7f33cf6c134101868,32,FLEN)
NAN_BOXED(0xbf1e17e3206420451,32,FLEN)
NAN_BOXED(0x7ede1598128483736,32,FLEN)
NAN_BOXED(0x7f33cf6c134101868,32,FLEN)
NAN_BOXED(0xbf1e17e3206420451,32,FLEN)
NAN_BOXED(0x7ede1598128483736,32,FLEN)
NAN_BOXED(0x7f33cf6c134101868,32,FLEN)
NAN_BOXED(0xbf1e17e3206420451,32,FLEN)
NAN_BOXED(0x7ede1598128483736,32,FLEN)
NAN_BOXED(0x7f33cf6c134101868,32,FLEN)
NAN_BOXED(0xbf1e17e3206420451,32,FLEN)
NAN_BOXED(0x7ede1598128483736,32,FLEN)
NAN_BOXED(0x7f33cf6c134101868,32,FLEN)
NAN_BOXED(0xbf1e17e3206420451,32,FLEN)
NAN_BOXED(0x7ede1598128483736,32,FLEN)
NAN_BOXED(0x7f33dfb8134106040,32,FLEN)
NAN_BOXED(0xbe9e050d198027021,32,FLEN)
NAN_BOXED(0x7e5e0f41120093505,32,FLEN)
NAN_BOXED(0x7f33dfb8134106040,32,FLEN)
NAN_BOXED(0xbe9e050d198027021,32,FLEN)
NAN_BOXED(0x7e5e0f41120093505,32,FLEN)
NAN_BOXED(0x7f33dfb8134106040,32,FLEN)
NAN_BOXED(0xbe9e050d198027021,32,FLEN)
NAN_BOXED(0x7e5e0f41120093505,32,FLEN)
NAN_BOXED(0x7f33dfb8134106040,32,FLEN)
NAN_BOXED(0xbe9e050d198027021,32,FLEN)
NAN_BOXED(0x7e5e0f41120093505,32,FLEN)
NAN_BOXED(0x7f33dfb8134106040,32,FLEN)
NAN_BOXED(0xbe9e050d198027021,32,FLEN)
NAN_BOXED(0x7e5e0f41120093505,32,FLEN)
NAN_BOXED(0x7f35a451134221905,32,FLEN)
NAN_BOXED(0xbf043b82204725634,32,FLEN)
NAN_BOXED(0x7ebba5e6126226918,32,FLEN)
NAN_BOXED(0x7f35a451134221905,32,FLEN)
NAN_BOXED(0xbf043b82204725634,32,FLEN)
NAN_BOXED(0x7ebba5e6126226918,32,FLEN)
NAN_BOXED(0x7f35a451134221905,32,FLEN)
NAN_BOXED(0xbf043b82204725634,32,FLEN)
NAN_BOXED(0x7ebba5e6126226918,32,FLEN)
NAN_BOXED(0x7f35a451134221905,32,FLEN)
NAN_BOXED(0xbf043b82204725634,32,FLEN)
NAN_BOXED(0x7ebba5e6126226918,32,FLEN)
NAN_BOXED(0x7f35a451134221905,32,FLEN)
NAN_BOXED(0xbf043b82204725634,32,FLEN)
NAN_BOXED(0x7ebba5e6126226918,32,FLEN)
NAN_BOXED(0x7f35c708134230792,32,FLEN)
NAN_BOXED(0xbf2fcfdc207581660,32,FLEN)
NAN_BOXED(0x7ef9ad4e130292046,32,FLEN)
NAN_BOXED(0x7f35c708134230792,32,FLEN)
NAN_BOXED(0xbf2fcfdc207581660,32,FLEN)
NAN_BOXED(0x7ef9ad4e130292046,32,FLEN)
NAN_BOXED(0x7f35c708134230792,32,FLEN)
NAN_BOXED(0xbf2fcfdc207581660,32,FLEN)
NAN_BOXED(0x7ef9ad4e130292046,32,FLEN)
NAN_BOXED(0x7f35c708134230792,32,FLEN)
NAN_BOXED(0xbf2fcfdc207581660,32,FLEN)
NAN_BOXED(0x7ef9ad4e130292046,32,FLEN)
NAN_BOXED(0x7f35c708134230792,32,FLEN)
NAN_BOXED(0xbf2fcfdc207581660,32,FLEN)
NAN_BOXED(0x7ef9ad4e130292046,32,FLEN)
NAN_BOXED(0x7f3945d0134459856,32,FLEN)
NAN_BOXED(0xbb47af30142037296,32,FLEN)
NAN_BOXED(0x7b10840f064679951,32,FLEN)
NAN_BOXED(0x7f3945d0134459856,32,FLEN)
NAN_BOXED(0xbb47af30142037296,32,FLEN)
NAN_BOXED(0x7b10840f064679951,32,FLEN)
NAN_BOXED(0x7f3945d0134459856,32,FLEN)
NAN_BOXED(0xbb47af30142037296,32,FLEN)
NAN_BOXED(0x7b10840f064679951,32,FLEN)
NAN_BOXED(0x7f3945d0134459856,32,FLEN)
NAN_BOXED(0xbb47af30142037296,32,FLEN)
NAN_BOXED(0x7b10840f064679951,32,FLEN)
NAN_BOXED(0x7f3945d0134459856,32,FLEN)
NAN_BOXED(0xbb47af30142037296,32,FLEN)
NAN_BOXED(0x7b10840f064679951,32,FLEN)
NAN_BOXED(0x7f394df5134461941,32,FLEN)
NAN_BOXED(0xbde542ef185918703,32,FLEN)
NAN_BOXED(0x7da5f32f108027695,32,FLEN)
NAN_BOXED(0x7f394df5134461941,32,FLEN)
NAN_BOXED(0xbde542ef185918703,32,FLEN)
NAN_BOXED(0x7da5f32f108027695,32,FLEN)
NAN_BOXED(0x7f394df5134461941,32,FLEN)
NAN_BOXED(0xbde542ef185918703,32,FLEN)
NAN_BOXED(0x7da5f32f108027695,32,FLEN)
NAN_BOXED(0x7f394df5134461941,32,FLEN)
NAN_BOXED(0xbde542ef185918703,32,FLEN)
NAN_BOXED(0x7da5f32f108027695,32,FLEN)
NAN_BOXED(0x7f394df5134461941,32,FLEN)
NAN_BOXED(0xbde542ef185918703,32,FLEN)
NAN_BOXED(0x7da5f32f108027695,32,FLEN)
NAN_BOXED(0x7f394fae134462382,32,FLEN)
NAN_BOXED(0xbf496ae5209259749,32,FLEN)
NAN_BOXED(0x7f11ccf0131873008,32,FLEN)
NAN_BOXED(0x7f394fae134462382,32,FLEN)
NAN_BOXED(0xbf496ae5209259749,32,FLEN)
NAN_BOXED(0x7f11ccf0131873008,32,FLEN)
NAN_BOXED(0x7f394fae134462382,32,FLEN)
NAN_BOXED(0xbf496ae5209259749,32,FLEN)
NAN_BOXED(0x7f11ccf0131873008,32,FLEN)
NAN_BOXED(0x7f394fae134462382,32,FLEN)
NAN_BOXED(0xbf496ae5209259749,32,FLEN)
NAN_BOXED(0x7f11ccf0131873008,32,FLEN)
NAN_BOXED(0x7f394fae134462382,32,FLEN)
NAN_BOXED(0xbf496ae5209259749,32,FLEN)
NAN_BOXED(0x7f11ccf0131873008,32,FLEN)
NAN_BOXED(0x7f395d94134465940,32,FLEN)
NAN_BOXED(0xbf518582209790850,32,FLEN)
NAN_BOXED(0x7f17b612132260370,32,FLEN)
NAN_BOXED(0x7f395d94134465940,32,FLEN)
NAN_BOXED(0xbf518582209790850,32,FLEN)
NAN_BOXED(0x7f17b612132260370,32,FLEN)
NAN_BOXED(0x7f395d94134465940,32,FLEN)
NAN_BOXED(0xbf518582209790850,32,FLEN)
NAN_BOXED(0x7f17b612132260370,32,FLEN)
NAN_BOXED(0x7f395d94134465940,32,FLEN)
NAN_BOXED(0xbf518582209790850,32,FLEN)
NAN_BOXED(0x7f17b612132260370,32,FLEN)
NAN_BOXED(0x7f395d94134465940,32,FLEN)
NAN_BOXED(0xbf518582209790850,32,FLEN)
NAN_BOXED(0x7f17b612132260370,32,FLEN)
NAN_BOXED(0x7f3a8a7e134542974,32,FLEN)
NAN_BOXED(0xbf0c9d85205275013,32,FLEN)
NAN_BOXED(0x7ecced0a127359242,32,FLEN)
NAN_BOXED(0x7f3a8a7e134542974,32,FLEN)
NAN_BOXED(0xbf0c9d85205275013,32,FLEN)
NAN_BOXED(0x7ecced0a127359242,32,FLEN)
NAN_BOXED(0x7f3a8a7e134542974,32,FLEN)
NAN_BOXED(0xbf0c9d85205275013,32,FLEN)
NAN_BOXED(0x7ecced0a127359242,32,FLEN)
NAN_BOXED(0x7f3a8a7e134542974,32,FLEN)
NAN_BOXED(0xbf0c9d85205275013,32,FLEN)
NAN_BOXED(0x7ecced0a127359242,32,FLEN)
NAN_BOXED(0x7f3a8a7e134542974,32,FLEN)
NAN_BOXED(0xbf0c9d85205275013,32,FLEN)
NAN_BOXED(0x7ecced0a127359242,32,FLEN)
NAN_BOXED(0x7f3c2c79134649977,32,FLEN)
NAN_BOXED(0xbd8397ce179517902,32,FLEN)
NAN_BOXED(0x7d4174b0101441712,32,FLEN)
NAN_BOXED(0x7f3c2c79134649977,32,FLEN)
NAN_BOXED(0xbd8397ce179517902,32,FLEN)
NAN_BOXED(0x7d4174b0101441712,32,FLEN)
NAN_BOXED(0x7f3c2c79134649977,32,FLEN)
NAN_BOXED(0xbd8397ce179517902,32,FLEN)
NAN_BOXED(0x7d4174b0101441712,32,FLEN)
NAN_BOXED(0x7f3c2c79134649977,32,FLEN)
NAN_BOXED(0xbd8397ce179517902,32,FLEN)
NAN_BOXED(0x7d4174b0101441712,32,FLEN)
NAN_BOXED(0x7f3c2c79134649977,32,FLEN)
NAN_BOXED(0xbd8397ce179517902,32,FLEN)
NAN_BOXED(0x7d4174b0101441712,32,FLEN)
NAN_BOXED(0x7f3d4865134722661,32,FLEN)
NAN_BOXED(0xbeb9ff7a199860602,32,FLEN)
NAN_BOXED(0x7e898636122942006,32,FLEN)
NAN_BOXED(0x7f3d4865134722661,32,FLEN)
NAN_BOXED(0xbeb9ff7a199860602,32,FLEN)
NAN_BOXED(0x7e898636122942006,32,FLEN)
NAN_BOXED(0x7f3d4865134722661,32,FLEN)
NAN_BOXED(0xbeb9ff7a199860602,32,FLEN)
NAN_BOXED(0x7e898636122942006,32,FLEN)
NAN_BOXED(0x7f3d4865134722661,32,FLEN)
NAN_BOXED(0xbeb9ff7a199860602,32,FLEN)
NAN_BOXED(0x7e898636122942006,32,FLEN)
NAN_BOXED(0x7f3d4865134722661,32,FLEN)
NAN_BOXED(0xbeb9ff7a199860602,32,FLEN)
NAN_BOXED(0x7e898636122942006,32,FLEN)
NAN_BOXED(0x7f3e2b14134780692,32,FLEN)
NAN_BOXED(0xbf15e986205884294,32,FLEN)
NAN_BOXED(0x7edeb917128525591,32,FLEN)
NAN_BOXED(0x7f3e2b14134780692,32,FLEN)
NAN_BOXED(0xbf15e986205884294,32,FLEN)
NAN_BOXED(0x7edeb917128525591,32,FLEN)
NAN_BOXED(0x7f3e2b14134780692,32,FLEN)
NAN_BOXED(0xbf15e986205884294,32,FLEN)
NAN_BOXED(0x7edeb917128525591,32,FLEN)
NAN_BOXED(0x7f3e2b14134780692,32,FLEN)
NAN_BOXED(0xbf15e986205884294,32,FLEN)
NAN_BOXED(0x7edeb917128525591,32,FLEN)
NAN_BOXED(0x7f3e2b14134780692,32,FLEN)
NAN_BOXED(0xbf15e986205884294,32,FLEN)
NAN_BOXED(0x7edeb917128525591,32,FLEN)
NAN_BOXED(0x7f3f7e14134867476,32,FLEN)
NAN_BOXED(0xbf6f07dc211724764,32,FLEN)
NAN_BOXED(0x7f32cc96134035606,32,FLEN)
NAN_BOXED(0x7f3f7e14134867476,32,FLEN)
NAN_BOXED(0xbf6f07dc211724764,32,FLEN)
NAN_BOXED(0x7f32cc96134035606,32,FLEN)
NAN_BOXED(0x7f3f7e14134867476,32,FLEN)
NAN_BOXED(0xbf6f07dc211724764,32,FLEN)
NAN_BOXED(0x7f32cc96134035606,32,FLEN)
NAN_BOXED(0x7f3f7e14134867476,32,FLEN)
NAN_BOXED(0xbf6f07dc211724764,32,FLEN)
NAN_BOXED(0x7f32cc96134035606,32,FLEN)
NAN_BOXED(0x7f3f7e14134867476,32,FLEN)
NAN_BOXED(0xbf6f07dc211724764,32,FLEN)
NAN_BOXED(0x7f32cc96134035606,32,FLEN)
NAN_BOXED(0x7f3fd2a7134889127,32,FLEN)
NAN_BOXED(0xbd225cdc173145820,32,FLEN)
NAN_BOXED(0x7cf351c5096320965,32,FLEN)
NAN_BOXED(0x7f3fd2a7134889127,32,FLEN)
NAN_BOXED(0xbd225cdc173145820,32,FLEN)
NAN_BOXED(0x7cf351c5096320965,32,FLEN)
NAN_BOXED(0x7f3fd2a7134889127,32,FLEN)
NAN_BOXED(0xbd225cdc173145820,32,FLEN)
NAN_BOXED(0x7cf351c5096320965,32,FLEN)
NAN_BOXED(0x7f3fd2a7134889127,32,FLEN)
NAN_BOXED(0xbd225cdc173145820,32,FLEN)
NAN_BOXED(0x7cf351c5096320965,32,FLEN)
NAN_BOXED(0x7f3fd2a7134889127,32,FLEN)
NAN_BOXED(0xbd225cdc173145820,32,FLEN)
NAN_BOXED(0x7cf351c5096320965,32,FLEN)
NAN_BOXED(0x7f3fd529134889769,32,FLEN)
NAN_BOXED(0xbe569c36193347126,32,FLEN)
NAN_BOXED(0x7e20d13f116079935,32,FLEN)
NAN_BOXED(0x7f3fd529134889769,32,FLEN)
NAN_BOXED(0xbe569c36193347126,32,FLEN)
NAN_BOXED(0x7e20d13f116079935,32,FLEN)
NAN_BOXED(0x7f3fd529134889769,32,FLEN)
NAN_BOXED(0xbe569c36193347126,32,FLEN)
NAN_BOXED(0x7e20d13f116079935,32,FLEN)
NAN_BOXED(0x7f3fd529134889769,32,FLEN)
NAN_BOXED(0xbe569c36193347126,32,FLEN)
NAN_BOXED(0x7e20d13f116079935,32,FLEN)
NAN_BOXED(0x7f3fd529134889769,32,FLEN)
NAN_BOXED(0xbe569c36193347126,32,FLEN)
NAN_BOXED(0x7e20d13f116079935,32,FLEN)
NAN_BOXED(0x79b337a6041788326,32,FLEN)
NAN_BOXED(0xc5067106305533702,32,FLEN)
NAN_BOXED(0x7f3c3c81134654081,32,FLEN)
NAN_BOXED(0x79b337a6041788326,32,FLEN)
NAN_BOXED(0xc5067106305533702,32,FLEN)
NAN_BOXED(0x7f3c3c81134654081,32,FLEN)
NAN_BOXED(0x79b337a6041788326,32,FLEN)
NAN_BOXED(0xc5067106305533702,32,FLEN)
NAN_BOXED(0x7f3c3c81134654081,32,FLEN)
NAN_BOXED(0x79b337a6041788326,32,FLEN)
NAN_BOXED(0xc5067106305533702,32,FLEN)
NAN_BOXED(0x7f3c3c81134654081,32,FLEN)
NAN_BOXED(0x7ba44bd3074364883,32,FLEN)
NAN_BOXED(0xc2b7709b266801819,32,FLEN)
NAN_BOXED(0x7eeb74f1129360113,32,FLEN)
NAN_BOXED(0x7ba44bd3074364883,32,FLEN)
NAN_BOXED(0xc2b7709b266801819,32,FLEN)
NAN_BOXED(0x7eeb74f1129360113,32,FLEN)
NAN_BOXED(0x7ba44bd3074364883,32,FLEN)
NAN_BOXED(0xc2b7709b266801819,32,FLEN)
NAN_BOXED(0x7eeb74f1129360113,32,FLEN)
NAN_BOXED(0x7ba44bd3074364883,32,FLEN)
NAN_BOXED(0xc2b7709b266801819,32,FLEN)
NAN_BOXED(0x7eeb74f1129360113,32,FLEN)
NAN_BOXED(0x7ba44bd3074364883,32,FLEN)
NAN_BOXED(0xc2b7709b266801819,32,FLEN)
NAN_BOXED(0x7eeb74f1129360113,32,FLEN)
NAN_BOXED(0x7c07b7d1080880593,32,FLEN)
NAN_BOXED(0xc2932367264422759,32,FLEN)
NAN_BOXED(0x7f1c02a4132542116,32,FLEN)
NAN_BOXED(0x7c07b7d1080880593,32,FLEN)
NAN_BOXED(0xc2932367264422759,32,FLEN)
NAN_BOXED(0x7f1c02a4132542116,32,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;


signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_2:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_3:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_4:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_5:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_6:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_7:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_8:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_9:
    .fill 214*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine

tsig_begin_canary:
CANARY;
tsig_begin_canary:
CANARY;
mtrap_sigptr:
    .fill 64*(XLEN/32),4,0xdeadbeef
tsig_end_canary:
CANARY;
tsig_end_canary:
CANARY;

#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif

sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
