
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.7.1
// timestamp : Fri Jun 17 14:18:07 2022 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /scratch/pawan/work/normalised/RV32F/fmsub.s.cgf \
 \
//                  -- xlen 32  \
//                  --randomize \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fmsub.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmsub_b15 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmsub_b15)
RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fmsub_b15)
RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_8448:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x254961 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x463fe0 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e254961; op2val:0x40c63fe0;
op3val:0x7d7f0000; valaddr_reg:x3; val_offset:25344*0 + 3*-1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25344*0 + 3*0*FLEN/8, x4, x1, x2)

inst_8449:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x254961 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x463fe0 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e254961; op2val:0x40c63fe0;
op3val:0x7d7f8000; valaddr_reg:x3; val_offset:25347*0 + 3*0*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25347*0 + 3*1*FLEN/8, x4, x1, x2)

inst_8450:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x254961 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x463fe0 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e254961; op2val:0x40c63fe0;
op3val:0x7d7fc000; valaddr_reg:x3; val_offset:25350*0 + 3*1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25350*0 + 3*2*FLEN/8, x4, x1, x2)

inst_8451:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x254961 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x463fe0 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e254961; op2val:0x40c63fe0;
op3val:0x7d7fe000; valaddr_reg:x3; val_offset:25353*0 + 3*2*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25353*0 + 3*3*FLEN/8, x4, x1, x2)

inst_8452:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x254961 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x463fe0 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e254961; op2val:0x40c63fe0;
op3val:0x7d7ff000; valaddr_reg:x3; val_offset:25356*0 + 3*3*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25356*0 + 3*4*FLEN/8, x4, x1, x2)

inst_8453:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x254961 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x463fe0 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e254961; op2val:0x40c63fe0;
op3val:0x7d7ff800; valaddr_reg:x3; val_offset:25359*0 + 3*4*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25359*0 + 3*5*FLEN/8, x4, x1, x2)

inst_8454:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x254961 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x463fe0 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e254961; op2val:0x40c63fe0;
op3val:0x7d7ffc00; valaddr_reg:x3; val_offset:25362*0 + 3*5*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25362*0 + 3*6*FLEN/8, x4, x1, x2)

inst_8455:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x254961 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x463fe0 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e254961; op2val:0x40c63fe0;
op3val:0x7d7ffe00; valaddr_reg:x3; val_offset:25365*0 + 3*6*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25365*0 + 3*7*FLEN/8, x4, x1, x2)

inst_8456:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x254961 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x463fe0 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e254961; op2val:0x40c63fe0;
op3val:0x7d7fff00; valaddr_reg:x3; val_offset:25368*0 + 3*7*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25368*0 + 3*8*FLEN/8, x4, x1, x2)

inst_8457:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x254961 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x463fe0 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e254961; op2val:0x40c63fe0;
op3val:0x7d7fff80; valaddr_reg:x3; val_offset:25371*0 + 3*8*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25371*0 + 3*9*FLEN/8, x4, x1, x2)

inst_8458:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x254961 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x463fe0 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e254961; op2val:0x40c63fe0;
op3val:0x7d7fffc0; valaddr_reg:x3; val_offset:25374*0 + 3*9*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25374*0 + 3*10*FLEN/8, x4, x1, x2)

inst_8459:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x254961 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x463fe0 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e254961; op2val:0x40c63fe0;
op3val:0x7d7fffe0; valaddr_reg:x3; val_offset:25377*0 + 3*10*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25377*0 + 3*11*FLEN/8, x4, x1, x2)

inst_8460:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x254961 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x463fe0 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e254961; op2val:0x40c63fe0;
op3val:0x7d7ffff0; valaddr_reg:x3; val_offset:25380*0 + 3*11*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25380*0 + 3*12*FLEN/8, x4, x1, x2)

inst_8461:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x254961 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x463fe0 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e254961; op2val:0x40c63fe0;
op3val:0x7d7ffff8; valaddr_reg:x3; val_offset:25383*0 + 3*12*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25383*0 + 3*13*FLEN/8, x4, x1, x2)

inst_8462:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x254961 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x463fe0 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e254961; op2val:0x40c63fe0;
op3val:0x7d7ffffc; valaddr_reg:x3; val_offset:25386*0 + 3*13*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25386*0 + 3*14*FLEN/8, x4, x1, x2)

inst_8463:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x254961 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x463fe0 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e254961; op2val:0x40c63fe0;
op3val:0x7d7ffffe; valaddr_reg:x3; val_offset:25389*0 + 3*14*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25389*0 + 3*15*FLEN/8, x4, x1, x2)

inst_8464:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x254961 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x463fe0 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e254961; op2val:0x40c63fe0;
op3val:0x7d7fffff; valaddr_reg:x3; val_offset:25392*0 + 3*15*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25392*0 + 3*16*FLEN/8, x4, x1, x2)

inst_8465:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x254961 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x463fe0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e254961; op2val:0x40c63fe0;
op3val:0x7f000001; valaddr_reg:x3; val_offset:25395*0 + 3*16*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25395*0 + 3*17*FLEN/8, x4, x1, x2)

inst_8466:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x254961 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x463fe0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e254961; op2val:0x40c63fe0;
op3val:0x7f000003; valaddr_reg:x3; val_offset:25398*0 + 3*17*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25398*0 + 3*18*FLEN/8, x4, x1, x2)

inst_8467:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x254961 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x463fe0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e254961; op2val:0x40c63fe0;
op3val:0x7f000007; valaddr_reg:x3; val_offset:25401*0 + 3*18*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25401*0 + 3*19*FLEN/8, x4, x1, x2)

inst_8468:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x254961 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x463fe0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e254961; op2val:0x40c63fe0;
op3val:0x7f199999; valaddr_reg:x3; val_offset:25404*0 + 3*19*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25404*0 + 3*20*FLEN/8, x4, x1, x2)

inst_8469:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x254961 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x463fe0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e254961; op2val:0x40c63fe0;
op3val:0x7f249249; valaddr_reg:x3; val_offset:25407*0 + 3*20*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25407*0 + 3*21*FLEN/8, x4, x1, x2)

inst_8470:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x254961 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x463fe0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e254961; op2val:0x40c63fe0;
op3val:0x7f333333; valaddr_reg:x3; val_offset:25410*0 + 3*21*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25410*0 + 3*22*FLEN/8, x4, x1, x2)

inst_8471:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x254961 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x463fe0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e254961; op2val:0x40c63fe0;
op3val:0x7f36db6d; valaddr_reg:x3; val_offset:25413*0 + 3*22*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25413*0 + 3*23*FLEN/8, x4, x1, x2)

inst_8472:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x254961 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x463fe0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e254961; op2val:0x40c63fe0;
op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:25416*0 + 3*23*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25416*0 + 3*24*FLEN/8, x4, x1, x2)

inst_8473:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x254961 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x463fe0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e254961; op2val:0x40c63fe0;
op3val:0x7f444444; valaddr_reg:x3; val_offset:25419*0 + 3*24*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25419*0 + 3*25*FLEN/8, x4, x1, x2)

inst_8474:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x254961 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x463fe0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e254961; op2val:0x40c63fe0;
op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:25422*0 + 3*25*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25422*0 + 3*26*FLEN/8, x4, x1, x2)

inst_8475:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x254961 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x463fe0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e254961; op2val:0x40c63fe0;
op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:25425*0 + 3*26*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25425*0 + 3*27*FLEN/8, x4, x1, x2)

inst_8476:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x254961 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x463fe0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e254961; op2val:0x40c63fe0;
op3val:0x7f666666; valaddr_reg:x3; val_offset:25428*0 + 3*27*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25428*0 + 3*28*FLEN/8, x4, x1, x2)

inst_8477:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x254961 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x463fe0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e254961; op2val:0x40c63fe0;
op3val:0x7f6db6db; valaddr_reg:x3; val_offset:25431*0 + 3*28*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25431*0 + 3*29*FLEN/8, x4, x1, x2)

inst_8478:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x254961 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x463fe0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e254961; op2val:0x40c63fe0;
op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:25434*0 + 3*29*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25434*0 + 3*30*FLEN/8, x4, x1, x2)

inst_8479:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x254961 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x463fe0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e254961; op2val:0x40c63fe0;
op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:25437*0 + 3*30*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25437*0 + 3*31*FLEN/8, x4, x1, x2)

inst_8480:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x254961 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x463fe0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e254961; op2val:0x40c63fe0;
op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:25440*0 + 3*31*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25440*0 + 3*32*FLEN/8, x4, x1, x2)

inst_8481:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x3; val_offset:25443*0 + 3*32*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25443*0 + 3*33*FLEN/8, x4, x1, x2)

inst_8482:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x3; val_offset:25446*0 + 3*33*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25446*0 + 3*34*FLEN/8, x4, x1, x2)

inst_8483:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x3; val_offset:25449*0 + 3*34*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25449*0 + 3*35*FLEN/8, x4, x1, x2)

inst_8484:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x3; val_offset:25452*0 + 3*35*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25452*0 + 3*36*FLEN/8, x4, x1, x2)

inst_8485:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x3; val_offset:25455*0 + 3*36*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25455*0 + 3*37*FLEN/8, x4, x1, x2)

inst_8486:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x3; val_offset:25458*0 + 3*37*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25458*0 + 3*38*FLEN/8, x4, x1, x2)

inst_8487:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x3; val_offset:25461*0 + 3*38*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25461*0 + 3*39*FLEN/8, x4, x1, x2)

inst_8488:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x3; val_offset:25464*0 + 3*39*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25464*0 + 3*40*FLEN/8, x4, x1, x2)

inst_8489:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x3; val_offset:25467*0 + 3*40*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25467*0 + 3*41*FLEN/8, x4, x1, x2)

inst_8490:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x3; val_offset:25470*0 + 3*41*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25470*0 + 3*42*FLEN/8, x4, x1, x2)

inst_8491:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x3; val_offset:25473*0 + 3*42*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25473*0 + 3*43*FLEN/8, x4, x1, x2)

inst_8492:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x3; val_offset:25476*0 + 3*43*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25476*0 + 3*44*FLEN/8, x4, x1, x2)

inst_8493:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x3; val_offset:25479*0 + 3*44*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25479*0 + 3*45*FLEN/8, x4, x1, x2)

inst_8494:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x3; val_offset:25482*0 + 3*45*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25482*0 + 3*46*FLEN/8, x4, x1, x2)

inst_8495:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x3; val_offset:25485*0 + 3*46*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25485*0 + 3*47*FLEN/8, x4, x1, x2)

inst_8496:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x3; val_offset:25488*0 + 3*47*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25488*0 + 3*48*FLEN/8, x4, x1, x2)

inst_8497:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x87800000; valaddr_reg:x3; val_offset:25491*0 + 3*48*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25491*0 + 3*49*FLEN/8, x4, x1, x2)

inst_8498:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x87800001; valaddr_reg:x3; val_offset:25494*0 + 3*49*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25494*0 + 3*50*FLEN/8, x4, x1, x2)

inst_8499:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x87800003; valaddr_reg:x3; val_offset:25497*0 + 3*50*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25497*0 + 3*51*FLEN/8, x4, x1, x2)

inst_8500:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x87800007; valaddr_reg:x3; val_offset:25500*0 + 3*51*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25500*0 + 3*52*FLEN/8, x4, x1, x2)

inst_8501:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x8780000f; valaddr_reg:x3; val_offset:25503*0 + 3*52*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25503*0 + 3*53*FLEN/8, x4, x1, x2)

inst_8502:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x8780001f; valaddr_reg:x3; val_offset:25506*0 + 3*53*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25506*0 + 3*54*FLEN/8, x4, x1, x2)

inst_8503:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x8780003f; valaddr_reg:x3; val_offset:25509*0 + 3*54*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25509*0 + 3*55*FLEN/8, x4, x1, x2)

inst_8504:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x8780007f; valaddr_reg:x3; val_offset:25512*0 + 3*55*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25512*0 + 3*56*FLEN/8, x4, x1, x2)

inst_8505:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x878000ff; valaddr_reg:x3; val_offset:25515*0 + 3*56*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25515*0 + 3*57*FLEN/8, x4, x1, x2)

inst_8506:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x878001ff; valaddr_reg:x3; val_offset:25518*0 + 3*57*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25518*0 + 3*58*FLEN/8, x4, x1, x2)

inst_8507:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x878003ff; valaddr_reg:x3; val_offset:25521*0 + 3*58*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25521*0 + 3*59*FLEN/8, x4, x1, x2)

inst_8508:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x878007ff; valaddr_reg:x3; val_offset:25524*0 + 3*59*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25524*0 + 3*60*FLEN/8, x4, x1, x2)

inst_8509:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x87800fff; valaddr_reg:x3; val_offset:25527*0 + 3*60*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25527*0 + 3*61*FLEN/8, x4, x1, x2)

inst_8510:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x87801fff; valaddr_reg:x3; val_offset:25530*0 + 3*61*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25530*0 + 3*62*FLEN/8, x4, x1, x2)

inst_8511:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x87803fff; valaddr_reg:x3; val_offset:25533*0 + 3*62*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25533*0 + 3*63*FLEN/8, x4, x1, x2)

inst_8512:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x87807fff; valaddr_reg:x3; val_offset:25536*0 + 3*63*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25536*0 + 3*64*FLEN/8, x4, x1, x2)

inst_8513:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x8780ffff; valaddr_reg:x3; val_offset:25539*0 + 3*64*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25539*0 + 3*65*FLEN/8, x4, x1, x2)

inst_8514:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x8781ffff; valaddr_reg:x3; val_offset:25542*0 + 3*65*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25542*0 + 3*66*FLEN/8, x4, x1, x2)

inst_8515:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x8783ffff; valaddr_reg:x3; val_offset:25545*0 + 3*66*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25545*0 + 3*67*FLEN/8, x4, x1, x2)

inst_8516:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x8787ffff; valaddr_reg:x3; val_offset:25548*0 + 3*67*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25548*0 + 3*68*FLEN/8, x4, x1, x2)

inst_8517:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x878fffff; valaddr_reg:x3; val_offset:25551*0 + 3*68*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25551*0 + 3*69*FLEN/8, x4, x1, x2)

inst_8518:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x879fffff; valaddr_reg:x3; val_offset:25554*0 + 3*69*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25554*0 + 3*70*FLEN/8, x4, x1, x2)

inst_8519:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x87bfffff; valaddr_reg:x3; val_offset:25557*0 + 3*70*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25557*0 + 3*71*FLEN/8, x4, x1, x2)

inst_8520:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x87c00000; valaddr_reg:x3; val_offset:25560*0 + 3*71*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25560*0 + 3*72*FLEN/8, x4, x1, x2)

inst_8521:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x87e00000; valaddr_reg:x3; val_offset:25563*0 + 3*72*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25563*0 + 3*73*FLEN/8, x4, x1, x2)

inst_8522:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x87f00000; valaddr_reg:x3; val_offset:25566*0 + 3*73*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25566*0 + 3*74*FLEN/8, x4, x1, x2)

inst_8523:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x87f80000; valaddr_reg:x3; val_offset:25569*0 + 3*74*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25569*0 + 3*75*FLEN/8, x4, x1, x2)

inst_8524:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x87fc0000; valaddr_reg:x3; val_offset:25572*0 + 3*75*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25572*0 + 3*76*FLEN/8, x4, x1, x2)

inst_8525:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x87fe0000; valaddr_reg:x3; val_offset:25575*0 + 3*76*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25575*0 + 3*77*FLEN/8, x4, x1, x2)

inst_8526:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x87ff0000; valaddr_reg:x3; val_offset:25578*0 + 3*77*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25578*0 + 3*78*FLEN/8, x4, x1, x2)

inst_8527:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x87ff8000; valaddr_reg:x3; val_offset:25581*0 + 3*78*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25581*0 + 3*79*FLEN/8, x4, x1, x2)

inst_8528:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x87ffc000; valaddr_reg:x3; val_offset:25584*0 + 3*79*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25584*0 + 3*80*FLEN/8, x4, x1, x2)

inst_8529:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x87ffe000; valaddr_reg:x3; val_offset:25587*0 + 3*80*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25587*0 + 3*81*FLEN/8, x4, x1, x2)

inst_8530:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x87fff000; valaddr_reg:x3; val_offset:25590*0 + 3*81*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25590*0 + 3*82*FLEN/8, x4, x1, x2)

inst_8531:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x87fff800; valaddr_reg:x3; val_offset:25593*0 + 3*82*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25593*0 + 3*83*FLEN/8, x4, x1, x2)

inst_8532:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x87fffc00; valaddr_reg:x3; val_offset:25596*0 + 3*83*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25596*0 + 3*84*FLEN/8, x4, x1, x2)

inst_8533:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x87fffe00; valaddr_reg:x3; val_offset:25599*0 + 3*84*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25599*0 + 3*85*FLEN/8, x4, x1, x2)

inst_8534:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x87ffff00; valaddr_reg:x3; val_offset:25602*0 + 3*85*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25602*0 + 3*86*FLEN/8, x4, x1, x2)

inst_8535:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x87ffff80; valaddr_reg:x3; val_offset:25605*0 + 3*86*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25605*0 + 3*87*FLEN/8, x4, x1, x2)

inst_8536:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x87ffffc0; valaddr_reg:x3; val_offset:25608*0 + 3*87*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25608*0 + 3*88*FLEN/8, x4, x1, x2)

inst_8537:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x87ffffe0; valaddr_reg:x3; val_offset:25611*0 + 3*88*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25611*0 + 3*89*FLEN/8, x4, x1, x2)

inst_8538:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x87fffff0; valaddr_reg:x3; val_offset:25614*0 + 3*89*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25614*0 + 3*90*FLEN/8, x4, x1, x2)

inst_8539:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x87fffff8; valaddr_reg:x3; val_offset:25617*0 + 3*90*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25617*0 + 3*91*FLEN/8, x4, x1, x2)

inst_8540:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x87fffffc; valaddr_reg:x3; val_offset:25620*0 + 3*91*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25620*0 + 3*92*FLEN/8, x4, x1, x2)

inst_8541:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x87fffffe; valaddr_reg:x3; val_offset:25623*0 + 3*92*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25623*0 + 3*93*FLEN/8, x4, x1, x2)

inst_8542:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2580de and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2580de; op2val:0x80000000;
op3val:0x87ffffff; valaddr_reg:x3; val_offset:25626*0 + 3*93*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25626*0 + 3*94*FLEN/8, x4, x1, x2)

inst_8543:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x800001; valaddr_reg:x3; val_offset:25629*0 + 3*94*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25629*0 + 3*95*FLEN/8, x4, x1, x2)

inst_8544:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x800003; valaddr_reg:x3; val_offset:25632*0 + 3*95*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25632*0 + 3*96*FLEN/8, x4, x1, x2)

inst_8545:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x800007; valaddr_reg:x3; val_offset:25635*0 + 3*96*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25635*0 + 3*97*FLEN/8, x4, x1, x2)

inst_8546:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x999999; valaddr_reg:x3; val_offset:25638*0 + 3*97*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25638*0 + 3*98*FLEN/8, x4, x1, x2)

inst_8547:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0xa49249; valaddr_reg:x3; val_offset:25641*0 + 3*98*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25641*0 + 3*99*FLEN/8, x4, x1, x2)

inst_8548:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0xb33333; valaddr_reg:x3; val_offset:25644*0 + 3*99*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25644*0 + 3*100*FLEN/8, x4, x1, x2)

inst_8549:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0xb6db6d; valaddr_reg:x3; val_offset:25647*0 + 3*100*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25647*0 + 3*101*FLEN/8, x4, x1, x2)

inst_8550:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0xbbbbbb; valaddr_reg:x3; val_offset:25650*0 + 3*101*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25650*0 + 3*102*FLEN/8, x4, x1, x2)

inst_8551:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0xc44444; valaddr_reg:x3; val_offset:25653*0 + 3*102*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25653*0 + 3*103*FLEN/8, x4, x1, x2)

inst_8552:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0xcccccc; valaddr_reg:x3; val_offset:25656*0 + 3*103*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25656*0 + 3*104*FLEN/8, x4, x1, x2)

inst_8553:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0xdb6db6; valaddr_reg:x3; val_offset:25659*0 + 3*104*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25659*0 + 3*105*FLEN/8, x4, x1, x2)

inst_8554:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0xe66666; valaddr_reg:x3; val_offset:25662*0 + 3*105*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25662*0 + 3*106*FLEN/8, x4, x1, x2)

inst_8555:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0xedb6db; valaddr_reg:x3; val_offset:25665*0 + 3*106*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25665*0 + 3*107*FLEN/8, x4, x1, x2)

inst_8556:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0xfffff8; valaddr_reg:x3; val_offset:25668*0 + 3*107*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25668*0 + 3*108*FLEN/8, x4, x1, x2)

inst_8557:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0xfffffc; valaddr_reg:x3; val_offset:25671*0 + 3*108*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25671*0 + 3*109*FLEN/8, x4, x1, x2)

inst_8558:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0xfffffe; valaddr_reg:x3; val_offset:25674*0 + 3*109*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25674*0 + 3*110*FLEN/8, x4, x1, x2)

inst_8559:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x62800000; valaddr_reg:x3; val_offset:25677*0 + 3*110*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25677*0 + 3*111*FLEN/8, x4, x1, x2)

inst_8560:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x62800001; valaddr_reg:x3; val_offset:25680*0 + 3*111*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25680*0 + 3*112*FLEN/8, x4, x1, x2)

inst_8561:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x62800003; valaddr_reg:x3; val_offset:25683*0 + 3*112*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25683*0 + 3*113*FLEN/8, x4, x1, x2)

inst_8562:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x62800007; valaddr_reg:x3; val_offset:25686*0 + 3*113*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25686*0 + 3*114*FLEN/8, x4, x1, x2)

inst_8563:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x6280000f; valaddr_reg:x3; val_offset:25689*0 + 3*114*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25689*0 + 3*115*FLEN/8, x4, x1, x2)

inst_8564:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x6280001f; valaddr_reg:x3; val_offset:25692*0 + 3*115*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25692*0 + 3*116*FLEN/8, x4, x1, x2)

inst_8565:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x6280003f; valaddr_reg:x3; val_offset:25695*0 + 3*116*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25695*0 + 3*117*FLEN/8, x4, x1, x2)

inst_8566:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x6280007f; valaddr_reg:x3; val_offset:25698*0 + 3*117*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25698*0 + 3*118*FLEN/8, x4, x1, x2)

inst_8567:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x628000ff; valaddr_reg:x3; val_offset:25701*0 + 3*118*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25701*0 + 3*119*FLEN/8, x4, x1, x2)

inst_8568:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x628001ff; valaddr_reg:x3; val_offset:25704*0 + 3*119*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25704*0 + 3*120*FLEN/8, x4, x1, x2)

inst_8569:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x628003ff; valaddr_reg:x3; val_offset:25707*0 + 3*120*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25707*0 + 3*121*FLEN/8, x4, x1, x2)

inst_8570:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x628007ff; valaddr_reg:x3; val_offset:25710*0 + 3*121*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25710*0 + 3*122*FLEN/8, x4, x1, x2)

inst_8571:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x62800fff; valaddr_reg:x3; val_offset:25713*0 + 3*122*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25713*0 + 3*123*FLEN/8, x4, x1, x2)

inst_8572:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x62801fff; valaddr_reg:x3; val_offset:25716*0 + 3*123*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25716*0 + 3*124*FLEN/8, x4, x1, x2)

inst_8573:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x62803fff; valaddr_reg:x3; val_offset:25719*0 + 3*124*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25719*0 + 3*125*FLEN/8, x4, x1, x2)

inst_8574:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x62807fff; valaddr_reg:x3; val_offset:25722*0 + 3*125*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25722*0 + 3*126*FLEN/8, x4, x1, x2)

inst_8575:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x6280ffff; valaddr_reg:x3; val_offset:25725*0 + 3*126*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25725*0 + 3*127*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_2)

inst_8576:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x6281ffff; valaddr_reg:x3; val_offset:25728*0 + 3*127*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25728*0 + 3*128*FLEN/8, x4, x1, x2)

inst_8577:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x6283ffff; valaddr_reg:x3; val_offset:25731*0 + 3*128*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25731*0 + 3*129*FLEN/8, x4, x1, x2)

inst_8578:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x6287ffff; valaddr_reg:x3; val_offset:25734*0 + 3*129*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25734*0 + 3*130*FLEN/8, x4, x1, x2)

inst_8579:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x628fffff; valaddr_reg:x3; val_offset:25737*0 + 3*130*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25737*0 + 3*131*FLEN/8, x4, x1, x2)

inst_8580:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x629fffff; valaddr_reg:x3; val_offset:25740*0 + 3*131*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25740*0 + 3*132*FLEN/8, x4, x1, x2)

inst_8581:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x62bfffff; valaddr_reg:x3; val_offset:25743*0 + 3*132*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25743*0 + 3*133*FLEN/8, x4, x1, x2)

inst_8582:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x62c00000; valaddr_reg:x3; val_offset:25746*0 + 3*133*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25746*0 + 3*134*FLEN/8, x4, x1, x2)

inst_8583:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x62e00000; valaddr_reg:x3; val_offset:25749*0 + 3*134*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25749*0 + 3*135*FLEN/8, x4, x1, x2)

inst_8584:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x62f00000; valaddr_reg:x3; val_offset:25752*0 + 3*135*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25752*0 + 3*136*FLEN/8, x4, x1, x2)

inst_8585:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x62f80000; valaddr_reg:x3; val_offset:25755*0 + 3*136*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25755*0 + 3*137*FLEN/8, x4, x1, x2)

inst_8586:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x62fc0000; valaddr_reg:x3; val_offset:25758*0 + 3*137*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25758*0 + 3*138*FLEN/8, x4, x1, x2)

inst_8587:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x62fe0000; valaddr_reg:x3; val_offset:25761*0 + 3*138*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25761*0 + 3*139*FLEN/8, x4, x1, x2)

inst_8588:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x62ff0000; valaddr_reg:x3; val_offset:25764*0 + 3*139*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25764*0 + 3*140*FLEN/8, x4, x1, x2)

inst_8589:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x62ff8000; valaddr_reg:x3; val_offset:25767*0 + 3*140*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25767*0 + 3*141*FLEN/8, x4, x1, x2)

inst_8590:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x62ffc000; valaddr_reg:x3; val_offset:25770*0 + 3*141*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25770*0 + 3*142*FLEN/8, x4, x1, x2)

inst_8591:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x62ffe000; valaddr_reg:x3; val_offset:25773*0 + 3*142*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25773*0 + 3*143*FLEN/8, x4, x1, x2)

inst_8592:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x62fff000; valaddr_reg:x3; val_offset:25776*0 + 3*143*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25776*0 + 3*144*FLEN/8, x4, x1, x2)

inst_8593:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x62fff800; valaddr_reg:x3; val_offset:25779*0 + 3*144*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25779*0 + 3*145*FLEN/8, x4, x1, x2)

inst_8594:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x62fffc00; valaddr_reg:x3; val_offset:25782*0 + 3*145*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25782*0 + 3*146*FLEN/8, x4, x1, x2)

inst_8595:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x62fffe00; valaddr_reg:x3; val_offset:25785*0 + 3*146*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25785*0 + 3*147*FLEN/8, x4, x1, x2)

inst_8596:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x62ffff00; valaddr_reg:x3; val_offset:25788*0 + 3*147*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25788*0 + 3*148*FLEN/8, x4, x1, x2)

inst_8597:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x62ffff80; valaddr_reg:x3; val_offset:25791*0 + 3*148*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25791*0 + 3*149*FLEN/8, x4, x1, x2)

inst_8598:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x62ffffc0; valaddr_reg:x3; val_offset:25794*0 + 3*149*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25794*0 + 3*150*FLEN/8, x4, x1, x2)

inst_8599:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x62ffffe0; valaddr_reg:x3; val_offset:25797*0 + 3*150*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25797*0 + 3*151*FLEN/8, x4, x1, x2)

inst_8600:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x62fffff0; valaddr_reg:x3; val_offset:25800*0 + 3*151*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25800*0 + 3*152*FLEN/8, x4, x1, x2)

inst_8601:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x62fffff8; valaddr_reg:x3; val_offset:25803*0 + 3*152*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25803*0 + 3*153*FLEN/8, x4, x1, x2)

inst_8602:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x62fffffc; valaddr_reg:x3; val_offset:25806*0 + 3*153*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25806*0 + 3*154*FLEN/8, x4, x1, x2)

inst_8603:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x62fffffe; valaddr_reg:x3; val_offset:25809*0 + 3*154*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25809*0 + 3*155*FLEN/8, x4, x1, x2)

inst_8604:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25d078 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25d078; op2val:0x0;
op3val:0x62ffffff; valaddr_reg:x3; val_offset:25812*0 + 3*155*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25812*0 + 3*156*FLEN/8, x4, x1, x2)

inst_8605:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x3; val_offset:25815*0 + 3*156*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25815*0 + 3*157*FLEN/8, x4, x1, x2)

inst_8606:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x3; val_offset:25818*0 + 3*157*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25818*0 + 3*158*FLEN/8, x4, x1, x2)

inst_8607:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x3; val_offset:25821*0 + 3*158*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25821*0 + 3*159*FLEN/8, x4, x1, x2)

inst_8608:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x3; val_offset:25824*0 + 3*159*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25824*0 + 3*160*FLEN/8, x4, x1, x2)

inst_8609:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x3; val_offset:25827*0 + 3*160*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25827*0 + 3*161*FLEN/8, x4, x1, x2)

inst_8610:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x3; val_offset:25830*0 + 3*161*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25830*0 + 3*162*FLEN/8, x4, x1, x2)

inst_8611:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x3; val_offset:25833*0 + 3*162*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25833*0 + 3*163*FLEN/8, x4, x1, x2)

inst_8612:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x3; val_offset:25836*0 + 3*163*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25836*0 + 3*164*FLEN/8, x4, x1, x2)

inst_8613:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x3; val_offset:25839*0 + 3*164*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25839*0 + 3*165*FLEN/8, x4, x1, x2)

inst_8614:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x3; val_offset:25842*0 + 3*165*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25842*0 + 3*166*FLEN/8, x4, x1, x2)

inst_8615:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x3; val_offset:25845*0 + 3*166*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25845*0 + 3*167*FLEN/8, x4, x1, x2)

inst_8616:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x3; val_offset:25848*0 + 3*167*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25848*0 + 3*168*FLEN/8, x4, x1, x2)

inst_8617:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x3; val_offset:25851*0 + 3*168*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25851*0 + 3*169*FLEN/8, x4, x1, x2)

inst_8618:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x3; val_offset:25854*0 + 3*169*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25854*0 + 3*170*FLEN/8, x4, x1, x2)

inst_8619:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x3; val_offset:25857*0 + 3*170*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25857*0 + 3*171*FLEN/8, x4, x1, x2)

inst_8620:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x3; val_offset:25860*0 + 3*171*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25860*0 + 3*172*FLEN/8, x4, x1, x2)

inst_8621:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x86000000; valaddr_reg:x3; val_offset:25863*0 + 3*172*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25863*0 + 3*173*FLEN/8, x4, x1, x2)

inst_8622:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x86000001; valaddr_reg:x3; val_offset:25866*0 + 3*173*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25866*0 + 3*174*FLEN/8, x4, x1, x2)

inst_8623:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x86000003; valaddr_reg:x3; val_offset:25869*0 + 3*174*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25869*0 + 3*175*FLEN/8, x4, x1, x2)

inst_8624:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x86000007; valaddr_reg:x3; val_offset:25872*0 + 3*175*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25872*0 + 3*176*FLEN/8, x4, x1, x2)

inst_8625:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x8600000f; valaddr_reg:x3; val_offset:25875*0 + 3*176*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25875*0 + 3*177*FLEN/8, x4, x1, x2)

inst_8626:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x8600001f; valaddr_reg:x3; val_offset:25878*0 + 3*177*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25878*0 + 3*178*FLEN/8, x4, x1, x2)

inst_8627:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x8600003f; valaddr_reg:x3; val_offset:25881*0 + 3*178*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25881*0 + 3*179*FLEN/8, x4, x1, x2)

inst_8628:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x8600007f; valaddr_reg:x3; val_offset:25884*0 + 3*179*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25884*0 + 3*180*FLEN/8, x4, x1, x2)

inst_8629:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x860000ff; valaddr_reg:x3; val_offset:25887*0 + 3*180*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25887*0 + 3*181*FLEN/8, x4, x1, x2)

inst_8630:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x860001ff; valaddr_reg:x3; val_offset:25890*0 + 3*181*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25890*0 + 3*182*FLEN/8, x4, x1, x2)

inst_8631:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x860003ff; valaddr_reg:x3; val_offset:25893*0 + 3*182*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25893*0 + 3*183*FLEN/8, x4, x1, x2)

inst_8632:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x860007ff; valaddr_reg:x3; val_offset:25896*0 + 3*183*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25896*0 + 3*184*FLEN/8, x4, x1, x2)

inst_8633:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x86000fff; valaddr_reg:x3; val_offset:25899*0 + 3*184*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25899*0 + 3*185*FLEN/8, x4, x1, x2)

inst_8634:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x86001fff; valaddr_reg:x3; val_offset:25902*0 + 3*185*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25902*0 + 3*186*FLEN/8, x4, x1, x2)

inst_8635:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x86003fff; valaddr_reg:x3; val_offset:25905*0 + 3*186*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25905*0 + 3*187*FLEN/8, x4, x1, x2)

inst_8636:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x86007fff; valaddr_reg:x3; val_offset:25908*0 + 3*187*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25908*0 + 3*188*FLEN/8, x4, x1, x2)

inst_8637:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x8600ffff; valaddr_reg:x3; val_offset:25911*0 + 3*188*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25911*0 + 3*189*FLEN/8, x4, x1, x2)

inst_8638:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x8601ffff; valaddr_reg:x3; val_offset:25914*0 + 3*189*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25914*0 + 3*190*FLEN/8, x4, x1, x2)

inst_8639:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x8603ffff; valaddr_reg:x3; val_offset:25917*0 + 3*190*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25917*0 + 3*191*FLEN/8, x4, x1, x2)

inst_8640:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x8607ffff; valaddr_reg:x3; val_offset:25920*0 + 3*191*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25920*0 + 3*192*FLEN/8, x4, x1, x2)

inst_8641:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x860fffff; valaddr_reg:x3; val_offset:25923*0 + 3*192*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25923*0 + 3*193*FLEN/8, x4, x1, x2)

inst_8642:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x861fffff; valaddr_reg:x3; val_offset:25926*0 + 3*193*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25926*0 + 3*194*FLEN/8, x4, x1, x2)

inst_8643:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x863fffff; valaddr_reg:x3; val_offset:25929*0 + 3*194*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25929*0 + 3*195*FLEN/8, x4, x1, x2)

inst_8644:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x86400000; valaddr_reg:x3; val_offset:25932*0 + 3*195*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25932*0 + 3*196*FLEN/8, x4, x1, x2)

inst_8645:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x86600000; valaddr_reg:x3; val_offset:25935*0 + 3*196*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25935*0 + 3*197*FLEN/8, x4, x1, x2)

inst_8646:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x86700000; valaddr_reg:x3; val_offset:25938*0 + 3*197*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25938*0 + 3*198*FLEN/8, x4, x1, x2)

inst_8647:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x86780000; valaddr_reg:x3; val_offset:25941*0 + 3*198*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25941*0 + 3*199*FLEN/8, x4, x1, x2)

inst_8648:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x867c0000; valaddr_reg:x3; val_offset:25944*0 + 3*199*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25944*0 + 3*200*FLEN/8, x4, x1, x2)

inst_8649:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x867e0000; valaddr_reg:x3; val_offset:25947*0 + 3*200*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25947*0 + 3*201*FLEN/8, x4, x1, x2)

inst_8650:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x867f0000; valaddr_reg:x3; val_offset:25950*0 + 3*201*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25950*0 + 3*202*FLEN/8, x4, x1, x2)

inst_8651:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x867f8000; valaddr_reg:x3; val_offset:25953*0 + 3*202*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25953*0 + 3*203*FLEN/8, x4, x1, x2)

inst_8652:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x867fc000; valaddr_reg:x3; val_offset:25956*0 + 3*203*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25956*0 + 3*204*FLEN/8, x4, x1, x2)

inst_8653:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x867fe000; valaddr_reg:x3; val_offset:25959*0 + 3*204*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25959*0 + 3*205*FLEN/8, x4, x1, x2)

inst_8654:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x867ff000; valaddr_reg:x3; val_offset:25962*0 + 3*205*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25962*0 + 3*206*FLEN/8, x4, x1, x2)

inst_8655:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x867ff800; valaddr_reg:x3; val_offset:25965*0 + 3*206*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25965*0 + 3*207*FLEN/8, x4, x1, x2)

inst_8656:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x867ffc00; valaddr_reg:x3; val_offset:25968*0 + 3*207*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25968*0 + 3*208*FLEN/8, x4, x1, x2)

inst_8657:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x867ffe00; valaddr_reg:x3; val_offset:25971*0 + 3*208*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25971*0 + 3*209*FLEN/8, x4, x1, x2)

inst_8658:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x867fff00; valaddr_reg:x3; val_offset:25974*0 + 3*209*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25974*0 + 3*210*FLEN/8, x4, x1, x2)

inst_8659:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x867fff80; valaddr_reg:x3; val_offset:25977*0 + 3*210*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25977*0 + 3*211*FLEN/8, x4, x1, x2)

inst_8660:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x867fffc0; valaddr_reg:x3; val_offset:25980*0 + 3*211*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25980*0 + 3*212*FLEN/8, x4, x1, x2)

inst_8661:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x867fffe0; valaddr_reg:x3; val_offset:25983*0 + 3*212*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25983*0 + 3*213*FLEN/8, x4, x1, x2)

inst_8662:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x867ffff0; valaddr_reg:x3; val_offset:25986*0 + 3*213*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25986*0 + 3*214*FLEN/8, x4, x1, x2)

inst_8663:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x867ffff8; valaddr_reg:x3; val_offset:25989*0 + 3*214*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25989*0 + 3*215*FLEN/8, x4, x1, x2)

inst_8664:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x867ffffc; valaddr_reg:x3; val_offset:25992*0 + 3*215*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25992*0 + 3*216*FLEN/8, x4, x1, x2)

inst_8665:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x867ffffe; valaddr_reg:x3; val_offset:25995*0 + 3*216*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25995*0 + 3*217*FLEN/8, x4, x1, x2)

inst_8666:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x264afa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e264afa; op2val:0x80000000;
op3val:0x867fffff; valaddr_reg:x3; val_offset:25998*0 + 3*217*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25998*0 + 3*218*FLEN/8, x4, x1, x2)

inst_8667:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb5800000; valaddr_reg:x3; val_offset:26001*0 + 3*218*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26001*0 + 3*219*FLEN/8, x4, x1, x2)

inst_8668:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb5800001; valaddr_reg:x3; val_offset:26004*0 + 3*219*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26004*0 + 3*220*FLEN/8, x4, x1, x2)

inst_8669:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb5800003; valaddr_reg:x3; val_offset:26007*0 + 3*220*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26007*0 + 3*221*FLEN/8, x4, x1, x2)

inst_8670:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb5800007; valaddr_reg:x3; val_offset:26010*0 + 3*221*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26010*0 + 3*222*FLEN/8, x4, x1, x2)

inst_8671:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb580000f; valaddr_reg:x3; val_offset:26013*0 + 3*222*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26013*0 + 3*223*FLEN/8, x4, x1, x2)

inst_8672:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb580001f; valaddr_reg:x3; val_offset:26016*0 + 3*223*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26016*0 + 3*224*FLEN/8, x4, x1, x2)

inst_8673:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb580003f; valaddr_reg:x3; val_offset:26019*0 + 3*224*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26019*0 + 3*225*FLEN/8, x4, x1, x2)

inst_8674:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb580007f; valaddr_reg:x3; val_offset:26022*0 + 3*225*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26022*0 + 3*226*FLEN/8, x4, x1, x2)

inst_8675:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb58000ff; valaddr_reg:x3; val_offset:26025*0 + 3*226*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26025*0 + 3*227*FLEN/8, x4, x1, x2)

inst_8676:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb58001ff; valaddr_reg:x3; val_offset:26028*0 + 3*227*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26028*0 + 3*228*FLEN/8, x4, x1, x2)

inst_8677:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb58003ff; valaddr_reg:x3; val_offset:26031*0 + 3*228*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26031*0 + 3*229*FLEN/8, x4, x1, x2)

inst_8678:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb58007ff; valaddr_reg:x3; val_offset:26034*0 + 3*229*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26034*0 + 3*230*FLEN/8, x4, x1, x2)

inst_8679:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb5800fff; valaddr_reg:x3; val_offset:26037*0 + 3*230*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26037*0 + 3*231*FLEN/8, x4, x1, x2)

inst_8680:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb5801fff; valaddr_reg:x3; val_offset:26040*0 + 3*231*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26040*0 + 3*232*FLEN/8, x4, x1, x2)

inst_8681:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb5803fff; valaddr_reg:x3; val_offset:26043*0 + 3*232*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26043*0 + 3*233*FLEN/8, x4, x1, x2)

inst_8682:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb5807fff; valaddr_reg:x3; val_offset:26046*0 + 3*233*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26046*0 + 3*234*FLEN/8, x4, x1, x2)

inst_8683:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb580ffff; valaddr_reg:x3; val_offset:26049*0 + 3*234*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26049*0 + 3*235*FLEN/8, x4, x1, x2)

inst_8684:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb581ffff; valaddr_reg:x3; val_offset:26052*0 + 3*235*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26052*0 + 3*236*FLEN/8, x4, x1, x2)

inst_8685:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb583ffff; valaddr_reg:x3; val_offset:26055*0 + 3*236*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26055*0 + 3*237*FLEN/8, x4, x1, x2)

inst_8686:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb587ffff; valaddr_reg:x3; val_offset:26058*0 + 3*237*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26058*0 + 3*238*FLEN/8, x4, x1, x2)

inst_8687:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb58fffff; valaddr_reg:x3; val_offset:26061*0 + 3*238*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26061*0 + 3*239*FLEN/8, x4, x1, x2)

inst_8688:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb59fffff; valaddr_reg:x3; val_offset:26064*0 + 3*239*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26064*0 + 3*240*FLEN/8, x4, x1, x2)

inst_8689:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb5bfffff; valaddr_reg:x3; val_offset:26067*0 + 3*240*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26067*0 + 3*241*FLEN/8, x4, x1, x2)

inst_8690:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb5c00000; valaddr_reg:x3; val_offset:26070*0 + 3*241*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26070*0 + 3*242*FLEN/8, x4, x1, x2)

inst_8691:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb5e00000; valaddr_reg:x3; val_offset:26073*0 + 3*242*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26073*0 + 3*243*FLEN/8, x4, x1, x2)

inst_8692:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb5f00000; valaddr_reg:x3; val_offset:26076*0 + 3*243*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26076*0 + 3*244*FLEN/8, x4, x1, x2)

inst_8693:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb5f80000; valaddr_reg:x3; val_offset:26079*0 + 3*244*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26079*0 + 3*245*FLEN/8, x4, x1, x2)

inst_8694:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb5fc0000; valaddr_reg:x3; val_offset:26082*0 + 3*245*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26082*0 + 3*246*FLEN/8, x4, x1, x2)

inst_8695:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb5fe0000; valaddr_reg:x3; val_offset:26085*0 + 3*246*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26085*0 + 3*247*FLEN/8, x4, x1, x2)

inst_8696:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb5ff0000; valaddr_reg:x3; val_offset:26088*0 + 3*247*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26088*0 + 3*248*FLEN/8, x4, x1, x2)

inst_8697:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb5ff8000; valaddr_reg:x3; val_offset:26091*0 + 3*248*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26091*0 + 3*249*FLEN/8, x4, x1, x2)

inst_8698:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb5ffc000; valaddr_reg:x3; val_offset:26094*0 + 3*249*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26094*0 + 3*250*FLEN/8, x4, x1, x2)

inst_8699:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb5ffe000; valaddr_reg:x3; val_offset:26097*0 + 3*250*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26097*0 + 3*251*FLEN/8, x4, x1, x2)

inst_8700:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb5fff000; valaddr_reg:x3; val_offset:26100*0 + 3*251*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26100*0 + 3*252*FLEN/8, x4, x1, x2)

inst_8701:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb5fff800; valaddr_reg:x3; val_offset:26103*0 + 3*252*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26103*0 + 3*253*FLEN/8, x4, x1, x2)

inst_8702:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb5fffc00; valaddr_reg:x3; val_offset:26106*0 + 3*253*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26106*0 + 3*254*FLEN/8, x4, x1, x2)

inst_8703:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb5fffe00; valaddr_reg:x3; val_offset:26109*0 + 3*254*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26109*0 + 3*255*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_3)

inst_8704:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb5ffff00; valaddr_reg:x3; val_offset:26112*0 + 3*256*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26112*0 + 3*256*FLEN/8, x4, x1, x2)

inst_8705:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb5ffff80; valaddr_reg:x3; val_offset:26115*0 + 3*257*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26115*0 + 3*257*FLEN/8, x4, x1, x2)

inst_8706:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb5ffffc0; valaddr_reg:x3; val_offset:26118*0 + 3*258*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26118*0 + 3*258*FLEN/8, x4, x1, x2)

inst_8707:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb5ffffe0; valaddr_reg:x3; val_offset:26121*0 + 3*259*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26121*0 + 3*259*FLEN/8, x4, x1, x2)

inst_8708:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb5fffff0; valaddr_reg:x3; val_offset:26124*0 + 3*260*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26124*0 + 3*260*FLEN/8, x4, x1, x2)

inst_8709:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb5fffff8; valaddr_reg:x3; val_offset:26127*0 + 3*261*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26127*0 + 3*261*FLEN/8, x4, x1, x2)

inst_8710:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb5fffffc; valaddr_reg:x3; val_offset:26130*0 + 3*262*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26130*0 + 3*262*FLEN/8, x4, x1, x2)

inst_8711:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb5fffffe; valaddr_reg:x3; val_offset:26133*0 + 3*263*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26133*0 + 3*263*FLEN/8, x4, x1, x2)

inst_8712:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xb5ffffff; valaddr_reg:x3; val_offset:26136*0 + 3*264*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26136*0 + 3*264*FLEN/8, x4, x1, x2)

inst_8713:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xbf800001; valaddr_reg:x3; val_offset:26139*0 + 3*265*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26139*0 + 3*265*FLEN/8, x4, x1, x2)

inst_8714:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xbf800003; valaddr_reg:x3; val_offset:26142*0 + 3*266*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26142*0 + 3*266*FLEN/8, x4, x1, x2)

inst_8715:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xbf800007; valaddr_reg:x3; val_offset:26145*0 + 3*267*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26145*0 + 3*267*FLEN/8, x4, x1, x2)

inst_8716:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xbf999999; valaddr_reg:x3; val_offset:26148*0 + 3*268*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26148*0 + 3*268*FLEN/8, x4, x1, x2)

inst_8717:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:26151*0 + 3*269*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26151*0 + 3*269*FLEN/8, x4, x1, x2)

inst_8718:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:26154*0 + 3*270*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26154*0 + 3*270*FLEN/8, x4, x1, x2)

inst_8719:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:26157*0 + 3*271*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26157*0 + 3*271*FLEN/8, x4, x1, x2)

inst_8720:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:26160*0 + 3*272*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26160*0 + 3*272*FLEN/8, x4, x1, x2)

inst_8721:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:26163*0 + 3*273*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26163*0 + 3*273*FLEN/8, x4, x1, x2)

inst_8722:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:26166*0 + 3*274*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26166*0 + 3*274*FLEN/8, x4, x1, x2)

inst_8723:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:26169*0 + 3*275*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26169*0 + 3*275*FLEN/8, x4, x1, x2)

inst_8724:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:26172*0 + 3*276*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26172*0 + 3*276*FLEN/8, x4, x1, x2)

inst_8725:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:26175*0 + 3*277*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26175*0 + 3*277*FLEN/8, x4, x1, x2)

inst_8726:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:26178*0 + 3*278*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26178*0 + 3*278*FLEN/8, x4, x1, x2)

inst_8727:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:26181*0 + 3*279*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26181*0 + 3*279*FLEN/8, x4, x1, x2)

inst_8728:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2851a5 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x42ad94 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2851a5; op2val:0x80c2ad94;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:26184*0 + 3*280*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26184*0 + 3*280*FLEN/8, x4, x1, x2)

inst_8729:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xef800000; valaddr_reg:x3; val_offset:26187*0 + 3*281*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26187*0 + 3*281*FLEN/8, x4, x1, x2)

inst_8730:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xef800001; valaddr_reg:x3; val_offset:26190*0 + 3*282*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26190*0 + 3*282*FLEN/8, x4, x1, x2)

inst_8731:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xef800003; valaddr_reg:x3; val_offset:26193*0 + 3*283*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26193*0 + 3*283*FLEN/8, x4, x1, x2)

inst_8732:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xef800007; valaddr_reg:x3; val_offset:26196*0 + 3*284*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26196*0 + 3*284*FLEN/8, x4, x1, x2)

inst_8733:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xef80000f; valaddr_reg:x3; val_offset:26199*0 + 3*285*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26199*0 + 3*285*FLEN/8, x4, x1, x2)

inst_8734:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xef80001f; valaddr_reg:x3; val_offset:26202*0 + 3*286*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26202*0 + 3*286*FLEN/8, x4, x1, x2)

inst_8735:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xef80003f; valaddr_reg:x3; val_offset:26205*0 + 3*287*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26205*0 + 3*287*FLEN/8, x4, x1, x2)

inst_8736:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xef80007f; valaddr_reg:x3; val_offset:26208*0 + 3*288*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26208*0 + 3*288*FLEN/8, x4, x1, x2)

inst_8737:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xef8000ff; valaddr_reg:x3; val_offset:26211*0 + 3*289*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26211*0 + 3*289*FLEN/8, x4, x1, x2)

inst_8738:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xef8001ff; valaddr_reg:x3; val_offset:26214*0 + 3*290*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26214*0 + 3*290*FLEN/8, x4, x1, x2)

inst_8739:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xef8003ff; valaddr_reg:x3; val_offset:26217*0 + 3*291*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26217*0 + 3*291*FLEN/8, x4, x1, x2)

inst_8740:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xef8007ff; valaddr_reg:x3; val_offset:26220*0 + 3*292*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26220*0 + 3*292*FLEN/8, x4, x1, x2)

inst_8741:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xef800fff; valaddr_reg:x3; val_offset:26223*0 + 3*293*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26223*0 + 3*293*FLEN/8, x4, x1, x2)

inst_8742:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xef801fff; valaddr_reg:x3; val_offset:26226*0 + 3*294*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26226*0 + 3*294*FLEN/8, x4, x1, x2)

inst_8743:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xef803fff; valaddr_reg:x3; val_offset:26229*0 + 3*295*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26229*0 + 3*295*FLEN/8, x4, x1, x2)

inst_8744:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xef807fff; valaddr_reg:x3; val_offset:26232*0 + 3*296*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26232*0 + 3*296*FLEN/8, x4, x1, x2)

inst_8745:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xef80ffff; valaddr_reg:x3; val_offset:26235*0 + 3*297*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26235*0 + 3*297*FLEN/8, x4, x1, x2)

inst_8746:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xef81ffff; valaddr_reg:x3; val_offset:26238*0 + 3*298*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26238*0 + 3*298*FLEN/8, x4, x1, x2)

inst_8747:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xef83ffff; valaddr_reg:x3; val_offset:26241*0 + 3*299*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26241*0 + 3*299*FLEN/8, x4, x1, x2)

inst_8748:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xef87ffff; valaddr_reg:x3; val_offset:26244*0 + 3*300*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26244*0 + 3*300*FLEN/8, x4, x1, x2)

inst_8749:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xef8fffff; valaddr_reg:x3; val_offset:26247*0 + 3*301*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26247*0 + 3*301*FLEN/8, x4, x1, x2)

inst_8750:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xef9fffff; valaddr_reg:x3; val_offset:26250*0 + 3*302*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26250*0 + 3*302*FLEN/8, x4, x1, x2)

inst_8751:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xefbfffff; valaddr_reg:x3; val_offset:26253*0 + 3*303*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26253*0 + 3*303*FLEN/8, x4, x1, x2)

inst_8752:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xefc00000; valaddr_reg:x3; val_offset:26256*0 + 3*304*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26256*0 + 3*304*FLEN/8, x4, x1, x2)

inst_8753:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xefe00000; valaddr_reg:x3; val_offset:26259*0 + 3*305*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26259*0 + 3*305*FLEN/8, x4, x1, x2)

inst_8754:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xeff00000; valaddr_reg:x3; val_offset:26262*0 + 3*306*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26262*0 + 3*306*FLEN/8, x4, x1, x2)

inst_8755:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xeff80000; valaddr_reg:x3; val_offset:26265*0 + 3*307*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26265*0 + 3*307*FLEN/8, x4, x1, x2)

inst_8756:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xeffc0000; valaddr_reg:x3; val_offset:26268*0 + 3*308*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26268*0 + 3*308*FLEN/8, x4, x1, x2)

inst_8757:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xeffe0000; valaddr_reg:x3; val_offset:26271*0 + 3*309*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26271*0 + 3*309*FLEN/8, x4, x1, x2)

inst_8758:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xefff0000; valaddr_reg:x3; val_offset:26274*0 + 3*310*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26274*0 + 3*310*FLEN/8, x4, x1, x2)

inst_8759:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xefff8000; valaddr_reg:x3; val_offset:26277*0 + 3*311*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26277*0 + 3*311*FLEN/8, x4, x1, x2)

inst_8760:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xefffc000; valaddr_reg:x3; val_offset:26280*0 + 3*312*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26280*0 + 3*312*FLEN/8, x4, x1, x2)

inst_8761:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xefffe000; valaddr_reg:x3; val_offset:26283*0 + 3*313*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26283*0 + 3*313*FLEN/8, x4, x1, x2)

inst_8762:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xeffff000; valaddr_reg:x3; val_offset:26286*0 + 3*314*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26286*0 + 3*314*FLEN/8, x4, x1, x2)

inst_8763:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xeffff800; valaddr_reg:x3; val_offset:26289*0 + 3*315*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26289*0 + 3*315*FLEN/8, x4, x1, x2)

inst_8764:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xeffffc00; valaddr_reg:x3; val_offset:26292*0 + 3*316*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26292*0 + 3*316*FLEN/8, x4, x1, x2)

inst_8765:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xeffffe00; valaddr_reg:x3; val_offset:26295*0 + 3*317*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26295*0 + 3*317*FLEN/8, x4, x1, x2)

inst_8766:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xefffff00; valaddr_reg:x3; val_offset:26298*0 + 3*318*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26298*0 + 3*318*FLEN/8, x4, x1, x2)

inst_8767:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xefffff80; valaddr_reg:x3; val_offset:26301*0 + 3*319*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26301*0 + 3*319*FLEN/8, x4, x1, x2)

inst_8768:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xefffffc0; valaddr_reg:x3; val_offset:26304*0 + 3*320*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26304*0 + 3*320*FLEN/8, x4, x1, x2)

inst_8769:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xefffffe0; valaddr_reg:x3; val_offset:26307*0 + 3*321*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26307*0 + 3*321*FLEN/8, x4, x1, x2)

inst_8770:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xeffffff0; valaddr_reg:x3; val_offset:26310*0 + 3*322*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26310*0 + 3*322*FLEN/8, x4, x1, x2)

inst_8771:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xeffffff8; valaddr_reg:x3; val_offset:26313*0 + 3*323*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26313*0 + 3*323*FLEN/8, x4, x1, x2)

inst_8772:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xeffffffc; valaddr_reg:x3; val_offset:26316*0 + 3*324*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26316*0 + 3*324*FLEN/8, x4, x1, x2)

inst_8773:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xeffffffe; valaddr_reg:x3; val_offset:26319*0 + 3*325*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26319*0 + 3*325*FLEN/8, x4, x1, x2)

inst_8774:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xefffffff; valaddr_reg:x3; val_offset:26322*0 + 3*326*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26322*0 + 3*326*FLEN/8, x4, x1, x2)

inst_8775:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xff000001; valaddr_reg:x3; val_offset:26325*0 + 3*327*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26325*0 + 3*327*FLEN/8, x4, x1, x2)

inst_8776:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xff000003; valaddr_reg:x3; val_offset:26328*0 + 3*328*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26328*0 + 3*328*FLEN/8, x4, x1, x2)

inst_8777:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xff000007; valaddr_reg:x3; val_offset:26331*0 + 3*329*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26331*0 + 3*329*FLEN/8, x4, x1, x2)

inst_8778:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xff199999; valaddr_reg:x3; val_offset:26334*0 + 3*330*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26334*0 + 3*330*FLEN/8, x4, x1, x2)

inst_8779:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xff249249; valaddr_reg:x3; val_offset:26337*0 + 3*331*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26337*0 + 3*331*FLEN/8, x4, x1, x2)

inst_8780:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xff333333; valaddr_reg:x3; val_offset:26340*0 + 3*332*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26340*0 + 3*332*FLEN/8, x4, x1, x2)

inst_8781:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xff36db6d; valaddr_reg:x3; val_offset:26343*0 + 3*333*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26343*0 + 3*333*FLEN/8, x4, x1, x2)

inst_8782:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:26346*0 + 3*334*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26346*0 + 3*334*FLEN/8, x4, x1, x2)

inst_8783:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xff444444; valaddr_reg:x3; val_offset:26349*0 + 3*335*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26349*0 + 3*335*FLEN/8, x4, x1, x2)

inst_8784:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xff4ccccc; valaddr_reg:x3; val_offset:26352*0 + 3*336*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26352*0 + 3*336*FLEN/8, x4, x1, x2)

inst_8785:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xff5b6db6; valaddr_reg:x3; val_offset:26355*0 + 3*337*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26355*0 + 3*337*FLEN/8, x4, x1, x2)

inst_8786:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xff666666; valaddr_reg:x3; val_offset:26358*0 + 3*338*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26358*0 + 3*338*FLEN/8, x4, x1, x2)

inst_8787:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xff6db6db; valaddr_reg:x3; val_offset:26361*0 + 3*339*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26361*0 + 3*339*FLEN/8, x4, x1, x2)

inst_8788:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xff7ffff8; valaddr_reg:x3; val_offset:26364*0 + 3*340*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26364*0 + 3*340*FLEN/8, x4, x1, x2)

inst_8789:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xff7ffffc; valaddr_reg:x3; val_offset:26367*0 + 3*341*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26367*0 + 3*341*FLEN/8, x4, x1, x2)

inst_8790:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2c70b2 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3e0677 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2c70b2; op2val:0xc0be0677;
op3val:0xff7ffffe; valaddr_reg:x3; val_offset:26370*0 + 3*342*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26370*0 + 3*342*FLEN/8, x4, x1, x2)

inst_8791:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x3f800001; valaddr_reg:x3; val_offset:26373*0 + 3*343*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26373*0 + 3*343*FLEN/8, x4, x1, x2)

inst_8792:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x3f800003; valaddr_reg:x3; val_offset:26376*0 + 3*344*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26376*0 + 3*344*FLEN/8, x4, x1, x2)

inst_8793:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x3f800007; valaddr_reg:x3; val_offset:26379*0 + 3*345*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26379*0 + 3*345*FLEN/8, x4, x1, x2)

inst_8794:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x3f999999; valaddr_reg:x3; val_offset:26382*0 + 3*346*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26382*0 + 3*346*FLEN/8, x4, x1, x2)

inst_8795:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x3fa49249; valaddr_reg:x3; val_offset:26385*0 + 3*347*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26385*0 + 3*347*FLEN/8, x4, x1, x2)

inst_8796:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x3fb33333; valaddr_reg:x3; val_offset:26388*0 + 3*348*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26388*0 + 3*348*FLEN/8, x4, x1, x2)

inst_8797:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:26391*0 + 3*349*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26391*0 + 3*349*FLEN/8, x4, x1, x2)

inst_8798:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:26394*0 + 3*350*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26394*0 + 3*350*FLEN/8, x4, x1, x2)

inst_8799:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x3fc44444; valaddr_reg:x3; val_offset:26397*0 + 3*351*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26397*0 + 3*351*FLEN/8, x4, x1, x2)

inst_8800:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x3fcccccc; valaddr_reg:x3; val_offset:26400*0 + 3*352*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26400*0 + 3*352*FLEN/8, x4, x1, x2)

inst_8801:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:26403*0 + 3*353*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26403*0 + 3*353*FLEN/8, x4, x1, x2)

inst_8802:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x3fe66666; valaddr_reg:x3; val_offset:26406*0 + 3*354*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26406*0 + 3*354*FLEN/8, x4, x1, x2)

inst_8803:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x3fedb6db; valaddr_reg:x3; val_offset:26409*0 + 3*355*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26409*0 + 3*355*FLEN/8, x4, x1, x2)

inst_8804:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x3ffffff8; valaddr_reg:x3; val_offset:26412*0 + 3*356*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26412*0 + 3*356*FLEN/8, x4, x1, x2)

inst_8805:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x3ffffffc; valaddr_reg:x3; val_offset:26415*0 + 3*357*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26415*0 + 3*357*FLEN/8, x4, x1, x2)

inst_8806:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x3ffffffe; valaddr_reg:x3; val_offset:26418*0 + 3*358*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26418*0 + 3*358*FLEN/8, x4, x1, x2)

inst_8807:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4b800000; valaddr_reg:x3; val_offset:26421*0 + 3*359*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26421*0 + 3*359*FLEN/8, x4, x1, x2)

inst_8808:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4b800001; valaddr_reg:x3; val_offset:26424*0 + 3*360*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26424*0 + 3*360*FLEN/8, x4, x1, x2)

inst_8809:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4b800003; valaddr_reg:x3; val_offset:26427*0 + 3*361*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26427*0 + 3*361*FLEN/8, x4, x1, x2)

inst_8810:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4b800007; valaddr_reg:x3; val_offset:26430*0 + 3*362*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26430*0 + 3*362*FLEN/8, x4, x1, x2)

inst_8811:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4b80000f; valaddr_reg:x3; val_offset:26433*0 + 3*363*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26433*0 + 3*363*FLEN/8, x4, x1, x2)

inst_8812:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4b80001f; valaddr_reg:x3; val_offset:26436*0 + 3*364*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26436*0 + 3*364*FLEN/8, x4, x1, x2)

inst_8813:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4b80003f; valaddr_reg:x3; val_offset:26439*0 + 3*365*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26439*0 + 3*365*FLEN/8, x4, x1, x2)

inst_8814:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4b80007f; valaddr_reg:x3; val_offset:26442*0 + 3*366*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26442*0 + 3*366*FLEN/8, x4, x1, x2)

inst_8815:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4b8000ff; valaddr_reg:x3; val_offset:26445*0 + 3*367*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26445*0 + 3*367*FLEN/8, x4, x1, x2)

inst_8816:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4b8001ff; valaddr_reg:x3; val_offset:26448*0 + 3*368*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26448*0 + 3*368*FLEN/8, x4, x1, x2)

inst_8817:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4b8003ff; valaddr_reg:x3; val_offset:26451*0 + 3*369*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26451*0 + 3*369*FLEN/8, x4, x1, x2)

inst_8818:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4b8007ff; valaddr_reg:x3; val_offset:26454*0 + 3*370*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26454*0 + 3*370*FLEN/8, x4, x1, x2)

inst_8819:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4b800fff; valaddr_reg:x3; val_offset:26457*0 + 3*371*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26457*0 + 3*371*FLEN/8, x4, x1, x2)

inst_8820:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4b801fff; valaddr_reg:x3; val_offset:26460*0 + 3*372*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26460*0 + 3*372*FLEN/8, x4, x1, x2)

inst_8821:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4b803fff; valaddr_reg:x3; val_offset:26463*0 + 3*373*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26463*0 + 3*373*FLEN/8, x4, x1, x2)

inst_8822:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4b807fff; valaddr_reg:x3; val_offset:26466*0 + 3*374*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26466*0 + 3*374*FLEN/8, x4, x1, x2)

inst_8823:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4b80ffff; valaddr_reg:x3; val_offset:26469*0 + 3*375*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26469*0 + 3*375*FLEN/8, x4, x1, x2)

inst_8824:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4b81ffff; valaddr_reg:x3; val_offset:26472*0 + 3*376*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26472*0 + 3*376*FLEN/8, x4, x1, x2)

inst_8825:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4b83ffff; valaddr_reg:x3; val_offset:26475*0 + 3*377*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26475*0 + 3*377*FLEN/8, x4, x1, x2)

inst_8826:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4b87ffff; valaddr_reg:x3; val_offset:26478*0 + 3*378*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26478*0 + 3*378*FLEN/8, x4, x1, x2)

inst_8827:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4b8fffff; valaddr_reg:x3; val_offset:26481*0 + 3*379*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26481*0 + 3*379*FLEN/8, x4, x1, x2)

inst_8828:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4b9fffff; valaddr_reg:x3; val_offset:26484*0 + 3*380*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26484*0 + 3*380*FLEN/8, x4, x1, x2)

inst_8829:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4bbfffff; valaddr_reg:x3; val_offset:26487*0 + 3*381*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26487*0 + 3*381*FLEN/8, x4, x1, x2)

inst_8830:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4bc00000; valaddr_reg:x3; val_offset:26490*0 + 3*382*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26490*0 + 3*382*FLEN/8, x4, x1, x2)

inst_8831:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4be00000; valaddr_reg:x3; val_offset:26493*0 + 3*383*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26493*0 + 3*383*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_4)

inst_8832:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4bf00000; valaddr_reg:x3; val_offset:26496*0 + 3*384*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26496*0 + 3*384*FLEN/8, x4, x1, x2)

inst_8833:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4bf80000; valaddr_reg:x3; val_offset:26499*0 + 3*385*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26499*0 + 3*385*FLEN/8, x4, x1, x2)

inst_8834:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4bfc0000; valaddr_reg:x3; val_offset:26502*0 + 3*386*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26502*0 + 3*386*FLEN/8, x4, x1, x2)

inst_8835:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4bfe0000; valaddr_reg:x3; val_offset:26505*0 + 3*387*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26505*0 + 3*387*FLEN/8, x4, x1, x2)

inst_8836:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4bff0000; valaddr_reg:x3; val_offset:26508*0 + 3*388*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26508*0 + 3*388*FLEN/8, x4, x1, x2)

inst_8837:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4bff8000; valaddr_reg:x3; val_offset:26511*0 + 3*389*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26511*0 + 3*389*FLEN/8, x4, x1, x2)

inst_8838:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4bffc000; valaddr_reg:x3; val_offset:26514*0 + 3*390*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26514*0 + 3*390*FLEN/8, x4, x1, x2)

inst_8839:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4bffe000; valaddr_reg:x3; val_offset:26517*0 + 3*391*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26517*0 + 3*391*FLEN/8, x4, x1, x2)

inst_8840:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4bfff000; valaddr_reg:x3; val_offset:26520*0 + 3*392*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26520*0 + 3*392*FLEN/8, x4, x1, x2)

inst_8841:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4bfff800; valaddr_reg:x3; val_offset:26523*0 + 3*393*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26523*0 + 3*393*FLEN/8, x4, x1, x2)

inst_8842:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4bfffc00; valaddr_reg:x3; val_offset:26526*0 + 3*394*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26526*0 + 3*394*FLEN/8, x4, x1, x2)

inst_8843:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4bfffe00; valaddr_reg:x3; val_offset:26529*0 + 3*395*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26529*0 + 3*395*FLEN/8, x4, x1, x2)

inst_8844:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4bffff00; valaddr_reg:x3; val_offset:26532*0 + 3*396*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26532*0 + 3*396*FLEN/8, x4, x1, x2)

inst_8845:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4bffff80; valaddr_reg:x3; val_offset:26535*0 + 3*397*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26535*0 + 3*397*FLEN/8, x4, x1, x2)

inst_8846:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4bffffc0; valaddr_reg:x3; val_offset:26538*0 + 3*398*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26538*0 + 3*398*FLEN/8, x4, x1, x2)

inst_8847:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4bffffe0; valaddr_reg:x3; val_offset:26541*0 + 3*399*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26541*0 + 3*399*FLEN/8, x4, x1, x2)

inst_8848:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4bfffff0; valaddr_reg:x3; val_offset:26544*0 + 3*400*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26544*0 + 3*400*FLEN/8, x4, x1, x2)

inst_8849:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4bfffff8; valaddr_reg:x3; val_offset:26547*0 + 3*401*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26547*0 + 3*401*FLEN/8, x4, x1, x2)

inst_8850:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4bfffffc; valaddr_reg:x3; val_offset:26550*0 + 3*402*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26550*0 + 3*402*FLEN/8, x4, x1, x2)

inst_8851:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4bfffffe; valaddr_reg:x3; val_offset:26553*0 + 3*403*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26553*0 + 3*403*FLEN/8, x4, x1, x2)

inst_8852:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2f4293 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3af7c5 and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2f4293; op2val:0xbaf7c5;
op3val:0x4bffffff; valaddr_reg:x3; val_offset:26556*0 + 3*404*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26556*0 + 3*404*FLEN/8, x4, x1, x2)

inst_8853:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x3f800001; valaddr_reg:x3; val_offset:26559*0 + 3*405*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26559*0 + 3*405*FLEN/8, x4, x1, x2)

inst_8854:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x3f800003; valaddr_reg:x3; val_offset:26562*0 + 3*406*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26562*0 + 3*406*FLEN/8, x4, x1, x2)

inst_8855:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x3f800007; valaddr_reg:x3; val_offset:26565*0 + 3*407*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26565*0 + 3*407*FLEN/8, x4, x1, x2)

inst_8856:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x3f999999; valaddr_reg:x3; val_offset:26568*0 + 3*408*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26568*0 + 3*408*FLEN/8, x4, x1, x2)

inst_8857:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x3fa49249; valaddr_reg:x3; val_offset:26571*0 + 3*409*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26571*0 + 3*409*FLEN/8, x4, x1, x2)

inst_8858:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x3fb33333; valaddr_reg:x3; val_offset:26574*0 + 3*410*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26574*0 + 3*410*FLEN/8, x4, x1, x2)

inst_8859:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:26577*0 + 3*411*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26577*0 + 3*411*FLEN/8, x4, x1, x2)

inst_8860:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:26580*0 + 3*412*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26580*0 + 3*412*FLEN/8, x4, x1, x2)

inst_8861:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x3fc44444; valaddr_reg:x3; val_offset:26583*0 + 3*413*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26583*0 + 3*413*FLEN/8, x4, x1, x2)

inst_8862:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x3fcccccc; valaddr_reg:x3; val_offset:26586*0 + 3*414*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26586*0 + 3*414*FLEN/8, x4, x1, x2)

inst_8863:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:26589*0 + 3*415*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26589*0 + 3*415*FLEN/8, x4, x1, x2)

inst_8864:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x3fe66666; valaddr_reg:x3; val_offset:26592*0 + 3*416*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26592*0 + 3*416*FLEN/8, x4, x1, x2)

inst_8865:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x3fedb6db; valaddr_reg:x3; val_offset:26595*0 + 3*417*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26595*0 + 3*417*FLEN/8, x4, x1, x2)

inst_8866:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x3ffffff8; valaddr_reg:x3; val_offset:26598*0 + 3*418*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26598*0 + 3*418*FLEN/8, x4, x1, x2)

inst_8867:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x3ffffffc; valaddr_reg:x3; val_offset:26601*0 + 3*419*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26601*0 + 3*419*FLEN/8, x4, x1, x2)

inst_8868:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x3ffffffe; valaddr_reg:x3; val_offset:26604*0 + 3*420*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26604*0 + 3*420*FLEN/8, x4, x1, x2)

inst_8869:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x47800000; valaddr_reg:x3; val_offset:26607*0 + 3*421*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26607*0 + 3*421*FLEN/8, x4, x1, x2)

inst_8870:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x47800001; valaddr_reg:x3; val_offset:26610*0 + 3*422*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26610*0 + 3*422*FLEN/8, x4, x1, x2)

inst_8871:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x47800003; valaddr_reg:x3; val_offset:26613*0 + 3*423*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26613*0 + 3*423*FLEN/8, x4, x1, x2)

inst_8872:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x47800007; valaddr_reg:x3; val_offset:26616*0 + 3*424*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26616*0 + 3*424*FLEN/8, x4, x1, x2)

inst_8873:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x4780000f; valaddr_reg:x3; val_offset:26619*0 + 3*425*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26619*0 + 3*425*FLEN/8, x4, x1, x2)

inst_8874:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x4780001f; valaddr_reg:x3; val_offset:26622*0 + 3*426*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26622*0 + 3*426*FLEN/8, x4, x1, x2)

inst_8875:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x4780003f; valaddr_reg:x3; val_offset:26625*0 + 3*427*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26625*0 + 3*427*FLEN/8, x4, x1, x2)

inst_8876:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x4780007f; valaddr_reg:x3; val_offset:26628*0 + 3*428*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26628*0 + 3*428*FLEN/8, x4, x1, x2)

inst_8877:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x478000ff; valaddr_reg:x3; val_offset:26631*0 + 3*429*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26631*0 + 3*429*FLEN/8, x4, x1, x2)

inst_8878:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x478001ff; valaddr_reg:x3; val_offset:26634*0 + 3*430*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26634*0 + 3*430*FLEN/8, x4, x1, x2)

inst_8879:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x478003ff; valaddr_reg:x3; val_offset:26637*0 + 3*431*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26637*0 + 3*431*FLEN/8, x4, x1, x2)

inst_8880:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x478007ff; valaddr_reg:x3; val_offset:26640*0 + 3*432*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26640*0 + 3*432*FLEN/8, x4, x1, x2)

inst_8881:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x47800fff; valaddr_reg:x3; val_offset:26643*0 + 3*433*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26643*0 + 3*433*FLEN/8, x4, x1, x2)

inst_8882:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x47801fff; valaddr_reg:x3; val_offset:26646*0 + 3*434*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26646*0 + 3*434*FLEN/8, x4, x1, x2)

inst_8883:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x47803fff; valaddr_reg:x3; val_offset:26649*0 + 3*435*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26649*0 + 3*435*FLEN/8, x4, x1, x2)

inst_8884:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x47807fff; valaddr_reg:x3; val_offset:26652*0 + 3*436*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26652*0 + 3*436*FLEN/8, x4, x1, x2)

inst_8885:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x4780ffff; valaddr_reg:x3; val_offset:26655*0 + 3*437*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26655*0 + 3*437*FLEN/8, x4, x1, x2)

inst_8886:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x4781ffff; valaddr_reg:x3; val_offset:26658*0 + 3*438*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26658*0 + 3*438*FLEN/8, x4, x1, x2)

inst_8887:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x4783ffff; valaddr_reg:x3; val_offset:26661*0 + 3*439*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26661*0 + 3*439*FLEN/8, x4, x1, x2)

inst_8888:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x4787ffff; valaddr_reg:x3; val_offset:26664*0 + 3*440*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26664*0 + 3*440*FLEN/8, x4, x1, x2)

inst_8889:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x478fffff; valaddr_reg:x3; val_offset:26667*0 + 3*441*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26667*0 + 3*441*FLEN/8, x4, x1, x2)

inst_8890:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x479fffff; valaddr_reg:x3; val_offset:26670*0 + 3*442*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26670*0 + 3*442*FLEN/8, x4, x1, x2)

inst_8891:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x47bfffff; valaddr_reg:x3; val_offset:26673*0 + 3*443*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26673*0 + 3*443*FLEN/8, x4, x1, x2)

inst_8892:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x47c00000; valaddr_reg:x3; val_offset:26676*0 + 3*444*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26676*0 + 3*444*FLEN/8, x4, x1, x2)

inst_8893:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x47e00000; valaddr_reg:x3; val_offset:26679*0 + 3*445*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26679*0 + 3*445*FLEN/8, x4, x1, x2)

inst_8894:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x47f00000; valaddr_reg:x3; val_offset:26682*0 + 3*446*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26682*0 + 3*446*FLEN/8, x4, x1, x2)

inst_8895:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x47f80000; valaddr_reg:x3; val_offset:26685*0 + 3*447*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26685*0 + 3*447*FLEN/8, x4, x1, x2)

inst_8896:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x47fc0000; valaddr_reg:x3; val_offset:26688*0 + 3*448*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26688*0 + 3*448*FLEN/8, x4, x1, x2)

inst_8897:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x47fe0000; valaddr_reg:x3; val_offset:26691*0 + 3*449*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26691*0 + 3*449*FLEN/8, x4, x1, x2)

inst_8898:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x47ff0000; valaddr_reg:x3; val_offset:26694*0 + 3*450*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26694*0 + 3*450*FLEN/8, x4, x1, x2)

inst_8899:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x47ff8000; valaddr_reg:x3; val_offset:26697*0 + 3*451*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26697*0 + 3*451*FLEN/8, x4, x1, x2)

inst_8900:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x47ffc000; valaddr_reg:x3; val_offset:26700*0 + 3*452*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26700*0 + 3*452*FLEN/8, x4, x1, x2)

inst_8901:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x47ffe000; valaddr_reg:x3; val_offset:26703*0 + 3*453*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26703*0 + 3*453*FLEN/8, x4, x1, x2)

inst_8902:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x47fff000; valaddr_reg:x3; val_offset:26706*0 + 3*454*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26706*0 + 3*454*FLEN/8, x4, x1, x2)

inst_8903:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x47fff800; valaddr_reg:x3; val_offset:26709*0 + 3*455*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26709*0 + 3*455*FLEN/8, x4, x1, x2)

inst_8904:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x47fffc00; valaddr_reg:x3; val_offset:26712*0 + 3*456*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26712*0 + 3*456*FLEN/8, x4, x1, x2)

inst_8905:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x47fffe00; valaddr_reg:x3; val_offset:26715*0 + 3*457*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26715*0 + 3*457*FLEN/8, x4, x1, x2)

inst_8906:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x47ffff00; valaddr_reg:x3; val_offset:26718*0 + 3*458*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26718*0 + 3*458*FLEN/8, x4, x1, x2)

inst_8907:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x47ffff80; valaddr_reg:x3; val_offset:26721*0 + 3*459*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26721*0 + 3*459*FLEN/8, x4, x1, x2)

inst_8908:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x47ffffc0; valaddr_reg:x3; val_offset:26724*0 + 3*460*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26724*0 + 3*460*FLEN/8, x4, x1, x2)

inst_8909:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x47ffffe0; valaddr_reg:x3; val_offset:26727*0 + 3*461*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26727*0 + 3*461*FLEN/8, x4, x1, x2)

inst_8910:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x47fffff0; valaddr_reg:x3; val_offset:26730*0 + 3*462*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26730*0 + 3*462*FLEN/8, x4, x1, x2)

inst_8911:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x47fffff8; valaddr_reg:x3; val_offset:26733*0 + 3*463*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26733*0 + 3*463*FLEN/8, x4, x1, x2)

inst_8912:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x47fffffc; valaddr_reg:x3; val_offset:26736*0 + 3*464*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26736*0 + 3*464*FLEN/8, x4, x1, x2)

inst_8913:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x47fffffe; valaddr_reg:x3; val_offset:26739*0 + 3*465*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26739*0 + 3*465*FLEN/8, x4, x1, x2)

inst_8914:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e93d and fs2 == 0 and fe2 == 0x01 and fm2 == 0x382e90 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e31e93d; op2val:0xb82e90;
op3val:0x47ffffff; valaddr_reg:x3; val_offset:26742*0 + 3*466*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26742*0 + 3*466*FLEN/8, x4, x1, x2)

inst_8915:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x3; val_offset:26745*0 + 3*467*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26745*0 + 3*467*FLEN/8, x4, x1, x2)

inst_8916:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x3; val_offset:26748*0 + 3*468*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26748*0 + 3*468*FLEN/8, x4, x1, x2)

inst_8917:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x3; val_offset:26751*0 + 3*469*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26751*0 + 3*469*FLEN/8, x4, x1, x2)

inst_8918:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x3; val_offset:26754*0 + 3*470*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26754*0 + 3*470*FLEN/8, x4, x1, x2)

inst_8919:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x3; val_offset:26757*0 + 3*471*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26757*0 + 3*471*FLEN/8, x4, x1, x2)

inst_8920:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x3; val_offset:26760*0 + 3*472*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26760*0 + 3*472*FLEN/8, x4, x1, x2)

inst_8921:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x3; val_offset:26763*0 + 3*473*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26763*0 + 3*473*FLEN/8, x4, x1, x2)

inst_8922:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x3; val_offset:26766*0 + 3*474*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26766*0 + 3*474*FLEN/8, x4, x1, x2)

inst_8923:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x3; val_offset:26769*0 + 3*475*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26769*0 + 3*475*FLEN/8, x4, x1, x2)

inst_8924:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x3; val_offset:26772*0 + 3*476*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26772*0 + 3*476*FLEN/8, x4, x1, x2)

inst_8925:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x3; val_offset:26775*0 + 3*477*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26775*0 + 3*477*FLEN/8, x4, x1, x2)

inst_8926:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x3; val_offset:26778*0 + 3*478*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26778*0 + 3*478*FLEN/8, x4, x1, x2)

inst_8927:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x3; val_offset:26781*0 + 3*479*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26781*0 + 3*479*FLEN/8, x4, x1, x2)

inst_8928:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x3; val_offset:26784*0 + 3*480*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26784*0 + 3*480*FLEN/8, x4, x1, x2)

inst_8929:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x3; val_offset:26787*0 + 3*481*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26787*0 + 3*481*FLEN/8, x4, x1, x2)

inst_8930:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x3; val_offset:26790*0 + 3*482*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26790*0 + 3*482*FLEN/8, x4, x1, x2)

inst_8931:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x89000000; valaddr_reg:x3; val_offset:26793*0 + 3*483*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26793*0 + 3*483*FLEN/8, x4, x1, x2)

inst_8932:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x89000001; valaddr_reg:x3; val_offset:26796*0 + 3*484*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26796*0 + 3*484*FLEN/8, x4, x1, x2)

inst_8933:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x89000003; valaddr_reg:x3; val_offset:26799*0 + 3*485*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26799*0 + 3*485*FLEN/8, x4, x1, x2)

inst_8934:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x89000007; valaddr_reg:x3; val_offset:26802*0 + 3*486*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26802*0 + 3*486*FLEN/8, x4, x1, x2)

inst_8935:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x8900000f; valaddr_reg:x3; val_offset:26805*0 + 3*487*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26805*0 + 3*487*FLEN/8, x4, x1, x2)

inst_8936:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x8900001f; valaddr_reg:x3; val_offset:26808*0 + 3*488*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26808*0 + 3*488*FLEN/8, x4, x1, x2)

inst_8937:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x8900003f; valaddr_reg:x3; val_offset:26811*0 + 3*489*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26811*0 + 3*489*FLEN/8, x4, x1, x2)

inst_8938:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x8900007f; valaddr_reg:x3; val_offset:26814*0 + 3*490*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26814*0 + 3*490*FLEN/8, x4, x1, x2)

inst_8939:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x890000ff; valaddr_reg:x3; val_offset:26817*0 + 3*491*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26817*0 + 3*491*FLEN/8, x4, x1, x2)

inst_8940:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x890001ff; valaddr_reg:x3; val_offset:26820*0 + 3*492*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26820*0 + 3*492*FLEN/8, x4, x1, x2)

inst_8941:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x890003ff; valaddr_reg:x3; val_offset:26823*0 + 3*493*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26823*0 + 3*493*FLEN/8, x4, x1, x2)

inst_8942:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x890007ff; valaddr_reg:x3; val_offset:26826*0 + 3*494*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26826*0 + 3*494*FLEN/8, x4, x1, x2)

inst_8943:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x89000fff; valaddr_reg:x3; val_offset:26829*0 + 3*495*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26829*0 + 3*495*FLEN/8, x4, x1, x2)

inst_8944:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x89001fff; valaddr_reg:x3; val_offset:26832*0 + 3*496*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26832*0 + 3*496*FLEN/8, x4, x1, x2)

inst_8945:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x89003fff; valaddr_reg:x3; val_offset:26835*0 + 3*497*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26835*0 + 3*497*FLEN/8, x4, x1, x2)

inst_8946:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x89007fff; valaddr_reg:x3; val_offset:26838*0 + 3*498*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26838*0 + 3*498*FLEN/8, x4, x1, x2)

inst_8947:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x8900ffff; valaddr_reg:x3; val_offset:26841*0 + 3*499*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26841*0 + 3*499*FLEN/8, x4, x1, x2)

inst_8948:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x8901ffff; valaddr_reg:x3; val_offset:26844*0 + 3*500*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26844*0 + 3*500*FLEN/8, x4, x1, x2)

inst_8949:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x8903ffff; valaddr_reg:x3; val_offset:26847*0 + 3*501*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26847*0 + 3*501*FLEN/8, x4, x1, x2)

inst_8950:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x8907ffff; valaddr_reg:x3; val_offset:26850*0 + 3*502*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26850*0 + 3*502*FLEN/8, x4, x1, x2)

inst_8951:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x890fffff; valaddr_reg:x3; val_offset:26853*0 + 3*503*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26853*0 + 3*503*FLEN/8, x4, x1, x2)

inst_8952:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x891fffff; valaddr_reg:x3; val_offset:26856*0 + 3*504*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26856*0 + 3*504*FLEN/8, x4, x1, x2)

inst_8953:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x893fffff; valaddr_reg:x3; val_offset:26859*0 + 3*505*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26859*0 + 3*505*FLEN/8, x4, x1, x2)

inst_8954:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x89400000; valaddr_reg:x3; val_offset:26862*0 + 3*506*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26862*0 + 3*506*FLEN/8, x4, x1, x2)

inst_8955:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x89600000; valaddr_reg:x3; val_offset:26865*0 + 3*507*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26865*0 + 3*507*FLEN/8, x4, x1, x2)

inst_8956:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x89700000; valaddr_reg:x3; val_offset:26868*0 + 3*508*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26868*0 + 3*508*FLEN/8, x4, x1, x2)

inst_8957:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x89780000; valaddr_reg:x3; val_offset:26871*0 + 3*509*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26871*0 + 3*509*FLEN/8, x4, x1, x2)

inst_8958:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x897c0000; valaddr_reg:x3; val_offset:26874*0 + 3*510*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26874*0 + 3*510*FLEN/8, x4, x1, x2)

inst_8959:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x897e0000; valaddr_reg:x3; val_offset:26877*0 + 3*511*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26877*0 + 3*511*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_5)

inst_8960:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x897f0000; valaddr_reg:x3; val_offset:26880*0 + 3*512*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26880*0 + 3*512*FLEN/8, x4, x1, x2)

inst_8961:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x897f8000; valaddr_reg:x3; val_offset:26883*0 + 3*513*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26883*0 + 3*513*FLEN/8, x4, x1, x2)

inst_8962:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x897fc000; valaddr_reg:x3; val_offset:26886*0 + 3*514*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26886*0 + 3*514*FLEN/8, x4, x1, x2)

inst_8963:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x897fe000; valaddr_reg:x3; val_offset:26889*0 + 3*515*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26889*0 + 3*515*FLEN/8, x4, x1, x2)

inst_8964:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x897ff000; valaddr_reg:x3; val_offset:26892*0 + 3*516*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26892*0 + 3*516*FLEN/8, x4, x1, x2)

inst_8965:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x897ff800; valaddr_reg:x3; val_offset:26895*0 + 3*517*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26895*0 + 3*517*FLEN/8, x4, x1, x2)

inst_8966:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x897ffc00; valaddr_reg:x3; val_offset:26898*0 + 3*518*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26898*0 + 3*518*FLEN/8, x4, x1, x2)

inst_8967:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x897ffe00; valaddr_reg:x3; val_offset:26901*0 + 3*519*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26901*0 + 3*519*FLEN/8, x4, x1, x2)

inst_8968:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x897fff00; valaddr_reg:x3; val_offset:26904*0 + 3*520*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26904*0 + 3*520*FLEN/8, x4, x1, x2)

inst_8969:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x897fff80; valaddr_reg:x3; val_offset:26907*0 + 3*521*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26907*0 + 3*521*FLEN/8, x4, x1, x2)

inst_8970:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x897fffc0; valaddr_reg:x3; val_offset:26910*0 + 3*522*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26910*0 + 3*522*FLEN/8, x4, x1, x2)

inst_8971:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x897fffe0; valaddr_reg:x3; val_offset:26913*0 + 3*523*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26913*0 + 3*523*FLEN/8, x4, x1, x2)

inst_8972:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x897ffff0; valaddr_reg:x3; val_offset:26916*0 + 3*524*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26916*0 + 3*524*FLEN/8, x4, x1, x2)

inst_8973:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x897ffff8; valaddr_reg:x3; val_offset:26919*0 + 3*525*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26919*0 + 3*525*FLEN/8, x4, x1, x2)

inst_8974:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x897ffffc; valaddr_reg:x3; val_offset:26922*0 + 3*526*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26922*0 + 3*526*FLEN/8, x4, x1, x2)

inst_8975:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x897ffffe; valaddr_reg:x3; val_offset:26925*0 + 3*527*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26925*0 + 3*527*FLEN/8, x4, x1, x2)

inst_8976:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x324298 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e324298; op2val:0x80000000;
op3val:0x897fffff; valaddr_reg:x3; val_offset:26928*0 + 3*528*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26928*0 + 3*528*FLEN/8, x4, x1, x2)

inst_8977:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x3; val_offset:26931*0 + 3*529*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26931*0 + 3*529*FLEN/8, x4, x1, x2)

inst_8978:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x3; val_offset:26934*0 + 3*530*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26934*0 + 3*530*FLEN/8, x4, x1, x2)

inst_8979:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x3; val_offset:26937*0 + 3*531*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26937*0 + 3*531*FLEN/8, x4, x1, x2)

inst_8980:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x3; val_offset:26940*0 + 3*532*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26940*0 + 3*532*FLEN/8, x4, x1, x2)

inst_8981:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x3; val_offset:26943*0 + 3*533*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26943*0 + 3*533*FLEN/8, x4, x1, x2)

inst_8982:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x3; val_offset:26946*0 + 3*534*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26946*0 + 3*534*FLEN/8, x4, x1, x2)

inst_8983:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x3; val_offset:26949*0 + 3*535*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26949*0 + 3*535*FLEN/8, x4, x1, x2)

inst_8984:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x3; val_offset:26952*0 + 3*536*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26952*0 + 3*536*FLEN/8, x4, x1, x2)

inst_8985:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x3; val_offset:26955*0 + 3*537*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26955*0 + 3*537*FLEN/8, x4, x1, x2)

inst_8986:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x3; val_offset:26958*0 + 3*538*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26958*0 + 3*538*FLEN/8, x4, x1, x2)

inst_8987:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x3; val_offset:26961*0 + 3*539*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26961*0 + 3*539*FLEN/8, x4, x1, x2)

inst_8988:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x3; val_offset:26964*0 + 3*540*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26964*0 + 3*540*FLEN/8, x4, x1, x2)

inst_8989:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x3; val_offset:26967*0 + 3*541*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26967*0 + 3*541*FLEN/8, x4, x1, x2)

inst_8990:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x3; val_offset:26970*0 + 3*542*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26970*0 + 3*542*FLEN/8, x4, x1, x2)

inst_8991:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x3; val_offset:26973*0 + 3*543*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26973*0 + 3*543*FLEN/8, x4, x1, x2)

inst_8992:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x3; val_offset:26976*0 + 3*544*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26976*0 + 3*544*FLEN/8, x4, x1, x2)

inst_8993:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x88000000; valaddr_reg:x3; val_offset:26979*0 + 3*545*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26979*0 + 3*545*FLEN/8, x4, x1, x2)

inst_8994:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x88000001; valaddr_reg:x3; val_offset:26982*0 + 3*546*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26982*0 + 3*546*FLEN/8, x4, x1, x2)

inst_8995:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x88000003; valaddr_reg:x3; val_offset:26985*0 + 3*547*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26985*0 + 3*547*FLEN/8, x4, x1, x2)

inst_8996:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x88000007; valaddr_reg:x3; val_offset:26988*0 + 3*548*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26988*0 + 3*548*FLEN/8, x4, x1, x2)

inst_8997:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x8800000f; valaddr_reg:x3; val_offset:26991*0 + 3*549*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26991*0 + 3*549*FLEN/8, x4, x1, x2)

inst_8998:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x8800001f; valaddr_reg:x3; val_offset:26994*0 + 3*550*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26994*0 + 3*550*FLEN/8, x4, x1, x2)

inst_8999:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x8800003f; valaddr_reg:x3; val_offset:26997*0 + 3*551*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26997*0 + 3*551*FLEN/8, x4, x1, x2)

inst_9000:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x8800007f; valaddr_reg:x3; val_offset:27000*0 + 3*552*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27000*0 + 3*552*FLEN/8, x4, x1, x2)

inst_9001:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x880000ff; valaddr_reg:x3; val_offset:27003*0 + 3*553*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27003*0 + 3*553*FLEN/8, x4, x1, x2)

inst_9002:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x880001ff; valaddr_reg:x3; val_offset:27006*0 + 3*554*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27006*0 + 3*554*FLEN/8, x4, x1, x2)

inst_9003:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x880003ff; valaddr_reg:x3; val_offset:27009*0 + 3*555*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27009*0 + 3*555*FLEN/8, x4, x1, x2)

inst_9004:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x880007ff; valaddr_reg:x3; val_offset:27012*0 + 3*556*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27012*0 + 3*556*FLEN/8, x4, x1, x2)

inst_9005:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x88000fff; valaddr_reg:x3; val_offset:27015*0 + 3*557*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27015*0 + 3*557*FLEN/8, x4, x1, x2)

inst_9006:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x88001fff; valaddr_reg:x3; val_offset:27018*0 + 3*558*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27018*0 + 3*558*FLEN/8, x4, x1, x2)

inst_9007:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x88003fff; valaddr_reg:x3; val_offset:27021*0 + 3*559*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27021*0 + 3*559*FLEN/8, x4, x1, x2)

inst_9008:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x88007fff; valaddr_reg:x3; val_offset:27024*0 + 3*560*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27024*0 + 3*560*FLEN/8, x4, x1, x2)

inst_9009:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x8800ffff; valaddr_reg:x3; val_offset:27027*0 + 3*561*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27027*0 + 3*561*FLEN/8, x4, x1, x2)

inst_9010:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x8801ffff; valaddr_reg:x3; val_offset:27030*0 + 3*562*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27030*0 + 3*562*FLEN/8, x4, x1, x2)

inst_9011:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x8803ffff; valaddr_reg:x3; val_offset:27033*0 + 3*563*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27033*0 + 3*563*FLEN/8, x4, x1, x2)

inst_9012:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x8807ffff; valaddr_reg:x3; val_offset:27036*0 + 3*564*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27036*0 + 3*564*FLEN/8, x4, x1, x2)

inst_9013:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x880fffff; valaddr_reg:x3; val_offset:27039*0 + 3*565*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27039*0 + 3*565*FLEN/8, x4, x1, x2)

inst_9014:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x881fffff; valaddr_reg:x3; val_offset:27042*0 + 3*566*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27042*0 + 3*566*FLEN/8, x4, x1, x2)

inst_9015:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x883fffff; valaddr_reg:x3; val_offset:27045*0 + 3*567*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27045*0 + 3*567*FLEN/8, x4, x1, x2)

inst_9016:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x88400000; valaddr_reg:x3; val_offset:27048*0 + 3*568*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27048*0 + 3*568*FLEN/8, x4, x1, x2)

inst_9017:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x88600000; valaddr_reg:x3; val_offset:27051*0 + 3*569*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27051*0 + 3*569*FLEN/8, x4, x1, x2)

inst_9018:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x88700000; valaddr_reg:x3; val_offset:27054*0 + 3*570*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27054*0 + 3*570*FLEN/8, x4, x1, x2)

inst_9019:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x88780000; valaddr_reg:x3; val_offset:27057*0 + 3*571*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27057*0 + 3*571*FLEN/8, x4, x1, x2)

inst_9020:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x887c0000; valaddr_reg:x3; val_offset:27060*0 + 3*572*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27060*0 + 3*572*FLEN/8, x4, x1, x2)

inst_9021:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x887e0000; valaddr_reg:x3; val_offset:27063*0 + 3*573*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27063*0 + 3*573*FLEN/8, x4, x1, x2)

inst_9022:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x887f0000; valaddr_reg:x3; val_offset:27066*0 + 3*574*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27066*0 + 3*574*FLEN/8, x4, x1, x2)

inst_9023:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x887f8000; valaddr_reg:x3; val_offset:27069*0 + 3*575*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27069*0 + 3*575*FLEN/8, x4, x1, x2)

inst_9024:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x887fc000; valaddr_reg:x3; val_offset:27072*0 + 3*576*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27072*0 + 3*576*FLEN/8, x4, x1, x2)

inst_9025:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x887fe000; valaddr_reg:x3; val_offset:27075*0 + 3*577*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27075*0 + 3*577*FLEN/8, x4, x1, x2)

inst_9026:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x887ff000; valaddr_reg:x3; val_offset:27078*0 + 3*578*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27078*0 + 3*578*FLEN/8, x4, x1, x2)

inst_9027:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x887ff800; valaddr_reg:x3; val_offset:27081*0 + 3*579*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27081*0 + 3*579*FLEN/8, x4, x1, x2)

inst_9028:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x887ffc00; valaddr_reg:x3; val_offset:27084*0 + 3*580*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27084*0 + 3*580*FLEN/8, x4, x1, x2)

inst_9029:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x887ffe00; valaddr_reg:x3; val_offset:27087*0 + 3*581*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27087*0 + 3*581*FLEN/8, x4, x1, x2)

inst_9030:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x887fff00; valaddr_reg:x3; val_offset:27090*0 + 3*582*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27090*0 + 3*582*FLEN/8, x4, x1, x2)

inst_9031:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x887fff80; valaddr_reg:x3; val_offset:27093*0 + 3*583*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27093*0 + 3*583*FLEN/8, x4, x1, x2)

inst_9032:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x887fffc0; valaddr_reg:x3; val_offset:27096*0 + 3*584*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27096*0 + 3*584*FLEN/8, x4, x1, x2)

inst_9033:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x887fffe0; valaddr_reg:x3; val_offset:27099*0 + 3*585*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27099*0 + 3*585*FLEN/8, x4, x1, x2)

inst_9034:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x887ffff0; valaddr_reg:x3; val_offset:27102*0 + 3*586*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27102*0 + 3*586*FLEN/8, x4, x1, x2)

inst_9035:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x887ffff8; valaddr_reg:x3; val_offset:27105*0 + 3*587*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27105*0 + 3*587*FLEN/8, x4, x1, x2)

inst_9036:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x887ffffc; valaddr_reg:x3; val_offset:27108*0 + 3*588*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27108*0 + 3*588*FLEN/8, x4, x1, x2)

inst_9037:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x887ffffe; valaddr_reg:x3; val_offset:27111*0 + 3*589*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27111*0 + 3*589*FLEN/8, x4, x1, x2)

inst_9038:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32e0b8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32e0b8; op2val:0x80000000;
op3val:0x887fffff; valaddr_reg:x3; val_offset:27114*0 + 3*590*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27114*0 + 3*590*FLEN/8, x4, x1, x2)

inst_9039:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:27117*0 + 3*591*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27117*0 + 3*591*FLEN/8, x4, x1, x2)

inst_9040:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:27120*0 + 3*592*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27120*0 + 3*592*FLEN/8, x4, x1, x2)

inst_9041:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:27123*0 + 3*593*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27123*0 + 3*593*FLEN/8, x4, x1, x2)

inst_9042:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0x199999; valaddr_reg:x3; val_offset:27126*0 + 3*594*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27126*0 + 3*594*FLEN/8, x4, x1, x2)

inst_9043:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0x249249; valaddr_reg:x3; val_offset:27129*0 + 3*595*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27129*0 + 3*595*FLEN/8, x4, x1, x2)

inst_9044:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0x333333; valaddr_reg:x3; val_offset:27132*0 + 3*596*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27132*0 + 3*596*FLEN/8, x4, x1, x2)

inst_9045:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0x36db6d; valaddr_reg:x3; val_offset:27135*0 + 3*597*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27135*0 + 3*597*FLEN/8, x4, x1, x2)

inst_9046:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0x3bbbbb; valaddr_reg:x3; val_offset:27138*0 + 3*598*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27138*0 + 3*598*FLEN/8, x4, x1, x2)

inst_9047:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0x444444; valaddr_reg:x3; val_offset:27141*0 + 3*599*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27141*0 + 3*599*FLEN/8, x4, x1, x2)

inst_9048:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0x4ccccc; valaddr_reg:x3; val_offset:27144*0 + 3*600*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27144*0 + 3*600*FLEN/8, x4, x1, x2)

inst_9049:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0x5b6db6; valaddr_reg:x3; val_offset:27147*0 + 3*601*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27147*0 + 3*601*FLEN/8, x4, x1, x2)

inst_9050:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0x666666; valaddr_reg:x3; val_offset:27150*0 + 3*602*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27150*0 + 3*602*FLEN/8, x4, x1, x2)

inst_9051:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0x6db6db; valaddr_reg:x3; val_offset:27153*0 + 3*603*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27153*0 + 3*603*FLEN/8, x4, x1, x2)

inst_9052:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0x7ffff8; valaddr_reg:x3; val_offset:27156*0 + 3*604*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27156*0 + 3*604*FLEN/8, x4, x1, x2)

inst_9053:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0x7ffffc; valaddr_reg:x3; val_offset:27159*0 + 3*605*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27159*0 + 3*605*FLEN/8, x4, x1, x2)

inst_9054:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0x7ffffe; valaddr_reg:x3; val_offset:27162*0 + 3*606*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27162*0 + 3*606*FLEN/8, x4, x1, x2)

inst_9055:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xc800000; valaddr_reg:x3; val_offset:27165*0 + 3*607*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27165*0 + 3*607*FLEN/8, x4, x1, x2)

inst_9056:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xc800001; valaddr_reg:x3; val_offset:27168*0 + 3*608*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27168*0 + 3*608*FLEN/8, x4, x1, x2)

inst_9057:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xc800003; valaddr_reg:x3; val_offset:27171*0 + 3*609*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27171*0 + 3*609*FLEN/8, x4, x1, x2)

inst_9058:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xc800007; valaddr_reg:x3; val_offset:27174*0 + 3*610*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27174*0 + 3*610*FLEN/8, x4, x1, x2)

inst_9059:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xc80000f; valaddr_reg:x3; val_offset:27177*0 + 3*611*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27177*0 + 3*611*FLEN/8, x4, x1, x2)

inst_9060:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xc80001f; valaddr_reg:x3; val_offset:27180*0 + 3*612*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27180*0 + 3*612*FLEN/8, x4, x1, x2)

inst_9061:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xc80003f; valaddr_reg:x3; val_offset:27183*0 + 3*613*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27183*0 + 3*613*FLEN/8, x4, x1, x2)

inst_9062:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xc80007f; valaddr_reg:x3; val_offset:27186*0 + 3*614*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27186*0 + 3*614*FLEN/8, x4, x1, x2)

inst_9063:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xc8000ff; valaddr_reg:x3; val_offset:27189*0 + 3*615*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27189*0 + 3*615*FLEN/8, x4, x1, x2)

inst_9064:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xc8001ff; valaddr_reg:x3; val_offset:27192*0 + 3*616*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27192*0 + 3*616*FLEN/8, x4, x1, x2)

inst_9065:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xc8003ff; valaddr_reg:x3; val_offset:27195*0 + 3*617*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27195*0 + 3*617*FLEN/8, x4, x1, x2)

inst_9066:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xc8007ff; valaddr_reg:x3; val_offset:27198*0 + 3*618*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27198*0 + 3*618*FLEN/8, x4, x1, x2)

inst_9067:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xc800fff; valaddr_reg:x3; val_offset:27201*0 + 3*619*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27201*0 + 3*619*FLEN/8, x4, x1, x2)

inst_9068:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xc801fff; valaddr_reg:x3; val_offset:27204*0 + 3*620*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27204*0 + 3*620*FLEN/8, x4, x1, x2)

inst_9069:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xc803fff; valaddr_reg:x3; val_offset:27207*0 + 3*621*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27207*0 + 3*621*FLEN/8, x4, x1, x2)

inst_9070:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xc807fff; valaddr_reg:x3; val_offset:27210*0 + 3*622*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27210*0 + 3*622*FLEN/8, x4, x1, x2)

inst_9071:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xc80ffff; valaddr_reg:x3; val_offset:27213*0 + 3*623*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27213*0 + 3*623*FLEN/8, x4, x1, x2)

inst_9072:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xc81ffff; valaddr_reg:x3; val_offset:27216*0 + 3*624*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27216*0 + 3*624*FLEN/8, x4, x1, x2)

inst_9073:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xc83ffff; valaddr_reg:x3; val_offset:27219*0 + 3*625*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27219*0 + 3*625*FLEN/8, x4, x1, x2)

inst_9074:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xc87ffff; valaddr_reg:x3; val_offset:27222*0 + 3*626*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27222*0 + 3*626*FLEN/8, x4, x1, x2)

inst_9075:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xc8fffff; valaddr_reg:x3; val_offset:27225*0 + 3*627*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27225*0 + 3*627*FLEN/8, x4, x1, x2)

inst_9076:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xc9fffff; valaddr_reg:x3; val_offset:27228*0 + 3*628*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27228*0 + 3*628*FLEN/8, x4, x1, x2)

inst_9077:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xcbfffff; valaddr_reg:x3; val_offset:27231*0 + 3*629*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27231*0 + 3*629*FLEN/8, x4, x1, x2)

inst_9078:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xcc00000; valaddr_reg:x3; val_offset:27234*0 + 3*630*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27234*0 + 3*630*FLEN/8, x4, x1, x2)

inst_9079:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xce00000; valaddr_reg:x3; val_offset:27237*0 + 3*631*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27237*0 + 3*631*FLEN/8, x4, x1, x2)

inst_9080:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xcf00000; valaddr_reg:x3; val_offset:27240*0 + 3*632*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27240*0 + 3*632*FLEN/8, x4, x1, x2)

inst_9081:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xcf80000; valaddr_reg:x3; val_offset:27243*0 + 3*633*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27243*0 + 3*633*FLEN/8, x4, x1, x2)

inst_9082:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xcfc0000; valaddr_reg:x3; val_offset:27246*0 + 3*634*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27246*0 + 3*634*FLEN/8, x4, x1, x2)

inst_9083:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xcfe0000; valaddr_reg:x3; val_offset:27249*0 + 3*635*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27249*0 + 3*635*FLEN/8, x4, x1, x2)

inst_9084:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xcff0000; valaddr_reg:x3; val_offset:27252*0 + 3*636*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27252*0 + 3*636*FLEN/8, x4, x1, x2)

inst_9085:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xcff8000; valaddr_reg:x3; val_offset:27255*0 + 3*637*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27255*0 + 3*637*FLEN/8, x4, x1, x2)

inst_9086:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xcffc000; valaddr_reg:x3; val_offset:27258*0 + 3*638*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27258*0 + 3*638*FLEN/8, x4, x1, x2)

inst_9087:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xcffe000; valaddr_reg:x3; val_offset:27261*0 + 3*639*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27261*0 + 3*639*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_6)

inst_9088:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xcfff000; valaddr_reg:x3; val_offset:27264*0 + 3*640*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27264*0 + 3*640*FLEN/8, x4, x1, x2)

inst_9089:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xcfff800; valaddr_reg:x3; val_offset:27267*0 + 3*641*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27267*0 + 3*641*FLEN/8, x4, x1, x2)

inst_9090:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xcfffc00; valaddr_reg:x3; val_offset:27270*0 + 3*642*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27270*0 + 3*642*FLEN/8, x4, x1, x2)

inst_9091:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xcfffe00; valaddr_reg:x3; val_offset:27273*0 + 3*643*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27273*0 + 3*643*FLEN/8, x4, x1, x2)

inst_9092:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xcffff00; valaddr_reg:x3; val_offset:27276*0 + 3*644*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27276*0 + 3*644*FLEN/8, x4, x1, x2)

inst_9093:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xcffff80; valaddr_reg:x3; val_offset:27279*0 + 3*645*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27279*0 + 3*645*FLEN/8, x4, x1, x2)

inst_9094:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xcffffc0; valaddr_reg:x3; val_offset:27282*0 + 3*646*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27282*0 + 3*646*FLEN/8, x4, x1, x2)

inst_9095:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xcffffe0; valaddr_reg:x3; val_offset:27285*0 + 3*647*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27285*0 + 3*647*FLEN/8, x4, x1, x2)

inst_9096:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xcfffff0; valaddr_reg:x3; val_offset:27288*0 + 3*648*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27288*0 + 3*648*FLEN/8, x4, x1, x2)

inst_9097:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xcfffff8; valaddr_reg:x3; val_offset:27291*0 + 3*649*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27291*0 + 3*649*FLEN/8, x4, x1, x2)

inst_9098:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xcfffffc; valaddr_reg:x3; val_offset:27294*0 + 3*650*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27294*0 + 3*650*FLEN/8, x4, x1, x2)

inst_9099:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xcfffffe; valaddr_reg:x3; val_offset:27297*0 + 3*651*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27297*0 + 3*651*FLEN/8, x4, x1, x2)

inst_9100:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3557bf; op2val:0x0;
op3val:0xcffffff; valaddr_reg:x3; val_offset:27300*0 + 3*652*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27300*0 + 3*652*FLEN/8, x4, x1, x2)

inst_9101:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x73800000; valaddr_reg:x3; val_offset:27303*0 + 3*653*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27303*0 + 3*653*FLEN/8, x4, x1, x2)

inst_9102:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x73800001; valaddr_reg:x3; val_offset:27306*0 + 3*654*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27306*0 + 3*654*FLEN/8, x4, x1, x2)

inst_9103:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x73800003; valaddr_reg:x3; val_offset:27309*0 + 3*655*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27309*0 + 3*655*FLEN/8, x4, x1, x2)

inst_9104:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x73800007; valaddr_reg:x3; val_offset:27312*0 + 3*656*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27312*0 + 3*656*FLEN/8, x4, x1, x2)

inst_9105:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x7380000f; valaddr_reg:x3; val_offset:27315*0 + 3*657*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27315*0 + 3*657*FLEN/8, x4, x1, x2)

inst_9106:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x7380001f; valaddr_reg:x3; val_offset:27318*0 + 3*658*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27318*0 + 3*658*FLEN/8, x4, x1, x2)

inst_9107:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x7380003f; valaddr_reg:x3; val_offset:27321*0 + 3*659*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27321*0 + 3*659*FLEN/8, x4, x1, x2)

inst_9108:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x7380007f; valaddr_reg:x3; val_offset:27324*0 + 3*660*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27324*0 + 3*660*FLEN/8, x4, x1, x2)

inst_9109:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x738000ff; valaddr_reg:x3; val_offset:27327*0 + 3*661*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27327*0 + 3*661*FLEN/8, x4, x1, x2)

inst_9110:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x738001ff; valaddr_reg:x3; val_offset:27330*0 + 3*662*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27330*0 + 3*662*FLEN/8, x4, x1, x2)

inst_9111:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x738003ff; valaddr_reg:x3; val_offset:27333*0 + 3*663*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27333*0 + 3*663*FLEN/8, x4, x1, x2)

inst_9112:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x738007ff; valaddr_reg:x3; val_offset:27336*0 + 3*664*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27336*0 + 3*664*FLEN/8, x4, x1, x2)

inst_9113:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x73800fff; valaddr_reg:x3; val_offset:27339*0 + 3*665*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27339*0 + 3*665*FLEN/8, x4, x1, x2)

inst_9114:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x73801fff; valaddr_reg:x3; val_offset:27342*0 + 3*666*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27342*0 + 3*666*FLEN/8, x4, x1, x2)

inst_9115:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x73803fff; valaddr_reg:x3; val_offset:27345*0 + 3*667*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27345*0 + 3*667*FLEN/8, x4, x1, x2)

inst_9116:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x73807fff; valaddr_reg:x3; val_offset:27348*0 + 3*668*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27348*0 + 3*668*FLEN/8, x4, x1, x2)

inst_9117:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x7380ffff; valaddr_reg:x3; val_offset:27351*0 + 3*669*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27351*0 + 3*669*FLEN/8, x4, x1, x2)

inst_9118:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x7381ffff; valaddr_reg:x3; val_offset:27354*0 + 3*670*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27354*0 + 3*670*FLEN/8, x4, x1, x2)

inst_9119:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x7383ffff; valaddr_reg:x3; val_offset:27357*0 + 3*671*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27357*0 + 3*671*FLEN/8, x4, x1, x2)

inst_9120:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x7387ffff; valaddr_reg:x3; val_offset:27360*0 + 3*672*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27360*0 + 3*672*FLEN/8, x4, x1, x2)

inst_9121:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x738fffff; valaddr_reg:x3; val_offset:27363*0 + 3*673*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27363*0 + 3*673*FLEN/8, x4, x1, x2)

inst_9122:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x739fffff; valaddr_reg:x3; val_offset:27366*0 + 3*674*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27366*0 + 3*674*FLEN/8, x4, x1, x2)

inst_9123:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x73bfffff; valaddr_reg:x3; val_offset:27369*0 + 3*675*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27369*0 + 3*675*FLEN/8, x4, x1, x2)

inst_9124:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x73c00000; valaddr_reg:x3; val_offset:27372*0 + 3*676*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27372*0 + 3*676*FLEN/8, x4, x1, x2)

inst_9125:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x73e00000; valaddr_reg:x3; val_offset:27375*0 + 3*677*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27375*0 + 3*677*FLEN/8, x4, x1, x2)

inst_9126:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x73f00000; valaddr_reg:x3; val_offset:27378*0 + 3*678*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27378*0 + 3*678*FLEN/8, x4, x1, x2)

inst_9127:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x73f80000; valaddr_reg:x3; val_offset:27381*0 + 3*679*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27381*0 + 3*679*FLEN/8, x4, x1, x2)

inst_9128:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x73fc0000; valaddr_reg:x3; val_offset:27384*0 + 3*680*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27384*0 + 3*680*FLEN/8, x4, x1, x2)

inst_9129:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x73fe0000; valaddr_reg:x3; val_offset:27387*0 + 3*681*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27387*0 + 3*681*FLEN/8, x4, x1, x2)

inst_9130:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x73ff0000; valaddr_reg:x3; val_offset:27390*0 + 3*682*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27390*0 + 3*682*FLEN/8, x4, x1, x2)

inst_9131:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x73ff8000; valaddr_reg:x3; val_offset:27393*0 + 3*683*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27393*0 + 3*683*FLEN/8, x4, x1, x2)

inst_9132:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x73ffc000; valaddr_reg:x3; val_offset:27396*0 + 3*684*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27396*0 + 3*684*FLEN/8, x4, x1, x2)

inst_9133:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x73ffe000; valaddr_reg:x3; val_offset:27399*0 + 3*685*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27399*0 + 3*685*FLEN/8, x4, x1, x2)

inst_9134:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x73fff000; valaddr_reg:x3; val_offset:27402*0 + 3*686*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27402*0 + 3*686*FLEN/8, x4, x1, x2)

inst_9135:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x73fff800; valaddr_reg:x3; val_offset:27405*0 + 3*687*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27405*0 + 3*687*FLEN/8, x4, x1, x2)

inst_9136:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x73fffc00; valaddr_reg:x3; val_offset:27408*0 + 3*688*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27408*0 + 3*688*FLEN/8, x4, x1, x2)

inst_9137:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x73fffe00; valaddr_reg:x3; val_offset:27411*0 + 3*689*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27411*0 + 3*689*FLEN/8, x4, x1, x2)

inst_9138:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x73ffff00; valaddr_reg:x3; val_offset:27414*0 + 3*690*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27414*0 + 3*690*FLEN/8, x4, x1, x2)

inst_9139:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x73ffff80; valaddr_reg:x3; val_offset:27417*0 + 3*691*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27417*0 + 3*691*FLEN/8, x4, x1, x2)

inst_9140:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x73ffffc0; valaddr_reg:x3; val_offset:27420*0 + 3*692*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27420*0 + 3*692*FLEN/8, x4, x1, x2)

inst_9141:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x73ffffe0; valaddr_reg:x3; val_offset:27423*0 + 3*693*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27423*0 + 3*693*FLEN/8, x4, x1, x2)

inst_9142:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x73fffff0; valaddr_reg:x3; val_offset:27426*0 + 3*694*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27426*0 + 3*694*FLEN/8, x4, x1, x2)

inst_9143:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x73fffff8; valaddr_reg:x3; val_offset:27429*0 + 3*695*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27429*0 + 3*695*FLEN/8, x4, x1, x2)

inst_9144:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x73fffffc; valaddr_reg:x3; val_offset:27432*0 + 3*696*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27432*0 + 3*696*FLEN/8, x4, x1, x2)

inst_9145:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x73fffffe; valaddr_reg:x3; val_offset:27435*0 + 3*697*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27435*0 + 3*697*FLEN/8, x4, x1, x2)

inst_9146:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x73ffffff; valaddr_reg:x3; val_offset:27438*0 + 3*698*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27438*0 + 3*698*FLEN/8, x4, x1, x2)

inst_9147:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x7f000001; valaddr_reg:x3; val_offset:27441*0 + 3*699*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27441*0 + 3*699*FLEN/8, x4, x1, x2)

inst_9148:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x7f000003; valaddr_reg:x3; val_offset:27444*0 + 3*700*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27444*0 + 3*700*FLEN/8, x4, x1, x2)

inst_9149:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x7f000007; valaddr_reg:x3; val_offset:27447*0 + 3*701*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27447*0 + 3*701*FLEN/8, x4, x1, x2)

inst_9150:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x7f199999; valaddr_reg:x3; val_offset:27450*0 + 3*702*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27450*0 + 3*702*FLEN/8, x4, x1, x2)

inst_9151:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x7f249249; valaddr_reg:x3; val_offset:27453*0 + 3*703*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27453*0 + 3*703*FLEN/8, x4, x1, x2)

inst_9152:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x7f333333; valaddr_reg:x3; val_offset:27456*0 + 3*704*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27456*0 + 3*704*FLEN/8, x4, x1, x2)

inst_9153:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x7f36db6d; valaddr_reg:x3; val_offset:27459*0 + 3*705*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27459*0 + 3*705*FLEN/8, x4, x1, x2)

inst_9154:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:27462*0 + 3*706*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27462*0 + 3*706*FLEN/8, x4, x1, x2)

inst_9155:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x7f444444; valaddr_reg:x3; val_offset:27465*0 + 3*707*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27465*0 + 3*707*FLEN/8, x4, x1, x2)

inst_9156:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:27468*0 + 3*708*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27468*0 + 3*708*FLEN/8, x4, x1, x2)

inst_9157:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:27471*0 + 3*709*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27471*0 + 3*709*FLEN/8, x4, x1, x2)

inst_9158:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x7f666666; valaddr_reg:x3; val_offset:27474*0 + 3*710*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27474*0 + 3*710*FLEN/8, x4, x1, x2)

inst_9159:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x7f6db6db; valaddr_reg:x3; val_offset:27477*0 + 3*711*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27477*0 + 3*711*FLEN/8, x4, x1, x2)

inst_9160:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:27480*0 + 3*712*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27480*0 + 3*712*FLEN/8, x4, x1, x2)

inst_9161:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:27483*0 + 3*713*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27483*0 + 3*713*FLEN/8, x4, x1, x2)

inst_9162:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x397e0b and fs2 == 0 and fe2 == 0x81 and fm2 == 0x30a776 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e397e0b; op2val:0x40b0a776;
op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:27486*0 + 3*714*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27486*0 + 3*714*FLEN/8, x4, x1, x2)

inst_9163:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x3f800001; valaddr_reg:x3; val_offset:27489*0 + 3*715*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27489*0 + 3*715*FLEN/8, x4, x1, x2)

inst_9164:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x3f800003; valaddr_reg:x3; val_offset:27492*0 + 3*716*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27492*0 + 3*716*FLEN/8, x4, x1, x2)

inst_9165:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x3f800007; valaddr_reg:x3; val_offset:27495*0 + 3*717*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27495*0 + 3*717*FLEN/8, x4, x1, x2)

inst_9166:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x3f999999; valaddr_reg:x3; val_offset:27498*0 + 3*718*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27498*0 + 3*718*FLEN/8, x4, x1, x2)

inst_9167:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x3fa49249; valaddr_reg:x3; val_offset:27501*0 + 3*719*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27501*0 + 3*719*FLEN/8, x4, x1, x2)

inst_9168:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x3fb33333; valaddr_reg:x3; val_offset:27504*0 + 3*720*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27504*0 + 3*720*FLEN/8, x4, x1, x2)

inst_9169:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:27507*0 + 3*721*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27507*0 + 3*721*FLEN/8, x4, x1, x2)

inst_9170:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:27510*0 + 3*722*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27510*0 + 3*722*FLEN/8, x4, x1, x2)

inst_9171:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x3fc44444; valaddr_reg:x3; val_offset:27513*0 + 3*723*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27513*0 + 3*723*FLEN/8, x4, x1, x2)

inst_9172:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x3fcccccc; valaddr_reg:x3; val_offset:27516*0 + 3*724*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27516*0 + 3*724*FLEN/8, x4, x1, x2)

inst_9173:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:27519*0 + 3*725*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27519*0 + 3*725*FLEN/8, x4, x1, x2)

inst_9174:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x3fe66666; valaddr_reg:x3; val_offset:27522*0 + 3*726*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27522*0 + 3*726*FLEN/8, x4, x1, x2)

inst_9175:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x3fedb6db; valaddr_reg:x3; val_offset:27525*0 + 3*727*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27525*0 + 3*727*FLEN/8, x4, x1, x2)

inst_9176:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x3ffffff8; valaddr_reg:x3; val_offset:27528*0 + 3*728*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27528*0 + 3*728*FLEN/8, x4, x1, x2)

inst_9177:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x3ffffffc; valaddr_reg:x3; val_offset:27531*0 + 3*729*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27531*0 + 3*729*FLEN/8, x4, x1, x2)

inst_9178:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x3ffffffe; valaddr_reg:x3; val_offset:27534*0 + 3*730*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27534*0 + 3*730*FLEN/8, x4, x1, x2)

inst_9179:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x49800000; valaddr_reg:x3; val_offset:27537*0 + 3*731*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27537*0 + 3*731*FLEN/8, x4, x1, x2)

inst_9180:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x49800001; valaddr_reg:x3; val_offset:27540*0 + 3*732*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27540*0 + 3*732*FLEN/8, x4, x1, x2)

inst_9181:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x49800003; valaddr_reg:x3; val_offset:27543*0 + 3*733*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27543*0 + 3*733*FLEN/8, x4, x1, x2)

inst_9182:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x49800007; valaddr_reg:x3; val_offset:27546*0 + 3*734*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27546*0 + 3*734*FLEN/8, x4, x1, x2)

inst_9183:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x4980000f; valaddr_reg:x3; val_offset:27549*0 + 3*735*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27549*0 + 3*735*FLEN/8, x4, x1, x2)

inst_9184:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x4980001f; valaddr_reg:x3; val_offset:27552*0 + 3*736*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27552*0 + 3*736*FLEN/8, x4, x1, x2)

inst_9185:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x4980003f; valaddr_reg:x3; val_offset:27555*0 + 3*737*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27555*0 + 3*737*FLEN/8, x4, x1, x2)

inst_9186:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x4980007f; valaddr_reg:x3; val_offset:27558*0 + 3*738*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27558*0 + 3*738*FLEN/8, x4, x1, x2)

inst_9187:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x498000ff; valaddr_reg:x3; val_offset:27561*0 + 3*739*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27561*0 + 3*739*FLEN/8, x4, x1, x2)

inst_9188:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x498001ff; valaddr_reg:x3; val_offset:27564*0 + 3*740*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27564*0 + 3*740*FLEN/8, x4, x1, x2)

inst_9189:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x498003ff; valaddr_reg:x3; val_offset:27567*0 + 3*741*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27567*0 + 3*741*FLEN/8, x4, x1, x2)

inst_9190:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x498007ff; valaddr_reg:x3; val_offset:27570*0 + 3*742*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27570*0 + 3*742*FLEN/8, x4, x1, x2)

inst_9191:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x49800fff; valaddr_reg:x3; val_offset:27573*0 + 3*743*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27573*0 + 3*743*FLEN/8, x4, x1, x2)

inst_9192:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x49801fff; valaddr_reg:x3; val_offset:27576*0 + 3*744*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27576*0 + 3*744*FLEN/8, x4, x1, x2)

inst_9193:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x49803fff; valaddr_reg:x3; val_offset:27579*0 + 3*745*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27579*0 + 3*745*FLEN/8, x4, x1, x2)

inst_9194:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x49807fff; valaddr_reg:x3; val_offset:27582*0 + 3*746*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27582*0 + 3*746*FLEN/8, x4, x1, x2)

inst_9195:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x4980ffff; valaddr_reg:x3; val_offset:27585*0 + 3*747*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27585*0 + 3*747*FLEN/8, x4, x1, x2)

inst_9196:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x4981ffff; valaddr_reg:x3; val_offset:27588*0 + 3*748*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27588*0 + 3*748*FLEN/8, x4, x1, x2)

inst_9197:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x4983ffff; valaddr_reg:x3; val_offset:27591*0 + 3*749*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27591*0 + 3*749*FLEN/8, x4, x1, x2)

inst_9198:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x4987ffff; valaddr_reg:x3; val_offset:27594*0 + 3*750*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27594*0 + 3*750*FLEN/8, x4, x1, x2)

inst_9199:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x498fffff; valaddr_reg:x3; val_offset:27597*0 + 3*751*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27597*0 + 3*751*FLEN/8, x4, x1, x2)

inst_9200:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x499fffff; valaddr_reg:x3; val_offset:27600*0 + 3*752*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27600*0 + 3*752*FLEN/8, x4, x1, x2)

inst_9201:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x49bfffff; valaddr_reg:x3; val_offset:27603*0 + 3*753*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27603*0 + 3*753*FLEN/8, x4, x1, x2)

inst_9202:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x49c00000; valaddr_reg:x3; val_offset:27606*0 + 3*754*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27606*0 + 3*754*FLEN/8, x4, x1, x2)

inst_9203:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x49e00000; valaddr_reg:x3; val_offset:27609*0 + 3*755*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27609*0 + 3*755*FLEN/8, x4, x1, x2)

inst_9204:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x49f00000; valaddr_reg:x3; val_offset:27612*0 + 3*756*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27612*0 + 3*756*FLEN/8, x4, x1, x2)

inst_9205:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x49f80000; valaddr_reg:x3; val_offset:27615*0 + 3*757*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27615*0 + 3*757*FLEN/8, x4, x1, x2)

inst_9206:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x49fc0000; valaddr_reg:x3; val_offset:27618*0 + 3*758*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27618*0 + 3*758*FLEN/8, x4, x1, x2)

inst_9207:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x49fe0000; valaddr_reg:x3; val_offset:27621*0 + 3*759*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27621*0 + 3*759*FLEN/8, x4, x1, x2)

inst_9208:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x49ff0000; valaddr_reg:x3; val_offset:27624*0 + 3*760*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27624*0 + 3*760*FLEN/8, x4, x1, x2)

inst_9209:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x49ff8000; valaddr_reg:x3; val_offset:27627*0 + 3*761*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27627*0 + 3*761*FLEN/8, x4, x1, x2)

inst_9210:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x49ffc000; valaddr_reg:x3; val_offset:27630*0 + 3*762*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27630*0 + 3*762*FLEN/8, x4, x1, x2)

inst_9211:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x49ffe000; valaddr_reg:x3; val_offset:27633*0 + 3*763*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27633*0 + 3*763*FLEN/8, x4, x1, x2)

inst_9212:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x49fff000; valaddr_reg:x3; val_offset:27636*0 + 3*764*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27636*0 + 3*764*FLEN/8, x4, x1, x2)

inst_9213:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x49fff800; valaddr_reg:x3; val_offset:27639*0 + 3*765*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27639*0 + 3*765*FLEN/8, x4, x1, x2)

inst_9214:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x49fffc00; valaddr_reg:x3; val_offset:27642*0 + 3*766*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27642*0 + 3*766*FLEN/8, x4, x1, x2)

inst_9215:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3d8318 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2ce83c and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3d8318; op2val:0xace83c;
op3val:0x49fffe00; valaddr_reg:x3; val_offset:27645*0 + 3*767*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27645*0 + 3*767*FLEN/8, x4, x1, x2)
#endif


RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(0x7e254961,32,FLEN)
NAN_BOXED(0x40c63fe0,32,FLEN)
NAN_BOXED(0x7d7f0000,32,FLEN)
NAN_BOXED(0x7e254961,32,FLEN)
NAN_BOXED(0x40c63fe0,32,FLEN)
NAN_BOXED(0x7d7f8000,32,FLEN)
NAN_BOXED(0x7e254961,32,FLEN)
NAN_BOXED(0x40c63fe0,32,FLEN)
NAN_BOXED(0x7d7fc000,32,FLEN)
NAN_BOXED(0x7e254961,32,FLEN)
NAN_BOXED(0x40c63fe0,32,FLEN)
NAN_BOXED(0x7d7fe000,32,FLEN)
NAN_BOXED(0x7e254961,32,FLEN)
NAN_BOXED(0x40c63fe0,32,FLEN)
NAN_BOXED(0x7d7ff000,32,FLEN)
NAN_BOXED(0x7e254961,32,FLEN)
NAN_BOXED(0x40c63fe0,32,FLEN)
NAN_BOXED(0x7d7ff800,32,FLEN)
NAN_BOXED(0x7e254961,32,FLEN)
NAN_BOXED(0x40c63fe0,32,FLEN)
NAN_BOXED(0x7d7ffc00,32,FLEN)
NAN_BOXED(0x7e254961,32,FLEN)
NAN_BOXED(0x40c63fe0,32,FLEN)
NAN_BOXED(0x7d7ffe00,32,FLEN)
NAN_BOXED(0x7e254961,32,FLEN)
NAN_BOXED(0x40c63fe0,32,FLEN)
NAN_BOXED(0x7d7fff00,32,FLEN)
NAN_BOXED(0x7e254961,32,FLEN)
NAN_BOXED(0x40c63fe0,32,FLEN)
NAN_BOXED(0x7d7fff80,32,FLEN)
NAN_BOXED(0x7e254961,32,FLEN)
NAN_BOXED(0x40c63fe0,32,FLEN)
NAN_BOXED(0x7d7fffc0,32,FLEN)
NAN_BOXED(0x7e254961,32,FLEN)
NAN_BOXED(0x40c63fe0,32,FLEN)
NAN_BOXED(0x7d7fffe0,32,FLEN)
NAN_BOXED(0x7e254961,32,FLEN)
NAN_BOXED(0x40c63fe0,32,FLEN)
NAN_BOXED(0x7d7ffff0,32,FLEN)
NAN_BOXED(0x7e254961,32,FLEN)
NAN_BOXED(0x40c63fe0,32,FLEN)
NAN_BOXED(0x7d7ffff8,32,FLEN)
NAN_BOXED(0x7e254961,32,FLEN)
NAN_BOXED(0x40c63fe0,32,FLEN)
NAN_BOXED(0x7d7ffffc,32,FLEN)
NAN_BOXED(0x7e254961,32,FLEN)
NAN_BOXED(0x40c63fe0,32,FLEN)
NAN_BOXED(0x7d7ffffe,32,FLEN)
NAN_BOXED(0x7e254961,32,FLEN)
NAN_BOXED(0x40c63fe0,32,FLEN)
NAN_BOXED(0x7d7fffff,32,FLEN)
NAN_BOXED(0x7e254961,32,FLEN)
NAN_BOXED(0x40c63fe0,32,FLEN)
NAN_BOXED(0x7f000001,32,FLEN)
NAN_BOXED(0x7e254961,32,FLEN)
NAN_BOXED(0x40c63fe0,32,FLEN)
NAN_BOXED(0x7f000003,32,FLEN)
NAN_BOXED(0x7e254961,32,FLEN)
NAN_BOXED(0x40c63fe0,32,FLEN)
NAN_BOXED(0x7f000007,32,FLEN)
NAN_BOXED(0x7e254961,32,FLEN)
NAN_BOXED(0x40c63fe0,32,FLEN)
NAN_BOXED(0x7f199999,32,FLEN)
NAN_BOXED(0x7e254961,32,FLEN)
NAN_BOXED(0x40c63fe0,32,FLEN)
NAN_BOXED(0x7f249249,32,FLEN)
NAN_BOXED(0x7e254961,32,FLEN)
NAN_BOXED(0x40c63fe0,32,FLEN)
NAN_BOXED(0x7f333333,32,FLEN)
NAN_BOXED(0x7e254961,32,FLEN)
NAN_BOXED(0x40c63fe0,32,FLEN)
NAN_BOXED(0x7f36db6d,32,FLEN)
NAN_BOXED(0x7e254961,32,FLEN)
NAN_BOXED(0x40c63fe0,32,FLEN)
NAN_BOXED(0x7f3bbbbb,32,FLEN)
NAN_BOXED(0x7e254961,32,FLEN)
NAN_BOXED(0x40c63fe0,32,FLEN)
NAN_BOXED(0x7f444444,32,FLEN)
NAN_BOXED(0x7e254961,32,FLEN)
NAN_BOXED(0x40c63fe0,32,FLEN)
NAN_BOXED(0x7f4ccccc,32,FLEN)
NAN_BOXED(0x7e254961,32,FLEN)
NAN_BOXED(0x40c63fe0,32,FLEN)
NAN_BOXED(0x7f5b6db6,32,FLEN)
NAN_BOXED(0x7e254961,32,FLEN)
NAN_BOXED(0x40c63fe0,32,FLEN)
NAN_BOXED(0x7f666666,32,FLEN)
NAN_BOXED(0x7e254961,32,FLEN)
NAN_BOXED(0x40c63fe0,32,FLEN)
NAN_BOXED(0x7f6db6db,32,FLEN)
NAN_BOXED(0x7e254961,32,FLEN)
NAN_BOXED(0x40c63fe0,32,FLEN)
NAN_BOXED(0x7f7ffff8,32,FLEN)
NAN_BOXED(0x7e254961,32,FLEN)
NAN_BOXED(0x40c63fe0,32,FLEN)
NAN_BOXED(0x7f7ffffc,32,FLEN)
NAN_BOXED(0x7e254961,32,FLEN)
NAN_BOXED(0x40c63fe0,32,FLEN)
NAN_BOXED(0x7f7ffffe,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000001,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000003,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000007,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80199999,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80249249,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80333333,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8036db6d,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x803bbbbb,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80444444,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x804ccccc,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x805b6db6,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80666666,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x806db6db,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffff8,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffc,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffe,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87800000,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87800001,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87800003,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87800007,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8780000f,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8780001f,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8780003f,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8780007f,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x878000ff,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x878001ff,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x878003ff,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x878007ff,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87800fff,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87801fff,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87803fff,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87807fff,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8780ffff,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8781ffff,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8783ffff,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8787ffff,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x878fffff,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x879fffff,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87bfffff,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87c00000,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87e00000,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87f00000,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87f80000,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87fc0000,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87fe0000,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87ff0000,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87ff8000,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87ffc000,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87ffe000,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87fff000,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87fff800,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87fffc00,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87fffe00,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87ffff00,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87ffff80,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87ffffc0,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87ffffe0,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87fffff0,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87fffff8,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87fffffc,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87fffffe,32,FLEN)
NAN_BOXED(0x7e2580de,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87ffffff,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800001,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800003,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800007,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x999999,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa49249,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb33333,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb6db6d,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbbbbbb,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc44444,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcccccc,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdb6db6,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe66666,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xedb6db,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffff8,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffc,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffe,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x62800000,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x62800001,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x62800003,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x62800007,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6280000f,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6280001f,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6280003f,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6280007f,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x628000ff,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x628001ff,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x628003ff,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x628007ff,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x62800fff,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x62801fff,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x62803fff,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x62807fff,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6280ffff,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6281ffff,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6283ffff,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6287ffff,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x628fffff,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x629fffff,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x62bfffff,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x62c00000,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x62e00000,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x62f00000,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x62f80000,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x62fc0000,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x62fe0000,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x62ff0000,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x62ff8000,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x62ffc000,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x62ffe000,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x62fff000,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x62fff800,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x62fffc00,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x62fffe00,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x62ffff00,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x62ffff80,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x62ffffc0,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x62ffffe0,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x62fffff0,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x62fffff8,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x62fffffc,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x62fffffe,32,FLEN)
NAN_BOXED(0x7e25d078,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x62ffffff,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000001,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000003,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000007,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80199999,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80249249,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80333333,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8036db6d,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x803bbbbb,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80444444,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x804ccccc,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x805b6db6,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80666666,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x806db6db,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffff8,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffc,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffe,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86000000,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86000001,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86000003,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86000007,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8600000f,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8600001f,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8600003f,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8600007f,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x860000ff,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x860001ff,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x860003ff,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x860007ff,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86000fff,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86001fff,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86003fff,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86007fff,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8600ffff,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8601ffff,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8603ffff,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8607ffff,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x860fffff,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x861fffff,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x863fffff,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86400000,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86600000,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86700000,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86780000,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867c0000,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867e0000,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867f0000,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867f8000,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867fc000,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867fe000,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867ff000,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867ff800,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867ffc00,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867ffe00,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867fff00,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867fff80,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867fffc0,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867fffe0,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867ffff0,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867ffff8,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867ffffc,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867ffffe,32,FLEN)
NAN_BOXED(0x7e264afa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867fffff,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb5800000,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb5800001,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb5800003,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb5800007,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb580000f,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb580001f,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb580003f,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb580007f,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb58000ff,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb58001ff,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb58003ff,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb58007ff,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb5800fff,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb5801fff,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb5803fff,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb5807fff,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb580ffff,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb581ffff,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb583ffff,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb587ffff,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb58fffff,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb59fffff,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb5bfffff,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb5c00000,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb5e00000,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb5f00000,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb5f80000,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb5fc0000,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb5fe0000,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb5ff0000,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb5ff8000,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb5ffc000,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb5ffe000,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb5fff000,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb5fff800,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb5fffc00,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb5fffe00,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb5ffff00,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb5ffff80,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb5ffffc0,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb5ffffe0,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb5fffff0,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb5fffff8,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb5fffffc,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb5fffffe,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xb5ffffff,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7e2851a5,32,FLEN)
NAN_BOXED(0x80c2ad94,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xef800000,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xef800001,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xef800003,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xef800007,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xef80000f,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xef80001f,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xef80003f,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xef80007f,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xef8000ff,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xef8001ff,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xef8003ff,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xef8007ff,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xef800fff,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xef801fff,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xef803fff,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xef807fff,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xef80ffff,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xef81ffff,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xef83ffff,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xef87ffff,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xef8fffff,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xef9fffff,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xefbfffff,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xefc00000,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xefe00000,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xeff00000,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xeff80000,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xeffc0000,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xeffe0000,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xefff0000,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xefff8000,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xefffc000,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xefffe000,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xeffff000,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xeffff800,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xeffffc00,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xeffffe00,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xefffff00,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xefffff80,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xefffffc0,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xefffffe0,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xeffffff0,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xeffffff8,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xeffffffc,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xeffffffe,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xefffffff,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xff000001,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xff000003,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xff000007,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xff199999,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xff249249,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xff333333,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xff36db6d,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xff3bbbbb,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xff444444,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xff4ccccc,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xff5b6db6,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xff666666,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xff6db6db,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xff7ffff8,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xff7ffffc,32,FLEN)
NAN_BOXED(0x7e2c70b2,32,FLEN)
NAN_BOXED(0xc0be0677,32,FLEN)
NAN_BOXED(0xff7ffffe,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x3f800001,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x3f800003,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x3f800007,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x3f999999,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x3fa49249,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x3fb33333,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x3fb6db6d,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x3fbbbbbb,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x3fc44444,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x3fcccccc,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x3fdb6db6,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x3fe66666,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x3fedb6db,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x3ffffff8,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x3ffffffc,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x3ffffffe,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4b800000,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4b800001,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4b800003,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4b800007,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4b80000f,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4b80001f,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4b80003f,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4b80007f,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4b8000ff,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4b8001ff,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4b8003ff,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4b8007ff,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4b800fff,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4b801fff,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4b803fff,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4b807fff,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4b80ffff,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4b81ffff,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4b83ffff,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4b87ffff,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4b8fffff,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4b9fffff,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4bbfffff,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4bc00000,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4be00000,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4bf00000,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4bf80000,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4bfc0000,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4bfe0000,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4bff0000,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4bff8000,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4bffc000,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4bffe000,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4bfff000,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4bfff800,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4bfffc00,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4bfffe00,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4bffff00,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4bffff80,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4bffffc0,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4bffffe0,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4bfffff0,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4bfffff8,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4bfffffc,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4bfffffe,32,FLEN)
NAN_BOXED(0x7e2f4293,32,FLEN)
NAN_BOXED(0xbaf7c5,32,FLEN)
NAN_BOXED(0x4bffffff,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x3f800001,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x3f800003,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x3f800007,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x3f999999,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x3fa49249,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x3fb33333,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x3fb6db6d,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x3fbbbbbb,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x3fc44444,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x3fcccccc,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x3fdb6db6,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x3fe66666,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x3fedb6db,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x3ffffff8,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x3ffffffc,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x3ffffffe,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x47800000,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x47800001,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x47800003,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x47800007,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x4780000f,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x4780001f,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x4780003f,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x4780007f,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x478000ff,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x478001ff,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x478003ff,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x478007ff,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x47800fff,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x47801fff,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x47803fff,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x47807fff,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x4780ffff,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x4781ffff,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x4783ffff,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x4787ffff,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x478fffff,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x479fffff,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x47bfffff,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x47c00000,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x47e00000,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x47f00000,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x47f80000,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x47fc0000,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x47fe0000,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x47ff0000,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x47ff8000,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x47ffc000,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x47ffe000,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x47fff000,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x47fff800,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x47fffc00,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x47fffe00,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x47ffff00,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x47ffff80,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x47ffffc0,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x47ffffe0,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x47fffff0,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x47fffff8,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x47fffffc,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x47fffffe,32,FLEN)
NAN_BOXED(0x7e31e93d,32,FLEN)
NAN_BOXED(0xb82e90,32,FLEN)
NAN_BOXED(0x47ffffff,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000001,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000003,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000007,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80199999,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80249249,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80333333,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8036db6d,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x803bbbbb,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80444444,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x804ccccc,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x805b6db6,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80666666,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x806db6db,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffff8,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffc,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffe,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x89000000,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x89000001,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x89000003,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x89000007,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8900000f,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8900001f,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8900003f,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8900007f,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x890000ff,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x890001ff,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x890003ff,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x890007ff,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x89000fff,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x89001fff,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x89003fff,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x89007fff,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8900ffff,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8901ffff,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8903ffff,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8907ffff,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x890fffff,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x891fffff,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x893fffff,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x89400000,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x89600000,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x89700000,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x89780000,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897c0000,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897e0000,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897f0000,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897f8000,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897fc000,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897fe000,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897ff000,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897ff800,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897ffc00,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897ffe00,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897fff00,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897fff80,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897fffc0,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897fffe0,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897ffff0,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897ffff8,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897ffffc,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897ffffe,32,FLEN)
NAN_BOXED(0x7e324298,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897fffff,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000001,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000003,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000007,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80199999,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80249249,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80333333,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8036db6d,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x803bbbbb,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80444444,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x804ccccc,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x805b6db6,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80666666,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x806db6db,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffff8,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffc,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffe,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88000000,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88000001,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88000003,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88000007,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8800000f,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8800001f,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8800003f,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8800007f,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x880000ff,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x880001ff,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x880003ff,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x880007ff,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88000fff,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88001fff,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88003fff,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88007fff,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8800ffff,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8801ffff,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8803ffff,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8807ffff,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x880fffff,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x881fffff,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x883fffff,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88400000,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88600000,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88700000,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88780000,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x887c0000,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x887e0000,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x887f0000,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x887f8000,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x887fc000,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x887fe000,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x887ff000,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x887ff800,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x887ffc00,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x887ffe00,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x887fff00,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x887fff80,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x887fffc0,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x887fffe0,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x887ffff0,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x887ffff8,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x887ffffc,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x887ffffe,32,FLEN)
NAN_BOXED(0x7e32e0b8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x887fffff,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x199999,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x249249,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x333333,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x36db6d,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3bbbbb,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x444444,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ccccc,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5b6db6,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x666666,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6db6db,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff8,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffc,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffe,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc800000,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc800001,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc800003,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc800007,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc80000f,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc80001f,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc80003f,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc80007f,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc8000ff,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc8001ff,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc8003ff,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc8007ff,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc800fff,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc801fff,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc803fff,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc807fff,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc80ffff,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc81ffff,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc83ffff,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc87ffff,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc8fffff,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc9fffff,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcbfffff,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcc00000,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xce00000,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcf00000,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcf80000,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcfc0000,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcfe0000,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcff0000,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcff8000,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcffc000,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcffe000,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcfff000,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcfff800,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcfffc00,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcfffe00,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcffff00,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcffff80,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcffffc0,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcffffe0,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcfffff0,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcfffff8,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcfffffc,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcfffffe,32,FLEN)
NAN_BOXED(0x7e3557bf,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcffffff,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x73800000,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x73800001,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x73800003,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x73800007,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x7380000f,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x7380001f,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x7380003f,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x7380007f,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x738000ff,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x738001ff,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x738003ff,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x738007ff,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x73800fff,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x73801fff,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x73803fff,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x73807fff,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x7380ffff,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x7381ffff,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x7383ffff,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x7387ffff,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x738fffff,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x739fffff,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x73bfffff,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x73c00000,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x73e00000,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x73f00000,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x73f80000,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x73fc0000,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x73fe0000,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x73ff0000,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x73ff8000,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x73ffc000,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x73ffe000,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x73fff000,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x73fff800,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x73fffc00,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x73fffe00,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x73ffff00,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x73ffff80,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x73ffffc0,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x73ffffe0,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x73fffff0,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x73fffff8,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x73fffffc,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x73fffffe,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x73ffffff,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x7f000001,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x7f000003,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x7f000007,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x7f199999,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x7f249249,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x7f333333,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x7f36db6d,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x7f3bbbbb,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x7f444444,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x7f4ccccc,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x7f5b6db6,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x7f666666,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x7f6db6db,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x7f7ffff8,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x7f7ffffc,32,FLEN)
NAN_BOXED(0x7e397e0b,32,FLEN)
NAN_BOXED(0x40b0a776,32,FLEN)
NAN_BOXED(0x7f7ffffe,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x3f800001,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x3f800003,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x3f800007,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x3f999999,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x3fa49249,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x3fb33333,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x3fb6db6d,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x3fbbbbbb,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x3fc44444,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x3fcccccc,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x3fdb6db6,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x3fe66666,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x3fedb6db,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x3ffffff8,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x3ffffffc,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x3ffffffe,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x49800000,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x49800001,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x49800003,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x49800007,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x4980000f,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x4980001f,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x4980003f,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x4980007f,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x498000ff,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x498001ff,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x498003ff,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x498007ff,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x49800fff,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x49801fff,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x49803fff,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x49807fff,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x4980ffff,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x4981ffff,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x4983ffff,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x4987ffff,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x498fffff,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x499fffff,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x49bfffff,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x49c00000,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x49e00000,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x49f00000,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x49f80000,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x49fc0000,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x49fe0000,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x49ff0000,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x49ff8000,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x49ffc000,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x49ffe000,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x49fff000,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x49fff800,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x49fffc00,32,FLEN)
NAN_BOXED(0x7e3d8318,32,FLEN)
NAN_BOXED(0xace83c,32,FLEN)
NAN_BOXED(0x49fffe00,32,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;


signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_2:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_3:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_4:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_5:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_6:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine

tsig_begin_canary:
CANARY;
tsig_begin_canary:
CANARY;
mtrap_sigptr:
    .fill 64*(XLEN/32),4,0xdeadbeef
tsig_end_canary:
CANARY;
tsig_end_canary:
CANARY;

#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif

sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
