
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.7.1
// timestamp : Fri Jun 17 14:18:09 2022 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /scratch/pawan/work/normalised/RV32F/fnmadd.s.cgf \
 \
//                  -- xlen 32  \
//                  --randomize \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fnmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fnmadd_b4 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fnmadd_b4)

RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_0:
// rd == rs2 == rs3 != rs1, rs1==f20, rs2==f30, rs3==f30, rd==f30,fs1 == 0 and fe1 == 0xf3 and fm1 == 0x319f1b and fs2 == 1 and fe2 == 0x88 and fm2 == 0x3a9ca3 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7e85b6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f20; op2:f30; op3:f30; dest:f30; op1val:0x79b19f1b; op2val:0xc43a9ca3;
op3val:0xc43a9ca3; valaddr_reg:x3; val_offset:0*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f30, f20, f30, f30, dyn, 0, 0, x3, 0*FLEN/8, x4, x1, x2)

inst_1:
// rs1 == rs2 != rs3 and rs1 == rs2 != rd and rd != rs3, rs1==f13, rs2==f13, rs3==f24, rd==f21,fs1 == 0 and fe1 == 0xf3 and fm1 == 0x319f1b and fs2 == 1 and fe2 == 0x88 and fm2 == 0x3a9ca3 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7e85b6 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f13; op2:f13; op3:f24; dest:f21; op1val:0x79b19f1b; op2val:0x79b19f1b;
op3val:0x7efe85b6; valaddr_reg:x3; val_offset:3*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmadd.s, f21, f13, f13, f24, dyn, 32, 0, x3, 3*FLEN/8, x4, x1, x2)

inst_2:
// rs3 == rd != rs1 and rs3 == rd != rs2 and rs2 != rs1, rs1==f1, rs2==f8, rs3==f15, rd==f15,fs1 == 0 and fe1 == 0xf3 and fm1 == 0x319f1b and fs2 == 1 and fe2 == 0x88 and fm2 == 0x3a9ca3 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7e85b6 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f1; op2:f8; op3:f15; dest:f15; op1val:0x79b19f1b; op2val:0xc43a9ca3;
op3val:0x7efe85b6; valaddr_reg:x3; val_offset:6*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmadd.s, f15, f1, f8, f15, dyn, 64, 0, x3, 6*FLEN/8, x4, x1, x2)

inst_3:
// rs2 == rs3 != rs1 and rs2 == rs3 != rd and rd != rs1, rs1==f28, rs2==f1, rs3==f1, rd==f10,fs1 == 0 and fe1 == 0xf3 and fm1 == 0x319f1b and fs2 == 1 and fe2 == 0x88 and fm2 == 0x3a9ca3 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7e85b6 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f28; op2:f1; op3:f1; dest:f10; op1val:0x79b19f1b; op2val:0xc43a9ca3;
op3val:0xc43a9ca3; valaddr_reg:x3; val_offset:9*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmadd.s, f10, f28, f1, f1, dyn, 96, 0, x3, 9*FLEN/8, x4, x1, x2)

inst_4:
// rs1 == rd != rs2 and rs1 == rd != rs3 and rs3 != rs2, rs1==f16, rs2==f31, rs3==f4, rd==f16,fs1 == 0 and fe1 == 0xf3 and fm1 == 0x319f1b and fs2 == 1 and fe2 == 0x88 and fm2 == 0x3a9ca3 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7e85b6 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f16; op2:f31; op3:f4; dest:f16; op1val:0x79b19f1b; op2val:0xc43a9ca3;
op3val:0x7efe85b6; valaddr_reg:x3; val_offset:12*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmadd.s, f16, f16, f31, f4, dyn, 128, 0, x3, 12*FLEN/8, x4, x1, x2)

inst_5:
// rs1 != rs2 and rs1 != rd and rs1 != rs3 and rs2 != rs3 and rs2 != rd and rs3 != rd, rs1==f25, rs2==f19, rs3==f28, rd==f13,fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2e9fe8 and fs2 == 1 and fe2 == 0x84 and fm2 == 0x669d12 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0ac4bf and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f25; op2:f19; op3:f28; dest:f13; op1val:0x7cae9fe8; op2val:0xc2669d12;
op3val:0x7e8ac4bf; valaddr_reg:x3; val_offset:15*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f13, f25, f19, f28, dyn, 0, 0, x3, 15*FLEN/8, x4, x1, x2)

inst_6:
// rs2 == rd != rs1 and rs2 == rd != rs3 and rs3 != rs1, rs1==f22, rs2==f25, rs3==f8, rd==f25,fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2e9fe8 and fs2 == 1 and fe2 == 0x84 and fm2 == 0x669d12 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0ac4bf and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f22; op2:f25; op3:f8; dest:f25; op1val:0x7cae9fe8; op2val:0xc2669d12;
op3val:0x7e8ac4bf; valaddr_reg:x3; val_offset:18*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmadd.s, f25, f22, f25, f8, dyn, 32, 0, x3, 18*FLEN/8, x4, x1, x2)

inst_7:
// rs1 == rs2 == rd != rs3, rs1==f0, rs2==f0, rs3==f29, rd==f0,fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2e9fe8 and fs2 == 1 and fe2 == 0x84 and fm2 == 0x669d12 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0ac4bf and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f0; op2:f0; op3:f29; dest:f0; op1val:0x7cae9fe8; op2val:0x7cae9fe8;
op3val:0x7e8ac4bf; valaddr_reg:x3; val_offset:21*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmadd.s, f0, f0, f0, f29, dyn, 64, 0, x3, 21*FLEN/8, x4, x1, x2)

inst_8:
// rs1 == rs3 != rs2 and rs1 == rs3 != rd and rd != rs2, rs1==f31, rs2==f9, rs3==f31, rd==f28,fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2e9fe8 and fs2 == 1 and fe2 == 0x84 and fm2 == 0x669d12 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0ac4bf and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f31; op2:f9; op3:f31; dest:f28; op1val:0x7cae9fe8; op2val:0xc2669d12;
op3val:0x7cae9fe8; valaddr_reg:x3; val_offset:24*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmadd.s, f28, f31, f9, f31, dyn, 96, 0, x3, 24*FLEN/8, x4, x1, x2)

inst_9:
// rs1 == rd == rs3 != rs2, rs1==f23, rs2==f12, rs3==f23, rd==f23,fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2e9fe8 and fs2 == 1 and fe2 == 0x84 and fm2 == 0x669d12 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0ac4bf and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f23; op2:f12; op3:f23; dest:f23; op1val:0x7cae9fe8; op2val:0xc2669d12;
op3val:0x7cae9fe8; valaddr_reg:x3; val_offset:27*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmadd.s, f23, f23, f12, f23, dyn, 128, 0, x3, 27*FLEN/8, x4, x1, x2)

inst_10:
// rs1 == rs2 == rs3 != rd, rs1==f7, rs2==f7, rs3==f7, rd==f12,fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f0e02 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x093dc1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x19a77e and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f7; op2:f7; op3:f7; dest:f12; op1val:0x7d8f0e02; op2val:0x7d8f0e02;
op3val:0x7d8f0e02; valaddr_reg:x3; val_offset:30*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f12, f7, f7, f7, dyn, 0, 0, x3, 30*FLEN/8, x4, x1, x2)

inst_11:
// rs1 == rs2 == rs3 == rd, rs1==f2, rs2==f2, rs3==f2, rd==f2,fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f0e02 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x093dc1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x19a77e and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f2; op2:f2; op3:f2; dest:f2; op1val:0x7d8f0e02; op2val:0x7d8f0e02;
op3val:0x7d8f0e02; valaddr_reg:x3; val_offset:33*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmadd.s, f2, f2, f2, f2, dyn, 32, 0, x3, 33*FLEN/8, x4, x1, x2)

inst_12:
// rs1==f21, rs2==f3, rs3==f25, rd==f11,fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f0e02 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x093dc1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x19a77e and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f21; op2:f3; op3:f25; dest:f11; op1val:0x7d8f0e02; op2val:0xc0093dc1;
op3val:0x7f19a77e; valaddr_reg:x3; val_offset:36*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmadd.s, f11, f21, f3, f25, dyn, 64, 0, x3, 36*FLEN/8, x4, x1, x2)

inst_13:
// rs1==f26, rs2==f20, rs3==f16, rd==f9,fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f0e02 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x093dc1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x19a77e and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f26; op2:f20; op3:f16; dest:f9; op1val:0x7d8f0e02; op2val:0xc0093dc1;
op3val:0x7f19a77e; valaddr_reg:x3; val_offset:39*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmadd.s, f9, f26, f20, f16, dyn, 96, 0, x3, 39*FLEN/8, x4, x1, x2)

inst_14:
// rs1==f12, rs2==f6, rs3==f26, rd==f7,fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f0e02 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x093dc1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x19a77e and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f12; op2:f6; op3:f26; dest:f7; op1val:0x7d8f0e02; op2val:0xc0093dc1;
op3val:0x7f19a77e; valaddr_reg:x3; val_offset:42*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmadd.s, f7, f12, f6, f26, dyn, 128, 0, x3, 42*FLEN/8, x4, x1, x2)

inst_15:
// rs1==f3, rs2==f4, rs3==f5, rd==f6,fs1 == 0 and fe1 == 0xfb and fm1 == 0x100bf1 and fs2 == 0 and fe2 == 0x7e and fm2 == 0x44fc96 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x176ba2 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f3; op2:f4; op3:f5; dest:f6; op1val:0x7d900bf1; op2val:0x3f44fc96;
op3val:0x7e176ba2; valaddr_reg:x3; val_offset:45*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f6, f3, f4, f5, dyn, 0, 0, x3, 45*FLEN/8, x4, x1, x2)

inst_16:
// rs1==f8, rs2==f17, rs3==f22, rd==f1,fs1 == 0 and fe1 == 0xfb and fm1 == 0x100bf1 and fs2 == 0 and fe2 == 0x7e and fm2 == 0x44fc96 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x176ba2 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f8; op2:f17; op3:f22; dest:f1; op1val:0x7d900bf1; op2val:0x3f44fc96;
op3val:0x7e176ba2; valaddr_reg:x3; val_offset:48*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmadd.s, f1, f8, f17, f22, dyn, 32, 0, x3, 48*FLEN/8, x4, x1, x2)

inst_17:
// rs1==f19, rs2==f21, rs3==f14, rd==f26,fs1 == 0 and fe1 == 0xfb and fm1 == 0x100bf1 and fs2 == 0 and fe2 == 0x7e and fm2 == 0x44fc96 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x176ba2 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f19; op2:f21; op3:f14; dest:f26; op1val:0x7d900bf1; op2val:0x3f44fc96;
op3val:0x7e176ba2; valaddr_reg:x3; val_offset:51*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmadd.s, f26, f19, f21, f14, dyn, 64, 0, x3, 51*FLEN/8, x4, x1, x2)

inst_18:
// rs1==f11, rs2==f23, rs3==f20, rd==f31,fs1 == 0 and fe1 == 0xfb and fm1 == 0x100bf1 and fs2 == 0 and fe2 == 0x7e and fm2 == 0x44fc96 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x176ba2 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f11; op2:f23; op3:f20; dest:f31; op1val:0x7d900bf1; op2val:0x3f44fc96;
op3val:0x7e176ba2; valaddr_reg:x3; val_offset:54*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmadd.s, f31, f11, f23, f20, dyn, 96, 0, x3, 54*FLEN/8, x4, x1, x2)

inst_19:
// rs1==f15, rs2==f24, rs3==f0, rd==f14,fs1 == 0 and fe1 == 0xfb and fm1 == 0x100bf1 and fs2 == 0 and fe2 == 0x7e and fm2 == 0x44fc96 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x176ba2 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f15; op2:f24; op3:f0; dest:f14; op1val:0x7d900bf1; op2val:0x3f44fc96;
op3val:0x7e176ba2; valaddr_reg:x3; val_offset:57*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmadd.s, f14, f15, f24, f0, dyn, 128, 0, x3, 57*FLEN/8, x4, x1, x2)

inst_20:
// rs1==f17, rs2==f14, rs3==f13, rd==f24,fs1 == 0 and fe1 == 0xfb and fm1 == 0x337137 and fs2 == 1 and fe2 == 0x84 and fm2 == 0x7b3938 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7e7e1b and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f17; op2:f14; op3:f13; dest:f24; op1val:0x7db37137; op2val:0xc27b3938;
op3val:0x7efe7e1b; valaddr_reg:x3; val_offset:60*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f24, f17, f14, f13, dyn, 0, 0, x3, 60*FLEN/8, x4, x1, x2)

inst_21:
// rs1==f14, rs2==f10, rs3==f18, rd==f17,fs1 == 0 and fe1 == 0xfb and fm1 == 0x337137 and fs2 == 1 and fe2 == 0x84 and fm2 == 0x7b3938 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7e7e1b and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f14; op2:f10; op3:f18; dest:f17; op1val:0x7db37137; op2val:0xc27b3938;
op3val:0x7efe7e1b; valaddr_reg:x3; val_offset:63*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmadd.s, f17, f14, f10, f18, dyn, 32, 0, x3, 63*FLEN/8, x4, x1, x2)

inst_22:
// rs1==f18, rs2==f15, rs3==f17, rd==f27,fs1 == 0 and fe1 == 0xfb and fm1 == 0x337137 and fs2 == 1 and fe2 == 0x84 and fm2 == 0x7b3938 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7e7e1b and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f18; op2:f15; op3:f17; dest:f27; op1val:0x7db37137; op2val:0xc27b3938;
op3val:0x7efe7e1b; valaddr_reg:x3; val_offset:66*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmadd.s, f27, f18, f15, f17, dyn, 64, 0, x3, 66*FLEN/8, x4, x1, x2)

inst_23:
// rs1==f29, rs2==f16, rs3==f19, rd==f3,fs1 == 0 and fe1 == 0xfb and fm1 == 0x337137 and fs2 == 1 and fe2 == 0x84 and fm2 == 0x7b3938 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7e7e1b and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f29; op2:f16; op3:f19; dest:f3; op1val:0x7db37137; op2val:0xc27b3938;
op3val:0x7efe7e1b; valaddr_reg:x3; val_offset:69*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmadd.s, f3, f29, f16, f19, dyn, 96, 0, x3, 69*FLEN/8, x4, x1, x2)

inst_24:
// rs1==f10, rs2==f22, rs3==f11, rd==f4,fs1 == 0 and fe1 == 0xfb and fm1 == 0x337137 and fs2 == 1 and fe2 == 0x84 and fm2 == 0x7b3938 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7e7e1b and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f10; op2:f22; op3:f11; dest:f4; op1val:0x7db37137; op2val:0xc27b3938;
op3val:0x7efe7e1b; valaddr_reg:x3; val_offset:72*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmadd.s, f4, f10, f22, f11, dyn, 128, 0, x3, 72*FLEN/8, x4, x1, x2)

inst_25:
// rs1==f30, rs2==f29, rs3==f27, rd==f20,fs1 == 0 and fe1 == 0xfc and fm1 == 0x14365e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14091c and fs3 == 0 and fe3 == 0xfd and fm3 == 0x549695 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f27; dest:f20; op1val:0x7e14365e; op2val:0xc014091c;
op3val:0x7ed49695; valaddr_reg:x3; val_offset:75*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f20, f30, f29, f27, dyn, 0, 0, x3, 75*FLEN/8, x4, x1, x2)

inst_26:
// rs1==f4, rs2==f26, rs3==f12, rd==f29,fs1 == 0 and fe1 == 0xfc and fm1 == 0x14365e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14091c and fs3 == 0 and fe3 == 0xfd and fm3 == 0x549695 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f4; op2:f26; op3:f12; dest:f29; op1val:0x7e14365e; op2val:0xc014091c;
op3val:0x7ed49695; valaddr_reg:x3; val_offset:78*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmadd.s, f29, f4, f26, f12, dyn, 32, 0, x3, 78*FLEN/8, x4, x1, x2)

inst_27:
// rs1==f5, rs2==f27, rs3==f3, rd==f18,fs1 == 0 and fe1 == 0xfc and fm1 == 0x14365e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14091c and fs3 == 0 and fe3 == 0xfd and fm3 == 0x549695 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f5; op2:f27; op3:f3; dest:f18; op1val:0x7e14365e; op2val:0xc014091c;
op3val:0x7ed49695; valaddr_reg:x3; val_offset:81*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmadd.s, f18, f5, f27, f3, dyn, 64, 0, x3, 81*FLEN/8, x4, x1, x2)

inst_28:
// rs1==f6, rs2==f28, rs3==f21, rd==f5,fs1 == 0 and fe1 == 0xfc and fm1 == 0x14365e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14091c and fs3 == 0 and fe3 == 0xfd and fm3 == 0x549695 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f6; op2:f28; op3:f21; dest:f5; op1val:0x7e14365e; op2val:0xc014091c;
op3val:0x7ed49695; valaddr_reg:x3; val_offset:84*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmadd.s, f5, f6, f28, f21, dyn, 96, 0, x3, 84*FLEN/8, x4, x1, x2)

inst_29:
// rs1==f24, rs2==f11, rs3==f10, rd==f8,fs1 == 0 and fe1 == 0xfc and fm1 == 0x14365e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14091c and fs3 == 0 and fe3 == 0xfd and fm3 == 0x549695 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f24; op2:f11; op3:f10; dest:f8; op1val:0x7e14365e; op2val:0xc014091c;
op3val:0x7ed49695; valaddr_reg:x3; val_offset:87*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmadd.s, f8, f24, f11, f10, dyn, 128, 0, x3, 87*FLEN/8, x4, x1, x2)

inst_30:
// rs1==f27, rs2==f18, rs3==f9, rd==f19,fs1 == 0 and fe1 == 0xfc and fm1 == 0x1a457f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x103bee and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7bacd4 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f27; op2:f18; op3:f9; dest:f19; op1val:0x7e1a457f; op2val:0x40903bee;
op3val:0x7efbacd4; valaddr_reg:x3; val_offset:90*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f19, f27, f18, f9, dyn, 0, 0, x3, 90*FLEN/8, x4, x1, x2)

inst_31:
// rs1==f9, rs2==f5, rs3==f6, rd==f22,fs1 == 0 and fe1 == 0xfc and fm1 == 0x1a457f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x103bee and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7bacd4 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f9; op2:f5; op3:f6; dest:f22; op1val:0x7e1a457f; op2val:0x40903bee;
op3val:0x7efbacd4; valaddr_reg:x3; val_offset:93*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmadd.s, f22, f9, f5, f6, dyn, 32, 0, x3, 93*FLEN/8, x4, x1, x2)

inst_32:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1a457f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x103bee and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7bacd4 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1a457f; op2val:0x40903bee;
op3val:0x7efbacd4; valaddr_reg:x3; val_offset:96*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 96*FLEN/8, x4, x1, x2)

inst_33:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1a457f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x103bee and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7bacd4 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1a457f; op2val:0x40903bee;
op3val:0x7efbacd4; valaddr_reg:x3; val_offset:99*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 99*FLEN/8, x4, x1, x2)

inst_34:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1a457f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x103bee and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7bacd4 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1a457f; op2val:0x40903bee;
op3val:0x7efbacd4; valaddr_reg:x3; val_offset:102*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 102*FLEN/8, x4, x1, x2)

inst_35:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x516e9f and fs2 == 1 and fe2 == 0x7e and fm2 == 0x39f488 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x19f7bf and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e516e9f; op2val:0xbf39f488;
op3val:0x7f19f7bf; valaddr_reg:x3; val_offset:105*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105*FLEN/8, x4, x1, x2)

inst_36:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x516e9f and fs2 == 1 and fe2 == 0x7e and fm2 == 0x39f488 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x19f7bf and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e516e9f; op2val:0xbf39f488;
op3val:0x7f19f7bf; valaddr_reg:x3; val_offset:108*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 108*FLEN/8, x4, x1, x2)

inst_37:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x516e9f and fs2 == 1 and fe2 == 0x7e and fm2 == 0x39f488 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x19f7bf and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e516e9f; op2val:0xbf39f488;
op3val:0x7f19f7bf; valaddr_reg:x3; val_offset:111*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 111*FLEN/8, x4, x1, x2)

inst_38:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x516e9f and fs2 == 1 and fe2 == 0x7e and fm2 == 0x39f488 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x19f7bf and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e516e9f; op2val:0xbf39f488;
op3val:0x7f19f7bf; valaddr_reg:x3; val_offset:114*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 114*FLEN/8, x4, x1, x2)

inst_39:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x516e9f and fs2 == 1 and fe2 == 0x7e and fm2 == 0x39f488 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x19f7bf and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e516e9f; op2val:0xbf39f488;
op3val:0x7f19f7bf; valaddr_reg:x3; val_offset:117*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 117*FLEN/8, x4, x1, x2)

inst_40:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6fd4df and fs2 == 0 and fe2 == 0x83 and fm2 == 0x51f880 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x16b33b and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6fd4df; op2val:0x41d1f880;
op3val:0x7e16b33b; valaddr_reg:x3; val_offset:120*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 120*FLEN/8, x4, x1, x2)

inst_41:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6fd4df and fs2 == 0 and fe2 == 0x83 and fm2 == 0x51f880 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x16b33b and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6fd4df; op2val:0x41d1f880;
op3val:0x7e16b33b; valaddr_reg:x3; val_offset:123*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 123*FLEN/8, x4, x1, x2)

inst_42:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6fd4df and fs2 == 0 and fe2 == 0x83 and fm2 == 0x51f880 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x16b33b and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6fd4df; op2val:0x41d1f880;
op3val:0x7e16b33b; valaddr_reg:x3; val_offset:126*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 126*FLEN/8, x4, x1, x2)

inst_43:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6fd4df and fs2 == 0 and fe2 == 0x83 and fm2 == 0x51f880 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x16b33b and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6fd4df; op2val:0x41d1f880;
op3val:0x7e16b33b; valaddr_reg:x3; val_offset:129*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 129*FLEN/8, x4, x1, x2)

inst_44:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6fd4df and fs2 == 0 and fe2 == 0x83 and fm2 == 0x51f880 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x16b33b and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6fd4df; op2val:0x41d1f880;
op3val:0x7e16b33b; valaddr_reg:x3; val_offset:132*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 132*FLEN/8, x4, x1, x2)

inst_45:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0a62c0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x19b337 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3315e5 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8a62c0; op2val:0x3f99b337;
op3val:0x7f3315e5; valaddr_reg:x3; val_offset:135*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 135*FLEN/8, x4, x1, x2)

inst_46:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0a62c0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x19b337 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3315e5 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8a62c0; op2val:0x3f99b337;
op3val:0x7f3315e5; valaddr_reg:x3; val_offset:138*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 138*FLEN/8, x4, x1, x2)

inst_47:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0a62c0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x19b337 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3315e5 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8a62c0; op2val:0x3f99b337;
op3val:0x7f3315e5; valaddr_reg:x3; val_offset:141*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 141*FLEN/8, x4, x1, x2)

inst_48:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0a62c0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x19b337 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3315e5 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8a62c0; op2val:0x3f99b337;
op3val:0x7f3315e5; valaddr_reg:x3; val_offset:144*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 144*FLEN/8, x4, x1, x2)

inst_49:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0a62c0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x19b337 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3315e5 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8a62c0; op2val:0x3f99b337;
op3val:0x7f3315e5; valaddr_reg:x3; val_offset:147*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 147*FLEN/8, x4, x1, x2)

inst_50:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f4b27 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x1db103 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x13dde9 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f4b27; op2val:0xbf1db103;
op3val:0x7f13dde9; valaddr_reg:x3; val_offset:150*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 150*FLEN/8, x4, x1, x2)

inst_51:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f4b27 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x1db103 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x13dde9 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f4b27; op2val:0xbf1db103;
op3val:0x7f13dde9; valaddr_reg:x3; val_offset:153*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 153*FLEN/8, x4, x1, x2)

inst_52:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f4b27 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x1db103 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x13dde9 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f4b27; op2val:0xbf1db103;
op3val:0x7f13dde9; valaddr_reg:x3; val_offset:156*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 156*FLEN/8, x4, x1, x2)

inst_53:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f4b27 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x1db103 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x13dde9 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f4b27; op2val:0xbf1db103;
op3val:0x7f13dde9; valaddr_reg:x3; val_offset:159*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 159*FLEN/8, x4, x1, x2)

inst_54:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f4b27 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x1db103 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x13dde9 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f4b27; op2val:0xbf1db103;
op3val:0x7f13dde9; valaddr_reg:x3; val_offset:162*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 162*FLEN/8, x4, x1, x2)

inst_55:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3493df and fs2 == 1 and fe2 == 0x7e and fm2 == 0x02cca2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x11de47 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb493df; op2val:0xbf02cca2;
op3val:0x7f11de47; valaddr_reg:x3; val_offset:165*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 165*FLEN/8, x4, x1, x2)

inst_56:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3493df and fs2 == 1 and fe2 == 0x7e and fm2 == 0x02cca2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x11de47 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb493df; op2val:0xbf02cca2;
op3val:0x7f11de47; valaddr_reg:x3; val_offset:168*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 168*FLEN/8, x4, x1, x2)

inst_57:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3493df and fs2 == 1 and fe2 == 0x7e and fm2 == 0x02cca2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x11de47 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb493df; op2val:0xbf02cca2;
op3val:0x7f11de47; valaddr_reg:x3; val_offset:171*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 171*FLEN/8, x4, x1, x2)

inst_58:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3493df and fs2 == 1 and fe2 == 0x7e and fm2 == 0x02cca2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x11de47 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb493df; op2val:0xbf02cca2;
op3val:0x7f11de47; valaddr_reg:x3; val_offset:174*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 174*FLEN/8, x4, x1, x2)

inst_59:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3493df and fs2 == 1 and fe2 == 0x7e and fm2 == 0x02cca2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x11de47 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb493df; op2val:0xbf02cca2;
op3val:0x7f11de47; valaddr_reg:x3; val_offset:177*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 177*FLEN/8, x4, x1, x2)

inst_60:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a40d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x42db6b and fs3 == 0 and fe3 == 0xfc and fm3 == 0x48ecdf and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba40d7; op2val:0xbfc2db6b;
op3val:0x7e48ecdf; valaddr_reg:x3; val_offset:180*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 180*FLEN/8, x4, x1, x2)

inst_61:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a40d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x42db6b and fs3 == 0 and fe3 == 0xfc and fm3 == 0x48ecdf and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba40d7; op2val:0xbfc2db6b;
op3val:0x7e48ecdf; valaddr_reg:x3; val_offset:183*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 183*FLEN/8, x4, x1, x2)

inst_62:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a40d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x42db6b and fs3 == 0 and fe3 == 0xfc and fm3 == 0x48ecdf and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba40d7; op2val:0xbfc2db6b;
op3val:0x7e48ecdf; valaddr_reg:x3; val_offset:186*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 186*FLEN/8, x4, x1, x2)

inst_63:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a40d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x42db6b and fs3 == 0 and fe3 == 0xfc and fm3 == 0x48ecdf and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba40d7; op2val:0xbfc2db6b;
op3val:0x7e48ecdf; valaddr_reg:x3; val_offset:189*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 189*FLEN/8, x4, x1, x2)

inst_64:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a40d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x42db6b and fs3 == 0 and fe3 == 0xfc and fm3 == 0x48ecdf and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba40d7; op2val:0xbfc2db6b;
op3val:0x7e48ecdf; valaddr_reg:x3; val_offset:192*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 192*FLEN/8, x4, x1, x2)

inst_65:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4eb58d and fs2 == 1 and fe2 == 0x7e and fm2 == 0x1734a0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x02f434 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eceb58d; op2val:0xbf1734a0;
op3val:0x7f02f434; valaddr_reg:x3; val_offset:195*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 195*FLEN/8, x4, x1, x2)

inst_66:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4eb58d and fs2 == 1 and fe2 == 0x7e and fm2 == 0x1734a0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x02f434 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eceb58d; op2val:0xbf1734a0;
op3val:0x7f02f434; valaddr_reg:x3; val_offset:198*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 198*FLEN/8, x4, x1, x2)

inst_67:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4eb58d and fs2 == 1 and fe2 == 0x7e and fm2 == 0x1734a0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x02f434 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eceb58d; op2val:0xbf1734a0;
op3val:0x7f02f434; valaddr_reg:x3; val_offset:201*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 201*FLEN/8, x4, x1, x2)

inst_68:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4eb58d and fs2 == 1 and fe2 == 0x7e and fm2 == 0x1734a0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x02f434 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eceb58d; op2val:0xbf1734a0;
op3val:0x7f02f434; valaddr_reg:x3; val_offset:204*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 204*FLEN/8, x4, x1, x2)

inst_69:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4eb58d and fs2 == 1 and fe2 == 0x7e and fm2 == 0x1734a0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x02f434 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eceb58d; op2val:0xbf1734a0;
op3val:0x7f02f434; valaddr_reg:x3; val_offset:207*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 207*FLEN/8, x4, x1, x2)

inst_70:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x623c76 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x546367 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x09c28b and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee23c76; op2val:0xc0d46367;
op3val:0x7d89c28b; valaddr_reg:x3; val_offset:210*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 210*FLEN/8, x4, x1, x2)

inst_71:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x623c76 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x546367 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x09c28b and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee23c76; op2val:0xc0d46367;
op3val:0x7d89c28b; valaddr_reg:x3; val_offset:213*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 213*FLEN/8, x4, x1, x2)

inst_72:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x623c76 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x546367 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x09c28b and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee23c76; op2val:0xc0d46367;
op3val:0x7d89c28b; valaddr_reg:x3; val_offset:216*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 216*FLEN/8, x4, x1, x2)

inst_73:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x623c76 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x546367 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x09c28b and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee23c76; op2val:0xc0d46367;
op3val:0x7d89c28b; valaddr_reg:x3; val_offset:219*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 219*FLEN/8, x4, x1, x2)

inst_74:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x623c76 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x546367 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x09c28b and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee23c76; op2val:0xc0d46367;
op3val:0x7d89c28b; valaddr_reg:x3; val_offset:222*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 222*FLEN/8, x4, x1, x2)

inst_75:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x671228 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7514b6 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x69b89c and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee71228; op2val:0x407514b6;
op3val:0x7e69b89c; valaddr_reg:x3; val_offset:225*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 225*FLEN/8, x4, x1, x2)

inst_76:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x671228 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7514b6 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x69b89c and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee71228; op2val:0x407514b6;
op3val:0x7e69b89c; valaddr_reg:x3; val_offset:228*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 228*FLEN/8, x4, x1, x2)

inst_77:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x671228 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7514b6 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x69b89c and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee71228; op2val:0x407514b6;
op3val:0x7e69b89c; valaddr_reg:x3; val_offset:231*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 231*FLEN/8, x4, x1, x2)

inst_78:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x671228 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7514b6 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x69b89c and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee71228; op2val:0x407514b6;
op3val:0x7e69b89c; valaddr_reg:x3; val_offset:234*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 234*FLEN/8, x4, x1, x2)

inst_79:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x671228 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7514b6 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x69b89c and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee71228; op2val:0x407514b6;
op3val:0x7e69b89c; valaddr_reg:x3; val_offset:237*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 237*FLEN/8, x4, x1, x2)

inst_80:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x73cf0f and fs2 == 0 and fe2 == 0x7e and fm2 == 0x27ce41 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x5fa103 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef3cf0f; op2val:0x3f27ce41;
op3val:0x7e5fa103; valaddr_reg:x3; val_offset:240*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 240*FLEN/8, x4, x1, x2)

inst_81:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x73cf0f and fs2 == 0 and fe2 == 0x7e and fm2 == 0x27ce41 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x5fa103 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef3cf0f; op2val:0x3f27ce41;
op3val:0x7e5fa103; valaddr_reg:x3; val_offset:243*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 243*FLEN/8, x4, x1, x2)

inst_82:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x73cf0f and fs2 == 0 and fe2 == 0x7e and fm2 == 0x27ce41 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x5fa103 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef3cf0f; op2val:0x3f27ce41;
op3val:0x7e5fa103; valaddr_reg:x3; val_offset:246*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 246*FLEN/8, x4, x1, x2)

inst_83:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x73cf0f and fs2 == 0 and fe2 == 0x7e and fm2 == 0x27ce41 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x5fa103 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef3cf0f; op2val:0x3f27ce41;
op3val:0x7e5fa103; valaddr_reg:x3; val_offset:249*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 249*FLEN/8, x4, x1, x2)

inst_84:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x73cf0f and fs2 == 0 and fe2 == 0x7e and fm2 == 0x27ce41 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x5fa103 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef3cf0f; op2val:0x3f27ce41;
op3val:0x7e5fa103; valaddr_reg:x3; val_offset:252*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 252*FLEN/8, x4, x1, x2)

inst_85:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7783fc and fs2 == 1 and fe2 == 0x7d and fm2 == 0x6ff524 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x05ffb0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef783fc; op2val:0xbeeff524;
op3val:0x7f05ffb0; valaddr_reg:x3; val_offset:255*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 255*FLEN/8, x4, x1, x2)

inst_86:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7783fc and fs2 == 1 and fe2 == 0x7d and fm2 == 0x6ff524 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x05ffb0 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef783fc; op2val:0xbeeff524;
op3val:0x7f05ffb0; valaddr_reg:x3; val_offset:258*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 258*FLEN/8, x4, x1, x2)

inst_87:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7783fc and fs2 == 1 and fe2 == 0x7d and fm2 == 0x6ff524 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x05ffb0 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef783fc; op2val:0xbeeff524;
op3val:0x7f05ffb0; valaddr_reg:x3; val_offset:261*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 261*FLEN/8, x4, x1, x2)

inst_88:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7783fc and fs2 == 1 and fe2 == 0x7d and fm2 == 0x6ff524 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x05ffb0 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef783fc; op2val:0xbeeff524;
op3val:0x7f05ffb0; valaddr_reg:x3; val_offset:264*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 264*FLEN/8, x4, x1, x2)

inst_89:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7783fc and fs2 == 1 and fe2 == 0x7d and fm2 == 0x6ff524 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x05ffb0 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef783fc; op2val:0xbeeff524;
op3val:0x7f05ffb0; valaddr_reg:x3; val_offset:267*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 267*FLEN/8, x4, x1, x2)

inst_90:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c2059 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x4d8c66 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x1efa7c and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c2059; op2val:0xbf4d8c66;
op3val:0x7e9efa7c; valaddr_reg:x3; val_offset:270*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 270*FLEN/8, x4, x1, x2)

inst_91:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c2059 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x4d8c66 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x1efa7c and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c2059; op2val:0xbf4d8c66;
op3val:0x7e9efa7c; valaddr_reg:x3; val_offset:273*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 273*FLEN/8, x4, x1, x2)

inst_92:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c2059 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x4d8c66 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x1efa7c and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c2059; op2val:0xbf4d8c66;
op3val:0x7e9efa7c; valaddr_reg:x3; val_offset:276*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 276*FLEN/8, x4, x1, x2)

inst_93:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c2059 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x4d8c66 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x1efa7c and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c2059; op2val:0xbf4d8c66;
op3val:0x7e9efa7c; valaddr_reg:x3; val_offset:279*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 279*FLEN/8, x4, x1, x2)

inst_94:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c2059 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x4d8c66 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x1efa7c and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c2059; op2val:0xbf4d8c66;
op3val:0x7e9efa7c; valaddr_reg:x3; val_offset:282*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 282*FLEN/8, x4, x1, x2)

inst_95:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x185240 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x65cfde and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1dd0ae and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f185240; op2val:0xbe65cfde;
op3val:0x7f1dd0ae; valaddr_reg:x3; val_offset:285*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 285*FLEN/8, x4, x1, x2)

inst_96:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x185240 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x65cfde and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1dd0ae and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f185240; op2val:0xbe65cfde;
op3val:0x7f1dd0ae; valaddr_reg:x3; val_offset:288*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 288*FLEN/8, x4, x1, x2)

inst_97:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x185240 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x65cfde and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1dd0ae and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f185240; op2val:0xbe65cfde;
op3val:0x7f1dd0ae; valaddr_reg:x3; val_offset:291*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 291*FLEN/8, x4, x1, x2)

inst_98:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x185240 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x65cfde and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1dd0ae and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f185240; op2val:0xbe65cfde;
op3val:0x7f1dd0ae; valaddr_reg:x3; val_offset:294*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 294*FLEN/8, x4, x1, x2)

inst_99:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x185240 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x65cfde and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1dd0ae and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f185240; op2val:0xbe65cfde;
op3val:0x7f1dd0ae; valaddr_reg:x3; val_offset:297*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 297*FLEN/8, x4, x1, x2)

inst_100:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a3f02 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x4850d9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x03a707 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a3f02; op2val:0xbec850d9;
op3val:0x7f03a707; valaddr_reg:x3; val_offset:300*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 300*FLEN/8, x4, x1, x2)

inst_101:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a3f02 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x4850d9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x03a707 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a3f02; op2val:0xbec850d9;
op3val:0x7f03a707; valaddr_reg:x3; val_offset:303*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 303*FLEN/8, x4, x1, x2)

inst_102:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a3f02 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x4850d9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x03a707 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a3f02; op2val:0xbec850d9;
op3val:0x7f03a707; valaddr_reg:x3; val_offset:306*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 306*FLEN/8, x4, x1, x2)

inst_103:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a3f02 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x4850d9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x03a707 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a3f02; op2val:0xbec850d9;
op3val:0x7f03a707; valaddr_reg:x3; val_offset:309*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 309*FLEN/8, x4, x1, x2)

inst_104:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a3f02 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x4850d9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x03a707 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a3f02; op2val:0xbec850d9;
op3val:0x7f03a707; valaddr_reg:x3; val_offset:312*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 312*FLEN/8, x4, x1, x2)

inst_105:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a849e and fs2 == 1 and fe2 == 0x7e and fm2 == 0x307a2b and fs3 == 0 and fe3 == 0xfd and fm3 == 0x2af628 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a849e; op2val:0xbf307a2b;
op3val:0x7eaaf628; valaddr_reg:x3; val_offset:315*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 315*FLEN/8, x4, x1, x2)

inst_106:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a849e and fs2 == 1 and fe2 == 0x7e and fm2 == 0x307a2b and fs3 == 0 and fe3 == 0xfd and fm3 == 0x2af628 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a849e; op2val:0xbf307a2b;
op3val:0x7eaaf628; valaddr_reg:x3; val_offset:318*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 318*FLEN/8, x4, x1, x2)

inst_107:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a849e and fs2 == 1 and fe2 == 0x7e and fm2 == 0x307a2b and fs3 == 0 and fe3 == 0xfd and fm3 == 0x2af628 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a849e; op2val:0xbf307a2b;
op3val:0x7eaaf628; valaddr_reg:x3; val_offset:321*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 321*FLEN/8, x4, x1, x2)

inst_108:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a849e and fs2 == 1 and fe2 == 0x7e and fm2 == 0x307a2b and fs3 == 0 and fe3 == 0xfd and fm3 == 0x2af628 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a849e; op2val:0xbf307a2b;
op3val:0x7eaaf628; valaddr_reg:x3; val_offset:324*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 324*FLEN/8, x4, x1, x2)

inst_109:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a849e and fs2 == 1 and fe2 == 0x7e and fm2 == 0x307a2b and fs3 == 0 and fe3 == 0xfd and fm3 == 0x2af628 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a849e; op2val:0xbf307a2b;
op3val:0x7eaaf628; valaddr_reg:x3; val_offset:327*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 327*FLEN/8, x4, x1, x2)

inst_110:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a9574 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x698994 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x4beb8f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a9574; op2val:0xbf698994;
op3val:0x7e4beb8f; valaddr_reg:x3; val_offset:330*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 330*FLEN/8, x4, x1, x2)

inst_111:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a9574 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x698994 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x4beb8f and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a9574; op2val:0xbf698994;
op3val:0x7e4beb8f; valaddr_reg:x3; val_offset:333*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 333*FLEN/8, x4, x1, x2)

inst_112:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a9574 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x698994 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x4beb8f and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a9574; op2val:0xbf698994;
op3val:0x7e4beb8f; valaddr_reg:x3; val_offset:336*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 336*FLEN/8, x4, x1, x2)

inst_113:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a9574 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x698994 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x4beb8f and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a9574; op2val:0xbf698994;
op3val:0x7e4beb8f; valaddr_reg:x3; val_offset:339*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 339*FLEN/8, x4, x1, x2)

inst_114:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a9574 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x698994 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x4beb8f and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a9574; op2val:0xbf698994;
op3val:0x7e4beb8f; valaddr_reg:x3; val_offset:342*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 342*FLEN/8, x4, x1, x2)

inst_115:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1aa82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1d078a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3b76c8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1aa82d; op2val:0x401d078a;
op3val:0x7f3b76c8; valaddr_reg:x3; val_offset:345*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 345*FLEN/8, x4, x1, x2)

inst_116:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1aa82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1d078a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3b76c8 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1aa82d; op2val:0x401d078a;
op3val:0x7f3b76c8; valaddr_reg:x3; val_offset:348*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 348*FLEN/8, x4, x1, x2)

inst_117:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1aa82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1d078a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3b76c8 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1aa82d; op2val:0x401d078a;
op3val:0x7f3b76c8; valaddr_reg:x3; val_offset:351*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 351*FLEN/8, x4, x1, x2)

inst_118:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1aa82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1d078a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3b76c8 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1aa82d; op2val:0x401d078a;
op3val:0x7f3b76c8; valaddr_reg:x3; val_offset:354*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 354*FLEN/8, x4, x1, x2)

inst_119:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1aa82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1d078a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3b76c8 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1aa82d; op2val:0x401d078a;
op3val:0x7f3b76c8; valaddr_reg:x3; val_offset:357*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 357*FLEN/8, x4, x1, x2)

inst_120:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x221a29 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x497654 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x00dd0d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f221a29; op2val:0xbf497654;
op3val:0x7e80dd0d; valaddr_reg:x3; val_offset:360*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 360*FLEN/8, x4, x1, x2)

inst_121:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x221a29 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x497654 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x00dd0d and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f221a29; op2val:0xbf497654;
op3val:0x7e80dd0d; valaddr_reg:x3; val_offset:363*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 363*FLEN/8, x4, x1, x2)

inst_122:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x221a29 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x497654 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x00dd0d and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f221a29; op2val:0xbf497654;
op3val:0x7e80dd0d; valaddr_reg:x3; val_offset:366*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 366*FLEN/8, x4, x1, x2)

inst_123:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x221a29 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x497654 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x00dd0d and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f221a29; op2val:0xbf497654;
op3val:0x7e80dd0d; valaddr_reg:x3; val_offset:369*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 369*FLEN/8, x4, x1, x2)

inst_124:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x221a29 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x497654 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x00dd0d and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f221a29; op2val:0xbf497654;
op3val:0x7e80dd0d; valaddr_reg:x3; val_offset:372*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 372*FLEN/8, x4, x1, x2)

inst_125:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28f9a2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x248a4f and fs3 == 0 and fe3 == 0xfd and fm3 == 0x49b378 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28f9a2; op2val:0x40a48a4f;
op3val:0x7ec9b378; valaddr_reg:x3; val_offset:375*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 375*FLEN/8, x4, x1, x2)

inst_126:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28f9a2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x248a4f and fs3 == 0 and fe3 == 0xfd and fm3 == 0x49b378 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28f9a2; op2val:0x40a48a4f;
op3val:0x7ec9b378; valaddr_reg:x3; val_offset:378*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 378*FLEN/8, x4, x1, x2)

inst_127:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28f9a2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x248a4f and fs3 == 0 and fe3 == 0xfd and fm3 == 0x49b378 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28f9a2; op2val:0x40a48a4f;
op3val:0x7ec9b378; valaddr_reg:x3; val_offset:381*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 381*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_2)

inst_128:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28f9a2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x248a4f and fs3 == 0 and fe3 == 0xfd and fm3 == 0x49b378 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28f9a2; op2val:0x40a48a4f;
op3val:0x7ec9b378; valaddr_reg:x3; val_offset:384*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 384*FLEN/8, x4, x1, x2)

inst_129:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28f9a2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x248a4f and fs3 == 0 and fe3 == 0xfd and fm3 == 0x49b378 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28f9a2; op2val:0x40a48a4f;
op3val:0x7ec9b378; valaddr_reg:x3; val_offset:387*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 387*FLEN/8, x4, x1, x2)

inst_130:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2ea04a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x0ecbff and fs3 == 0 and fe3 == 0xfd and fm3 == 0x45a044 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2ea04a; op2val:0x3f8ecbff;
op3val:0x7ec5a044; valaddr_reg:x3; val_offset:390*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 390*FLEN/8, x4, x1, x2)

inst_131:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2ea04a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x0ecbff and fs3 == 0 and fe3 == 0xfd and fm3 == 0x45a044 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2ea04a; op2val:0x3f8ecbff;
op3val:0x7ec5a044; valaddr_reg:x3; val_offset:393*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 393*FLEN/8, x4, x1, x2)

inst_132:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2ea04a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x0ecbff and fs3 == 0 and fe3 == 0xfd and fm3 == 0x45a044 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2ea04a; op2val:0x3f8ecbff;
op3val:0x7ec5a044; valaddr_reg:x3; val_offset:396*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 396*FLEN/8, x4, x1, x2)

inst_133:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2ea04a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x0ecbff and fs3 == 0 and fe3 == 0xfd and fm3 == 0x45a044 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2ea04a; op2val:0x3f8ecbff;
op3val:0x7ec5a044; valaddr_reg:x3; val_offset:399*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 399*FLEN/8, x4, x1, x2)

inst_134:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2ea04a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x0ecbff and fs3 == 0 and fe3 == 0xfd and fm3 == 0x45a044 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2ea04a; op2val:0x3f8ecbff;
op3val:0x7ec5a044; valaddr_reg:x3; val_offset:402*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 402*FLEN/8, x4, x1, x2)

inst_135:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36a9e2 and fs2 == 0 and fe2 == 0x7d and fm2 == 0x36353c and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6202c3 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36a9e2; op2val:0x3eb6353c;
op3val:0x7ee202c3; valaddr_reg:x3; val_offset:405*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 405*FLEN/8, x4, x1, x2)

inst_136:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36a9e2 and fs2 == 0 and fe2 == 0x7d and fm2 == 0x36353c and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6202c3 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36a9e2; op2val:0x3eb6353c;
op3val:0x7ee202c3; valaddr_reg:x3; val_offset:408*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 408*FLEN/8, x4, x1, x2)

inst_137:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36a9e2 and fs2 == 0 and fe2 == 0x7d and fm2 == 0x36353c and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6202c3 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36a9e2; op2val:0x3eb6353c;
op3val:0x7ee202c3; valaddr_reg:x3; val_offset:411*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 411*FLEN/8, x4, x1, x2)

inst_138:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36a9e2 and fs2 == 0 and fe2 == 0x7d and fm2 == 0x36353c and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6202c3 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36a9e2; op2val:0x3eb6353c;
op3val:0x7ee202c3; valaddr_reg:x3; val_offset:414*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 414*FLEN/8, x4, x1, x2)

inst_139:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36a9e2 and fs2 == 0 and fe2 == 0x7d and fm2 == 0x36353c and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6202c3 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36a9e2; op2val:0x3eb6353c;
op3val:0x7ee202c3; valaddr_reg:x3; val_offset:417*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 417*FLEN/8, x4, x1, x2)

inst_140:
// fs1 == 0 and fe1 == 0xf3 and fm1 == 0x319f1b and fs2 == 1 and fe2 == 0x88 and fm2 == 0x3a9ca3 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7e85b6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x79b19f1b; op2val:0xc43a9ca3;
op3val:0x7efe85b6; valaddr_reg:x3; val_offset:420*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 420*FLEN/8, x4, x1, x2)

inst_141:
// fs1 == 0 and fe1 == 0xf3 and fm1 == 0x319f1b and fs2 == 1 and fe2 == 0x88 and fm2 == 0x3a9ca3 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7e85b6 and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x79b19f1b; op2val:0xc43a9ca3;
op3val:0x7efe85b6; valaddr_reg:x3; val_offset:423*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 423*FLEN/8, x4, x1, x2)

inst_142:
// fs1 == 0 and fe1 == 0xf3 and fm1 == 0x319f1b and fs2 == 1 and fe2 == 0x88 and fm2 == 0x3a9ca3 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7e85b6 and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x79b19f1b; op2val:0xc43a9ca3;
op3val:0x7efe85b6; valaddr_reg:x3; val_offset:426*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 426*FLEN/8, x4, x1, x2)

inst_143:
// fs1 == 0 and fe1 == 0xf3 and fm1 == 0x319f1b and fs2 == 1 and fe2 == 0x88 and fm2 == 0x3a9ca3 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7e85b6 and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x79b19f1b; op2val:0xc43a9ca3;
op3val:0x7efe85b6; valaddr_reg:x3; val_offset:429*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 429*FLEN/8, x4, x1, x2)

inst_144:
// fs1 == 0 and fe1 == 0xf3 and fm1 == 0x319f1b and fs2 == 1 and fe2 == 0x88 and fm2 == 0x3a9ca3 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7e85b6 and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x79b19f1b; op2val:0xc43a9ca3;
op3val:0x7efe85b6; valaddr_reg:x3; val_offset:432*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 432*FLEN/8, x4, x1, x2)

inst_145:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2e9fe8 and fs2 == 1 and fe2 == 0x84 and fm2 == 0x669d12 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0ac4bf and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cae9fe8; op2val:0xc2669d12;
op3val:0x7e8ac4bf; valaddr_reg:x3; val_offset:435*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 435*FLEN/8, x4, x1, x2)

inst_146:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2e9fe8 and fs2 == 1 and fe2 == 0x84 and fm2 == 0x669d12 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0ac4bf and  fcsr == 0x40 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cae9fe8; op2val:0xc2669d12;
op3val:0x7e8ac4bf; valaddr_reg:x3; val_offset:438*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 64, 0, x3, 438*FLEN/8, x4, x1, x2)

inst_147:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2e9fe8 and fs2 == 1 and fe2 == 0x84 and fm2 == 0x669d12 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0ac4bf and  fcsr == 0x60 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cae9fe8; op2val:0xc2669d12;
op3val:0x7e8ac4bf; valaddr_reg:x3; val_offset:441*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 96, 0, x3, 441*FLEN/8, x4, x1, x2)

inst_148:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2e9fe8 and fs2 == 1 and fe2 == 0x84 and fm2 == 0x669d12 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0ac4bf and  fcsr == 0x80 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cae9fe8; op2val:0xc2669d12;
op3val:0x7e8ac4bf; valaddr_reg:x3; val_offset:444*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 128, 0, x3, 444*FLEN/8, x4, x1, x2)

inst_149:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f0e02 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x093dc1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x19a77e and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f0e02; op2val:0xc0093dc1;
op3val:0x7f19a77e; valaddr_reg:x3; val_offset:447*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 447*FLEN/8, x4, x1, x2)

inst_150:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f0e02 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x093dc1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x19a77e and  fcsr == 0x20 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f0e02; op2val:0xc0093dc1;
op3val:0x7f19a77e; valaddr_reg:x3; val_offset:450*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 32, 0, x3, 450*FLEN/8, x4, x1, x2)
#endif


RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(0x79b19f1b041683739,32,FLEN)
NAN_BOXED(0xc43a9ca3292175523,32,FLEN)
NAN_BOXED(0xc43a9ca3292175523,32,FLEN)
NAN_BOXED(0x79b19f1b041683739,32,FLEN)
NAN_BOXED(0x79b19f1b041683739,32,FLEN)
NAN_BOXED(0x7efe85b6130609590,32,FLEN)
NAN_BOXED(0x79b19f1b041683739,32,FLEN)
NAN_BOXED(0xc43a9ca3292175523,32,FLEN)
NAN_BOXED(0x7efe85b6130609590,32,FLEN)
NAN_BOXED(0x79b19f1b041683739,32,FLEN)
NAN_BOXED(0xc43a9ca3292175523,32,FLEN)
NAN_BOXED(0xc43a9ca3292175523,32,FLEN)
NAN_BOXED(0x79b19f1b041683739,32,FLEN)
NAN_BOXED(0xc43a9ca3292175523,32,FLEN)
NAN_BOXED(0x7efe85b6130609590,32,FLEN)
NAN_BOXED(0x7cae9fe8091818984,32,FLEN)
NAN_BOXED(0xc2669d12261504786,32,FLEN)
NAN_BOXED(0x7e8ac4bf123023551,32,FLEN)
NAN_BOXED(0x7cae9fe8091818984,32,FLEN)
NAN_BOXED(0xc2669d12261504786,32,FLEN)
NAN_BOXED(0x7e8ac4bf123023551,32,FLEN)
NAN_BOXED(0x7cae9fe8091818984,32,FLEN)
NAN_BOXED(0x7cae9fe8091818984,32,FLEN)
NAN_BOXED(0x7e8ac4bf123023551,32,FLEN)
NAN_BOXED(0x7cae9fe8091818984,32,FLEN)
NAN_BOXED(0xc2669d12261504786,32,FLEN)
NAN_BOXED(0x7cae9fe8091818984,32,FLEN)
NAN_BOXED(0x7cae9fe8091818984,32,FLEN)
NAN_BOXED(0xc2669d12261504786,32,FLEN)
NAN_BOXED(0x7cae9fe8091818984,32,FLEN)
NAN_BOXED(0x7d8f0e02106527234,32,FLEN)
NAN_BOXED(0x7d8f0e02106527234,32,FLEN)
NAN_BOXED(0x7d8f0e02106527234,32,FLEN)
NAN_BOXED(0x7d8f0e02106527234,32,FLEN)
NAN_BOXED(0x7d8f0e02106527234,32,FLEN)
NAN_BOXED(0x7d8f0e02106527234,32,FLEN)
NAN_BOXED(0x7d8f0e02106527234,32,FLEN)
NAN_BOXED(0xc0093dc1221831105,32,FLEN)
NAN_BOXED(0x7f19a77e132387710,32,FLEN)
NAN_BOXED(0x7d8f0e02106527234,32,FLEN)
NAN_BOXED(0xc0093dc1221831105,32,FLEN)
NAN_BOXED(0x7f19a77e132387710,32,FLEN)
NAN_BOXED(0x7d8f0e02106527234,32,FLEN)
NAN_BOXED(0xc0093dc1221831105,32,FLEN)
NAN_BOXED(0x7f19a77e132387710,32,FLEN)
NAN_BOXED(0x7d900bf1106592241,32,FLEN)
NAN_BOXED(0x3f44fc96061485718,32,FLEN)
NAN_BOXED(0x7e176ba2115464098,32,FLEN)
NAN_BOXED(0x7d900bf1106592241,32,FLEN)
NAN_BOXED(0x3f44fc96061485718,32,FLEN)
NAN_BOXED(0x7e176ba2115464098,32,FLEN)
NAN_BOXED(0x7d900bf1106592241,32,FLEN)
NAN_BOXED(0x3f44fc96061485718,32,FLEN)
NAN_BOXED(0x7e176ba2115464098,32,FLEN)
NAN_BOXED(0x7d900bf1106592241,32,FLEN)
NAN_BOXED(0x3f44fc96061485718,32,FLEN)
NAN_BOXED(0x7e176ba2115464098,32,FLEN)
NAN_BOXED(0x7d900bf1106592241,32,FLEN)
NAN_BOXED(0x3f44fc96061485718,32,FLEN)
NAN_BOXED(0x7e176ba2115464098,32,FLEN)
NAN_BOXED(0x7db37137108911927,32,FLEN)
NAN_BOXED(0xc27b3938262855480,32,FLEN)
NAN_BOXED(0x7efe7e1b130607643,32,FLEN)
NAN_BOXED(0x7db37137108911927,32,FLEN)
NAN_BOXED(0xc27b3938262855480,32,FLEN)
NAN_BOXED(0x7efe7e1b130607643,32,FLEN)
NAN_BOXED(0x7db37137108911927,32,FLEN)
NAN_BOXED(0xc27b3938262855480,32,FLEN)
NAN_BOXED(0x7efe7e1b130607643,32,FLEN)
NAN_BOXED(0x7db37137108911927,32,FLEN)
NAN_BOXED(0xc27b3938262855480,32,FLEN)
NAN_BOXED(0x7efe7e1b130607643,32,FLEN)
NAN_BOXED(0x7db37137108911927,32,FLEN)
NAN_BOXED(0xc27b3938262855480,32,FLEN)
NAN_BOXED(0x7efe7e1b130607643,32,FLEN)
NAN_BOXED(0x7e14365e115253854,32,FLEN)
NAN_BOXED(0xc014091c222538524,32,FLEN)
NAN_BOXED(0x7ed49695127861397,32,FLEN)
NAN_BOXED(0x7e14365e115253854,32,FLEN)
NAN_BOXED(0xc014091c222538524,32,FLEN)
NAN_BOXED(0x7ed49695127861397,32,FLEN)
NAN_BOXED(0x7e14365e115253854,32,FLEN)
NAN_BOXED(0xc014091c222538524,32,FLEN)
NAN_BOXED(0x7ed49695127861397,32,FLEN)
NAN_BOXED(0x7e14365e115253854,32,FLEN)
NAN_BOXED(0xc014091c222538524,32,FLEN)
NAN_BOXED(0x7ed49695127861397,32,FLEN)
NAN_BOXED(0x7e14365e115253854,32,FLEN)
NAN_BOXED(0xc014091c222538524,32,FLEN)
NAN_BOXED(0x7ed49695127861397,32,FLEN)
NAN_BOXED(0x7e1a457f115650943,32,FLEN)
NAN_BOXED(0x40903bee083194350,32,FLEN)
NAN_BOXED(0x7efbacd4130422996,32,FLEN)
NAN_BOXED(0x7e1a457f115650943,32,FLEN)
NAN_BOXED(0x40903bee083194350,32,FLEN)
NAN_BOXED(0x7efbacd4130422996,32,FLEN)
NAN_BOXED(0x7e1a457f115650943,32,FLEN)
NAN_BOXED(0x40903bee083194350,32,FLEN)
NAN_BOXED(0x7efbacd4130422996,32,FLEN)
NAN_BOXED(0x7e1a457f115650943,32,FLEN)
NAN_BOXED(0x40903bee083194350,32,FLEN)
NAN_BOXED(0x7efbacd4130422996,32,FLEN)
NAN_BOXED(0x7e1a457f115650943,32,FLEN)
NAN_BOXED(0x40903bee083194350,32,FLEN)
NAN_BOXED(0x7efbacd4130422996,32,FLEN)
NAN_BOXED(0x7e516e9f119265951,32,FLEN)
NAN_BOXED(0xbf39f488208246408,32,FLEN)
NAN_BOXED(0x7f19f7bf132408255,32,FLEN)
NAN_BOXED(0x7e516e9f119265951,32,FLEN)
NAN_BOXED(0xbf39f488208246408,32,FLEN)
NAN_BOXED(0x7f19f7bf132408255,32,FLEN)
NAN_BOXED(0x7e516e9f119265951,32,FLEN)
NAN_BOXED(0xbf39f488208246408,32,FLEN)
NAN_BOXED(0x7f19f7bf132408255,32,FLEN)
NAN_BOXED(0x7e516e9f119265951,32,FLEN)
NAN_BOXED(0xbf39f488208246408,32,FLEN)
NAN_BOXED(0x7f19f7bf132408255,32,FLEN)
NAN_BOXED(0x7e516e9f119265951,32,FLEN)
NAN_BOXED(0xbf39f488208246408,32,FLEN)
NAN_BOXED(0x7f19f7bf132408255,32,FLEN)
NAN_BOXED(0x7e6fd4df121258207,32,FLEN)
NAN_BOXED(0x41d1f880104279680,32,FLEN)
NAN_BOXED(0x7e16b33b115416891,32,FLEN)
NAN_BOXED(0x7e6fd4df121258207,32,FLEN)
NAN_BOXED(0x41d1f880104279680,32,FLEN)
NAN_BOXED(0x7e16b33b115416891,32,FLEN)
NAN_BOXED(0x7e6fd4df121258207,32,FLEN)
NAN_BOXED(0x41d1f880104279680,32,FLEN)
NAN_BOXED(0x7e16b33b115416891,32,FLEN)
NAN_BOXED(0x7e6fd4df121258207,32,FLEN)
NAN_BOXED(0x41d1f880104279680,32,FLEN)
NAN_BOXED(0x7e16b33b115416891,32,FLEN)
NAN_BOXED(0x7e6fd4df121258207,32,FLEN)
NAN_BOXED(0x41d1f880104279680,32,FLEN)
NAN_BOXED(0x7e16b33b115416891,32,FLEN)
NAN_BOXED(0x7e8a62c0122998464,32,FLEN)
NAN_BOXED(0x3f99b337067037495,32,FLEN)
NAN_BOXED(0x7f3315e5134054373,32,FLEN)
NAN_BOXED(0x7e8a62c0122998464,32,FLEN)
NAN_BOXED(0x3f99b337067037495,32,FLEN)
NAN_BOXED(0x7f3315e5134054373,32,FLEN)
NAN_BOXED(0x7e8a62c0122998464,32,FLEN)
NAN_BOXED(0x3f99b337067037495,32,FLEN)
NAN_BOXED(0x7f3315e5134054373,32,FLEN)
NAN_BOXED(0x7e8a62c0122998464,32,FLEN)
NAN_BOXED(0x3f99b337067037495,32,FLEN)
NAN_BOXED(0x7f3315e5134054373,32,FLEN)
NAN_BOXED(0x7e8a62c0122998464,32,FLEN)
NAN_BOXED(0x3f99b337067037495,32,FLEN)
NAN_BOXED(0x7f3315e5134054373,32,FLEN)
NAN_BOXED(0x7e8f4b27123320103,32,FLEN)
NAN_BOXED(0xbf1db103206394115,32,FLEN)
NAN_BOXED(0x7f13dde9132008425,32,FLEN)
NAN_BOXED(0x7e8f4b27123320103,32,FLEN)
NAN_BOXED(0xbf1db103206394115,32,FLEN)
NAN_BOXED(0x7f13dde9132008425,32,FLEN)
NAN_BOXED(0x7e8f4b27123320103,32,FLEN)
NAN_BOXED(0xbf1db103206394115,32,FLEN)
NAN_BOXED(0x7f13dde9132008425,32,FLEN)
NAN_BOXED(0x7e8f4b27123320103,32,FLEN)
NAN_BOXED(0xbf1db103206394115,32,FLEN)
NAN_BOXED(0x7f13dde9132008425,32,FLEN)
NAN_BOXED(0x7e8f4b27123320103,32,FLEN)
NAN_BOXED(0xbf1db103206394115,32,FLEN)
NAN_BOXED(0x7f13dde9132008425,32,FLEN)
NAN_BOXED(0x7eb493df125763551,32,FLEN)
NAN_BOXED(0xbf02cca2204631714,32,FLEN)
NAN_BOXED(0x7f11de47131877447,32,FLEN)
NAN_BOXED(0x7eb493df125763551,32,FLEN)
NAN_BOXED(0xbf02cca2204631714,32,FLEN)
NAN_BOXED(0x7f11de47131877447,32,FLEN)
NAN_BOXED(0x7eb493df125763551,32,FLEN)
NAN_BOXED(0xbf02cca2204631714,32,FLEN)
NAN_BOXED(0x7f11de47131877447,32,FLEN)
NAN_BOXED(0x7eb493df125763551,32,FLEN)
NAN_BOXED(0xbf02cca2204631714,32,FLEN)
NAN_BOXED(0x7f11de47131877447,32,FLEN)
NAN_BOXED(0x7eb493df125763551,32,FLEN)
NAN_BOXED(0xbf02cca2204631714,32,FLEN)
NAN_BOXED(0x7f11de47131877447,32,FLEN)
NAN_BOXED(0x7eba40d7126135511,32,FLEN)
NAN_BOXED(0xbfc2db6b217218411,32,FLEN)
NAN_BOXED(0x7e48ecdf118708447,32,FLEN)
NAN_BOXED(0x7eba40d7126135511,32,FLEN)
NAN_BOXED(0xbfc2db6b217218411,32,FLEN)
NAN_BOXED(0x7e48ecdf118708447,32,FLEN)
NAN_BOXED(0x7eba40d7126135511,32,FLEN)
NAN_BOXED(0xbfc2db6b217218411,32,FLEN)
NAN_BOXED(0x7e48ecdf118708447,32,FLEN)
NAN_BOXED(0x7eba40d7126135511,32,FLEN)
NAN_BOXED(0xbfc2db6b217218411,32,FLEN)
NAN_BOXED(0x7e48ecdf118708447,32,FLEN)
NAN_BOXED(0x7eba40d7126135511,32,FLEN)
NAN_BOXED(0xbfc2db6b217218411,32,FLEN)
NAN_BOXED(0x7e48ecdf118708447,32,FLEN)
NAN_BOXED(0x7eceb58d127476109,32,FLEN)
NAN_BOXED(0xbf1734a0205969056,32,FLEN)
NAN_BOXED(0x7f02f434130900020,32,FLEN)
NAN_BOXED(0x7eceb58d127476109,32,FLEN)
NAN_BOXED(0xbf1734a0205969056,32,FLEN)
NAN_BOXED(0x7f02f434130900020,32,FLEN)
NAN_BOXED(0x7eceb58d127476109,32,FLEN)
NAN_BOXED(0xbf1734a0205969056,32,FLEN)
NAN_BOXED(0x7f02f434130900020,32,FLEN)
NAN_BOXED(0x7eceb58d127476109,32,FLEN)
NAN_BOXED(0xbf1734a0205969056,32,FLEN)
NAN_BOXED(0x7f02f434130900020,32,FLEN)
NAN_BOXED(0x7eceb58d127476109,32,FLEN)
NAN_BOXED(0xbf1734a0205969056,32,FLEN)
NAN_BOXED(0x7f02f434130900020,32,FLEN)
NAN_BOXED(0x7ee23c76128755830,32,FLEN)
NAN_BOXED(0xc0d46367235144551,32,FLEN)
NAN_BOXED(0x7d89c28b106180235,32,FLEN)
NAN_BOXED(0x7ee23c76128755830,32,FLEN)
NAN_BOXED(0xc0d46367235144551,32,FLEN)
NAN_BOXED(0x7d89c28b106180235,32,FLEN)
NAN_BOXED(0x7ee23c76128755830,32,FLEN)
NAN_BOXED(0xc0d46367235144551,32,FLEN)
NAN_BOXED(0x7d89c28b106180235,32,FLEN)
NAN_BOXED(0x7ee23c76128755830,32,FLEN)
NAN_BOXED(0xc0d46367235144551,32,FLEN)
NAN_BOXED(0x7d89c28b106180235,32,FLEN)
NAN_BOXED(0x7ee23c76128755830,32,FLEN)
NAN_BOXED(0xc0d46367235144551,32,FLEN)
NAN_BOXED(0x7d89c28b106180235,32,FLEN)
NAN_BOXED(0x7ee71228129072680,32,FLEN)
NAN_BOXED(0x407514b6081414838,32,FLEN)
NAN_BOXED(0x7e69b89c120857756,32,FLEN)
NAN_BOXED(0x7ee71228129072680,32,FLEN)
NAN_BOXED(0x407514b6081414838,32,FLEN)
NAN_BOXED(0x7e69b89c120857756,32,FLEN)
NAN_BOXED(0x7ee71228129072680,32,FLEN)
NAN_BOXED(0x407514b6081414838,32,FLEN)
NAN_BOXED(0x7e69b89c120857756,32,FLEN)
NAN_BOXED(0x7ee71228129072680,32,FLEN)
NAN_BOXED(0x407514b6081414838,32,FLEN)
NAN_BOXED(0x7e69b89c120857756,32,FLEN)
NAN_BOXED(0x7ee71228129072680,32,FLEN)
NAN_BOXED(0x407514b6081414838,32,FLEN)
NAN_BOXED(0x7e69b89c120857756,32,FLEN)
NAN_BOXED(0x7ef3cf0f129907471,32,FLEN)
NAN_BOXED(0x3f27ce41059573313,32,FLEN)
NAN_BOXED(0x7e5fa103120196355,32,FLEN)
NAN_BOXED(0x7ef3cf0f129907471,32,FLEN)
NAN_BOXED(0x3f27ce41059573313,32,FLEN)
NAN_BOXED(0x7e5fa103120196355,32,FLEN)
NAN_BOXED(0x7ef3cf0f129907471,32,FLEN)
NAN_BOXED(0x3f27ce41059573313,32,FLEN)
NAN_BOXED(0x7e5fa103120196355,32,FLEN)
NAN_BOXED(0x7ef3cf0f129907471,32,FLEN)
NAN_BOXED(0x3f27ce41059573313,32,FLEN)
NAN_BOXED(0x7e5fa103120196355,32,FLEN)
NAN_BOXED(0x7ef3cf0f129907471,32,FLEN)
NAN_BOXED(0x3f27ce41059573313,32,FLEN)
NAN_BOXED(0x7e5fa103120196355,32,FLEN)
NAN_BOXED(0x7ef783fc130150396,32,FLEN)
NAN_BOXED(0xbeeff524203396900,32,FLEN)
NAN_BOXED(0x7f05ffb0131099568,32,FLEN)
NAN_BOXED(0x7ef783fc130150396,32,FLEN)
NAN_BOXED(0xbeeff524203396900,32,FLEN)
NAN_BOXED(0x7f05ffb0131099568,32,FLEN)
NAN_BOXED(0x7ef783fc130150396,32,FLEN)
NAN_BOXED(0xbeeff524203396900,32,FLEN)
NAN_BOXED(0x7f05ffb0131099568,32,FLEN)
NAN_BOXED(0x7ef783fc130150396,32,FLEN)
NAN_BOXED(0xbeeff524203396900,32,FLEN)
NAN_BOXED(0x7f05ffb0131099568,32,FLEN)
NAN_BOXED(0x7ef783fc130150396,32,FLEN)
NAN_BOXED(0xbeeff524203396900,32,FLEN)
NAN_BOXED(0x7f05ffb0131099568,32,FLEN)
NAN_BOXED(0x7f0c2059131501145,32,FLEN)
NAN_BOXED(0xbf4d8c66209530470,32,FLEN)
NAN_BOXED(0x7e9efa7c124348028,32,FLEN)
NAN_BOXED(0x7f0c2059131501145,32,FLEN)
NAN_BOXED(0xbf4d8c66209530470,32,FLEN)
NAN_BOXED(0x7e9efa7c124348028,32,FLEN)
NAN_BOXED(0x7f0c2059131501145,32,FLEN)
NAN_BOXED(0xbf4d8c66209530470,32,FLEN)
NAN_BOXED(0x7e9efa7c124348028,32,FLEN)
NAN_BOXED(0x7f0c2059131501145,32,FLEN)
NAN_BOXED(0xbf4d8c66209530470,32,FLEN)
NAN_BOXED(0x7e9efa7c124348028,32,FLEN)
NAN_BOXED(0x7f0c2059131501145,32,FLEN)
NAN_BOXED(0xbf4d8c66209530470,32,FLEN)
NAN_BOXED(0x7e9efa7c124348028,32,FLEN)
NAN_BOXED(0x7f185240132300352,32,FLEN)
NAN_BOXED(0xbe65cfde194343390,32,FLEN)
NAN_BOXED(0x7f1dd0ae132660398,32,FLEN)
NAN_BOXED(0x7f185240132300352,32,FLEN)
NAN_BOXED(0xbe65cfde194343390,32,FLEN)
NAN_BOXED(0x7f1dd0ae132660398,32,FLEN)
NAN_BOXED(0x7f185240132300352,32,FLEN)
NAN_BOXED(0xbe65cfde194343390,32,FLEN)
NAN_BOXED(0x7f1dd0ae132660398,32,FLEN)
NAN_BOXED(0x7f185240132300352,32,FLEN)
NAN_BOXED(0xbe65cfde194343390,32,FLEN)
NAN_BOXED(0x7f1dd0ae132660398,32,FLEN)
NAN_BOXED(0x7f185240132300352,32,FLEN)
NAN_BOXED(0xbe65cfde194343390,32,FLEN)
NAN_BOXED(0x7f1dd0ae132660398,32,FLEN)
NAN_BOXED(0x7f1a3f02132426498,32,FLEN)
NAN_BOXED(0xbec850d9200798937,32,FLEN)
NAN_BOXED(0x7f03a707130945799,32,FLEN)
NAN_BOXED(0x7f1a3f02132426498,32,FLEN)
NAN_BOXED(0xbec850d9200798937,32,FLEN)
NAN_BOXED(0x7f03a707130945799,32,FLEN)
NAN_BOXED(0x7f1a3f02132426498,32,FLEN)
NAN_BOXED(0xbec850d9200798937,32,FLEN)
NAN_BOXED(0x7f03a707130945799,32,FLEN)
NAN_BOXED(0x7f1a3f02132426498,32,FLEN)
NAN_BOXED(0xbec850d9200798937,32,FLEN)
NAN_BOXED(0x7f03a707130945799,32,FLEN)
NAN_BOXED(0x7f1a3f02132426498,32,FLEN)
NAN_BOXED(0xbec850d9200798937,32,FLEN)
NAN_BOXED(0x7f03a707130945799,32,FLEN)
NAN_BOXED(0x7f1a849e132444318,32,FLEN)
NAN_BOXED(0xbf307a2b207625259,32,FLEN)
NAN_BOXED(0x7eaaf628125133352,32,FLEN)
NAN_BOXED(0x7f1a849e132444318,32,FLEN)
NAN_BOXED(0xbf307a2b207625259,32,FLEN)
NAN_BOXED(0x7eaaf628125133352,32,FLEN)
NAN_BOXED(0x7f1a849e132444318,32,FLEN)
NAN_BOXED(0xbf307a2b207625259,32,FLEN)
NAN_BOXED(0x7eaaf628125133352,32,FLEN)
NAN_BOXED(0x7f1a849e132444318,32,FLEN)
NAN_BOXED(0xbf307a2b207625259,32,FLEN)
NAN_BOXED(0x7eaaf628125133352,32,FLEN)
NAN_BOXED(0x7f1a849e132444318,32,FLEN)
NAN_BOXED(0xbf307a2b207625259,32,FLEN)
NAN_BOXED(0x7eaaf628125133352,32,FLEN)
NAN_BOXED(0x7f1a9574132448628,32,FLEN)
NAN_BOXED(0xbf698994211364756,32,FLEN)
NAN_BOXED(0x7e4beb8f118904719,32,FLEN)
NAN_BOXED(0x7f1a9574132448628,32,FLEN)
NAN_BOXED(0xbf698994211364756,32,FLEN)
NAN_BOXED(0x7e4beb8f118904719,32,FLEN)
NAN_BOXED(0x7f1a9574132448628,32,FLEN)
NAN_BOXED(0xbf698994211364756,32,FLEN)
NAN_BOXED(0x7e4beb8f118904719,32,FLEN)
NAN_BOXED(0x7f1a9574132448628,32,FLEN)
NAN_BOXED(0xbf698994211364756,32,FLEN)
NAN_BOXED(0x7e4beb8f118904719,32,FLEN)
NAN_BOXED(0x7f1a9574132448628,32,FLEN)
NAN_BOXED(0xbf698994211364756,32,FLEN)
NAN_BOXED(0x7e4beb8f118904719,32,FLEN)
NAN_BOXED(0x7f1aa82d132453421,32,FLEN)
NAN_BOXED(0x401d078a075644298,32,FLEN)
NAN_BOXED(0x7f3b76c8134603464,32,FLEN)
NAN_BOXED(0x7f1aa82d132453421,32,FLEN)
NAN_BOXED(0x401d078a075644298,32,FLEN)
NAN_BOXED(0x7f3b76c8134603464,32,FLEN)
NAN_BOXED(0x7f1aa82d132453421,32,FLEN)
NAN_BOXED(0x401d078a075644298,32,FLEN)
NAN_BOXED(0x7f3b76c8134603464,32,FLEN)
NAN_BOXED(0x7f1aa82d132453421,32,FLEN)
NAN_BOXED(0x401d078a075644298,32,FLEN)
NAN_BOXED(0x7f3b76c8134603464,32,FLEN)
NAN_BOXED(0x7f1aa82d132453421,32,FLEN)
NAN_BOXED(0x401d078a075644298,32,FLEN)
NAN_BOXED(0x7f3b76c8134603464,32,FLEN)
NAN_BOXED(0x7f221a29132941353,32,FLEN)
NAN_BOXED(0xbf497654209262676,32,FLEN)
NAN_BOXED(0x7e80dd0d122374413,32,FLEN)
NAN_BOXED(0x7f221a29132941353,32,FLEN)
NAN_BOXED(0xbf497654209262676,32,FLEN)
NAN_BOXED(0x7e80dd0d122374413,32,FLEN)
NAN_BOXED(0x7f221a29132941353,32,FLEN)
NAN_BOXED(0xbf497654209262676,32,FLEN)
NAN_BOXED(0x7e80dd0d122374413,32,FLEN)
NAN_BOXED(0x7f221a29132941353,32,FLEN)
NAN_BOXED(0xbf497654209262676,32,FLEN)
NAN_BOXED(0x7e80dd0d122374413,32,FLEN)
NAN_BOXED(0x7f221a29132941353,32,FLEN)
NAN_BOXED(0xbf497654209262676,32,FLEN)
NAN_BOXED(0x7e80dd0d122374413,32,FLEN)
NAN_BOXED(0x7f28f9a2133391778,32,FLEN)
NAN_BOXED(0x40a48a4f084525135,32,FLEN)
NAN_BOXED(0x7ec9b378127147896,32,FLEN)
NAN_BOXED(0x7f28f9a2133391778,32,FLEN)
NAN_BOXED(0x40a48a4f084525135,32,FLEN)
NAN_BOXED(0x7ec9b378127147896,32,FLEN)
NAN_BOXED(0x7f28f9a2133391778,32,FLEN)
NAN_BOXED(0x40a48a4f084525135,32,FLEN)
NAN_BOXED(0x7ec9b378127147896,32,FLEN)
NAN_BOXED(0x7f28f9a2133391778,32,FLEN)
NAN_BOXED(0x40a48a4f084525135,32,FLEN)
NAN_BOXED(0x7ec9b378127147896,32,FLEN)
NAN_BOXED(0x7f28f9a2133391778,32,FLEN)
NAN_BOXED(0x40a48a4f084525135,32,FLEN)
NAN_BOXED(0x7ec9b378127147896,32,FLEN)
NAN_BOXED(0x7f2ea04a133762122,32,FLEN)
NAN_BOXED(0x3f8ecbff066322943,32,FLEN)
NAN_BOXED(0x7ec5a044126880836,32,FLEN)
NAN_BOXED(0x7f2ea04a133762122,32,FLEN)
NAN_BOXED(0x3f8ecbff066322943,32,FLEN)
NAN_BOXED(0x7ec5a044126880836,32,FLEN)
NAN_BOXED(0x7f2ea04a133762122,32,FLEN)
NAN_BOXED(0x3f8ecbff066322943,32,FLEN)
NAN_BOXED(0x7ec5a044126880836,32,FLEN)
NAN_BOXED(0x7f2ea04a133762122,32,FLEN)
NAN_BOXED(0x3f8ecbff066322943,32,FLEN)
NAN_BOXED(0x7ec5a044126880836,32,FLEN)
NAN_BOXED(0x7f2ea04a133762122,32,FLEN)
NAN_BOXED(0x3f8ecbff066322943,32,FLEN)
NAN_BOXED(0x7ec5a044126880836,32,FLEN)
NAN_BOXED(0x7f36a9e2134288866,32,FLEN)
NAN_BOXED(0x3eb6353c052128572,32,FLEN)
NAN_BOXED(0x7ee202c3128741059,32,FLEN)
NAN_BOXED(0x7f36a9e2134288866,32,FLEN)
NAN_BOXED(0x3eb6353c052128572,32,FLEN)
NAN_BOXED(0x7ee202c3128741059,32,FLEN)
NAN_BOXED(0x7f36a9e2134288866,32,FLEN)
NAN_BOXED(0x3eb6353c052128572,32,FLEN)
NAN_BOXED(0x7ee202c3128741059,32,FLEN)
NAN_BOXED(0x7f36a9e2134288866,32,FLEN)
NAN_BOXED(0x3eb6353c052128572,32,FLEN)
NAN_BOXED(0x7ee202c3128741059,32,FLEN)
NAN_BOXED(0x7f36a9e2134288866,32,FLEN)
NAN_BOXED(0x3eb6353c052128572,32,FLEN)
NAN_BOXED(0x7ee202c3128741059,32,FLEN)
NAN_BOXED(0x79b19f1b041683739,32,FLEN)
NAN_BOXED(0xc43a9ca3292175523,32,FLEN)
NAN_BOXED(0x7efe85b6130609590,32,FLEN)
NAN_BOXED(0x79b19f1b041683739,32,FLEN)
NAN_BOXED(0xc43a9ca3292175523,32,FLEN)
NAN_BOXED(0x7efe85b6130609590,32,FLEN)
NAN_BOXED(0x79b19f1b041683739,32,FLEN)
NAN_BOXED(0xc43a9ca3292175523,32,FLEN)
NAN_BOXED(0x7efe85b6130609590,32,FLEN)
NAN_BOXED(0x79b19f1b041683739,32,FLEN)
NAN_BOXED(0xc43a9ca3292175523,32,FLEN)
NAN_BOXED(0x7efe85b6130609590,32,FLEN)
NAN_BOXED(0x79b19f1b041683739,32,FLEN)
NAN_BOXED(0xc43a9ca3292175523,32,FLEN)
NAN_BOXED(0x7efe85b6130609590,32,FLEN)
NAN_BOXED(0x7cae9fe8091818984,32,FLEN)
NAN_BOXED(0xc2669d12261504786,32,FLEN)
NAN_BOXED(0x7e8ac4bf123023551,32,FLEN)
NAN_BOXED(0x7cae9fe8091818984,32,FLEN)
NAN_BOXED(0xc2669d12261504786,32,FLEN)
NAN_BOXED(0x7e8ac4bf123023551,32,FLEN)
NAN_BOXED(0x7cae9fe8091818984,32,FLEN)
NAN_BOXED(0xc2669d12261504786,32,FLEN)
NAN_BOXED(0x7e8ac4bf123023551,32,FLEN)
NAN_BOXED(0x7cae9fe8091818984,32,FLEN)
NAN_BOXED(0xc2669d12261504786,32,FLEN)
NAN_BOXED(0x7e8ac4bf123023551,32,FLEN)
NAN_BOXED(0x7d8f0e02106527234,32,FLEN)
NAN_BOXED(0xc0093dc1221831105,32,FLEN)
NAN_BOXED(0x7f19a77e132387710,32,FLEN)
NAN_BOXED(0x7d8f0e02106527234,32,FLEN)
NAN_BOXED(0xc0093dc1221831105,32,FLEN)
NAN_BOXED(0x7f19a77e132387710,32,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;


signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_2:
    .fill 46*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine

tsig_begin_canary:
CANARY;
tsig_begin_canary:
CANARY;
mtrap_sigptr:
    .fill 64*(XLEN/32),4,0xdeadbeef
tsig_end_canary:
CANARY;
tsig_end_canary:
CANARY;

#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif

sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
