
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.7.1
// timestamp : Fri Jun 17 14:03:17 2022 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /scratch/pawan/work/normalised/RV64F/fcvt.lu.s.cgf \
 \
//                  -- xlen 64  \
//                  --randomize \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fcvt.lu.s instruction of the RISC-V RV64F_Zicsr,RV64FD_Zicsr extension for the fcvt.lu.s_b22 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV64IF_Zicsr,RV64IFD_Zicsr")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*RV64.*I.*F.*);def TEST_CASE_1=True;",fcvt.lu.s_b22)

RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x4,test_dataset_0)
RVTEST_SIGBASE(x9,signature_x9_1)

inst_0:// rs1==f9, rd==x30,fs1 == 0 and fe1 == 0x16 and fm1 == 0x63857e and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f9; dest:x30; op1val:0xb63857e; valaddr_reg:x4;
val_offset:0*FLEN/8; rmval:dyn; correctval:??; testreg:x11;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x30, f9, dyn, 0, 0, x4, 0*FLEN/8, x8, x9, x11,FLREG)

inst_1:// rs1==f16, rd==x3,fs1 == 0 and fe1 == 0x7c and fm1 == 0x4923b8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f16; dest:x3; op1val:0x3e4923b8; valaddr_reg:x4;
val_offset:1*FLEN/8; rmval:dyn; correctval:??; testreg:x11;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x3, f16, dyn, 0, 0, x4, 1*FLEN/8, x8, x9, x11,FLREG)

inst_2:// rs1==f18, rd==x5,fs1 == 0 and fe1 == 0x7d and fm1 == 0x36e5d6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f18; dest:x5; op1val:0x3eb6e5d6; valaddr_reg:x4;
val_offset:2*FLEN/8; rmval:dyn; correctval:??; testreg:x11;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x5, f18, dyn, 0, 0, x4, 2*FLEN/8, x8, x9, x11,FLREG)

inst_3:// rs1==f14, rd==x10,fs1 == 0 and fe1 == 0x7e and fm1 == 0x49fee5 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f14; dest:x10; op1val:0x3f49fee5; valaddr_reg:x4;
val_offset:3*FLEN/8; rmval:dyn; correctval:??; testreg:x11;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x10, f14, dyn, 0, 0, x4, 3*FLEN/8, x8, x9, x11,FLREG)

inst_4:// rs1==f20, rd==x29,fs1 == 0 and fe1 == 0x7f and fm1 == 0x1a616d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f20; dest:x29; op1val:0x3f9a616d; valaddr_reg:x4;
val_offset:4*FLEN/8; rmval:dyn; correctval:??; testreg:x11;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x29, f20, dyn, 0, 0, x4, 4*FLEN/8, x8, x9, x11,FLREG)

inst_5:// rs1==f22, rd==x18,fs1 == 0 and fe1 == 0x80 and fm1 == 0x681ae9 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f22; dest:x18; op1val:0x40681ae9; valaddr_reg:x4;
val_offset:5*FLEN/8; rmval:dyn; correctval:??; testreg:x11;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x18, f22, dyn, 0, 0, x4, 5*FLEN/8, x8, x9, x11,FLREG)

inst_6:// rs1==f26, rd==x7,fs1 == 0 and fe1 == 0x81 and fm1 == 0x696b5c and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f26; dest:x7; op1val:0x40e96b5c; valaddr_reg:x4;
val_offset:6*FLEN/8; rmval:dyn; correctval:??; testreg:x11;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x7, f26, dyn, 0, 0, x4, 6*FLEN/8, x8, x9, x11,FLREG)

inst_7:// rs1==f6, rd==x1,fs1 == 0 and fe1 == 0x83 and fm1 == 0x148266 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f6; dest:x1; op1val:0x41948266; valaddr_reg:x4;
val_offset:7*FLEN/8; rmval:dyn; correctval:??; testreg:x11;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x1, f6, dyn, 0, 0, x4, 7*FLEN/8, x8, x9, x11,FLREG)

inst_8:// rs1==f31, rd==x23,fs1 == 0 and fe1 == 0x84 and fm1 == 0x42a54b and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x23; op1val:0x4242a54b; valaddr_reg:x4;
val_offset:8*FLEN/8; rmval:dyn; correctval:??; testreg:x11;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x23, f31, dyn, 0, 0, x4, 8*FLEN/8, x8, x9, x11,FLREG)

inst_9:// rs1==f11, rd==x27,fs1 == 0 and fe1 == 0x85 and fm1 == 0x29f475 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f11; dest:x27; op1val:0x42a9f475; valaddr_reg:x4;
val_offset:9*FLEN/8; rmval:dyn; correctval:??; testreg:x11;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x27, f11, dyn, 0, 0, x4, 9*FLEN/8, x8, x9, x11,FLREG)

inst_10:// rs1==f29, rd==x20,fs1 == 0 and fe1 == 0x88 and fm1 == 0x7f8f2d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f29; dest:x20; op1val:0x447f8f2d; valaddr_reg:x4;
val_offset:10*FLEN/8; rmval:dyn; correctval:??; testreg:x11;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x20, f29, dyn, 0, 0, x4, 10*FLEN/8, x8, x9, x11,FLREG)

inst_11:// rs1==f10, rd==x0,fs1 == 0 and fe1 == 0x89 and fm1 == 0x05b406 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f10; dest:x0; op1val:0x4485b406; valaddr_reg:x4;
val_offset:11*FLEN/8; rmval:dyn; correctval:??; testreg:x11;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x0, f10, dyn, 0, 0, x4, 11*FLEN/8, x8, x9, x11,FLREG)

inst_12:// rs1==f27, rd==x21,fs1 == 0 and fe1 == 0x8a and fm1 == 0x6e19c1 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f27; dest:x21; op1val:0x456e19c1; valaddr_reg:x4;
val_offset:12*FLEN/8; rmval:dyn; correctval:??; testreg:x11;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x21, f27, dyn, 0, 0, x4, 12*FLEN/8, x8, x9, x11,FLREG)

inst_13:// rs1==f1, rd==x13,fs1 == 0 and fe1 == 0x8b and fm1 == 0x4d3559 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f1; dest:x13; op1val:0x45cd3559; valaddr_reg:x4;
val_offset:13*FLEN/8; rmval:dyn; correctval:??; testreg:x11;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x13, f1, dyn, 0, 0, x4, 13*FLEN/8, x8, x9, x11,FLREG)

inst_14:// rs1==f17, rd==x6,fs1 == 0 and fe1 == 0x8c and fm1 == 0x30d877 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f17; dest:x6; op1val:0x4630d877; valaddr_reg:x4;
val_offset:14*FLEN/8; rmval:dyn; correctval:??; testreg:x11;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x6, f17, dyn, 0, 0, x4, 14*FLEN/8, x8, x9, x11,FLREG)

inst_15:// rs1==f5, rd==x26,fs1 == 0 and fe1 == 0x8e and fm1 == 0x56653f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f5; dest:x26; op1val:0x4756653f; valaddr_reg:x4;
val_offset:15*FLEN/8; rmval:dyn; correctval:??; testreg:x11;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x26, f5, dyn, 0, 0, x4, 15*FLEN/8, x8, x9, x11,FLREG)

inst_16:// rs1==f23, rd==x12,fs1 == 0 and fe1 == 0x8f and fm1 == 0x3a7971 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f23; dest:x12; op1val:0x47ba7971; valaddr_reg:x4;
val_offset:16*FLEN/8; rmval:dyn; correctval:??; testreg:x11;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x12, f23, dyn, 0, 0, x4, 16*FLEN/8, x8, x9, x11,FLREG)

inst_17:// rs1==f3, rd==x2,fs1 == 0 and fe1 == 0x90 and fm1 == 0x57ca4f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f3; dest:x2; op1val:0x4857ca4f; valaddr_reg:x4;
val_offset:17*FLEN/8; rmval:dyn; correctval:??; testreg:x11;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x2, f3, dyn, 0, 0, x4, 17*FLEN/8, x8, x9, x11,FLREG)

inst_18:// rs1==f2, rd==x31,fs1 == 0 and fe1 == 0x91 and fm1 == 0x54b761 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f2; dest:x31; op1val:0x48d4b761; valaddr_reg:x4;
val_offset:18*FLEN/8; rmval:dyn; correctval:??; testreg:x11;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f2, dyn, 0, 0, x4, 18*FLEN/8, x8, x9, x11,FLREG)

inst_19:// rs1==f19, rd==x24,fs1 == 0 and fe1 == 0x92 and fm1 == 0x11056d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f19; dest:x24; op1val:0x4911056d; valaddr_reg:x4;
val_offset:19*FLEN/8; rmval:dyn; correctval:??; testreg:x11;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x24, f19, dyn, 0, 0, x4, 19*FLEN/8, x8, x9, x11,FLREG)

inst_20:// rs1==f28, rd==x19,fs1 == 0 and fe1 == 0x94 and fm1 == 0x7dbfb7 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f28; dest:x19; op1val:0x4a7dbfb7; valaddr_reg:x4;
val_offset:20*FLEN/8; rmval:dyn; correctval:??; testreg:x11;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x19, f28, dyn, 0, 0, x4, 20*FLEN/8, x8, x9, x11,FLREG)

inst_21:// rs1==f0, rd==x28,fs1 == 0 and fe1 == 0x95 and fm1 == 0x7c14e9 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f0; dest:x28; op1val:0x4afc14e9; valaddr_reg:x4;
val_offset:21*FLEN/8; rmval:dyn; correctval:??; testreg:x11;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x28, f0, dyn, 0, 0, x4, 21*FLEN/8, x8, x9, x11,FLREG)

inst_22:// rs1==f8, rd==x17,fs1 == 0 and fe1 == 0x96 and fm1 == 0x4e817e and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f8; dest:x17; op1val:0x4b4e817e; valaddr_reg:x4;
val_offset:22*FLEN/8; rmval:dyn; correctval:??; testreg:x11;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x17, f8, dyn, 0, 0, x4, 22*FLEN/8, x8, x9, x11,FLREG)

inst_23:// rs1==f30, rd==x25,fs1 == 0 and fe1 == 0x98 and fm1 == 0x0084e1 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f30; dest:x25; op1val:0x4c0084e1; valaddr_reg:x4;
val_offset:23*FLEN/8; rmval:dyn; correctval:??; testreg:x11;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x25, f30, dyn, 0, 0, x4, 23*FLEN/8, x8, x9, x11,FLREG)

inst_24:// rs1==f21, rd==x16,fs1 == 0 and fe1 == 0x99 and fm1 == 0x112603 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f21; dest:x16; op1val:0x4c912603; valaddr_reg:x4;
val_offset:24*FLEN/8; rmval:dyn; correctval:??; testreg:x11;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x16, f21, dyn, 0, 0, x4, 24*FLEN/8, x8, x9, x11,FLREG)
RVTEST_VALBASEUPD(x3,test_dataset_1)

inst_25:// rs1==f12, rd==x4,fs1 == 0 and fe1 == 0x9d and fm1 == 0x72f818 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f12; dest:x4; op1val:0x4ef2f818; valaddr_reg:x3;
val_offset:0*FLEN/8; rmval:dyn; correctval:??; testreg:x11;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x4, f12, dyn, 0, 0, x3, 0*FLEN/8, x5, x9, x11,FLREG)

inst_26:// rs1==f15, rd==x8,fs1 == 0 and fe1 == 0x9f and fm1 == 0x46450c and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f15; dest:x8; op1val:0x4fc6450c; valaddr_reg:x3;
val_offset:1*FLEN/8; rmval:dyn; correctval:??; testreg:x11;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x8, f15, dyn, 0, 0, x3, 1*FLEN/8, x5, x9, x11,FLREG)

inst_27:// rs1==f7, rd==x15,fs1 == 0 and fe1 == 0xa0 and fm1 == 0x37cfdc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f7; dest:x15; op1val:0x5037cfdc; valaddr_reg:x3;
val_offset:2*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x15, f7, dyn, 0, 0, x3, 2*FLEN/8, x5, x9, x2,FLREG)
RVTEST_SIGBASE(x1,signature_x1_0)

inst_28:// rs1==f25, rd==x9,fs1 == 0 and fe1 == 0xa2 and fm1 == 0x4ad269 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f25; dest:x9; op1val:0x514ad269; valaddr_reg:x3;
val_offset:3*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x9, f25, dyn, 0, 0, x3, 3*FLEN/8, x5, x1, x2,FLREG)

inst_29:// rs1==f24, rd==x22,fs1 == 0 and fe1 == 0xa6 and fm1 == 0x34d8ee and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f24; dest:x22; op1val:0x5334d8ee; valaddr_reg:x3;
val_offset:4*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x22, f24, dyn, 0, 0, x3, 4*FLEN/8, x5, x1, x2,FLREG)

inst_30:// rs1==f13, rd==x11,fs1 == 0 and fe1 == 0xa7 and fm1 == 0x04b9f4 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f13; dest:x11; op1val:0x5384b9f4; valaddr_reg:x3;
val_offset:5*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x11, f13, dyn, 0, 0, x3, 5*FLEN/8, x5, x1, x2,FLREG)

inst_31:// rs1==f4, rd==x14,fs1 == 0 and fe1 == 0xa8 and fm1 == 0x3f90b4 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f4; dest:x14; op1val:0x543f90b4; valaddr_reg:x3;
val_offset:6*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x14, f4, dyn, 0, 0, x3, 6*FLEN/8, x5, x1, x2,FLREG)

inst_32:// fs1 == 0 and fe1 == 0xaa and fm1 == 0x5435c5 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0x555435c5; valaddr_reg:x3;
val_offset:7*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 7*FLEN/8, x5, x1, x2,FLREG)

inst_33:// fs1 == 0 and fe1 == 0xac and fm1 == 0x6d74c2 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0x566d74c2; valaddr_reg:x3;
val_offset:8*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 8*FLEN/8, x5, x1, x2,FLREG)

inst_34:// fs1 == 0 and fe1 == 0xad and fm1 == 0x1328fb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0x569328fb; valaddr_reg:x3;
val_offset:9*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 9*FLEN/8, x5, x1, x2,FLREG)

inst_35:// fs1 == 0 and fe1 == 0xb0 and fm1 == 0x4cf78c and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0x584cf78c; valaddr_reg:x3;
val_offset:10*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 10*FLEN/8, x5, x1, x2,FLREG)

inst_36:// fs1 == 0 and fe1 == 0xb3 and fm1 == 0x0c5d94 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0x598c5d94; valaddr_reg:x3;
val_offset:11*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 11*FLEN/8, x5, x1, x2,FLREG)

inst_37:// fs1 == 0 and fe1 == 0xb5 and fm1 == 0x675a83 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0x5ae75a83; valaddr_reg:x3;
val_offset:12*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 12*FLEN/8, x5, x1, x2,FLREG)

inst_38:// fs1 == 0 and fe1 == 0xb6 and fm1 == 0x794e08 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0x5b794e08; valaddr_reg:x3;
val_offset:13*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 13*FLEN/8, x5, x1, x2,FLREG)

inst_39:// fs1 == 0 and fe1 == 0xb8 and fm1 == 0x350099 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0x5c350099; valaddr_reg:x3;
val_offset:14*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 14*FLEN/8, x5, x1, x2,FLREG)

inst_40:// fs1 == 0 and fe1 == 0xba and fm1 == 0x23297b and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0x5d23297b; valaddr_reg:x3;
val_offset:15*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 15*FLEN/8, x5, x1, x2,FLREG)

inst_41:// fs1 == 0 and fe1 == 0xbd and fm1 == 0x0f4b33 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0x5e8f4b33; valaddr_reg:x3;
val_offset:16*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 16*FLEN/8, x5, x1, x2,FLREG)

inst_42:// fs1 == 0 and fe1 == 0xbe and fm1 == 0x3a5585 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0x5f3a5585; valaddr_reg:x3;
val_offset:17*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 17*FLEN/8, x5, x1, x2,FLREG)

inst_43:// fs1 == 0 and fe1 == 0xc1 and fm1 == 0x69185a and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0x60e9185a; valaddr_reg:x3;
val_offset:18*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 18*FLEN/8, x5, x1, x2,FLREG)

inst_44:// fs1 == 0 and fe1 == 0xd8 and fm1 == 0x62ecba and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0x6c62ecba; valaddr_reg:x3;
val_offset:19*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 19*FLEN/8, x5, x1, x2,FLREG)

inst_45:// fs1 == 1 and fe1 == 0x82 and fm1 == 0x53a4fc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0xc153a4fc; valaddr_reg:x3;
val_offset:20*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 20*FLEN/8, x5, x1, x2,FLREG)

inst_46:// fs1 == 1 and fe1 == 0x86 and fm1 == 0x1fffe4 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0xc31fffe4; valaddr_reg:x3;
val_offset:21*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 21*FLEN/8, x5, x1, x2,FLREG)

inst_47:// fs1 == 1 and fe1 == 0x87 and fm1 == 0x79f5e7 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0xc3f9f5e7; valaddr_reg:x3;
val_offset:22*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 22*FLEN/8, x5, x1, x2,FLREG)

inst_48:// fs1 == 1 and fe1 == 0x8d and fm1 == 0x244d9a and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0xc6a44d9a; valaddr_reg:x3;
val_offset:23*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 23*FLEN/8, x5, x1, x2,FLREG)

inst_49:// fs1 == 1 and fe1 == 0x93 and fm1 == 0x624882 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0xc9e24882; valaddr_reg:x3;
val_offset:24*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 24*FLEN/8, x5, x1, x2,FLREG)

inst_50:// fs1 == 1 and fe1 == 0x97 and fm1 == 0x05aa55 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0xcb85aa55; valaddr_reg:x3;
val_offset:25*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 25*FLEN/8, x5, x1, x2,FLREG)

inst_51:// fs1 == 1 and fe1 == 0x9a and fm1 == 0x7872c3 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0xcd7872c3; valaddr_reg:x3;
val_offset:26*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 26*FLEN/8, x5, x1, x2,FLREG)

inst_52:// fs1 == 1 and fe1 == 0x9b and fm1 == 0x26c422 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0xcda6c422; valaddr_reg:x3;
val_offset:27*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 27*FLEN/8, x5, x1, x2,FLREG)

inst_53:// fs1 == 1 and fe1 == 0x9c and fm1 == 0x2edddb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0xce2edddb; valaddr_reg:x3;
val_offset:28*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 28*FLEN/8, x5, x1, x2,FLREG)

inst_54:// fs1 == 1 and fe1 == 0x9e and fm1 == 0x283d12 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0xcf283d12; valaddr_reg:x3;
val_offset:29*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 29*FLEN/8, x5, x1, x2,FLREG)

inst_55:// fs1 == 1 and fe1 == 0xa1 and fm1 == 0x0851ba and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0xd08851ba; valaddr_reg:x3;
val_offset:30*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 30*FLEN/8, x5, x1, x2,FLREG)

inst_56:// fs1 == 1 and fe1 == 0xa3 and fm1 == 0x6c0a6a and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0xd1ec0a6a; valaddr_reg:x3;
val_offset:31*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 31*FLEN/8, x5, x1, x2,FLREG)

inst_57:// fs1 == 1 and fe1 == 0xa4 and fm1 == 0x140588 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0xd2140588; valaddr_reg:x3;
val_offset:32*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 32*FLEN/8, x5, x1, x2,FLREG)

inst_58:// fs1 == 1 and fe1 == 0xa5 and fm1 == 0x1cb5d4 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0xd29cb5d4; valaddr_reg:x3;
val_offset:33*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 33*FLEN/8, x5, x1, x2,FLREG)

inst_59:// fs1 == 1 and fe1 == 0xa9 and fm1 == 0x68b3a9 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0xd4e8b3a9; valaddr_reg:x3;
val_offset:34*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 34*FLEN/8, x5, x1, x2,FLREG)

inst_60:// fs1 == 1 and fe1 == 0xab and fm1 == 0x444931 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0xd5c44931; valaddr_reg:x3;
val_offset:35*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 35*FLEN/8, x5, x1, x2,FLREG)

inst_61:// fs1 == 1 and fe1 == 0xae and fm1 == 0x489b2c and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0xd7489b2c; valaddr_reg:x3;
val_offset:36*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 36*FLEN/8, x5, x1, x2,FLREG)

inst_62:// fs1 == 1 and fe1 == 0xaf and fm1 == 0x2fe4f5 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0xd7afe4f5; valaddr_reg:x3;
val_offset:37*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 37*FLEN/8, x5, x1, x2,FLREG)

inst_63:// fs1 == 1 and fe1 == 0xb1 and fm1 == 0x0e7405 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0xd88e7405; valaddr_reg:x3;
val_offset:38*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 38*FLEN/8, x5, x1, x2,FLREG)

inst_64:// fs1 == 1 and fe1 == 0xb2 and fm1 == 0x634400 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0xd9634400; valaddr_reg:x3;
val_offset:39*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 39*FLEN/8, x5, x1, x2,FLREG)

inst_65:// fs1 == 1 and fe1 == 0xb4 and fm1 == 0x154b68 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0xda154b68; valaddr_reg:x3;
val_offset:40*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 40*FLEN/8, x5, x1, x2,FLREG)

inst_66:// fs1 == 1 and fe1 == 0xb7 and fm1 == 0x377421 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0xdbb77421; valaddr_reg:x3;
val_offset:41*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 41*FLEN/8, x5, x1, x2,FLREG)

inst_67:// fs1 == 1 and fe1 == 0xb9 and fm1 == 0x1f6bf3 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0xdc9f6bf3; valaddr_reg:x3;
val_offset:42*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 42*FLEN/8, x5, x1, x2,FLREG)

inst_68:// fs1 == 1 and fe1 == 0xbb and fm1 == 0x4f0223 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0xddcf0223; valaddr_reg:x3;
val_offset:43*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 43*FLEN/8, x5, x1, x2,FLREG)

inst_69:// fs1 == 1 and fe1 == 0xbc and fm1 == 0x16d7ca and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0xde16d7ca; valaddr_reg:x3;
val_offset:44*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 44*FLEN/8, x5, x1, x2,FLREG)

inst_70:// fs1 == 1 and fe1 == 0xbf and fm1 == 0x151cae and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0xdf951cae; valaddr_reg:x3;
val_offset:45*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 45*FLEN/8, x5, x1, x2,FLREG)

inst_71:// fs1 == 1 and fe1 == 0xc0 and fm1 == 0x53096a and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0xe053096a; valaddr_reg:x3;
val_offset:46*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 46*FLEN/8, x5, x1, x2,FLREG)

inst_72:// fs1 == 0 and fe1 == 0x89 and fm1 == 0x05b406 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvt.lu.s ; op1:f31; dest:x31; op1val:0x4485b406; valaddr_reg:x3;
val_offset:47*FLEN/8; rmval:dyn; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvt.lu.s, x31, f31, dyn, 0, 0, x3, 47*FLEN/8, x5, x1, x2,FLREG)
#endif


RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(191071614,32,FLEN)
NAN_BOXED(1044980664,32,FLEN)
NAN_BOXED(1052173782,32,FLEN)
NAN_BOXED(1061813989,32,FLEN)
NAN_BOXED(1067082093,32,FLEN)
NAN_BOXED(1080564457,32,FLEN)
NAN_BOXED(1089039196,32,FLEN)
NAN_BOXED(1100251750,32,FLEN)
NAN_BOXED(1111663947,32,FLEN)
NAN_BOXED(1118434421,32,FLEN)
NAN_BOXED(1149210413,32,FLEN)
NAN_BOXED(1149613062,32,FLEN)
NAN_BOXED(1164843457,32,FLEN)
NAN_BOXED(1171076441,32,FLEN)
NAN_BOXED(1177606263,32,FLEN)
NAN_BOXED(1196844351,32,FLEN)
NAN_BOXED(1203403121,32,FLEN)
NAN_BOXED(1213712975,32,FLEN)
NAN_BOXED(1221900129,32,FLEN)
NAN_BOXED(1225852269,32,FLEN)
NAN_BOXED(1249755063,32,FLEN)
NAN_BOXED(1258034409,32,FLEN)
NAN_BOXED(1263436158,32,FLEN)
NAN_BOXED(1275102433,32,FLEN)
NAN_BOXED(1284580867,32,FLEN)
test_dataset_1:
NAN_BOXED(1324546072,32,FLEN)
NAN_BOXED(1338393868,32,FLEN)
NAN_BOXED(1345834972,32,FLEN)
NAN_BOXED(1363858025,32,FLEN)
NAN_BOXED(1395972334,32,FLEN)
NAN_BOXED(1401207284,32,FLEN)
NAN_BOXED(1413451956,32,FLEN)
NAN_BOXED(1431582149,32,FLEN)
NAN_BOXED(1450013890,32,FLEN)
NAN_BOXED(1452484859,32,FLEN)
NAN_BOXED(1481439116,32,FLEN)
NAN_BOXED(1502371220,32,FLEN)
NAN_BOXED(1525111427,32,FLEN)
NAN_BOXED(1534676488,32,FLEN)
NAN_BOXED(1546977433,32,FLEN)
NAN_BOXED(1562585467,32,FLEN)
NAN_BOXED(1586449203,32,FLEN)
NAN_BOXED(1597658501,32,FLEN)
NAN_BOXED(1625888858,32,FLEN)
NAN_BOXED(1818422458,32,FLEN)
NAN_BOXED(3243484412,32,FLEN)
NAN_BOXED(3273654244,32,FLEN)
NAN_BOXED(3287938535,32,FLEN)
NAN_BOXED(3332656538,32,FLEN)
NAN_BOXED(3387050114,32,FLEN)
NAN_BOXED(3414534741,32,FLEN)
NAN_BOXED(3447222979,32,FLEN)
NAN_BOXED(3450258466,32,FLEN)
NAN_BOXED(3459177947,32,FLEN)
NAN_BOXED(3475520786,32,FLEN)
NAN_BOXED(3498594746,32,FLEN)
NAN_BOXED(3521907306,32,FLEN)
NAN_BOXED(3524527496,32,FLEN)
NAN_BOXED(3533485524,32,FLEN)
NAN_BOXED(3572020137,32,FLEN)
NAN_BOXED(3586410801,32,FLEN)
NAN_BOXED(3611859756,32,FLEN)
NAN_BOXED(3618628853,32,FLEN)
NAN_BOXED(3633214469,32,FLEN)
NAN_BOXED(3647161344,32,FLEN)
NAN_BOXED(3658828648,32,FLEN)
NAN_BOXED(3686233121,32,FLEN)
NAN_BOXED(3701435379,32,FLEN)
NAN_BOXED(3721331235,32,FLEN)
NAN_BOXED(3726038986,32,FLEN)
NAN_BOXED(3751091374,32,FLEN)
NAN_BOXED(3763538282,32,FLEN)
NAN_BOXED(1149613062,32,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;


signature_x9_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_1:
    .fill 56*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_0:
    .fill 90*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine

tsig_begin_canary:
CANARY;
tsig_begin_canary:
CANARY;
mtrap_sigptr:
    .fill 64*(XLEN/32),4,0xdeadbeef
tsig_end_canary:
CANARY;
tsig_end_canary:
CANARY;

#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif

sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
