
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.11.0
// timestamp : Mon Feb  5 04:35:29 2024 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /home/riscv/riscv-ctg/sample_cgfs/dataset.cgf \
//                  --cgf /home/riscv/riscv-ctg/sample_cgfs/sample_cgfs_fext/RV64Zfinx/fmadd.s.cgf \
 \
//                  -- xlen 64  \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fmadd.s instruction of the RISC-V RV64_Zfinx,RV64_Zdinx extension for the fmadd_b15 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV64I_Zfinx,RV64I_Zdinx")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*Zfinx.*);def TEST_CASE_1=True;",fmadd_b15)

RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_36816:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eca05eb; op2val:0xc0223301;
op3val:0xff3bbbbb; valaddr_reg:x12; val_offset:110385*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110385*FLEN/8, x13, x9, x10)

inst_36817:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eca05eb; op2val:0xc0223301;
op3val:0xff444444; valaddr_reg:x12; val_offset:110388*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110388*FLEN/8, x13, x9, x10)

inst_36818:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eca05eb; op2val:0xc0223301;
op3val:0xff249249; valaddr_reg:x12; val_offset:110391*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110391*FLEN/8, x13, x9, x10)

inst_36819:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eca05eb; op2val:0xc0223301;
op3val:0xff5b6db6; valaddr_reg:x12; val_offset:110394*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110394*FLEN/8, x13, x9, x10)

inst_36820:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eca05eb; op2val:0xc0223301;
op3val:0xff333333; valaddr_reg:x12; val_offset:110397*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110397*FLEN/8, x13, x9, x10)

inst_36821:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eca05eb; op2val:0xc0223301;
op3val:0xff4ccccc; valaddr_reg:x12; val_offset:110400*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110400*FLEN/8, x13, x9, x10)

inst_36822:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf57fffff; valaddr_reg:x12; val_offset:110403*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110403*FLEN/8, x13, x9, x10)

inst_36823:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf5000000; valaddr_reg:x12; val_offset:110406*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110406*FLEN/8, x13, x9, x10)

inst_36824:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf53fffff; valaddr_reg:x12; val_offset:110409*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110409*FLEN/8, x13, x9, x10)

inst_36825:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf5400000; valaddr_reg:x12; val_offset:110412*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110412*FLEN/8, x13, x9, x10)

inst_36826:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf51fffff; valaddr_reg:x12; val_offset:110415*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110415*FLEN/8, x13, x9, x10)

inst_36827:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf5600000; valaddr_reg:x12; val_offset:110418*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110418*FLEN/8, x13, x9, x10)

inst_36828:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf50fffff; valaddr_reg:x12; val_offset:110421*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110421*FLEN/8, x13, x9, x10)

inst_36829:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf5700000; valaddr_reg:x12; val_offset:110424*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110424*FLEN/8, x13, x9, x10)

inst_36830:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf507ffff; valaddr_reg:x12; val_offset:110427*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110427*FLEN/8, x13, x9, x10)

inst_36831:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf5780000; valaddr_reg:x12; val_offset:110430*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110430*FLEN/8, x13, x9, x10)

inst_36832:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf503ffff; valaddr_reg:x12; val_offset:110433*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110433*FLEN/8, x13, x9, x10)

inst_36833:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf57c0000; valaddr_reg:x12; val_offset:110436*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110436*FLEN/8, x13, x9, x10)

inst_36834:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf501ffff; valaddr_reg:x12; val_offset:110439*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110439*FLEN/8, x13, x9, x10)

inst_36835:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf57e0000; valaddr_reg:x12; val_offset:110442*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110442*FLEN/8, x13, x9, x10)

inst_36836:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf500ffff; valaddr_reg:x12; val_offset:110445*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110445*FLEN/8, x13, x9, x10)

inst_36837:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf57f0000; valaddr_reg:x12; val_offset:110448*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110448*FLEN/8, x13, x9, x10)

inst_36838:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf5007fff; valaddr_reg:x12; val_offset:110451*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110451*FLEN/8, x13, x9, x10)

inst_36839:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf57f8000; valaddr_reg:x12; val_offset:110454*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110454*FLEN/8, x13, x9, x10)

inst_36840:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf5003fff; valaddr_reg:x12; val_offset:110457*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110457*FLEN/8, x13, x9, x10)

inst_36841:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf57fc000; valaddr_reg:x12; val_offset:110460*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110460*FLEN/8, x13, x9, x10)

inst_36842:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf5001fff; valaddr_reg:x12; val_offset:110463*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110463*FLEN/8, x13, x9, x10)

inst_36843:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf57fe000; valaddr_reg:x12; val_offset:110466*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110466*FLEN/8, x13, x9, x10)

inst_36844:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf5000fff; valaddr_reg:x12; val_offset:110469*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110469*FLEN/8, x13, x9, x10)

inst_36845:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf57ff000; valaddr_reg:x12; val_offset:110472*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110472*FLEN/8, x13, x9, x10)

inst_36846:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf50007ff; valaddr_reg:x12; val_offset:110475*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110475*FLEN/8, x13, x9, x10)

inst_36847:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf57ff800; valaddr_reg:x12; val_offset:110478*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110478*FLEN/8, x13, x9, x10)

inst_36848:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf50003ff; valaddr_reg:x12; val_offset:110481*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110481*FLEN/8, x13, x9, x10)

inst_36849:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf57ffc00; valaddr_reg:x12; val_offset:110484*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110484*FLEN/8, x13, x9, x10)

inst_36850:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf50001ff; valaddr_reg:x12; val_offset:110487*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110487*FLEN/8, x13, x9, x10)

inst_36851:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf57ffe00; valaddr_reg:x12; val_offset:110490*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110490*FLEN/8, x13, x9, x10)

inst_36852:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf50000ff; valaddr_reg:x12; val_offset:110493*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110493*FLEN/8, x13, x9, x10)

inst_36853:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf57fff00; valaddr_reg:x12; val_offset:110496*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110496*FLEN/8, x13, x9, x10)

inst_36854:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf500007f; valaddr_reg:x12; val_offset:110499*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110499*FLEN/8, x13, x9, x10)

inst_36855:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf57fff80; valaddr_reg:x12; val_offset:110502*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110502*FLEN/8, x13, x9, x10)

inst_36856:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf500003f; valaddr_reg:x12; val_offset:110505*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110505*FLEN/8, x13, x9, x10)

inst_36857:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf57fffc0; valaddr_reg:x12; val_offset:110508*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110508*FLEN/8, x13, x9, x10)

inst_36858:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf500001f; valaddr_reg:x12; val_offset:110511*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110511*FLEN/8, x13, x9, x10)

inst_36859:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf57fffe0; valaddr_reg:x12; val_offset:110514*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110514*FLEN/8, x13, x9, x10)

inst_36860:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf500000f; valaddr_reg:x12; val_offset:110517*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110517*FLEN/8, x13, x9, x10)

inst_36861:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf57ffff0; valaddr_reg:x12; val_offset:110520*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110520*FLEN/8, x13, x9, x10)

inst_36862:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf5000007; valaddr_reg:x12; val_offset:110523*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110523*FLEN/8, x13, x9, x10)

inst_36863:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf57ffff8; valaddr_reg:x12; val_offset:110526*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110526*FLEN/8, x13, x9, x10)

inst_36864:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf5000003; valaddr_reg:x12; val_offset:110529*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110529*FLEN/8, x13, x9, x10)

inst_36865:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf57ffffc; valaddr_reg:x12; val_offset:110532*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110532*FLEN/8, x13, x9, x10)

inst_36866:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf5000001; valaddr_reg:x12; val_offset:110535*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110535*FLEN/8, x13, x9, x10)

inst_36867:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xf57ffffe; valaddr_reg:x12; val_offset:110538*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110538*FLEN/8, x13, x9, x10)

inst_36868:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xff7ffff8; valaddr_reg:x12; val_offset:110541*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110541*FLEN/8, x13, x9, x10)

inst_36869:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xff000007; valaddr_reg:x12; val_offset:110544*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110544*FLEN/8, x13, x9, x10)

inst_36870:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xff7ffffc; valaddr_reg:x12; val_offset:110547*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110547*FLEN/8, x13, x9, x10)

inst_36871:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xff000003; valaddr_reg:x12; val_offset:110550*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110550*FLEN/8, x13, x9, x10)

inst_36872:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xff7ffffe; valaddr_reg:x12; val_offset:110553*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110553*FLEN/8, x13, x9, x10)

inst_36873:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xff000001; valaddr_reg:x12; val_offset:110556*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110556*FLEN/8, x13, x9, x10)

inst_36874:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xff36db6d; valaddr_reg:x12; val_offset:110559*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110559*FLEN/8, x13, x9, x10)

inst_36875:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xff6db6db; valaddr_reg:x12; val_offset:110562*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110562*FLEN/8, x13, x9, x10)

inst_36876:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xff199999; valaddr_reg:x12; val_offset:110565*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110565*FLEN/8, x13, x9, x10)

inst_36877:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xff666666; valaddr_reg:x12; val_offset:110568*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110568*FLEN/8, x13, x9, x10)

inst_36878:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xff3bbbbb; valaddr_reg:x12; val_offset:110571*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110571*FLEN/8, x13, x9, x10)

inst_36879:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xff444444; valaddr_reg:x12; val_offset:110574*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110574*FLEN/8, x13, x9, x10)

inst_36880:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xff249249; valaddr_reg:x12; val_offset:110577*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110577*FLEN/8, x13, x9, x10)

inst_36881:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xff5b6db6; valaddr_reg:x12; val_offset:110580*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110580*FLEN/8, x13, x9, x10)

inst_36882:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xff333333; valaddr_reg:x12; val_offset:110583*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110583*FLEN/8, x13, x9, x10)

inst_36883:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf5731; op2val:0xc012b7b4;
op3val:0xff4ccccc; valaddr_reg:x12; val_offset:110586*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110586*FLEN/8, x13, x9, x10)

inst_36884:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf5ffffff; valaddr_reg:x12; val_offset:110589*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110589*FLEN/8, x13, x9, x10)

inst_36885:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf5800000; valaddr_reg:x12; val_offset:110592*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110592*FLEN/8, x13, x9, x10)

inst_36886:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf5bfffff; valaddr_reg:x12; val_offset:110595*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110595*FLEN/8, x13, x9, x10)

inst_36887:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf5c00000; valaddr_reg:x12; val_offset:110598*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110598*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_288)
inst_36888:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf59fffff; valaddr_reg:x12; val_offset:110601*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110601*FLEN/8, x13, x9, x10)

inst_36889:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf5e00000; valaddr_reg:x12; val_offset:110604*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110604*FLEN/8, x13, x9, x10)

inst_36890:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf58fffff; valaddr_reg:x12; val_offset:110607*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110607*FLEN/8, x13, x9, x10)

inst_36891:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf5f00000; valaddr_reg:x12; val_offset:110610*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110610*FLEN/8, x13, x9, x10)

inst_36892:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf587ffff; valaddr_reg:x12; val_offset:110613*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110613*FLEN/8, x13, x9, x10)

inst_36893:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf5f80000; valaddr_reg:x12; val_offset:110616*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110616*FLEN/8, x13, x9, x10)

inst_36894:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf583ffff; valaddr_reg:x12; val_offset:110619*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110619*FLEN/8, x13, x9, x10)

inst_36895:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf5fc0000; valaddr_reg:x12; val_offset:110622*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110622*FLEN/8, x13, x9, x10)

inst_36896:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf581ffff; valaddr_reg:x12; val_offset:110625*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110625*FLEN/8, x13, x9, x10)

inst_36897:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf5fe0000; valaddr_reg:x12; val_offset:110628*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110628*FLEN/8, x13, x9, x10)

inst_36898:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf580ffff; valaddr_reg:x12; val_offset:110631*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110631*FLEN/8, x13, x9, x10)

inst_36899:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf5ff0000; valaddr_reg:x12; val_offset:110634*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110634*FLEN/8, x13, x9, x10)

inst_36900:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf5807fff; valaddr_reg:x12; val_offset:110637*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110637*FLEN/8, x13, x9, x10)

inst_36901:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf5ff8000; valaddr_reg:x12; val_offset:110640*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110640*FLEN/8, x13, x9, x10)

inst_36902:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf5803fff; valaddr_reg:x12; val_offset:110643*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110643*FLEN/8, x13, x9, x10)

inst_36903:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf5ffc000; valaddr_reg:x12; val_offset:110646*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110646*FLEN/8, x13, x9, x10)

inst_36904:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf5801fff; valaddr_reg:x12; val_offset:110649*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110649*FLEN/8, x13, x9, x10)

inst_36905:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf5ffe000; valaddr_reg:x12; val_offset:110652*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110652*FLEN/8, x13, x9, x10)

inst_36906:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf5800fff; valaddr_reg:x12; val_offset:110655*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110655*FLEN/8, x13, x9, x10)

inst_36907:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf5fff000; valaddr_reg:x12; val_offset:110658*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110658*FLEN/8, x13, x9, x10)

inst_36908:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf58007ff; valaddr_reg:x12; val_offset:110661*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110661*FLEN/8, x13, x9, x10)

inst_36909:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf5fff800; valaddr_reg:x12; val_offset:110664*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110664*FLEN/8, x13, x9, x10)

inst_36910:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf58003ff; valaddr_reg:x12; val_offset:110667*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110667*FLEN/8, x13, x9, x10)

inst_36911:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf5fffc00; valaddr_reg:x12; val_offset:110670*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110670*FLEN/8, x13, x9, x10)

inst_36912:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf58001ff; valaddr_reg:x12; val_offset:110673*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110673*FLEN/8, x13, x9, x10)

inst_36913:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf5fffe00; valaddr_reg:x12; val_offset:110676*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110676*FLEN/8, x13, x9, x10)

inst_36914:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf58000ff; valaddr_reg:x12; val_offset:110679*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110679*FLEN/8, x13, x9, x10)

inst_36915:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf5ffff00; valaddr_reg:x12; val_offset:110682*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110682*FLEN/8, x13, x9, x10)

inst_36916:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf580007f; valaddr_reg:x12; val_offset:110685*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110685*FLEN/8, x13, x9, x10)

inst_36917:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf5ffff80; valaddr_reg:x12; val_offset:110688*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110688*FLEN/8, x13, x9, x10)

inst_36918:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf580003f; valaddr_reg:x12; val_offset:110691*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110691*FLEN/8, x13, x9, x10)

inst_36919:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf5ffffc0; valaddr_reg:x12; val_offset:110694*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110694*FLEN/8, x13, x9, x10)

inst_36920:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf580001f; valaddr_reg:x12; val_offset:110697*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110697*FLEN/8, x13, x9, x10)

inst_36921:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf5ffffe0; valaddr_reg:x12; val_offset:110700*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110700*FLEN/8, x13, x9, x10)

inst_36922:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf580000f; valaddr_reg:x12; val_offset:110703*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110703*FLEN/8, x13, x9, x10)

inst_36923:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf5fffff0; valaddr_reg:x12; val_offset:110706*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110706*FLEN/8, x13, x9, x10)

inst_36924:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf5800007; valaddr_reg:x12; val_offset:110709*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110709*FLEN/8, x13, x9, x10)

inst_36925:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf5fffff8; valaddr_reg:x12; val_offset:110712*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110712*FLEN/8, x13, x9, x10)

inst_36926:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf5800003; valaddr_reg:x12; val_offset:110715*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110715*FLEN/8, x13, x9, x10)

inst_36927:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf5fffffc; valaddr_reg:x12; val_offset:110718*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110718*FLEN/8, x13, x9, x10)

inst_36928:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf5800001; valaddr_reg:x12; val_offset:110721*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110721*FLEN/8, x13, x9, x10)

inst_36929:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xf5fffffe; valaddr_reg:x12; val_offset:110724*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110724*FLEN/8, x13, x9, x10)

inst_36930:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xff7ffff8; valaddr_reg:x12; val_offset:110727*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110727*FLEN/8, x13, x9, x10)

inst_36931:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xff000007; valaddr_reg:x12; val_offset:110730*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110730*FLEN/8, x13, x9, x10)

inst_36932:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xff7ffffc; valaddr_reg:x12; val_offset:110733*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110733*FLEN/8, x13, x9, x10)

inst_36933:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xff000003; valaddr_reg:x12; val_offset:110736*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110736*FLEN/8, x13, x9, x10)

inst_36934:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xff7ffffe; valaddr_reg:x12; val_offset:110739*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110739*FLEN/8, x13, x9, x10)

inst_36935:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xff000001; valaddr_reg:x12; val_offset:110742*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110742*FLEN/8, x13, x9, x10)

inst_36936:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xff36db6d; valaddr_reg:x12; val_offset:110745*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110745*FLEN/8, x13, x9, x10)

inst_36937:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xff6db6db; valaddr_reg:x12; val_offset:110748*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110748*FLEN/8, x13, x9, x10)

inst_36938:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xff199999; valaddr_reg:x12; val_offset:110751*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110751*FLEN/8, x13, x9, x10)

inst_36939:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xff666666; valaddr_reg:x12; val_offset:110754*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110754*FLEN/8, x13, x9, x10)

inst_36940:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xff3bbbbb; valaddr_reg:x12; val_offset:110757*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110757*FLEN/8, x13, x9, x10)

inst_36941:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xff444444; valaddr_reg:x12; val_offset:110760*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110760*FLEN/8, x13, x9, x10)

inst_36942:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xff249249; valaddr_reg:x12; val_offset:110763*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110763*FLEN/8, x13, x9, x10)

inst_36943:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xff5b6db6; valaddr_reg:x12; val_offset:110766*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110766*FLEN/8, x13, x9, x10)

inst_36944:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xff333333; valaddr_reg:x12; val_offset:110769*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110769*FLEN/8, x13, x9, x10)

inst_36945:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e98277b; op2val:0xc0575c44;
op3val:0xff4ccccc; valaddr_reg:x12; val_offset:110772*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110772*FLEN/8, x13, x9, x10)

inst_36946:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf67fffff; valaddr_reg:x12; val_offset:110775*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110775*FLEN/8, x13, x9, x10)

inst_36947:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf6000000; valaddr_reg:x12; val_offset:110778*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110778*FLEN/8, x13, x9, x10)

inst_36948:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf63fffff; valaddr_reg:x12; val_offset:110781*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110781*FLEN/8, x13, x9, x10)

inst_36949:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf6400000; valaddr_reg:x12; val_offset:110784*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110784*FLEN/8, x13, x9, x10)

inst_36950:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf61fffff; valaddr_reg:x12; val_offset:110787*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110787*FLEN/8, x13, x9, x10)

inst_36951:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf6600000; valaddr_reg:x12; val_offset:110790*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110790*FLEN/8, x13, x9, x10)

inst_36952:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf60fffff; valaddr_reg:x12; val_offset:110793*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110793*FLEN/8, x13, x9, x10)

inst_36953:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf6700000; valaddr_reg:x12; val_offset:110796*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110796*FLEN/8, x13, x9, x10)

inst_36954:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf607ffff; valaddr_reg:x12; val_offset:110799*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110799*FLEN/8, x13, x9, x10)

inst_36955:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf6780000; valaddr_reg:x12; val_offset:110802*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110802*FLEN/8, x13, x9, x10)

inst_36956:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf603ffff; valaddr_reg:x12; val_offset:110805*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110805*FLEN/8, x13, x9, x10)

inst_36957:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf67c0000; valaddr_reg:x12; val_offset:110808*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110808*FLEN/8, x13, x9, x10)

inst_36958:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf601ffff; valaddr_reg:x12; val_offset:110811*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110811*FLEN/8, x13, x9, x10)

inst_36959:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf67e0000; valaddr_reg:x12; val_offset:110814*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110814*FLEN/8, x13, x9, x10)

inst_36960:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf600ffff; valaddr_reg:x12; val_offset:110817*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110817*FLEN/8, x13, x9, x10)

inst_36961:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf67f0000; valaddr_reg:x12; val_offset:110820*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110820*FLEN/8, x13, x9, x10)

inst_36962:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf6007fff; valaddr_reg:x12; val_offset:110823*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110823*FLEN/8, x13, x9, x10)

inst_36963:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf67f8000; valaddr_reg:x12; val_offset:110826*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110826*FLEN/8, x13, x9, x10)

inst_36964:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf6003fff; valaddr_reg:x12; val_offset:110829*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110829*FLEN/8, x13, x9, x10)

inst_36965:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf67fc000; valaddr_reg:x12; val_offset:110832*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110832*FLEN/8, x13, x9, x10)

inst_36966:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf6001fff; valaddr_reg:x12; val_offset:110835*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110835*FLEN/8, x13, x9, x10)

inst_36967:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf67fe000; valaddr_reg:x12; val_offset:110838*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110838*FLEN/8, x13, x9, x10)

inst_36968:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf6000fff; valaddr_reg:x12; val_offset:110841*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110841*FLEN/8, x13, x9, x10)

inst_36969:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf67ff000; valaddr_reg:x12; val_offset:110844*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110844*FLEN/8, x13, x9, x10)

inst_36970:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf60007ff; valaddr_reg:x12; val_offset:110847*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110847*FLEN/8, x13, x9, x10)

inst_36971:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf67ff800; valaddr_reg:x12; val_offset:110850*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110850*FLEN/8, x13, x9, x10)

inst_36972:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf60003ff; valaddr_reg:x12; val_offset:110853*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110853*FLEN/8, x13, x9, x10)

inst_36973:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf67ffc00; valaddr_reg:x12; val_offset:110856*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110856*FLEN/8, x13, x9, x10)

inst_36974:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf60001ff; valaddr_reg:x12; val_offset:110859*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110859*FLEN/8, x13, x9, x10)

inst_36975:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf67ffe00; valaddr_reg:x12; val_offset:110862*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110862*FLEN/8, x13, x9, x10)

inst_36976:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf60000ff; valaddr_reg:x12; val_offset:110865*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110865*FLEN/8, x13, x9, x10)

inst_36977:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf67fff00; valaddr_reg:x12; val_offset:110868*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110868*FLEN/8, x13, x9, x10)

inst_36978:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf600007f; valaddr_reg:x12; val_offset:110871*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110871*FLEN/8, x13, x9, x10)

inst_36979:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf67fff80; valaddr_reg:x12; val_offset:110874*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110874*FLEN/8, x13, x9, x10)

inst_36980:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf600003f; valaddr_reg:x12; val_offset:110877*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110877*FLEN/8, x13, x9, x10)

inst_36981:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf67fffc0; valaddr_reg:x12; val_offset:110880*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110880*FLEN/8, x13, x9, x10)

inst_36982:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf600001f; valaddr_reg:x12; val_offset:110883*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110883*FLEN/8, x13, x9, x10)

inst_36983:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf67fffe0; valaddr_reg:x12; val_offset:110886*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110886*FLEN/8, x13, x9, x10)

inst_36984:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf600000f; valaddr_reg:x12; val_offset:110889*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110889*FLEN/8, x13, x9, x10)

inst_36985:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf67ffff0; valaddr_reg:x12; val_offset:110892*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110892*FLEN/8, x13, x9, x10)

inst_36986:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf6000007; valaddr_reg:x12; val_offset:110895*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110895*FLEN/8, x13, x9, x10)

inst_36987:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf67ffff8; valaddr_reg:x12; val_offset:110898*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110898*FLEN/8, x13, x9, x10)

inst_36988:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf6000003; valaddr_reg:x12; val_offset:110901*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110901*FLEN/8, x13, x9, x10)

inst_36989:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf67ffffc; valaddr_reg:x12; val_offset:110904*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110904*FLEN/8, x13, x9, x10)

inst_36990:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf6000001; valaddr_reg:x12; val_offset:110907*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110907*FLEN/8, x13, x9, x10)

inst_36991:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xf67ffffe; valaddr_reg:x12; val_offset:110910*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110910*FLEN/8, x13, x9, x10)

inst_36992:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xff7ffff8; valaddr_reg:x12; val_offset:110913*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110913*FLEN/8, x13, x9, x10)

inst_36993:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xff000007; valaddr_reg:x12; val_offset:110916*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110916*FLEN/8, x13, x9, x10)

inst_36994:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xff7ffffc; valaddr_reg:x12; val_offset:110919*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110919*FLEN/8, x13, x9, x10)

inst_36995:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xff000003; valaddr_reg:x12; val_offset:110922*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110922*FLEN/8, x13, x9, x10)

inst_36996:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xff7ffffe; valaddr_reg:x12; val_offset:110925*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110925*FLEN/8, x13, x9, x10)

inst_36997:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xff000001; valaddr_reg:x12; val_offset:110928*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110928*FLEN/8, x13, x9, x10)

inst_36998:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xff36db6d; valaddr_reg:x12; val_offset:110931*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110931*FLEN/8, x13, x9, x10)

inst_36999:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xff6db6db; valaddr_reg:x12; val_offset:110934*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110934*FLEN/8, x13, x9, x10)

inst_37000:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xff199999; valaddr_reg:x12; val_offset:110937*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110937*FLEN/8, x13, x9, x10)

inst_37001:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xff666666; valaddr_reg:x12; val_offset:110940*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110940*FLEN/8, x13, x9, x10)

inst_37002:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xff3bbbbb; valaddr_reg:x12; val_offset:110943*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110943*FLEN/8, x13, x9, x10)

inst_37003:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xff444444; valaddr_reg:x12; val_offset:110946*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110946*FLEN/8, x13, x9, x10)

inst_37004:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xff249249; valaddr_reg:x12; val_offset:110949*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110949*FLEN/8, x13, x9, x10)

inst_37005:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xff5b6db6; valaddr_reg:x12; val_offset:110952*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110952*FLEN/8, x13, x9, x10)

inst_37006:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xff333333; valaddr_reg:x12; val_offset:110955*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110955*FLEN/8, x13, x9, x10)

inst_37007:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cb881; op2val:0xc15115d5;
op3val:0xff4ccccc; valaddr_reg:x12; val_offset:110958*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110958*FLEN/8, x13, x9, x10)

inst_37008:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf6ffffff; valaddr_reg:x12; val_offset:110961*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110961*FLEN/8, x13, x9, x10)

inst_37009:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf6800000; valaddr_reg:x12; val_offset:110964*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110964*FLEN/8, x13, x9, x10)

inst_37010:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf6bfffff; valaddr_reg:x12; val_offset:110967*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110967*FLEN/8, x13, x9, x10)

inst_37011:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf6c00000; valaddr_reg:x12; val_offset:110970*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110970*FLEN/8, x13, x9, x10)

inst_37012:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf69fffff; valaddr_reg:x12; val_offset:110973*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110973*FLEN/8, x13, x9, x10)

inst_37013:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf6e00000; valaddr_reg:x12; val_offset:110976*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110976*FLEN/8, x13, x9, x10)

inst_37014:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf68fffff; valaddr_reg:x12; val_offset:110979*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110979*FLEN/8, x13, x9, x10)

inst_37015:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf6f00000; valaddr_reg:x12; val_offset:110982*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110982*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_289)
inst_37016:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf687ffff; valaddr_reg:x12; val_offset:110985*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110985*FLEN/8, x13, x9, x10)

inst_37017:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf6f80000; valaddr_reg:x12; val_offset:110988*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110988*FLEN/8, x13, x9, x10)

inst_37018:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf683ffff; valaddr_reg:x12; val_offset:110991*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110991*FLEN/8, x13, x9, x10)

inst_37019:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf6fc0000; valaddr_reg:x12; val_offset:110994*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110994*FLEN/8, x13, x9, x10)

inst_37020:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf681ffff; valaddr_reg:x12; val_offset:110997*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 110997*FLEN/8, x13, x9, x10)

inst_37021:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf6fe0000; valaddr_reg:x12; val_offset:111000*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111000*FLEN/8, x13, x9, x10)

inst_37022:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf680ffff; valaddr_reg:x12; val_offset:111003*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111003*FLEN/8, x13, x9, x10)

inst_37023:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf6ff0000; valaddr_reg:x12; val_offset:111006*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111006*FLEN/8, x13, x9, x10)

inst_37024:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf6807fff; valaddr_reg:x12; val_offset:111009*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111009*FLEN/8, x13, x9, x10)

inst_37025:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf6ff8000; valaddr_reg:x12; val_offset:111012*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111012*FLEN/8, x13, x9, x10)

inst_37026:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf6803fff; valaddr_reg:x12; val_offset:111015*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111015*FLEN/8, x13, x9, x10)

inst_37027:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf6ffc000; valaddr_reg:x12; val_offset:111018*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111018*FLEN/8, x13, x9, x10)

inst_37028:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf6801fff; valaddr_reg:x12; val_offset:111021*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111021*FLEN/8, x13, x9, x10)

inst_37029:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf6ffe000; valaddr_reg:x12; val_offset:111024*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111024*FLEN/8, x13, x9, x10)

inst_37030:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf6800fff; valaddr_reg:x12; val_offset:111027*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111027*FLEN/8, x13, x9, x10)

inst_37031:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf6fff000; valaddr_reg:x12; val_offset:111030*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111030*FLEN/8, x13, x9, x10)

inst_37032:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf68007ff; valaddr_reg:x12; val_offset:111033*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111033*FLEN/8, x13, x9, x10)

inst_37033:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf6fff800; valaddr_reg:x12; val_offset:111036*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111036*FLEN/8, x13, x9, x10)

inst_37034:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf68003ff; valaddr_reg:x12; val_offset:111039*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111039*FLEN/8, x13, x9, x10)

inst_37035:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf6fffc00; valaddr_reg:x12; val_offset:111042*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111042*FLEN/8, x13, x9, x10)

inst_37036:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf68001ff; valaddr_reg:x12; val_offset:111045*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111045*FLEN/8, x13, x9, x10)

inst_37037:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf6fffe00; valaddr_reg:x12; val_offset:111048*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111048*FLEN/8, x13, x9, x10)

inst_37038:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf68000ff; valaddr_reg:x12; val_offset:111051*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111051*FLEN/8, x13, x9, x10)

inst_37039:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf6ffff00; valaddr_reg:x12; val_offset:111054*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111054*FLEN/8, x13, x9, x10)

inst_37040:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf680007f; valaddr_reg:x12; val_offset:111057*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111057*FLEN/8, x13, x9, x10)

inst_37041:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf6ffff80; valaddr_reg:x12; val_offset:111060*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111060*FLEN/8, x13, x9, x10)

inst_37042:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf680003f; valaddr_reg:x12; val_offset:111063*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111063*FLEN/8, x13, x9, x10)

inst_37043:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf6ffffc0; valaddr_reg:x12; val_offset:111066*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111066*FLEN/8, x13, x9, x10)

inst_37044:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf680001f; valaddr_reg:x12; val_offset:111069*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111069*FLEN/8, x13, x9, x10)

inst_37045:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf6ffffe0; valaddr_reg:x12; val_offset:111072*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111072*FLEN/8, x13, x9, x10)

inst_37046:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf680000f; valaddr_reg:x12; val_offset:111075*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111075*FLEN/8, x13, x9, x10)

inst_37047:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf6fffff0; valaddr_reg:x12; val_offset:111078*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111078*FLEN/8, x13, x9, x10)

inst_37048:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf6800007; valaddr_reg:x12; val_offset:111081*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111081*FLEN/8, x13, x9, x10)

inst_37049:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf6fffff8; valaddr_reg:x12; val_offset:111084*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111084*FLEN/8, x13, x9, x10)

inst_37050:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf6800003; valaddr_reg:x12; val_offset:111087*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111087*FLEN/8, x13, x9, x10)

inst_37051:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf6fffffc; valaddr_reg:x12; val_offset:111090*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111090*FLEN/8, x13, x9, x10)

inst_37052:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf6800001; valaddr_reg:x12; val_offset:111093*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111093*FLEN/8, x13, x9, x10)

inst_37053:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xf6fffffe; valaddr_reg:x12; val_offset:111096*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111096*FLEN/8, x13, x9, x10)

inst_37054:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xff7ffff8; valaddr_reg:x12; val_offset:111099*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111099*FLEN/8, x13, x9, x10)

inst_37055:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xff000007; valaddr_reg:x12; val_offset:111102*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111102*FLEN/8, x13, x9, x10)

inst_37056:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xff7ffffc; valaddr_reg:x12; val_offset:111105*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111105*FLEN/8, x13, x9, x10)

inst_37057:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xff000003; valaddr_reg:x12; val_offset:111108*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111108*FLEN/8, x13, x9, x10)

inst_37058:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xff7ffffe; valaddr_reg:x12; val_offset:111111*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111111*FLEN/8, x13, x9, x10)

inst_37059:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xff000001; valaddr_reg:x12; val_offset:111114*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111114*FLEN/8, x13, x9, x10)

inst_37060:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xff36db6d; valaddr_reg:x12; val_offset:111117*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111117*FLEN/8, x13, x9, x10)

inst_37061:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xff6db6db; valaddr_reg:x12; val_offset:111120*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111120*FLEN/8, x13, x9, x10)

inst_37062:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xff199999; valaddr_reg:x12; val_offset:111123*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111123*FLEN/8, x13, x9, x10)

inst_37063:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xff666666; valaddr_reg:x12; val_offset:111126*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111126*FLEN/8, x13, x9, x10)

inst_37064:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xff3bbbbb; valaddr_reg:x12; val_offset:111129*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111129*FLEN/8, x13, x9, x10)

inst_37065:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xff444444; valaddr_reg:x12; val_offset:111132*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111132*FLEN/8, x13, x9, x10)

inst_37066:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xff249249; valaddr_reg:x12; val_offset:111135*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111135*FLEN/8, x13, x9, x10)

inst_37067:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xff5b6db6; valaddr_reg:x12; val_offset:111138*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111138*FLEN/8, x13, x9, x10)

inst_37068:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xff333333; valaddr_reg:x12; val_offset:111141*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111141*FLEN/8, x13, x9, x10)

inst_37069:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4200c4; op2val:0xc0a8e793;
op3val:0xff4ccccc; valaddr_reg:x12; val_offset:111144*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111144*FLEN/8, x13, x9, x10)

inst_37070:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf77fffff; valaddr_reg:x12; val_offset:111147*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111147*FLEN/8, x13, x9, x10)

inst_37071:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf7000000; valaddr_reg:x12; val_offset:111150*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111150*FLEN/8, x13, x9, x10)

inst_37072:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf73fffff; valaddr_reg:x12; val_offset:111153*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111153*FLEN/8, x13, x9, x10)

inst_37073:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf7400000; valaddr_reg:x12; val_offset:111156*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111156*FLEN/8, x13, x9, x10)

inst_37074:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf71fffff; valaddr_reg:x12; val_offset:111159*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111159*FLEN/8, x13, x9, x10)

inst_37075:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf7600000; valaddr_reg:x12; val_offset:111162*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111162*FLEN/8, x13, x9, x10)

inst_37076:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf70fffff; valaddr_reg:x12; val_offset:111165*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111165*FLEN/8, x13, x9, x10)

inst_37077:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf7700000; valaddr_reg:x12; val_offset:111168*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111168*FLEN/8, x13, x9, x10)

inst_37078:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf707ffff; valaddr_reg:x12; val_offset:111171*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111171*FLEN/8, x13, x9, x10)

inst_37079:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf7780000; valaddr_reg:x12; val_offset:111174*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111174*FLEN/8, x13, x9, x10)

inst_37080:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf703ffff; valaddr_reg:x12; val_offset:111177*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111177*FLEN/8, x13, x9, x10)

inst_37081:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf77c0000; valaddr_reg:x12; val_offset:111180*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111180*FLEN/8, x13, x9, x10)

inst_37082:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf701ffff; valaddr_reg:x12; val_offset:111183*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111183*FLEN/8, x13, x9, x10)

inst_37083:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf77e0000; valaddr_reg:x12; val_offset:111186*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111186*FLEN/8, x13, x9, x10)

inst_37084:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf700ffff; valaddr_reg:x12; val_offset:111189*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111189*FLEN/8, x13, x9, x10)

inst_37085:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf77f0000; valaddr_reg:x12; val_offset:111192*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111192*FLEN/8, x13, x9, x10)

inst_37086:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf7007fff; valaddr_reg:x12; val_offset:111195*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111195*FLEN/8, x13, x9, x10)

inst_37087:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf77f8000; valaddr_reg:x12; val_offset:111198*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111198*FLEN/8, x13, x9, x10)

inst_37088:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf7003fff; valaddr_reg:x12; val_offset:111201*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111201*FLEN/8, x13, x9, x10)

inst_37089:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf77fc000; valaddr_reg:x12; val_offset:111204*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111204*FLEN/8, x13, x9, x10)

inst_37090:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf7001fff; valaddr_reg:x12; val_offset:111207*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111207*FLEN/8, x13, x9, x10)

inst_37091:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf77fe000; valaddr_reg:x12; val_offset:111210*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111210*FLEN/8, x13, x9, x10)

inst_37092:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf7000fff; valaddr_reg:x12; val_offset:111213*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111213*FLEN/8, x13, x9, x10)

inst_37093:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf77ff000; valaddr_reg:x12; val_offset:111216*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111216*FLEN/8, x13, x9, x10)

inst_37094:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf70007ff; valaddr_reg:x12; val_offset:111219*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111219*FLEN/8, x13, x9, x10)

inst_37095:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf77ff800; valaddr_reg:x12; val_offset:111222*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111222*FLEN/8, x13, x9, x10)

inst_37096:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf70003ff; valaddr_reg:x12; val_offset:111225*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111225*FLEN/8, x13, x9, x10)

inst_37097:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf77ffc00; valaddr_reg:x12; val_offset:111228*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111228*FLEN/8, x13, x9, x10)

inst_37098:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf70001ff; valaddr_reg:x12; val_offset:111231*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111231*FLEN/8, x13, x9, x10)

inst_37099:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf77ffe00; valaddr_reg:x12; val_offset:111234*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111234*FLEN/8, x13, x9, x10)

inst_37100:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf70000ff; valaddr_reg:x12; val_offset:111237*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111237*FLEN/8, x13, x9, x10)

inst_37101:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf77fff00; valaddr_reg:x12; val_offset:111240*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111240*FLEN/8, x13, x9, x10)

inst_37102:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf700007f; valaddr_reg:x12; val_offset:111243*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111243*FLEN/8, x13, x9, x10)

inst_37103:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf77fff80; valaddr_reg:x12; val_offset:111246*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111246*FLEN/8, x13, x9, x10)

inst_37104:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf700003f; valaddr_reg:x12; val_offset:111249*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111249*FLEN/8, x13, x9, x10)

inst_37105:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf77fffc0; valaddr_reg:x12; val_offset:111252*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111252*FLEN/8, x13, x9, x10)

inst_37106:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf700001f; valaddr_reg:x12; val_offset:111255*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111255*FLEN/8, x13, x9, x10)

inst_37107:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf77fffe0; valaddr_reg:x12; val_offset:111258*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111258*FLEN/8, x13, x9, x10)

inst_37108:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf700000f; valaddr_reg:x12; val_offset:111261*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111261*FLEN/8, x13, x9, x10)

inst_37109:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf77ffff0; valaddr_reg:x12; val_offset:111264*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111264*FLEN/8, x13, x9, x10)

inst_37110:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf7000007; valaddr_reg:x12; val_offset:111267*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111267*FLEN/8, x13, x9, x10)

inst_37111:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf77ffff8; valaddr_reg:x12; val_offset:111270*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111270*FLEN/8, x13, x9, x10)

inst_37112:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf7000003; valaddr_reg:x12; val_offset:111273*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111273*FLEN/8, x13, x9, x10)

inst_37113:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf77ffffc; valaddr_reg:x12; val_offset:111276*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111276*FLEN/8, x13, x9, x10)

inst_37114:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf7000001; valaddr_reg:x12; val_offset:111279*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111279*FLEN/8, x13, x9, x10)

inst_37115:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xf77ffffe; valaddr_reg:x12; val_offset:111282*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111282*FLEN/8, x13, x9, x10)

inst_37116:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xff7ffff8; valaddr_reg:x12; val_offset:111285*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111285*FLEN/8, x13, x9, x10)

inst_37117:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xff000007; valaddr_reg:x12; val_offset:111288*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111288*FLEN/8, x13, x9, x10)

inst_37118:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xff7ffffc; valaddr_reg:x12; val_offset:111291*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111291*FLEN/8, x13, x9, x10)

inst_37119:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xff000003; valaddr_reg:x12; val_offset:111294*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111294*FLEN/8, x13, x9, x10)

inst_37120:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xff7ffffe; valaddr_reg:x12; val_offset:111297*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111297*FLEN/8, x13, x9, x10)

inst_37121:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xff000001; valaddr_reg:x12; val_offset:111300*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111300*FLEN/8, x13, x9, x10)

inst_37122:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xff36db6d; valaddr_reg:x12; val_offset:111303*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111303*FLEN/8, x13, x9, x10)

inst_37123:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xff6db6db; valaddr_reg:x12; val_offset:111306*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111306*FLEN/8, x13, x9, x10)

inst_37124:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xff199999; valaddr_reg:x12; val_offset:111309*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111309*FLEN/8, x13, x9, x10)

inst_37125:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xff666666; valaddr_reg:x12; val_offset:111312*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111312*FLEN/8, x13, x9, x10)

inst_37126:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xff3bbbbb; valaddr_reg:x12; val_offset:111315*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111315*FLEN/8, x13, x9, x10)

inst_37127:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xff444444; valaddr_reg:x12; val_offset:111318*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111318*FLEN/8, x13, x9, x10)

inst_37128:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xff249249; valaddr_reg:x12; val_offset:111321*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111321*FLEN/8, x13, x9, x10)

inst_37129:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xff5b6db6; valaddr_reg:x12; val_offset:111324*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111324*FLEN/8, x13, x9, x10)

inst_37130:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xff333333; valaddr_reg:x12; val_offset:111327*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111327*FLEN/8, x13, x9, x10)

inst_37131:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e59a604; op2val:0xc0968dfe;
op3val:0xff4ccccc; valaddr_reg:x12; val_offset:111330*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111330*FLEN/8, x13, x9, x10)

inst_37132:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7ffffff; valaddr_reg:x12; val_offset:111333*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111333*FLEN/8, x13, x9, x10)

inst_37133:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7800000; valaddr_reg:x12; val_offset:111336*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111336*FLEN/8, x13, x9, x10)

inst_37134:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7bfffff; valaddr_reg:x12; val_offset:111339*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111339*FLEN/8, x13, x9, x10)

inst_37135:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7c00000; valaddr_reg:x12; val_offset:111342*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111342*FLEN/8, x13, x9, x10)

inst_37136:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf79fffff; valaddr_reg:x12; val_offset:111345*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111345*FLEN/8, x13, x9, x10)

inst_37137:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7e00000; valaddr_reg:x12; val_offset:111348*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111348*FLEN/8, x13, x9, x10)

inst_37138:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf78fffff; valaddr_reg:x12; val_offset:111351*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111351*FLEN/8, x13, x9, x10)

inst_37139:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7f00000; valaddr_reg:x12; val_offset:111354*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111354*FLEN/8, x13, x9, x10)

inst_37140:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf787ffff; valaddr_reg:x12; val_offset:111357*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111357*FLEN/8, x13, x9, x10)

inst_37141:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7f80000; valaddr_reg:x12; val_offset:111360*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111360*FLEN/8, x13, x9, x10)

inst_37142:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf783ffff; valaddr_reg:x12; val_offset:111363*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111363*FLEN/8, x13, x9, x10)

inst_37143:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7fc0000; valaddr_reg:x12; val_offset:111366*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111366*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_290)
inst_37144:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf781ffff; valaddr_reg:x12; val_offset:111369*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111369*FLEN/8, x13, x9, x10)

inst_37145:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7fe0000; valaddr_reg:x12; val_offset:111372*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111372*FLEN/8, x13, x9, x10)

inst_37146:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf780ffff; valaddr_reg:x12; val_offset:111375*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111375*FLEN/8, x13, x9, x10)

inst_37147:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7ff0000; valaddr_reg:x12; val_offset:111378*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111378*FLEN/8, x13, x9, x10)

inst_37148:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7807fff; valaddr_reg:x12; val_offset:111381*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111381*FLEN/8, x13, x9, x10)

inst_37149:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7ff8000; valaddr_reg:x12; val_offset:111384*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111384*FLEN/8, x13, x9, x10)

inst_37150:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7803fff; valaddr_reg:x12; val_offset:111387*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111387*FLEN/8, x13, x9, x10)

inst_37151:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7ffc000; valaddr_reg:x12; val_offset:111390*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111390*FLEN/8, x13, x9, x10)

inst_37152:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7801fff; valaddr_reg:x12; val_offset:111393*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111393*FLEN/8, x13, x9, x10)

inst_37153:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7ffe000; valaddr_reg:x12; val_offset:111396*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111396*FLEN/8, x13, x9, x10)

inst_37154:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7800fff; valaddr_reg:x12; val_offset:111399*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111399*FLEN/8, x13, x9, x10)

inst_37155:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7fff000; valaddr_reg:x12; val_offset:111402*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111402*FLEN/8, x13, x9, x10)

inst_37156:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf78007ff; valaddr_reg:x12; val_offset:111405*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111405*FLEN/8, x13, x9, x10)

inst_37157:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7fff800; valaddr_reg:x12; val_offset:111408*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111408*FLEN/8, x13, x9, x10)

inst_37158:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf78003ff; valaddr_reg:x12; val_offset:111411*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111411*FLEN/8, x13, x9, x10)

inst_37159:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7fffc00; valaddr_reg:x12; val_offset:111414*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111414*FLEN/8, x13, x9, x10)

inst_37160:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf78001ff; valaddr_reg:x12; val_offset:111417*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111417*FLEN/8, x13, x9, x10)

inst_37161:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7fffe00; valaddr_reg:x12; val_offset:111420*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111420*FLEN/8, x13, x9, x10)

inst_37162:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf78000ff; valaddr_reg:x12; val_offset:111423*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111423*FLEN/8, x13, x9, x10)

inst_37163:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7ffff00; valaddr_reg:x12; val_offset:111426*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111426*FLEN/8, x13, x9, x10)

inst_37164:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf780007f; valaddr_reg:x12; val_offset:111429*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111429*FLEN/8, x13, x9, x10)

inst_37165:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7ffff80; valaddr_reg:x12; val_offset:111432*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111432*FLEN/8, x13, x9, x10)

inst_37166:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf780003f; valaddr_reg:x12; val_offset:111435*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111435*FLEN/8, x13, x9, x10)

inst_37167:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7ffffc0; valaddr_reg:x12; val_offset:111438*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111438*FLEN/8, x13, x9, x10)

inst_37168:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf780001f; valaddr_reg:x12; val_offset:111441*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111441*FLEN/8, x13, x9, x10)

inst_37169:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7ffffe0; valaddr_reg:x12; val_offset:111444*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111444*FLEN/8, x13, x9, x10)

inst_37170:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf780000f; valaddr_reg:x12; val_offset:111447*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111447*FLEN/8, x13, x9, x10)

inst_37171:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7fffff0; valaddr_reg:x12; val_offset:111450*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111450*FLEN/8, x13, x9, x10)

inst_37172:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7800007; valaddr_reg:x12; val_offset:111453*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111453*FLEN/8, x13, x9, x10)

inst_37173:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7fffff8; valaddr_reg:x12; val_offset:111456*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111456*FLEN/8, x13, x9, x10)

inst_37174:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7800003; valaddr_reg:x12; val_offset:111459*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111459*FLEN/8, x13, x9, x10)

inst_37175:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7fffffc; valaddr_reg:x12; val_offset:111462*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111462*FLEN/8, x13, x9, x10)

inst_37176:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7800001; valaddr_reg:x12; val_offset:111465*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111465*FLEN/8, x13, x9, x10)

inst_37177:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7fffffe; valaddr_reg:x12; val_offset:111468*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111468*FLEN/8, x13, x9, x10)

inst_37178:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xff7ffff8; valaddr_reg:x12; val_offset:111471*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111471*FLEN/8, x13, x9, x10)

inst_37179:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xff000007; valaddr_reg:x12; val_offset:111474*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111474*FLEN/8, x13, x9, x10)

inst_37180:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xff7ffffc; valaddr_reg:x12; val_offset:111477*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111477*FLEN/8, x13, x9, x10)

inst_37181:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xff000003; valaddr_reg:x12; val_offset:111480*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111480*FLEN/8, x13, x9, x10)

inst_37182:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xff7ffffe; valaddr_reg:x12; val_offset:111483*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111483*FLEN/8, x13, x9, x10)

inst_37183:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xff000001; valaddr_reg:x12; val_offset:111486*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111486*FLEN/8, x13, x9, x10)

inst_37184:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xff36db6d; valaddr_reg:x12; val_offset:111489*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111489*FLEN/8, x13, x9, x10)

inst_37185:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xff6db6db; valaddr_reg:x12; val_offset:111492*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111492*FLEN/8, x13, x9, x10)

inst_37186:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xff199999; valaddr_reg:x12; val_offset:111495*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111495*FLEN/8, x13, x9, x10)

inst_37187:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xff666666; valaddr_reg:x12; val_offset:111498*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111498*FLEN/8, x13, x9, x10)

inst_37188:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xff3bbbbb; valaddr_reg:x12; val_offset:111501*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111501*FLEN/8, x13, x9, x10)

inst_37189:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xff444444; valaddr_reg:x12; val_offset:111504*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111504*FLEN/8, x13, x9, x10)

inst_37190:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xff249249; valaddr_reg:x12; val_offset:111507*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111507*FLEN/8, x13, x9, x10)

inst_37191:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xff5b6db6; valaddr_reg:x12; val_offset:111510*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111510*FLEN/8, x13, x9, x10)

inst_37192:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xff333333; valaddr_reg:x12; val_offset:111513*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111513*FLEN/8, x13, x9, x10)

inst_37193:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xff4ccccc; valaddr_reg:x12; val_offset:111516*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111516*FLEN/8, x13, x9, x10)

inst_37194:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf87fffff; valaddr_reg:x12; val_offset:111519*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111519*FLEN/8, x13, x9, x10)

inst_37195:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf8000000; valaddr_reg:x12; val_offset:111522*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111522*FLEN/8, x13, x9, x10)

inst_37196:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf83fffff; valaddr_reg:x12; val_offset:111525*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111525*FLEN/8, x13, x9, x10)

inst_37197:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf8400000; valaddr_reg:x12; val_offset:111528*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111528*FLEN/8, x13, x9, x10)

inst_37198:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf81fffff; valaddr_reg:x12; val_offset:111531*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111531*FLEN/8, x13, x9, x10)

inst_37199:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf8600000; valaddr_reg:x12; val_offset:111534*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111534*FLEN/8, x13, x9, x10)

inst_37200:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf80fffff; valaddr_reg:x12; val_offset:111537*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111537*FLEN/8, x13, x9, x10)

inst_37201:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf8700000; valaddr_reg:x12; val_offset:111540*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111540*FLEN/8, x13, x9, x10)

inst_37202:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf807ffff; valaddr_reg:x12; val_offset:111543*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111543*FLEN/8, x13, x9, x10)

inst_37203:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf8780000; valaddr_reg:x12; val_offset:111546*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111546*FLEN/8, x13, x9, x10)

inst_37204:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf803ffff; valaddr_reg:x12; val_offset:111549*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111549*FLEN/8, x13, x9, x10)

inst_37205:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf87c0000; valaddr_reg:x12; val_offset:111552*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111552*FLEN/8, x13, x9, x10)

inst_37206:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf801ffff; valaddr_reg:x12; val_offset:111555*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111555*FLEN/8, x13, x9, x10)

inst_37207:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf87e0000; valaddr_reg:x12; val_offset:111558*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111558*FLEN/8, x13, x9, x10)

inst_37208:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf800ffff; valaddr_reg:x12; val_offset:111561*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111561*FLEN/8, x13, x9, x10)

inst_37209:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf87f0000; valaddr_reg:x12; val_offset:111564*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111564*FLEN/8, x13, x9, x10)

inst_37210:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf8007fff; valaddr_reg:x12; val_offset:111567*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111567*FLEN/8, x13, x9, x10)

inst_37211:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf87f8000; valaddr_reg:x12; val_offset:111570*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111570*FLEN/8, x13, x9, x10)

inst_37212:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf8003fff; valaddr_reg:x12; val_offset:111573*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111573*FLEN/8, x13, x9, x10)

inst_37213:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf87fc000; valaddr_reg:x12; val_offset:111576*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111576*FLEN/8, x13, x9, x10)

inst_37214:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf8001fff; valaddr_reg:x12; val_offset:111579*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111579*FLEN/8, x13, x9, x10)

inst_37215:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf87fe000; valaddr_reg:x12; val_offset:111582*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111582*FLEN/8, x13, x9, x10)

inst_37216:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf8000fff; valaddr_reg:x12; val_offset:111585*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111585*FLEN/8, x13, x9, x10)

inst_37217:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf87ff000; valaddr_reg:x12; val_offset:111588*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111588*FLEN/8, x13, x9, x10)

inst_37218:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf80007ff; valaddr_reg:x12; val_offset:111591*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111591*FLEN/8, x13, x9, x10)

inst_37219:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf87ff800; valaddr_reg:x12; val_offset:111594*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111594*FLEN/8, x13, x9, x10)

inst_37220:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf80003ff; valaddr_reg:x12; val_offset:111597*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111597*FLEN/8, x13, x9, x10)

inst_37221:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf87ffc00; valaddr_reg:x12; val_offset:111600*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111600*FLEN/8, x13, x9, x10)

inst_37222:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf80001ff; valaddr_reg:x12; val_offset:111603*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111603*FLEN/8, x13, x9, x10)

inst_37223:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf87ffe00; valaddr_reg:x12; val_offset:111606*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111606*FLEN/8, x13, x9, x10)

inst_37224:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf80000ff; valaddr_reg:x12; val_offset:111609*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111609*FLEN/8, x13, x9, x10)

inst_37225:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf87fff00; valaddr_reg:x12; val_offset:111612*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111612*FLEN/8, x13, x9, x10)

inst_37226:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf800007f; valaddr_reg:x12; val_offset:111615*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111615*FLEN/8, x13, x9, x10)

inst_37227:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf87fff80; valaddr_reg:x12; val_offset:111618*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111618*FLEN/8, x13, x9, x10)

inst_37228:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf800003f; valaddr_reg:x12; val_offset:111621*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111621*FLEN/8, x13, x9, x10)

inst_37229:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf87fffc0; valaddr_reg:x12; val_offset:111624*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111624*FLEN/8, x13, x9, x10)

inst_37230:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf800001f; valaddr_reg:x12; val_offset:111627*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111627*FLEN/8, x13, x9, x10)

inst_37231:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf87fffe0; valaddr_reg:x12; val_offset:111630*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111630*FLEN/8, x13, x9, x10)

inst_37232:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf800000f; valaddr_reg:x12; val_offset:111633*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111633*FLEN/8, x13, x9, x10)

inst_37233:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf87ffff0; valaddr_reg:x12; val_offset:111636*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111636*FLEN/8, x13, x9, x10)

inst_37234:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf8000007; valaddr_reg:x12; val_offset:111639*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111639*FLEN/8, x13, x9, x10)

inst_37235:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf87ffff8; valaddr_reg:x12; val_offset:111642*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111642*FLEN/8, x13, x9, x10)

inst_37236:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf8000003; valaddr_reg:x12; val_offset:111645*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111645*FLEN/8, x13, x9, x10)

inst_37237:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf87ffffc; valaddr_reg:x12; val_offset:111648*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111648*FLEN/8, x13, x9, x10)

inst_37238:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf8000001; valaddr_reg:x12; val_offset:111651*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111651*FLEN/8, x13, x9, x10)

inst_37239:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xf87ffffe; valaddr_reg:x12; val_offset:111654*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111654*FLEN/8, x13, x9, x10)

inst_37240:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xff7ffff8; valaddr_reg:x12; val_offset:111657*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111657*FLEN/8, x13, x9, x10)

inst_37241:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xff000007; valaddr_reg:x12; val_offset:111660*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111660*FLEN/8, x13, x9, x10)

inst_37242:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xff7ffffc; valaddr_reg:x12; val_offset:111663*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111663*FLEN/8, x13, x9, x10)

inst_37243:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xff000003; valaddr_reg:x12; val_offset:111666*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111666*FLEN/8, x13, x9, x10)

inst_37244:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xff7ffffe; valaddr_reg:x12; val_offset:111669*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111669*FLEN/8, x13, x9, x10)

inst_37245:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xff000001; valaddr_reg:x12; val_offset:111672*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111672*FLEN/8, x13, x9, x10)

inst_37246:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xff36db6d; valaddr_reg:x12; val_offset:111675*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111675*FLEN/8, x13, x9, x10)

inst_37247:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xff6db6db; valaddr_reg:x12; val_offset:111678*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111678*FLEN/8, x13, x9, x10)

inst_37248:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xff199999; valaddr_reg:x12; val_offset:111681*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111681*FLEN/8, x13, x9, x10)

inst_37249:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xff666666; valaddr_reg:x12; val_offset:111684*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111684*FLEN/8, x13, x9, x10)

inst_37250:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xff3bbbbb; valaddr_reg:x12; val_offset:111687*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111687*FLEN/8, x13, x9, x10)

inst_37251:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xff444444; valaddr_reg:x12; val_offset:111690*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111690*FLEN/8, x13, x9, x10)

inst_37252:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xff249249; valaddr_reg:x12; val_offset:111693*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111693*FLEN/8, x13, x9, x10)

inst_37253:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xff5b6db6; valaddr_reg:x12; val_offset:111696*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111696*FLEN/8, x13, x9, x10)

inst_37254:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xff333333; valaddr_reg:x12; val_offset:111699*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111699*FLEN/8, x13, x9, x10)

inst_37255:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e7c12; op2val:0xbfbbcc79;
op3val:0xff4ccccc; valaddr_reg:x12; val_offset:111702*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111702*FLEN/8, x13, x9, x10)

inst_37256:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8ffffff; valaddr_reg:x12; val_offset:111705*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111705*FLEN/8, x13, x9, x10)

inst_37257:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8800000; valaddr_reg:x12; val_offset:111708*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111708*FLEN/8, x13, x9, x10)

inst_37258:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8bfffff; valaddr_reg:x12; val_offset:111711*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111711*FLEN/8, x13, x9, x10)

inst_37259:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8c00000; valaddr_reg:x12; val_offset:111714*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111714*FLEN/8, x13, x9, x10)

inst_37260:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf89fffff; valaddr_reg:x12; val_offset:111717*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111717*FLEN/8, x13, x9, x10)

inst_37261:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8e00000; valaddr_reg:x12; val_offset:111720*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111720*FLEN/8, x13, x9, x10)

inst_37262:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf88fffff; valaddr_reg:x12; val_offset:111723*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111723*FLEN/8, x13, x9, x10)

inst_37263:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8f00000; valaddr_reg:x12; val_offset:111726*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111726*FLEN/8, x13, x9, x10)

inst_37264:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf887ffff; valaddr_reg:x12; val_offset:111729*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111729*FLEN/8, x13, x9, x10)

inst_37265:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8f80000; valaddr_reg:x12; val_offset:111732*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111732*FLEN/8, x13, x9, x10)

inst_37266:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf883ffff; valaddr_reg:x12; val_offset:111735*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111735*FLEN/8, x13, x9, x10)

inst_37267:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8fc0000; valaddr_reg:x12; val_offset:111738*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111738*FLEN/8, x13, x9, x10)

inst_37268:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf881ffff; valaddr_reg:x12; val_offset:111741*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111741*FLEN/8, x13, x9, x10)

inst_37269:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8fe0000; valaddr_reg:x12; val_offset:111744*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111744*FLEN/8, x13, x9, x10)

inst_37270:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf880ffff; valaddr_reg:x12; val_offset:111747*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111747*FLEN/8, x13, x9, x10)

inst_37271:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8ff0000; valaddr_reg:x12; val_offset:111750*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111750*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_291)
inst_37272:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8807fff; valaddr_reg:x12; val_offset:111753*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111753*FLEN/8, x13, x9, x10)

inst_37273:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8ff8000; valaddr_reg:x12; val_offset:111756*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111756*FLEN/8, x13, x9, x10)

inst_37274:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8803fff; valaddr_reg:x12; val_offset:111759*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111759*FLEN/8, x13, x9, x10)

inst_37275:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8ffc000; valaddr_reg:x12; val_offset:111762*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111762*FLEN/8, x13, x9, x10)

inst_37276:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8801fff; valaddr_reg:x12; val_offset:111765*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111765*FLEN/8, x13, x9, x10)

inst_37277:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8ffe000; valaddr_reg:x12; val_offset:111768*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111768*FLEN/8, x13, x9, x10)

inst_37278:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8800fff; valaddr_reg:x12; val_offset:111771*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111771*FLEN/8, x13, x9, x10)

inst_37279:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8fff000; valaddr_reg:x12; val_offset:111774*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111774*FLEN/8, x13, x9, x10)

inst_37280:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf88007ff; valaddr_reg:x12; val_offset:111777*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111777*FLEN/8, x13, x9, x10)

inst_37281:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8fff800; valaddr_reg:x12; val_offset:111780*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111780*FLEN/8, x13, x9, x10)

inst_37282:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf88003ff; valaddr_reg:x12; val_offset:111783*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111783*FLEN/8, x13, x9, x10)

inst_37283:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8fffc00; valaddr_reg:x12; val_offset:111786*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111786*FLEN/8, x13, x9, x10)

inst_37284:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf88001ff; valaddr_reg:x12; val_offset:111789*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111789*FLEN/8, x13, x9, x10)

inst_37285:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8fffe00; valaddr_reg:x12; val_offset:111792*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111792*FLEN/8, x13, x9, x10)

inst_37286:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf88000ff; valaddr_reg:x12; val_offset:111795*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111795*FLEN/8, x13, x9, x10)

inst_37287:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8ffff00; valaddr_reg:x12; val_offset:111798*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111798*FLEN/8, x13, x9, x10)

inst_37288:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf880007f; valaddr_reg:x12; val_offset:111801*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111801*FLEN/8, x13, x9, x10)

inst_37289:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8ffff80; valaddr_reg:x12; val_offset:111804*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111804*FLEN/8, x13, x9, x10)

inst_37290:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf880003f; valaddr_reg:x12; val_offset:111807*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111807*FLEN/8, x13, x9, x10)

inst_37291:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8ffffc0; valaddr_reg:x12; val_offset:111810*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111810*FLEN/8, x13, x9, x10)

inst_37292:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf880001f; valaddr_reg:x12; val_offset:111813*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111813*FLEN/8, x13, x9, x10)

inst_37293:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8ffffe0; valaddr_reg:x12; val_offset:111816*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111816*FLEN/8, x13, x9, x10)

inst_37294:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf880000f; valaddr_reg:x12; val_offset:111819*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111819*FLEN/8, x13, x9, x10)

inst_37295:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8fffff0; valaddr_reg:x12; val_offset:111822*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111822*FLEN/8, x13, x9, x10)

inst_37296:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8800007; valaddr_reg:x12; val_offset:111825*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111825*FLEN/8, x13, x9, x10)

inst_37297:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8fffff8; valaddr_reg:x12; val_offset:111828*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111828*FLEN/8, x13, x9, x10)

inst_37298:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8800003; valaddr_reg:x12; val_offset:111831*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111831*FLEN/8, x13, x9, x10)

inst_37299:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8fffffc; valaddr_reg:x12; val_offset:111834*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111834*FLEN/8, x13, x9, x10)

inst_37300:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8800001; valaddr_reg:x12; val_offset:111837*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111837*FLEN/8, x13, x9, x10)

inst_37301:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8fffffe; valaddr_reg:x12; val_offset:111840*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111840*FLEN/8, x13, x9, x10)

inst_37302:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xff7ffff8; valaddr_reg:x12; val_offset:111843*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111843*FLEN/8, x13, x9, x10)

inst_37303:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xff000007; valaddr_reg:x12; val_offset:111846*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111846*FLEN/8, x13, x9, x10)

inst_37304:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xff7ffffc; valaddr_reg:x12; val_offset:111849*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111849*FLEN/8, x13, x9, x10)

inst_37305:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xff000003; valaddr_reg:x12; val_offset:111852*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111852*FLEN/8, x13, x9, x10)

inst_37306:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xff7ffffe; valaddr_reg:x12; val_offset:111855*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111855*FLEN/8, x13, x9, x10)

inst_37307:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xff000001; valaddr_reg:x12; val_offset:111858*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111858*FLEN/8, x13, x9, x10)

inst_37308:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xff36db6d; valaddr_reg:x12; val_offset:111861*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111861*FLEN/8, x13, x9, x10)

inst_37309:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xff6db6db; valaddr_reg:x12; val_offset:111864*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111864*FLEN/8, x13, x9, x10)

inst_37310:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xff199999; valaddr_reg:x12; val_offset:111867*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111867*FLEN/8, x13, x9, x10)

inst_37311:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xff666666; valaddr_reg:x12; val_offset:111870*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111870*FLEN/8, x13, x9, x10)

inst_37312:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xff3bbbbb; valaddr_reg:x12; val_offset:111873*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111873*FLEN/8, x13, x9, x10)

inst_37313:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xff444444; valaddr_reg:x12; val_offset:111876*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111876*FLEN/8, x13, x9, x10)

inst_37314:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xff249249; valaddr_reg:x12; val_offset:111879*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111879*FLEN/8, x13, x9, x10)

inst_37315:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xff5b6db6; valaddr_reg:x12; val_offset:111882*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111882*FLEN/8, x13, x9, x10)

inst_37316:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xff333333; valaddr_reg:x12; val_offset:111885*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111885*FLEN/8, x13, x9, x10)

inst_37317:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xff4ccccc; valaddr_reg:x12; val_offset:111888*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111888*FLEN/8, x13, x9, x10)

inst_37318:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf97fffff; valaddr_reg:x12; val_offset:111891*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111891*FLEN/8, x13, x9, x10)

inst_37319:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf9000000; valaddr_reg:x12; val_offset:111894*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111894*FLEN/8, x13, x9, x10)

inst_37320:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf93fffff; valaddr_reg:x12; val_offset:111897*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111897*FLEN/8, x13, x9, x10)

inst_37321:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf9400000; valaddr_reg:x12; val_offset:111900*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111900*FLEN/8, x13, x9, x10)

inst_37322:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf91fffff; valaddr_reg:x12; val_offset:111903*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111903*FLEN/8, x13, x9, x10)

inst_37323:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf9600000; valaddr_reg:x12; val_offset:111906*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111906*FLEN/8, x13, x9, x10)

inst_37324:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf90fffff; valaddr_reg:x12; val_offset:111909*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111909*FLEN/8, x13, x9, x10)

inst_37325:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf9700000; valaddr_reg:x12; val_offset:111912*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111912*FLEN/8, x13, x9, x10)

inst_37326:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf907ffff; valaddr_reg:x12; val_offset:111915*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111915*FLEN/8, x13, x9, x10)

inst_37327:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf9780000; valaddr_reg:x12; val_offset:111918*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111918*FLEN/8, x13, x9, x10)

inst_37328:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf903ffff; valaddr_reg:x12; val_offset:111921*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111921*FLEN/8, x13, x9, x10)

inst_37329:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf97c0000; valaddr_reg:x12; val_offset:111924*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111924*FLEN/8, x13, x9, x10)

inst_37330:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf901ffff; valaddr_reg:x12; val_offset:111927*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111927*FLEN/8, x13, x9, x10)

inst_37331:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf97e0000; valaddr_reg:x12; val_offset:111930*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111930*FLEN/8, x13, x9, x10)

inst_37332:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf900ffff; valaddr_reg:x12; val_offset:111933*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111933*FLEN/8, x13, x9, x10)

inst_37333:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf97f0000; valaddr_reg:x12; val_offset:111936*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111936*FLEN/8, x13, x9, x10)

inst_37334:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf9007fff; valaddr_reg:x12; val_offset:111939*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111939*FLEN/8, x13, x9, x10)

inst_37335:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf97f8000; valaddr_reg:x12; val_offset:111942*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111942*FLEN/8, x13, x9, x10)

inst_37336:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf9003fff; valaddr_reg:x12; val_offset:111945*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111945*FLEN/8, x13, x9, x10)

inst_37337:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf97fc000; valaddr_reg:x12; val_offset:111948*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111948*FLEN/8, x13, x9, x10)

inst_37338:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf9001fff; valaddr_reg:x12; val_offset:111951*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111951*FLEN/8, x13, x9, x10)

inst_37339:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf97fe000; valaddr_reg:x12; val_offset:111954*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111954*FLEN/8, x13, x9, x10)

inst_37340:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf9000fff; valaddr_reg:x12; val_offset:111957*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111957*FLEN/8, x13, x9, x10)

inst_37341:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf97ff000; valaddr_reg:x12; val_offset:111960*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111960*FLEN/8, x13, x9, x10)

inst_37342:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf90007ff; valaddr_reg:x12; val_offset:111963*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111963*FLEN/8, x13, x9, x10)

inst_37343:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf97ff800; valaddr_reg:x12; val_offset:111966*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111966*FLEN/8, x13, x9, x10)

inst_37344:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf90003ff; valaddr_reg:x12; val_offset:111969*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111969*FLEN/8, x13, x9, x10)

inst_37345:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf97ffc00; valaddr_reg:x12; val_offset:111972*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111972*FLEN/8, x13, x9, x10)

inst_37346:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf90001ff; valaddr_reg:x12; val_offset:111975*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111975*FLEN/8, x13, x9, x10)

inst_37347:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf97ffe00; valaddr_reg:x12; val_offset:111978*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111978*FLEN/8, x13, x9, x10)

inst_37348:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf90000ff; valaddr_reg:x12; val_offset:111981*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111981*FLEN/8, x13, x9, x10)

inst_37349:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf97fff00; valaddr_reg:x12; val_offset:111984*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111984*FLEN/8, x13, x9, x10)

inst_37350:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf900007f; valaddr_reg:x12; val_offset:111987*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111987*FLEN/8, x13, x9, x10)

inst_37351:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf97fff80; valaddr_reg:x12; val_offset:111990*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111990*FLEN/8, x13, x9, x10)

inst_37352:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf900003f; valaddr_reg:x12; val_offset:111993*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111993*FLEN/8, x13, x9, x10)

inst_37353:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf97fffc0; valaddr_reg:x12; val_offset:111996*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111996*FLEN/8, x13, x9, x10)

inst_37354:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf900001f; valaddr_reg:x12; val_offset:111999*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111999*FLEN/8, x13, x9, x10)

inst_37355:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf97fffe0; valaddr_reg:x12; val_offset:112002*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112002*FLEN/8, x13, x9, x10)

inst_37356:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf900000f; valaddr_reg:x12; val_offset:112005*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112005*FLEN/8, x13, x9, x10)

inst_37357:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf97ffff0; valaddr_reg:x12; val_offset:112008*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112008*FLEN/8, x13, x9, x10)

inst_37358:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf9000007; valaddr_reg:x12; val_offset:112011*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112011*FLEN/8, x13, x9, x10)

inst_37359:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf97ffff8; valaddr_reg:x12; val_offset:112014*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112014*FLEN/8, x13, x9, x10)

inst_37360:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf9000003; valaddr_reg:x12; val_offset:112017*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112017*FLEN/8, x13, x9, x10)

inst_37361:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf97ffffc; valaddr_reg:x12; val_offset:112020*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112020*FLEN/8, x13, x9, x10)

inst_37362:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf9000001; valaddr_reg:x12; val_offset:112023*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112023*FLEN/8, x13, x9, x10)

inst_37363:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xf97ffffe; valaddr_reg:x12; val_offset:112026*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112026*FLEN/8, x13, x9, x10)

inst_37364:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xff7ffff8; valaddr_reg:x12; val_offset:112029*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112029*FLEN/8, x13, x9, x10)

inst_37365:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xff000007; valaddr_reg:x12; val_offset:112032*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112032*FLEN/8, x13, x9, x10)

inst_37366:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xff7ffffc; valaddr_reg:x12; val_offset:112035*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112035*FLEN/8, x13, x9, x10)

inst_37367:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xff000003; valaddr_reg:x12; val_offset:112038*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112038*FLEN/8, x13, x9, x10)

inst_37368:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xff7ffffe; valaddr_reg:x12; val_offset:112041*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112041*FLEN/8, x13, x9, x10)

inst_37369:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xff000001; valaddr_reg:x12; val_offset:112044*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112044*FLEN/8, x13, x9, x10)

inst_37370:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xff36db6d; valaddr_reg:x12; val_offset:112047*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112047*FLEN/8, x13, x9, x10)

inst_37371:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xff6db6db; valaddr_reg:x12; val_offset:112050*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112050*FLEN/8, x13, x9, x10)

inst_37372:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xff199999; valaddr_reg:x12; val_offset:112053*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112053*FLEN/8, x13, x9, x10)

inst_37373:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xff666666; valaddr_reg:x12; val_offset:112056*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112056*FLEN/8, x13, x9, x10)

inst_37374:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xff3bbbbb; valaddr_reg:x12; val_offset:112059*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112059*FLEN/8, x13, x9, x10)

inst_37375:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xff444444; valaddr_reg:x12; val_offset:112062*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112062*FLEN/8, x13, x9, x10)

inst_37376:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xff249249; valaddr_reg:x12; val_offset:112065*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112065*FLEN/8, x13, x9, x10)

inst_37377:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xff5b6db6; valaddr_reg:x12; val_offset:112068*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112068*FLEN/8, x13, x9, x10)

inst_37378:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xff333333; valaddr_reg:x12; val_offset:112071*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112071*FLEN/8, x13, x9, x10)

inst_37379:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9cf8b; op2val:0xc216714a;
op3val:0xff4ccccc; valaddr_reg:x12; val_offset:112074*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112074*FLEN/8, x13, x9, x10)

inst_37380:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf9ffffff; valaddr_reg:x12; val_offset:112077*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112077*FLEN/8, x13, x9, x10)

inst_37381:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf9800000; valaddr_reg:x12; val_offset:112080*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112080*FLEN/8, x13, x9, x10)

inst_37382:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf9bfffff; valaddr_reg:x12; val_offset:112083*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112083*FLEN/8, x13, x9, x10)

inst_37383:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf9c00000; valaddr_reg:x12; val_offset:112086*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112086*FLEN/8, x13, x9, x10)

inst_37384:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf99fffff; valaddr_reg:x12; val_offset:112089*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112089*FLEN/8, x13, x9, x10)

inst_37385:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf9e00000; valaddr_reg:x12; val_offset:112092*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112092*FLEN/8, x13, x9, x10)

inst_37386:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf98fffff; valaddr_reg:x12; val_offset:112095*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112095*FLEN/8, x13, x9, x10)

inst_37387:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf9f00000; valaddr_reg:x12; val_offset:112098*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112098*FLEN/8, x13, x9, x10)

inst_37388:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf987ffff; valaddr_reg:x12; val_offset:112101*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112101*FLEN/8, x13, x9, x10)

inst_37389:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf9f80000; valaddr_reg:x12; val_offset:112104*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112104*FLEN/8, x13, x9, x10)

inst_37390:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf983ffff; valaddr_reg:x12; val_offset:112107*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112107*FLEN/8, x13, x9, x10)

inst_37391:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf9fc0000; valaddr_reg:x12; val_offset:112110*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112110*FLEN/8, x13, x9, x10)

inst_37392:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf981ffff; valaddr_reg:x12; val_offset:112113*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112113*FLEN/8, x13, x9, x10)

inst_37393:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf9fe0000; valaddr_reg:x12; val_offset:112116*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112116*FLEN/8, x13, x9, x10)

inst_37394:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf980ffff; valaddr_reg:x12; val_offset:112119*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112119*FLEN/8, x13, x9, x10)

inst_37395:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf9ff0000; valaddr_reg:x12; val_offset:112122*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112122*FLEN/8, x13, x9, x10)

inst_37396:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf9807fff; valaddr_reg:x12; val_offset:112125*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112125*FLEN/8, x13, x9, x10)

inst_37397:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf9ff8000; valaddr_reg:x12; val_offset:112128*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112128*FLEN/8, x13, x9, x10)

inst_37398:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf9803fff; valaddr_reg:x12; val_offset:112131*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112131*FLEN/8, x13, x9, x10)

inst_37399:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf9ffc000; valaddr_reg:x12; val_offset:112134*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112134*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_292)
inst_37400:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf9801fff; valaddr_reg:x12; val_offset:112137*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112137*FLEN/8, x13, x9, x10)

inst_37401:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf9ffe000; valaddr_reg:x12; val_offset:112140*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112140*FLEN/8, x13, x9, x10)

inst_37402:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf9800fff; valaddr_reg:x12; val_offset:112143*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112143*FLEN/8, x13, x9, x10)

inst_37403:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf9fff000; valaddr_reg:x12; val_offset:112146*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112146*FLEN/8, x13, x9, x10)

inst_37404:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf98007ff; valaddr_reg:x12; val_offset:112149*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112149*FLEN/8, x13, x9, x10)

inst_37405:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf9fff800; valaddr_reg:x12; val_offset:112152*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112152*FLEN/8, x13, x9, x10)

inst_37406:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf98003ff; valaddr_reg:x12; val_offset:112155*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112155*FLEN/8, x13, x9, x10)

inst_37407:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf9fffc00; valaddr_reg:x12; val_offset:112158*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112158*FLEN/8, x13, x9, x10)

inst_37408:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf98001ff; valaddr_reg:x12; val_offset:112161*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112161*FLEN/8, x13, x9, x10)

inst_37409:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf9fffe00; valaddr_reg:x12; val_offset:112164*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112164*FLEN/8, x13, x9, x10)

inst_37410:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf98000ff; valaddr_reg:x12; val_offset:112167*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112167*FLEN/8, x13, x9, x10)

inst_37411:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf9ffff00; valaddr_reg:x12; val_offset:112170*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112170*FLEN/8, x13, x9, x10)

inst_37412:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf980007f; valaddr_reg:x12; val_offset:112173*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112173*FLEN/8, x13, x9, x10)

inst_37413:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf9ffff80; valaddr_reg:x12; val_offset:112176*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112176*FLEN/8, x13, x9, x10)

inst_37414:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf980003f; valaddr_reg:x12; val_offset:112179*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112179*FLEN/8, x13, x9, x10)

inst_37415:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf9ffffc0; valaddr_reg:x12; val_offset:112182*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112182*FLEN/8, x13, x9, x10)

inst_37416:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf980001f; valaddr_reg:x12; val_offset:112185*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112185*FLEN/8, x13, x9, x10)

inst_37417:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf9ffffe0; valaddr_reg:x12; val_offset:112188*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112188*FLEN/8, x13, x9, x10)

inst_37418:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf980000f; valaddr_reg:x12; val_offset:112191*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112191*FLEN/8, x13, x9, x10)

inst_37419:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf9fffff0; valaddr_reg:x12; val_offset:112194*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112194*FLEN/8, x13, x9, x10)

inst_37420:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf9800007; valaddr_reg:x12; val_offset:112197*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112197*FLEN/8, x13, x9, x10)

inst_37421:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf9fffff8; valaddr_reg:x12; val_offset:112200*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112200*FLEN/8, x13, x9, x10)

inst_37422:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf9800003; valaddr_reg:x12; val_offset:112203*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112203*FLEN/8, x13, x9, x10)

inst_37423:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf9fffffc; valaddr_reg:x12; val_offset:112206*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112206*FLEN/8, x13, x9, x10)

inst_37424:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf9800001; valaddr_reg:x12; val_offset:112209*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112209*FLEN/8, x13, x9, x10)

inst_37425:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xf9fffffe; valaddr_reg:x12; val_offset:112212*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112212*FLEN/8, x13, x9, x10)

inst_37426:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xff7ffff8; valaddr_reg:x12; val_offset:112215*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112215*FLEN/8, x13, x9, x10)

inst_37427:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xff000007; valaddr_reg:x12; val_offset:112218*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112218*FLEN/8, x13, x9, x10)

inst_37428:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xff7ffffc; valaddr_reg:x12; val_offset:112221*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112221*FLEN/8, x13, x9, x10)

inst_37429:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xff000003; valaddr_reg:x12; val_offset:112224*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112224*FLEN/8, x13, x9, x10)

inst_37430:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xff7ffffe; valaddr_reg:x12; val_offset:112227*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112227*FLEN/8, x13, x9, x10)

inst_37431:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xff000001; valaddr_reg:x12; val_offset:112230*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112230*FLEN/8, x13, x9, x10)

inst_37432:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xff36db6d; valaddr_reg:x12; val_offset:112233*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112233*FLEN/8, x13, x9, x10)

inst_37433:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xff6db6db; valaddr_reg:x12; val_offset:112236*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112236*FLEN/8, x13, x9, x10)

inst_37434:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xff199999; valaddr_reg:x12; val_offset:112239*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112239*FLEN/8, x13, x9, x10)

inst_37435:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xff666666; valaddr_reg:x12; val_offset:112242*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112242*FLEN/8, x13, x9, x10)

inst_37436:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xff3bbbbb; valaddr_reg:x12; val_offset:112245*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112245*FLEN/8, x13, x9, x10)

inst_37437:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xff444444; valaddr_reg:x12; val_offset:112248*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112248*FLEN/8, x13, x9, x10)

inst_37438:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xff249249; valaddr_reg:x12; val_offset:112251*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112251*FLEN/8, x13, x9, x10)

inst_37439:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xff5b6db6; valaddr_reg:x12; val_offset:112254*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112254*FLEN/8, x13, x9, x10)

inst_37440:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xff333333; valaddr_reg:x12; val_offset:112257*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112257*FLEN/8, x13, x9, x10)

inst_37441:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f181c01; op2val:0xbfd76c84;
op3val:0xff4ccccc; valaddr_reg:x12; val_offset:112260*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112260*FLEN/8, x13, x9, x10)

inst_37442:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa7fffff; valaddr_reg:x12; val_offset:112263*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112263*FLEN/8, x13, x9, x10)

inst_37443:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa000000; valaddr_reg:x12; val_offset:112266*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112266*FLEN/8, x13, x9, x10)

inst_37444:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa3fffff; valaddr_reg:x12; val_offset:112269*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112269*FLEN/8, x13, x9, x10)

inst_37445:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa400000; valaddr_reg:x12; val_offset:112272*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112272*FLEN/8, x13, x9, x10)

inst_37446:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa1fffff; valaddr_reg:x12; val_offset:112275*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112275*FLEN/8, x13, x9, x10)

inst_37447:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa600000; valaddr_reg:x12; val_offset:112278*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112278*FLEN/8, x13, x9, x10)

inst_37448:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa0fffff; valaddr_reg:x12; val_offset:112281*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112281*FLEN/8, x13, x9, x10)

inst_37449:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa700000; valaddr_reg:x12; val_offset:112284*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112284*FLEN/8, x13, x9, x10)

inst_37450:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa07ffff; valaddr_reg:x12; val_offset:112287*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112287*FLEN/8, x13, x9, x10)

inst_37451:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa780000; valaddr_reg:x12; val_offset:112290*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112290*FLEN/8, x13, x9, x10)

inst_37452:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa03ffff; valaddr_reg:x12; val_offset:112293*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112293*FLEN/8, x13, x9, x10)

inst_37453:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa7c0000; valaddr_reg:x12; val_offset:112296*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112296*FLEN/8, x13, x9, x10)

inst_37454:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa01ffff; valaddr_reg:x12; val_offset:112299*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112299*FLEN/8, x13, x9, x10)

inst_37455:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa7e0000; valaddr_reg:x12; val_offset:112302*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112302*FLEN/8, x13, x9, x10)

inst_37456:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa00ffff; valaddr_reg:x12; val_offset:112305*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112305*FLEN/8, x13, x9, x10)

inst_37457:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa7f0000; valaddr_reg:x12; val_offset:112308*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112308*FLEN/8, x13, x9, x10)

inst_37458:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa007fff; valaddr_reg:x12; val_offset:112311*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112311*FLEN/8, x13, x9, x10)

inst_37459:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa7f8000; valaddr_reg:x12; val_offset:112314*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112314*FLEN/8, x13, x9, x10)

inst_37460:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa003fff; valaddr_reg:x12; val_offset:112317*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112317*FLEN/8, x13, x9, x10)

inst_37461:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa7fc000; valaddr_reg:x12; val_offset:112320*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112320*FLEN/8, x13, x9, x10)

inst_37462:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa001fff; valaddr_reg:x12; val_offset:112323*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112323*FLEN/8, x13, x9, x10)

inst_37463:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa7fe000; valaddr_reg:x12; val_offset:112326*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112326*FLEN/8, x13, x9, x10)

inst_37464:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa000fff; valaddr_reg:x12; val_offset:112329*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112329*FLEN/8, x13, x9, x10)

inst_37465:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa7ff000; valaddr_reg:x12; val_offset:112332*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112332*FLEN/8, x13, x9, x10)

inst_37466:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa0007ff; valaddr_reg:x12; val_offset:112335*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112335*FLEN/8, x13, x9, x10)

inst_37467:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa7ff800; valaddr_reg:x12; val_offset:112338*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112338*FLEN/8, x13, x9, x10)

inst_37468:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa0003ff; valaddr_reg:x12; val_offset:112341*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112341*FLEN/8, x13, x9, x10)

inst_37469:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa7ffc00; valaddr_reg:x12; val_offset:112344*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112344*FLEN/8, x13, x9, x10)

inst_37470:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa0001ff; valaddr_reg:x12; val_offset:112347*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112347*FLEN/8, x13, x9, x10)

inst_37471:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa7ffe00; valaddr_reg:x12; val_offset:112350*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112350*FLEN/8, x13, x9, x10)

inst_37472:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa0000ff; valaddr_reg:x12; val_offset:112353*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112353*FLEN/8, x13, x9, x10)

inst_37473:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa7fff00; valaddr_reg:x12; val_offset:112356*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112356*FLEN/8, x13, x9, x10)

inst_37474:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa00007f; valaddr_reg:x12; val_offset:112359*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112359*FLEN/8, x13, x9, x10)

inst_37475:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa7fff80; valaddr_reg:x12; val_offset:112362*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112362*FLEN/8, x13, x9, x10)

inst_37476:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa00003f; valaddr_reg:x12; val_offset:112365*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112365*FLEN/8, x13, x9, x10)

inst_37477:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa7fffc0; valaddr_reg:x12; val_offset:112368*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112368*FLEN/8, x13, x9, x10)

inst_37478:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa00001f; valaddr_reg:x12; val_offset:112371*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112371*FLEN/8, x13, x9, x10)

inst_37479:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa7fffe0; valaddr_reg:x12; val_offset:112374*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112374*FLEN/8, x13, x9, x10)

inst_37480:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa00000f; valaddr_reg:x12; val_offset:112377*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112377*FLEN/8, x13, x9, x10)

inst_37481:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa7ffff0; valaddr_reg:x12; val_offset:112380*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112380*FLEN/8, x13, x9, x10)

inst_37482:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa000007; valaddr_reg:x12; val_offset:112383*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112383*FLEN/8, x13, x9, x10)

inst_37483:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa7ffff8; valaddr_reg:x12; val_offset:112386*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112386*FLEN/8, x13, x9, x10)

inst_37484:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa000003; valaddr_reg:x12; val_offset:112389*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112389*FLEN/8, x13, x9, x10)

inst_37485:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa7ffffc; valaddr_reg:x12; val_offset:112392*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112392*FLEN/8, x13, x9, x10)

inst_37486:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa000001; valaddr_reg:x12; val_offset:112395*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112395*FLEN/8, x13, x9, x10)

inst_37487:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xfa7ffffe; valaddr_reg:x12; val_offset:112398*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112398*FLEN/8, x13, x9, x10)

inst_37488:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xff7ffff8; valaddr_reg:x12; val_offset:112401*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112401*FLEN/8, x13, x9, x10)

inst_37489:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xff000007; valaddr_reg:x12; val_offset:112404*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112404*FLEN/8, x13, x9, x10)

inst_37490:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xff7ffffc; valaddr_reg:x12; val_offset:112407*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112407*FLEN/8, x13, x9, x10)

inst_37491:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xff000003; valaddr_reg:x12; val_offset:112410*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112410*FLEN/8, x13, x9, x10)

inst_37492:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xff7ffffe; valaddr_reg:x12; val_offset:112413*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112413*FLEN/8, x13, x9, x10)

inst_37493:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xff000001; valaddr_reg:x12; val_offset:112416*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112416*FLEN/8, x13, x9, x10)

inst_37494:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xff36db6d; valaddr_reg:x12; val_offset:112419*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112419*FLEN/8, x13, x9, x10)

inst_37495:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xff6db6db; valaddr_reg:x12; val_offset:112422*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112422*FLEN/8, x13, x9, x10)

inst_37496:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xff199999; valaddr_reg:x12; val_offset:112425*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112425*FLEN/8, x13, x9, x10)

inst_37497:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xff666666; valaddr_reg:x12; val_offset:112428*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112428*FLEN/8, x13, x9, x10)

inst_37498:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xff3bbbbb; valaddr_reg:x12; val_offset:112431*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112431*FLEN/8, x13, x9, x10)

inst_37499:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xff444444; valaddr_reg:x12; val_offset:112434*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112434*FLEN/8, x13, x9, x10)

inst_37500:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xff249249; valaddr_reg:x12; val_offset:112437*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112437*FLEN/8, x13, x9, x10)

inst_37501:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xff5b6db6; valaddr_reg:x12; val_offset:112440*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112440*FLEN/8, x13, x9, x10)

inst_37502:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xff333333; valaddr_reg:x12; val_offset:112443*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112443*FLEN/8, x13, x9, x10)

inst_37503:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6ab42c; op2val:0xc08b9d3f;
op3val:0xff4ccccc; valaddr_reg:x12; val_offset:112446*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112446*FLEN/8, x13, x9, x10)

inst_37504:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfaffffff; valaddr_reg:x12; val_offset:112449*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112449*FLEN/8, x13, x9, x10)

inst_37505:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfa800000; valaddr_reg:x12; val_offset:112452*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112452*FLEN/8, x13, x9, x10)

inst_37506:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfabfffff; valaddr_reg:x12; val_offset:112455*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112455*FLEN/8, x13, x9, x10)

inst_37507:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfac00000; valaddr_reg:x12; val_offset:112458*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112458*FLEN/8, x13, x9, x10)

inst_37508:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfa9fffff; valaddr_reg:x12; val_offset:112461*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112461*FLEN/8, x13, x9, x10)

inst_37509:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfae00000; valaddr_reg:x12; val_offset:112464*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112464*FLEN/8, x13, x9, x10)

inst_37510:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfa8fffff; valaddr_reg:x12; val_offset:112467*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112467*FLEN/8, x13, x9, x10)

inst_37511:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfaf00000; valaddr_reg:x12; val_offset:112470*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112470*FLEN/8, x13, x9, x10)

inst_37512:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfa87ffff; valaddr_reg:x12; val_offset:112473*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112473*FLEN/8, x13, x9, x10)

inst_37513:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfaf80000; valaddr_reg:x12; val_offset:112476*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112476*FLEN/8, x13, x9, x10)

inst_37514:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfa83ffff; valaddr_reg:x12; val_offset:112479*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112479*FLEN/8, x13, x9, x10)

inst_37515:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfafc0000; valaddr_reg:x12; val_offset:112482*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112482*FLEN/8, x13, x9, x10)

inst_37516:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfa81ffff; valaddr_reg:x12; val_offset:112485*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112485*FLEN/8, x13, x9, x10)

inst_37517:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfafe0000; valaddr_reg:x12; val_offset:112488*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112488*FLEN/8, x13, x9, x10)

inst_37518:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfa80ffff; valaddr_reg:x12; val_offset:112491*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112491*FLEN/8, x13, x9, x10)

inst_37519:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfaff0000; valaddr_reg:x12; val_offset:112494*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112494*FLEN/8, x13, x9, x10)

inst_37520:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfa807fff; valaddr_reg:x12; val_offset:112497*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112497*FLEN/8, x13, x9, x10)

inst_37521:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfaff8000; valaddr_reg:x12; val_offset:112500*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112500*FLEN/8, x13, x9, x10)

inst_37522:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfa803fff; valaddr_reg:x12; val_offset:112503*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112503*FLEN/8, x13, x9, x10)

inst_37523:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfaffc000; valaddr_reg:x12; val_offset:112506*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112506*FLEN/8, x13, x9, x10)

inst_37524:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfa801fff; valaddr_reg:x12; val_offset:112509*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112509*FLEN/8, x13, x9, x10)

inst_37525:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfaffe000; valaddr_reg:x12; val_offset:112512*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112512*FLEN/8, x13, x9, x10)

inst_37526:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfa800fff; valaddr_reg:x12; val_offset:112515*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112515*FLEN/8, x13, x9, x10)

inst_37527:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfafff000; valaddr_reg:x12; val_offset:112518*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112518*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_293)
inst_37528:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfa8007ff; valaddr_reg:x12; val_offset:112521*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112521*FLEN/8, x13, x9, x10)

inst_37529:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfafff800; valaddr_reg:x12; val_offset:112524*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112524*FLEN/8, x13, x9, x10)

inst_37530:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfa8003ff; valaddr_reg:x12; val_offset:112527*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112527*FLEN/8, x13, x9, x10)

inst_37531:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfafffc00; valaddr_reg:x12; val_offset:112530*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112530*FLEN/8, x13, x9, x10)

inst_37532:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfa8001ff; valaddr_reg:x12; val_offset:112533*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112533*FLEN/8, x13, x9, x10)

inst_37533:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfafffe00; valaddr_reg:x12; val_offset:112536*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112536*FLEN/8, x13, x9, x10)

inst_37534:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfa8000ff; valaddr_reg:x12; val_offset:112539*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112539*FLEN/8, x13, x9, x10)

inst_37535:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfaffff00; valaddr_reg:x12; val_offset:112542*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112542*FLEN/8, x13, x9, x10)

inst_37536:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfa80007f; valaddr_reg:x12; val_offset:112545*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112545*FLEN/8, x13, x9, x10)

inst_37537:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfaffff80; valaddr_reg:x12; val_offset:112548*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112548*FLEN/8, x13, x9, x10)

inst_37538:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfa80003f; valaddr_reg:x12; val_offset:112551*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112551*FLEN/8, x13, x9, x10)

inst_37539:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfaffffc0; valaddr_reg:x12; val_offset:112554*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112554*FLEN/8, x13, x9, x10)

inst_37540:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfa80001f; valaddr_reg:x12; val_offset:112557*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112557*FLEN/8, x13, x9, x10)

inst_37541:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828495; op2val:0xc07b0fb2;
op3val:0xfaffffe0; valaddr_reg:x12; val_offset:112560*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112560*FLEN/8, x13, x9, x10)

inst_37583:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xfb7f8000; valaddr_reg:x12; val_offset:112686*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112686*FLEN/8, x13, x9, x10)

inst_37584:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xfb003fff; valaddr_reg:x12; val_offset:112689*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112689*FLEN/8, x13, x9, x10)

inst_37585:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xfb7fc000; valaddr_reg:x12; val_offset:112692*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112692*FLEN/8, x13, x9, x10)

inst_37586:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xfb001fff; valaddr_reg:x12; val_offset:112695*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112695*FLEN/8, x13, x9, x10)

inst_37587:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xfb7fe000; valaddr_reg:x12; val_offset:112698*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112698*FLEN/8, x13, x9, x10)

inst_37588:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xfb000fff; valaddr_reg:x12; val_offset:112701*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112701*FLEN/8, x13, x9, x10)

inst_37589:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xfb7ff000; valaddr_reg:x12; val_offset:112704*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112704*FLEN/8, x13, x9, x10)

inst_37590:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xfb0007ff; valaddr_reg:x12; val_offset:112707*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112707*FLEN/8, x13, x9, x10)

inst_37591:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xfb7ff800; valaddr_reg:x12; val_offset:112710*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112710*FLEN/8, x13, x9, x10)

inst_37592:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xfb0003ff; valaddr_reg:x12; val_offset:112713*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112713*FLEN/8, x13, x9, x10)

inst_37593:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xfb7ffc00; valaddr_reg:x12; val_offset:112716*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112716*FLEN/8, x13, x9, x10)

inst_37594:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xfb0001ff; valaddr_reg:x12; val_offset:112719*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112719*FLEN/8, x13, x9, x10)

inst_37595:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xfb7ffe00; valaddr_reg:x12; val_offset:112722*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112722*FLEN/8, x13, x9, x10)

inst_37596:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xfb0000ff; valaddr_reg:x12; val_offset:112725*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112725*FLEN/8, x13, x9, x10)

inst_37597:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xfb7fff00; valaddr_reg:x12; val_offset:112728*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112728*FLEN/8, x13, x9, x10)

inst_37598:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xfb00007f; valaddr_reg:x12; val_offset:112731*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112731*FLEN/8, x13, x9, x10)

inst_37599:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xfb7fff80; valaddr_reg:x12; val_offset:112734*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112734*FLEN/8, x13, x9, x10)

inst_37600:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xfb00003f; valaddr_reg:x12; val_offset:112737*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112737*FLEN/8, x13, x9, x10)

inst_37601:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xfb7fffc0; valaddr_reg:x12; val_offset:112740*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112740*FLEN/8, x13, x9, x10)

inst_37602:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xfb00001f; valaddr_reg:x12; val_offset:112743*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112743*FLEN/8, x13, x9, x10)

inst_37603:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xfb7fffe0; valaddr_reg:x12; val_offset:112746*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112746*FLEN/8, x13, x9, x10)

inst_37604:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xfb00000f; valaddr_reg:x12; val_offset:112749*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112749*FLEN/8, x13, x9, x10)

inst_37605:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xfb7ffff0; valaddr_reg:x12; val_offset:112752*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112752*FLEN/8, x13, x9, x10)

inst_37606:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xfb000007; valaddr_reg:x12; val_offset:112755*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112755*FLEN/8, x13, x9, x10)

inst_37607:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xfb7ffff8; valaddr_reg:x12; val_offset:112758*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112758*FLEN/8, x13, x9, x10)

inst_37608:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xfb000003; valaddr_reg:x12; val_offset:112761*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112761*FLEN/8, x13, x9, x10)

inst_37609:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xfb7ffffc; valaddr_reg:x12; val_offset:112764*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112764*FLEN/8, x13, x9, x10)

inst_37610:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xfb000001; valaddr_reg:x12; val_offset:112767*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112767*FLEN/8, x13, x9, x10)

inst_37611:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xfb7ffffe; valaddr_reg:x12; val_offset:112770*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112770*FLEN/8, x13, x9, x10)

inst_37612:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xff7ffff8; valaddr_reg:x12; val_offset:112773*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112773*FLEN/8, x13, x9, x10)

inst_37613:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xff000007; valaddr_reg:x12; val_offset:112776*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112776*FLEN/8, x13, x9, x10)

inst_37614:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xff7ffffc; valaddr_reg:x12; val_offset:112779*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112779*FLEN/8, x13, x9, x10)

inst_37615:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xff000003; valaddr_reg:x12; val_offset:112782*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112782*FLEN/8, x13, x9, x10)

inst_37616:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xff7ffffe; valaddr_reg:x12; val_offset:112785*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112785*FLEN/8, x13, x9, x10)

inst_37617:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xff000001; valaddr_reg:x12; val_offset:112788*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112788*FLEN/8, x13, x9, x10)

inst_37618:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xff36db6d; valaddr_reg:x12; val_offset:112791*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112791*FLEN/8, x13, x9, x10)

inst_37619:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xff6db6db; valaddr_reg:x12; val_offset:112794*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112794*FLEN/8, x13, x9, x10)

inst_37620:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xff199999; valaddr_reg:x12; val_offset:112797*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112797*FLEN/8, x13, x9, x10)

inst_37621:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xff666666; valaddr_reg:x12; val_offset:112800*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112800*FLEN/8, x13, x9, x10)

inst_37622:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xff3bbbbb; valaddr_reg:x12; val_offset:112803*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112803*FLEN/8, x13, x9, x10)

inst_37623:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xff444444; valaddr_reg:x12; val_offset:112806*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112806*FLEN/8, x13, x9, x10)

inst_37624:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xff249249; valaddr_reg:x12; val_offset:112809*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112809*FLEN/8, x13, x9, x10)

inst_37625:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xff5b6db6; valaddr_reg:x12; val_offset:112812*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112812*FLEN/8, x13, x9, x10)

inst_37626:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xff333333; valaddr_reg:x12; val_offset:112815*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112815*FLEN/8, x13, x9, x10)

inst_37627:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb9758; op2val:0xc020f331;
op3val:0xff4ccccc; valaddr_reg:x12; val_offset:112818*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112818*FLEN/8, x13, x9, x10)

inst_37628:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfbffffff; valaddr_reg:x12; val_offset:112821*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112821*FLEN/8, x13, x9, x10)

inst_37629:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfb800000; valaddr_reg:x12; val_offset:112824*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112824*FLEN/8, x13, x9, x10)

inst_37630:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfbbfffff; valaddr_reg:x12; val_offset:112827*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112827*FLEN/8, x13, x9, x10)

inst_37631:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfbc00000; valaddr_reg:x12; val_offset:112830*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112830*FLEN/8, x13, x9, x10)

inst_37632:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfb9fffff; valaddr_reg:x12; val_offset:112833*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112833*FLEN/8, x13, x9, x10)

inst_37633:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfbe00000; valaddr_reg:x12; val_offset:112836*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112836*FLEN/8, x13, x9, x10)

inst_37634:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfb8fffff; valaddr_reg:x12; val_offset:112839*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112839*FLEN/8, x13, x9, x10)

inst_37635:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfbf00000; valaddr_reg:x12; val_offset:112842*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112842*FLEN/8, x13, x9, x10)

inst_37636:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfb87ffff; valaddr_reg:x12; val_offset:112845*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112845*FLEN/8, x13, x9, x10)

inst_37637:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfbf80000; valaddr_reg:x12; val_offset:112848*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112848*FLEN/8, x13, x9, x10)

inst_37638:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfb83ffff; valaddr_reg:x12; val_offset:112851*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112851*FLEN/8, x13, x9, x10)

inst_37639:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfbfc0000; valaddr_reg:x12; val_offset:112854*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112854*FLEN/8, x13, x9, x10)

inst_37640:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfb81ffff; valaddr_reg:x12; val_offset:112857*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112857*FLEN/8, x13, x9, x10)

inst_37641:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfbfe0000; valaddr_reg:x12; val_offset:112860*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112860*FLEN/8, x13, x9, x10)

inst_37642:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfb80ffff; valaddr_reg:x12; val_offset:112863*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112863*FLEN/8, x13, x9, x10)

inst_37643:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfbff0000; valaddr_reg:x12; val_offset:112866*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112866*FLEN/8, x13, x9, x10)

inst_37644:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfb807fff; valaddr_reg:x12; val_offset:112869*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112869*FLEN/8, x13, x9, x10)

inst_37645:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfbff8000; valaddr_reg:x12; val_offset:112872*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112872*FLEN/8, x13, x9, x10)

inst_37646:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfb803fff; valaddr_reg:x12; val_offset:112875*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112875*FLEN/8, x13, x9, x10)

inst_37647:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfbffc000; valaddr_reg:x12; val_offset:112878*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112878*FLEN/8, x13, x9, x10)

inst_37648:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfb801fff; valaddr_reg:x12; val_offset:112881*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112881*FLEN/8, x13, x9, x10)

inst_37649:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfbffe000; valaddr_reg:x12; val_offset:112884*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112884*FLEN/8, x13, x9, x10)

inst_37650:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfb800fff; valaddr_reg:x12; val_offset:112887*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112887*FLEN/8, x13, x9, x10)

inst_37651:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfbfff000; valaddr_reg:x12; val_offset:112890*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112890*FLEN/8, x13, x9, x10)

inst_37652:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfb8007ff; valaddr_reg:x12; val_offset:112893*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112893*FLEN/8, x13, x9, x10)

inst_37653:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfbfff800; valaddr_reg:x12; val_offset:112896*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112896*FLEN/8, x13, x9, x10)

inst_37654:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfb8003ff; valaddr_reg:x12; val_offset:112899*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112899*FLEN/8, x13, x9, x10)

inst_37655:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfbfffc00; valaddr_reg:x12; val_offset:112902*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112902*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_294)
inst_37656:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfb8001ff; valaddr_reg:x12; val_offset:112905*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112905*FLEN/8, x13, x9, x10)

inst_37657:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfbfffe00; valaddr_reg:x12; val_offset:112908*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112908*FLEN/8, x13, x9, x10)

inst_37658:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfb8000ff; valaddr_reg:x12; val_offset:112911*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112911*FLEN/8, x13, x9, x10)

inst_37659:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfbffff00; valaddr_reg:x12; val_offset:112914*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112914*FLEN/8, x13, x9, x10)

inst_37660:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfb80007f; valaddr_reg:x12; val_offset:112917*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112917*FLEN/8, x13, x9, x10)

inst_37661:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfbffff80; valaddr_reg:x12; val_offset:112920*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112920*FLEN/8, x13, x9, x10)

inst_37662:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfb80003f; valaddr_reg:x12; val_offset:112923*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112923*FLEN/8, x13, x9, x10)

inst_37663:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfbffffc0; valaddr_reg:x12; val_offset:112926*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112926*FLEN/8, x13, x9, x10)

inst_37664:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfb80001f; valaddr_reg:x12; val_offset:112929*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112929*FLEN/8, x13, x9, x10)

inst_37665:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfbffffe0; valaddr_reg:x12; val_offset:112932*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112932*FLEN/8, x13, x9, x10)

inst_37666:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfb80000f; valaddr_reg:x12; val_offset:112935*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112935*FLEN/8, x13, x9, x10)

inst_37667:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfbfffff0; valaddr_reg:x12; val_offset:112938*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112938*FLEN/8, x13, x9, x10)

inst_37668:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfb800007; valaddr_reg:x12; val_offset:112941*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112941*FLEN/8, x13, x9, x10)

inst_37669:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfbfffff8; valaddr_reg:x12; val_offset:112944*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112944*FLEN/8, x13, x9, x10)

inst_37670:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfb800003; valaddr_reg:x12; val_offset:112947*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112947*FLEN/8, x13, x9, x10)

inst_37671:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfbfffffc; valaddr_reg:x12; val_offset:112950*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112950*FLEN/8, x13, x9, x10)

inst_37672:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfb800001; valaddr_reg:x12; val_offset:112953*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112953*FLEN/8, x13, x9, x10)

inst_37673:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xfbfffffe; valaddr_reg:x12; val_offset:112956*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112956*FLEN/8, x13, x9, x10)

inst_37674:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xff7ffff8; valaddr_reg:x12; val_offset:112959*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112959*FLEN/8, x13, x9, x10)

inst_37675:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xff000007; valaddr_reg:x12; val_offset:112962*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112962*FLEN/8, x13, x9, x10)

inst_37676:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xff7ffffc; valaddr_reg:x12; val_offset:112965*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112965*FLEN/8, x13, x9, x10)

inst_37677:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xff000003; valaddr_reg:x12; val_offset:112968*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112968*FLEN/8, x13, x9, x10)

inst_37678:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xff7ffffe; valaddr_reg:x12; val_offset:112971*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112971*FLEN/8, x13, x9, x10)

inst_37679:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xff000001; valaddr_reg:x12; val_offset:112974*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112974*FLEN/8, x13, x9, x10)

inst_37680:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xff36db6d; valaddr_reg:x12; val_offset:112977*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112977*FLEN/8, x13, x9, x10)

inst_37681:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xff6db6db; valaddr_reg:x12; val_offset:112980*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112980*FLEN/8, x13, x9, x10)

inst_37682:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xff199999; valaddr_reg:x12; val_offset:112983*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112983*FLEN/8, x13, x9, x10)

inst_37683:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xff666666; valaddr_reg:x12; val_offset:112986*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112986*FLEN/8, x13, x9, x10)

inst_37684:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xff3bbbbb; valaddr_reg:x12; val_offset:112989*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112989*FLEN/8, x13, x9, x10)

inst_37685:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xff444444; valaddr_reg:x12; val_offset:112992*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112992*FLEN/8, x13, x9, x10)

inst_37686:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xff249249; valaddr_reg:x12; val_offset:112995*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112995*FLEN/8, x13, x9, x10)

inst_37687:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xff5b6db6; valaddr_reg:x12; val_offset:112998*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 112998*FLEN/8, x13, x9, x10)

inst_37688:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xff333333; valaddr_reg:x12; val_offset:113001*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113001*FLEN/8, x13, x9, x10)

inst_37689:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3f44a3; op2val:0xc0ab51d7;
op3val:0xff4ccccc; valaddr_reg:x12; val_offset:113004*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113004*FLEN/8, x13, x9, x10)

inst_37690:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc7fffff; valaddr_reg:x12; val_offset:113007*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113007*FLEN/8, x13, x9, x10)

inst_37691:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc000000; valaddr_reg:x12; val_offset:113010*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113010*FLEN/8, x13, x9, x10)

inst_37692:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc3fffff; valaddr_reg:x12; val_offset:113013*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113013*FLEN/8, x13, x9, x10)

inst_37693:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc400000; valaddr_reg:x12; val_offset:113016*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113016*FLEN/8, x13, x9, x10)

inst_37694:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc1fffff; valaddr_reg:x12; val_offset:113019*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113019*FLEN/8, x13, x9, x10)

inst_37695:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc600000; valaddr_reg:x12; val_offset:113022*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113022*FLEN/8, x13, x9, x10)

inst_37696:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc0fffff; valaddr_reg:x12; val_offset:113025*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113025*FLEN/8, x13, x9, x10)

inst_37697:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc700000; valaddr_reg:x12; val_offset:113028*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113028*FLEN/8, x13, x9, x10)

inst_37698:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc07ffff; valaddr_reg:x12; val_offset:113031*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113031*FLEN/8, x13, x9, x10)

inst_37699:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc780000; valaddr_reg:x12; val_offset:113034*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113034*FLEN/8, x13, x9, x10)

inst_37700:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc03ffff; valaddr_reg:x12; val_offset:113037*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113037*FLEN/8, x13, x9, x10)

inst_37701:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc7c0000; valaddr_reg:x12; val_offset:113040*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113040*FLEN/8, x13, x9, x10)

inst_37702:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc01ffff; valaddr_reg:x12; val_offset:113043*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113043*FLEN/8, x13, x9, x10)

inst_37703:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc7e0000; valaddr_reg:x12; val_offset:113046*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113046*FLEN/8, x13, x9, x10)

inst_37704:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc00ffff; valaddr_reg:x12; val_offset:113049*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113049*FLEN/8, x13, x9, x10)

inst_37705:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc7f0000; valaddr_reg:x12; val_offset:113052*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113052*FLEN/8, x13, x9, x10)

inst_37706:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc007fff; valaddr_reg:x12; val_offset:113055*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113055*FLEN/8, x13, x9, x10)

inst_37707:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc7f8000; valaddr_reg:x12; val_offset:113058*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113058*FLEN/8, x13, x9, x10)

inst_37708:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc003fff; valaddr_reg:x12; val_offset:113061*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113061*FLEN/8, x13, x9, x10)

inst_37709:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc7fc000; valaddr_reg:x12; val_offset:113064*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113064*FLEN/8, x13, x9, x10)

inst_37710:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc001fff; valaddr_reg:x12; val_offset:113067*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113067*FLEN/8, x13, x9, x10)

inst_37711:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc7fe000; valaddr_reg:x12; val_offset:113070*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113070*FLEN/8, x13, x9, x10)

inst_37712:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc000fff; valaddr_reg:x12; val_offset:113073*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113073*FLEN/8, x13, x9, x10)

inst_37713:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc7ff000; valaddr_reg:x12; val_offset:113076*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113076*FLEN/8, x13, x9, x10)

inst_37714:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc0007ff; valaddr_reg:x12; val_offset:113079*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113079*FLEN/8, x13, x9, x10)

inst_37715:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc7ff800; valaddr_reg:x12; val_offset:113082*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113082*FLEN/8, x13, x9, x10)

inst_37716:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc0003ff; valaddr_reg:x12; val_offset:113085*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113085*FLEN/8, x13, x9, x10)

inst_37717:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc7ffc00; valaddr_reg:x12; val_offset:113088*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113088*FLEN/8, x13, x9, x10)

inst_37718:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc0001ff; valaddr_reg:x12; val_offset:113091*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113091*FLEN/8, x13, x9, x10)

inst_37719:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc7ffe00; valaddr_reg:x12; val_offset:113094*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113094*FLEN/8, x13, x9, x10)

inst_37720:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc0000ff; valaddr_reg:x12; val_offset:113097*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113097*FLEN/8, x13, x9, x10)

inst_37721:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc7fff00; valaddr_reg:x12; val_offset:113100*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113100*FLEN/8, x13, x9, x10)

inst_37722:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc00007f; valaddr_reg:x12; val_offset:113103*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113103*FLEN/8, x13, x9, x10)

inst_37723:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc7fff80; valaddr_reg:x12; val_offset:113106*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113106*FLEN/8, x13, x9, x10)

inst_37724:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc00003f; valaddr_reg:x12; val_offset:113109*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113109*FLEN/8, x13, x9, x10)

inst_37725:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc7fffc0; valaddr_reg:x12; val_offset:113112*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113112*FLEN/8, x13, x9, x10)

inst_37726:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc00001f; valaddr_reg:x12; val_offset:113115*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113115*FLEN/8, x13, x9, x10)

inst_37727:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc7fffe0; valaddr_reg:x12; val_offset:113118*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113118*FLEN/8, x13, x9, x10)

inst_37728:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc00000f; valaddr_reg:x12; val_offset:113121*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113121*FLEN/8, x13, x9, x10)

inst_37729:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc7ffff0; valaddr_reg:x12; val_offset:113124*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113124*FLEN/8, x13, x9, x10)

inst_37730:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc000007; valaddr_reg:x12; val_offset:113127*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113127*FLEN/8, x13, x9, x10)

inst_37731:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc7ffff8; valaddr_reg:x12; val_offset:113130*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113130*FLEN/8, x13, x9, x10)

inst_37732:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc000003; valaddr_reg:x12; val_offset:113133*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113133*FLEN/8, x13, x9, x10)

inst_37733:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc7ffffc; valaddr_reg:x12; val_offset:113136*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113136*FLEN/8, x13, x9, x10)

inst_37734:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc000001; valaddr_reg:x12; val_offset:113139*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113139*FLEN/8, x13, x9, x10)

inst_37735:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xfc7ffffe; valaddr_reg:x12; val_offset:113142*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113142*FLEN/8, x13, x9, x10)

inst_37736:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xff7ffff8; valaddr_reg:x12; val_offset:113145*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113145*FLEN/8, x13, x9, x10)

inst_37737:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xff000007; valaddr_reg:x12; val_offset:113148*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113148*FLEN/8, x13, x9, x10)

inst_37738:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xff7ffffc; valaddr_reg:x12; val_offset:113151*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113151*FLEN/8, x13, x9, x10)

inst_37739:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xff000003; valaddr_reg:x12; val_offset:113154*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113154*FLEN/8, x13, x9, x10)

inst_37740:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xff7ffffe; valaddr_reg:x12; val_offset:113157*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113157*FLEN/8, x13, x9, x10)

inst_37741:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xff000001; valaddr_reg:x12; val_offset:113160*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113160*FLEN/8, x13, x9, x10)

inst_37742:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xff36db6d; valaddr_reg:x12; val_offset:113163*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113163*FLEN/8, x13, x9, x10)

inst_37743:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xff6db6db; valaddr_reg:x12; val_offset:113166*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113166*FLEN/8, x13, x9, x10)

inst_37744:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xff199999; valaddr_reg:x12; val_offset:113169*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113169*FLEN/8, x13, x9, x10)

inst_37745:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xff666666; valaddr_reg:x12; val_offset:113172*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113172*FLEN/8, x13, x9, x10)

inst_37746:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xff3bbbbb; valaddr_reg:x12; val_offset:113175*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113175*FLEN/8, x13, x9, x10)

inst_37747:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xff444444; valaddr_reg:x12; val_offset:113178*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113178*FLEN/8, x13, x9, x10)

inst_37748:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xff249249; valaddr_reg:x12; val_offset:113181*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113181*FLEN/8, x13, x9, x10)

inst_37749:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xff5b6db6; valaddr_reg:x12; val_offset:113184*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113184*FLEN/8, x13, x9, x10)

inst_37750:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xff333333; valaddr_reg:x12; val_offset:113187*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113187*FLEN/8, x13, x9, x10)

inst_37751:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a2c2; op2val:0xbfb982fc;
op3val:0xff4ccccc; valaddr_reg:x12; val_offset:113190*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113190*FLEN/8, x13, x9, x10)

inst_37752:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfcffffff; valaddr_reg:x12; val_offset:113193*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113193*FLEN/8, x13, x9, x10)

inst_37753:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfc800000; valaddr_reg:x12; val_offset:113196*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113196*FLEN/8, x13, x9, x10)

inst_37754:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfcbfffff; valaddr_reg:x12; val_offset:113199*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113199*FLEN/8, x13, x9, x10)

inst_37755:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfcc00000; valaddr_reg:x12; val_offset:113202*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113202*FLEN/8, x13, x9, x10)

inst_37756:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfc9fffff; valaddr_reg:x12; val_offset:113205*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113205*FLEN/8, x13, x9, x10)

inst_37757:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfce00000; valaddr_reg:x12; val_offset:113208*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113208*FLEN/8, x13, x9, x10)

inst_37758:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfc8fffff; valaddr_reg:x12; val_offset:113211*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113211*FLEN/8, x13, x9, x10)

inst_37759:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfcf00000; valaddr_reg:x12; val_offset:113214*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113214*FLEN/8, x13, x9, x10)

inst_37760:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfc87ffff; valaddr_reg:x12; val_offset:113217*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113217*FLEN/8, x13, x9, x10)

inst_37761:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfcf80000; valaddr_reg:x12; val_offset:113220*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113220*FLEN/8, x13, x9, x10)

inst_37762:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfc83ffff; valaddr_reg:x12; val_offset:113223*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113223*FLEN/8, x13, x9, x10)

inst_37763:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfcfc0000; valaddr_reg:x12; val_offset:113226*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113226*FLEN/8, x13, x9, x10)

inst_37764:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfc81ffff; valaddr_reg:x12; val_offset:113229*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113229*FLEN/8, x13, x9, x10)

inst_37765:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfcfe0000; valaddr_reg:x12; val_offset:113232*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113232*FLEN/8, x13, x9, x10)

inst_37766:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfc80ffff; valaddr_reg:x12; val_offset:113235*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113235*FLEN/8, x13, x9, x10)

inst_37767:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfcff0000; valaddr_reg:x12; val_offset:113238*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113238*FLEN/8, x13, x9, x10)

inst_37768:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfc807fff; valaddr_reg:x12; val_offset:113241*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113241*FLEN/8, x13, x9, x10)

inst_37769:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfcff8000; valaddr_reg:x12; val_offset:113244*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113244*FLEN/8, x13, x9, x10)

inst_37770:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfc803fff; valaddr_reg:x12; val_offset:113247*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113247*FLEN/8, x13, x9, x10)

inst_37771:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfcffc000; valaddr_reg:x12; val_offset:113250*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113250*FLEN/8, x13, x9, x10)

inst_37772:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfc801fff; valaddr_reg:x12; val_offset:113253*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113253*FLEN/8, x13, x9, x10)

inst_37773:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfcffe000; valaddr_reg:x12; val_offset:113256*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113256*FLEN/8, x13, x9, x10)

inst_37774:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfc800fff; valaddr_reg:x12; val_offset:113259*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113259*FLEN/8, x13, x9, x10)

inst_37775:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfcfff000; valaddr_reg:x12; val_offset:113262*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113262*FLEN/8, x13, x9, x10)

inst_37776:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfc8007ff; valaddr_reg:x12; val_offset:113265*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113265*FLEN/8, x13, x9, x10)

inst_37777:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfcfff800; valaddr_reg:x12; val_offset:113268*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113268*FLEN/8, x13, x9, x10)

inst_37778:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfc8003ff; valaddr_reg:x12; val_offset:113271*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113271*FLEN/8, x13, x9, x10)

inst_37779:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfcfffc00; valaddr_reg:x12; val_offset:113274*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113274*FLEN/8, x13, x9, x10)

inst_37780:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfc8001ff; valaddr_reg:x12; val_offset:113277*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113277*FLEN/8, x13, x9, x10)

inst_37781:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfcfffe00; valaddr_reg:x12; val_offset:113280*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113280*FLEN/8, x13, x9, x10)

inst_37782:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfc8000ff; valaddr_reg:x12; val_offset:113283*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113283*FLEN/8, x13, x9, x10)

inst_37783:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfcffff00; valaddr_reg:x12; val_offset:113286*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113286*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_295)
inst_37784:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfc80007f; valaddr_reg:x12; val_offset:113289*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113289*FLEN/8, x13, x9, x10)

inst_37785:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfcffff80; valaddr_reg:x12; val_offset:113292*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113292*FLEN/8, x13, x9, x10)

inst_37786:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfc80003f; valaddr_reg:x12; val_offset:113295*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113295*FLEN/8, x13, x9, x10)

inst_37787:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfcffffc0; valaddr_reg:x12; val_offset:113298*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113298*FLEN/8, x13, x9, x10)

inst_37788:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfc80001f; valaddr_reg:x12; val_offset:113301*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113301*FLEN/8, x13, x9, x10)

inst_37789:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfcffffe0; valaddr_reg:x12; val_offset:113304*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113304*FLEN/8, x13, x9, x10)

inst_37790:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfc80000f; valaddr_reg:x12; val_offset:113307*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113307*FLEN/8, x13, x9, x10)

inst_37791:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfcfffff0; valaddr_reg:x12; val_offset:113310*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113310*FLEN/8, x13, x9, x10)

inst_37792:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfc800007; valaddr_reg:x12; val_offset:113313*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113313*FLEN/8, x13, x9, x10)

inst_37793:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfcfffff8; valaddr_reg:x12; val_offset:113316*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113316*FLEN/8, x13, x9, x10)

inst_37794:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfc800003; valaddr_reg:x12; val_offset:113319*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113319*FLEN/8, x13, x9, x10)

inst_37795:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfcfffffc; valaddr_reg:x12; val_offset:113322*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113322*FLEN/8, x13, x9, x10)

inst_37796:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfc800001; valaddr_reg:x12; val_offset:113325*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113325*FLEN/8, x13, x9, x10)

inst_37797:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xfcfffffe; valaddr_reg:x12; val_offset:113328*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113328*FLEN/8, x13, x9, x10)

inst_37798:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xff7ffff8; valaddr_reg:x12; val_offset:113331*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113331*FLEN/8, x13, x9, x10)

inst_37799:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xff000007; valaddr_reg:x12; val_offset:113334*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113334*FLEN/8, x13, x9, x10)

inst_37800:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xff7ffffc; valaddr_reg:x12; val_offset:113337*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113337*FLEN/8, x13, x9, x10)

inst_37801:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xff000003; valaddr_reg:x12; val_offset:113340*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113340*FLEN/8, x13, x9, x10)

inst_37802:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xff7ffffe; valaddr_reg:x12; val_offset:113343*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113343*FLEN/8, x13, x9, x10)

inst_37803:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xff000001; valaddr_reg:x12; val_offset:113346*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113346*FLEN/8, x13, x9, x10)

inst_37804:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xff36db6d; valaddr_reg:x12; val_offset:113349*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113349*FLEN/8, x13, x9, x10)

inst_37805:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xff6db6db; valaddr_reg:x12; val_offset:113352*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113352*FLEN/8, x13, x9, x10)

inst_37806:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xff199999; valaddr_reg:x12; val_offset:113355*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113355*FLEN/8, x13, x9, x10)

inst_37807:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xff666666; valaddr_reg:x12; val_offset:113358*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113358*FLEN/8, x13, x9, x10)

inst_37808:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xff3bbbbb; valaddr_reg:x12; val_offset:113361*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113361*FLEN/8, x13, x9, x10)

inst_37809:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xff444444; valaddr_reg:x12; val_offset:113364*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113364*FLEN/8, x13, x9, x10)

inst_37810:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xff249249; valaddr_reg:x12; val_offset:113367*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113367*FLEN/8, x13, x9, x10)

inst_37811:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xff5b6db6; valaddr_reg:x12; val_offset:113370*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113370*FLEN/8, x13, x9, x10)

inst_37812:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xff333333; valaddr_reg:x12; val_offset:113373*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113373*FLEN/8, x13, x9, x10)

inst_37813:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dfb3858; op2val:0xc1026f77;
op3val:0xff4ccccc; valaddr_reg:x12; val_offset:113376*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113376*FLEN/8, x13, x9, x10)

inst_37814:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd7fffff; valaddr_reg:x12; val_offset:113379*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113379*FLEN/8, x13, x9, x10)

inst_37815:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd000000; valaddr_reg:x12; val_offset:113382*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113382*FLEN/8, x13, x9, x10)

inst_37816:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd3fffff; valaddr_reg:x12; val_offset:113385*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113385*FLEN/8, x13, x9, x10)

inst_37817:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd400000; valaddr_reg:x12; val_offset:113388*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113388*FLEN/8, x13, x9, x10)

inst_37818:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd1fffff; valaddr_reg:x12; val_offset:113391*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113391*FLEN/8, x13, x9, x10)

inst_37819:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd600000; valaddr_reg:x12; val_offset:113394*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113394*FLEN/8, x13, x9, x10)

inst_37820:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd0fffff; valaddr_reg:x12; val_offset:113397*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113397*FLEN/8, x13, x9, x10)

inst_37821:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd700000; valaddr_reg:x12; val_offset:113400*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113400*FLEN/8, x13, x9, x10)

inst_37822:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd07ffff; valaddr_reg:x12; val_offset:113403*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113403*FLEN/8, x13, x9, x10)

inst_37823:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd780000; valaddr_reg:x12; val_offset:113406*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113406*FLEN/8, x13, x9, x10)

inst_37824:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd03ffff; valaddr_reg:x12; val_offset:113409*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113409*FLEN/8, x13, x9, x10)

inst_37825:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd7c0000; valaddr_reg:x12; val_offset:113412*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113412*FLEN/8, x13, x9, x10)

inst_37826:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd01ffff; valaddr_reg:x12; val_offset:113415*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113415*FLEN/8, x13, x9, x10)

inst_37827:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd7e0000; valaddr_reg:x12; val_offset:113418*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113418*FLEN/8, x13, x9, x10)

inst_37828:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd00ffff; valaddr_reg:x12; val_offset:113421*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113421*FLEN/8, x13, x9, x10)

inst_37829:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd7f0000; valaddr_reg:x12; val_offset:113424*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113424*FLEN/8, x13, x9, x10)

inst_37830:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd007fff; valaddr_reg:x12; val_offset:113427*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113427*FLEN/8, x13, x9, x10)

inst_37831:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd7f8000; valaddr_reg:x12; val_offset:113430*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113430*FLEN/8, x13, x9, x10)

inst_37832:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd003fff; valaddr_reg:x12; val_offset:113433*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113433*FLEN/8, x13, x9, x10)

inst_37833:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd7fc000; valaddr_reg:x12; val_offset:113436*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113436*FLEN/8, x13, x9, x10)

inst_37834:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd001fff; valaddr_reg:x12; val_offset:113439*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113439*FLEN/8, x13, x9, x10)

inst_37835:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd7fe000; valaddr_reg:x12; val_offset:113442*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113442*FLEN/8, x13, x9, x10)

inst_37836:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd000fff; valaddr_reg:x12; val_offset:113445*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113445*FLEN/8, x13, x9, x10)

inst_37837:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd7ff000; valaddr_reg:x12; val_offset:113448*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113448*FLEN/8, x13, x9, x10)

inst_37838:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd0007ff; valaddr_reg:x12; val_offset:113451*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113451*FLEN/8, x13, x9, x10)

inst_37839:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd7ff800; valaddr_reg:x12; val_offset:113454*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113454*FLEN/8, x13, x9, x10)

inst_37840:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd0003ff; valaddr_reg:x12; val_offset:113457*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113457*FLEN/8, x13, x9, x10)

inst_37841:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd7ffc00; valaddr_reg:x12; val_offset:113460*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113460*FLEN/8, x13, x9, x10)

inst_37842:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd0001ff; valaddr_reg:x12; val_offset:113463*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113463*FLEN/8, x13, x9, x10)

inst_37843:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd7ffe00; valaddr_reg:x12; val_offset:113466*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113466*FLEN/8, x13, x9, x10)

inst_37844:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd0000ff; valaddr_reg:x12; val_offset:113469*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113469*FLEN/8, x13, x9, x10)

inst_37845:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd7fff00; valaddr_reg:x12; val_offset:113472*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113472*FLEN/8, x13, x9, x10)

inst_37846:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd00007f; valaddr_reg:x12; val_offset:113475*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113475*FLEN/8, x13, x9, x10)

inst_37847:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd7fff80; valaddr_reg:x12; val_offset:113478*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113478*FLEN/8, x13, x9, x10)

inst_37848:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd00003f; valaddr_reg:x12; val_offset:113481*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113481*FLEN/8, x13, x9, x10)

inst_37849:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd7fffc0; valaddr_reg:x12; val_offset:113484*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113484*FLEN/8, x13, x9, x10)

inst_37850:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd00001f; valaddr_reg:x12; val_offset:113487*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113487*FLEN/8, x13, x9, x10)

inst_37851:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd7fffe0; valaddr_reg:x12; val_offset:113490*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113490*FLEN/8, x13, x9, x10)

inst_37852:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd00000f; valaddr_reg:x12; val_offset:113493*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113493*FLEN/8, x13, x9, x10)

inst_37853:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd7ffff0; valaddr_reg:x12; val_offset:113496*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113496*FLEN/8, x13, x9, x10)

inst_37854:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd000007; valaddr_reg:x12; val_offset:113499*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113499*FLEN/8, x13, x9, x10)

inst_37855:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd7ffff8; valaddr_reg:x12; val_offset:113502*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113502*FLEN/8, x13, x9, x10)

inst_37856:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd000003; valaddr_reg:x12; val_offset:113505*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113505*FLEN/8, x13, x9, x10)

inst_37857:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd7ffffc; valaddr_reg:x12; val_offset:113508*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113508*FLEN/8, x13, x9, x10)

inst_37858:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd000001; valaddr_reg:x12; val_offset:113511*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113511*FLEN/8, x13, x9, x10)

inst_37859:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xfd7ffffe; valaddr_reg:x12; val_offset:113514*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113514*FLEN/8, x13, x9, x10)

inst_37860:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xff7ffff8; valaddr_reg:x12; val_offset:113517*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113517*FLEN/8, x13, x9, x10)

inst_37861:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xff000007; valaddr_reg:x12; val_offset:113520*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113520*FLEN/8, x13, x9, x10)

inst_37862:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xff7ffffc; valaddr_reg:x12; val_offset:113523*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113523*FLEN/8, x13, x9, x10)

inst_37863:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xff000003; valaddr_reg:x12; val_offset:113526*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113526*FLEN/8, x13, x9, x10)

inst_37864:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xff7ffffe; valaddr_reg:x12; val_offset:113529*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113529*FLEN/8, x13, x9, x10)

inst_37865:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xff000001; valaddr_reg:x12; val_offset:113532*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113532*FLEN/8, x13, x9, x10)

inst_37866:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xff36db6d; valaddr_reg:x12; val_offset:113535*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113535*FLEN/8, x13, x9, x10)

inst_37867:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xff6db6db; valaddr_reg:x12; val_offset:113538*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113538*FLEN/8, x13, x9, x10)

inst_37868:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xff199999; valaddr_reg:x12; val_offset:113541*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113541*FLEN/8, x13, x9, x10)

inst_37869:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xff666666; valaddr_reg:x12; val_offset:113544*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113544*FLEN/8, x13, x9, x10)

inst_37870:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xff3bbbbb; valaddr_reg:x12; val_offset:113547*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113547*FLEN/8, x13, x9, x10)

inst_37871:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xff444444; valaddr_reg:x12; val_offset:113550*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113550*FLEN/8, x13, x9, x10)

inst_37872:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xff249249; valaddr_reg:x12; val_offset:113553*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113553*FLEN/8, x13, x9, x10)

inst_37873:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xff5b6db6; valaddr_reg:x12; val_offset:113556*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113556*FLEN/8, x13, x9, x10)

inst_37874:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xff333333; valaddr_reg:x12; val_offset:113559*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113559*FLEN/8, x13, x9, x10)

inst_37875:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f4b7c; op2val:0xc04db4e0;
op3val:0xff4ccccc; valaddr_reg:x12; val_offset:113562*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113562*FLEN/8, x13, x9, x10)

inst_37876:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfdffffff; valaddr_reg:x12; val_offset:113565*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113565*FLEN/8, x13, x9, x10)

inst_37877:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfd800000; valaddr_reg:x12; val_offset:113568*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113568*FLEN/8, x13, x9, x10)

inst_37878:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfdbfffff; valaddr_reg:x12; val_offset:113571*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113571*FLEN/8, x13, x9, x10)

inst_37879:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfdc00000; valaddr_reg:x12; val_offset:113574*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113574*FLEN/8, x13, x9, x10)

inst_37880:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfd9fffff; valaddr_reg:x12; val_offset:113577*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113577*FLEN/8, x13, x9, x10)

inst_37881:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfde00000; valaddr_reg:x12; val_offset:113580*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113580*FLEN/8, x13, x9, x10)

inst_37882:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfd8fffff; valaddr_reg:x12; val_offset:113583*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113583*FLEN/8, x13, x9, x10)

inst_37883:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfdf00000; valaddr_reg:x12; val_offset:113586*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113586*FLEN/8, x13, x9, x10)

inst_37884:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfd87ffff; valaddr_reg:x12; val_offset:113589*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113589*FLEN/8, x13, x9, x10)

inst_37885:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfdf80000; valaddr_reg:x12; val_offset:113592*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113592*FLEN/8, x13, x9, x10)

inst_37886:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfd83ffff; valaddr_reg:x12; val_offset:113595*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113595*FLEN/8, x13, x9, x10)

inst_37887:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfdfc0000; valaddr_reg:x12; val_offset:113598*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113598*FLEN/8, x13, x9, x10)

inst_37888:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfd81ffff; valaddr_reg:x12; val_offset:113601*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113601*FLEN/8, x13, x9, x10)

inst_37889:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfdfe0000; valaddr_reg:x12; val_offset:113604*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113604*FLEN/8, x13, x9, x10)

inst_37890:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfd80ffff; valaddr_reg:x12; val_offset:113607*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113607*FLEN/8, x13, x9, x10)

inst_37891:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfdff0000; valaddr_reg:x12; val_offset:113610*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113610*FLEN/8, x13, x9, x10)

inst_37892:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfd807fff; valaddr_reg:x12; val_offset:113613*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113613*FLEN/8, x13, x9, x10)

inst_37893:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfdff8000; valaddr_reg:x12; val_offset:113616*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113616*FLEN/8, x13, x9, x10)

inst_37894:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfd803fff; valaddr_reg:x12; val_offset:113619*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113619*FLEN/8, x13, x9, x10)

inst_37895:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfdffc000; valaddr_reg:x12; val_offset:113622*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113622*FLEN/8, x13, x9, x10)

inst_37896:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfd801fff; valaddr_reg:x12; val_offset:113625*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113625*FLEN/8, x13, x9, x10)

inst_37897:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfdffe000; valaddr_reg:x12; val_offset:113628*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113628*FLEN/8, x13, x9, x10)

inst_37898:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfd800fff; valaddr_reg:x12; val_offset:113631*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113631*FLEN/8, x13, x9, x10)

inst_37899:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfdfff000; valaddr_reg:x12; val_offset:113634*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113634*FLEN/8, x13, x9, x10)

inst_37900:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfd8007ff; valaddr_reg:x12; val_offset:113637*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113637*FLEN/8, x13, x9, x10)

inst_37901:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfdfff800; valaddr_reg:x12; val_offset:113640*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113640*FLEN/8, x13, x9, x10)

inst_37902:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfd8003ff; valaddr_reg:x12; val_offset:113643*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113643*FLEN/8, x13, x9, x10)

inst_37903:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfdfffc00; valaddr_reg:x12; val_offset:113646*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113646*FLEN/8, x13, x9, x10)

inst_37904:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfd8001ff; valaddr_reg:x12; val_offset:113649*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113649*FLEN/8, x13, x9, x10)

inst_37905:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfdfffe00; valaddr_reg:x12; val_offset:113652*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113652*FLEN/8, x13, x9, x10)

inst_37906:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfd8000ff; valaddr_reg:x12; val_offset:113655*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113655*FLEN/8, x13, x9, x10)

inst_37907:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfdffff00; valaddr_reg:x12; val_offset:113658*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113658*FLEN/8, x13, x9, x10)

inst_37908:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfd80007f; valaddr_reg:x12; val_offset:113661*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113661*FLEN/8, x13, x9, x10)

inst_37909:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfdffff80; valaddr_reg:x12; val_offset:113664*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113664*FLEN/8, x13, x9, x10)

inst_37910:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfd80003f; valaddr_reg:x12; val_offset:113667*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113667*FLEN/8, x13, x9, x10)

inst_37911:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfdffffc0; valaddr_reg:x12; val_offset:113670*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113670*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_296)
inst_37912:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfd80001f; valaddr_reg:x12; val_offset:113673*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113673*FLEN/8, x13, x9, x10)

inst_37913:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfdffffe0; valaddr_reg:x12; val_offset:113676*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113676*FLEN/8, x13, x9, x10)

inst_37914:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfd80000f; valaddr_reg:x12; val_offset:113679*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113679*FLEN/8, x13, x9, x10)

inst_37915:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfdfffff0; valaddr_reg:x12; val_offset:113682*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113682*FLEN/8, x13, x9, x10)

inst_37916:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfd800007; valaddr_reg:x12; val_offset:113685*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113685*FLEN/8, x13, x9, x10)

inst_37917:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfdfffff8; valaddr_reg:x12; val_offset:113688*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113688*FLEN/8, x13, x9, x10)

inst_37918:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfd800003; valaddr_reg:x12; val_offset:113691*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113691*FLEN/8, x13, x9, x10)

inst_37919:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfdfffffc; valaddr_reg:x12; val_offset:113694*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113694*FLEN/8, x13, x9, x10)

inst_37920:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfd800001; valaddr_reg:x12; val_offset:113697*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113697*FLEN/8, x13, x9, x10)

inst_37921:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xfdfffffe; valaddr_reg:x12; val_offset:113700*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113700*FLEN/8, x13, x9, x10)

inst_37922:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xff7ffff8; valaddr_reg:x12; val_offset:113703*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113703*FLEN/8, x13, x9, x10)

inst_37923:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xff000007; valaddr_reg:x12; val_offset:113706*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113706*FLEN/8, x13, x9, x10)

inst_37924:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xff7ffffc; valaddr_reg:x12; val_offset:113709*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113709*FLEN/8, x13, x9, x10)

inst_37925:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xff000003; valaddr_reg:x12; val_offset:113712*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113712*FLEN/8, x13, x9, x10)

inst_37926:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xff7ffffe; valaddr_reg:x12; val_offset:113715*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113715*FLEN/8, x13, x9, x10)

inst_37927:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xff000001; valaddr_reg:x12; val_offset:113718*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113718*FLEN/8, x13, x9, x10)

inst_37928:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xff36db6d; valaddr_reg:x12; val_offset:113721*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113721*FLEN/8, x13, x9, x10)

inst_37929:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xff6db6db; valaddr_reg:x12; val_offset:113724*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113724*FLEN/8, x13, x9, x10)

inst_37930:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xff199999; valaddr_reg:x12; val_offset:113727*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113727*FLEN/8, x13, x9, x10)

inst_37931:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xff666666; valaddr_reg:x12; val_offset:113730*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113730*FLEN/8, x13, x9, x10)

inst_37932:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xff3bbbbb; valaddr_reg:x12; val_offset:113733*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113733*FLEN/8, x13, x9, x10)

inst_37933:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xff444444; valaddr_reg:x12; val_offset:113736*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113736*FLEN/8, x13, x9, x10)

inst_37934:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xff249249; valaddr_reg:x12; val_offset:113739*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113739*FLEN/8, x13, x9, x10)

inst_37935:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xff5b6db6; valaddr_reg:x12; val_offset:113742*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113742*FLEN/8, x13, x9, x10)

inst_37936:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xff333333; valaddr_reg:x12; val_offset:113745*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113745*FLEN/8, x13, x9, x10)

inst_37937:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e7bc0; op2val:0xc093486b;
op3val:0xff4ccccc; valaddr_reg:x12; val_offset:113748*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113748*FLEN/8, x13, x9, x10)

inst_37938:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe7fffff; valaddr_reg:x12; val_offset:113751*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113751*FLEN/8, x13, x9, x10)

inst_37939:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe000000; valaddr_reg:x12; val_offset:113754*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113754*FLEN/8, x13, x9, x10)

inst_37940:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe3fffff; valaddr_reg:x12; val_offset:113757*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113757*FLEN/8, x13, x9, x10)

inst_37941:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe400000; valaddr_reg:x12; val_offset:113760*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113760*FLEN/8, x13, x9, x10)

inst_37942:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe1fffff; valaddr_reg:x12; val_offset:113763*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113763*FLEN/8, x13, x9, x10)

inst_37943:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe600000; valaddr_reg:x12; val_offset:113766*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113766*FLEN/8, x13, x9, x10)

inst_37944:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe0fffff; valaddr_reg:x12; val_offset:113769*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113769*FLEN/8, x13, x9, x10)

inst_37945:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe700000; valaddr_reg:x12; val_offset:113772*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113772*FLEN/8, x13, x9, x10)

inst_37946:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe07ffff; valaddr_reg:x12; val_offset:113775*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113775*FLEN/8, x13, x9, x10)

inst_37947:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe780000; valaddr_reg:x12; val_offset:113778*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113778*FLEN/8, x13, x9, x10)

inst_37948:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe03ffff; valaddr_reg:x12; val_offset:113781*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113781*FLEN/8, x13, x9, x10)

inst_37949:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe7c0000; valaddr_reg:x12; val_offset:113784*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113784*FLEN/8, x13, x9, x10)

inst_37950:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe01ffff; valaddr_reg:x12; val_offset:113787*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113787*FLEN/8, x13, x9, x10)

inst_37951:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe7e0000; valaddr_reg:x12; val_offset:113790*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113790*FLEN/8, x13, x9, x10)

inst_37952:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe00ffff; valaddr_reg:x12; val_offset:113793*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113793*FLEN/8, x13, x9, x10)

inst_37953:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe7f0000; valaddr_reg:x12; val_offset:113796*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113796*FLEN/8, x13, x9, x10)

inst_37954:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe007fff; valaddr_reg:x12; val_offset:113799*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113799*FLEN/8, x13, x9, x10)

inst_37955:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe7f8000; valaddr_reg:x12; val_offset:113802*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113802*FLEN/8, x13, x9, x10)

inst_37956:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe003fff; valaddr_reg:x12; val_offset:113805*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113805*FLEN/8, x13, x9, x10)

inst_37957:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe7fc000; valaddr_reg:x12; val_offset:113808*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113808*FLEN/8, x13, x9, x10)

inst_37958:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe001fff; valaddr_reg:x12; val_offset:113811*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113811*FLEN/8, x13, x9, x10)

inst_37959:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe7fe000; valaddr_reg:x12; val_offset:113814*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113814*FLEN/8, x13, x9, x10)

inst_37960:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe000fff; valaddr_reg:x12; val_offset:113817*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113817*FLEN/8, x13, x9, x10)

inst_37961:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe7ff000; valaddr_reg:x12; val_offset:113820*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113820*FLEN/8, x13, x9, x10)

inst_37962:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe0007ff; valaddr_reg:x12; val_offset:113823*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113823*FLEN/8, x13, x9, x10)

inst_37963:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe7ff800; valaddr_reg:x12; val_offset:113826*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113826*FLEN/8, x13, x9, x10)

inst_37964:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe0003ff; valaddr_reg:x12; val_offset:113829*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113829*FLEN/8, x13, x9, x10)

inst_37965:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe7ffc00; valaddr_reg:x12; val_offset:113832*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113832*FLEN/8, x13, x9, x10)

inst_37966:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe0001ff; valaddr_reg:x12; val_offset:113835*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113835*FLEN/8, x13, x9, x10)

inst_37967:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe7ffe00; valaddr_reg:x12; val_offset:113838*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113838*FLEN/8, x13, x9, x10)

inst_37968:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe0000ff; valaddr_reg:x12; val_offset:113841*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113841*FLEN/8, x13, x9, x10)

inst_37969:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe7fff00; valaddr_reg:x12; val_offset:113844*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113844*FLEN/8, x13, x9, x10)

inst_37970:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe00007f; valaddr_reg:x12; val_offset:113847*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113847*FLEN/8, x13, x9, x10)

inst_37971:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe7fff80; valaddr_reg:x12; val_offset:113850*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113850*FLEN/8, x13, x9, x10)

inst_37972:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe00003f; valaddr_reg:x12; val_offset:113853*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113853*FLEN/8, x13, x9, x10)

inst_37973:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe7fffc0; valaddr_reg:x12; val_offset:113856*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113856*FLEN/8, x13, x9, x10)

inst_37974:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe00001f; valaddr_reg:x12; val_offset:113859*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113859*FLEN/8, x13, x9, x10)

inst_37975:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe7fffe0; valaddr_reg:x12; val_offset:113862*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113862*FLEN/8, x13, x9, x10)

inst_37976:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe00000f; valaddr_reg:x12; val_offset:113865*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113865*FLEN/8, x13, x9, x10)

inst_37977:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe7ffff0; valaddr_reg:x12; val_offset:113868*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113868*FLEN/8, x13, x9, x10)

inst_37978:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe000007; valaddr_reg:x12; val_offset:113871*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113871*FLEN/8, x13, x9, x10)

inst_37979:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe7ffff8; valaddr_reg:x12; val_offset:113874*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113874*FLEN/8, x13, x9, x10)

inst_37980:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe000003; valaddr_reg:x12; val_offset:113877*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113877*FLEN/8, x13, x9, x10)

inst_37981:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe7ffffc; valaddr_reg:x12; val_offset:113880*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113880*FLEN/8, x13, x9, x10)

inst_37982:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe000001; valaddr_reg:x12; val_offset:113883*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113883*FLEN/8, x13, x9, x10)

inst_37983:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xfe7ffffe; valaddr_reg:x12; val_offset:113886*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113886*FLEN/8, x13, x9, x10)

inst_37984:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xff7ffff8; valaddr_reg:x12; val_offset:113889*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113889*FLEN/8, x13, x9, x10)

inst_37985:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xff000007; valaddr_reg:x12; val_offset:113892*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113892*FLEN/8, x13, x9, x10)

inst_37986:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xff7ffffc; valaddr_reg:x12; val_offset:113895*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113895*FLEN/8, x13, x9, x10)

inst_37987:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xff000003; valaddr_reg:x12; val_offset:113898*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113898*FLEN/8, x13, x9, x10)

inst_37988:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xff7ffffe; valaddr_reg:x12; val_offset:113901*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113901*FLEN/8, x13, x9, x10)

inst_37989:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xff000001; valaddr_reg:x12; val_offset:113904*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113904*FLEN/8, x13, x9, x10)

inst_37990:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xff36db6d; valaddr_reg:x12; val_offset:113907*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113907*FLEN/8, x13, x9, x10)

inst_37991:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xff6db6db; valaddr_reg:x12; val_offset:113910*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113910*FLEN/8, x13, x9, x10)

inst_37992:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xff199999; valaddr_reg:x12; val_offset:113913*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113913*FLEN/8, x13, x9, x10)

inst_37993:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xff666666; valaddr_reg:x12; val_offset:113916*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113916*FLEN/8, x13, x9, x10)

inst_37994:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xff3bbbbb; valaddr_reg:x12; val_offset:113919*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113919*FLEN/8, x13, x9, x10)

inst_37995:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xff444444; valaddr_reg:x12; val_offset:113922*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113922*FLEN/8, x13, x9, x10)

inst_37996:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xff249249; valaddr_reg:x12; val_offset:113925*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113925*FLEN/8, x13, x9, x10)

inst_37997:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xff5b6db6; valaddr_reg:x12; val_offset:113928*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113928*FLEN/8, x13, x9, x10)

inst_37998:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xff333333; valaddr_reg:x12; val_offset:113931*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113931*FLEN/8, x13, x9, x10)

inst_37999:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec79dc5; op2val:0xc02427a9;
op3val:0xff4ccccc; valaddr_reg:x12; val_offset:113934*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113934*FLEN/8, x13, x9, x10)

inst_38000:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfeffffff; valaddr_reg:x12; val_offset:113937*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113937*FLEN/8, x13, x9, x10)

inst_38001:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfe800000; valaddr_reg:x12; val_offset:113940*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113940*FLEN/8, x13, x9, x10)

inst_38002:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfebfffff; valaddr_reg:x12; val_offset:113943*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113943*FLEN/8, x13, x9, x10)

inst_38003:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfec00000; valaddr_reg:x12; val_offset:113946*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113946*FLEN/8, x13, x9, x10)

inst_38004:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfe9fffff; valaddr_reg:x12; val_offset:113949*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113949*FLEN/8, x13, x9, x10)

inst_38005:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfee00000; valaddr_reg:x12; val_offset:113952*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113952*FLEN/8, x13, x9, x10)

inst_38006:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfe8fffff; valaddr_reg:x12; val_offset:113955*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113955*FLEN/8, x13, x9, x10)

inst_38007:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfef00000; valaddr_reg:x12; val_offset:113958*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113958*FLEN/8, x13, x9, x10)

inst_38008:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfe87ffff; valaddr_reg:x12; val_offset:113961*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113961*FLEN/8, x13, x9, x10)

inst_38009:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfef80000; valaddr_reg:x12; val_offset:113964*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113964*FLEN/8, x13, x9, x10)

inst_38010:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfe83ffff; valaddr_reg:x12; val_offset:113967*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113967*FLEN/8, x13, x9, x10)

inst_38011:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfefc0000; valaddr_reg:x12; val_offset:113970*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113970*FLEN/8, x13, x9, x10)

inst_38012:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfe81ffff; valaddr_reg:x12; val_offset:113973*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113973*FLEN/8, x13, x9, x10)

inst_38013:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfefe0000; valaddr_reg:x12; val_offset:113976*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113976*FLEN/8, x13, x9, x10)

inst_38014:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfe80ffff; valaddr_reg:x12; val_offset:113979*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113979*FLEN/8, x13, x9, x10)

inst_38015:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfeff0000; valaddr_reg:x12; val_offset:113982*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113982*FLEN/8, x13, x9, x10)

inst_38016:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfe807fff; valaddr_reg:x12; val_offset:113985*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113985*FLEN/8, x13, x9, x10)

inst_38017:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfeff8000; valaddr_reg:x12; val_offset:113988*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113988*FLEN/8, x13, x9, x10)

inst_38018:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfe803fff; valaddr_reg:x12; val_offset:113991*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113991*FLEN/8, x13, x9, x10)

inst_38019:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfeffc000; valaddr_reg:x12; val_offset:113994*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113994*FLEN/8, x13, x9, x10)

inst_38020:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfe801fff; valaddr_reg:x12; val_offset:113997*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 113997*FLEN/8, x13, x9, x10)

inst_38021:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfeffe000; valaddr_reg:x12; val_offset:114000*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114000*FLEN/8, x13, x9, x10)

inst_38022:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfe800fff; valaddr_reg:x12; val_offset:114003*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114003*FLEN/8, x13, x9, x10)

inst_38023:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfefff000; valaddr_reg:x12; val_offset:114006*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114006*FLEN/8, x13, x9, x10)

inst_38024:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfe8007ff; valaddr_reg:x12; val_offset:114009*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114009*FLEN/8, x13, x9, x10)

inst_38025:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfefff800; valaddr_reg:x12; val_offset:114012*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114012*FLEN/8, x13, x9, x10)

inst_38026:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfe8003ff; valaddr_reg:x12; val_offset:114015*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114015*FLEN/8, x13, x9, x10)

inst_38027:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfefffc00; valaddr_reg:x12; val_offset:114018*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114018*FLEN/8, x13, x9, x10)

inst_38028:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfe8001ff; valaddr_reg:x12; val_offset:114021*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114021*FLEN/8, x13, x9, x10)

inst_38029:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfefffe00; valaddr_reg:x12; val_offset:114024*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114024*FLEN/8, x13, x9, x10)

inst_38030:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfe8000ff; valaddr_reg:x12; val_offset:114027*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114027*FLEN/8, x13, x9, x10)

inst_38031:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfeffff00; valaddr_reg:x12; val_offset:114030*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114030*FLEN/8, x13, x9, x10)

inst_38032:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfe80007f; valaddr_reg:x12; val_offset:114033*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114033*FLEN/8, x13, x9, x10)

inst_38033:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfeffff80; valaddr_reg:x12; val_offset:114036*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114036*FLEN/8, x13, x9, x10)

inst_38034:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfe80003f; valaddr_reg:x12; val_offset:114039*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114039*FLEN/8, x13, x9, x10)

inst_38035:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfeffffc0; valaddr_reg:x12; val_offset:114042*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114042*FLEN/8, x13, x9, x10)

inst_38036:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfe80001f; valaddr_reg:x12; val_offset:114045*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114045*FLEN/8, x13, x9, x10)

inst_38037:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfeffffe0; valaddr_reg:x12; val_offset:114048*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114048*FLEN/8, x13, x9, x10)

inst_38038:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfe80000f; valaddr_reg:x12; val_offset:114051*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114051*FLEN/8, x13, x9, x10)

inst_38039:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfefffff0; valaddr_reg:x12; val_offset:114054*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114054*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_297)
inst_38040:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfe800007; valaddr_reg:x12; val_offset:114057*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114057*FLEN/8, x13, x9, x10)

inst_38041:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfefffff8; valaddr_reg:x12; val_offset:114060*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114060*FLEN/8, x13, x9, x10)

inst_38042:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfe800003; valaddr_reg:x12; val_offset:114063*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114063*FLEN/8, x13, x9, x10)

inst_38043:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfefffffc; valaddr_reg:x12; val_offset:114066*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114066*FLEN/8, x13, x9, x10)

inst_38044:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfe800001; valaddr_reg:x12; val_offset:114069*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114069*FLEN/8, x13, x9, x10)

inst_38045:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xfefffffe; valaddr_reg:x12; val_offset:114072*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114072*FLEN/8, x13, x9, x10)

inst_38046:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xff7ffff8; valaddr_reg:x12; val_offset:114075*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114075*FLEN/8, x13, x9, x10)

inst_38047:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xff000007; valaddr_reg:x12; val_offset:114078*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114078*FLEN/8, x13, x9, x10)

inst_38048:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xff7ffffc; valaddr_reg:x12; val_offset:114081*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114081*FLEN/8, x13, x9, x10)

inst_38049:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xff000003; valaddr_reg:x12; val_offset:114084*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114084*FLEN/8, x13, x9, x10)

inst_38050:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xff7ffffe; valaddr_reg:x12; val_offset:114087*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114087*FLEN/8, x13, x9, x10)

inst_38051:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xff000001; valaddr_reg:x12; val_offset:114090*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114090*FLEN/8, x13, x9, x10)

inst_38052:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xff36db6d; valaddr_reg:x12; val_offset:114093*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114093*FLEN/8, x13, x9, x10)

inst_38053:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xff6db6db; valaddr_reg:x12; val_offset:114096*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114096*FLEN/8, x13, x9, x10)

inst_38054:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xff199999; valaddr_reg:x12; val_offset:114099*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114099*FLEN/8, x13, x9, x10)

inst_38055:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xff666666; valaddr_reg:x12; val_offset:114102*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114102*FLEN/8, x13, x9, x10)

inst_38056:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xff3bbbbb; valaddr_reg:x12; val_offset:114105*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114105*FLEN/8, x13, x9, x10)

inst_38057:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xff444444; valaddr_reg:x12; val_offset:114108*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114108*FLEN/8, x13, x9, x10)

inst_38058:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xff249249; valaddr_reg:x12; val_offset:114111*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114111*FLEN/8, x13, x9, x10)

inst_38059:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xff5b6db6; valaddr_reg:x12; val_offset:114114*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114114*FLEN/8, x13, x9, x10)

inst_38060:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xff333333; valaddr_reg:x12; val_offset:114117*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114117*FLEN/8, x13, x9, x10)

inst_38061:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc68b4; op2val:0xc014ab47;
op3val:0xff4ccccc; valaddr_reg:x12; val_offset:114120*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114120*FLEN/8, x13, x9, x10)

inst_38062:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:114123*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114123*FLEN/8, x13, x9, x10)

inst_38063:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff000000; valaddr_reg:x12; val_offset:114126*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114126*FLEN/8, x13, x9, x10)

inst_38064:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff3fffff; valaddr_reg:x12; val_offset:114129*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114129*FLEN/8, x13, x9, x10)

inst_38065:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff400000; valaddr_reg:x12; val_offset:114132*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114132*FLEN/8, x13, x9, x10)

inst_38066:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff1fffff; valaddr_reg:x12; val_offset:114135*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114135*FLEN/8, x13, x9, x10)

inst_38067:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff600000; valaddr_reg:x12; val_offset:114138*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114138*FLEN/8, x13, x9, x10)

inst_38068:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff0fffff; valaddr_reg:x12; val_offset:114141*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114141*FLEN/8, x13, x9, x10)

inst_38069:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff700000; valaddr_reg:x12; val_offset:114144*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114144*FLEN/8, x13, x9, x10)

inst_38070:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff07ffff; valaddr_reg:x12; val_offset:114147*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114147*FLEN/8, x13, x9, x10)

inst_38071:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff780000; valaddr_reg:x12; val_offset:114150*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114150*FLEN/8, x13, x9, x10)

inst_38072:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff03ffff; valaddr_reg:x12; val_offset:114153*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114153*FLEN/8, x13, x9, x10)

inst_38073:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff7c0000; valaddr_reg:x12; val_offset:114156*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114156*FLEN/8, x13, x9, x10)

inst_38074:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff01ffff; valaddr_reg:x12; val_offset:114159*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114159*FLEN/8, x13, x9, x10)

inst_38075:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff7e0000; valaddr_reg:x12; val_offset:114162*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114162*FLEN/8, x13, x9, x10)

inst_38076:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff00ffff; valaddr_reg:x12; val_offset:114165*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114165*FLEN/8, x13, x9, x10)

inst_38077:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff7f0000; valaddr_reg:x12; val_offset:114168*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114168*FLEN/8, x13, x9, x10)

inst_38078:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff007fff; valaddr_reg:x12; val_offset:114171*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114171*FLEN/8, x13, x9, x10)

inst_38079:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff7f8000; valaddr_reg:x12; val_offset:114174*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114174*FLEN/8, x13, x9, x10)

inst_38080:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff003fff; valaddr_reg:x12; val_offset:114177*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114177*FLEN/8, x13, x9, x10)

inst_38081:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff7fc000; valaddr_reg:x12; val_offset:114180*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114180*FLEN/8, x13, x9, x10)

inst_38082:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff001fff; valaddr_reg:x12; val_offset:114183*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114183*FLEN/8, x13, x9, x10)

inst_38083:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff7fe000; valaddr_reg:x12; val_offset:114186*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114186*FLEN/8, x13, x9, x10)

inst_38084:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff000fff; valaddr_reg:x12; val_offset:114189*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114189*FLEN/8, x13, x9, x10)

inst_38085:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff7ff000; valaddr_reg:x12; val_offset:114192*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114192*FLEN/8, x13, x9, x10)

inst_38086:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff0007ff; valaddr_reg:x12; val_offset:114195*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114195*FLEN/8, x13, x9, x10)

inst_38087:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff7ff800; valaddr_reg:x12; val_offset:114198*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114198*FLEN/8, x13, x9, x10)

inst_38088:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff0003ff; valaddr_reg:x12; val_offset:114201*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114201*FLEN/8, x13, x9, x10)

inst_38089:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff7ffc00; valaddr_reg:x12; val_offset:114204*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114204*FLEN/8, x13, x9, x10)

inst_38090:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff0001ff; valaddr_reg:x12; val_offset:114207*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114207*FLEN/8, x13, x9, x10)

inst_38091:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff7ffe00; valaddr_reg:x12; val_offset:114210*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114210*FLEN/8, x13, x9, x10)

inst_38092:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff0000ff; valaddr_reg:x12; val_offset:114213*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114213*FLEN/8, x13, x9, x10)

inst_38093:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff7fff00; valaddr_reg:x12; val_offset:114216*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114216*FLEN/8, x13, x9, x10)

inst_38094:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff00007f; valaddr_reg:x12; val_offset:114219*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114219*FLEN/8, x13, x9, x10)

inst_38095:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff7fff80; valaddr_reg:x12; val_offset:114222*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114222*FLEN/8, x13, x9, x10)

inst_38096:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff00003f; valaddr_reg:x12; val_offset:114225*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114225*FLEN/8, x13, x9, x10)

inst_38097:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff7fffc0; valaddr_reg:x12; val_offset:114228*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114228*FLEN/8, x13, x9, x10)

inst_38098:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff00001f; valaddr_reg:x12; val_offset:114231*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114231*FLEN/8, x13, x9, x10)

inst_38099:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff7fffe0; valaddr_reg:x12; val_offset:114234*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114234*FLEN/8, x13, x9, x10)

inst_38100:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff00000f; valaddr_reg:x12; val_offset:114237*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114237*FLEN/8, x13, x9, x10)

inst_38101:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff7ffff0; valaddr_reg:x12; val_offset:114240*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114240*FLEN/8, x13, x9, x10)

inst_38102:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff000007; valaddr_reg:x12; val_offset:114243*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114243*FLEN/8, x13, x9, x10)

inst_38103:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff7ffff8; valaddr_reg:x12; val_offset:114246*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114246*FLEN/8, x13, x9, x10)

inst_38104:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff000003; valaddr_reg:x12; val_offset:114249*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114249*FLEN/8, x13, x9, x10)

inst_38105:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff7ffffc; valaddr_reg:x12; val_offset:114252*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114252*FLEN/8, x13, x9, x10)

inst_38106:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff000001; valaddr_reg:x12; val_offset:114255*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114255*FLEN/8, x13, x9, x10)

inst_38107:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff7ffffe; valaddr_reg:x12; val_offset:114258*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114258*FLEN/8, x13, x9, x10)

inst_38108:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff36db6d; valaddr_reg:x12; val_offset:114261*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114261*FLEN/8, x13, x9, x10)

inst_38109:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff6db6db; valaddr_reg:x12; val_offset:114264*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114264*FLEN/8, x13, x9, x10)

inst_38110:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff199999; valaddr_reg:x12; val_offset:114267*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114267*FLEN/8, x13, x9, x10)

inst_38111:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff666666; valaddr_reg:x12; val_offset:114270*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114270*FLEN/8, x13, x9, x10)

inst_38112:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff3bbbbb; valaddr_reg:x12; val_offset:114273*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114273*FLEN/8, x13, x9, x10)

inst_38113:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff444444; valaddr_reg:x12; val_offset:114276*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114276*FLEN/8, x13, x9, x10)

inst_38114:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff249249; valaddr_reg:x12; val_offset:114279*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114279*FLEN/8, x13, x9, x10)

inst_38115:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff5b6db6; valaddr_reg:x12; val_offset:114282*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114282*FLEN/8, x13, x9, x10)

inst_38116:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff333333; valaddr_reg:x12; val_offset:114285*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114285*FLEN/8, x13, x9, x10)

inst_38117:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0d256; op2val:0xc0081147;
op3val:0xff4ccccc; valaddr_reg:x12; val_offset:114288*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114288*FLEN/8, x13, x9, x10)

inst_38118:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f222105; op2val:0x0;
op3val:0x7fffff; valaddr_reg:x12; val_offset:114291*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114291*FLEN/8, x13, x9, x10)

inst_38119:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f222105; op2val:0x0;
op3val:0x3fffff; valaddr_reg:x12; val_offset:114294*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114294*FLEN/8, x13, x9, x10)

inst_38120:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f222105; op2val:0x0;
op3val:0x1fffff; valaddr_reg:x12; val_offset:114297*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114297*FLEN/8, x13, x9, x10)

inst_38121:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f222105; op2val:0x0;
op3val:0x700000; valaddr_reg:x12; val_offset:114300*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114300*FLEN/8, x13, x9, x10)

inst_38122:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f222105; op2val:0x0;
op3val:0x780000; valaddr_reg:x12; val_offset:114303*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114303*FLEN/8, x13, x9, x10)

inst_38123:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f222105; op2val:0x0;
op3val:0x7ffff; valaddr_reg:x12; val_offset:114306*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114306*FLEN/8, x13, x9, x10)

inst_38124:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f222105; op2val:0x0;
op3val:0x7c0000; valaddr_reg:x12; val_offset:114309*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114309*FLEN/8, x13, x9, x10)

inst_38125:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f222105; op2val:0x0;
op3val:0x3ffff; valaddr_reg:x12; val_offset:114312*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114312*FLEN/8, x13, x9, x10)

inst_38126:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f222105; op2val:0x0;
op3val:0x1ff; valaddr_reg:x12; val_offset:114315*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114315*FLEN/8, x13, x9, x10)

inst_38127:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f222105; op2val:0x0;
op3val:0xff; valaddr_reg:x12; val_offset:114318*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114318*FLEN/8, x13, x9, x10)

inst_38128:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f222105; op2val:0x0;
op3val:0x7f; valaddr_reg:x12; val_offset:114321*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114321*FLEN/8, x13, x9, x10)

inst_38129:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f222105; op2val:0x0;
op3val:0x1f; valaddr_reg:x12; val_offset:114324*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114324*FLEN/8, x13, x9, x10)

#endif
RVTEST_CODE_END
RVMODEL_HALT
RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4110418943,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4118805504,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4110418431,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4118806016,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4110418175,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4118806272,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4110418047,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4118806400,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4110417983,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4118806464,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4110417951,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4118806496,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4110417935,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4118806512,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4110417927,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4118806520,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4110417923,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4118806524,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4110417921,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4118806526,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4286578680,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4278190087,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4286578684,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4278190083,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4286578686,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4278190081,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4281785197,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4285380315,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4279867801,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4284900966,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4282104763,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4282664004,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4280586825,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4284181942,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4281545523,32,FLEN)
NAN_BOXED(2128566065,32,FLEN)
NAN_BOXED(3222452148,32,FLEN)
NAN_BOXED(4283223244,32,FLEN)
NAN_BOXED(2123900795,32,FLEN)
NAN_BOXED(3226950724,32,FLEN)
NAN_BOXED(4127195135,32,FLEN)
NAN_BOXED(2123900795,32,FLEN)
NAN_BOXED(3226950724,32,FLEN)
NAN_BOXED(4118806528,32,FLEN)
NAN_BOXED(2123900795,32,FLEN)
NAN_BOXED(3226950724,32,FLEN)
NAN_BOXED(4123000831,32,FLEN)
NAN_BOXED(2123900795,32,FLEN)
NAN_BOXED(3226950724,32,FLEN)
NAN_BOXED(4123000832,32,FLEN)
NAN_BOXED(2123900795,32,FLEN)
NAN_BOXED(3226950724,32,FLEN)
NAN_BOXED(4120903679,32,FLEN)
NAN_BOXED(2123900795,32,FLEN)
NAN_BOXED(3226950724,32,FLEN)
NAN_BOXED(4125097984,32,FLEN)
NAN_BOXED(2123900795,32,FLEN)
NAN_BOXED(3226950724,32,FLEN)
NAN_BOXED(4119855103,32,FLEN)
NAN_BOXED(2123900795,32,FLEN)
NAN_BOXED(3226950724,32,FLEN)
NAN_BOXED(4126146560,32,FLEN)
NAN_BOXED(2123900795,32,FLEN)
NAN_BOXED(3226950724,32,FLEN)
NAN_BOXED(4119330815,32,FLEN)
NAN_BOXED(2123900795,32,FLEN)
NAN_BOXED(3226950724,32,FLEN)
NAN_BOXED(4126670848,32,FLEN)
NAN_BOXED(2123900795,32,FLEN)
NAN_BOXED(3226950724,32,FLEN)
NAN_BOXED(4119068671,32,FLEN)
NAN_BOXED(2123900795,32,FLEN)
NAN_BOXED(3226950724,32,FLEN)
NAN_BOXED(4126932992,32,FLEN)
NAN_BOXED(2123900795,32,FLEN)
NAN_BOXED(3226950724,32,FLEN)
NAN_BOXED(4118937599,32,FLEN)
NAN_BOXED(2123900795,32,FLEN)
NAN_BOXED(3226950724,32,FLEN)
NAN_BOXED(4127064064,32,FLEN)
NAN_BOXED(2123900795,32,FLEN)
NAN_BOXED(3226950724,32,FLEN)
NAN_BOXED(4118872063,32,FLEN)
NAN_BOXED(2123900795,32,FLEN)
NAN_BOXED(3226950724,32,FLEN)
NAN_BOXED(4127129600,32,FLEN)
NAN_BOXED(2123900795,32,FLEN)
NAN_BOXED(3226950724,32,FLEN)
NAN_BOXED(4118839295,32,FLEN)
NAN_BOXED(2123900795,32,FLEN)
NAN_BOXED(3226950724,32,FLEN)
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NAN_BOXED(3230375231,32,FLEN)
NAN_BOXED(4284181942,32,FLEN)
NAN_BOXED(2120922156,32,FLEN)
NAN_BOXED(3230375231,32,FLEN)
NAN_BOXED(4281545523,32,FLEN)
NAN_BOXED(2120922156,32,FLEN)
NAN_BOXED(3230375231,32,FLEN)
NAN_BOXED(4283223244,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4211081215,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4202692608,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4206886911,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4206886912,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4204789759,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4208984064,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4203741183,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4210032640,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4203216895,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4210556928,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4202954751,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4210819072,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4202823679,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4210950144,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4202758143,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4211015680,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4202725375,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4211048448,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4202708991,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4211064832,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4202700799,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4211073024,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4202696703,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4211077120,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4202694655,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4211079168,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4202693631,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4211080192,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4202693119,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4211080704,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4202692863,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4211080960,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4202692735,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4211081088,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4202692671,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4211081152,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4202692639,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4211081184,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4202692623,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4211081200,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4202692615,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4211081208,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4202692611,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4211081212,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4202692609,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4211081214,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4286578680,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4278190087,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4286578684,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4278190083,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4286578686,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4278190081,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4281785197,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4285380315,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4279867801,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4284900966,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4282104763,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4282664004,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4280586825,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4284181942,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4281545523,32,FLEN)
NAN_BOXED(2122482837,32,FLEN)
NAN_BOXED(3229290418,32,FLEN)
NAN_BOXED(4283223244,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4219469823,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4211081216,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4215275519,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4215275520,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4213178367,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4217372672,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4212129791,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4218421248,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4211605503,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4218945536,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4211343359,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4219207680,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4211212287,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4219338752,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4211146751,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4219404288,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4211113983,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4219437056,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4211097599,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4219453440,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4211089407,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4219461632,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4211085311,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4219465728,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4211083263,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4219467776,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4211082239,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4219468800,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4211081727,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4219469312,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4211081471,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4219469568,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4211081343,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4219469696,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4211081279,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4219469760,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4211081247,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4219469792,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4211081231,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4219469808,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4211081223,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4219469816,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4211081219,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4219469820,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4211081217,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4219469822,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4286578680,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4278190087,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4286578684,32,FLEN)
NAN_BOXED(2127271768,32,FLEN)
NAN_BOXED(3223384881,32,FLEN)
NAN_BOXED(4278190083,32,FLEN)

RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;



signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 48*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_0:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_2:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_3:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_4:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_5:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_6:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_7:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_8:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_9:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_10:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_11:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_12:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_13:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_14:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_15:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_16:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_17:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_18:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_19:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_20:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_21:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_22:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_23:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_24:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_25:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_26:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_27:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_28:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_29:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_30:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_31:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_32:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_33:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_34:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_35:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_36:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_37:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_38:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_39:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_40:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_41:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_42:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_43:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_44:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_45:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_46:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_47:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_48:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_49:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_50:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_51:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_52:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_53:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_54:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_55:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_56:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_57:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_58:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_59:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_60:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_61:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_62:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_63:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_64:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_65:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_66:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_67:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_68:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_69:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_70:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_71:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_72:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_73:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_74:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_75:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_76:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_77:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_78:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_79:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_80:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_81:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_82:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_83:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_84:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_85:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_86:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_87:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_88:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_89:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_90:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_91:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_92:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_93:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_94:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_95:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_96:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_97:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_98:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_99:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_100:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_101:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_102:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_103:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_104:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_105:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_106:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_107:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_108:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_109:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_110:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_111:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_112:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_113:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_114:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_115:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_116:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_117:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_118:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_119:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_120:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_121:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_122:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_123:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_124:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_125:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_126:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_127:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_128:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_129:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_130:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_131:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_132:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_133:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_134:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_135:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_136:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_137:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_138:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_139:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_140:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_141:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_142:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_143:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_144:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_145:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_146:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_147:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_148:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_149:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_150:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_151:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_152:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_153:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_154:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_155:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_156:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_157:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_158:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_159:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_160:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_161:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_162:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_163:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_164:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_165:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_166:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_167:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_168:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_169:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_170:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_171:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_172:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_173:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_174:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_175:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_176:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_177:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_178:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_179:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_180:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_181:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_182:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_183:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_184:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_185:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_186:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_187:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_188:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_189:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_190:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_191:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_192:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_193:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_194:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_195:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_196:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_197:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_198:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_199:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_200:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_201:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_202:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_203:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_204:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_205:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_206:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_207:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_208:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_209:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_210:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_211:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_212:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_213:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_214:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_215:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_216:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_217:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_218:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_219:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_220:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_221:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_222:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_223:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_224:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_225:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_226:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_227:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_228:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_229:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_230:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_231:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_232:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_233:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_234:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_235:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_236:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_237:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_238:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_239:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_240:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_241:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_242:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_243:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_244:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_245:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_246:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_247:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_248:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_249:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_250:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_251:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_252:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_253:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_254:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_255:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_256:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_257:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_258:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_259:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_260:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_261:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_262:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_263:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_264:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_265:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_266:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_267:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_268:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_269:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_270:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_271:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_272:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_273:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_274:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_275:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_276:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_277:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_278:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_279:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_280:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_281:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_282:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_283:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_284:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_285:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_286:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_287:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_288:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_289:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_290:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_291:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_292:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_293:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_294:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_295:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_296:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_297:
    .fill 180*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine
tsig_begin_canary:
CANARY;

mtrap_sigptr:
    .fill 64*XLEN/32,4,0xdeadbeef

tsig_end_canary:
CANARY;
#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif


sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
