
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.11.0
// timestamp : Sat May  6 11:38:58 2023 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /home/riscv/riscv-ctg/sample_cgfs/dataset.cgf \
//                  --cgf /home/riscv/riscv-ctg/sample_cgfs/sample_cgfs_fext/RV32H/rv32h_fadd.cgf \
 \
//                  -- xlen 32  \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fadd.h instruction of the RISC-V RV32F_Zicsr_Zfh,RV64F_Zicsr_Zfh extension for the fadd_b8 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV32IF_Zicsr_Zfh,RV64IF_Zicsr_Zfh")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*Zfh.*);def TEST_CASE_1=True;",fadd_b8)

RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_0:// rs1 == rs2 == rd, rs1==f31, rs2==f31, rd==f31,fs1 == 0 and fe1 == 0x0c and fm1 == 0x0fa and fs2 == 1 and fe2 == 0x0c and fm2 == 0x0fa and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f31; op2:f31; dest:f31; op1val:0x30fa; op2val:0x30fa; 
   valaddr_reg:x3; val_offset:0*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f31, f31, dyn, 0, 0, x3, 0*FLEN/8, x4, x1, x2)

inst_1:// rs1 != rs2  and rs1 != rd and rs2 != rd, rs1==f29, rs2==f28, rd==f30,fs1 == 0 and fe1 == 0x0c and fm1 == 0x0fa and fs2 == 1 and fe2 == 0x0c and fm2 == 0x0fa and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f29; op2:f28; dest:f30; op1val:0x30fa; op2val:0xb0fa; 
   valaddr_reg:x3; val_offset:2*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f30, f29, f28, dyn, 32, 0, x3, 2*FLEN/8, x4, x1, x2)

inst_2:// rs2 == rd != rs1, rs1==f30, rs2==f29, rd==f29,fs1 == 0 and fe1 == 0x0c and fm1 == 0x0fa and fs2 == 1 and fe2 == 0x0c and fm2 == 0x0fa and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f29; op1val:0x30fa; op2val:0xb0fa; 
   valaddr_reg:x3; val_offset:4*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f29, f30, f29, dyn, 64, 0, x3, 4*FLEN/8, x4, x1, x2)

inst_3:// rs1 == rd != rs2, rs1==f28, rs2==f30, rd==f28,fs1 == 0 and fe1 == 0x0c and fm1 == 0x0fa and fs2 == 1 and fe2 == 0x0c and fm2 == 0x0fa and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f28; op2:f30; dest:f28; op1val:0x30fa; op2val:0xb0fa; 
   valaddr_reg:x3; val_offset:6*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f28, f28, f30, dyn, 96, 0, x3, 6*FLEN/8, x4, x1, x2)

inst_4:// rs1 == rs2 != rd, rs1==f26, rs2==f26, rd==f27,fs1 == 0 and fe1 == 0x0c and fm1 == 0x0fa and fs2 == 1 and fe2 == 0x0c and fm2 == 0x0fa and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f26; op2:f26; dest:f27; op1val:0x30fa; op2val:0x30fa; 
   valaddr_reg:x3; val_offset:8*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f27, f26, f26, dyn, 128, 0, x3, 8*FLEN/8, x4, x1, x2)

inst_5:// rs1==f27, rs2==f25, rd==f26,fs1 == 0 and fe1 == 0x0e and fm1 == 0x0a2 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0a2 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f27; op2:f25; dest:f26; op1val:0x38a2; op2val:0xb8a2; 
   valaddr_reg:x3; val_offset:10*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f26, f27, f25, dyn, 0, 0, x3, 10*FLEN/8, x4, x1, x2)

inst_6:// rs1==f24, rs2==f27, rd==f25,fs1 == 0 and fe1 == 0x0e and fm1 == 0x0a2 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0a2 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f24; op2:f27; dest:f25; op1val:0x38a2; op2val:0xb8a2; 
   valaddr_reg:x3; val_offset:12*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f25, f24, f27, dyn, 32, 0, x3, 12*FLEN/8, x4, x1, x2)

inst_7:// rs1==f25, rs2==f23, rd==f24,fs1 == 0 and fe1 == 0x0e and fm1 == 0x0a2 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0a2 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f25; op2:f23; dest:f24; op1val:0x38a2; op2val:0xb8a2; 
   valaddr_reg:x3; val_offset:14*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f24, f25, f23, dyn, 64, 0, x3, 14*FLEN/8, x4, x1, x2)

inst_8:// rs1==f22, rs2==f24, rd==f23,fs1 == 0 and fe1 == 0x0e and fm1 == 0x0a2 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0a2 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f22; op2:f24; dest:f23; op1val:0x38a2; op2val:0xb8a2; 
   valaddr_reg:x3; val_offset:16*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f23, f22, f24, dyn, 96, 0, x3, 16*FLEN/8, x4, x1, x2)

inst_9:// rs1==f23, rs2==f21, rd==f22,fs1 == 0 and fe1 == 0x0e and fm1 == 0x0a2 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0a2 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f23; op2:f21; dest:f22; op1val:0x38a2; op2val:0xb8a2; 
   valaddr_reg:x3; val_offset:18*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f22, f23, f21, dyn, 128, 0, x3, 18*FLEN/8, x4, x1, x2)

inst_10:// rs1==f20, rs2==f22, rd==f21,fs1 == 0 and fe1 == 0x0d and fm1 == 0x3d1 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x3d1 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f20; op2:f22; dest:f21; op1val:0x37d1; op2val:0xb7d1; 
   valaddr_reg:x3; val_offset:20*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f21, f20, f22, dyn, 0, 0, x3, 20*FLEN/8, x4, x1, x2)

inst_11:// rs1==f21, rs2==f19, rd==f20,fs1 == 0 and fe1 == 0x0d and fm1 == 0x3d1 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x3d1 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f21; op2:f19; dest:f20; op1val:0x37d1; op2val:0xb7d1; 
   valaddr_reg:x3; val_offset:22*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f20, f21, f19, dyn, 32, 0, x3, 22*FLEN/8, x4, x1, x2)

inst_12:// rs1==f18, rs2==f20, rd==f19,fs1 == 0 and fe1 == 0x0d and fm1 == 0x3d1 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x3d1 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f18; op2:f20; dest:f19; op1val:0x37d1; op2val:0xb7d1; 
   valaddr_reg:x3; val_offset:24*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f19, f18, f20, dyn, 64, 0, x3, 24*FLEN/8, x4, x1, x2)

inst_13:// rs1==f19, rs2==f17, rd==f18,fs1 == 0 and fe1 == 0x0d and fm1 == 0x3d1 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x3d1 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f19; op2:f17; dest:f18; op1val:0x37d1; op2val:0xb7d1; 
   valaddr_reg:x3; val_offset:26*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f18, f19, f17, dyn, 96, 0, x3, 26*FLEN/8, x4, x1, x2)

inst_14:// rs1==f16, rs2==f18, rd==f17,fs1 == 0 and fe1 == 0x0d and fm1 == 0x3d1 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x3d1 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f16; op2:f18; dest:f17; op1val:0x37d1; op2val:0xb7d1; 
   valaddr_reg:x3; val_offset:28*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f17, f16, f18, dyn, 128, 0, x3, 28*FLEN/8, x4, x1, x2)

inst_15:// rs1==f17, rs2==f15, rd==f16,fs1 == 0 and fe1 == 0x0c and fm1 == 0x2eb and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2eb and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f17; op2:f15; dest:f16; op1val:0x32eb; op2val:0xb2eb; 
   valaddr_reg:x3; val_offset:30*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f16, f17, f15, dyn, 0, 0, x3, 30*FLEN/8, x4, x1, x2)

inst_16:// rs1==f14, rs2==f16, rd==f15,fs1 == 0 and fe1 == 0x0c and fm1 == 0x2eb and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2eb and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f14; op2:f16; dest:f15; op1val:0x32eb; op2val:0xb2eb; 
   valaddr_reg:x3; val_offset:32*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f15, f14, f16, dyn, 32, 0, x3, 32*FLEN/8, x4, x1, x2)

inst_17:// rs1==f15, rs2==f13, rd==f14,fs1 == 0 and fe1 == 0x0c and fm1 == 0x2eb and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2eb and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f15; op2:f13; dest:f14; op1val:0x32eb; op2val:0xb2eb; 
   valaddr_reg:x3; val_offset:34*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f14, f15, f13, dyn, 64, 0, x3, 34*FLEN/8, x4, x1, x2)

inst_18:// rs1==f12, rs2==f14, rd==f13,fs1 == 0 and fe1 == 0x0c and fm1 == 0x2eb and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2eb and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f12; op2:f14; dest:f13; op1val:0x32eb; op2val:0xb2eb; 
   valaddr_reg:x3; val_offset:36*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f13, f12, f14, dyn, 96, 0, x3, 36*FLEN/8, x4, x1, x2)

inst_19:// rs1==f13, rs2==f11, rd==f12,fs1 == 0 and fe1 == 0x0c and fm1 == 0x2eb and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2eb and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f13; op2:f11; dest:f12; op1val:0x32eb; op2val:0xb2eb; 
   valaddr_reg:x3; val_offset:38*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f12, f13, f11, dyn, 128, 0, x3, 38*FLEN/8, x4, x1, x2)

inst_20:// rs1==f10, rs2==f12, rd==f11,fs1 == 0 and fe1 == 0x0e and fm1 == 0x02f and fs2 == 1 and fe2 == 0x0e and fm2 == 0x02f and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f10; op2:f12; dest:f11; op1val:0x382f; op2val:0xb82f; 
   valaddr_reg:x3; val_offset:40*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f11, f10, f12, dyn, 0, 0, x3, 40*FLEN/8, x4, x1, x2)

inst_21:// rs1==f11, rs2==f9, rd==f10,fs1 == 0 and fe1 == 0x0e and fm1 == 0x02f and fs2 == 1 and fe2 == 0x0e and fm2 == 0x02f and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f11; op2:f9; dest:f10; op1val:0x382f; op2val:0xb82f; 
   valaddr_reg:x3; val_offset:42*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f10, f11, f9, dyn, 32, 0, x3, 42*FLEN/8, x4, x1, x2)

inst_22:// rs1==f8, rs2==f10, rd==f9,fs1 == 0 and fe1 == 0x0e and fm1 == 0x02f and fs2 == 1 and fe2 == 0x0e and fm2 == 0x02f and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f8; op2:f10; dest:f9; op1val:0x382f; op2val:0xb82f; 
   valaddr_reg:x3; val_offset:44*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f9, f8, f10, dyn, 64, 0, x3, 44*FLEN/8, x4, x1, x2)

inst_23:// rs1==f9, rs2==f7, rd==f8,fs1 == 0 and fe1 == 0x0e and fm1 == 0x02f and fs2 == 1 and fe2 == 0x0e and fm2 == 0x02f and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f9; op2:f7; dest:f8; op1val:0x382f; op2val:0xb82f; 
   valaddr_reg:x3; val_offset:46*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f8, f9, f7, dyn, 96, 0, x3, 46*FLEN/8, x4, x1, x2)

inst_24:// rs1==f6, rs2==f8, rd==f7,fs1 == 0 and fe1 == 0x0e and fm1 == 0x02f and fs2 == 1 and fe2 == 0x0e and fm2 == 0x02f and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f6; op2:f8; dest:f7; op1val:0x382f; op2val:0xb82f; 
   valaddr_reg:x3; val_offset:48*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f7, f6, f8, dyn, 128, 0, x3, 48*FLEN/8, x4, x1, x2)

inst_25:// rs1==f7, rs2==f5, rd==f6,fs1 == 0 and fe1 == 0x0b and fm1 == 0x1e1 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x1e1 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f7; op2:f5; dest:f6; op1val:0x2de1; op2val:0xade1; 
   valaddr_reg:x3; val_offset:50*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f6, f7, f5, dyn, 0, 0, x3, 50*FLEN/8, x4, x1, x2)

inst_26:// rs1==f4, rs2==f6, rd==f5,fs1 == 0 and fe1 == 0x0b and fm1 == 0x1e1 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x1e1 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f4; op2:f6; dest:f5; op1val:0x2de1; op2val:0xade1; 
   valaddr_reg:x3; val_offset:52*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f5, f4, f6, dyn, 32, 0, x3, 52*FLEN/8, x4, x1, x2)

inst_27:// rs1==f5, rs2==f3, rd==f4,fs1 == 0 and fe1 == 0x0b and fm1 == 0x1e1 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x1e1 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f5; op2:f3; dest:f4; op1val:0x2de1; op2val:0xade1; 
   valaddr_reg:x3; val_offset:54*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f4, f5, f3, dyn, 64, 0, x3, 54*FLEN/8, x4, x1, x2)

inst_28:// rs1==f2, rs2==f4, rd==f3,fs1 == 0 and fe1 == 0x0b and fm1 == 0x1e1 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x1e1 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f2; op2:f4; dest:f3; op1val:0x2de1; op2val:0xade1; 
   valaddr_reg:x3; val_offset:56*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f3, f2, f4, dyn, 96, 0, x3, 56*FLEN/8, x4, x1, x2)

inst_29:// rs1==f3, rs2==f1, rd==f2,fs1 == 0 and fe1 == 0x0b and fm1 == 0x1e1 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x1e1 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f3; op2:f1; dest:f2; op1val:0x2de1; op2val:0xade1; 
   valaddr_reg:x3; val_offset:58*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f2, f3, f1, dyn, 128, 0, x3, 58*FLEN/8, x4, x1, x2)

inst_30:// rs1==f0, rs2==f2, rd==f1,fs1 == 0 and fe1 == 0x0e and fm1 == 0x1be and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1be and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f0; op2:f2; dest:f1; op1val:0x39be; op2val:0xb9be; 
   valaddr_reg:x3; val_offset:60*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f1, f0, f2, dyn, 0, 0, x3, 60*FLEN/8, x4, x1, x2)

inst_31:// rs1==f1,fs1 == 0 and fe1 == 0x0e and fm1 == 0x1be and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1be and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f1; op2:f30; dest:f31; op1val:0x39be; op2val:0xb9be; 
   valaddr_reg:x3; val_offset:62*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f1, f30, dyn, 32, 0, x3, 62*FLEN/8, x4, x1, x2)

inst_32:// rs2==f0,fs1 == 0 and fe1 == 0x0e and fm1 == 0x1be and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1be and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f0; dest:f31; op1val:0x39be; op2val:0xb9be; 
   valaddr_reg:x3; val_offset:64*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f0, dyn, 64, 0, x3, 64*FLEN/8, x4, x1, x2)

inst_33:// rd==f0,fs1 == 0 and fe1 == 0x0e and fm1 == 0x1be and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1be and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f31; op2:f30; dest:f0; op1val:0x39be; op2val:0xb9be; 
   valaddr_reg:x3; val_offset:66*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f0, f31, f30, dyn, 96, 0, x3, 66*FLEN/8, x4, x1, x2)

inst_34:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1be and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1be and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39be; op2val:0xb9be; 
   valaddr_reg:x3; val_offset:68*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 68*FLEN/8, x4, x1, x2)

inst_35:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x21b and fs2 == 1 and fe2 == 0x0d and fm2 == 0x21b and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x361b; op2val:0xb61b; 
   valaddr_reg:x3; val_offset:70*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 70*FLEN/8, x4, x1, x2)

inst_36:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x21b and fs2 == 1 and fe2 == 0x0d and fm2 == 0x21b and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x361b; op2val:0xb61b; 
   valaddr_reg:x3; val_offset:72*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 72*FLEN/8, x4, x1, x2)

inst_37:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x21b and fs2 == 1 and fe2 == 0x0d and fm2 == 0x21b and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x361b; op2val:0xb61b; 
   valaddr_reg:x3; val_offset:74*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 74*FLEN/8, x4, x1, x2)

inst_38:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x21b and fs2 == 1 and fe2 == 0x0d and fm2 == 0x21b and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x361b; op2val:0xb61b; 
   valaddr_reg:x3; val_offset:76*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 76*FLEN/8, x4, x1, x2)

inst_39:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x21b and fs2 == 1 and fe2 == 0x0d and fm2 == 0x21b and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x361b; op2val:0xb61b; 
   valaddr_reg:x3; val_offset:78*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 78*FLEN/8, x4, x1, x2)

inst_40:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x1c6 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x1c6 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2dc6; op2val:0xadc6; 
   valaddr_reg:x3; val_offset:80*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 80*FLEN/8, x4, x1, x2)

inst_41:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x1c6 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x1c6 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2dc6; op2val:0xadc6; 
   valaddr_reg:x3; val_offset:82*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 82*FLEN/8, x4, x1, x2)

inst_42:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x1c6 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x1c6 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2dc6; op2val:0xadc6; 
   valaddr_reg:x3; val_offset:84*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 84*FLEN/8, x4, x1, x2)

inst_43:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x1c6 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x1c6 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2dc6; op2val:0xadc6; 
   valaddr_reg:x3; val_offset:86*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 86*FLEN/8, x4, x1, x2)

inst_44:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x1c6 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x1c6 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2dc6; op2val:0xadc6; 
   valaddr_reg:x3; val_offset:88*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 88*FLEN/8, x4, x1, x2)

inst_45:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x212 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x212 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3212; op2val:0xb212; 
   valaddr_reg:x3; val_offset:90*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 90*FLEN/8, x4, x1, x2)

inst_46:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x212 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x212 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3212; op2val:0xb212; 
   valaddr_reg:x3; val_offset:92*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 92*FLEN/8, x4, x1, x2)

inst_47:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x212 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x212 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3212; op2val:0xb212; 
   valaddr_reg:x3; val_offset:94*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 94*FLEN/8, x4, x1, x2)

inst_48:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x212 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x212 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3212; op2val:0xb212; 
   valaddr_reg:x3; val_offset:96*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 96*FLEN/8, x4, x1, x2)

inst_49:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x212 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x212 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3212; op2val:0xb212; 
   valaddr_reg:x3; val_offset:98*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 98*FLEN/8, x4, x1, x2)

inst_50:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x184 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x184 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3984; op2val:0xb984; 
   valaddr_reg:x3; val_offset:100*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 100*FLEN/8, x4, x1, x2)

inst_51:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x184 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x184 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3984; op2val:0xb984; 
   valaddr_reg:x3; val_offset:102*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 102*FLEN/8, x4, x1, x2)

inst_52:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x184 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x184 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3984; op2val:0xb984; 
   valaddr_reg:x3; val_offset:104*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 104*FLEN/8, x4, x1, x2)

inst_53:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x184 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x184 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3984; op2val:0xb984; 
   valaddr_reg:x3; val_offset:106*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 106*FLEN/8, x4, x1, x2)

inst_54:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x184 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x184 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3984; op2val:0xb984; 
   valaddr_reg:x3; val_offset:108*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 108*FLEN/8, x4, x1, x2)

inst_55:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x279 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x279 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2e79; op2val:0xae79; 
   valaddr_reg:x3; val_offset:110*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 110*FLEN/8, x4, x1, x2)

inst_56:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x279 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x279 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2e79; op2val:0xae79; 
   valaddr_reg:x3; val_offset:112*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 112*FLEN/8, x4, x1, x2)

inst_57:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x279 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x279 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2e79; op2val:0xae79; 
   valaddr_reg:x3; val_offset:114*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 114*FLEN/8, x4, x1, x2)

inst_58:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x279 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x279 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2e79; op2val:0xae79; 
   valaddr_reg:x3; val_offset:116*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 116*FLEN/8, x4, x1, x2)

inst_59:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x279 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x279 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2e79; op2val:0xae79; 
   valaddr_reg:x3; val_offset:118*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 118*FLEN/8, x4, x1, x2)

inst_60:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x039 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x039 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3839; op2val:0xb839; 
   valaddr_reg:x3; val_offset:120*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 120*FLEN/8, x4, x1, x2)

inst_61:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x039 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x039 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3839; op2val:0xb839; 
   valaddr_reg:x3; val_offset:122*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 122*FLEN/8, x4, x1, x2)

inst_62:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x039 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x039 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3839; op2val:0xb839; 
   valaddr_reg:x3; val_offset:124*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 124*FLEN/8, x4, x1, x2)

inst_63:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x039 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x039 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3839; op2val:0xb839; 
   valaddr_reg:x3; val_offset:126*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 126*FLEN/8, x4, x1, x2)

inst_64:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x039 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x039 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3839; op2val:0xb839; 
   valaddr_reg:x3; val_offset:128*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 128*FLEN/8, x4, x1, x2)

inst_65:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x086 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x086 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3886; op2val:0xb886; 
   valaddr_reg:x3; val_offset:130*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 130*FLEN/8, x4, x1, x2)

inst_66:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x086 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x086 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3886; op2val:0xb886; 
   valaddr_reg:x3; val_offset:132*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 132*FLEN/8, x4, x1, x2)

inst_67:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x086 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x086 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3886; op2val:0xb886; 
   valaddr_reg:x3; val_offset:134*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 134*FLEN/8, x4, x1, x2)

inst_68:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x086 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x086 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3886; op2val:0xb886; 
   valaddr_reg:x3; val_offset:136*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 136*FLEN/8, x4, x1, x2)

inst_69:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x086 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x086 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3886; op2val:0xb886; 
   valaddr_reg:x3; val_offset:138*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 138*FLEN/8, x4, x1, x2)

inst_70:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x191 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x191 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2d91; op2val:0xad91; 
   valaddr_reg:x3; val_offset:140*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 140*FLEN/8, x4, x1, x2)

inst_71:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x191 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x191 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2d91; op2val:0xad91; 
   valaddr_reg:x3; val_offset:142*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 142*FLEN/8, x4, x1, x2)

inst_72:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x191 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x191 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2d91; op2val:0xad91; 
   valaddr_reg:x3; val_offset:144*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 144*FLEN/8, x4, x1, x2)

inst_73:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x191 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x191 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2d91; op2val:0xad91; 
   valaddr_reg:x3; val_offset:146*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 146*FLEN/8, x4, x1, x2)

inst_74:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x191 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x191 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2d91; op2val:0xad91; 
   valaddr_reg:x3; val_offset:148*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 148*FLEN/8, x4, x1, x2)

inst_75:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1ea and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1ea and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39ea; op2val:0xb9ea; 
   valaddr_reg:x3; val_offset:150*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 150*FLEN/8, x4, x1, x2)

inst_76:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1ea and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1ea and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39ea; op2val:0xb9ea; 
   valaddr_reg:x3; val_offset:152*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 152*FLEN/8, x4, x1, x2)

inst_77:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1ea and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1ea and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39ea; op2val:0xb9ea; 
   valaddr_reg:x3; val_offset:154*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 154*FLEN/8, x4, x1, x2)

inst_78:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1ea and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1ea and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39ea; op2val:0xb9ea; 
   valaddr_reg:x3; val_offset:156*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 156*FLEN/8, x4, x1, x2)

inst_79:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1ea and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1ea and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39ea; op2val:0xb9ea; 
   valaddr_reg:x3; val_offset:158*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 158*FLEN/8, x4, x1, x2)

inst_80:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x338 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x338 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3738; op2val:0xb738; 
   valaddr_reg:x3; val_offset:160*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 160*FLEN/8, x4, x1, x2)

inst_81:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x338 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x338 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3738; op2val:0xb738; 
   valaddr_reg:x3; val_offset:162*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 162*FLEN/8, x4, x1, x2)

inst_82:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x338 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x338 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3738; op2val:0xb738; 
   valaddr_reg:x3; val_offset:164*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 164*FLEN/8, x4, x1, x2)

inst_83:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x338 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x338 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3738; op2val:0xb738; 
   valaddr_reg:x3; val_offset:166*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 166*FLEN/8, x4, x1, x2)

inst_84:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x338 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x338 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3738; op2val:0xb738; 
   valaddr_reg:x3; val_offset:168*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 168*FLEN/8, x4, x1, x2)

inst_85:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x07c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x07c and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x347c; op2val:0xb47c; 
   valaddr_reg:x3; val_offset:170*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 170*FLEN/8, x4, x1, x2)

inst_86:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x07c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x07c and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x347c; op2val:0xb47c; 
   valaddr_reg:x3; val_offset:172*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 172*FLEN/8, x4, x1, x2)

inst_87:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x07c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x07c and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x347c; op2val:0xb47c; 
   valaddr_reg:x3; val_offset:174*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 174*FLEN/8, x4, x1, x2)

inst_88:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x07c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x07c and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x347c; op2val:0xb47c; 
   valaddr_reg:x3; val_offset:176*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 176*FLEN/8, x4, x1, x2)

inst_89:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x07c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x07c and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x347c; op2val:0xb47c; 
   valaddr_reg:x3; val_offset:178*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 178*FLEN/8, x4, x1, x2)

inst_90:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x19a and fs2 == 1 and fe2 == 0x0c and fm2 == 0x19a and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x319a; op2val:0xb19a; 
   valaddr_reg:x3; val_offset:180*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 180*FLEN/8, x4, x1, x2)

inst_91:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x19a and fs2 == 1 and fe2 == 0x0c and fm2 == 0x19a and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x319a; op2val:0xb19a; 
   valaddr_reg:x3; val_offset:182*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 182*FLEN/8, x4, x1, x2)

inst_92:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x19a and fs2 == 1 and fe2 == 0x0c and fm2 == 0x19a and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x319a; op2val:0xb19a; 
   valaddr_reg:x3; val_offset:184*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 184*FLEN/8, x4, x1, x2)

inst_93:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x19a and fs2 == 1 and fe2 == 0x0c and fm2 == 0x19a and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x319a; op2val:0xb19a; 
   valaddr_reg:x3; val_offset:186*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 186*FLEN/8, x4, x1, x2)

inst_94:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x19a and fs2 == 1 and fe2 == 0x0c and fm2 == 0x19a and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x319a; op2val:0xb19a; 
   valaddr_reg:x3; val_offset:188*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 188*FLEN/8, x4, x1, x2)

inst_95:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3fd and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3fd and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bfd; op2val:0xbbfd; 
   valaddr_reg:x3; val_offset:190*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 190*FLEN/8, x4, x1, x2)

inst_96:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3fd and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3fd and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bfd; op2val:0xbbfd; 
   valaddr_reg:x3; val_offset:192*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 192*FLEN/8, x4, x1, x2)

inst_97:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3fd and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3fd and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bfd; op2val:0xbbfd; 
   valaddr_reg:x3; val_offset:194*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 194*FLEN/8, x4, x1, x2)

inst_98:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3fd and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3fd and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bfd; op2val:0xbbfd; 
   valaddr_reg:x3; val_offset:196*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 196*FLEN/8, x4, x1, x2)

inst_99:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3fd and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3fd and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bfd; op2val:0xbbfd; 
   valaddr_reg:x3; val_offset:198*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 198*FLEN/8, x4, x1, x2)

inst_100:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x03c and fs2 == 1 and fe2 == 0x0c and fm2 == 0x03c and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x303c; op2val:0xb03c; 
   valaddr_reg:x3; val_offset:200*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 200*FLEN/8, x4, x1, x2)

inst_101:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x03c and fs2 == 1 and fe2 == 0x0c and fm2 == 0x03c and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x303c; op2val:0xb03c; 
   valaddr_reg:x3; val_offset:202*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 202*FLEN/8, x4, x1, x2)

inst_102:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x03c and fs2 == 1 and fe2 == 0x0c and fm2 == 0x03c and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x303c; op2val:0xb03c; 
   valaddr_reg:x3; val_offset:204*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 204*FLEN/8, x4, x1, x2)

inst_103:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x03c and fs2 == 1 and fe2 == 0x0c and fm2 == 0x03c and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x303c; op2val:0xb03c; 
   valaddr_reg:x3; val_offset:206*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 206*FLEN/8, x4, x1, x2)

inst_104:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x03c and fs2 == 1 and fe2 == 0x0c and fm2 == 0x03c and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x303c; op2val:0xb03c; 
   valaddr_reg:x3; val_offset:208*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 208*FLEN/8, x4, x1, x2)

inst_105:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x165 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x165 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3965; op2val:0xb965; 
   valaddr_reg:x3; val_offset:210*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 210*FLEN/8, x4, x1, x2)

inst_106:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x165 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x165 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3965; op2val:0xb965; 
   valaddr_reg:x3; val_offset:212*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 212*FLEN/8, x4, x1, x2)

inst_107:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x165 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x165 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3965; op2val:0xb965; 
   valaddr_reg:x3; val_offset:214*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 214*FLEN/8, x4, x1, x2)

inst_108:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x165 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x165 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3965; op2val:0xb965; 
   valaddr_reg:x3; val_offset:216*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 216*FLEN/8, x4, x1, x2)

inst_109:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x165 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x165 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3965; op2val:0xb965; 
   valaddr_reg:x3; val_offset:218*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 218*FLEN/8, x4, x1, x2)

inst_110:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x278 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x278 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a78; op2val:0xba78; 
   valaddr_reg:x3; val_offset:220*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 220*FLEN/8, x4, x1, x2)

inst_111:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x278 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x278 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a78; op2val:0xba78; 
   valaddr_reg:x3; val_offset:222*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 222*FLEN/8, x4, x1, x2)

inst_112:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x278 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x278 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a78; op2val:0xba78; 
   valaddr_reg:x3; val_offset:224*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 224*FLEN/8, x4, x1, x2)

inst_113:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x278 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x278 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a78; op2val:0xba78; 
   valaddr_reg:x3; val_offset:226*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 226*FLEN/8, x4, x1, x2)

inst_114:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x278 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x278 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a78; op2val:0xba78; 
   valaddr_reg:x3; val_offset:228*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 228*FLEN/8, x4, x1, x2)

inst_115:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x217 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x217 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a17; op2val:0xba17; 
   valaddr_reg:x3; val_offset:230*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 230*FLEN/8, x4, x1, x2)

inst_116:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x217 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x217 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a17; op2val:0xba17; 
   valaddr_reg:x3; val_offset:232*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 232*FLEN/8, x4, x1, x2)

inst_117:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x217 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x217 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a17; op2val:0xba17; 
   valaddr_reg:x3; val_offset:234*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 234*FLEN/8, x4, x1, x2)

inst_118:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x217 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x217 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a17; op2val:0xba17; 
   valaddr_reg:x3; val_offset:236*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 236*FLEN/8, x4, x1, x2)

inst_119:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x217 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x217 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a17; op2val:0xba17; 
   valaddr_reg:x3; val_offset:238*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 238*FLEN/8, x4, x1, x2)

inst_120:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x24c and fs2 == 1 and fe2 == 0x0c and fm2 == 0x24c and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x324c; op2val:0xb24c; 
   valaddr_reg:x3; val_offset:240*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 240*FLEN/8, x4, x1, x2)

inst_121:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x24c and fs2 == 1 and fe2 == 0x0c and fm2 == 0x24c and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x324c; op2val:0xb24c; 
   valaddr_reg:x3; val_offset:242*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 242*FLEN/8, x4, x1, x2)

inst_122:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x24c and fs2 == 1 and fe2 == 0x0c and fm2 == 0x24c and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x324c; op2val:0xb24c; 
   valaddr_reg:x3; val_offset:244*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 244*FLEN/8, x4, x1, x2)

inst_123:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x24c and fs2 == 1 and fe2 == 0x0c and fm2 == 0x24c and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x324c; op2val:0xb24c; 
   valaddr_reg:x3; val_offset:246*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 246*FLEN/8, x4, x1, x2)

inst_124:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x24c and fs2 == 1 and fe2 == 0x0c and fm2 == 0x24c and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x324c; op2val:0xb24c; 
   valaddr_reg:x3; val_offset:248*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 248*FLEN/8, x4, x1, x2)

inst_125:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x35b and fs2 == 1 and fe2 == 0x0e and fm2 == 0x35b and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b5b; op2val:0xbb5b; 
   valaddr_reg:x3; val_offset:250*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 250*FLEN/8, x4, x1, x2)

inst_126:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x35b and fs2 == 1 and fe2 == 0x0e and fm2 == 0x35b and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b5b; op2val:0xbb5b; 
   valaddr_reg:x3; val_offset:252*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 252*FLEN/8, x4, x1, x2)

inst_127:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x35b and fs2 == 1 and fe2 == 0x0e and fm2 == 0x35b and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b5b; op2val:0xbb5b; 
   valaddr_reg:x3; val_offset:254*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 254*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_2)

inst_128:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x35b and fs2 == 1 and fe2 == 0x0e and fm2 == 0x35b and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b5b; op2val:0xbb5b; 
   valaddr_reg:x3; val_offset:256*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 256*FLEN/8, x4, x1, x2)

inst_129:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x35b and fs2 == 1 and fe2 == 0x0e and fm2 == 0x35b and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b5b; op2val:0xbb5b; 
   valaddr_reg:x3; val_offset:258*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 258*FLEN/8, x4, x1, x2)

inst_130:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3df and fs2 == 1 and fe2 == 0x0d and fm2 == 0x3df and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37df; op2val:0xb7df; 
   valaddr_reg:x3; val_offset:260*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 260*FLEN/8, x4, x1, x2)

inst_131:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3df and fs2 == 1 and fe2 == 0x0d and fm2 == 0x3df and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37df; op2val:0xb7df; 
   valaddr_reg:x3; val_offset:262*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 262*FLEN/8, x4, x1, x2)

inst_132:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3df and fs2 == 1 and fe2 == 0x0d and fm2 == 0x3df and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37df; op2val:0xb7df; 
   valaddr_reg:x3; val_offset:264*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 264*FLEN/8, x4, x1, x2)

inst_133:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3df and fs2 == 1 and fe2 == 0x0d and fm2 == 0x3df and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37df; op2val:0xb7df; 
   valaddr_reg:x3; val_offset:266*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 266*FLEN/8, x4, x1, x2)

inst_134:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3df and fs2 == 1 and fe2 == 0x0d and fm2 == 0x3df and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37df; op2val:0xb7df; 
   valaddr_reg:x3; val_offset:268*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 268*FLEN/8, x4, x1, x2)

inst_135:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x320 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x320 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b20; op2val:0xbb20; 
   valaddr_reg:x3; val_offset:270*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 270*FLEN/8, x4, x1, x2)

inst_136:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x320 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x320 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b20; op2val:0xbb20; 
   valaddr_reg:x3; val_offset:272*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 272*FLEN/8, x4, x1, x2)

inst_137:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x320 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x320 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b20; op2val:0xbb20; 
   valaddr_reg:x3; val_offset:274*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 274*FLEN/8, x4, x1, x2)

inst_138:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x320 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x320 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b20; op2val:0xbb20; 
   valaddr_reg:x3; val_offset:276*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 276*FLEN/8, x4, x1, x2)

inst_139:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x320 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x320 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b20; op2val:0xbb20; 
   valaddr_reg:x3; val_offset:278*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 278*FLEN/8, x4, x1, x2)

inst_140:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0b1 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0b1 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x34b1; op2val:0xb4b1; 
   valaddr_reg:x3; val_offset:280*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 280*FLEN/8, x4, x1, x2)

inst_141:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0b1 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0b1 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x34b1; op2val:0xb4b1; 
   valaddr_reg:x3; val_offset:282*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 282*FLEN/8, x4, x1, x2)

inst_142:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0b1 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0b1 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x34b1; op2val:0xb4b1; 
   valaddr_reg:x3; val_offset:284*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 284*FLEN/8, x4, x1, x2)

inst_143:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0b1 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0b1 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x34b1; op2val:0xb4b1; 
   valaddr_reg:x3; val_offset:286*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 286*FLEN/8, x4, x1, x2)

inst_144:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0b1 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0b1 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x34b1; op2val:0xb4b1; 
   valaddr_reg:x3; val_offset:288*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 288*FLEN/8, x4, x1, x2)

inst_145:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x1ef and fs2 == 1 and fe2 == 0x0c and fm2 == 0x1ef and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x31ef; op2val:0xb1ef; 
   valaddr_reg:x3; val_offset:290*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 290*FLEN/8, x4, x1, x2)

inst_146:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x1ef and fs2 == 1 and fe2 == 0x0c and fm2 == 0x1ef and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x31ef; op2val:0xb1ef; 
   valaddr_reg:x3; val_offset:292*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 292*FLEN/8, x4, x1, x2)

inst_147:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x1ef and fs2 == 1 and fe2 == 0x0c and fm2 == 0x1ef and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x31ef; op2val:0xb1ef; 
   valaddr_reg:x3; val_offset:294*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 294*FLEN/8, x4, x1, x2)

inst_148:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x1ef and fs2 == 1 and fe2 == 0x0c and fm2 == 0x1ef and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x31ef; op2val:0xb1ef; 
   valaddr_reg:x3; val_offset:296*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 296*FLEN/8, x4, x1, x2)

inst_149:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x1ef and fs2 == 1 and fe2 == 0x0c and fm2 == 0x1ef and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x31ef; op2val:0xb1ef; 
   valaddr_reg:x3; val_offset:298*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 298*FLEN/8, x4, x1, x2)

inst_150:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x0a0 and fs2 == 1 and fe2 == 0x0a and fm2 == 0x0a0 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x28a0; op2val:0xa8a0; 
   valaddr_reg:x3; val_offset:300*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 300*FLEN/8, x4, x1, x2)

inst_151:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x0a0 and fs2 == 1 and fe2 == 0x0a and fm2 == 0x0a0 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x28a0; op2val:0xa8a0; 
   valaddr_reg:x3; val_offset:302*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 302*FLEN/8, x4, x1, x2)

inst_152:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x0a0 and fs2 == 1 and fe2 == 0x0a and fm2 == 0x0a0 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x28a0; op2val:0xa8a0; 
   valaddr_reg:x3; val_offset:304*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 304*FLEN/8, x4, x1, x2)

inst_153:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x0a0 and fs2 == 1 and fe2 == 0x0a and fm2 == 0x0a0 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x28a0; op2val:0xa8a0; 
   valaddr_reg:x3; val_offset:306*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 306*FLEN/8, x4, x1, x2)

inst_154:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x0a0 and fs2 == 1 and fe2 == 0x0a and fm2 == 0x0a0 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x28a0; op2val:0xa8a0; 
   valaddr_reg:x3; val_offset:308*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 308*FLEN/8, x4, x1, x2)

inst_155:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x299 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x299 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3699; op2val:0xb699; 
   valaddr_reg:x3; val_offset:310*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 310*FLEN/8, x4, x1, x2)

inst_156:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x299 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x299 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3699; op2val:0xb699; 
   valaddr_reg:x3; val_offset:312*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 312*FLEN/8, x4, x1, x2)

inst_157:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x299 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x299 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3699; op2val:0xb699; 
   valaddr_reg:x3; val_offset:314*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 314*FLEN/8, x4, x1, x2)

inst_158:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x299 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x299 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3699; op2val:0xb699; 
   valaddr_reg:x3; val_offset:316*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 316*FLEN/8, x4, x1, x2)

inst_159:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x299 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x299 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3699; op2val:0xb699; 
   valaddr_reg:x3; val_offset:318*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 318*FLEN/8, x4, x1, x2)

inst_160:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x275 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x275 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3675; op2val:0xb675; 
   valaddr_reg:x3; val_offset:320*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 320*FLEN/8, x4, x1, x2)

inst_161:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x275 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x275 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3675; op2val:0xb675; 
   valaddr_reg:x3; val_offset:322*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 322*FLEN/8, x4, x1, x2)

inst_162:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x275 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x275 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3675; op2val:0xb675; 
   valaddr_reg:x3; val_offset:324*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 324*FLEN/8, x4, x1, x2)

inst_163:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x275 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x275 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3675; op2val:0xb675; 
   valaddr_reg:x3; val_offset:326*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 326*FLEN/8, x4, x1, x2)

inst_164:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x275 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x275 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3675; op2val:0xb675; 
   valaddr_reg:x3; val_offset:328*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 328*FLEN/8, x4, x1, x2)

inst_165:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2ca and fs2 == 1 and fe2 == 0x0d and fm2 == 0x2ca and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36ca; op2val:0xb6ca; 
   valaddr_reg:x3; val_offset:330*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 330*FLEN/8, x4, x1, x2)

inst_166:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2ca and fs2 == 1 and fe2 == 0x0d and fm2 == 0x2ca and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36ca; op2val:0xb6ca; 
   valaddr_reg:x3; val_offset:332*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 332*FLEN/8, x4, x1, x2)

inst_167:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2ca and fs2 == 1 and fe2 == 0x0d and fm2 == 0x2ca and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36ca; op2val:0xb6ca; 
   valaddr_reg:x3; val_offset:334*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 334*FLEN/8, x4, x1, x2)

inst_168:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2ca and fs2 == 1 and fe2 == 0x0d and fm2 == 0x2ca and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36ca; op2val:0xb6ca; 
   valaddr_reg:x3; val_offset:336*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 336*FLEN/8, x4, x1, x2)

inst_169:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2ca and fs2 == 1 and fe2 == 0x0d and fm2 == 0x2ca and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36ca; op2val:0xb6ca; 
   valaddr_reg:x3; val_offset:338*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 338*FLEN/8, x4, x1, x2)

inst_170:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x27c and fs2 == 1 and fe2 == 0x0e and fm2 == 0x27c and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a7c; op2val:0xba7c; 
   valaddr_reg:x3; val_offset:340*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 340*FLEN/8, x4, x1, x2)

inst_171:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x27c and fs2 == 1 and fe2 == 0x0e and fm2 == 0x27c and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a7c; op2val:0xba7c; 
   valaddr_reg:x3; val_offset:342*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 342*FLEN/8, x4, x1, x2)

inst_172:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x27c and fs2 == 1 and fe2 == 0x0e and fm2 == 0x27c and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a7c; op2val:0xba7c; 
   valaddr_reg:x3; val_offset:344*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 344*FLEN/8, x4, x1, x2)

inst_173:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x27c and fs2 == 1 and fe2 == 0x0e and fm2 == 0x27c and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a7c; op2val:0xba7c; 
   valaddr_reg:x3; val_offset:346*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 346*FLEN/8, x4, x1, x2)

inst_174:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x27c and fs2 == 1 and fe2 == 0x0e and fm2 == 0x27c and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a7c; op2val:0xba7c; 
   valaddr_reg:x3; val_offset:348*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 348*FLEN/8, x4, x1, x2)

inst_175:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x232 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x232 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3632; op2val:0xb632; 
   valaddr_reg:x3; val_offset:350*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 350*FLEN/8, x4, x1, x2)

inst_176:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x232 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x232 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3632; op2val:0xb632; 
   valaddr_reg:x3; val_offset:352*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 352*FLEN/8, x4, x1, x2)

inst_177:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x232 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x232 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3632; op2val:0xb632; 
   valaddr_reg:x3; val_offset:354*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 354*FLEN/8, x4, x1, x2)

inst_178:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x232 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x232 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3632; op2val:0xb632; 
   valaddr_reg:x3; val_offset:356*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 356*FLEN/8, x4, x1, x2)

inst_179:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x232 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x232 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3632; op2val:0xb632; 
   valaddr_reg:x3; val_offset:358*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 358*FLEN/8, x4, x1, x2)

inst_180:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x030 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x030 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3830; op2val:0xb830; 
   valaddr_reg:x3; val_offset:360*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 360*FLEN/8, x4, x1, x2)

inst_181:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x030 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x030 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3830; op2val:0xb830; 
   valaddr_reg:x3; val_offset:362*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 362*FLEN/8, x4, x1, x2)

inst_182:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x030 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x030 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3830; op2val:0xb830; 
   valaddr_reg:x3; val_offset:364*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 364*FLEN/8, x4, x1, x2)

inst_183:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x030 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x030 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3830; op2val:0xb830; 
   valaddr_reg:x3; val_offset:366*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 366*FLEN/8, x4, x1, x2)

inst_184:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x030 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x030 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3830; op2val:0xb830; 
   valaddr_reg:x3; val_offset:368*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 368*FLEN/8, x4, x1, x2)

inst_185:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3c1 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x3c1 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x33c1; op2val:0xb3c1; 
   valaddr_reg:x3; val_offset:370*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 370*FLEN/8, x4, x1, x2)

inst_186:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3c1 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x3c1 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x33c1; op2val:0xb3c1; 
   valaddr_reg:x3; val_offset:372*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 372*FLEN/8, x4, x1, x2)

inst_187:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3c1 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x3c1 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x33c1; op2val:0xb3c1; 
   valaddr_reg:x3; val_offset:374*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 374*FLEN/8, x4, x1, x2)

inst_188:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3c1 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x3c1 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x33c1; op2val:0xb3c1; 
   valaddr_reg:x3; val_offset:376*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 376*FLEN/8, x4, x1, x2)

inst_189:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3c1 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x3c1 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x33c1; op2val:0xb3c1; 
   valaddr_reg:x3; val_offset:378*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 378*FLEN/8, x4, x1, x2)

inst_190:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x0e7 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x0e7 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2ce7; op2val:0xace7; 
   valaddr_reg:x3; val_offset:380*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 380*FLEN/8, x4, x1, x2)

inst_191:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x0e7 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x0e7 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2ce7; op2val:0xace7; 
   valaddr_reg:x3; val_offset:382*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 382*FLEN/8, x4, x1, x2)

inst_192:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x0e7 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x0e7 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2ce7; op2val:0xace7; 
   valaddr_reg:x3; val_offset:384*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 384*FLEN/8, x4, x1, x2)

inst_193:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x0e7 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x0e7 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2ce7; op2val:0xace7; 
   valaddr_reg:x3; val_offset:386*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 386*FLEN/8, x4, x1, x2)

inst_194:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x0e7 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x0e7 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2ce7; op2val:0xace7; 
   valaddr_reg:x3; val_offset:388*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 388*FLEN/8, x4, x1, x2)

inst_195:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x284 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x284 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2e84; op2val:0xae84; 
   valaddr_reg:x3; val_offset:390*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 390*FLEN/8, x4, x1, x2)

inst_196:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x284 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x284 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2e84; op2val:0xae84; 
   valaddr_reg:x3; val_offset:392*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 392*FLEN/8, x4, x1, x2)

inst_197:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x284 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x284 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2e84; op2val:0xae84; 
   valaddr_reg:x3; val_offset:394*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 394*FLEN/8, x4, x1, x2)

inst_198:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x284 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x284 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2e84; op2val:0xae84; 
   valaddr_reg:x3; val_offset:396*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 396*FLEN/8, x4, x1, x2)

inst_199:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x284 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x284 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2e84; op2val:0xae84; 
   valaddr_reg:x3; val_offset:398*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 398*FLEN/8, x4, x1, x2)

inst_200:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x359 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x359 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3759; op2val:0xb759; 
   valaddr_reg:x3; val_offset:400*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 400*FLEN/8, x4, x1, x2)

inst_201:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x359 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x359 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3759; op2val:0xb759; 
   valaddr_reg:x3; val_offset:402*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 402*FLEN/8, x4, x1, x2)

inst_202:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x359 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x359 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3759; op2val:0xb759; 
   valaddr_reg:x3; val_offset:404*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 404*FLEN/8, x4, x1, x2)

inst_203:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x359 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x359 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3759; op2val:0xb759; 
   valaddr_reg:x3; val_offset:406*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 406*FLEN/8, x4, x1, x2)

inst_204:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x359 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x359 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3759; op2val:0xb759; 
   valaddr_reg:x3; val_offset:408*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 408*FLEN/8, x4, x1, x2)

inst_205:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0b7 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0b7 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x34b7; op2val:0xb4b7; 
   valaddr_reg:x3; val_offset:410*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 410*FLEN/8, x4, x1, x2)

inst_206:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0b7 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0b7 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x34b7; op2val:0xb4b7; 
   valaddr_reg:x3; val_offset:412*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 412*FLEN/8, x4, x1, x2)

inst_207:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0b7 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0b7 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x34b7; op2val:0xb4b7; 
   valaddr_reg:x3; val_offset:414*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 414*FLEN/8, x4, x1, x2)

inst_208:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0b7 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0b7 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x34b7; op2val:0xb4b7; 
   valaddr_reg:x3; val_offset:416*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 416*FLEN/8, x4, x1, x2)

inst_209:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0b7 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0b7 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x34b7; op2val:0xb4b7; 
   valaddr_reg:x3; val_offset:418*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 418*FLEN/8, x4, x1, x2)

inst_210:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x207 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x207 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3207; op2val:0xb207; 
   valaddr_reg:x3; val_offset:420*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 420*FLEN/8, x4, x1, x2)

inst_211:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x207 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x207 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3207; op2val:0xb207; 
   valaddr_reg:x3; val_offset:422*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 422*FLEN/8, x4, x1, x2)

inst_212:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x207 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x207 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3207; op2val:0xb207; 
   valaddr_reg:x3; val_offset:424*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 424*FLEN/8, x4, x1, x2)

inst_213:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x207 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x207 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3207; op2val:0xb207; 
   valaddr_reg:x3; val_offset:426*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 426*FLEN/8, x4, x1, x2)

inst_214:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x207 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x207 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3207; op2val:0xb207; 
   valaddr_reg:x3; val_offset:428*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 428*FLEN/8, x4, x1, x2)

inst_215:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x2b8 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x2b7 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2eb8; op2val:0xaeb7; 
   valaddr_reg:x3; val_offset:430*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 430*FLEN/8, x4, x1, x2)

inst_216:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x2b8 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x2b7 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2eb8; op2val:0xaeb7; 
   valaddr_reg:x3; val_offset:432*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 432*FLEN/8, x4, x1, x2)

inst_217:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x2b8 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x2b7 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2eb8; op2val:0xaeb7; 
   valaddr_reg:x3; val_offset:434*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 434*FLEN/8, x4, x1, x2)

inst_218:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x2b8 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x2b7 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2eb8; op2val:0xaeb7; 
   valaddr_reg:x3; val_offset:436*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 436*FLEN/8, x4, x1, x2)

inst_219:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x2b8 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x2b7 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2eb8; op2val:0xaeb7; 
   valaddr_reg:x3; val_offset:438*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 438*FLEN/8, x4, x1, x2)

inst_220:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x270 and fs2 == 1 and fe2 == 0x0a and fm2 == 0x26e and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2a70; op2val:0xaa6e; 
   valaddr_reg:x3; val_offset:440*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 440*FLEN/8, x4, x1, x2)

inst_221:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x270 and fs2 == 1 and fe2 == 0x0a and fm2 == 0x26e and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2a70; op2val:0xaa6e; 
   valaddr_reg:x3; val_offset:442*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 442*FLEN/8, x4, x1, x2)

inst_222:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x270 and fs2 == 1 and fe2 == 0x0a and fm2 == 0x26e and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2a70; op2val:0xaa6e; 
   valaddr_reg:x3; val_offset:444*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 444*FLEN/8, x4, x1, x2)

inst_223:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x270 and fs2 == 1 and fe2 == 0x0a and fm2 == 0x26e and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2a70; op2val:0xaa6e; 
   valaddr_reg:x3; val_offset:446*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 446*FLEN/8, x4, x1, x2)

inst_224:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x270 and fs2 == 1 and fe2 == 0x0a and fm2 == 0x26e and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2a70; op2val:0xaa6e; 
   valaddr_reg:x3; val_offset:448*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 448*FLEN/8, x4, x1, x2)

inst_225:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x065 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x065 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3865; op2val:0xb865; 
   valaddr_reg:x3; val_offset:450*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 450*FLEN/8, x4, x1, x2)

inst_226:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x065 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x065 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3865; op2val:0xb865; 
   valaddr_reg:x3; val_offset:452*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 452*FLEN/8, x4, x1, x2)

inst_227:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x065 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x065 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3865; op2val:0xb865; 
   valaddr_reg:x3; val_offset:454*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 454*FLEN/8, x4, x1, x2)

inst_228:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x065 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x065 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3865; op2val:0xb865; 
   valaddr_reg:x3; val_offset:456*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 456*FLEN/8, x4, x1, x2)

inst_229:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x065 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x065 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3865; op2val:0xb865; 
   valaddr_reg:x3; val_offset:458*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 458*FLEN/8, x4, x1, x2)

inst_230:// fs1 == 0 and fe1 == 0x06 and fm1 == 0x3c9 and fs2 == 1 and fe2 == 0x06 and fm2 == 0x3a9 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x1bc9; op2val:0x9ba9; 
   valaddr_reg:x3; val_offset:460*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 460*FLEN/8, x4, x1, x2)

inst_231:// fs1 == 0 and fe1 == 0x06 and fm1 == 0x3c9 and fs2 == 1 and fe2 == 0x06 and fm2 == 0x3a9 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x1bc9; op2val:0x9ba9; 
   valaddr_reg:x3; val_offset:462*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 462*FLEN/8, x4, x1, x2)

inst_232:// fs1 == 0 and fe1 == 0x06 and fm1 == 0x3c9 and fs2 == 1 and fe2 == 0x06 and fm2 == 0x3a9 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x1bc9; op2val:0x9ba9; 
   valaddr_reg:x3; val_offset:464*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 464*FLEN/8, x4, x1, x2)

inst_233:// fs1 == 0 and fe1 == 0x06 and fm1 == 0x3c9 and fs2 == 1 and fe2 == 0x06 and fm2 == 0x3a9 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x1bc9; op2val:0x9ba9; 
   valaddr_reg:x3; val_offset:466*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 466*FLEN/8, x4, x1, x2)

inst_234:// fs1 == 0 and fe1 == 0x06 and fm1 == 0x3c9 and fs2 == 1 and fe2 == 0x06 and fm2 == 0x3a9 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x1bc9; op2val:0x9ba9; 
   valaddr_reg:x3; val_offset:468*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 468*FLEN/8, x4, x1, x2)

inst_235:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x29d and fs2 == 1 and fe2 == 0x0c and fm2 == 0x29c and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x329d; op2val:0xb29c; 
   valaddr_reg:x3; val_offset:470*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 470*FLEN/8, x4, x1, x2)

inst_236:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x29d and fs2 == 1 and fe2 == 0x0c and fm2 == 0x29c and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x329d; op2val:0xb29c; 
   valaddr_reg:x3; val_offset:472*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 472*FLEN/8, x4, x1, x2)

inst_237:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x29d and fs2 == 1 and fe2 == 0x0c and fm2 == 0x29c and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x329d; op2val:0xb29c; 
   valaddr_reg:x3; val_offset:474*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 474*FLEN/8, x4, x1, x2)

inst_238:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x29d and fs2 == 1 and fe2 == 0x0c and fm2 == 0x29c and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x329d; op2val:0xb29c; 
   valaddr_reg:x3; val_offset:476*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 476*FLEN/8, x4, x1, x2)

inst_239:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x29d and fs2 == 1 and fe2 == 0x0c and fm2 == 0x29c and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x329d; op2val:0xb29c; 
   valaddr_reg:x3; val_offset:478*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 478*FLEN/8, x4, x1, x2)

inst_240:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x232 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x231 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3632; op2val:0xb631; 
   valaddr_reg:x3; val_offset:480*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 480*FLEN/8, x4, x1, x2)

inst_241:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x232 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x231 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3632; op2val:0xb631; 
   valaddr_reg:x3; val_offset:482*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 482*FLEN/8, x4, x1, x2)

inst_242:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x232 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x231 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3632; op2val:0xb631; 
   valaddr_reg:x3; val_offset:484*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 484*FLEN/8, x4, x1, x2)

inst_243:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x232 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x231 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3632; op2val:0xb631; 
   valaddr_reg:x3; val_offset:486*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 486*FLEN/8, x4, x1, x2)

inst_244:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x232 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x231 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3632; op2val:0xb631; 
   valaddr_reg:x3; val_offset:488*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 488*FLEN/8, x4, x1, x2)

inst_245:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1eb and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1ea and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35eb; op2val:0xb5ea; 
   valaddr_reg:x3; val_offset:490*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 490*FLEN/8, x4, x1, x2)

inst_246:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1eb and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1ea and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35eb; op2val:0xb5ea; 
   valaddr_reg:x3; val_offset:492*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 492*FLEN/8, x4, x1, x2)

inst_247:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1eb and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1ea and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35eb; op2val:0xb5ea; 
   valaddr_reg:x3; val_offset:494*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 494*FLEN/8, x4, x1, x2)

inst_248:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1eb and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1ea and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35eb; op2val:0xb5ea; 
   valaddr_reg:x3; val_offset:496*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 496*FLEN/8, x4, x1, x2)

inst_249:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1eb and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1ea and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35eb; op2val:0xb5ea; 
   valaddr_reg:x3; val_offset:498*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 498*FLEN/8, x4, x1, x2)

inst_250:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x20e and fs2 == 1 and fe2 == 0x0e and fm2 == 0x20e and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a0e; op2val:0xba0e; 
   valaddr_reg:x3; val_offset:500*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 500*FLEN/8, x4, x1, x2)

inst_251:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x20e and fs2 == 1 and fe2 == 0x0e and fm2 == 0x20e and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a0e; op2val:0xba0e; 
   valaddr_reg:x3; val_offset:502*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 502*FLEN/8, x4, x1, x2)

inst_252:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x20e and fs2 == 1 and fe2 == 0x0e and fm2 == 0x20e and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a0e; op2val:0xba0e; 
   valaddr_reg:x3; val_offset:504*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 504*FLEN/8, x4, x1, x2)

inst_253:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x20e and fs2 == 1 and fe2 == 0x0e and fm2 == 0x20e and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a0e; op2val:0xba0e; 
   valaddr_reg:x3; val_offset:506*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 506*FLEN/8, x4, x1, x2)

inst_254:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x20e and fs2 == 1 and fe2 == 0x0e and fm2 == 0x20e and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a0e; op2val:0xba0e; 
   valaddr_reg:x3; val_offset:508*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 508*FLEN/8, x4, x1, x2)

inst_255:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x310 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x30f and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b10; op2val:0xbb0f; 
   valaddr_reg:x3; val_offset:510*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 510*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_3)

inst_256:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x310 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x30f and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b10; op2val:0xbb0f; 
   valaddr_reg:x3; val_offset:512*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 512*FLEN/8, x4, x1, x2)

inst_257:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x310 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x30f and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b10; op2val:0xbb0f; 
   valaddr_reg:x3; val_offset:514*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 514*FLEN/8, x4, x1, x2)

inst_258:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x310 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x30f and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b10; op2val:0xbb0f; 
   valaddr_reg:x3; val_offset:516*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 516*FLEN/8, x4, x1, x2)

inst_259:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x310 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x30f and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b10; op2val:0xbb0f; 
   valaddr_reg:x3; val_offset:518*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 518*FLEN/8, x4, x1, x2)

inst_260:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x293 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x292 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3293; op2val:0xb292; 
   valaddr_reg:x3; val_offset:520*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 520*FLEN/8, x4, x1, x2)

inst_261:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x293 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x292 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3293; op2val:0xb292; 
   valaddr_reg:x3; val_offset:522*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 522*FLEN/8, x4, x1, x2)

inst_262:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x293 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x292 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3293; op2val:0xb292; 
   valaddr_reg:x3; val_offset:524*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 524*FLEN/8, x4, x1, x2)

inst_263:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x293 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x292 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3293; op2val:0xb292; 
   valaddr_reg:x3; val_offset:526*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 526*FLEN/8, x4, x1, x2)

inst_264:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x293 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x292 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3293; op2val:0xb292; 
   valaddr_reg:x3; val_offset:528*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 528*FLEN/8, x4, x1, x2)

inst_265:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x1e4 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x1e3 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x31e4; op2val:0xb1e3; 
   valaddr_reg:x3; val_offset:530*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 530*FLEN/8, x4, x1, x2)

inst_266:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x1e4 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x1e3 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x31e4; op2val:0xb1e3; 
   valaddr_reg:x3; val_offset:532*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 532*FLEN/8, x4, x1, x2)

inst_267:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x1e4 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x1e3 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x31e4; op2val:0xb1e3; 
   valaddr_reg:x3; val_offset:534*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 534*FLEN/8, x4, x1, x2)

inst_268:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x1e4 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x1e3 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x31e4; op2val:0xb1e3; 
   valaddr_reg:x3; val_offset:536*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 536*FLEN/8, x4, x1, x2)

inst_269:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x1e4 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x1e3 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x31e4; op2val:0xb1e3; 
   valaddr_reg:x3; val_offset:538*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 538*FLEN/8, x4, x1, x2)

inst_270:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2d4 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2d4 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3ad4; op2val:0xbad4; 
   valaddr_reg:x3; val_offset:540*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 540*FLEN/8, x4, x1, x2)

inst_271:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2d4 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2d4 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3ad4; op2val:0xbad4; 
   valaddr_reg:x3; val_offset:542*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 542*FLEN/8, x4, x1, x2)

inst_272:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2d4 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2d4 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3ad4; op2val:0xbad4; 
   valaddr_reg:x3; val_offset:544*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 544*FLEN/8, x4, x1, x2)

inst_273:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2d4 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2d4 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3ad4; op2val:0xbad4; 
   valaddr_reg:x3; val_offset:546*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 546*FLEN/8, x4, x1, x2)

inst_274:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2d4 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2d4 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3ad4; op2val:0xbad4; 
   valaddr_reg:x3; val_offset:548*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 548*FLEN/8, x4, x1, x2)

inst_275:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3a3 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3a3 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3ba3; op2val:0xbba3; 
   valaddr_reg:x3; val_offset:550*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 550*FLEN/8, x4, x1, x2)

inst_276:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3a3 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3a3 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3ba3; op2val:0xbba3; 
   valaddr_reg:x3; val_offset:552*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 552*FLEN/8, x4, x1, x2)

inst_277:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3a3 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3a3 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3ba3; op2val:0xbba3; 
   valaddr_reg:x3; val_offset:554*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 554*FLEN/8, x4, x1, x2)

inst_278:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3a3 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3a3 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3ba3; op2val:0xbba3; 
   valaddr_reg:x3; val_offset:556*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 556*FLEN/8, x4, x1, x2)

inst_279:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3a3 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3a3 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3ba3; op2val:0xbba3; 
   valaddr_reg:x3; val_offset:558*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 558*FLEN/8, x4, x1, x2)

inst_280:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x1c3 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x1c2 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2dc3; op2val:0xadc2; 
   valaddr_reg:x3; val_offset:560*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 560*FLEN/8, x4, x1, x2)

inst_281:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x1c3 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x1c2 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2dc3; op2val:0xadc2; 
   valaddr_reg:x3; val_offset:562*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 562*FLEN/8, x4, x1, x2)

inst_282:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x1c3 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x1c2 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2dc3; op2val:0xadc2; 
   valaddr_reg:x3; val_offset:564*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 564*FLEN/8, x4, x1, x2)

inst_283:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x1c3 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x1c2 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2dc3; op2val:0xadc2; 
   valaddr_reg:x3; val_offset:566*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 566*FLEN/8, x4, x1, x2)

inst_284:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x1c3 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x1c2 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2dc3; op2val:0xadc2; 
   valaddr_reg:x3; val_offset:568*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 568*FLEN/8, x4, x1, x2)

inst_285:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x11c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x11c and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x351c; op2val:0xb51c; 
   valaddr_reg:x3; val_offset:570*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 570*FLEN/8, x4, x1, x2)

inst_286:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x11c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x11c and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x351c; op2val:0xb51c; 
   valaddr_reg:x3; val_offset:572*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 572*FLEN/8, x4, x1, x2)

inst_287:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x11c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x11c and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x351c; op2val:0xb51c; 
   valaddr_reg:x3; val_offset:574*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 574*FLEN/8, x4, x1, x2)

inst_288:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x11c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x11c and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x351c; op2val:0xb51c; 
   valaddr_reg:x3; val_offset:576*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 576*FLEN/8, x4, x1, x2)

inst_289:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x11c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x11c and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x351c; op2val:0xb51c; 
   valaddr_reg:x3; val_offset:578*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 578*FLEN/8, x4, x1, x2)

inst_290:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1d7 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1d6 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35d7; op2val:0xb5d6; 
   valaddr_reg:x3; val_offset:580*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 580*FLEN/8, x4, x1, x2)

inst_291:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1d7 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1d6 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35d7; op2val:0xb5d6; 
   valaddr_reg:x3; val_offset:582*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 582*FLEN/8, x4, x1, x2)

inst_292:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1d7 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1d6 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35d7; op2val:0xb5d6; 
   valaddr_reg:x3; val_offset:584*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 584*FLEN/8, x4, x1, x2)

inst_293:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1d7 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1d6 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35d7; op2val:0xb5d6; 
   valaddr_reg:x3; val_offset:586*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 586*FLEN/8, x4, x1, x2)

inst_294:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1d7 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1d6 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35d7; op2val:0xb5d6; 
   valaddr_reg:x3; val_offset:588*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 588*FLEN/8, x4, x1, x2)

inst_295:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2c9 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x2c8 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36c9; op2val:0xb6c8; 
   valaddr_reg:x3; val_offset:590*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 590*FLEN/8, x4, x1, x2)

inst_296:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2c9 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x2c8 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36c9; op2val:0xb6c8; 
   valaddr_reg:x3; val_offset:592*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 592*FLEN/8, x4, x1, x2)

inst_297:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2c9 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x2c8 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36c9; op2val:0xb6c8; 
   valaddr_reg:x3; val_offset:594*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 594*FLEN/8, x4, x1, x2)

inst_298:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2c9 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x2c8 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36c9; op2val:0xb6c8; 
   valaddr_reg:x3; val_offset:596*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 596*FLEN/8, x4, x1, x2)

inst_299:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2c9 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x2c8 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36c9; op2val:0xb6c8; 
   valaddr_reg:x3; val_offset:598*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 598*FLEN/8, x4, x1, x2)

inst_300:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x109 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x109 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3909; op2val:0xb909; 
   valaddr_reg:x3; val_offset:600*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 600*FLEN/8, x4, x1, x2)

inst_301:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x109 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x109 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3909; op2val:0xb909; 
   valaddr_reg:x3; val_offset:602*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 602*FLEN/8, x4, x1, x2)

inst_302:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x109 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x109 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3909; op2val:0xb909; 
   valaddr_reg:x3; val_offset:604*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 604*FLEN/8, x4, x1, x2)

inst_303:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x109 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x109 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3909; op2val:0xb909; 
   valaddr_reg:x3; val_offset:606*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 606*FLEN/8, x4, x1, x2)

inst_304:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x109 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x109 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3909; op2val:0xb909; 
   valaddr_reg:x3; val_offset:608*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 608*FLEN/8, x4, x1, x2)

inst_305:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3b5 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3b5 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bb5; op2val:0xbbb5; 
   valaddr_reg:x3; val_offset:610*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 610*FLEN/8, x4, x1, x2)

inst_306:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3b5 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3b5 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bb5; op2val:0xbbb5; 
   valaddr_reg:x3; val_offset:612*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 612*FLEN/8, x4, x1, x2)

inst_307:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3b5 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3b5 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bb5; op2val:0xbbb5; 
   valaddr_reg:x3; val_offset:614*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 614*FLEN/8, x4, x1, x2)

inst_308:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3b5 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3b5 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bb5; op2val:0xbbb5; 
   valaddr_reg:x3; val_offset:616*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 616*FLEN/8, x4, x1, x2)

inst_309:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3b5 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3b5 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bb5; op2val:0xbbb5; 
   valaddr_reg:x3; val_offset:618*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 618*FLEN/8, x4, x1, x2)

inst_310:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x0fe and fs2 == 1 and fe2 == 0x0a and fm2 == 0x0fc and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x28fe; op2val:0xa8fc; 
   valaddr_reg:x3; val_offset:620*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 620*FLEN/8, x4, x1, x2)

inst_311:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x0fe and fs2 == 1 and fe2 == 0x0a and fm2 == 0x0fc and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x28fe; op2val:0xa8fc; 
   valaddr_reg:x3; val_offset:622*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 622*FLEN/8, x4, x1, x2)

inst_312:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x0fe and fs2 == 1 and fe2 == 0x0a and fm2 == 0x0fc and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x28fe; op2val:0xa8fc; 
   valaddr_reg:x3; val_offset:624*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 624*FLEN/8, x4, x1, x2)

inst_313:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x0fe and fs2 == 1 and fe2 == 0x0a and fm2 == 0x0fc and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x28fe; op2val:0xa8fc; 
   valaddr_reg:x3; val_offset:626*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 626*FLEN/8, x4, x1, x2)

inst_314:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x0fe and fs2 == 1 and fe2 == 0x0a and fm2 == 0x0fc and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x28fe; op2val:0xa8fc; 
   valaddr_reg:x3; val_offset:628*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 628*FLEN/8, x4, x1, x2)

inst_315:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x302 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x302 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b02; op2val:0xbb02; 
   valaddr_reg:x3; val_offset:630*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 630*FLEN/8, x4, x1, x2)

inst_316:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x302 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x302 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b02; op2val:0xbb02; 
   valaddr_reg:x3; val_offset:632*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 632*FLEN/8, x4, x1, x2)

inst_317:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x302 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x302 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b02; op2val:0xbb02; 
   valaddr_reg:x3; val_offset:634*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 634*FLEN/8, x4, x1, x2)

inst_318:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x302 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x302 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b02; op2val:0xbb02; 
   valaddr_reg:x3; val_offset:636*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 636*FLEN/8, x4, x1, x2)

inst_319:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x302 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x302 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b02; op2val:0xbb02; 
   valaddr_reg:x3; val_offset:638*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 638*FLEN/8, x4, x1, x2)

inst_320:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x260 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x260 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3260; op2val:0xb260; 
   valaddr_reg:x3; val_offset:640*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 640*FLEN/8, x4, x1, x2)

inst_321:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x260 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x260 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3260; op2val:0xb260; 
   valaddr_reg:x3; val_offset:642*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 642*FLEN/8, x4, x1, x2)

inst_322:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x260 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x260 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3260; op2val:0xb260; 
   valaddr_reg:x3; val_offset:644*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 644*FLEN/8, x4, x1, x2)

inst_323:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x260 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x260 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3260; op2val:0xb260; 
   valaddr_reg:x3; val_offset:646*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 646*FLEN/8, x4, x1, x2)

inst_324:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x260 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x260 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3260; op2val:0xb260; 
   valaddr_reg:x3; val_offset:648*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 648*FLEN/8, x4, x1, x2)

inst_325:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3d1 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3d1 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bd1; op2val:0xbbd1; 
   valaddr_reg:x3; val_offset:650*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 650*FLEN/8, x4, x1, x2)

inst_326:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3d1 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3d1 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bd1; op2val:0xbbd1; 
   valaddr_reg:x3; val_offset:652*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 652*FLEN/8, x4, x1, x2)

inst_327:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3d1 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3d1 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bd1; op2val:0xbbd1; 
   valaddr_reg:x3; val_offset:654*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 654*FLEN/8, x4, x1, x2)

inst_328:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3d1 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3d1 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bd1; op2val:0xbbd1; 
   valaddr_reg:x3; val_offset:656*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 656*FLEN/8, x4, x1, x2)

inst_329:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3d1 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3d1 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bd1; op2val:0xbbd1; 
   valaddr_reg:x3; val_offset:658*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 658*FLEN/8, x4, x1, x2)

inst_330:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x330 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x330 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b30; op2val:0xbb30; 
   valaddr_reg:x3; val_offset:660*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 660*FLEN/8, x4, x1, x2)

inst_331:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x330 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x330 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b30; op2val:0xbb30; 
   valaddr_reg:x3; val_offset:662*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 662*FLEN/8, x4, x1, x2)

inst_332:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x330 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x330 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b30; op2val:0xbb30; 
   valaddr_reg:x3; val_offset:664*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 664*FLEN/8, x4, x1, x2)

inst_333:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x330 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x330 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b30; op2val:0xbb30; 
   valaddr_reg:x3; val_offset:666*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 666*FLEN/8, x4, x1, x2)

inst_334:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x330 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x330 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b30; op2val:0xbb30; 
   valaddr_reg:x3; val_offset:668*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 668*FLEN/8, x4, x1, x2)

inst_335:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x23b and fs2 == 1 and fe2 == 0x0e and fm2 == 0x23b and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a3b; op2val:0xba3b; 
   valaddr_reg:x3; val_offset:670*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 670*FLEN/8, x4, x1, x2)

inst_336:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x23b and fs2 == 1 and fe2 == 0x0e and fm2 == 0x23b and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a3b; op2val:0xba3b; 
   valaddr_reg:x3; val_offset:672*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 672*FLEN/8, x4, x1, x2)

inst_337:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x23b and fs2 == 1 and fe2 == 0x0e and fm2 == 0x23b and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a3b; op2val:0xba3b; 
   valaddr_reg:x3; val_offset:674*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 674*FLEN/8, x4, x1, x2)

inst_338:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x23b and fs2 == 1 and fe2 == 0x0e and fm2 == 0x23b and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a3b; op2val:0xba3b; 
   valaddr_reg:x3; val_offset:676*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 676*FLEN/8, x4, x1, x2)

inst_339:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x23b and fs2 == 1 and fe2 == 0x0e and fm2 == 0x23b and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a3b; op2val:0xba3b; 
   valaddr_reg:x3; val_offset:678*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 678*FLEN/8, x4, x1, x2)

inst_340:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x132 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x132 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3932; op2val:0xb932; 
   valaddr_reg:x3; val_offset:680*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 680*FLEN/8, x4, x1, x2)

inst_341:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x132 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x132 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3932; op2val:0xb932; 
   valaddr_reg:x3; val_offset:682*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 682*FLEN/8, x4, x1, x2)

inst_342:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x132 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x132 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3932; op2val:0xb932; 
   valaddr_reg:x3; val_offset:684*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 684*FLEN/8, x4, x1, x2)

inst_343:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x132 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x132 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3932; op2val:0xb932; 
   valaddr_reg:x3; val_offset:686*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 686*FLEN/8, x4, x1, x2)

inst_344:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x132 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x132 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3932; op2val:0xb932; 
   valaddr_reg:x3; val_offset:688*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 688*FLEN/8, x4, x1, x2)

inst_345:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3f1 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x3f0 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37f1; op2val:0xb7f0; 
   valaddr_reg:x3; val_offset:690*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 690*FLEN/8, x4, x1, x2)

inst_346:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3f1 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x3f0 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37f1; op2val:0xb7f0; 
   valaddr_reg:x3; val_offset:692*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 692*FLEN/8, x4, x1, x2)

inst_347:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3f1 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x3f0 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37f1; op2val:0xb7f0; 
   valaddr_reg:x3; val_offset:694*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 694*FLEN/8, x4, x1, x2)

inst_348:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3f1 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x3f0 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37f1; op2val:0xb7f0; 
   valaddr_reg:x3; val_offset:696*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 696*FLEN/8, x4, x1, x2)

inst_349:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3f1 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x3f0 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37f1; op2val:0xb7f0; 
   valaddr_reg:x3; val_offset:698*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 698*FLEN/8, x4, x1, x2)

inst_350:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x331 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x331 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b31; op2val:0xbb31; 
   valaddr_reg:x3; val_offset:700*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 700*FLEN/8, x4, x1, x2)

inst_351:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x331 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x331 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b31; op2val:0xbb31; 
   valaddr_reg:x3; val_offset:702*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 702*FLEN/8, x4, x1, x2)

inst_352:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x331 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x331 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b31; op2val:0xbb31; 
   valaddr_reg:x3; val_offset:704*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 704*FLEN/8, x4, x1, x2)

inst_353:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x331 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x331 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b31; op2val:0xbb31; 
   valaddr_reg:x3; val_offset:706*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 706*FLEN/8, x4, x1, x2)

inst_354:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x331 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x331 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b31; op2val:0xbb31; 
   valaddr_reg:x3; val_offset:708*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 708*FLEN/8, x4, x1, x2)

inst_355:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x267 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x267 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a67; op2val:0xba67; 
   valaddr_reg:x3; val_offset:710*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 710*FLEN/8, x4, x1, x2)

inst_356:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x267 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x267 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a67; op2val:0xba67; 
   valaddr_reg:x3; val_offset:712*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 712*FLEN/8, x4, x1, x2)

inst_357:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x267 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x267 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a67; op2val:0xba67; 
   valaddr_reg:x3; val_offset:714*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 714*FLEN/8, x4, x1, x2)

inst_358:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x267 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x267 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a67; op2val:0xba67; 
   valaddr_reg:x3; val_offset:716*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 716*FLEN/8, x4, x1, x2)

inst_359:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x267 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x267 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a67; op2val:0xba67; 
   valaddr_reg:x3; val_offset:718*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 718*FLEN/8, x4, x1, x2)

inst_360:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x04b and fs2 == 1 and fe2 == 0x0d and fm2 == 0x04b and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x344b; op2val:0xb44b; 
   valaddr_reg:x3; val_offset:720*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 720*FLEN/8, x4, x1, x2)

inst_361:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x04b and fs2 == 1 and fe2 == 0x0d and fm2 == 0x04b and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x344b; op2val:0xb44b; 
   valaddr_reg:x3; val_offset:722*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 722*FLEN/8, x4, x1, x2)

inst_362:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x04b and fs2 == 1 and fe2 == 0x0d and fm2 == 0x04b and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x344b; op2val:0xb44b; 
   valaddr_reg:x3; val_offset:724*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 724*FLEN/8, x4, x1, x2)

inst_363:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x04b and fs2 == 1 and fe2 == 0x0d and fm2 == 0x04b and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x344b; op2val:0xb44b; 
   valaddr_reg:x3; val_offset:726*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 726*FLEN/8, x4, x1, x2)

inst_364:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x04b and fs2 == 1 and fe2 == 0x0d and fm2 == 0x04b and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x344b; op2val:0xb44b; 
   valaddr_reg:x3; val_offset:728*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 728*FLEN/8, x4, x1, x2)

inst_365:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x138 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x137 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2d38; op2val:0xad37; 
   valaddr_reg:x3; val_offset:730*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 730*FLEN/8, x4, x1, x2)

inst_366:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x138 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x137 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2d38; op2val:0xad37; 
   valaddr_reg:x3; val_offset:732*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 732*FLEN/8, x4, x1, x2)

inst_367:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x138 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x137 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2d38; op2val:0xad37; 
   valaddr_reg:x3; val_offset:734*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 734*FLEN/8, x4, x1, x2)

inst_368:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x138 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x137 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2d38; op2val:0xad37; 
   valaddr_reg:x3; val_offset:736*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 736*FLEN/8, x4, x1, x2)

inst_369:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x138 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x137 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2d38; op2val:0xad37; 
   valaddr_reg:x3; val_offset:738*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 738*FLEN/8, x4, x1, x2)

inst_370:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x13d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x13c and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x353d; op2val:0xb53c; 
   valaddr_reg:x3; val_offset:740*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 740*FLEN/8, x4, x1, x2)

inst_371:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x13d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x13c and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x353d; op2val:0xb53c; 
   valaddr_reg:x3; val_offset:742*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 742*FLEN/8, x4, x1, x2)

inst_372:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x13d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x13c and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x353d; op2val:0xb53c; 
   valaddr_reg:x3; val_offset:744*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 744*FLEN/8, x4, x1, x2)

inst_373:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x13d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x13c and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x353d; op2val:0xb53c; 
   valaddr_reg:x3; val_offset:746*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 746*FLEN/8, x4, x1, x2)

inst_374:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x13d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x13c and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x353d; op2val:0xb53c; 
   valaddr_reg:x3; val_offset:748*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 748*FLEN/8, x4, x1, x2)

inst_375:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x389 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x388 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b89; op2val:0xbb88; 
   valaddr_reg:x3; val_offset:750*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 750*FLEN/8, x4, x1, x2)

inst_376:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x389 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x388 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b89; op2val:0xbb88; 
   valaddr_reg:x3; val_offset:752*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 752*FLEN/8, x4, x1, x2)

inst_377:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x389 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x388 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b89; op2val:0xbb88; 
   valaddr_reg:x3; val_offset:754*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 754*FLEN/8, x4, x1, x2)

inst_378:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x389 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x388 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b89; op2val:0xbb88; 
   valaddr_reg:x3; val_offset:756*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 756*FLEN/8, x4, x1, x2)

inst_379:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x389 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x388 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b89; op2val:0xbb88; 
   valaddr_reg:x3; val_offset:758*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 758*FLEN/8, x4, x1, x2)

inst_380:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x0f2 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x0f2 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x30f2; op2val:0xb0f2; 
   valaddr_reg:x3; val_offset:760*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 760*FLEN/8, x4, x1, x2)

inst_381:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x0f2 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x0f2 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x30f2; op2val:0xb0f2; 
   valaddr_reg:x3; val_offset:762*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 762*FLEN/8, x4, x1, x2)

inst_382:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x0f2 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x0f2 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x30f2; op2val:0xb0f2; 
   valaddr_reg:x3; val_offset:764*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 764*FLEN/8, x4, x1, x2)

inst_383:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x0f2 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x0f2 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x30f2; op2val:0xb0f2; 
   valaddr_reg:x3; val_offset:766*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 766*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_4)

inst_384:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x0f2 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x0f2 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x30f2; op2val:0xb0f2; 
   valaddr_reg:x3; val_offset:768*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 768*FLEN/8, x4, x1, x2)

inst_385:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1fe and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1fe and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39fe; op2val:0xb9fe; 
   valaddr_reg:x3; val_offset:770*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 770*FLEN/8, x4, x1, x2)

inst_386:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1fe and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1fe and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39fe; op2val:0xb9fe; 
   valaddr_reg:x3; val_offset:772*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 772*FLEN/8, x4, x1, x2)

inst_387:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1fe and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1fe and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39fe; op2val:0xb9fe; 
   valaddr_reg:x3; val_offset:774*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 774*FLEN/8, x4, x1, x2)

inst_388:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1fe and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1fe and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39fe; op2val:0xb9fe; 
   valaddr_reg:x3; val_offset:776*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 776*FLEN/8, x4, x1, x2)

inst_389:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1fe and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1fe and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39fe; op2val:0xb9fe; 
   valaddr_reg:x3; val_offset:778*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 778*FLEN/8, x4, x1, x2)

inst_390:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x076 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x076 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3876; op2val:0xb876; 
   valaddr_reg:x3; val_offset:780*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 780*FLEN/8, x4, x1, x2)

inst_391:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x076 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x076 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3876; op2val:0xb876; 
   valaddr_reg:x3; val_offset:782*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 782*FLEN/8, x4, x1, x2)

inst_392:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x076 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x076 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3876; op2val:0xb876; 
   valaddr_reg:x3; val_offset:784*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 784*FLEN/8, x4, x1, x2)

inst_393:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x076 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x076 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3876; op2val:0xb876; 
   valaddr_reg:x3; val_offset:786*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 786*FLEN/8, x4, x1, x2)

inst_394:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x076 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x076 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3876; op2val:0xb876; 
   valaddr_reg:x3; val_offset:788*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 788*FLEN/8, x4, x1, x2)

inst_395:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x03a and fs2 == 1 and fe2 == 0x0e and fm2 == 0x03a and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x383a; op2val:0xb83a; 
   valaddr_reg:x3; val_offset:790*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 790*FLEN/8, x4, x1, x2)

inst_396:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x03a and fs2 == 1 and fe2 == 0x0e and fm2 == 0x03a and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x383a; op2val:0xb83a; 
   valaddr_reg:x3; val_offset:792*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 792*FLEN/8, x4, x1, x2)

inst_397:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x03a and fs2 == 1 and fe2 == 0x0e and fm2 == 0x03a and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x383a; op2val:0xb83a; 
   valaddr_reg:x3; val_offset:794*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 794*FLEN/8, x4, x1, x2)

inst_398:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x03a and fs2 == 1 and fe2 == 0x0e and fm2 == 0x03a and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x383a; op2val:0xb83a; 
   valaddr_reg:x3; val_offset:796*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 796*FLEN/8, x4, x1, x2)

inst_399:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x03a and fs2 == 1 and fe2 == 0x0e and fm2 == 0x03a and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x383a; op2val:0xb83a; 
   valaddr_reg:x3; val_offset:798*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 798*FLEN/8, x4, x1, x2)

inst_400:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2e5 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x2e4 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36e5; op2val:0xb6e4; 
   valaddr_reg:x3; val_offset:800*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 800*FLEN/8, x4, x1, x2)

inst_401:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2e5 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x2e4 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36e5; op2val:0xb6e4; 
   valaddr_reg:x3; val_offset:802*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 802*FLEN/8, x4, x1, x2)

inst_402:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2e5 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x2e4 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36e5; op2val:0xb6e4; 
   valaddr_reg:x3; val_offset:804*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 804*FLEN/8, x4, x1, x2)

inst_403:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2e5 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x2e4 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36e5; op2val:0xb6e4; 
   valaddr_reg:x3; val_offset:806*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 806*FLEN/8, x4, x1, x2)

inst_404:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2e5 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x2e4 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36e5; op2val:0xb6e4; 
   valaddr_reg:x3; val_offset:808*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 808*FLEN/8, x4, x1, x2)

inst_405:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x182 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x182 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3982; op2val:0xb982; 
   valaddr_reg:x3; val_offset:810*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 810*FLEN/8, x4, x1, x2)

inst_406:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x182 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x182 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3982; op2val:0xb982; 
   valaddr_reg:x3; val_offset:812*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 812*FLEN/8, x4, x1, x2)

inst_407:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x182 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x182 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3982; op2val:0xb982; 
   valaddr_reg:x3; val_offset:814*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 814*FLEN/8, x4, x1, x2)

inst_408:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x182 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x182 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3982; op2val:0xb982; 
   valaddr_reg:x3; val_offset:816*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 816*FLEN/8, x4, x1, x2)

inst_409:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x182 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x182 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3982; op2val:0xb982; 
   valaddr_reg:x3; val_offset:818*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 818*FLEN/8, x4, x1, x2)

inst_410:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x132 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x131 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3132; op2val:0xb131; 
   valaddr_reg:x3; val_offset:820*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 820*FLEN/8, x4, x1, x2)

inst_411:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x132 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x131 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3132; op2val:0xb131; 
   valaddr_reg:x3; val_offset:822*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 822*FLEN/8, x4, x1, x2)

inst_412:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x132 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x131 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3132; op2val:0xb131; 
   valaddr_reg:x3; val_offset:824*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 824*FLEN/8, x4, x1, x2)

inst_413:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x132 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x131 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3132; op2val:0xb131; 
   valaddr_reg:x3; val_offset:826*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 826*FLEN/8, x4, x1, x2)

inst_414:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x132 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x131 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3132; op2val:0xb131; 
   valaddr_reg:x3; val_offset:828*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 828*FLEN/8, x4, x1, x2)

inst_415:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x307 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x307 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3707; op2val:0xb707; 
   valaddr_reg:x3; val_offset:830*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 830*FLEN/8, x4, x1, x2)

inst_416:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x307 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x307 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3707; op2val:0xb707; 
   valaddr_reg:x3; val_offset:832*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 832*FLEN/8, x4, x1, x2)

inst_417:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x307 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x307 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3707; op2val:0xb707; 
   valaddr_reg:x3; val_offset:834*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 834*FLEN/8, x4, x1, x2)

inst_418:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x307 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x307 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3707; op2val:0xb707; 
   valaddr_reg:x3; val_offset:836*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 836*FLEN/8, x4, x1, x2)

inst_419:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x307 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x307 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3707; op2val:0xb707; 
   valaddr_reg:x3; val_offset:838*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 838*FLEN/8, x4, x1, x2)

inst_420:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x022 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x022 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3422; op2val:0xb422; 
   valaddr_reg:x3; val_offset:840*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 840*FLEN/8, x4, x1, x2)

inst_421:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x022 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x022 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3422; op2val:0xb422; 
   valaddr_reg:x3; val_offset:842*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 842*FLEN/8, x4, x1, x2)

inst_422:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x022 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x022 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3422; op2val:0xb422; 
   valaddr_reg:x3; val_offset:844*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 844*FLEN/8, x4, x1, x2)

inst_423:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x022 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x022 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3422; op2val:0xb422; 
   valaddr_reg:x3; val_offset:846*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 846*FLEN/8, x4, x1, x2)

inst_424:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x022 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x022 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3422; op2val:0xb422; 
   valaddr_reg:x3; val_offset:848*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 848*FLEN/8, x4, x1, x2)

inst_425:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3a2 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3a2 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3ba2; op2val:0xbba2; 
   valaddr_reg:x3; val_offset:850*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 850*FLEN/8, x4, x1, x2)

inst_426:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3a2 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3a2 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3ba2; op2val:0xbba2; 
   valaddr_reg:x3; val_offset:852*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 852*FLEN/8, x4, x1, x2)

inst_427:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3a2 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3a2 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3ba2; op2val:0xbba2; 
   valaddr_reg:x3; val_offset:854*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 854*FLEN/8, x4, x1, x2)

inst_428:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3a2 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3a2 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3ba2; op2val:0xbba2; 
   valaddr_reg:x3; val_offset:856*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 856*FLEN/8, x4, x1, x2)

inst_429:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3a2 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3a2 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3ba2; op2val:0xbba2; 
   valaddr_reg:x3; val_offset:858*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 858*FLEN/8, x4, x1, x2)

inst_430:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x214 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x214 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a14; op2val:0xba14; 
   valaddr_reg:x3; val_offset:860*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 860*FLEN/8, x4, x1, x2)

inst_431:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x214 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x214 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a14; op2val:0xba14; 
   valaddr_reg:x3; val_offset:862*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 862*FLEN/8, x4, x1, x2)

inst_432:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x214 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x214 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a14; op2val:0xba14; 
   valaddr_reg:x3; val_offset:864*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 864*FLEN/8, x4, x1, x2)

inst_433:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x214 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x214 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a14; op2val:0xba14; 
   valaddr_reg:x3; val_offset:866*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 866*FLEN/8, x4, x1, x2)

inst_434:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x214 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x214 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a14; op2val:0xba14; 
   valaddr_reg:x3; val_offset:868*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 868*FLEN/8, x4, x1, x2)

inst_435:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x12e and fs2 == 1 and fe2 == 0x0e and fm2 == 0x12e and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x392e; op2val:0xb92e; 
   valaddr_reg:x3; val_offset:870*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 870*FLEN/8, x4, x1, x2)

inst_436:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x12e and fs2 == 1 and fe2 == 0x0e and fm2 == 0x12e and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x392e; op2val:0xb92e; 
   valaddr_reg:x3; val_offset:872*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 872*FLEN/8, x4, x1, x2)

inst_437:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x12e and fs2 == 1 and fe2 == 0x0e and fm2 == 0x12e and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x392e; op2val:0xb92e; 
   valaddr_reg:x3; val_offset:874*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 874*FLEN/8, x4, x1, x2)

inst_438:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x12e and fs2 == 1 and fe2 == 0x0e and fm2 == 0x12e and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x392e; op2val:0xb92e; 
   valaddr_reg:x3; val_offset:876*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 876*FLEN/8, x4, x1, x2)

inst_439:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x12e and fs2 == 1 and fe2 == 0x0e and fm2 == 0x12e and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x392e; op2val:0xb92e; 
   valaddr_reg:x3; val_offset:878*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 878*FLEN/8, x4, x1, x2)

inst_440:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x120 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x120 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3920; op2val:0xb920; 
   valaddr_reg:x3; val_offset:880*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 880*FLEN/8, x4, x1, x2)

inst_441:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x120 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x120 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3920; op2val:0xb920; 
   valaddr_reg:x3; val_offset:882*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 882*FLEN/8, x4, x1, x2)

inst_442:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x120 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x120 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3920; op2val:0xb920; 
   valaddr_reg:x3; val_offset:884*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 884*FLEN/8, x4, x1, x2)

inst_443:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x120 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x120 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3920; op2val:0xb920; 
   valaddr_reg:x3; val_offset:886*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 886*FLEN/8, x4, x1, x2)

inst_444:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x120 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x120 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3920; op2val:0xb920; 
   valaddr_reg:x3; val_offset:888*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 888*FLEN/8, x4, x1, x2)

inst_445:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1dc and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1dc and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35dc; op2val:0xb5dc; 
   valaddr_reg:x3; val_offset:890*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 890*FLEN/8, x4, x1, x2)

inst_446:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1dc and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1dc and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35dc; op2val:0xb5dc; 
   valaddr_reg:x3; val_offset:892*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 892*FLEN/8, x4, x1, x2)

inst_447:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1dc and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1dc and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35dc; op2val:0xb5dc; 
   valaddr_reg:x3; val_offset:894*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 894*FLEN/8, x4, x1, x2)

inst_448:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1dc and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1dc and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35dc; op2val:0xb5dc; 
   valaddr_reg:x3; val_offset:896*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 896*FLEN/8, x4, x1, x2)

inst_449:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1dc and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1dc and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35dc; op2val:0xb5dc; 
   valaddr_reg:x3; val_offset:898*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 898*FLEN/8, x4, x1, x2)

inst_450:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x08c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x08c and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x348c; op2val:0xb48c; 
   valaddr_reg:x3; val_offset:900*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 900*FLEN/8, x4, x1, x2)

inst_451:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x08c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x08c and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x348c; op2val:0xb48c; 
   valaddr_reg:x3; val_offset:902*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 902*FLEN/8, x4, x1, x2)

inst_452:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x08c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x08c and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x348c; op2val:0xb48c; 
   valaddr_reg:x3; val_offset:904*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 904*FLEN/8, x4, x1, x2)

inst_453:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x08c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x08c and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x348c; op2val:0xb48c; 
   valaddr_reg:x3; val_offset:906*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 906*FLEN/8, x4, x1, x2)

inst_454:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x08c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x08c and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x348c; op2val:0xb48c; 
   valaddr_reg:x3; val_offset:908*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 908*FLEN/8, x4, x1, x2)

inst_455:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0af and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0af and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38af; op2val:0xb8af; 
   valaddr_reg:x3; val_offset:910*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 910*FLEN/8, x4, x1, x2)

inst_456:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0af and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0af and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38af; op2val:0xb8af; 
   valaddr_reg:x3; val_offset:912*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 912*FLEN/8, x4, x1, x2)

inst_457:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0af and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0af and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38af; op2val:0xb8af; 
   valaddr_reg:x3; val_offset:914*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 914*FLEN/8, x4, x1, x2)

inst_458:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0af and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0af and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38af; op2val:0xb8af; 
   valaddr_reg:x3; val_offset:916*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 916*FLEN/8, x4, x1, x2)

inst_459:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0af and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0af and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38af; op2val:0xb8af; 
   valaddr_reg:x3; val_offset:918*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 918*FLEN/8, x4, x1, x2)

inst_460:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3fc and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3fc and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bfc; op2val:0xbbfc; 
   valaddr_reg:x3; val_offset:920*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 920*FLEN/8, x4, x1, x2)

inst_461:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3fc and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3fc and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bfc; op2val:0xbbfc; 
   valaddr_reg:x3; val_offset:922*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 922*FLEN/8, x4, x1, x2)

inst_462:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3fc and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3fc and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bfc; op2val:0xbbfc; 
   valaddr_reg:x3; val_offset:924*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 924*FLEN/8, x4, x1, x2)

inst_463:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3fc and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3fc and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bfc; op2val:0xbbfc; 
   valaddr_reg:x3; val_offset:926*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 926*FLEN/8, x4, x1, x2)

inst_464:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3fc and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3fc and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bfc; op2val:0xbbfc; 
   valaddr_reg:x3; val_offset:928*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 928*FLEN/8, x4, x1, x2)

inst_465:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x153 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x153 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3953; op2val:0xb953; 
   valaddr_reg:x3; val_offset:930*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 930*FLEN/8, x4, x1, x2)

inst_466:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x153 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x153 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3953; op2val:0xb953; 
   valaddr_reg:x3; val_offset:932*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 932*FLEN/8, x4, x1, x2)

inst_467:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x153 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x153 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3953; op2val:0xb953; 
   valaddr_reg:x3; val_offset:934*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 934*FLEN/8, x4, x1, x2)

inst_468:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x153 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x153 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3953; op2val:0xb953; 
   valaddr_reg:x3; val_offset:936*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 936*FLEN/8, x4, x1, x2)

inst_469:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x153 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x153 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3953; op2val:0xb953; 
   valaddr_reg:x3; val_offset:938*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 938*FLEN/8, x4, x1, x2)

inst_470:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1cd and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1cd and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35cd; op2val:0xb5cd; 
   valaddr_reg:x3; val_offset:940*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 940*FLEN/8, x4, x1, x2)

inst_471:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1cd and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1cd and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35cd; op2val:0xb5cd; 
   valaddr_reg:x3; val_offset:942*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 942*FLEN/8, x4, x1, x2)

inst_472:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1cd and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1cd and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35cd; op2val:0xb5cd; 
   valaddr_reg:x3; val_offset:944*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 944*FLEN/8, x4, x1, x2)

inst_473:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1cd and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1cd and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35cd; op2val:0xb5cd; 
   valaddr_reg:x3; val_offset:946*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 946*FLEN/8, x4, x1, x2)

inst_474:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1cd and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1cd and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35cd; op2val:0xb5cd; 
   valaddr_reg:x3; val_offset:948*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 948*FLEN/8, x4, x1, x2)

inst_475:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x3f9 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x3f8 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2ff9; op2val:0xaff8; 
   valaddr_reg:x3; val_offset:950*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 950*FLEN/8, x4, x1, x2)

inst_476:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x3f9 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x3f8 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2ff9; op2val:0xaff8; 
   valaddr_reg:x3; val_offset:952*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 952*FLEN/8, x4, x1, x2)

inst_477:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x3f9 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x3f8 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2ff9; op2val:0xaff8; 
   valaddr_reg:x3; val_offset:954*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 954*FLEN/8, x4, x1, x2)

inst_478:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x3f9 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x3f8 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2ff9; op2val:0xaff8; 
   valaddr_reg:x3; val_offset:956*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 956*FLEN/8, x4, x1, x2)

inst_479:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x3f9 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x3f8 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2ff9; op2val:0xaff8; 
   valaddr_reg:x3; val_offset:958*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 958*FLEN/8, x4, x1, x2)

inst_480:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0c5 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0c5 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x34c5; op2val:0xb4c5; 
   valaddr_reg:x3; val_offset:960*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 960*FLEN/8, x4, x1, x2)

inst_481:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0c5 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0c5 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x34c5; op2val:0xb4c5; 
   valaddr_reg:x3; val_offset:962*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 962*FLEN/8, x4, x1, x2)

inst_482:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0c5 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0c5 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x34c5; op2val:0xb4c5; 
   valaddr_reg:x3; val_offset:964*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 964*FLEN/8, x4, x1, x2)

inst_483:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0c5 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0c5 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x34c5; op2val:0xb4c5; 
   valaddr_reg:x3; val_offset:966*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 966*FLEN/8, x4, x1, x2)

inst_484:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0c5 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0c5 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x34c5; op2val:0xb4c5; 
   valaddr_reg:x3; val_offset:968*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 968*FLEN/8, x4, x1, x2)

inst_485:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x167 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x167 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3567; op2val:0xb567; 
   valaddr_reg:x3; val_offset:970*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 970*FLEN/8, x4, x1, x2)

inst_486:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x167 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x167 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3567; op2val:0xb567; 
   valaddr_reg:x3; val_offset:972*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 972*FLEN/8, x4, x1, x2)

inst_487:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x167 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x167 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3567; op2val:0xb567; 
   valaddr_reg:x3; val_offset:974*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 974*FLEN/8, x4, x1, x2)

inst_488:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x167 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x167 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3567; op2val:0xb567; 
   valaddr_reg:x3; val_offset:976*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 976*FLEN/8, x4, x1, x2)

inst_489:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x167 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x167 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3567; op2val:0xb567; 
   valaddr_reg:x3; val_offset:978*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 978*FLEN/8, x4, x1, x2)

inst_490:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x06f and fs2 == 1 and fe2 == 0x0e and fm2 == 0x06f and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x386f; op2val:0xb86f; 
   valaddr_reg:x3; val_offset:980*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 980*FLEN/8, x4, x1, x2)

inst_491:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x06f and fs2 == 1 and fe2 == 0x0e and fm2 == 0x06f and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x386f; op2val:0xb86f; 
   valaddr_reg:x3; val_offset:982*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 982*FLEN/8, x4, x1, x2)

inst_492:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x06f and fs2 == 1 and fe2 == 0x0e and fm2 == 0x06f and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x386f; op2val:0xb86f; 
   valaddr_reg:x3; val_offset:984*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 984*FLEN/8, x4, x1, x2)

inst_493:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x06f and fs2 == 1 and fe2 == 0x0e and fm2 == 0x06f and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x386f; op2val:0xb86f; 
   valaddr_reg:x3; val_offset:986*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 986*FLEN/8, x4, x1, x2)

inst_494:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x06f and fs2 == 1 and fe2 == 0x0e and fm2 == 0x06f and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x386f; op2val:0xb86f; 
   valaddr_reg:x3; val_offset:988*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 988*FLEN/8, x4, x1, x2)

inst_495:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2bd and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2bc and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3abd; op2val:0xbabc; 
   valaddr_reg:x3; val_offset:990*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 990*FLEN/8, x4, x1, x2)

inst_496:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2bd and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2bc and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3abd; op2val:0xbabc; 
   valaddr_reg:x3; val_offset:992*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 992*FLEN/8, x4, x1, x2)

inst_497:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2bd and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2bc and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3abd; op2val:0xbabc; 
   valaddr_reg:x3; val_offset:994*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 994*FLEN/8, x4, x1, x2)

inst_498:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2bd and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2bc and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3abd; op2val:0xbabc; 
   valaddr_reg:x3; val_offset:996*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 996*FLEN/8, x4, x1, x2)

inst_499:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2bd and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2bc and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3abd; op2val:0xbabc; 
   valaddr_reg:x3; val_offset:998*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 998*FLEN/8, x4, x1, x2)

inst_500:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x01a and fs2 == 1 and fe2 == 0x0e and fm2 == 0x01a and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x381a; op2val:0xb81a; 
   valaddr_reg:x3; val_offset:1000*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1000*FLEN/8, x4, x1, x2)

inst_501:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x01a and fs2 == 1 and fe2 == 0x0e and fm2 == 0x01a and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x381a; op2val:0xb81a; 
   valaddr_reg:x3; val_offset:1002*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1002*FLEN/8, x4, x1, x2)

inst_502:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x01a and fs2 == 1 and fe2 == 0x0e and fm2 == 0x01a and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x381a; op2val:0xb81a; 
   valaddr_reg:x3; val_offset:1004*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1004*FLEN/8, x4, x1, x2)

inst_503:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x01a and fs2 == 1 and fe2 == 0x0e and fm2 == 0x01a and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x381a; op2val:0xb81a; 
   valaddr_reg:x3; val_offset:1006*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1006*FLEN/8, x4, x1, x2)

inst_504:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x01a and fs2 == 1 and fe2 == 0x0e and fm2 == 0x01a and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x381a; op2val:0xb81a; 
   valaddr_reg:x3; val_offset:1008*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1008*FLEN/8, x4, x1, x2)

inst_505:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3d3 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x3d2 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x33d3; op2val:0xb3d2; 
   valaddr_reg:x3; val_offset:1010*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1010*FLEN/8, x4, x1, x2)

inst_506:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3d3 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x3d2 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x33d3; op2val:0xb3d2; 
   valaddr_reg:x3; val_offset:1012*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1012*FLEN/8, x4, x1, x2)

inst_507:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3d3 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x3d2 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x33d3; op2val:0xb3d2; 
   valaddr_reg:x3; val_offset:1014*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1014*FLEN/8, x4, x1, x2)

inst_508:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3d3 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x3d2 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x33d3; op2val:0xb3d2; 
   valaddr_reg:x3; val_offset:1016*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1016*FLEN/8, x4, x1, x2)

inst_509:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3d3 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x3d2 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x33d3; op2val:0xb3d2; 
   valaddr_reg:x3; val_offset:1018*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1018*FLEN/8, x4, x1, x2)

inst_510:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x00b and fs2 == 1 and fe2 == 0x0e and fm2 == 0x00b and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x380b; op2val:0xb80b; 
   valaddr_reg:x3; val_offset:1020*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1020*FLEN/8, x4, x1, x2)

inst_511:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x00b and fs2 == 1 and fe2 == 0x0e and fm2 == 0x00b and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x380b; op2val:0xb80b; 
   valaddr_reg:x3; val_offset:1022*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1022*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_5)

inst_512:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x00b and fs2 == 1 and fe2 == 0x0e and fm2 == 0x00b and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x380b; op2val:0xb80b; 
   valaddr_reg:x3; val_offset:1024*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1024*FLEN/8, x4, x1, x2)

inst_513:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x00b and fs2 == 1 and fe2 == 0x0e and fm2 == 0x00b and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x380b; op2val:0xb80b; 
   valaddr_reg:x3; val_offset:1026*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1026*FLEN/8, x4, x1, x2)

inst_514:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x00b and fs2 == 1 and fe2 == 0x0e and fm2 == 0x00b and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x380b; op2val:0xb80b; 
   valaddr_reg:x3; val_offset:1028*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1028*FLEN/8, x4, x1, x2)

inst_515:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x043 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x043 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3843; op2val:0xb843; 
   valaddr_reg:x3; val_offset:1030*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1030*FLEN/8, x4, x1, x2)

inst_516:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x043 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x043 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3843; op2val:0xb843; 
   valaddr_reg:x3; val_offset:1032*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1032*FLEN/8, x4, x1, x2)

inst_517:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x043 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x043 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3843; op2val:0xb843; 
   valaddr_reg:x3; val_offset:1034*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1034*FLEN/8, x4, x1, x2)

inst_518:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x043 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x043 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3843; op2val:0xb843; 
   valaddr_reg:x3; val_offset:1036*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1036*FLEN/8, x4, x1, x2)

inst_519:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x043 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x043 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3843; op2val:0xb843; 
   valaddr_reg:x3; val_offset:1038*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1038*FLEN/8, x4, x1, x2)

inst_520:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x000 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3000; op2val:0xafff; 
   valaddr_reg:x3; val_offset:1040*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1040*FLEN/8, x4, x1, x2)

inst_521:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x000 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3000; op2val:0xafff; 
   valaddr_reg:x3; val_offset:1042*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1042*FLEN/8, x4, x1, x2)

inst_522:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x000 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3000; op2val:0xafff; 
   valaddr_reg:x3; val_offset:1044*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1044*FLEN/8, x4, x1, x2)

inst_523:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x000 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3000; op2val:0xafff; 
   valaddr_reg:x3; val_offset:1046*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1046*FLEN/8, x4, x1, x2)

inst_524:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x000 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3000; op2val:0xafff; 
   valaddr_reg:x3; val_offset:1048*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1048*FLEN/8, x4, x1, x2)

inst_525:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x27e and fs2 == 1 and fe2 == 0x0e and fm2 == 0x27e and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a7e; op2val:0xba7e; 
   valaddr_reg:x3; val_offset:1050*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1050*FLEN/8, x4, x1, x2)

inst_526:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x27e and fs2 == 1 and fe2 == 0x0e and fm2 == 0x27e and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a7e; op2val:0xba7e; 
   valaddr_reg:x3; val_offset:1052*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1052*FLEN/8, x4, x1, x2)

inst_527:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x27e and fs2 == 1 and fe2 == 0x0e and fm2 == 0x27e and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a7e; op2val:0xba7e; 
   valaddr_reg:x3; val_offset:1054*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1054*FLEN/8, x4, x1, x2)

inst_528:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x27e and fs2 == 1 and fe2 == 0x0e and fm2 == 0x27e and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a7e; op2val:0xba7e; 
   valaddr_reg:x3; val_offset:1056*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1056*FLEN/8, x4, x1, x2)

inst_529:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x27e and fs2 == 1 and fe2 == 0x0e and fm2 == 0x27e and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a7e; op2val:0xba7e; 
   valaddr_reg:x3; val_offset:1058*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1058*FLEN/8, x4, x1, x2)

inst_530:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1de and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1de and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35de; op2val:0xb5de; 
   valaddr_reg:x3; val_offset:1060*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1060*FLEN/8, x4, x1, x2)

inst_531:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1de and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1de and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35de; op2val:0xb5de; 
   valaddr_reg:x3; val_offset:1062*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1062*FLEN/8, x4, x1, x2)

inst_532:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1de and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1de and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35de; op2val:0xb5de; 
   valaddr_reg:x3; val_offset:1064*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1064*FLEN/8, x4, x1, x2)

inst_533:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1de and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1de and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35de; op2val:0xb5de; 
   valaddr_reg:x3; val_offset:1066*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1066*FLEN/8, x4, x1, x2)

inst_534:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1de and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1de and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35de; op2val:0xb5de; 
   valaddr_reg:x3; val_offset:1068*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1068*FLEN/8, x4, x1, x2)

inst_535:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x064 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x064 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3464; op2val:0xb464; 
   valaddr_reg:x3; val_offset:1070*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1070*FLEN/8, x4, x1, x2)

inst_536:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x064 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x064 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3464; op2val:0xb464; 
   valaddr_reg:x3; val_offset:1072*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1072*FLEN/8, x4, x1, x2)

inst_537:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x064 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x064 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3464; op2val:0xb464; 
   valaddr_reg:x3; val_offset:1074*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1074*FLEN/8, x4, x1, x2)

inst_538:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x064 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x064 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3464; op2val:0xb464; 
   valaddr_reg:x3; val_offset:1076*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1076*FLEN/8, x4, x1, x2)

inst_539:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x064 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x064 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3464; op2val:0xb464; 
   valaddr_reg:x3; val_offset:1078*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1078*FLEN/8, x4, x1, x2)

inst_540:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0c9 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0c9 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38c9; op2val:0xb8c9; 
   valaddr_reg:x3; val_offset:1080*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1080*FLEN/8, x4, x1, x2)

inst_541:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0c9 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0c9 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38c9; op2val:0xb8c9; 
   valaddr_reg:x3; val_offset:1082*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1082*FLEN/8, x4, x1, x2)

inst_542:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0c9 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0c9 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38c9; op2val:0xb8c9; 
   valaddr_reg:x3; val_offset:1084*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1084*FLEN/8, x4, x1, x2)

inst_543:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0c9 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0c9 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38c9; op2val:0xb8c9; 
   valaddr_reg:x3; val_offset:1086*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1086*FLEN/8, x4, x1, x2)

inst_544:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0c9 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0c9 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38c9; op2val:0xb8c9; 
   valaddr_reg:x3; val_offset:1088*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1088*FLEN/8, x4, x1, x2)

inst_545:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x178 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x178 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3978; op2val:0xb978; 
   valaddr_reg:x3; val_offset:1090*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1090*FLEN/8, x4, x1, x2)

inst_546:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x178 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x178 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3978; op2val:0xb978; 
   valaddr_reg:x3; val_offset:1092*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1092*FLEN/8, x4, x1, x2)

inst_547:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x178 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x178 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3978; op2val:0xb978; 
   valaddr_reg:x3; val_offset:1094*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1094*FLEN/8, x4, x1, x2)

inst_548:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x178 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x178 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3978; op2val:0xb978; 
   valaddr_reg:x3; val_offset:1096*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1096*FLEN/8, x4, x1, x2)

inst_549:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x178 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x178 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3978; op2val:0xb978; 
   valaddr_reg:x3; val_offset:1098*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1098*FLEN/8, x4, x1, x2)

inst_550:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x085 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x085 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3485; op2val:0xb485; 
   valaddr_reg:x3; val_offset:1100*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1100*FLEN/8, x4, x1, x2)

inst_551:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x085 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x085 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3485; op2val:0xb485; 
   valaddr_reg:x3; val_offset:1102*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1102*FLEN/8, x4, x1, x2)

inst_552:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x085 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x085 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3485; op2val:0xb485; 
   valaddr_reg:x3; val_offset:1104*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1104*FLEN/8, x4, x1, x2)

inst_553:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x085 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x085 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3485; op2val:0xb485; 
   valaddr_reg:x3; val_offset:1106*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1106*FLEN/8, x4, x1, x2)

inst_554:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x085 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x085 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3485; op2val:0xb485; 
   valaddr_reg:x3; val_offset:1108*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1108*FLEN/8, x4, x1, x2)

inst_555:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x1ac and fs2 == 1 and fe2 == 0x0c and fm2 == 0x1ac and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x31ac; op2val:0xb1ac; 
   valaddr_reg:x3; val_offset:1110*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1110*FLEN/8, x4, x1, x2)

inst_556:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x1ac and fs2 == 1 and fe2 == 0x0c and fm2 == 0x1ac and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x31ac; op2val:0xb1ac; 
   valaddr_reg:x3; val_offset:1112*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1112*FLEN/8, x4, x1, x2)

inst_557:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x1ac and fs2 == 1 and fe2 == 0x0c and fm2 == 0x1ac and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x31ac; op2val:0xb1ac; 
   valaddr_reg:x3; val_offset:1114*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1114*FLEN/8, x4, x1, x2)

inst_558:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x1ac and fs2 == 1 and fe2 == 0x0c and fm2 == 0x1ac and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x31ac; op2val:0xb1ac; 
   valaddr_reg:x3; val_offset:1116*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1116*FLEN/8, x4, x1, x2)

inst_559:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x1ac and fs2 == 1 and fe2 == 0x0c and fm2 == 0x1ac and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x31ac; op2val:0xb1ac; 
   valaddr_reg:x3; val_offset:1118*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1118*FLEN/8, x4, x1, x2)

inst_560:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x337 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x337 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b37; op2val:0xbb37; 
   valaddr_reg:x3; val_offset:1120*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1120*FLEN/8, x4, x1, x2)

inst_561:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x337 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x337 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b37; op2val:0xbb37; 
   valaddr_reg:x3; val_offset:1122*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1122*FLEN/8, x4, x1, x2)

inst_562:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x337 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x337 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b37; op2val:0xbb37; 
   valaddr_reg:x3; val_offset:1124*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1124*FLEN/8, x4, x1, x2)

inst_563:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x337 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x337 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b37; op2val:0xbb37; 
   valaddr_reg:x3; val_offset:1126*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1126*FLEN/8, x4, x1, x2)

inst_564:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x337 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x337 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b37; op2val:0xbb37; 
   valaddr_reg:x3; val_offset:1128*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1128*FLEN/8, x4, x1, x2)

inst_565:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x19c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x19c and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x359c; op2val:0xb59c; 
   valaddr_reg:x3; val_offset:1130*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1130*FLEN/8, x4, x1, x2)

inst_566:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x19c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x19c and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x359c; op2val:0xb59c; 
   valaddr_reg:x3; val_offset:1132*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1132*FLEN/8, x4, x1, x2)

inst_567:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x19c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x19c and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x359c; op2val:0xb59c; 
   valaddr_reg:x3; val_offset:1134*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1134*FLEN/8, x4, x1, x2)

inst_568:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x19c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x19c and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x359c; op2val:0xb59c; 
   valaddr_reg:x3; val_offset:1136*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1136*FLEN/8, x4, x1, x2)

inst_569:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x19c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x19c and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x359c; op2val:0xb59c; 
   valaddr_reg:x3; val_offset:1138*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1138*FLEN/8, x4, x1, x2)

inst_570:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1c2 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1c2 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39c2; op2val:0xb9c2; 
   valaddr_reg:x3; val_offset:1140*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1140*FLEN/8, x4, x1, x2)

inst_571:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1c2 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1c2 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39c2; op2val:0xb9c2; 
   valaddr_reg:x3; val_offset:1142*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1142*FLEN/8, x4, x1, x2)

inst_572:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1c2 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1c2 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39c2; op2val:0xb9c2; 
   valaddr_reg:x3; val_offset:1144*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1144*FLEN/8, x4, x1, x2)

inst_573:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1c2 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1c2 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39c2; op2val:0xb9c2; 
   valaddr_reg:x3; val_offset:1146*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1146*FLEN/8, x4, x1, x2)

inst_574:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1c2 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1c2 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39c2; op2val:0xb9c2; 
   valaddr_reg:x3; val_offset:1148*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1148*FLEN/8, x4, x1, x2)

inst_575:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x332 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x332 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b32; op2val:0xbb32; 
   valaddr_reg:x3; val_offset:1150*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1150*FLEN/8, x4, x1, x2)

inst_576:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x332 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x332 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b32; op2val:0xbb32; 
   valaddr_reg:x3; val_offset:1152*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1152*FLEN/8, x4, x1, x2)

inst_577:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x332 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x332 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b32; op2val:0xbb32; 
   valaddr_reg:x3; val_offset:1154*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1154*FLEN/8, x4, x1, x2)

inst_578:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x332 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x332 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b32; op2val:0xbb32; 
   valaddr_reg:x3; val_offset:1156*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1156*FLEN/8, x4, x1, x2)

inst_579:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x332 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x332 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b32; op2val:0xbb32; 
   valaddr_reg:x3; val_offset:1158*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1158*FLEN/8, x4, x1, x2)

inst_580:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0d3 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0d3 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38d3; op2val:0xb8d3; 
   valaddr_reg:x3; val_offset:1160*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1160*FLEN/8, x4, x1, x2)

inst_581:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0d3 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0d3 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38d3; op2val:0xb8d3; 
   valaddr_reg:x3; val_offset:1162*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1162*FLEN/8, x4, x1, x2)

inst_582:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0d3 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0d3 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38d3; op2val:0xb8d3; 
   valaddr_reg:x3; val_offset:1164*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1164*FLEN/8, x4, x1, x2)

inst_583:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0d3 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0d3 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38d3; op2val:0xb8d3; 
   valaddr_reg:x3; val_offset:1166*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1166*FLEN/8, x4, x1, x2)

inst_584:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0d3 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0d3 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38d3; op2val:0xb8d3; 
   valaddr_reg:x3; val_offset:1168*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1168*FLEN/8, x4, x1, x2)

inst_585:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1cd and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1cd and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39cd; op2val:0xb9cd; 
   valaddr_reg:x3; val_offset:1170*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1170*FLEN/8, x4, x1, x2)

inst_586:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1cd and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1cd and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39cd; op2val:0xb9cd; 
   valaddr_reg:x3; val_offset:1172*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1172*FLEN/8, x4, x1, x2)

inst_587:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1cd and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1cd and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39cd; op2val:0xb9cd; 
   valaddr_reg:x3; val_offset:1174*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1174*FLEN/8, x4, x1, x2)

inst_588:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1cd and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1cd and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39cd; op2val:0xb9cd; 
   valaddr_reg:x3; val_offset:1176*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1176*FLEN/8, x4, x1, x2)

inst_589:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1cd and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1cd and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39cd; op2val:0xb9cd; 
   valaddr_reg:x3; val_offset:1178*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1178*FLEN/8, x4, x1, x2)

inst_590:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2a5 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2a5 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x32a5; op2val:0xb2a5; 
   valaddr_reg:x3; val_offset:1180*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1180*FLEN/8, x4, x1, x2)

inst_591:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2a5 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2a5 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x32a5; op2val:0xb2a5; 
   valaddr_reg:x3; val_offset:1182*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1182*FLEN/8, x4, x1, x2)

inst_592:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2a5 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2a5 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x32a5; op2val:0xb2a5; 
   valaddr_reg:x3; val_offset:1184*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1184*FLEN/8, x4, x1, x2)

inst_593:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2a5 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2a5 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x32a5; op2val:0xb2a5; 
   valaddr_reg:x3; val_offset:1186*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1186*FLEN/8, x4, x1, x2)

inst_594:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2a5 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2a5 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x32a5; op2val:0xb2a5; 
   valaddr_reg:x3; val_offset:1188*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1188*FLEN/8, x4, x1, x2)

inst_595:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2ee and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2ee and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3aee; op2val:0xbaee; 
   valaddr_reg:x3; val_offset:1190*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1190*FLEN/8, x4, x1, x2)

inst_596:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2ee and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2ee and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3aee; op2val:0xbaee; 
   valaddr_reg:x3; val_offset:1192*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1192*FLEN/8, x4, x1, x2)

inst_597:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2ee and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2ee and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3aee; op2val:0xbaee; 
   valaddr_reg:x3; val_offset:1194*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1194*FLEN/8, x4, x1, x2)

inst_598:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2ee and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2ee and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3aee; op2val:0xbaee; 
   valaddr_reg:x3; val_offset:1196*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1196*FLEN/8, x4, x1, x2)

inst_599:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2ee and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2ee and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3aee; op2val:0xbaee; 
   valaddr_reg:x3; val_offset:1198*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1198*FLEN/8, x4, x1, x2)

inst_600:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x196 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x196 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3596; op2val:0xb596; 
   valaddr_reg:x3; val_offset:1200*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1200*FLEN/8, x4, x1, x2)

inst_601:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x196 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x196 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3596; op2val:0xb596; 
   valaddr_reg:x3; val_offset:1202*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1202*FLEN/8, x4, x1, x2)

inst_602:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x196 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x196 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3596; op2val:0xb596; 
   valaddr_reg:x3; val_offset:1204*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1204*FLEN/8, x4, x1, x2)

inst_603:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x196 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x196 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3596; op2val:0xb596; 
   valaddr_reg:x3; val_offset:1206*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1206*FLEN/8, x4, x1, x2)

inst_604:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x196 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x196 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3596; op2val:0xb596; 
   valaddr_reg:x3; val_offset:1208*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1208*FLEN/8, x4, x1, x2)

inst_605:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x019 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x019 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3019; op2val:0xb019; 
   valaddr_reg:x3; val_offset:1210*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1210*FLEN/8, x4, x1, x2)

inst_606:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x019 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x019 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3019; op2val:0xb019; 
   valaddr_reg:x3; val_offset:1212*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1212*FLEN/8, x4, x1, x2)

inst_607:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x019 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x019 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3019; op2val:0xb019; 
   valaddr_reg:x3; val_offset:1214*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1214*FLEN/8, x4, x1, x2)

inst_608:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x019 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x019 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3019; op2val:0xb019; 
   valaddr_reg:x3; val_offset:1216*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1216*FLEN/8, x4, x1, x2)

inst_609:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x019 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x019 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3019; op2val:0xb019; 
   valaddr_reg:x3; val_offset:1218*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1218*FLEN/8, x4, x1, x2)

inst_610:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3d9 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3d9 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bd9; op2val:0xbbd9; 
   valaddr_reg:x3; val_offset:1220*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1220*FLEN/8, x4, x1, x2)

inst_611:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3d9 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3d9 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bd9; op2val:0xbbd9; 
   valaddr_reg:x3; val_offset:1222*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1222*FLEN/8, x4, x1, x2)

inst_612:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3d9 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3d9 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bd9; op2val:0xbbd9; 
   valaddr_reg:x3; val_offset:1224*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1224*FLEN/8, x4, x1, x2)

inst_613:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3d9 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3d9 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bd9; op2val:0xbbd9; 
   valaddr_reg:x3; val_offset:1226*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1226*FLEN/8, x4, x1, x2)

inst_614:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3d9 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3d9 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bd9; op2val:0xbbd9; 
   valaddr_reg:x3; val_offset:1228*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1228*FLEN/8, x4, x1, x2)

inst_615:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x11a and fs2 == 1 and fe2 == 0x0d and fm2 == 0x11a and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x351a; op2val:0xb51a; 
   valaddr_reg:x3; val_offset:1230*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1230*FLEN/8, x4, x1, x2)

inst_616:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x11a and fs2 == 1 and fe2 == 0x0d and fm2 == 0x11a and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x351a; op2val:0xb51a; 
   valaddr_reg:x3; val_offset:1232*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1232*FLEN/8, x4, x1, x2)

inst_617:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x11a and fs2 == 1 and fe2 == 0x0d and fm2 == 0x11a and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x351a; op2val:0xb51a; 
   valaddr_reg:x3; val_offset:1234*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1234*FLEN/8, x4, x1, x2)

inst_618:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x11a and fs2 == 1 and fe2 == 0x0d and fm2 == 0x11a and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x351a; op2val:0xb51a; 
   valaddr_reg:x3; val_offset:1236*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1236*FLEN/8, x4, x1, x2)

inst_619:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x11a and fs2 == 1 and fe2 == 0x0d and fm2 == 0x11a and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x351a; op2val:0xb51a; 
   valaddr_reg:x3; val_offset:1238*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1238*FLEN/8, x4, x1, x2)

inst_620:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x2da and fs2 == 1 and fe2 == 0x0a and fm2 == 0x2d8 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2ada; op2val:0xaad8; 
   valaddr_reg:x3; val_offset:1240*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1240*FLEN/8, x4, x1, x2)

inst_621:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x2da and fs2 == 1 and fe2 == 0x0a and fm2 == 0x2d8 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2ada; op2val:0xaad8; 
   valaddr_reg:x3; val_offset:1242*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1242*FLEN/8, x4, x1, x2)

inst_622:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x2da and fs2 == 1 and fe2 == 0x0a and fm2 == 0x2d8 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2ada; op2val:0xaad8; 
   valaddr_reg:x3; val_offset:1244*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1244*FLEN/8, x4, x1, x2)

inst_623:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x2da and fs2 == 1 and fe2 == 0x0a and fm2 == 0x2d8 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2ada; op2val:0xaad8; 
   valaddr_reg:x3; val_offset:1246*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1246*FLEN/8, x4, x1, x2)

inst_624:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x2da and fs2 == 1 and fe2 == 0x0a and fm2 == 0x2d8 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2ada; op2val:0xaad8; 
   valaddr_reg:x3; val_offset:1248*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1248*FLEN/8, x4, x1, x2)

inst_625:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x1c5 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x1c4 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2dc5; op2val:0xadc4; 
   valaddr_reg:x3; val_offset:1250*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1250*FLEN/8, x4, x1, x2)

inst_626:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x1c5 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x1c4 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2dc5; op2val:0xadc4; 
   valaddr_reg:x3; val_offset:1252*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1252*FLEN/8, x4, x1, x2)

inst_627:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x1c5 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x1c4 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2dc5; op2val:0xadc4; 
   valaddr_reg:x3; val_offset:1254*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1254*FLEN/8, x4, x1, x2)

inst_628:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x1c5 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x1c4 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2dc5; op2val:0xadc4; 
   valaddr_reg:x3; val_offset:1256*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1256*FLEN/8, x4, x1, x2)

inst_629:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x1c5 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x1c4 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2dc5; op2val:0xadc4; 
   valaddr_reg:x3; val_offset:1258*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1258*FLEN/8, x4, x1, x2)

inst_630:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x003 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x003 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3403; op2val:0xb403; 
   valaddr_reg:x3; val_offset:1260*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1260*FLEN/8, x4, x1, x2)

inst_631:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x003 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x003 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3403; op2val:0xb403; 
   valaddr_reg:x3; val_offset:1262*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1262*FLEN/8, x4, x1, x2)

inst_632:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x003 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x003 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3403; op2val:0xb403; 
   valaddr_reg:x3; val_offset:1264*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1264*FLEN/8, x4, x1, x2)

inst_633:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x003 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x003 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3403; op2val:0xb403; 
   valaddr_reg:x3; val_offset:1266*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1266*FLEN/8, x4, x1, x2)

inst_634:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x003 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x003 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3403; op2val:0xb403; 
   valaddr_reg:x3; val_offset:1268*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1268*FLEN/8, x4, x1, x2)

inst_635:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x183 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x183 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3583; op2val:0xb583; 
   valaddr_reg:x3; val_offset:1270*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1270*FLEN/8, x4, x1, x2)

inst_636:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x183 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x183 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3583; op2val:0xb583; 
   valaddr_reg:x3; val_offset:1272*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1272*FLEN/8, x4, x1, x2)

inst_637:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x183 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x183 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3583; op2val:0xb583; 
   valaddr_reg:x3; val_offset:1274*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1274*FLEN/8, x4, x1, x2)

inst_638:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x183 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x183 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3583; op2val:0xb583; 
   valaddr_reg:x3; val_offset:1276*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1276*FLEN/8, x4, x1, x2)

inst_639:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x183 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x183 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3583; op2val:0xb583; 
   valaddr_reg:x3; val_offset:1278*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1278*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_6)

inst_640:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x23a and fs2 == 1 and fe2 == 0x0b and fm2 == 0x239 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2e3a; op2val:0xae39; 
   valaddr_reg:x3; val_offset:1280*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1280*FLEN/8, x4, x1, x2)

inst_641:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x23a and fs2 == 1 and fe2 == 0x0b and fm2 == 0x239 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2e3a; op2val:0xae39; 
   valaddr_reg:x3; val_offset:1282*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1282*FLEN/8, x4, x1, x2)

inst_642:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x23a and fs2 == 1 and fe2 == 0x0b and fm2 == 0x239 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2e3a; op2val:0xae39; 
   valaddr_reg:x3; val_offset:1284*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1284*FLEN/8, x4, x1, x2)

inst_643:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x23a and fs2 == 1 and fe2 == 0x0b and fm2 == 0x239 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2e3a; op2val:0xae39; 
   valaddr_reg:x3; val_offset:1286*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1286*FLEN/8, x4, x1, x2)

inst_644:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x23a and fs2 == 1 and fe2 == 0x0b and fm2 == 0x239 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2e3a; op2val:0xae39; 
   valaddr_reg:x3; val_offset:1288*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1288*FLEN/8, x4, x1, x2)

inst_645:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x105 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x105 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3905; op2val:0xb905; 
   valaddr_reg:x3; val_offset:1290*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1290*FLEN/8, x4, x1, x2)

inst_646:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x105 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x105 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3905; op2val:0xb905; 
   valaddr_reg:x3; val_offset:1292*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1292*FLEN/8, x4, x1, x2)

inst_647:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x105 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x105 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3905; op2val:0xb905; 
   valaddr_reg:x3; val_offset:1294*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1294*FLEN/8, x4, x1, x2)

inst_648:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x105 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x105 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3905; op2val:0xb905; 
   valaddr_reg:x3; val_offset:1296*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1296*FLEN/8, x4, x1, x2)

inst_649:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x105 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x105 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3905; op2val:0xb905; 
   valaddr_reg:x3; val_offset:1298*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1298*FLEN/8, x4, x1, x2)

inst_650:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x256 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x256 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a56; op2val:0xba56; 
   valaddr_reg:x3; val_offset:1300*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1300*FLEN/8, x4, x1, x2)

inst_651:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x256 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x256 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a56; op2val:0xba56; 
   valaddr_reg:x3; val_offset:1302*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1302*FLEN/8, x4, x1, x2)

inst_652:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x256 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x256 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a56; op2val:0xba56; 
   valaddr_reg:x3; val_offset:1304*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1304*FLEN/8, x4, x1, x2)

inst_653:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x256 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x256 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a56; op2val:0xba56; 
   valaddr_reg:x3; val_offset:1306*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1306*FLEN/8, x4, x1, x2)

inst_654:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x256 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x256 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a56; op2val:0xba56; 
   valaddr_reg:x3; val_offset:1308*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1308*FLEN/8, x4, x1, x2)

inst_655:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3ed and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3ed and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bed; op2val:0xbbed; 
   valaddr_reg:x3; val_offset:1310*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1310*FLEN/8, x4, x1, x2)

inst_656:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3ed and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3ed and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bed; op2val:0xbbed; 
   valaddr_reg:x3; val_offset:1312*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1312*FLEN/8, x4, x1, x2)

inst_657:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3ed and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3ed and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bed; op2val:0xbbed; 
   valaddr_reg:x3; val_offset:1314*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1314*FLEN/8, x4, x1, x2)

inst_658:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3ed and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3ed and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bed; op2val:0xbbed; 
   valaddr_reg:x3; val_offset:1316*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1316*FLEN/8, x4, x1, x2)

inst_659:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3ed and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3ed and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bed; op2val:0xbbed; 
   valaddr_reg:x3; val_offset:1318*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1318*FLEN/8, x4, x1, x2)

inst_660:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x155 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x155 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3955; op2val:0xb955; 
   valaddr_reg:x3; val_offset:1320*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1320*FLEN/8, x4, x1, x2)

inst_661:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x155 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x155 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3955; op2val:0xb955; 
   valaddr_reg:x3; val_offset:1322*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1322*FLEN/8, x4, x1, x2)

inst_662:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x155 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x155 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3955; op2val:0xb955; 
   valaddr_reg:x3; val_offset:1324*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1324*FLEN/8, x4, x1, x2)

inst_663:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x155 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x155 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3955; op2val:0xb955; 
   valaddr_reg:x3; val_offset:1326*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1326*FLEN/8, x4, x1, x2)

inst_664:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x155 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x155 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3955; op2val:0xb955; 
   valaddr_reg:x3; val_offset:1328*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1328*FLEN/8, x4, x1, x2)

inst_665:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x081 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x080 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3481; op2val:0xb480; 
   valaddr_reg:x3; val_offset:1330*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1330*FLEN/8, x4, x1, x2)

inst_666:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x081 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x080 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3481; op2val:0xb480; 
   valaddr_reg:x3; val_offset:1332*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1332*FLEN/8, x4, x1, x2)

inst_667:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x081 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x080 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3481; op2val:0xb480; 
   valaddr_reg:x3; val_offset:1334*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1334*FLEN/8, x4, x1, x2)

inst_668:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x081 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x080 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3481; op2val:0xb480; 
   valaddr_reg:x3; val_offset:1336*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1336*FLEN/8, x4, x1, x2)

inst_669:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x081 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x080 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3481; op2val:0xb480; 
   valaddr_reg:x3; val_offset:1338*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1338*FLEN/8, x4, x1, x2)

inst_670:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x212 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x212 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3612; op2val:0xb612; 
   valaddr_reg:x3; val_offset:1340*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1340*FLEN/8, x4, x1, x2)

inst_671:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x212 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x212 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3612; op2val:0xb612; 
   valaddr_reg:x3; val_offset:1342*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1342*FLEN/8, x4, x1, x2)

inst_672:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x212 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x212 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3612; op2val:0xb612; 
   valaddr_reg:x3; val_offset:1344*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1344*FLEN/8, x4, x1, x2)

inst_673:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x212 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x212 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3612; op2val:0xb612; 
   valaddr_reg:x3; val_offset:1346*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1346*FLEN/8, x4, x1, x2)

inst_674:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x212 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x212 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3612; op2val:0xb612; 
   valaddr_reg:x3; val_offset:1348*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1348*FLEN/8, x4, x1, x2)

inst_675:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2b0 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2b0 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3ab0; op2val:0xbab0; 
   valaddr_reg:x3; val_offset:1350*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1350*FLEN/8, x4, x1, x2)

inst_676:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2b0 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2b0 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3ab0; op2val:0xbab0; 
   valaddr_reg:x3; val_offset:1352*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1352*FLEN/8, x4, x1, x2)

inst_677:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2b0 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2b0 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3ab0; op2val:0xbab0; 
   valaddr_reg:x3; val_offset:1354*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1354*FLEN/8, x4, x1, x2)

inst_678:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2b0 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2b0 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3ab0; op2val:0xbab0; 
   valaddr_reg:x3; val_offset:1356*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1356*FLEN/8, x4, x1, x2)

inst_679:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2b0 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2b0 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3ab0; op2val:0xbab0; 
   valaddr_reg:x3; val_offset:1358*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1358*FLEN/8, x4, x1, x2)

inst_680:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1af and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1ae and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39af; op2val:0xb9ae; 
   valaddr_reg:x3; val_offset:1360*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1360*FLEN/8, x4, x1, x2)

inst_681:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1af and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1ae and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39af; op2val:0xb9ae; 
   valaddr_reg:x3; val_offset:1362*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1362*FLEN/8, x4, x1, x2)

inst_682:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1af and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1ae and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39af; op2val:0xb9ae; 
   valaddr_reg:x3; val_offset:1364*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1364*FLEN/8, x4, x1, x2)

inst_683:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1af and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1ae and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39af; op2val:0xb9ae; 
   valaddr_reg:x3; val_offset:1366*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1366*FLEN/8, x4, x1, x2)

inst_684:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1af and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1ae and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39af; op2val:0xb9ae; 
   valaddr_reg:x3; val_offset:1368*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1368*FLEN/8, x4, x1, x2)

inst_685:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x339 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x339 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3739; op2val:0xb739; 
   valaddr_reg:x3; val_offset:1370*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1370*FLEN/8, x4, x1, x2)

inst_686:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x339 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x339 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3739; op2val:0xb739; 
   valaddr_reg:x3; val_offset:1372*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1372*FLEN/8, x4, x1, x2)

inst_687:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x339 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x339 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3739; op2val:0xb739; 
   valaddr_reg:x3; val_offset:1374*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1374*FLEN/8, x4, x1, x2)

inst_688:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x339 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x339 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3739; op2val:0xb739; 
   valaddr_reg:x3; val_offset:1376*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1376*FLEN/8, x4, x1, x2)

inst_689:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x339 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x339 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3739; op2val:0xb739; 
   valaddr_reg:x3; val_offset:1378*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1378*FLEN/8, x4, x1, x2)

inst_690:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x02c and fs2 == 1 and fe2 == 0x0e and fm2 == 0x02c and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x382c; op2val:0xb82c; 
   valaddr_reg:x3; val_offset:1380*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1380*FLEN/8, x4, x1, x2)

inst_691:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x02c and fs2 == 1 and fe2 == 0x0e and fm2 == 0x02c and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x382c; op2val:0xb82c; 
   valaddr_reg:x3; val_offset:1382*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1382*FLEN/8, x4, x1, x2)

inst_692:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x02c and fs2 == 1 and fe2 == 0x0e and fm2 == 0x02c and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x382c; op2val:0xb82c; 
   valaddr_reg:x3; val_offset:1384*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1384*FLEN/8, x4, x1, x2)

inst_693:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x02c and fs2 == 1 and fe2 == 0x0e and fm2 == 0x02c and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x382c; op2val:0xb82c; 
   valaddr_reg:x3; val_offset:1386*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1386*FLEN/8, x4, x1, x2)

inst_694:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x02c and fs2 == 1 and fe2 == 0x0e and fm2 == 0x02c and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x382c; op2val:0xb82c; 
   valaddr_reg:x3; val_offset:1388*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1388*FLEN/8, x4, x1, x2)

inst_695:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x39d and fs2 == 1 and fe2 == 0x0e and fm2 == 0x39d and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b9d; op2val:0xbb9d; 
   valaddr_reg:x3; val_offset:1390*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1390*FLEN/8, x4, x1, x2)

inst_696:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x39d and fs2 == 1 and fe2 == 0x0e and fm2 == 0x39d and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b9d; op2val:0xbb9d; 
   valaddr_reg:x3; val_offset:1392*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1392*FLEN/8, x4, x1, x2)

inst_697:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x39d and fs2 == 1 and fe2 == 0x0e and fm2 == 0x39d and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b9d; op2val:0xbb9d; 
   valaddr_reg:x3; val_offset:1394*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1394*FLEN/8, x4, x1, x2)

inst_698:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x39d and fs2 == 1 and fe2 == 0x0e and fm2 == 0x39d and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b9d; op2val:0xbb9d; 
   valaddr_reg:x3; val_offset:1396*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1396*FLEN/8, x4, x1, x2)

inst_699:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x39d and fs2 == 1 and fe2 == 0x0e and fm2 == 0x39d and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b9d; op2val:0xbb9d; 
   valaddr_reg:x3; val_offset:1398*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1398*FLEN/8, x4, x1, x2)

inst_700:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3a1 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x3a1 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37a1; op2val:0xb7a1; 
   valaddr_reg:x3; val_offset:1400*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1400*FLEN/8, x4, x1, x2)

inst_701:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3a1 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x3a1 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37a1; op2val:0xb7a1; 
   valaddr_reg:x3; val_offset:1402*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1402*FLEN/8, x4, x1, x2)

inst_702:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3a1 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x3a1 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37a1; op2val:0xb7a1; 
   valaddr_reg:x3; val_offset:1404*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1404*FLEN/8, x4, x1, x2)

inst_703:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3a1 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x3a1 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37a1; op2val:0xb7a1; 
   valaddr_reg:x3; val_offset:1406*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1406*FLEN/8, x4, x1, x2)

inst_704:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3a1 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x3a1 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37a1; op2val:0xb7a1; 
   valaddr_reg:x3; val_offset:1408*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1408*FLEN/8, x4, x1, x2)

inst_705:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0c6 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0c6 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38c6; op2val:0xb8c6; 
   valaddr_reg:x3; val_offset:1410*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1410*FLEN/8, x4, x1, x2)

inst_706:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0c6 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0c6 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38c6; op2val:0xb8c6; 
   valaddr_reg:x3; val_offset:1412*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1412*FLEN/8, x4, x1, x2)

inst_707:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0c6 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0c6 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38c6; op2val:0xb8c6; 
   valaddr_reg:x3; val_offset:1414*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1414*FLEN/8, x4, x1, x2)

inst_708:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0c6 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0c6 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38c6; op2val:0xb8c6; 
   valaddr_reg:x3; val_offset:1416*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1416*FLEN/8, x4, x1, x2)

inst_709:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0c6 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0c6 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38c6; op2val:0xb8c6; 
   valaddr_reg:x3; val_offset:1418*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1418*FLEN/8, x4, x1, x2)

inst_710:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0ae and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0ae and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38ae; op2val:0xb8ae; 
   valaddr_reg:x3; val_offset:1420*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1420*FLEN/8, x4, x1, x2)

inst_711:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0ae and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0ae and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38ae; op2val:0xb8ae; 
   valaddr_reg:x3; val_offset:1422*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1422*FLEN/8, x4, x1, x2)

inst_712:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0ae and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0ae and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38ae; op2val:0xb8ae; 
   valaddr_reg:x3; val_offset:1424*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1424*FLEN/8, x4, x1, x2)

inst_713:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0ae and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0ae and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38ae; op2val:0xb8ae; 
   valaddr_reg:x3; val_offset:1426*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1426*FLEN/8, x4, x1, x2)

inst_714:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0ae and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0ae and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38ae; op2val:0xb8ae; 
   valaddr_reg:x3; val_offset:1428*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1428*FLEN/8, x4, x1, x2)

inst_715:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x1d9 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x1d8 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2dd9; op2val:0xadd8; 
   valaddr_reg:x3; val_offset:1430*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1430*FLEN/8, x4, x1, x2)

inst_716:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x1d9 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x1d8 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2dd9; op2val:0xadd8; 
   valaddr_reg:x3; val_offset:1432*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1432*FLEN/8, x4, x1, x2)

inst_717:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x1d9 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x1d8 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2dd9; op2val:0xadd8; 
   valaddr_reg:x3; val_offset:1434*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1434*FLEN/8, x4, x1, x2)

inst_718:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x1d9 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x1d8 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2dd9; op2val:0xadd8; 
   valaddr_reg:x3; val_offset:1436*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1436*FLEN/8, x4, x1, x2)

inst_719:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x1d9 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x1d8 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2dd9; op2val:0xadd8; 
   valaddr_reg:x3; val_offset:1438*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1438*FLEN/8, x4, x1, x2)

inst_720:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x118 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x117 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3118; op2val:0xb117; 
   valaddr_reg:x3; val_offset:1440*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1440*FLEN/8, x4, x1, x2)

inst_721:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x118 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x117 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3118; op2val:0xb117; 
   valaddr_reg:x3; val_offset:1442*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1442*FLEN/8, x4, x1, x2)

inst_722:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x118 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x117 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3118; op2val:0xb117; 
   valaddr_reg:x3; val_offset:1444*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1444*FLEN/8, x4, x1, x2)

inst_723:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x118 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x117 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3118; op2val:0xb117; 
   valaddr_reg:x3; val_offset:1446*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1446*FLEN/8, x4, x1, x2)

inst_724:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x118 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x117 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3118; op2val:0xb117; 
   valaddr_reg:x3; val_offset:1448*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1448*FLEN/8, x4, x1, x2)

inst_725:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x140 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x140 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3940; op2val:0xb940; 
   valaddr_reg:x3; val_offset:1450*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1450*FLEN/8, x4, x1, x2)

inst_726:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x140 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x140 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3940; op2val:0xb940; 
   valaddr_reg:x3; val_offset:1452*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1452*FLEN/8, x4, x1, x2)

inst_727:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x140 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x140 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3940; op2val:0xb940; 
   valaddr_reg:x3; val_offset:1454*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1454*FLEN/8, x4, x1, x2)

inst_728:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x140 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x140 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3940; op2val:0xb940; 
   valaddr_reg:x3; val_offset:1456*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1456*FLEN/8, x4, x1, x2)

inst_729:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x140 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x140 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3940; op2val:0xb940; 
   valaddr_reg:x3; val_offset:1458*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1458*FLEN/8, x4, x1, x2)

inst_730:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0ce and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0ce and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x34ce; op2val:0xb4ce; 
   valaddr_reg:x3; val_offset:1460*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1460*FLEN/8, x4, x1, x2)

inst_731:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0ce and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0ce and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x34ce; op2val:0xb4ce; 
   valaddr_reg:x3; val_offset:1462*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1462*FLEN/8, x4, x1, x2)

inst_732:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0ce and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0ce and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x34ce; op2val:0xb4ce; 
   valaddr_reg:x3; val_offset:1464*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1464*FLEN/8, x4, x1, x2)

inst_733:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0ce and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0ce and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x34ce; op2val:0xb4ce; 
   valaddr_reg:x3; val_offset:1466*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1466*FLEN/8, x4, x1, x2)

inst_734:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0ce and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0ce and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x34ce; op2val:0xb4ce; 
   valaddr_reg:x3; val_offset:1468*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1468*FLEN/8, x4, x1, x2)

inst_735:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x195 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x195 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3995; op2val:0xb995; 
   valaddr_reg:x3; val_offset:1470*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1470*FLEN/8, x4, x1, x2)

inst_736:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x195 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x195 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3995; op2val:0xb995; 
   valaddr_reg:x3; val_offset:1472*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1472*FLEN/8, x4, x1, x2)

inst_737:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x195 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x195 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3995; op2val:0xb995; 
   valaddr_reg:x3; val_offset:1474*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1474*FLEN/8, x4, x1, x2)

inst_738:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x195 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x195 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3995; op2val:0xb995; 
   valaddr_reg:x3; val_offset:1476*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1476*FLEN/8, x4, x1, x2)

inst_739:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x195 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x195 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3995; op2val:0xb995; 
   valaddr_reg:x3; val_offset:1478*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1478*FLEN/8, x4, x1, x2)

inst_740:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x2c3 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x2c2 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2ec3; op2val:0xaec2; 
   valaddr_reg:x3; val_offset:1480*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1480*FLEN/8, x4, x1, x2)

inst_741:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x2c3 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x2c2 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2ec3; op2val:0xaec2; 
   valaddr_reg:x3; val_offset:1482*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1482*FLEN/8, x4, x1, x2)

inst_742:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x2c3 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x2c2 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2ec3; op2val:0xaec2; 
   valaddr_reg:x3; val_offset:1484*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1484*FLEN/8, x4, x1, x2)

inst_743:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x2c3 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x2c2 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2ec3; op2val:0xaec2; 
   valaddr_reg:x3; val_offset:1486*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1486*FLEN/8, x4, x1, x2)

inst_744:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x2c3 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x2c2 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2ec3; op2val:0xaec2; 
   valaddr_reg:x3; val_offset:1488*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1488*FLEN/8, x4, x1, x2)

inst_745:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1f9 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1f8 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35f9; op2val:0xb5f8; 
   valaddr_reg:x3; val_offset:1490*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1490*FLEN/8, x4, x1, x2)

inst_746:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1f9 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1f8 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35f9; op2val:0xb5f8; 
   valaddr_reg:x3; val_offset:1492*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1492*FLEN/8, x4, x1, x2)

inst_747:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1f9 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1f8 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35f9; op2val:0xb5f8; 
   valaddr_reg:x3; val_offset:1494*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1494*FLEN/8, x4, x1, x2)

inst_748:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1f9 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1f8 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35f9; op2val:0xb5f8; 
   valaddr_reg:x3; val_offset:1496*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1496*FLEN/8, x4, x1, x2)

inst_749:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1f9 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1f8 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35f9; op2val:0xb5f8; 
   valaddr_reg:x3; val_offset:1498*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1498*FLEN/8, x4, x1, x2)

inst_750:// fs1 == 0 and fe1 == 0x09 and fm1 == 0x287 and fs2 == 1 and fe2 == 0x09 and fm2 == 0x283 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2687; op2val:0xa683; 
   valaddr_reg:x3; val_offset:1500*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1500*FLEN/8, x4, x1, x2)

inst_751:// fs1 == 0 and fe1 == 0x09 and fm1 == 0x287 and fs2 == 1 and fe2 == 0x09 and fm2 == 0x283 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2687; op2val:0xa683; 
   valaddr_reg:x3; val_offset:1502*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1502*FLEN/8, x4, x1, x2)

inst_752:// fs1 == 0 and fe1 == 0x09 and fm1 == 0x287 and fs2 == 1 and fe2 == 0x09 and fm2 == 0x283 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2687; op2val:0xa683; 
   valaddr_reg:x3; val_offset:1504*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1504*FLEN/8, x4, x1, x2)

inst_753:// fs1 == 0 and fe1 == 0x09 and fm1 == 0x287 and fs2 == 1 and fe2 == 0x09 and fm2 == 0x283 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2687; op2val:0xa683; 
   valaddr_reg:x3; val_offset:1506*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1506*FLEN/8, x4, x1, x2)

inst_754:// fs1 == 0 and fe1 == 0x09 and fm1 == 0x287 and fs2 == 1 and fe2 == 0x09 and fm2 == 0x283 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2687; op2val:0xa683; 
   valaddr_reg:x3; val_offset:1508*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1508*FLEN/8, x4, x1, x2)

inst_755:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x379 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x379 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b79; op2val:0xbb79; 
   valaddr_reg:x3; val_offset:1510*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1510*FLEN/8, x4, x1, x2)

inst_756:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x379 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x379 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b79; op2val:0xbb79; 
   valaddr_reg:x3; val_offset:1512*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1512*FLEN/8, x4, x1, x2)

inst_757:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x379 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x379 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b79; op2val:0xbb79; 
   valaddr_reg:x3; val_offset:1514*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1514*FLEN/8, x4, x1, x2)

inst_758:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x379 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x379 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b79; op2val:0xbb79; 
   valaddr_reg:x3; val_offset:1516*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1516*FLEN/8, x4, x1, x2)

inst_759:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x379 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x379 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b79; op2val:0xbb79; 
   valaddr_reg:x3; val_offset:1518*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1518*FLEN/8, x4, x1, x2)

inst_760:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x000 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x000 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3400; op2val:0xb400; 
   valaddr_reg:x3; val_offset:1520*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1520*FLEN/8, x4, x1, x2)

inst_761:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x000 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x000 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3400; op2val:0xb400; 
   valaddr_reg:x3; val_offset:1522*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1522*FLEN/8, x4, x1, x2)

inst_762:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x000 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x000 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3400; op2val:0xb400; 
   valaddr_reg:x3; val_offset:1524*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1524*FLEN/8, x4, x1, x2)

inst_763:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x000 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x000 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3400; op2val:0xb400; 
   valaddr_reg:x3; val_offset:1526*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1526*FLEN/8, x4, x1, x2)

inst_764:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x000 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x000 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3400; op2val:0xb400; 
   valaddr_reg:x3; val_offset:1528*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1528*FLEN/8, x4, x1, x2)

inst_765:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3ef and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3ef and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bef; op2val:0xbbef; 
   valaddr_reg:x3; val_offset:1530*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1530*FLEN/8, x4, x1, x2)

inst_766:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3ef and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3ef and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bef; op2val:0xbbef; 
   valaddr_reg:x3; val_offset:1532*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1532*FLEN/8, x4, x1, x2)

inst_767:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3ef and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3ef and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bef; op2val:0xbbef; 
   valaddr_reg:x3; val_offset:1534*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1534*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_7)

inst_768:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3ef and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3ef and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bef; op2val:0xbbef; 
   valaddr_reg:x3; val_offset:1536*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1536*FLEN/8, x4, x1, x2)

inst_769:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3ef and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3ef and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bef; op2val:0xbbef; 
   valaddr_reg:x3; val_offset:1538*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1538*FLEN/8, x4, x1, x2)

inst_770:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3b2 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x3b2 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37b2; op2val:0xb7b2; 
   valaddr_reg:x3; val_offset:1540*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1540*FLEN/8, x4, x1, x2)

inst_771:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3b2 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x3b2 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37b2; op2val:0xb7b2; 
   valaddr_reg:x3; val_offset:1542*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1542*FLEN/8, x4, x1, x2)

inst_772:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3b2 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x3b2 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37b2; op2val:0xb7b2; 
   valaddr_reg:x3; val_offset:1544*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1544*FLEN/8, x4, x1, x2)

inst_773:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3b2 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x3b2 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37b2; op2val:0xb7b2; 
   valaddr_reg:x3; val_offset:1546*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1546*FLEN/8, x4, x1, x2)

inst_774:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3b2 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x3b2 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37b2; op2val:0xb7b2; 
   valaddr_reg:x3; val_offset:1548*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1548*FLEN/8, x4, x1, x2)

inst_775:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x017 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x017 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3817; op2val:0xb817; 
   valaddr_reg:x3; val_offset:1550*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1550*FLEN/8, x4, x1, x2)

inst_776:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x017 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x017 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3817; op2val:0xb817; 
   valaddr_reg:x3; val_offset:1552*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1552*FLEN/8, x4, x1, x2)

inst_777:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x017 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x017 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3817; op2val:0xb817; 
   valaddr_reg:x3; val_offset:1554*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1554*FLEN/8, x4, x1, x2)

inst_778:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x017 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x017 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3817; op2val:0xb817; 
   valaddr_reg:x3; val_offset:1556*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1556*FLEN/8, x4, x1, x2)

inst_779:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x017 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x017 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3817; op2val:0xb817; 
   valaddr_reg:x3; val_offset:1558*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1558*FLEN/8, x4, x1, x2)

inst_780:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x121 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x121 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3521; op2val:0xb521; 
   valaddr_reg:x3; val_offset:1560*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1560*FLEN/8, x4, x1, x2)

inst_781:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x121 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x121 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3521; op2val:0xb521; 
   valaddr_reg:x3; val_offset:1562*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1562*FLEN/8, x4, x1, x2)

inst_782:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x121 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x121 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3521; op2val:0xb521; 
   valaddr_reg:x3; val_offset:1564*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1564*FLEN/8, x4, x1, x2)

inst_783:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x121 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x121 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3521; op2val:0xb521; 
   valaddr_reg:x3; val_offset:1566*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1566*FLEN/8, x4, x1, x2)

inst_784:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x121 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x121 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3521; op2val:0xb521; 
   valaddr_reg:x3; val_offset:1568*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1568*FLEN/8, x4, x1, x2)

inst_785:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x10d and fs2 == 1 and fe2 == 0x0e and fm2 == 0x10d and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x390d; op2val:0xb90d; 
   valaddr_reg:x3; val_offset:1570*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1570*FLEN/8, x4, x1, x2)

inst_786:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x10d and fs2 == 1 and fe2 == 0x0e and fm2 == 0x10d and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x390d; op2val:0xb90d; 
   valaddr_reg:x3; val_offset:1572*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1572*FLEN/8, x4, x1, x2)

inst_787:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x10d and fs2 == 1 and fe2 == 0x0e and fm2 == 0x10d and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x390d; op2val:0xb90d; 
   valaddr_reg:x3; val_offset:1574*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1574*FLEN/8, x4, x1, x2)

inst_788:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x10d and fs2 == 1 and fe2 == 0x0e and fm2 == 0x10d and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x390d; op2val:0xb90d; 
   valaddr_reg:x3; val_offset:1576*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1576*FLEN/8, x4, x1, x2)

inst_789:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x10d and fs2 == 1 and fe2 == 0x0e and fm2 == 0x10d and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x390d; op2val:0xb90d; 
   valaddr_reg:x3; val_offset:1578*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1578*FLEN/8, x4, x1, x2)

inst_790:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1e9 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1e9 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39e9; op2val:0xb9e9; 
   valaddr_reg:x3; val_offset:1580*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1580*FLEN/8, x4, x1, x2)

inst_791:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1e9 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1e9 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39e9; op2val:0xb9e9; 
   valaddr_reg:x3; val_offset:1582*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1582*FLEN/8, x4, x1, x2)

inst_792:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1e9 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1e9 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39e9; op2val:0xb9e9; 
   valaddr_reg:x3; val_offset:1584*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1584*FLEN/8, x4, x1, x2)

inst_793:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1e9 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1e9 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39e9; op2val:0xb9e9; 
   valaddr_reg:x3; val_offset:1586*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1586*FLEN/8, x4, x1, x2)

inst_794:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1e9 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1e9 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39e9; op2val:0xb9e9; 
   valaddr_reg:x3; val_offset:1588*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1588*FLEN/8, x4, x1, x2)

inst_795:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x08c and fs2 == 1 and fe2 == 0x0e and fm2 == 0x08c and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x388c; op2val:0xb88c; 
   valaddr_reg:x3; val_offset:1590*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1590*FLEN/8, x4, x1, x2)

inst_796:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x08c and fs2 == 1 and fe2 == 0x0e and fm2 == 0x08c and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x388c; op2val:0xb88c; 
   valaddr_reg:x3; val_offset:1592*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1592*FLEN/8, x4, x1, x2)

inst_797:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x08c and fs2 == 1 and fe2 == 0x0e and fm2 == 0x08c and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x388c; op2val:0xb88c; 
   valaddr_reg:x3; val_offset:1594*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1594*FLEN/8, x4, x1, x2)

inst_798:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x08c and fs2 == 1 and fe2 == 0x0e and fm2 == 0x08c and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x388c; op2val:0xb88c; 
   valaddr_reg:x3; val_offset:1596*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1596*FLEN/8, x4, x1, x2)

inst_799:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x08c and fs2 == 1 and fe2 == 0x0e and fm2 == 0x08c and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x388c; op2val:0xb88c; 
   valaddr_reg:x3; val_offset:1598*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1598*FLEN/8, x4, x1, x2)

inst_800:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x37d and fs2 == 1 and fe2 == 0x0e and fm2 == 0x37d and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b7d; op2val:0xbb7d; 
   valaddr_reg:x3; val_offset:1600*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1600*FLEN/8, x4, x1, x2)

inst_801:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x37d and fs2 == 1 and fe2 == 0x0e and fm2 == 0x37d and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b7d; op2val:0xbb7d; 
   valaddr_reg:x3; val_offset:1602*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1602*FLEN/8, x4, x1, x2)

inst_802:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x37d and fs2 == 1 and fe2 == 0x0e and fm2 == 0x37d and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b7d; op2val:0xbb7d; 
   valaddr_reg:x3; val_offset:1604*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1604*FLEN/8, x4, x1, x2)

inst_803:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x37d and fs2 == 1 and fe2 == 0x0e and fm2 == 0x37d and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b7d; op2val:0xbb7d; 
   valaddr_reg:x3; val_offset:1606*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1606*FLEN/8, x4, x1, x2)

inst_804:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x37d and fs2 == 1 and fe2 == 0x0e and fm2 == 0x37d and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b7d; op2val:0xbb7d; 
   valaddr_reg:x3; val_offset:1608*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1608*FLEN/8, x4, x1, x2)

inst_805:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0c4 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0c4 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x34c4; op2val:0xb4c4; 
   valaddr_reg:x3; val_offset:1610*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1610*FLEN/8, x4, x1, x2)

inst_806:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0c4 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0c4 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x34c4; op2val:0xb4c4; 
   valaddr_reg:x3; val_offset:1612*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1612*FLEN/8, x4, x1, x2)

inst_807:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0c4 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0c4 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x34c4; op2val:0xb4c4; 
   valaddr_reg:x3; val_offset:1614*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1614*FLEN/8, x4, x1, x2)

inst_808:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0c4 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0c4 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x34c4; op2val:0xb4c4; 
   valaddr_reg:x3; val_offset:1616*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1616*FLEN/8, x4, x1, x2)

inst_809:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0c4 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0c4 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x34c4; op2val:0xb4c4; 
   valaddr_reg:x3; val_offset:1618*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1618*FLEN/8, x4, x1, x2)

inst_810:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x063 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x063 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3863; op2val:0xb863; 
   valaddr_reg:x3; val_offset:1620*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1620*FLEN/8, x4, x1, x2)

inst_811:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x063 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x063 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3863; op2val:0xb863; 
   valaddr_reg:x3; val_offset:1622*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1622*FLEN/8, x4, x1, x2)

inst_812:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x063 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x063 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3863; op2val:0xb863; 
   valaddr_reg:x3; val_offset:1624*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1624*FLEN/8, x4, x1, x2)

inst_813:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x063 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x063 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3863; op2val:0xb863; 
   valaddr_reg:x3; val_offset:1626*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1626*FLEN/8, x4, x1, x2)

inst_814:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x063 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x063 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3863; op2val:0xb863; 
   valaddr_reg:x3; val_offset:1628*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1628*FLEN/8, x4, x1, x2)

inst_815:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x30c and fs2 == 1 and fe2 == 0x0e and fm2 == 0x30c and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b0c; op2val:0xbb0c; 
   valaddr_reg:x3; val_offset:1630*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1630*FLEN/8, x4, x1, x2)

inst_816:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x30c and fs2 == 1 and fe2 == 0x0e and fm2 == 0x30c and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b0c; op2val:0xbb0c; 
   valaddr_reg:x3; val_offset:1632*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1632*FLEN/8, x4, x1, x2)

inst_817:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x30c and fs2 == 1 and fe2 == 0x0e and fm2 == 0x30c and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b0c; op2val:0xbb0c; 
   valaddr_reg:x3; val_offset:1634*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1634*FLEN/8, x4, x1, x2)

inst_818:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x30c and fs2 == 1 and fe2 == 0x0e and fm2 == 0x30c and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b0c; op2val:0xbb0c; 
   valaddr_reg:x3; val_offset:1636*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1636*FLEN/8, x4, x1, x2)

inst_819:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x30c and fs2 == 1 and fe2 == 0x0e and fm2 == 0x30c and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b0c; op2val:0xbb0c; 
   valaddr_reg:x3; val_offset:1638*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1638*FLEN/8, x4, x1, x2)

inst_820:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x257 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x257 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a57; op2val:0xba57; 
   valaddr_reg:x3; val_offset:1640*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1640*FLEN/8, x4, x1, x2)

inst_821:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x257 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x257 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a57; op2val:0xba57; 
   valaddr_reg:x3; val_offset:1642*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1642*FLEN/8, x4, x1, x2)

inst_822:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x257 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x257 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a57; op2val:0xba57; 
   valaddr_reg:x3; val_offset:1644*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1644*FLEN/8, x4, x1, x2)

inst_823:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x257 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x257 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a57; op2val:0xba57; 
   valaddr_reg:x3; val_offset:1646*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1646*FLEN/8, x4, x1, x2)

inst_824:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x257 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x257 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a57; op2val:0xba57; 
   valaddr_reg:x3; val_offset:1648*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1648*FLEN/8, x4, x1, x2)

inst_825:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x2ab and fs2 == 1 and fe2 == 0x0a and fm2 == 0x2a9 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2aab; op2val:0xaaa9; 
   valaddr_reg:x3; val_offset:1650*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1650*FLEN/8, x4, x1, x2)

inst_826:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x2ab and fs2 == 1 and fe2 == 0x0a and fm2 == 0x2a9 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2aab; op2val:0xaaa9; 
   valaddr_reg:x3; val_offset:1652*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1652*FLEN/8, x4, x1, x2)

inst_827:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x2ab and fs2 == 1 and fe2 == 0x0a and fm2 == 0x2a9 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2aab; op2val:0xaaa9; 
   valaddr_reg:x3; val_offset:1654*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1654*FLEN/8, x4, x1, x2)

inst_828:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x2ab and fs2 == 1 and fe2 == 0x0a and fm2 == 0x2a9 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2aab; op2val:0xaaa9; 
   valaddr_reg:x3; val_offset:1656*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1656*FLEN/8, x4, x1, x2)

inst_829:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x2ab and fs2 == 1 and fe2 == 0x0a and fm2 == 0x2a9 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2aab; op2val:0xaaa9; 
   valaddr_reg:x3; val_offset:1658*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1658*FLEN/8, x4, x1, x2)

inst_830:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0f9 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0f9 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38f9; op2val:0xb8f9; 
   valaddr_reg:x3; val_offset:1660*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1660*FLEN/8, x4, x1, x2)

inst_831:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0f9 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0f9 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38f9; op2val:0xb8f9; 
   valaddr_reg:x3; val_offset:1662*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1662*FLEN/8, x4, x1, x2)

inst_832:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0f9 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0f9 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38f9; op2val:0xb8f9; 
   valaddr_reg:x3; val_offset:1664*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1664*FLEN/8, x4, x1, x2)

inst_833:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0f9 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0f9 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38f9; op2val:0xb8f9; 
   valaddr_reg:x3; val_offset:1666*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1666*FLEN/8, x4, x1, x2)

inst_834:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0f9 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0f9 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38f9; op2val:0xb8f9; 
   valaddr_reg:x3; val_offset:1668*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1668*FLEN/8, x4, x1, x2)

inst_835:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2ca and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2c9 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3aca; op2val:0xbac9; 
   valaddr_reg:x3; val_offset:1670*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1670*FLEN/8, x4, x1, x2)

inst_836:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2ca and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2c9 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3aca; op2val:0xbac9; 
   valaddr_reg:x3; val_offset:1672*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1672*FLEN/8, x4, x1, x2)

inst_837:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2ca and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2c9 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3aca; op2val:0xbac9; 
   valaddr_reg:x3; val_offset:1674*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1674*FLEN/8, x4, x1, x2)

inst_838:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2ca and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2c9 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3aca; op2val:0xbac9; 
   valaddr_reg:x3; val_offset:1676*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1676*FLEN/8, x4, x1, x2)

inst_839:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2ca and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2c9 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3aca; op2val:0xbac9; 
   valaddr_reg:x3; val_offset:1678*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1678*FLEN/8, x4, x1, x2)

inst_840:// fs1 == 0 and fe1 == 0x09 and fm1 == 0x05f and fs2 == 1 and fe2 == 0x09 and fm2 == 0x05a and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x245f; op2val:0xa45a; 
   valaddr_reg:x3; val_offset:1680*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1680*FLEN/8, x4, x1, x2)

inst_841:// fs1 == 0 and fe1 == 0x09 and fm1 == 0x05f and fs2 == 1 and fe2 == 0x09 and fm2 == 0x05a and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x245f; op2val:0xa45a; 
   valaddr_reg:x3; val_offset:1682*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1682*FLEN/8, x4, x1, x2)

inst_842:// fs1 == 0 and fe1 == 0x09 and fm1 == 0x05f and fs2 == 1 and fe2 == 0x09 and fm2 == 0x05a and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x245f; op2val:0xa45a; 
   valaddr_reg:x3; val_offset:1684*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1684*FLEN/8, x4, x1, x2)

inst_843:// fs1 == 0 and fe1 == 0x09 and fm1 == 0x05f and fs2 == 1 and fe2 == 0x09 and fm2 == 0x05a and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x245f; op2val:0xa45a; 
   valaddr_reg:x3; val_offset:1686*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1686*FLEN/8, x4, x1, x2)

inst_844:// fs1 == 0 and fe1 == 0x09 and fm1 == 0x05f and fs2 == 1 and fe2 == 0x09 and fm2 == 0x05a and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x245f; op2val:0xa45a; 
   valaddr_reg:x3; val_offset:1688*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1688*FLEN/8, x4, x1, x2)

inst_845:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0c0 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0c0 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38c0; op2val:0xb8c0; 
   valaddr_reg:x3; val_offset:1690*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1690*FLEN/8, x4, x1, x2)

inst_846:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0c0 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0c0 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38c0; op2val:0xb8c0; 
   valaddr_reg:x3; val_offset:1692*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1692*FLEN/8, x4, x1, x2)

inst_847:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0c0 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0c0 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38c0; op2val:0xb8c0; 
   valaddr_reg:x3; val_offset:1694*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1694*FLEN/8, x4, x1, x2)

inst_848:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0c0 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0c0 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38c0; op2val:0xb8c0; 
   valaddr_reg:x3; val_offset:1696*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1696*FLEN/8, x4, x1, x2)

inst_849:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0c0 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0c0 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38c0; op2val:0xb8c0; 
   valaddr_reg:x3; val_offset:1698*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1698*FLEN/8, x4, x1, x2)

inst_850:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x3d5 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x3d4 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2fd5; op2val:0xafd4; 
   valaddr_reg:x3; val_offset:1700*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1700*FLEN/8, x4, x1, x2)

inst_851:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x3d5 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x3d4 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2fd5; op2val:0xafd4; 
   valaddr_reg:x3; val_offset:1702*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1702*FLEN/8, x4, x1, x2)

inst_852:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x3d5 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x3d4 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2fd5; op2val:0xafd4; 
   valaddr_reg:x3; val_offset:1704*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1704*FLEN/8, x4, x1, x2)

inst_853:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x3d5 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x3d4 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2fd5; op2val:0xafd4; 
   valaddr_reg:x3; val_offset:1706*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1706*FLEN/8, x4, x1, x2)

inst_854:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x3d5 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x3d4 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2fd5; op2val:0xafd4; 
   valaddr_reg:x3; val_offset:1708*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1708*FLEN/8, x4, x1, x2)

inst_855:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x150 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x14f and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2d50; op2val:0xad4f; 
   valaddr_reg:x3; val_offset:1710*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1710*FLEN/8, x4, x1, x2)

inst_856:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x150 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x14f and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2d50; op2val:0xad4f; 
   valaddr_reg:x3; val_offset:1712*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1712*FLEN/8, x4, x1, x2)

inst_857:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x150 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x14f and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2d50; op2val:0xad4f; 
   valaddr_reg:x3; val_offset:1714*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1714*FLEN/8, x4, x1, x2)

inst_858:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x150 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x14f and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2d50; op2val:0xad4f; 
   valaddr_reg:x3; val_offset:1716*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1716*FLEN/8, x4, x1, x2)

inst_859:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x150 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x14f and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2d50; op2val:0xad4f; 
   valaddr_reg:x3; val_offset:1718*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1718*FLEN/8, x4, x1, x2)

inst_860:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x003 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x003 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3803; op2val:0xb803; 
   valaddr_reg:x3; val_offset:1720*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1720*FLEN/8, x4, x1, x2)

inst_861:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x003 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x003 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3803; op2val:0xb803; 
   valaddr_reg:x3; val_offset:1722*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1722*FLEN/8, x4, x1, x2)

inst_862:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x003 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x003 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3803; op2val:0xb803; 
   valaddr_reg:x3; val_offset:1724*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1724*FLEN/8, x4, x1, x2)

inst_863:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x003 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x003 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3803; op2val:0xb803; 
   valaddr_reg:x3; val_offset:1726*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1726*FLEN/8, x4, x1, x2)

inst_864:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x003 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x003 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3803; op2val:0xb803; 
   valaddr_reg:x3; val_offset:1728*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1728*FLEN/8, x4, x1, x2)

inst_865:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x147 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x147 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3547; op2val:0xb547; 
   valaddr_reg:x3; val_offset:1730*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1730*FLEN/8, x4, x1, x2)

inst_866:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x147 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x147 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3547; op2val:0xb547; 
   valaddr_reg:x3; val_offset:1732*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1732*FLEN/8, x4, x1, x2)

inst_867:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x147 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x147 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3547; op2val:0xb547; 
   valaddr_reg:x3; val_offset:1734*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1734*FLEN/8, x4, x1, x2)

inst_868:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x147 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x147 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3547; op2val:0xb547; 
   valaddr_reg:x3; val_offset:1736*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1736*FLEN/8, x4, x1, x2)

inst_869:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x147 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x147 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3547; op2val:0xb547; 
   valaddr_reg:x3; val_offset:1738*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1738*FLEN/8, x4, x1, x2)

inst_870:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x23e and fs2 == 1 and fe2 == 0x0d and fm2 == 0x23e and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x363e; op2val:0xb63e; 
   valaddr_reg:x3; val_offset:1740*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1740*FLEN/8, x4, x1, x2)

inst_871:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x23e and fs2 == 1 and fe2 == 0x0d and fm2 == 0x23e and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x363e; op2val:0xb63e; 
   valaddr_reg:x3; val_offset:1742*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1742*FLEN/8, x4, x1, x2)

inst_872:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x23e and fs2 == 1 and fe2 == 0x0d and fm2 == 0x23e and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x363e; op2val:0xb63e; 
   valaddr_reg:x3; val_offset:1744*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1744*FLEN/8, x4, x1, x2)

inst_873:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x23e and fs2 == 1 and fe2 == 0x0d and fm2 == 0x23e and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x363e; op2val:0xb63e; 
   valaddr_reg:x3; val_offset:1746*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1746*FLEN/8, x4, x1, x2)

inst_874:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x23e and fs2 == 1 and fe2 == 0x0d and fm2 == 0x23e and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x363e; op2val:0xb63e; 
   valaddr_reg:x3; val_offset:1748*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1748*FLEN/8, x4, x1, x2)

inst_875:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x147 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x147 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3947; op2val:0xb947; 
   valaddr_reg:x3; val_offset:1750*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1750*FLEN/8, x4, x1, x2)

inst_876:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x147 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x147 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3947; op2val:0xb947; 
   valaddr_reg:x3; val_offset:1752*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1752*FLEN/8, x4, x1, x2)

inst_877:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x147 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x147 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3947; op2val:0xb947; 
   valaddr_reg:x3; val_offset:1754*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1754*FLEN/8, x4, x1, x2)

inst_878:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x147 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x147 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3947; op2val:0xb947; 
   valaddr_reg:x3; val_offset:1756*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1756*FLEN/8, x4, x1, x2)

inst_879:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x147 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x147 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3947; op2val:0xb947; 
   valaddr_reg:x3; val_offset:1758*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1758*FLEN/8, x4, x1, x2)

inst_880:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x277 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x276 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2e77; op2val:0xae76; 
   valaddr_reg:x3; val_offset:1760*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1760*FLEN/8, x4, x1, x2)

inst_881:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x277 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x276 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2e77; op2val:0xae76; 
   valaddr_reg:x3; val_offset:1762*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1762*FLEN/8, x4, x1, x2)

inst_882:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x277 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x276 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2e77; op2val:0xae76; 
   valaddr_reg:x3; val_offset:1764*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1764*FLEN/8, x4, x1, x2)

inst_883:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x277 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x276 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2e77; op2val:0xae76; 
   valaddr_reg:x3; val_offset:1766*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1766*FLEN/8, x4, x1, x2)

inst_884:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x277 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x276 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2e77; op2val:0xae76; 
   valaddr_reg:x3; val_offset:1768*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1768*FLEN/8, x4, x1, x2)

inst_885:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3b7 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3b7 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bb7; op2val:0xbbb7; 
   valaddr_reg:x3; val_offset:1770*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1770*FLEN/8, x4, x1, x2)

inst_886:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3b7 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3b7 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bb7; op2val:0xbbb7; 
   valaddr_reg:x3; val_offset:1772*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1772*FLEN/8, x4, x1, x2)

inst_887:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3b7 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3b7 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bb7; op2val:0xbbb7; 
   valaddr_reg:x3; val_offset:1774*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1774*FLEN/8, x4, x1, x2)

inst_888:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3b7 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3b7 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bb7; op2val:0xbbb7; 
   valaddr_reg:x3; val_offset:1776*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1776*FLEN/8, x4, x1, x2)

inst_889:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3b7 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3b7 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bb7; op2val:0xbbb7; 
   valaddr_reg:x3; val_offset:1778*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1778*FLEN/8, x4, x1, x2)

inst_890:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1f1 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1f1 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39f1; op2val:0xb9f1; 
   valaddr_reg:x3; val_offset:1780*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1780*FLEN/8, x4, x1, x2)

inst_891:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1f1 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1f1 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39f1; op2val:0xb9f1; 
   valaddr_reg:x3; val_offset:1782*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1782*FLEN/8, x4, x1, x2)

inst_892:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1f1 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1f1 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39f1; op2val:0xb9f1; 
   valaddr_reg:x3; val_offset:1784*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1784*FLEN/8, x4, x1, x2)

inst_893:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1f1 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1f1 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39f1; op2val:0xb9f1; 
   valaddr_reg:x3; val_offset:1786*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1786*FLEN/8, x4, x1, x2)

inst_894:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1f1 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1f1 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39f1; op2val:0xb9f1; 
   valaddr_reg:x3; val_offset:1788*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1788*FLEN/8, x4, x1, x2)

inst_895:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x10c and fs2 == 1 and fe2 == 0x0c and fm2 == 0x10b and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x310c; op2val:0xb10b; 
   valaddr_reg:x3; val_offset:1790*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1790*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_8)

inst_896:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x10c and fs2 == 1 and fe2 == 0x0c and fm2 == 0x10b and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x310c; op2val:0xb10b; 
   valaddr_reg:x3; val_offset:1792*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1792*FLEN/8, x4, x1, x2)

inst_897:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x10c and fs2 == 1 and fe2 == 0x0c and fm2 == 0x10b and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x310c; op2val:0xb10b; 
   valaddr_reg:x3; val_offset:1794*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1794*FLEN/8, x4, x1, x2)

inst_898:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x10c and fs2 == 1 and fe2 == 0x0c and fm2 == 0x10b and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x310c; op2val:0xb10b; 
   valaddr_reg:x3; val_offset:1796*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1796*FLEN/8, x4, x1, x2)

inst_899:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x10c and fs2 == 1 and fe2 == 0x0c and fm2 == 0x10b and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x310c; op2val:0xb10b; 
   valaddr_reg:x3; val_offset:1798*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1798*FLEN/8, x4, x1, x2)

inst_900:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x082 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x082 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3482; op2val:0xb482; 
   valaddr_reg:x3; val_offset:1800*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1800*FLEN/8, x4, x1, x2)

inst_901:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x082 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x082 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3482; op2val:0xb482; 
   valaddr_reg:x3; val_offset:1802*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1802*FLEN/8, x4, x1, x2)

inst_902:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x082 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x082 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3482; op2val:0xb482; 
   valaddr_reg:x3; val_offset:1804*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1804*FLEN/8, x4, x1, x2)

inst_903:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x082 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x082 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3482; op2val:0xb482; 
   valaddr_reg:x3; val_offset:1806*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1806*FLEN/8, x4, x1, x2)

inst_904:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x082 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x082 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3482; op2val:0xb482; 
   valaddr_reg:x3; val_offset:1808*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1808*FLEN/8, x4, x1, x2)

inst_905:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x378 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x377 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b78; op2val:0xbb77; 
   valaddr_reg:x3; val_offset:1810*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1810*FLEN/8, x4, x1, x2)

inst_906:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x378 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x377 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b78; op2val:0xbb77; 
   valaddr_reg:x3; val_offset:1812*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1812*FLEN/8, x4, x1, x2)

inst_907:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x378 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x377 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b78; op2val:0xbb77; 
   valaddr_reg:x3; val_offset:1814*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1814*FLEN/8, x4, x1, x2)

inst_908:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x378 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x377 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b78; op2val:0xbb77; 
   valaddr_reg:x3; val_offset:1816*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1816*FLEN/8, x4, x1, x2)

inst_909:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x378 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x377 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b78; op2val:0xbb77; 
   valaddr_reg:x3; val_offset:1818*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1818*FLEN/8, x4, x1, x2)

inst_910:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x032 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x031 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3032; op2val:0xb031; 
   valaddr_reg:x3; val_offset:1820*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1820*FLEN/8, x4, x1, x2)

inst_911:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x032 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x031 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3032; op2val:0xb031; 
   valaddr_reg:x3; val_offset:1822*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1822*FLEN/8, x4, x1, x2)

inst_912:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x032 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x031 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3032; op2val:0xb031; 
   valaddr_reg:x3; val_offset:1824*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1824*FLEN/8, x4, x1, x2)

inst_913:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x032 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x031 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3032; op2val:0xb031; 
   valaddr_reg:x3; val_offset:1826*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1826*FLEN/8, x4, x1, x2)

inst_914:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x032 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x031 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3032; op2val:0xb031; 
   valaddr_reg:x3; val_offset:1828*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1828*FLEN/8, x4, x1, x2)

inst_915:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x233 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x232 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a33; op2val:0xba32; 
   valaddr_reg:x3; val_offset:1830*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1830*FLEN/8, x4, x1, x2)

inst_916:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x233 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x232 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a33; op2val:0xba32; 
   valaddr_reg:x3; val_offset:1832*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1832*FLEN/8, x4, x1, x2)

inst_917:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x233 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x232 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a33; op2val:0xba32; 
   valaddr_reg:x3; val_offset:1834*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1834*FLEN/8, x4, x1, x2)

inst_918:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x233 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x232 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a33; op2val:0xba32; 
   valaddr_reg:x3; val_offset:1836*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1836*FLEN/8, x4, x1, x2)

inst_919:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x233 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x232 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a33; op2val:0xba32; 
   valaddr_reg:x3; val_offset:1838*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1838*FLEN/8, x4, x1, x2)

inst_920:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3e0 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3e0 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3be0; op2val:0xbbe0; 
   valaddr_reg:x3; val_offset:1840*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1840*FLEN/8, x4, x1, x2)

inst_921:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3e0 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3e0 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3be0; op2val:0xbbe0; 
   valaddr_reg:x3; val_offset:1842*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1842*FLEN/8, x4, x1, x2)

inst_922:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3e0 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3e0 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3be0; op2val:0xbbe0; 
   valaddr_reg:x3; val_offset:1844*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1844*FLEN/8, x4, x1, x2)

inst_923:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3e0 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3e0 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3be0; op2val:0xbbe0; 
   valaddr_reg:x3; val_offset:1846*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1846*FLEN/8, x4, x1, x2)

inst_924:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3e0 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3e0 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3be0; op2val:0xbbe0; 
   valaddr_reg:x3; val_offset:1848*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1848*FLEN/8, x4, x1, x2)

inst_925:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x15a and fs2 == 1 and fe2 == 0x0e and fm2 == 0x15a and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x395a; op2val:0xb95a; 
   valaddr_reg:x3; val_offset:1850*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1850*FLEN/8, x4, x1, x2)

inst_926:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x15a and fs2 == 1 and fe2 == 0x0e and fm2 == 0x15a and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x395a; op2val:0xb95a; 
   valaddr_reg:x3; val_offset:1852*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1852*FLEN/8, x4, x1, x2)

inst_927:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x15a and fs2 == 1 and fe2 == 0x0e and fm2 == 0x15a and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x395a; op2val:0xb95a; 
   valaddr_reg:x3; val_offset:1854*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1854*FLEN/8, x4, x1, x2)

inst_928:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x15a and fs2 == 1 and fe2 == 0x0e and fm2 == 0x15a and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x395a; op2val:0xb95a; 
   valaddr_reg:x3; val_offset:1856*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1856*FLEN/8, x4, x1, x2)

inst_929:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x15a and fs2 == 1 and fe2 == 0x0e and fm2 == 0x15a and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x395a; op2val:0xb95a; 
   valaddr_reg:x3; val_offset:1858*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1858*FLEN/8, x4, x1, x2)

inst_930:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2cf and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2cf and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3acf; op2val:0xbacf; 
   valaddr_reg:x3; val_offset:1860*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1860*FLEN/8, x4, x1, x2)

inst_931:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2cf and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2cf and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3acf; op2val:0xbacf; 
   valaddr_reg:x3; val_offset:1862*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1862*FLEN/8, x4, x1, x2)

inst_932:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2cf and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2cf and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3acf; op2val:0xbacf; 
   valaddr_reg:x3; val_offset:1864*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1864*FLEN/8, x4, x1, x2)

inst_933:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2cf and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2cf and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3acf; op2val:0xbacf; 
   valaddr_reg:x3; val_offset:1866*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1866*FLEN/8, x4, x1, x2)

inst_934:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2cf and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2cf and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3acf; op2val:0xbacf; 
   valaddr_reg:x3; val_offset:1868*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1868*FLEN/8, x4, x1, x2)

inst_935:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x007 and fs2 == 1 and fe2 == 0x0a and fm2 == 0x004 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2807; op2val:0xa804; 
   valaddr_reg:x3; val_offset:1870*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1870*FLEN/8, x4, x1, x2)

inst_936:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x007 and fs2 == 1 and fe2 == 0x0a and fm2 == 0x004 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2807; op2val:0xa804; 
   valaddr_reg:x3; val_offset:1872*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1872*FLEN/8, x4, x1, x2)

inst_937:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x007 and fs2 == 1 and fe2 == 0x0a and fm2 == 0x004 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2807; op2val:0xa804; 
   valaddr_reg:x3; val_offset:1874*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1874*FLEN/8, x4, x1, x2)

inst_938:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x007 and fs2 == 1 and fe2 == 0x0a and fm2 == 0x004 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2807; op2val:0xa804; 
   valaddr_reg:x3; val_offset:1876*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1876*FLEN/8, x4, x1, x2)

inst_939:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x007 and fs2 == 1 and fe2 == 0x0a and fm2 == 0x004 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2807; op2val:0xa804; 
   valaddr_reg:x3; val_offset:1878*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1878*FLEN/8, x4, x1, x2)

inst_940:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x255 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x254 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2e55; op2val:0xae54; 
   valaddr_reg:x3; val_offset:1880*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1880*FLEN/8, x4, x1, x2)

inst_941:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x255 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x254 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2e55; op2val:0xae54; 
   valaddr_reg:x3; val_offset:1882*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1882*FLEN/8, x4, x1, x2)

inst_942:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x255 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x254 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2e55; op2val:0xae54; 
   valaddr_reg:x3; val_offset:1884*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1884*FLEN/8, x4, x1, x2)

inst_943:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x255 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x254 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2e55; op2val:0xae54; 
   valaddr_reg:x3; val_offset:1886*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1886*FLEN/8, x4, x1, x2)

inst_944:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x255 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x254 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2e55; op2val:0xae54; 
   valaddr_reg:x3; val_offset:1888*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1888*FLEN/8, x4, x1, x2)

inst_945:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2d1 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x2d1 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36d1; op2val:0xb6d1; 
   valaddr_reg:x3; val_offset:1890*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1890*FLEN/8, x4, x1, x2)

inst_946:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2d1 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x2d1 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36d1; op2val:0xb6d1; 
   valaddr_reg:x3; val_offset:1892*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1892*FLEN/8, x4, x1, x2)

inst_947:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2d1 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x2d1 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36d1; op2val:0xb6d1; 
   valaddr_reg:x3; val_offset:1894*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1894*FLEN/8, x4, x1, x2)

inst_948:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2d1 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x2d1 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36d1; op2val:0xb6d1; 
   valaddr_reg:x3; val_offset:1896*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1896*FLEN/8, x4, x1, x2)

inst_949:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2d1 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x2d1 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36d1; op2val:0xb6d1; 
   valaddr_reg:x3; val_offset:1898*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1898*FLEN/8, x4, x1, x2)

inst_950:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x23c and fs2 == 1 and fe2 == 0x0c and fm2 == 0x23c and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x323c; op2val:0xb23c; 
   valaddr_reg:x3; val_offset:1900*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1900*FLEN/8, x4, x1, x2)

inst_951:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x23c and fs2 == 1 and fe2 == 0x0c and fm2 == 0x23c and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x323c; op2val:0xb23c; 
   valaddr_reg:x3; val_offset:1902*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1902*FLEN/8, x4, x1, x2)

inst_952:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x23c and fs2 == 1 and fe2 == 0x0c and fm2 == 0x23c and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x323c; op2val:0xb23c; 
   valaddr_reg:x3; val_offset:1904*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1904*FLEN/8, x4, x1, x2)

inst_953:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x23c and fs2 == 1 and fe2 == 0x0c and fm2 == 0x23c and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x323c; op2val:0xb23c; 
   valaddr_reg:x3; val_offset:1906*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1906*FLEN/8, x4, x1, x2)

inst_954:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x23c and fs2 == 1 and fe2 == 0x0c and fm2 == 0x23c and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x323c; op2val:0xb23c; 
   valaddr_reg:x3; val_offset:1908*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1908*FLEN/8, x4, x1, x2)

inst_955:// fs1 == 0 and fe1 == 0x08 and fm1 == 0x0e1 and fs2 == 1 and fe2 == 0x08 and fm2 == 0x0d8 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x20e1; op2val:0xa0d8; 
   valaddr_reg:x3; val_offset:1910*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1910*FLEN/8, x4, x1, x2)

inst_956:// fs1 == 0 and fe1 == 0x08 and fm1 == 0x0e1 and fs2 == 1 and fe2 == 0x08 and fm2 == 0x0d8 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x20e1; op2val:0xa0d8; 
   valaddr_reg:x3; val_offset:1912*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1912*FLEN/8, x4, x1, x2)

inst_957:// fs1 == 0 and fe1 == 0x08 and fm1 == 0x0e1 and fs2 == 1 and fe2 == 0x08 and fm2 == 0x0d8 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x20e1; op2val:0xa0d8; 
   valaddr_reg:x3; val_offset:1914*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1914*FLEN/8, x4, x1, x2)

inst_958:// fs1 == 0 and fe1 == 0x08 and fm1 == 0x0e1 and fs2 == 1 and fe2 == 0x08 and fm2 == 0x0d8 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x20e1; op2val:0xa0d8; 
   valaddr_reg:x3; val_offset:1916*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1916*FLEN/8, x4, x1, x2)

inst_959:// fs1 == 0 and fe1 == 0x08 and fm1 == 0x0e1 and fs2 == 1 and fe2 == 0x08 and fm2 == 0x0d8 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x20e1; op2val:0xa0d8; 
   valaddr_reg:x3; val_offset:1918*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1918*FLEN/8, x4, x1, x2)

inst_960:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x208 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x207 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2e08; op2val:0xae07; 
   valaddr_reg:x3; val_offset:1920*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1920*FLEN/8, x4, x1, x2)

inst_961:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x208 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x207 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2e08; op2val:0xae07; 
   valaddr_reg:x3; val_offset:1922*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1922*FLEN/8, x4, x1, x2)

inst_962:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x208 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x207 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2e08; op2val:0xae07; 
   valaddr_reg:x3; val_offset:1924*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1924*FLEN/8, x4, x1, x2)

inst_963:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x208 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x207 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2e08; op2val:0xae07; 
   valaddr_reg:x3; val_offset:1926*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1926*FLEN/8, x4, x1, x2)

inst_964:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x208 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x207 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2e08; op2val:0xae07; 
   valaddr_reg:x3; val_offset:1928*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1928*FLEN/8, x4, x1, x2)

inst_965:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x36f and fs2 == 1 and fe2 == 0x0d and fm2 == 0x36e and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x376f; op2val:0xb76e; 
   valaddr_reg:x3; val_offset:1930*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1930*FLEN/8, x4, x1, x2)

inst_966:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x36f and fs2 == 1 and fe2 == 0x0d and fm2 == 0x36e and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x376f; op2val:0xb76e; 
   valaddr_reg:x3; val_offset:1932*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1932*FLEN/8, x4, x1, x2)

inst_967:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x36f and fs2 == 1 and fe2 == 0x0d and fm2 == 0x36e and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x376f; op2val:0xb76e; 
   valaddr_reg:x3; val_offset:1934*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1934*FLEN/8, x4, x1, x2)

inst_968:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x36f and fs2 == 1 and fe2 == 0x0d and fm2 == 0x36e and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x376f; op2val:0xb76e; 
   valaddr_reg:x3; val_offset:1936*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1936*FLEN/8, x4, x1, x2)

inst_969:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x36f and fs2 == 1 and fe2 == 0x0d and fm2 == 0x36e and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x376f; op2val:0xb76e; 
   valaddr_reg:x3; val_offset:1938*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1938*FLEN/8, x4, x1, x2)

inst_970:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x194 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x193 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3194; op2val:0xb193; 
   valaddr_reg:x3; val_offset:1940*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1940*FLEN/8, x4, x1, x2)

inst_971:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x194 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x193 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3194; op2val:0xb193; 
   valaddr_reg:x3; val_offset:1942*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1942*FLEN/8, x4, x1, x2)

inst_972:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x194 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x193 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3194; op2val:0xb193; 
   valaddr_reg:x3; val_offset:1944*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1944*FLEN/8, x4, x1, x2)

inst_973:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x194 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x193 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3194; op2val:0xb193; 
   valaddr_reg:x3; val_offset:1946*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1946*FLEN/8, x4, x1, x2)

inst_974:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x194 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x193 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3194; op2val:0xb193; 
   valaddr_reg:x3; val_offset:1948*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1948*FLEN/8, x4, x1, x2)

inst_975:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2b0 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2af and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x32b0; op2val:0xb2af; 
   valaddr_reg:x3; val_offset:1950*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1950*FLEN/8, x4, x1, x2)

inst_976:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2b0 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2af and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x32b0; op2val:0xb2af; 
   valaddr_reg:x3; val_offset:1952*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1952*FLEN/8, x4, x1, x2)

inst_977:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2b0 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2af and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x32b0; op2val:0xb2af; 
   valaddr_reg:x3; val_offset:1954*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1954*FLEN/8, x4, x1, x2)

inst_978:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2b0 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2af and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x32b0; op2val:0xb2af; 
   valaddr_reg:x3; val_offset:1956*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1956*FLEN/8, x4, x1, x2)

inst_979:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2b0 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2af and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x32b0; op2val:0xb2af; 
   valaddr_reg:x3; val_offset:1958*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1958*FLEN/8, x4, x1, x2)

inst_980:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x29e and fs2 == 1 and fe2 == 0x0d and fm2 == 0x29e and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x369e; op2val:0xb69e; 
   valaddr_reg:x3; val_offset:1960*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1960*FLEN/8, x4, x1, x2)

inst_981:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x29e and fs2 == 1 and fe2 == 0x0d and fm2 == 0x29e and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x369e; op2val:0xb69e; 
   valaddr_reg:x3; val_offset:1962*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1962*FLEN/8, x4, x1, x2)

inst_982:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x29e and fs2 == 1 and fe2 == 0x0d and fm2 == 0x29e and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x369e; op2val:0xb69e; 
   valaddr_reg:x3; val_offset:1964*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1964*FLEN/8, x4, x1, x2)

inst_983:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x29e and fs2 == 1 and fe2 == 0x0d and fm2 == 0x29e and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x369e; op2val:0xb69e; 
   valaddr_reg:x3; val_offset:1966*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1966*FLEN/8, x4, x1, x2)

inst_984:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x29e and fs2 == 1 and fe2 == 0x0d and fm2 == 0x29e and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x369e; op2val:0xb69e; 
   valaddr_reg:x3; val_offset:1968*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1968*FLEN/8, x4, x1, x2)

inst_985:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x276 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x276 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3276; op2val:0xb276; 
   valaddr_reg:x3; val_offset:1970*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1970*FLEN/8, x4, x1, x2)

inst_986:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x276 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x276 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3276; op2val:0xb276; 
   valaddr_reg:x3; val_offset:1972*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1972*FLEN/8, x4, x1, x2)

inst_987:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x276 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x276 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3276; op2val:0xb276; 
   valaddr_reg:x3; val_offset:1974*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1974*FLEN/8, x4, x1, x2)

inst_988:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x276 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x276 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3276; op2val:0xb276; 
   valaddr_reg:x3; val_offset:1976*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1976*FLEN/8, x4, x1, x2)

inst_989:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x276 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x276 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3276; op2val:0xb276; 
   valaddr_reg:x3; val_offset:1978*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1978*FLEN/8, x4, x1, x2)

inst_990:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3ff and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3ff and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bff; op2val:0xbbff; 
   valaddr_reg:x3; val_offset:1980*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1980*FLEN/8, x4, x1, x2)

inst_991:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3ff and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3ff and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bff; op2val:0xbbff; 
   valaddr_reg:x3; val_offset:1982*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1982*FLEN/8, x4, x1, x2)

inst_992:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3ff and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3ff and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bff; op2val:0xbbff; 
   valaddr_reg:x3; val_offset:1984*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1984*FLEN/8, x4, x1, x2)

inst_993:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3ff and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3ff and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bff; op2val:0xbbff; 
   valaddr_reg:x3; val_offset:1986*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1986*FLEN/8, x4, x1, x2)

inst_994:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3ff and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3ff and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bff; op2val:0xbbff; 
   valaddr_reg:x3; val_offset:1988*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1988*FLEN/8, x4, x1, x2)

inst_995:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3e4 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x3e3 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37e4; op2val:0xb7e3; 
   valaddr_reg:x3; val_offset:1990*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 1990*FLEN/8, x4, x1, x2)

inst_996:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3e4 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x3e3 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37e4; op2val:0xb7e3; 
   valaddr_reg:x3; val_offset:1992*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 1992*FLEN/8, x4, x1, x2)

inst_997:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3e4 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x3e3 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37e4; op2val:0xb7e3; 
   valaddr_reg:x3; val_offset:1994*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 1994*FLEN/8, x4, x1, x2)

inst_998:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3e4 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x3e3 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37e4; op2val:0xb7e3; 
   valaddr_reg:x3; val_offset:1996*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 1996*FLEN/8, x4, x1, x2)

inst_999:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3e4 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x3e3 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37e4; op2val:0xb7e3; 
   valaddr_reg:x3; val_offset:1998*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 1998*FLEN/8, x4, x1, x2)

inst_1000:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x34f and fs2 == 1 and fe2 == 0x0a and fm2 == 0x34d and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2b4f; op2val:0xab4d; 
   valaddr_reg:x3; val_offset:2000*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2000*FLEN/8, x4, x1, x2)

inst_1001:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x34f and fs2 == 1 and fe2 == 0x0a and fm2 == 0x34d and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2b4f; op2val:0xab4d; 
   valaddr_reg:x3; val_offset:2002*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2002*FLEN/8, x4, x1, x2)

inst_1002:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x34f and fs2 == 1 and fe2 == 0x0a and fm2 == 0x34d and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2b4f; op2val:0xab4d; 
   valaddr_reg:x3; val_offset:2004*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2004*FLEN/8, x4, x1, x2)

inst_1003:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x34f and fs2 == 1 and fe2 == 0x0a and fm2 == 0x34d and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2b4f; op2val:0xab4d; 
   valaddr_reg:x3; val_offset:2006*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2006*FLEN/8, x4, x1, x2)

inst_1004:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x34f and fs2 == 1 and fe2 == 0x0a and fm2 == 0x34d and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2b4f; op2val:0xab4d; 
   valaddr_reg:x3; val_offset:2008*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2008*FLEN/8, x4, x1, x2)

inst_1005:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0bc and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0bc and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38bc; op2val:0xb8bc; 
   valaddr_reg:x3; val_offset:2010*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2010*FLEN/8, x4, x1, x2)

inst_1006:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0bc and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0bc and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38bc; op2val:0xb8bc; 
   valaddr_reg:x3; val_offset:2012*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2012*FLEN/8, x4, x1, x2)

inst_1007:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0bc and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0bc and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38bc; op2val:0xb8bc; 
   valaddr_reg:x3; val_offset:2014*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2014*FLEN/8, x4, x1, x2)

inst_1008:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0bc and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0bc and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38bc; op2val:0xb8bc; 
   valaddr_reg:x3; val_offset:2016*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2016*FLEN/8, x4, x1, x2)

inst_1009:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0bc and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0bc and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38bc; op2val:0xb8bc; 
   valaddr_reg:x3; val_offset:2018*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2018*FLEN/8, x4, x1, x2)

inst_1010:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x380 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x380 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b80; op2val:0xbb80; 
   valaddr_reg:x3; val_offset:2020*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2020*FLEN/8, x4, x1, x2)

inst_1011:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x380 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x380 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b80; op2val:0xbb80; 
   valaddr_reg:x3; val_offset:2022*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2022*FLEN/8, x4, x1, x2)

inst_1012:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x380 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x380 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b80; op2val:0xbb80; 
   valaddr_reg:x3; val_offset:2024*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2024*FLEN/8, x4, x1, x2)

inst_1013:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x380 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x380 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b80; op2val:0xbb80; 
   valaddr_reg:x3; val_offset:2026*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2026*FLEN/8, x4, x1, x2)

inst_1014:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x380 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x380 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b80; op2val:0xbb80; 
   valaddr_reg:x3; val_offset:2028*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2028*FLEN/8, x4, x1, x2)

inst_1015:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2fb and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2fb and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3afb; op2val:0xbafb; 
   valaddr_reg:x3; val_offset:2030*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2030*FLEN/8, x4, x1, x2)

inst_1016:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2fb and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2fb and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3afb; op2val:0xbafb; 
   valaddr_reg:x3; val_offset:2032*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2032*FLEN/8, x4, x1, x2)

inst_1017:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2fb and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2fb and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3afb; op2val:0xbafb; 
   valaddr_reg:x3; val_offset:2034*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2034*FLEN/8, x4, x1, x2)

inst_1018:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2fb and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2fb and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3afb; op2val:0xbafb; 
   valaddr_reg:x3; val_offset:2036*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2036*FLEN/8, x4, x1, x2)

inst_1019:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2fb and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2fb and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3afb; op2val:0xbafb; 
   valaddr_reg:x3; val_offset:2038*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2038*FLEN/8, x4, x1, x2)

inst_1020:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x171 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x171 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3171; op2val:0xb171; 
   valaddr_reg:x3; val_offset:2040*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2040*FLEN/8, x4, x1, x2)

inst_1021:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x171 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x171 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3171; op2val:0xb171; 
   valaddr_reg:x3; val_offset:2042*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2042*FLEN/8, x4, x1, x2)

inst_1022:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x171 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x171 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3171; op2val:0xb171; 
   valaddr_reg:x3; val_offset:2044*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2044*FLEN/8, x4, x1, x2)

inst_1023:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x171 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x171 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3171; op2val:0xb171; 
   valaddr_reg:x3; val_offset:2046*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2046*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_9)

inst_1024:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x171 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x171 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3171; op2val:0xb171; 
   valaddr_reg:x3; val_offset:2048*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2048*FLEN/8, x4, x1, x2)

inst_1025:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3b6 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3b6 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bb6; op2val:0xbbb6; 
   valaddr_reg:x3; val_offset:2050*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2050*FLEN/8, x4, x1, x2)

inst_1026:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3b6 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3b6 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bb6; op2val:0xbbb6; 
   valaddr_reg:x3; val_offset:2052*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2052*FLEN/8, x4, x1, x2)

inst_1027:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3b6 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3b6 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bb6; op2val:0xbbb6; 
   valaddr_reg:x3; val_offset:2054*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2054*FLEN/8, x4, x1, x2)

inst_1028:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3b6 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3b6 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bb6; op2val:0xbbb6; 
   valaddr_reg:x3; val_offset:2056*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2056*FLEN/8, x4, x1, x2)

inst_1029:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3b6 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3b6 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bb6; op2val:0xbbb6; 
   valaddr_reg:x3; val_offset:2058*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2058*FLEN/8, x4, x1, x2)

inst_1030:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x010 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x010 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3810; op2val:0xb810; 
   valaddr_reg:x3; val_offset:2060*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2060*FLEN/8, x4, x1, x2)

inst_1031:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x010 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x010 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3810; op2val:0xb810; 
   valaddr_reg:x3; val_offset:2062*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2062*FLEN/8, x4, x1, x2)

inst_1032:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x010 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x010 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3810; op2val:0xb810; 
   valaddr_reg:x3; val_offset:2064*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2064*FLEN/8, x4, x1, x2)

inst_1033:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x010 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x010 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3810; op2val:0xb810; 
   valaddr_reg:x3; val_offset:2066*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2066*FLEN/8, x4, x1, x2)

inst_1034:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x010 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x010 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3810; op2val:0xb810; 
   valaddr_reg:x3; val_offset:2068*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2068*FLEN/8, x4, x1, x2)

inst_1035:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x086 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x086 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3486; op2val:0xb486; 
   valaddr_reg:x3; val_offset:2070*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2070*FLEN/8, x4, x1, x2)

inst_1036:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x086 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x086 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3486; op2val:0xb486; 
   valaddr_reg:x3; val_offset:2072*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2072*FLEN/8, x4, x1, x2)

inst_1037:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x086 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x086 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3486; op2val:0xb486; 
   valaddr_reg:x3; val_offset:2074*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2074*FLEN/8, x4, x1, x2)

inst_1038:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x086 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x086 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3486; op2val:0xb486; 
   valaddr_reg:x3; val_offset:2076*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2076*FLEN/8, x4, x1, x2)

inst_1039:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x086 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x086 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3486; op2val:0xb486; 
   valaddr_reg:x3; val_offset:2078*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2078*FLEN/8, x4, x1, x2)

inst_1040:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0b6 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0b5 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38b6; op2val:0xb8b5; 
   valaddr_reg:x3; val_offset:2080*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2080*FLEN/8, x4, x1, x2)

inst_1041:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0b6 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0b5 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38b6; op2val:0xb8b5; 
   valaddr_reg:x3; val_offset:2082*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2082*FLEN/8, x4, x1, x2)

inst_1042:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0b6 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0b5 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38b6; op2val:0xb8b5; 
   valaddr_reg:x3; val_offset:2084*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2084*FLEN/8, x4, x1, x2)

inst_1043:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0b6 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0b5 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38b6; op2val:0xb8b5; 
   valaddr_reg:x3; val_offset:2086*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2086*FLEN/8, x4, x1, x2)

inst_1044:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0b6 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0b5 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38b6; op2val:0xb8b5; 
   valaddr_reg:x3; val_offset:2088*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2088*FLEN/8, x4, x1, x2)

inst_1045:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0e8 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0e7 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38e8; op2val:0xb8e7; 
   valaddr_reg:x3; val_offset:2090*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2090*FLEN/8, x4, x1, x2)

inst_1046:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0e8 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0e7 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38e8; op2val:0xb8e7; 
   valaddr_reg:x3; val_offset:2092*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2092*FLEN/8, x4, x1, x2)

inst_1047:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0e8 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0e7 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38e8; op2val:0xb8e7; 
   valaddr_reg:x3; val_offset:2094*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2094*FLEN/8, x4, x1, x2)

inst_1048:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0e8 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0e7 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38e8; op2val:0xb8e7; 
   valaddr_reg:x3; val_offset:2096*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2096*FLEN/8, x4, x1, x2)

inst_1049:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0e8 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0e7 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38e8; op2val:0xb8e7; 
   valaddr_reg:x3; val_offset:2098*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2098*FLEN/8, x4, x1, x2)

inst_1050:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x03b and fs2 == 1 and fe2 == 0x0e and fm2 == 0x03b and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x383b; op2val:0xb83b; 
   valaddr_reg:x3; val_offset:2100*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2100*FLEN/8, x4, x1, x2)

inst_1051:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x03b and fs2 == 1 and fe2 == 0x0e and fm2 == 0x03b and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x383b; op2val:0xb83b; 
   valaddr_reg:x3; val_offset:2102*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2102*FLEN/8, x4, x1, x2)

inst_1052:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x03b and fs2 == 1 and fe2 == 0x0e and fm2 == 0x03b and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x383b; op2val:0xb83b; 
   valaddr_reg:x3; val_offset:2104*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2104*FLEN/8, x4, x1, x2)

inst_1053:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x03b and fs2 == 1 and fe2 == 0x0e and fm2 == 0x03b and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x383b; op2val:0xb83b; 
   valaddr_reg:x3; val_offset:2106*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2106*FLEN/8, x4, x1, x2)

inst_1054:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x03b and fs2 == 1 and fe2 == 0x0e and fm2 == 0x03b and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x383b; op2val:0xb83b; 
   valaddr_reg:x3; val_offset:2108*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2108*FLEN/8, x4, x1, x2)

inst_1055:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3bd and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3bd and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bbd; op2val:0xbbbd; 
   valaddr_reg:x3; val_offset:2110*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2110*FLEN/8, x4, x1, x2)

inst_1056:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3bd and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3bd and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bbd; op2val:0xbbbd; 
   valaddr_reg:x3; val_offset:2112*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2112*FLEN/8, x4, x1, x2)

inst_1057:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3bd and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3bd and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bbd; op2val:0xbbbd; 
   valaddr_reg:x3; val_offset:2114*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2114*FLEN/8, x4, x1, x2)

inst_1058:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3bd and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3bd and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bbd; op2val:0xbbbd; 
   valaddr_reg:x3; val_offset:2116*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2116*FLEN/8, x4, x1, x2)

inst_1059:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3bd and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3bd and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bbd; op2val:0xbbbd; 
   valaddr_reg:x3; val_offset:2118*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2118*FLEN/8, x4, x1, x2)

inst_1060:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1eb and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1eb and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35eb; op2val:0xb5eb; 
   valaddr_reg:x3; val_offset:2120*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2120*FLEN/8, x4, x1, x2)

inst_1061:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1eb and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1eb and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35eb; op2val:0xb5eb; 
   valaddr_reg:x3; val_offset:2122*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2122*FLEN/8, x4, x1, x2)

inst_1062:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1eb and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1eb and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35eb; op2val:0xb5eb; 
   valaddr_reg:x3; val_offset:2124*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2124*FLEN/8, x4, x1, x2)

inst_1063:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1eb and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1eb and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35eb; op2val:0xb5eb; 
   valaddr_reg:x3; val_offset:2126*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2126*FLEN/8, x4, x1, x2)

inst_1064:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1eb and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1eb and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35eb; op2val:0xb5eb; 
   valaddr_reg:x3; val_offset:2128*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2128*FLEN/8, x4, x1, x2)

inst_1065:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x336 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x336 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3736; op2val:0xb736; 
   valaddr_reg:x3; val_offset:2130*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2130*FLEN/8, x4, x1, x2)

inst_1066:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x336 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x336 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3736; op2val:0xb736; 
   valaddr_reg:x3; val_offset:2132*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2132*FLEN/8, x4, x1, x2)

inst_1067:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x336 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x336 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3736; op2val:0xb736; 
   valaddr_reg:x3; val_offset:2134*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2134*FLEN/8, x4, x1, x2)

inst_1068:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x336 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x336 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3736; op2val:0xb736; 
   valaddr_reg:x3; val_offset:2136*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2136*FLEN/8, x4, x1, x2)

inst_1069:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x336 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x336 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3736; op2val:0xb736; 
   valaddr_reg:x3; val_offset:2138*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2138*FLEN/8, x4, x1, x2)

inst_1070:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0ee and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0ee and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38ee; op2val:0xb8ee; 
   valaddr_reg:x3; val_offset:2140*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2140*FLEN/8, x4, x1, x2)

inst_1071:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0ee and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0ee and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38ee; op2val:0xb8ee; 
   valaddr_reg:x3; val_offset:2142*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2142*FLEN/8, x4, x1, x2)

inst_1072:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0ee and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0ee and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38ee; op2val:0xb8ee; 
   valaddr_reg:x3; val_offset:2144*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2144*FLEN/8, x4, x1, x2)

inst_1073:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0ee and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0ee and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38ee; op2val:0xb8ee; 
   valaddr_reg:x3; val_offset:2146*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2146*FLEN/8, x4, x1, x2)

inst_1074:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0ee and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0ee and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38ee; op2val:0xb8ee; 
   valaddr_reg:x3; val_offset:2148*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2148*FLEN/8, x4, x1, x2)

inst_1075:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x013 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x013 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3813; op2val:0xb813; 
   valaddr_reg:x3; val_offset:2150*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2150*FLEN/8, x4, x1, x2)

inst_1076:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x013 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x013 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3813; op2val:0xb813; 
   valaddr_reg:x3; val_offset:2152*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2152*FLEN/8, x4, x1, x2)

inst_1077:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x013 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x013 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3813; op2val:0xb813; 
   valaddr_reg:x3; val_offset:2154*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2154*FLEN/8, x4, x1, x2)

inst_1078:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x013 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x013 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3813; op2val:0xb813; 
   valaddr_reg:x3; val_offset:2156*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2156*FLEN/8, x4, x1, x2)

inst_1079:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x013 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x013 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3813; op2val:0xb813; 
   valaddr_reg:x3; val_offset:2158*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2158*FLEN/8, x4, x1, x2)

inst_1080:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x23d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x23c and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x363d; op2val:0xb63c; 
   valaddr_reg:x3; val_offset:2160*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2160*FLEN/8, x4, x1, x2)

inst_1081:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x23d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x23c and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x363d; op2val:0xb63c; 
   valaddr_reg:x3; val_offset:2162*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2162*FLEN/8, x4, x1, x2)

inst_1082:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x23d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x23c and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x363d; op2val:0xb63c; 
   valaddr_reg:x3; val_offset:2164*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2164*FLEN/8, x4, x1, x2)

inst_1083:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x23d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x23c and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x363d; op2val:0xb63c; 
   valaddr_reg:x3; val_offset:2166*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2166*FLEN/8, x4, x1, x2)

inst_1084:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x23d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x23c and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x363d; op2val:0xb63c; 
   valaddr_reg:x3; val_offset:2168*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2168*FLEN/8, x4, x1, x2)

inst_1085:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1e2 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1e1 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35e2; op2val:0xb5e1; 
   valaddr_reg:x3; val_offset:2170*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2170*FLEN/8, x4, x1, x2)

inst_1086:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1e2 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1e1 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35e2; op2val:0xb5e1; 
   valaddr_reg:x3; val_offset:2172*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2172*FLEN/8, x4, x1, x2)

inst_1087:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1e2 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1e1 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35e2; op2val:0xb5e1; 
   valaddr_reg:x3; val_offset:2174*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2174*FLEN/8, x4, x1, x2)

inst_1088:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1e2 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1e1 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35e2; op2val:0xb5e1; 
   valaddr_reg:x3; val_offset:2176*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2176*FLEN/8, x4, x1, x2)

inst_1089:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1e2 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1e1 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35e2; op2val:0xb5e1; 
   valaddr_reg:x3; val_offset:2178*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2178*FLEN/8, x4, x1, x2)

inst_1090:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x301 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x301 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b01; op2val:0xbb01; 
   valaddr_reg:x3; val_offset:2180*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2180*FLEN/8, x4, x1, x2)

inst_1091:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x301 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x301 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b01; op2val:0xbb01; 
   valaddr_reg:x3; val_offset:2182*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2182*FLEN/8, x4, x1, x2)

inst_1092:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x301 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x301 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b01; op2val:0xbb01; 
   valaddr_reg:x3; val_offset:2184*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2184*FLEN/8, x4, x1, x2)

inst_1093:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x301 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x301 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b01; op2val:0xbb01; 
   valaddr_reg:x3; val_offset:2186*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2186*FLEN/8, x4, x1, x2)

inst_1094:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x301 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x301 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b01; op2val:0xbb01; 
   valaddr_reg:x3; val_offset:2188*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2188*FLEN/8, x4, x1, x2)

inst_1095:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x20c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x20c and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x360c; op2val:0xb60c; 
   valaddr_reg:x3; val_offset:2190*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2190*FLEN/8, x4, x1, x2)

inst_1096:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x20c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x20c and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x360c; op2val:0xb60c; 
   valaddr_reg:x3; val_offset:2192*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2192*FLEN/8, x4, x1, x2)

inst_1097:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x20c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x20c and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x360c; op2val:0xb60c; 
   valaddr_reg:x3; val_offset:2194*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2194*FLEN/8, x4, x1, x2)

inst_1098:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x20c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x20c and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x360c; op2val:0xb60c; 
   valaddr_reg:x3; val_offset:2196*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2196*FLEN/8, x4, x1, x2)

inst_1099:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x20c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x20c and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x360c; op2val:0xb60c; 
   valaddr_reg:x3; val_offset:2198*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2198*FLEN/8, x4, x1, x2)

inst_1100:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x26c and fs2 == 1 and fe2 == 0x0c and fm2 == 0x26b and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x326c; op2val:0xb26b; 
   valaddr_reg:x3; val_offset:2200*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2200*FLEN/8, x4, x1, x2)

inst_1101:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x26c and fs2 == 1 and fe2 == 0x0c and fm2 == 0x26b and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x326c; op2val:0xb26b; 
   valaddr_reg:x3; val_offset:2202*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2202*FLEN/8, x4, x1, x2)

inst_1102:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x26c and fs2 == 1 and fe2 == 0x0c and fm2 == 0x26b and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x326c; op2val:0xb26b; 
   valaddr_reg:x3; val_offset:2204*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2204*FLEN/8, x4, x1, x2)

inst_1103:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x26c and fs2 == 1 and fe2 == 0x0c and fm2 == 0x26b and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x326c; op2val:0xb26b; 
   valaddr_reg:x3; val_offset:2206*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2206*FLEN/8, x4, x1, x2)

inst_1104:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x26c and fs2 == 1 and fe2 == 0x0c and fm2 == 0x26b and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x326c; op2val:0xb26b; 
   valaddr_reg:x3; val_offset:2208*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2208*FLEN/8, x4, x1, x2)

inst_1105:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x014 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x014 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3014; op2val:0xb014; 
   valaddr_reg:x3; val_offset:2210*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2210*FLEN/8, x4, x1, x2)

inst_1106:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x014 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x014 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3014; op2val:0xb014; 
   valaddr_reg:x3; val_offset:2212*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2212*FLEN/8, x4, x1, x2)

inst_1107:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x014 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x014 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3014; op2val:0xb014; 
   valaddr_reg:x3; val_offset:2214*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2214*FLEN/8, x4, x1, x2)

inst_1108:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x014 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x014 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3014; op2val:0xb014; 
   valaddr_reg:x3; val_offset:2216*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2216*FLEN/8, x4, x1, x2)

inst_1109:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x014 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x014 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3014; op2val:0xb014; 
   valaddr_reg:x3; val_offset:2218*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2218*FLEN/8, x4, x1, x2)

inst_1110:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2dd and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2dd and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x32dd; op2val:0xb2dd; 
   valaddr_reg:x3; val_offset:2220*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2220*FLEN/8, x4, x1, x2)

inst_1111:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2dd and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2dd and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x32dd; op2val:0xb2dd; 
   valaddr_reg:x3; val_offset:2222*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2222*FLEN/8, x4, x1, x2)

inst_1112:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2dd and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2dd and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x32dd; op2val:0xb2dd; 
   valaddr_reg:x3; val_offset:2224*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2224*FLEN/8, x4, x1, x2)

inst_1113:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2dd and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2dd and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x32dd; op2val:0xb2dd; 
   valaddr_reg:x3; val_offset:2226*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2226*FLEN/8, x4, x1, x2)

inst_1114:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2dd and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2dd and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x32dd; op2val:0xb2dd; 
   valaddr_reg:x3; val_offset:2228*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2228*FLEN/8, x4, x1, x2)

inst_1115:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2f9 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2f8 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x32f9; op2val:0xb2f8; 
   valaddr_reg:x3; val_offset:2230*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2230*FLEN/8, x4, x1, x2)

inst_1116:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2f9 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2f8 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x32f9; op2val:0xb2f8; 
   valaddr_reg:x3; val_offset:2232*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2232*FLEN/8, x4, x1, x2)

inst_1117:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2f9 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2f8 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x32f9; op2val:0xb2f8; 
   valaddr_reg:x3; val_offset:2234*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2234*FLEN/8, x4, x1, x2)

inst_1118:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2f9 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2f8 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x32f9; op2val:0xb2f8; 
   valaddr_reg:x3; val_offset:2236*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2236*FLEN/8, x4, x1, x2)

inst_1119:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2f9 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2f8 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x32f9; op2val:0xb2f8; 
   valaddr_reg:x3; val_offset:2238*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2238*FLEN/8, x4, x1, x2)

inst_1120:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3ca and fs2 == 1 and fe2 == 0x0c and fm2 == 0x3c9 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x33ca; op2val:0xb3c9; 
   valaddr_reg:x3; val_offset:2240*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2240*FLEN/8, x4, x1, x2)

inst_1121:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3ca and fs2 == 1 and fe2 == 0x0c and fm2 == 0x3c9 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x33ca; op2val:0xb3c9; 
   valaddr_reg:x3; val_offset:2242*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2242*FLEN/8, x4, x1, x2)

inst_1122:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3ca and fs2 == 1 and fe2 == 0x0c and fm2 == 0x3c9 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x33ca; op2val:0xb3c9; 
   valaddr_reg:x3; val_offset:2244*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2244*FLEN/8, x4, x1, x2)

inst_1123:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3ca and fs2 == 1 and fe2 == 0x0c and fm2 == 0x3c9 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x33ca; op2val:0xb3c9; 
   valaddr_reg:x3; val_offset:2246*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2246*FLEN/8, x4, x1, x2)

inst_1124:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3ca and fs2 == 1 and fe2 == 0x0c and fm2 == 0x3c9 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x33ca; op2val:0xb3c9; 
   valaddr_reg:x3; val_offset:2248*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2248*FLEN/8, x4, x1, x2)

inst_1125:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2bc and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2bb and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x32bc; op2val:0xb2bb; 
   valaddr_reg:x3; val_offset:2250*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2250*FLEN/8, x4, x1, x2)

inst_1126:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2bc and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2bb and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x32bc; op2val:0xb2bb; 
   valaddr_reg:x3; val_offset:2252*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2252*FLEN/8, x4, x1, x2)

inst_1127:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2bc and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2bb and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x32bc; op2val:0xb2bb; 
   valaddr_reg:x3; val_offset:2254*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2254*FLEN/8, x4, x1, x2)

inst_1128:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2bc and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2bb and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x32bc; op2val:0xb2bb; 
   valaddr_reg:x3; val_offset:2256*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2256*FLEN/8, x4, x1, x2)

inst_1129:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x2bc and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2bb and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x32bc; op2val:0xb2bb; 
   valaddr_reg:x3; val_offset:2258*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2258*FLEN/8, x4, x1, x2)

inst_1130:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3a4 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3a4 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3ba4; op2val:0xbba4; 
   valaddr_reg:x3; val_offset:2260*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2260*FLEN/8, x4, x1, x2)

inst_1131:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3a4 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3a4 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3ba4; op2val:0xbba4; 
   valaddr_reg:x3; val_offset:2262*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2262*FLEN/8, x4, x1, x2)

inst_1132:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3a4 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3a4 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3ba4; op2val:0xbba4; 
   valaddr_reg:x3; val_offset:2264*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2264*FLEN/8, x4, x1, x2)

inst_1133:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3a4 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3a4 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3ba4; op2val:0xbba4; 
   valaddr_reg:x3; val_offset:2266*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2266*FLEN/8, x4, x1, x2)

inst_1134:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3a4 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3a4 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3ba4; op2val:0xbba4; 
   valaddr_reg:x3; val_offset:2268*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2268*FLEN/8, x4, x1, x2)

inst_1135:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x01c and fs2 == 1 and fe2 == 0x0e and fm2 == 0x01c and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x381c; op2val:0xb81c; 
   valaddr_reg:x3; val_offset:2270*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2270*FLEN/8, x4, x1, x2)

inst_1136:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x01c and fs2 == 1 and fe2 == 0x0e and fm2 == 0x01c and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x381c; op2val:0xb81c; 
   valaddr_reg:x3; val_offset:2272*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2272*FLEN/8, x4, x1, x2)

inst_1137:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x01c and fs2 == 1 and fe2 == 0x0e and fm2 == 0x01c and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x381c; op2val:0xb81c; 
   valaddr_reg:x3; val_offset:2274*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2274*FLEN/8, x4, x1, x2)

inst_1138:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x01c and fs2 == 1 and fe2 == 0x0e and fm2 == 0x01c and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x381c; op2val:0xb81c; 
   valaddr_reg:x3; val_offset:2276*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2276*FLEN/8, x4, x1, x2)

inst_1139:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x01c and fs2 == 1 and fe2 == 0x0e and fm2 == 0x01c and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x381c; op2val:0xb81c; 
   valaddr_reg:x3; val_offset:2278*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2278*FLEN/8, x4, x1, x2)

inst_1140:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x313 and fs2 == 1 and fe2 == 0x0a and fm2 == 0x311 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2b13; op2val:0xab11; 
   valaddr_reg:x3; val_offset:2280*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2280*FLEN/8, x4, x1, x2)

inst_1141:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x313 and fs2 == 1 and fe2 == 0x0a and fm2 == 0x311 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2b13; op2val:0xab11; 
   valaddr_reg:x3; val_offset:2282*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2282*FLEN/8, x4, x1, x2)

inst_1142:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x313 and fs2 == 1 and fe2 == 0x0a and fm2 == 0x311 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2b13; op2val:0xab11; 
   valaddr_reg:x3; val_offset:2284*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2284*FLEN/8, x4, x1, x2)

inst_1143:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x313 and fs2 == 1 and fe2 == 0x0a and fm2 == 0x311 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2b13; op2val:0xab11; 
   valaddr_reg:x3; val_offset:2286*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2286*FLEN/8, x4, x1, x2)

inst_1144:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x313 and fs2 == 1 and fe2 == 0x0a and fm2 == 0x311 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2b13; op2val:0xab11; 
   valaddr_reg:x3; val_offset:2288*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2288*FLEN/8, x4, x1, x2)

inst_1145:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2da and fs2 == 1 and fe2 == 0x0d and fm2 == 0x2d9 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36da; op2val:0xb6d9; 
   valaddr_reg:x3; val_offset:2290*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2290*FLEN/8, x4, x1, x2)

inst_1146:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2da and fs2 == 1 and fe2 == 0x0d and fm2 == 0x2d9 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36da; op2val:0xb6d9; 
   valaddr_reg:x3; val_offset:2292*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2292*FLEN/8, x4, x1, x2)

inst_1147:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2da and fs2 == 1 and fe2 == 0x0d and fm2 == 0x2d9 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36da; op2val:0xb6d9; 
   valaddr_reg:x3; val_offset:2294*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2294*FLEN/8, x4, x1, x2)

inst_1148:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2da and fs2 == 1 and fe2 == 0x0d and fm2 == 0x2d9 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36da; op2val:0xb6d9; 
   valaddr_reg:x3; val_offset:2296*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2296*FLEN/8, x4, x1, x2)

inst_1149:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2da and fs2 == 1 and fe2 == 0x0d and fm2 == 0x2d9 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36da; op2val:0xb6d9; 
   valaddr_reg:x3; val_offset:2298*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2298*FLEN/8, x4, x1, x2)

inst_1150:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x340 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x340 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b40; op2val:0xbb40; 
   valaddr_reg:x3; val_offset:2300*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2300*FLEN/8, x4, x1, x2)

inst_1151:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x340 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x340 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b40; op2val:0xbb40; 
   valaddr_reg:x3; val_offset:2302*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2302*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_10)

inst_1152:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x340 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x340 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b40; op2val:0xbb40; 
   valaddr_reg:x3; val_offset:2304*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2304*FLEN/8, x4, x1, x2)

inst_1153:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x340 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x340 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b40; op2val:0xbb40; 
   valaddr_reg:x3; val_offset:2306*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2306*FLEN/8, x4, x1, x2)

inst_1154:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x340 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x340 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b40; op2val:0xbb40; 
   valaddr_reg:x3; val_offset:2308*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2308*FLEN/8, x4, x1, x2)

inst_1155:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x31f and fs2 == 1 and fe2 == 0x0b and fm2 == 0x31e and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2f1f; op2val:0xaf1e; 
   valaddr_reg:x3; val_offset:2310*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2310*FLEN/8, x4, x1, x2)

inst_1156:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x31f and fs2 == 1 and fe2 == 0x0b and fm2 == 0x31e and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2f1f; op2val:0xaf1e; 
   valaddr_reg:x3; val_offset:2312*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2312*FLEN/8, x4, x1, x2)

inst_1157:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x31f and fs2 == 1 and fe2 == 0x0b and fm2 == 0x31e and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2f1f; op2val:0xaf1e; 
   valaddr_reg:x3; val_offset:2314*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2314*FLEN/8, x4, x1, x2)

inst_1158:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x31f and fs2 == 1 and fe2 == 0x0b and fm2 == 0x31e and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2f1f; op2val:0xaf1e; 
   valaddr_reg:x3; val_offset:2316*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2316*FLEN/8, x4, x1, x2)

inst_1159:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x31f and fs2 == 1 and fe2 == 0x0b and fm2 == 0x31e and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2f1f; op2val:0xaf1e; 
   valaddr_reg:x3; val_offset:2318*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2318*FLEN/8, x4, x1, x2)

inst_1160:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0d3 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0d2 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x34d3; op2val:0xb4d2; 
   valaddr_reg:x3; val_offset:2320*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2320*FLEN/8, x4, x1, x2)

inst_1161:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0d3 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0d2 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x34d3; op2val:0xb4d2; 
   valaddr_reg:x3; val_offset:2322*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2322*FLEN/8, x4, x1, x2)

inst_1162:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0d3 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0d2 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x34d3; op2val:0xb4d2; 
   valaddr_reg:x3; val_offset:2324*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2324*FLEN/8, x4, x1, x2)

inst_1163:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0d3 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0d2 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x34d3; op2val:0xb4d2; 
   valaddr_reg:x3; val_offset:2326*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2326*FLEN/8, x4, x1, x2)

inst_1164:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x0d3 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0d2 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x34d3; op2val:0xb4d2; 
   valaddr_reg:x3; val_offset:2328*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2328*FLEN/8, x4, x1, x2)

inst_1165:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x18e and fs2 == 1 and fe2 == 0x0e and fm2 == 0x18e and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x398e; op2val:0xb98e; 
   valaddr_reg:x3; val_offset:2330*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2330*FLEN/8, x4, x1, x2)

inst_1166:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x18e and fs2 == 1 and fe2 == 0x0e and fm2 == 0x18e and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x398e; op2val:0xb98e; 
   valaddr_reg:x3; val_offset:2332*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2332*FLEN/8, x4, x1, x2)

inst_1167:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x18e and fs2 == 1 and fe2 == 0x0e and fm2 == 0x18e and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x398e; op2val:0xb98e; 
   valaddr_reg:x3; val_offset:2334*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2334*FLEN/8, x4, x1, x2)

inst_1168:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x18e and fs2 == 1 and fe2 == 0x0e and fm2 == 0x18e and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x398e; op2val:0xb98e; 
   valaddr_reg:x3; val_offset:2336*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2336*FLEN/8, x4, x1, x2)

inst_1169:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x18e and fs2 == 1 and fe2 == 0x0e and fm2 == 0x18e and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x398e; op2val:0xb98e; 
   valaddr_reg:x3; val_offset:2338*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2338*FLEN/8, x4, x1, x2)

inst_1170:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x097 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x097 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3897; op2val:0xb897; 
   valaddr_reg:x3; val_offset:2340*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2340*FLEN/8, x4, x1, x2)

inst_1171:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x097 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x097 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3897; op2val:0xb897; 
   valaddr_reg:x3; val_offset:2342*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2342*FLEN/8, x4, x1, x2)

inst_1172:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x097 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x097 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3897; op2val:0xb897; 
   valaddr_reg:x3; val_offset:2344*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2344*FLEN/8, x4, x1, x2)

inst_1173:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x097 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x097 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3897; op2val:0xb897; 
   valaddr_reg:x3; val_offset:2346*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2346*FLEN/8, x4, x1, x2)

inst_1174:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x097 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x097 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3897; op2val:0xb897; 
   valaddr_reg:x3; val_offset:2348*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2348*FLEN/8, x4, x1, x2)

inst_1175:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x0f0 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x0ef and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2cf0; op2val:0xacef; 
   valaddr_reg:x3; val_offset:2350*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2350*FLEN/8, x4, x1, x2)

inst_1176:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x0f0 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x0ef and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2cf0; op2val:0xacef; 
   valaddr_reg:x3; val_offset:2352*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2352*FLEN/8, x4, x1, x2)

inst_1177:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x0f0 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x0ef and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2cf0; op2val:0xacef; 
   valaddr_reg:x3; val_offset:2354*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2354*FLEN/8, x4, x1, x2)

inst_1178:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x0f0 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x0ef and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2cf0; op2val:0xacef; 
   valaddr_reg:x3; val_offset:2356*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2356*FLEN/8, x4, x1, x2)

inst_1179:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x0f0 and fs2 == 1 and fe2 == 0x0b and fm2 == 0x0ef and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2cf0; op2val:0xacef; 
   valaddr_reg:x3; val_offset:2358*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2358*FLEN/8, x4, x1, x2)

inst_1180:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0ac and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0ac and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38ac; op2val:0xb8ac; 
   valaddr_reg:x3; val_offset:2360*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2360*FLEN/8, x4, x1, x2)

inst_1181:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0ac and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0ac and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38ac; op2val:0xb8ac; 
   valaddr_reg:x3; val_offset:2362*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2362*FLEN/8, x4, x1, x2)

inst_1182:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0ac and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0ac and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38ac; op2val:0xb8ac; 
   valaddr_reg:x3; val_offset:2364*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2364*FLEN/8, x4, x1, x2)

inst_1183:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0ac and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0ac and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38ac; op2val:0xb8ac; 
   valaddr_reg:x3; val_offset:2366*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2366*FLEN/8, x4, x1, x2)

inst_1184:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0ac and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0ac and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38ac; op2val:0xb8ac; 
   valaddr_reg:x3; val_offset:2368*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2368*FLEN/8, x4, x1, x2)

inst_1185:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x33d and fs2 == 1 and fe2 == 0x0c and fm2 == 0x33c and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x333d; op2val:0xb33c; 
   valaddr_reg:x3; val_offset:2370*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2370*FLEN/8, x4, x1, x2)

inst_1186:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x33d and fs2 == 1 and fe2 == 0x0c and fm2 == 0x33c and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x333d; op2val:0xb33c; 
   valaddr_reg:x3; val_offset:2372*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2372*FLEN/8, x4, x1, x2)

inst_1187:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x33d and fs2 == 1 and fe2 == 0x0c and fm2 == 0x33c and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x333d; op2val:0xb33c; 
   valaddr_reg:x3; val_offset:2374*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2374*FLEN/8, x4, x1, x2)

inst_1188:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x33d and fs2 == 1 and fe2 == 0x0c and fm2 == 0x33c and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x333d; op2val:0xb33c; 
   valaddr_reg:x3; val_offset:2376*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2376*FLEN/8, x4, x1, x2)

inst_1189:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x33d and fs2 == 1 and fe2 == 0x0c and fm2 == 0x33c and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x333d; op2val:0xb33c; 
   valaddr_reg:x3; val_offset:2378*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2378*FLEN/8, x4, x1, x2)

inst_1190:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3c1 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3c0 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bc1; op2val:0xbbc0; 
   valaddr_reg:x3; val_offset:2380*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2380*FLEN/8, x4, x1, x2)

inst_1191:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3c1 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3c0 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bc1; op2val:0xbbc0; 
   valaddr_reg:x3; val_offset:2382*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2382*FLEN/8, x4, x1, x2)

inst_1192:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3c1 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3c0 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bc1; op2val:0xbbc0; 
   valaddr_reg:x3; val_offset:2384*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2384*FLEN/8, x4, x1, x2)

inst_1193:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3c1 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3c0 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bc1; op2val:0xbbc0; 
   valaddr_reg:x3; val_offset:2386*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2386*FLEN/8, x4, x1, x2)

inst_1194:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3c1 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3c0 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bc1; op2val:0xbbc0; 
   valaddr_reg:x3; val_offset:2388*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2388*FLEN/8, x4, x1, x2)

inst_1195:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x104 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x104 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3504; op2val:0xb504; 
   valaddr_reg:x3; val_offset:2390*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2390*FLEN/8, x4, x1, x2)

inst_1196:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x104 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x104 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3504; op2val:0xb504; 
   valaddr_reg:x3; val_offset:2392*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2392*FLEN/8, x4, x1, x2)

inst_1197:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x104 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x104 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3504; op2val:0xb504; 
   valaddr_reg:x3; val_offset:2394*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2394*FLEN/8, x4, x1, x2)

inst_1198:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x104 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x104 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3504; op2val:0xb504; 
   valaddr_reg:x3; val_offset:2396*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2396*FLEN/8, x4, x1, x2)

inst_1199:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x104 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x104 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3504; op2val:0xb504; 
   valaddr_reg:x3; val_offset:2398*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2398*FLEN/8, x4, x1, x2)

inst_1200:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x12b and fs2 == 1 and fe2 == 0x0b and fm2 == 0x12a and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2d2b; op2val:0xad2a; 
   valaddr_reg:x3; val_offset:2400*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2400*FLEN/8, x4, x1, x2)

inst_1201:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x12b and fs2 == 1 and fe2 == 0x0b and fm2 == 0x12a and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2d2b; op2val:0xad2a; 
   valaddr_reg:x3; val_offset:2402*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2402*FLEN/8, x4, x1, x2)

inst_1202:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x12b and fs2 == 1 and fe2 == 0x0b and fm2 == 0x12a and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2d2b; op2val:0xad2a; 
   valaddr_reg:x3; val_offset:2404*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2404*FLEN/8, x4, x1, x2)

inst_1203:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x12b and fs2 == 1 and fe2 == 0x0b and fm2 == 0x12a and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2d2b; op2val:0xad2a; 
   valaddr_reg:x3; val_offset:2406*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2406*FLEN/8, x4, x1, x2)

inst_1204:// fs1 == 0 and fe1 == 0x0b and fm1 == 0x12b and fs2 == 1 and fe2 == 0x0b and fm2 == 0x12a and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x2d2b; op2val:0xad2a; 
   valaddr_reg:x3; val_offset:2408*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2408*FLEN/8, x4, x1, x2)

inst_1205:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x070 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x070 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3470; op2val:0xb470; 
   valaddr_reg:x3; val_offset:2410*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2410*FLEN/8, x4, x1, x2)

inst_1206:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x070 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x070 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3470; op2val:0xb470; 
   valaddr_reg:x3; val_offset:2412*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2412*FLEN/8, x4, x1, x2)

inst_1207:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x070 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x070 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3470; op2val:0xb470; 
   valaddr_reg:x3; val_offset:2414*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2414*FLEN/8, x4, x1, x2)

inst_1208:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x070 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x070 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3470; op2val:0xb470; 
   valaddr_reg:x3; val_offset:2416*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2416*FLEN/8, x4, x1, x2)

inst_1209:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x070 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x070 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3470; op2val:0xb470; 
   valaddr_reg:x3; val_offset:2418*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2418*FLEN/8, x4, x1, x2)

inst_1210:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x36f and fs2 == 1 and fe2 == 0x0e and fm2 == 0x36f and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b6f; op2val:0xbb6f; 
   valaddr_reg:x3; val_offset:2420*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2420*FLEN/8, x4, x1, x2)

inst_1211:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x36f and fs2 == 1 and fe2 == 0x0e and fm2 == 0x36f and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b6f; op2val:0xbb6f; 
   valaddr_reg:x3; val_offset:2422*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2422*FLEN/8, x4, x1, x2)

inst_1212:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x36f and fs2 == 1 and fe2 == 0x0e and fm2 == 0x36f and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b6f; op2val:0xbb6f; 
   valaddr_reg:x3; val_offset:2424*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2424*FLEN/8, x4, x1, x2)

inst_1213:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x36f and fs2 == 1 and fe2 == 0x0e and fm2 == 0x36f and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b6f; op2val:0xbb6f; 
   valaddr_reg:x3; val_offset:2426*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2426*FLEN/8, x4, x1, x2)

inst_1214:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x36f and fs2 == 1 and fe2 == 0x0e and fm2 == 0x36f and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b6f; op2val:0xbb6f; 
   valaddr_reg:x3; val_offset:2428*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2428*FLEN/8, x4, x1, x2)

inst_1215:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3c3 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3c3 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bc3; op2val:0xbbc3; 
   valaddr_reg:x3; val_offset:2430*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2430*FLEN/8, x4, x1, x2)

inst_1216:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3c3 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3c3 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bc3; op2val:0xbbc3; 
   valaddr_reg:x3; val_offset:2432*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2432*FLEN/8, x4, x1, x2)

inst_1217:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3c3 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3c3 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bc3; op2val:0xbbc3; 
   valaddr_reg:x3; val_offset:2434*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2434*FLEN/8, x4, x1, x2)

inst_1218:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3c3 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3c3 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bc3; op2val:0xbbc3; 
   valaddr_reg:x3; val_offset:2436*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2436*FLEN/8, x4, x1, x2)

inst_1219:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3c3 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3c3 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bc3; op2val:0xbbc3; 
   valaddr_reg:x3; val_offset:2438*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2438*FLEN/8, x4, x1, x2)

inst_1220:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3eb and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3eb and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3beb; op2val:0xbbeb; 
   valaddr_reg:x3; val_offset:2440*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2440*FLEN/8, x4, x1, x2)

inst_1221:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3eb and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3eb and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3beb; op2val:0xbbeb; 
   valaddr_reg:x3; val_offset:2442*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2442*FLEN/8, x4, x1, x2)

inst_1222:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3eb and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3eb and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3beb; op2val:0xbbeb; 
   valaddr_reg:x3; val_offset:2444*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2444*FLEN/8, x4, x1, x2)

inst_1223:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3eb and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3eb and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3beb; op2val:0xbbeb; 
   valaddr_reg:x3; val_offset:2446*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2446*FLEN/8, x4, x1, x2)

inst_1224:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3eb and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3eb and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3beb; op2val:0xbbeb; 
   valaddr_reg:x3; val_offset:2448*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2448*FLEN/8, x4, x1, x2)

inst_1225:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x293 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x1b3 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5293; op2val:0x49b3; 
   valaddr_reg:x3; val_offset:2450*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2450*FLEN/8, x4, x1, x2)

inst_1226:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x293 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x1b3 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5293; op2val:0x49b3; 
   valaddr_reg:x3; val_offset:2452*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2452*FLEN/8, x4, x1, x2)

inst_1227:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x293 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x1b3 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5293; op2val:0x49b3; 
   valaddr_reg:x3; val_offset:2454*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2454*FLEN/8, x4, x1, x2)

inst_1228:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x293 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x1b3 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5293; op2val:0x49b3; 
   valaddr_reg:x3; val_offset:2456*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2456*FLEN/8, x4, x1, x2)

inst_1229:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x293 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x1b3 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5293; op2val:0x49b3; 
   valaddr_reg:x3; val_offset:2458*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2458*FLEN/8, x4, x1, x2)

inst_1230:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x329 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x2b6 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5329; op2val:0x46b6; 
   valaddr_reg:x3; val_offset:2460*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2460*FLEN/8, x4, x1, x2)

inst_1231:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x329 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x2b6 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5329; op2val:0x46b6; 
   valaddr_reg:x3; val_offset:2462*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2462*FLEN/8, x4, x1, x2)

inst_1232:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x329 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x2b6 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5329; op2val:0x46b6; 
   valaddr_reg:x3; val_offset:2464*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2464*FLEN/8, x4, x1, x2)

inst_1233:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x329 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x2b6 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5329; op2val:0x46b6; 
   valaddr_reg:x3; val_offset:2466*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2466*FLEN/8, x4, x1, x2)

inst_1234:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x329 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x2b6 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5329; op2val:0x46b6; 
   valaddr_reg:x3; val_offset:2468*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2468*FLEN/8, x4, x1, x2)

inst_1235:// fs1 == 0 and fe1 == 0x12 and fm1 == 0x2f3 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x243 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4af3; op2val:0x5243; 
   valaddr_reg:x3; val_offset:2470*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2470*FLEN/8, x4, x1, x2)

inst_1236:// fs1 == 0 and fe1 == 0x12 and fm1 == 0x2f3 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x243 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4af3; op2val:0x5243; 
   valaddr_reg:x3; val_offset:2472*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2472*FLEN/8, x4, x1, x2)

inst_1237:// fs1 == 0 and fe1 == 0x12 and fm1 == 0x2f3 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x243 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4af3; op2val:0x5243; 
   valaddr_reg:x3; val_offset:2474*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2474*FLEN/8, x4, x1, x2)

inst_1238:// fs1 == 0 and fe1 == 0x12 and fm1 == 0x2f3 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x243 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4af3; op2val:0x5243; 
   valaddr_reg:x3; val_offset:2476*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2476*FLEN/8, x4, x1, x2)

inst_1239:// fs1 == 0 and fe1 == 0x12 and fm1 == 0x2f3 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x243 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4af3; op2val:0x5243; 
   valaddr_reg:x3; val_offset:2478*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2478*FLEN/8, x4, x1, x2)

inst_1240:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x383 and fs2 == 0 and fe2 == 0x10 and fm2 == 0x3c7 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5383; op2val:0x43c7; 
   valaddr_reg:x3; val_offset:2480*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2480*FLEN/8, x4, x1, x2)

inst_1241:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x383 and fs2 == 0 and fe2 == 0x10 and fm2 == 0x3c7 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5383; op2val:0x43c7; 
   valaddr_reg:x3; val_offset:2482*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2482*FLEN/8, x4, x1, x2)

inst_1242:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x383 and fs2 == 0 and fe2 == 0x10 and fm2 == 0x3c7 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5383; op2val:0x43c7; 
   valaddr_reg:x3; val_offset:2484*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2484*FLEN/8, x4, x1, x2)

inst_1243:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x383 and fs2 == 0 and fe2 == 0x10 and fm2 == 0x3c7 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5383; op2val:0x43c7; 
   valaddr_reg:x3; val_offset:2486*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2486*FLEN/8, x4, x1, x2)

inst_1244:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x383 and fs2 == 0 and fe2 == 0x10 and fm2 == 0x3c7 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5383; op2val:0x43c7; 
   valaddr_reg:x3; val_offset:2488*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2488*FLEN/8, x4, x1, x2)

inst_1245:// fs1 == 0 and fe1 == 0x0f and fm1 == 0x1cf and fs2 == 0 and fe2 == 0x14 and fm2 == 0x3d1 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3dcf; op2val:0x53d1; 
   valaddr_reg:x3; val_offset:2490*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2490*FLEN/8, x4, x1, x2)

inst_1246:// fs1 == 0 and fe1 == 0x0f and fm1 == 0x1cf and fs2 == 0 and fe2 == 0x14 and fm2 == 0x3d1 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3dcf; op2val:0x53d1; 
   valaddr_reg:x3; val_offset:2492*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2492*FLEN/8, x4, x1, x2)

inst_1247:// fs1 == 0 and fe1 == 0x0f and fm1 == 0x1cf and fs2 == 0 and fe2 == 0x14 and fm2 == 0x3d1 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3dcf; op2val:0x53d1; 
   valaddr_reg:x3; val_offset:2494*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2494*FLEN/8, x4, x1, x2)

inst_1248:// fs1 == 0 and fe1 == 0x0f and fm1 == 0x1cf and fs2 == 0 and fe2 == 0x14 and fm2 == 0x3d1 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3dcf; op2val:0x53d1; 
   valaddr_reg:x3; val_offset:2496*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2496*FLEN/8, x4, x1, x2)

inst_1249:// fs1 == 0 and fe1 == 0x0f and fm1 == 0x1cf and fs2 == 0 and fe2 == 0x14 and fm2 == 0x3d1 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3dcf; op2val:0x53d1; 
   valaddr_reg:x3; val_offset:2498*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2498*FLEN/8, x4, x1, x2)

inst_1250:// fs1 == 0 and fe1 == 0x10 and fm1 == 0x11b and fs2 == 0 and fe2 == 0x14 and fm2 == 0x3ae and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x411b; op2val:0x53ae; 
   valaddr_reg:x3; val_offset:2500*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2500*FLEN/8, x4, x1, x2)

inst_1251:// fs1 == 0 and fe1 == 0x10 and fm1 == 0x11b and fs2 == 0 and fe2 == 0x14 and fm2 == 0x3ae and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x411b; op2val:0x53ae; 
   valaddr_reg:x3; val_offset:2502*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2502*FLEN/8, x4, x1, x2)

inst_1252:// fs1 == 0 and fe1 == 0x10 and fm1 == 0x11b and fs2 == 0 and fe2 == 0x14 and fm2 == 0x3ae and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x411b; op2val:0x53ae; 
   valaddr_reg:x3; val_offset:2504*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2504*FLEN/8, x4, x1, x2)

inst_1253:// fs1 == 0 and fe1 == 0x10 and fm1 == 0x11b and fs2 == 0 and fe2 == 0x14 and fm2 == 0x3ae and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x411b; op2val:0x53ae; 
   valaddr_reg:x3; val_offset:2506*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2506*FLEN/8, x4, x1, x2)

inst_1254:// fs1 == 0 and fe1 == 0x10 and fm1 == 0x11b and fs2 == 0 and fe2 == 0x14 and fm2 == 0x3ae and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x411b; op2val:0x53ae; 
   valaddr_reg:x3; val_offset:2508*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2508*FLEN/8, x4, x1, x2)

inst_1255:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x2e4 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x06f and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x52e4; op2val:0x486f; 
   valaddr_reg:x3; val_offset:2510*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2510*FLEN/8, x4, x1, x2)

inst_1256:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x2e4 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x06f and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x52e4; op2val:0x486f; 
   valaddr_reg:x3; val_offset:2512*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2512*FLEN/8, x4, x1, x2)

inst_1257:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x2e4 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x06f and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x52e4; op2val:0x486f; 
   valaddr_reg:x3; val_offset:2514*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2514*FLEN/8, x4, x1, x2)

inst_1258:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x2e4 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x06f and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x52e4; op2val:0x486f; 
   valaddr_reg:x3; val_offset:2516*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2516*FLEN/8, x4, x1, x2)

inst_1259:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x2e4 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x06f and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x52e4; op2val:0x486f; 
   valaddr_reg:x3; val_offset:2518*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2518*FLEN/8, x4, x1, x2)

inst_1260:// fs1 == 0 and fe1 == 0x12 and fm1 == 0x00a and fs2 == 0 and fe2 == 0x14 and fm2 == 0x2fd and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x480a; op2val:0x52fd; 
   valaddr_reg:x3; val_offset:2520*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2520*FLEN/8, x4, x1, x2)

inst_1261:// fs1 == 0 and fe1 == 0x12 and fm1 == 0x00a and fs2 == 0 and fe2 == 0x14 and fm2 == 0x2fd and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x480a; op2val:0x52fd; 
   valaddr_reg:x3; val_offset:2522*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2522*FLEN/8, x4, x1, x2)

inst_1262:// fs1 == 0 and fe1 == 0x12 and fm1 == 0x00a and fs2 == 0 and fe2 == 0x14 and fm2 == 0x2fd and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x480a; op2val:0x52fd; 
   valaddr_reg:x3; val_offset:2524*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2524*FLEN/8, x4, x1, x2)

inst_1263:// fs1 == 0 and fe1 == 0x12 and fm1 == 0x00a and fs2 == 0 and fe2 == 0x14 and fm2 == 0x2fd and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x480a; op2val:0x52fd; 
   valaddr_reg:x3; val_offset:2526*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2526*FLEN/8, x4, x1, x2)

inst_1264:// fs1 == 0 and fe1 == 0x12 and fm1 == 0x00a and fs2 == 0 and fe2 == 0x14 and fm2 == 0x2fd and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x480a; op2val:0x52fd; 
   valaddr_reg:x3; val_offset:2528*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2528*FLEN/8, x4, x1, x2)

inst_1265:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x3ad and fs2 == 0 and fe2 == 0x10 and fm2 == 0x125 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x53ad; op2val:0x4125; 
   valaddr_reg:x3; val_offset:2530*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2530*FLEN/8, x4, x1, x2)

inst_1266:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x3ad and fs2 == 0 and fe2 == 0x10 and fm2 == 0x125 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x53ad; op2val:0x4125; 
   valaddr_reg:x3; val_offset:2532*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2532*FLEN/8, x4, x1, x2)

inst_1267:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x3ad and fs2 == 0 and fe2 == 0x10 and fm2 == 0x125 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x53ad; op2val:0x4125; 
   valaddr_reg:x3; val_offset:2534*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2534*FLEN/8, x4, x1, x2)

inst_1268:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x3ad and fs2 == 0 and fe2 == 0x10 and fm2 == 0x125 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x53ad; op2val:0x4125; 
   valaddr_reg:x3; val_offset:2536*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2536*FLEN/8, x4, x1, x2)

inst_1269:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x3ad and fs2 == 0 and fe2 == 0x10 and fm2 == 0x125 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x53ad; op2val:0x4125; 
   valaddr_reg:x3; val_offset:2538*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2538*FLEN/8, x4, x1, x2)

inst_1270:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x3bc and fs2 == 0 and fe2 == 0x10 and fm2 == 0x038 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x53bc; op2val:0x4038; 
   valaddr_reg:x3; val_offset:2540*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2540*FLEN/8, x4, x1, x2)

inst_1271:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x3bc and fs2 == 0 and fe2 == 0x10 and fm2 == 0x038 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x53bc; op2val:0x4038; 
   valaddr_reg:x3; val_offset:2542*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2542*FLEN/8, x4, x1, x2)

inst_1272:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x3bc and fs2 == 0 and fe2 == 0x10 and fm2 == 0x038 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x53bc; op2val:0x4038; 
   valaddr_reg:x3; val_offset:2544*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2544*FLEN/8, x4, x1, x2)

inst_1273:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x3bc and fs2 == 0 and fe2 == 0x10 and fm2 == 0x038 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x53bc; op2val:0x4038; 
   valaddr_reg:x3; val_offset:2546*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2546*FLEN/8, x4, x1, x2)

inst_1274:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x3bc and fs2 == 0 and fe2 == 0x10 and fm2 == 0x038 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x53bc; op2val:0x4038; 
   valaddr_reg:x3; val_offset:2548*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2548*FLEN/8, x4, x1, x2)

inst_1275:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x3b4 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x025 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4fb4; op2val:0x5025; 
   valaddr_reg:x3; val_offset:2550*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2550*FLEN/8, x4, x1, x2)

inst_1276:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x3b4 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x025 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4fb4; op2val:0x5025; 
   valaddr_reg:x3; val_offset:2552*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2552*FLEN/8, x4, x1, x2)

inst_1277:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x3b4 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x025 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4fb4; op2val:0x5025; 
   valaddr_reg:x3; val_offset:2554*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2554*FLEN/8, x4, x1, x2)

inst_1278:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x3b4 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x025 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4fb4; op2val:0x5025; 
   valaddr_reg:x3; val_offset:2556*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2556*FLEN/8, x4, x1, x2)

inst_1279:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x3b4 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x025 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4fb4; op2val:0x5025; 
   valaddr_reg:x3; val_offset:2558*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2558*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_11)

inst_1280:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x381 and fs2 == 0 and fe2 == 0x10 and fm2 == 0x3ec and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5381; op2val:0x43ec; 
   valaddr_reg:x3; val_offset:2560*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2560*FLEN/8, x4, x1, x2)

inst_1281:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x381 and fs2 == 0 and fe2 == 0x10 and fm2 == 0x3ec and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5381; op2val:0x43ec; 
   valaddr_reg:x3; val_offset:2562*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2562*FLEN/8, x4, x1, x2)

inst_1282:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x381 and fs2 == 0 and fe2 == 0x10 and fm2 == 0x3ec and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5381; op2val:0x43ec; 
   valaddr_reg:x3; val_offset:2564*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2564*FLEN/8, x4, x1, x2)

inst_1283:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x381 and fs2 == 0 and fe2 == 0x10 and fm2 == 0x3ec and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5381; op2val:0x43ec; 
   valaddr_reg:x3; val_offset:2566*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2566*FLEN/8, x4, x1, x2)

inst_1284:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x381 and fs2 == 0 and fe2 == 0x10 and fm2 == 0x3ec and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5381; op2val:0x43ec; 
   valaddr_reg:x3; val_offset:2568*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2568*FLEN/8, x4, x1, x2)

inst_1285:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x122 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x1bc and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5122; op2val:0x4dbc; 
   valaddr_reg:x3; val_offset:2570*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2570*FLEN/8, x4, x1, x2)

inst_1286:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x122 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x1bc and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5122; op2val:0x4dbc; 
   valaddr_reg:x3; val_offset:2572*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2572*FLEN/8, x4, x1, x2)

inst_1287:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x122 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x1bc and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5122; op2val:0x4dbc; 
   valaddr_reg:x3; val_offset:2574*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2574*FLEN/8, x4, x1, x2)

inst_1288:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x122 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x1bc and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5122; op2val:0x4dbc; 
   valaddr_reg:x3; val_offset:2576*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2576*FLEN/8, x4, x1, x2)

inst_1289:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x122 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x1bc and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5122; op2val:0x4dbc; 
   valaddr_reg:x3; val_offset:2578*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2578*FLEN/8, x4, x1, x2)

inst_1290:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x3f2 and fs2 == 0 and fe2 == 0x0d and fm2 == 0x31b and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x53f2; op2val:0x371b; 
   valaddr_reg:x3; val_offset:2580*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2580*FLEN/8, x4, x1, x2)

inst_1291:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x3f2 and fs2 == 0 and fe2 == 0x0d and fm2 == 0x31b and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x53f2; op2val:0x371b; 
   valaddr_reg:x3; val_offset:2582*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2582*FLEN/8, x4, x1, x2)

inst_1292:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x3f2 and fs2 == 0 and fe2 == 0x0d and fm2 == 0x31b and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x53f2; op2val:0x371b; 
   valaddr_reg:x3; val_offset:2584*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2584*FLEN/8, x4, x1, x2)

inst_1293:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x3f2 and fs2 == 0 and fe2 == 0x0d and fm2 == 0x31b and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x53f2; op2val:0x371b; 
   valaddr_reg:x3; val_offset:2586*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2586*FLEN/8, x4, x1, x2)

inst_1294:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x3f2 and fs2 == 0 and fe2 == 0x0d and fm2 == 0x31b and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x53f2; op2val:0x371b; 
   valaddr_reg:x3; val_offset:2588*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2588*FLEN/8, x4, x1, x2)

inst_1295:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x0b3 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x29a and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x50b3; op2val:0x4e9a; 
   valaddr_reg:x3; val_offset:2590*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2590*FLEN/8, x4, x1, x2)

inst_1296:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x0b3 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x29a and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x50b3; op2val:0x4e9a; 
   valaddr_reg:x3; val_offset:2592*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2592*FLEN/8, x4, x1, x2)

inst_1297:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x0b3 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x29a and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x50b3; op2val:0x4e9a; 
   valaddr_reg:x3; val_offset:2594*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2594*FLEN/8, x4, x1, x2)

inst_1298:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x0b3 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x29a and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x50b3; op2val:0x4e9a; 
   valaddr_reg:x3; val_offset:2596*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2596*FLEN/8, x4, x1, x2)

inst_1299:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x0b3 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x29a and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x50b3; op2val:0x4e9a; 
   valaddr_reg:x3; val_offset:2598*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2598*FLEN/8, x4, x1, x2)

inst_1300:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x331 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x272 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5331; op2val:0x4672; 
   valaddr_reg:x3; val_offset:2600*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2600*FLEN/8, x4, x1, x2)

inst_1301:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x331 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x272 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5331; op2val:0x4672; 
   valaddr_reg:x3; val_offset:2602*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2602*FLEN/8, x4, x1, x2)

inst_1302:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x331 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x272 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5331; op2val:0x4672; 
   valaddr_reg:x3; val_offset:2604*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2604*FLEN/8, x4, x1, x2)

inst_1303:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x331 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x272 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5331; op2val:0x4672; 
   valaddr_reg:x3; val_offset:2606*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2606*FLEN/8, x4, x1, x2)

inst_1304:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x331 and fs2 == 0 and fe2 == 0x11 and fm2 == 0x272 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5331; op2val:0x4672; 
   valaddr_reg:x3; val_offset:2608*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2608*FLEN/8, x4, x1, x2)

inst_1305:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x275 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x229 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5275; op2val:0x4a29; 
   valaddr_reg:x3; val_offset:2610*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2610*FLEN/8, x4, x1, x2)

inst_1306:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x275 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x229 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5275; op2val:0x4a29; 
   valaddr_reg:x3; val_offset:2612*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2612*FLEN/8, x4, x1, x2)

inst_1307:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x275 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x229 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5275; op2val:0x4a29; 
   valaddr_reg:x3; val_offset:2614*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2614*FLEN/8, x4, x1, x2)

inst_1308:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x275 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x229 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5275; op2val:0x4a29; 
   valaddr_reg:x3; val_offset:2616*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2616*FLEN/8, x4, x1, x2)

inst_1309:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x275 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x229 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5275; op2val:0x4a29; 
   valaddr_reg:x3; val_offset:2618*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2618*FLEN/8, x4, x1, x2)

inst_1310:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x013 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x1f6 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4c13; op2val:0x51f6; 
   valaddr_reg:x3; val_offset:2620*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2620*FLEN/8, x4, x1, x2)

inst_1311:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x013 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x1f6 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4c13; op2val:0x51f6; 
   valaddr_reg:x3; val_offset:2622*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2622*FLEN/8, x4, x1, x2)

inst_1312:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x013 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x1f6 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4c13; op2val:0x51f6; 
   valaddr_reg:x3; val_offset:2624*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2624*FLEN/8, x4, x1, x2)

inst_1313:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x013 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x1f6 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4c13; op2val:0x51f6; 
   valaddr_reg:x3; val_offset:2626*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2626*FLEN/8, x4, x1, x2)

inst_1314:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x013 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x1f6 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4c13; op2val:0x51f6; 
   valaddr_reg:x3; val_offset:2628*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2628*FLEN/8, x4, x1, x2)

inst_1315:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x0d5 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x195 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4cd5; op2val:0x5195; 
   valaddr_reg:x3; val_offset:2630*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2630*FLEN/8, x4, x1, x2)

inst_1316:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x0d5 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x195 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4cd5; op2val:0x5195; 
   valaddr_reg:x3; val_offset:2632*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2632*FLEN/8, x4, x1, x2)

inst_1317:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x0d5 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x195 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4cd5; op2val:0x5195; 
   valaddr_reg:x3; val_offset:2634*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2634*FLEN/8, x4, x1, x2)

inst_1318:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x0d5 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x195 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4cd5; op2val:0x5195; 
   valaddr_reg:x3; val_offset:2636*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2636*FLEN/8, x4, x1, x2)

inst_1319:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x0d5 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x195 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4cd5; op2val:0x5195; 
   valaddr_reg:x3; val_offset:2638*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2638*FLEN/8, x4, x1, x2)

inst_1320:// fs1 == 0 and fe1 == 0x10 and fm1 == 0x3d4 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x382 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x43d4; op2val:0x5382; 
   valaddr_reg:x3; val_offset:2640*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2640*FLEN/8, x4, x1, x2)

inst_1321:// fs1 == 0 and fe1 == 0x10 and fm1 == 0x3d4 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x382 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x43d4; op2val:0x5382; 
   valaddr_reg:x3; val_offset:2642*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2642*FLEN/8, x4, x1, x2)

inst_1322:// fs1 == 0 and fe1 == 0x10 and fm1 == 0x3d4 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x382 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x43d4; op2val:0x5382; 
   valaddr_reg:x3; val_offset:2644*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2644*FLEN/8, x4, x1, x2)

inst_1323:// fs1 == 0 and fe1 == 0x10 and fm1 == 0x3d4 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x382 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x43d4; op2val:0x5382; 
   valaddr_reg:x3; val_offset:2646*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2646*FLEN/8, x4, x1, x2)

inst_1324:// fs1 == 0 and fe1 == 0x10 and fm1 == 0x3d4 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x382 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x43d4; op2val:0x5382; 
   valaddr_reg:x3; val_offset:2648*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2648*FLEN/8, x4, x1, x2)

inst_1325:// fs1 == 0 and fe1 == 0x10 and fm1 == 0x096 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x3b6 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4096; op2val:0x53b6; 
   valaddr_reg:x3; val_offset:2650*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2650*FLEN/8, x4, x1, x2)

inst_1326:// fs1 == 0 and fe1 == 0x10 and fm1 == 0x096 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x3b6 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4096; op2val:0x53b6; 
   valaddr_reg:x3; val_offset:2652*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2652*FLEN/8, x4, x1, x2)

inst_1327:// fs1 == 0 and fe1 == 0x10 and fm1 == 0x096 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x3b6 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4096; op2val:0x53b6; 
   valaddr_reg:x3; val_offset:2654*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2654*FLEN/8, x4, x1, x2)

inst_1328:// fs1 == 0 and fe1 == 0x10 and fm1 == 0x096 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x3b6 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4096; op2val:0x53b6; 
   valaddr_reg:x3; val_offset:2656*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2656*FLEN/8, x4, x1, x2)

inst_1329:// fs1 == 0 and fe1 == 0x10 and fm1 == 0x096 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x3b6 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4096; op2val:0x53b6; 
   valaddr_reg:x3; val_offset:2658*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2658*FLEN/8, x4, x1, x2)

inst_1330:// fs1 == 0 and fe1 == 0x11 and fm1 == 0x19c and fs2 == 0 and fe2 == 0x14 and fm2 == 0x34c and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x459c; op2val:0x534c; 
   valaddr_reg:x3; val_offset:2660*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2660*FLEN/8, x4, x1, x2)

inst_1331:// fs1 == 0 and fe1 == 0x11 and fm1 == 0x19c and fs2 == 0 and fe2 == 0x14 and fm2 == 0x34c and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x459c; op2val:0x534c; 
   valaddr_reg:x3; val_offset:2662*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2662*FLEN/8, x4, x1, x2)

inst_1332:// fs1 == 0 and fe1 == 0x11 and fm1 == 0x19c and fs2 == 0 and fe2 == 0x14 and fm2 == 0x34c and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x459c; op2val:0x534c; 
   valaddr_reg:x3; val_offset:2664*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2664*FLEN/8, x4, x1, x2)

inst_1333:// fs1 == 0 and fe1 == 0x11 and fm1 == 0x19c and fs2 == 0 and fe2 == 0x14 and fm2 == 0x34c and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x459c; op2val:0x534c; 
   valaddr_reg:x3; val_offset:2666*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2666*FLEN/8, x4, x1, x2)

inst_1334:// fs1 == 0 and fe1 == 0x11 and fm1 == 0x19c and fs2 == 0 and fe2 == 0x14 and fm2 == 0x34c and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x459c; op2val:0x534c; 
   valaddr_reg:x3; val_offset:2668*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2668*FLEN/8, x4, x1, x2)

inst_1335:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x076 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x313 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5076; op2val:0x4f13; 
   valaddr_reg:x3; val_offset:2670*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2670*FLEN/8, x4, x1, x2)

inst_1336:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x076 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x313 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5076; op2val:0x4f13; 
   valaddr_reg:x3; val_offset:2672*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2672*FLEN/8, x4, x1, x2)

inst_1337:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x076 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x313 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5076; op2val:0x4f13; 
   valaddr_reg:x3; val_offset:2674*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2674*FLEN/8, x4, x1, x2)

inst_1338:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x076 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x313 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5076; op2val:0x4f13; 
   valaddr_reg:x3; val_offset:2676*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2676*FLEN/8, x4, x1, x2)

inst_1339:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x076 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x313 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5076; op2val:0x4f13; 
   valaddr_reg:x3; val_offset:2678*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2678*FLEN/8, x4, x1, x2)

inst_1340:// fs1 == 0 and fe1 == 0x12 and fm1 == 0x0fb and fs2 == 0 and fe2 == 0x14 and fm2 == 0x2c1 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x48fb; op2val:0x52c1; 
   valaddr_reg:x3; val_offset:2680*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2680*FLEN/8, x4, x1, x2)

inst_1341:// fs1 == 0 and fe1 == 0x12 and fm1 == 0x0fb and fs2 == 0 and fe2 == 0x14 and fm2 == 0x2c1 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x48fb; op2val:0x52c1; 
   valaddr_reg:x3; val_offset:2682*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2682*FLEN/8, x4, x1, x2)

inst_1342:// fs1 == 0 and fe1 == 0x12 and fm1 == 0x0fb and fs2 == 0 and fe2 == 0x14 and fm2 == 0x2c1 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x48fb; op2val:0x52c1; 
   valaddr_reg:x3; val_offset:2684*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2684*FLEN/8, x4, x1, x2)

inst_1343:// fs1 == 0 and fe1 == 0x12 and fm1 == 0x0fb and fs2 == 0 and fe2 == 0x14 and fm2 == 0x2c1 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x48fb; op2val:0x52c1; 
   valaddr_reg:x3; val_offset:2686*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2686*FLEN/8, x4, x1, x2)

inst_1344:// fs1 == 0 and fe1 == 0x12 and fm1 == 0x0fb and fs2 == 0 and fe2 == 0x14 and fm2 == 0x2c1 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x48fb; op2val:0x52c1; 
   valaddr_reg:x3; val_offset:2688*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2688*FLEN/8, x4, x1, x2)

inst_1345:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x124 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x1b8 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5124; op2val:0x4db8; 
   valaddr_reg:x3; val_offset:2690*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2690*FLEN/8, x4, x1, x2)

inst_1346:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x124 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x1b8 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5124; op2val:0x4db8; 
   valaddr_reg:x3; val_offset:2692*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2692*FLEN/8, x4, x1, x2)

inst_1347:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x124 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x1b8 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5124; op2val:0x4db8; 
   valaddr_reg:x3; val_offset:2694*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2694*FLEN/8, x4, x1, x2)

inst_1348:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x124 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x1b8 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5124; op2val:0x4db8; 
   valaddr_reg:x3; val_offset:2696*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2696*FLEN/8, x4, x1, x2)

inst_1349:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x124 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x1b8 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5124; op2val:0x4db8; 
   valaddr_reg:x3; val_offset:2698*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2698*FLEN/8, x4, x1, x2)

inst_1350:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x341 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x05f and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4f41; op2val:0x505f; 
   valaddr_reg:x3; val_offset:2700*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2700*FLEN/8, x4, x1, x2)

inst_1351:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x341 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x05f and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4f41; op2val:0x505f; 
   valaddr_reg:x3; val_offset:2702*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2702*FLEN/8, x4, x1, x2)

inst_1352:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x341 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x05f and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4f41; op2val:0x505f; 
   valaddr_reg:x3; val_offset:2704*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2704*FLEN/8, x4, x1, x2)

inst_1353:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x341 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x05f and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4f41; op2val:0x505f; 
   valaddr_reg:x3; val_offset:2706*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2706*FLEN/8, x4, x1, x2)

inst_1354:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x341 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x05f and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4f41; op2val:0x505f; 
   valaddr_reg:x3; val_offset:2708*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2708*FLEN/8, x4, x1, x2)

inst_1355:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x399 and fs2 == 0 and fe2 == 0x10 and fm2 == 0x26f and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5399; op2val:0x426f; 
   valaddr_reg:x3; val_offset:2710*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2710*FLEN/8, x4, x1, x2)

inst_1356:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x399 and fs2 == 0 and fe2 == 0x10 and fm2 == 0x26f and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5399; op2val:0x426f; 
   valaddr_reg:x3; val_offset:2712*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2712*FLEN/8, x4, x1, x2)

inst_1357:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x399 and fs2 == 0 and fe2 == 0x10 and fm2 == 0x26f and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5399; op2val:0x426f; 
   valaddr_reg:x3; val_offset:2714*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2714*FLEN/8, x4, x1, x2)

inst_1358:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x399 and fs2 == 0 and fe2 == 0x10 and fm2 == 0x26f and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5399; op2val:0x426f; 
   valaddr_reg:x3; val_offset:2716*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2716*FLEN/8, x4, x1, x2)

inst_1359:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x399 and fs2 == 0 and fe2 == 0x10 and fm2 == 0x26f and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5399; op2val:0x426f; 
   valaddr_reg:x3; val_offset:2718*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2718*FLEN/8, x4, x1, x2)

inst_1360:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x2af and fs2 == 0 and fe2 == 0x14 and fm2 == 0x0a8 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4eaf; op2val:0x50a8; 
   valaddr_reg:x3; val_offset:2720*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2720*FLEN/8, x4, x1, x2)

inst_1361:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x2af and fs2 == 0 and fe2 == 0x14 and fm2 == 0x0a8 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4eaf; op2val:0x50a8; 
   valaddr_reg:x3; val_offset:2722*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2722*FLEN/8, x4, x1, x2)

inst_1362:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x2af and fs2 == 0 and fe2 == 0x14 and fm2 == 0x0a8 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4eaf; op2val:0x50a8; 
   valaddr_reg:x3; val_offset:2724*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2724*FLEN/8, x4, x1, x2)

inst_1363:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x2af and fs2 == 0 and fe2 == 0x14 and fm2 == 0x0a8 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4eaf; op2val:0x50a8; 
   valaddr_reg:x3; val_offset:2726*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2726*FLEN/8, x4, x1, x2)

inst_1364:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x2af and fs2 == 0 and fe2 == 0x14 and fm2 == 0x0a8 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4eaf; op2val:0x50a8; 
   valaddr_reg:x3; val_offset:2728*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2728*FLEN/8, x4, x1, x2)

inst_1365:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x1dc and fs2 == 0 and fe2 == 0x13 and fm2 == 0x048 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x51dc; op2val:0x4c48; 
   valaddr_reg:x3; val_offset:2730*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2730*FLEN/8, x4, x1, x2)

inst_1366:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x1dc and fs2 == 0 and fe2 == 0x13 and fm2 == 0x048 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x51dc; op2val:0x4c48; 
   valaddr_reg:x3; val_offset:2732*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2732*FLEN/8, x4, x1, x2)

inst_1367:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x1dc and fs2 == 0 and fe2 == 0x13 and fm2 == 0x048 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x51dc; op2val:0x4c48; 
   valaddr_reg:x3; val_offset:2734*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2734*FLEN/8, x4, x1, x2)

inst_1368:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x1dc and fs2 == 0 and fe2 == 0x13 and fm2 == 0x048 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x51dc; op2val:0x4c48; 
   valaddr_reg:x3; val_offset:2736*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2736*FLEN/8, x4, x1, x2)

inst_1369:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x1dc and fs2 == 0 and fe2 == 0x13 and fm2 == 0x048 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x51dc; op2val:0x4c48; 
   valaddr_reg:x3; val_offset:2738*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2738*FLEN/8, x4, x1, x2)

inst_1370:// fs1 == 0 and fe1 == 0x12 and fm1 == 0x2ed and fs2 == 0 and fe2 == 0x14 and fm2 == 0x244 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4aed; op2val:0x5244; 
   valaddr_reg:x3; val_offset:2740*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2740*FLEN/8, x4, x1, x2)

inst_1371:// fs1 == 0 and fe1 == 0x12 and fm1 == 0x2ed and fs2 == 0 and fe2 == 0x14 and fm2 == 0x244 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4aed; op2val:0x5244; 
   valaddr_reg:x3; val_offset:2742*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2742*FLEN/8, x4, x1, x2)

inst_1372:// fs1 == 0 and fe1 == 0x12 and fm1 == 0x2ed and fs2 == 0 and fe2 == 0x14 and fm2 == 0x244 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4aed; op2val:0x5244; 
   valaddr_reg:x3; val_offset:2744*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2744*FLEN/8, x4, x1, x2)

inst_1373:// fs1 == 0 and fe1 == 0x12 and fm1 == 0x2ed and fs2 == 0 and fe2 == 0x14 and fm2 == 0x244 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4aed; op2val:0x5244; 
   valaddr_reg:x3; val_offset:2746*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2746*FLEN/8, x4, x1, x2)

inst_1374:// fs1 == 0 and fe1 == 0x12 and fm1 == 0x2ed and fs2 == 0 and fe2 == 0x14 and fm2 == 0x244 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4aed; op2val:0x5244; 
   valaddr_reg:x3; val_offset:2748*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2748*FLEN/8, x4, x1, x2)

inst_1375:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x3aa and fs2 == 0 and fe2 == 0x14 and fm2 == 0x02a and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4faa; op2val:0x502a; 
   valaddr_reg:x3; val_offset:2750*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2750*FLEN/8, x4, x1, x2)

inst_1376:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x3aa and fs2 == 0 and fe2 == 0x14 and fm2 == 0x02a and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4faa; op2val:0x502a; 
   valaddr_reg:x3; val_offset:2752*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2752*FLEN/8, x4, x1, x2)

inst_1377:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x3aa and fs2 == 0 and fe2 == 0x14 and fm2 == 0x02a and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4faa; op2val:0x502a; 
   valaddr_reg:x3; val_offset:2754*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2754*FLEN/8, x4, x1, x2)

inst_1378:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x3aa and fs2 == 0 and fe2 == 0x14 and fm2 == 0x02a and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4faa; op2val:0x502a; 
   valaddr_reg:x3; val_offset:2756*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2756*FLEN/8, x4, x1, x2)

inst_1379:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x3aa and fs2 == 0 and fe2 == 0x14 and fm2 == 0x02a and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4faa; op2val:0x502a; 
   valaddr_reg:x3; val_offset:2758*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2758*FLEN/8, x4, x1, x2)

inst_1380:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x265 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x269 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5265; op2val:0x4a69; 
   valaddr_reg:x3; val_offset:2760*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2760*FLEN/8, x4, x1, x2)

inst_1381:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x265 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x269 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5265; op2val:0x4a69; 
   valaddr_reg:x3; val_offset:2762*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2762*FLEN/8, x4, x1, x2)

inst_1382:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x265 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x269 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5265; op2val:0x4a69; 
   valaddr_reg:x3; val_offset:2764*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2764*FLEN/8, x4, x1, x2)

inst_1383:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x265 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x269 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5265; op2val:0x4a69; 
   valaddr_reg:x3; val_offset:2766*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2766*FLEN/8, x4, x1, x2)

inst_1384:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x265 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x269 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5265; op2val:0x4a69; 
   valaddr_reg:x3; val_offset:2768*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2768*FLEN/8, x4, x1, x2)

inst_1385:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x085 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x2f5 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5085; op2val:0x4ef5; 
   valaddr_reg:x3; val_offset:2770*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2770*FLEN/8, x4, x1, x2)

inst_1386:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x085 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x2f5 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5085; op2val:0x4ef5; 
   valaddr_reg:x3; val_offset:2772*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2772*FLEN/8, x4, x1, x2)

inst_1387:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x085 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x2f5 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5085; op2val:0x4ef5; 
   valaddr_reg:x3; val_offset:2774*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2774*FLEN/8, x4, x1, x2)

inst_1388:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x085 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x2f5 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5085; op2val:0x4ef5; 
   valaddr_reg:x3; val_offset:2776*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2776*FLEN/8, x4, x1, x2)

inst_1389:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x085 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x2f5 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5085; op2val:0x4ef5; 
   valaddr_reg:x3; val_offset:2778*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2778*FLEN/8, x4, x1, x2)

inst_1390:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x264 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x270 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5264; op2val:0x4a70; 
   valaddr_reg:x3; val_offset:2780*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2780*FLEN/8, x4, x1, x2)

inst_1391:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x264 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x270 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5264; op2val:0x4a70; 
   valaddr_reg:x3; val_offset:2782*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2782*FLEN/8, x4, x1, x2)

inst_1392:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x264 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x270 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5264; op2val:0x4a70; 
   valaddr_reg:x3; val_offset:2784*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2784*FLEN/8, x4, x1, x2)

inst_1393:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x264 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x270 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5264; op2val:0x4a70; 
   valaddr_reg:x3; val_offset:2786*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2786*FLEN/8, x4, x1, x2)

inst_1394:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x264 and fs2 == 0 and fe2 == 0x12 and fm2 == 0x270 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5264; op2val:0x4a70; 
   valaddr_reg:x3; val_offset:2788*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2788*FLEN/8, x4, x1, x2)

inst_1395:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x288 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x0bc and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4e88; op2val:0x50bc; 
   valaddr_reg:x3; val_offset:2790*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2790*FLEN/8, x4, x1, x2)

inst_1396:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x288 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x0bc and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4e88; op2val:0x50bc; 
   valaddr_reg:x3; val_offset:2792*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2792*FLEN/8, x4, x1, x2)

inst_1397:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x288 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x0bc and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4e88; op2val:0x50bc; 
   valaddr_reg:x3; val_offset:2794*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2794*FLEN/8, x4, x1, x2)

inst_1398:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x288 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x0bc and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4e88; op2val:0x50bc; 
   valaddr_reg:x3; val_offset:2796*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2796*FLEN/8, x4, x1, x2)

inst_1399:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x288 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x0bc and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4e88; op2val:0x50bc; 
   valaddr_reg:x3; val_offset:2798*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2798*FLEN/8, x4, x1, x2)

inst_1400:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x30c and fs2 == 0 and fe2 == 0x14 and fm2 == 0x079 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4f0c; op2val:0x5079; 
   valaddr_reg:x3; val_offset:2800*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2800*FLEN/8, x4, x1, x2)

inst_1401:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x30c and fs2 == 0 and fe2 == 0x14 and fm2 == 0x079 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4f0c; op2val:0x5079; 
   valaddr_reg:x3; val_offset:2802*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2802*FLEN/8, x4, x1, x2)

inst_1402:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x30c and fs2 == 0 and fe2 == 0x14 and fm2 == 0x079 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4f0c; op2val:0x5079; 
   valaddr_reg:x3; val_offset:2804*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2804*FLEN/8, x4, x1, x2)

inst_1403:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x30c and fs2 == 0 and fe2 == 0x14 and fm2 == 0x079 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4f0c; op2val:0x5079; 
   valaddr_reg:x3; val_offset:2806*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2806*FLEN/8, x4, x1, x2)

inst_1404:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x30c and fs2 == 0 and fe2 == 0x14 and fm2 == 0x079 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4f0c; op2val:0x5079; 
   valaddr_reg:x3; val_offset:2808*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2808*FLEN/8, x4, x1, x2)

inst_1405:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x364 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x04e and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4f64; op2val:0x504e; 
   valaddr_reg:x3; val_offset:2810*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2810*FLEN/8, x4, x1, x2)

inst_1406:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x364 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x04e and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4f64; op2val:0x504e; 
   valaddr_reg:x3; val_offset:2812*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2812*FLEN/8, x4, x1, x2)

inst_1407:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x364 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x04e and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4f64; op2val:0x504e; 
   valaddr_reg:x3; val_offset:2814*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2814*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_12)

inst_1408:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x364 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x04e and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4f64; op2val:0x504e; 
   valaddr_reg:x3; val_offset:2816*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2816*FLEN/8, x4, x1, x2)

inst_1409:// fs1 == 0 and fe1 == 0x13 and fm1 == 0x364 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x04e and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4f64; op2val:0x504e; 
   valaddr_reg:x3; val_offset:2818*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2818*FLEN/8, x4, x1, x2)

inst_1410:// fs1 == 0 and fe1 == 0x12 and fm1 == 0x0fd and fs2 == 0 and fe2 == 0x14 and fm2 == 0x2c0 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x48fd; op2val:0x52c0; 
   valaddr_reg:x3; val_offset:2820*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2820*FLEN/8, x4, x1, x2)

inst_1411:// fs1 == 0 and fe1 == 0x12 and fm1 == 0x0fd and fs2 == 0 and fe2 == 0x14 and fm2 == 0x2c0 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x48fd; op2val:0x52c0; 
   valaddr_reg:x3; val_offset:2822*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2822*FLEN/8, x4, x1, x2)

inst_1412:// fs1 == 0 and fe1 == 0x12 and fm1 == 0x0fd and fs2 == 0 and fe2 == 0x14 and fm2 == 0x2c0 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x48fd; op2val:0x52c0; 
   valaddr_reg:x3; val_offset:2824*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2824*FLEN/8, x4, x1, x2)

inst_1413:// fs1 == 0 and fe1 == 0x12 and fm1 == 0x0fd and fs2 == 0 and fe2 == 0x14 and fm2 == 0x2c0 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x48fd; op2val:0x52c0; 
   valaddr_reg:x3; val_offset:2826*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2826*FLEN/8, x4, x1, x2)

inst_1414:// fs1 == 0 and fe1 == 0x12 and fm1 == 0x0fd and fs2 == 0 and fe2 == 0x14 and fm2 == 0x2c0 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x48fd; op2val:0x52c0; 
   valaddr_reg:x3; val_offset:2828*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2828*FLEN/8, x4, x1, x2)

inst_1415:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x125 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x1b6 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5125; op2val:0x4db6; 
   valaddr_reg:x3; val_offset:2830*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2830*FLEN/8, x4, x1, x2)

inst_1416:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x125 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x1b6 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5125; op2val:0x4db6; 
   valaddr_reg:x3; val_offset:2832*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2832*FLEN/8, x4, x1, x2)

inst_1417:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x125 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x1b6 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5125; op2val:0x4db6; 
   valaddr_reg:x3; val_offset:2834*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2834*FLEN/8, x4, x1, x2)

inst_1418:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x125 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x1b6 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5125; op2val:0x4db6; 
   valaddr_reg:x3; val_offset:2836*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2836*FLEN/8, x4, x1, x2)

inst_1419:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x125 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x1b6 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x5125; op2val:0x4db6; 
   valaddr_reg:x3; val_offset:2838*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2838*FLEN/8, x4, x1, x2)

inst_1420:// fs1 == 0 and fe1 == 0x12 and fm1 == 0x2ea and fs2 == 0 and fe2 == 0x14 and fm2 == 0x245 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4aea; op2val:0x5245; 
   valaddr_reg:x3; val_offset:2840*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2840*FLEN/8, x4, x1, x2)

inst_1421:// fs1 == 0 and fe1 == 0x12 and fm1 == 0x2ea and fs2 == 0 and fe2 == 0x14 and fm2 == 0x245 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4aea; op2val:0x5245; 
   valaddr_reg:x3; val_offset:2842*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2842*FLEN/8, x4, x1, x2)

inst_1422:// fs1 == 0 and fe1 == 0x12 and fm1 == 0x2ea and fs2 == 0 and fe2 == 0x14 and fm2 == 0x245 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4aea; op2val:0x5245; 
   valaddr_reg:x3; val_offset:2844*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2844*FLEN/8, x4, x1, x2)

inst_1423:// fs1 == 0 and fe1 == 0x12 and fm1 == 0x2ea and fs2 == 0 and fe2 == 0x14 and fm2 == 0x245 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4aea; op2val:0x5245; 
   valaddr_reg:x3; val_offset:2846*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2846*FLEN/8, x4, x1, x2)

inst_1424:// fs1 == 0 and fe1 == 0x12 and fm1 == 0x2ea and fs2 == 0 and fe2 == 0x14 and fm2 == 0x245 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x4aea; op2val:0x5245; 
   valaddr_reg:x3; val_offset:2848*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2848*FLEN/8, x4, x1, x2)

inst_1425:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x1a1 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x0bd and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x51a1; op2val:0x4cbd; 
   valaddr_reg:x3; val_offset:2850*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2850*FLEN/8, x4, x1, x2)

inst_1426:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x1a1 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x0bd and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x51a1; op2val:0x4cbd; 
   valaddr_reg:x3; val_offset:2852*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2852*FLEN/8, x4, x1, x2)

inst_1427:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x1a1 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x0bd and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x51a1; op2val:0x4cbd; 
   valaddr_reg:x3; val_offset:2854*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2854*FLEN/8, x4, x1, x2)

inst_1428:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x1a1 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x0bd and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x51a1; op2val:0x4cbd; 
   valaddr_reg:x3; val_offset:2856*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2856*FLEN/8, x4, x1, x2)

inst_1429:// fs1 == 0 and fe1 == 0x14 and fm1 == 0x1a1 and fs2 == 0 and fe2 == 0x13 and fm2 == 0x0bd and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x51a1; op2val:0x4cbd; 
   valaddr_reg:x3; val_offset:2858*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2858*FLEN/8, x4, x1, x2)

inst_1430:// fs1 == 0 and fe1 == 0x0f and fm1 == 0x1f5 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x3d0 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3df5; op2val:0x53d0; 
   valaddr_reg:x3; val_offset:2860*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2860*FLEN/8, x4, x1, x2)

inst_1431:// fs1 == 0 and fe1 == 0x0f and fm1 == 0x1f5 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x3d0 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3df5; op2val:0x53d0; 
   valaddr_reg:x3; val_offset:2862*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2862*FLEN/8, x4, x1, x2)

inst_1432:// fs1 == 0 and fe1 == 0x0f and fm1 == 0x1f5 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x3d0 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3df5; op2val:0x53d0; 
   valaddr_reg:x3; val_offset:2864*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2864*FLEN/8, x4, x1, x2)

inst_1433:// fs1 == 0 and fe1 == 0x0f and fm1 == 0x1f5 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x3d0 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3df5; op2val:0x53d0; 
   valaddr_reg:x3; val_offset:2866*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2866*FLEN/8, x4, x1, x2)

inst_1434:// fs1 == 0 and fe1 == 0x0f and fm1 == 0x1f5 and fs2 == 0 and fe2 == 0x14 and fm2 == 0x3d0 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3df5; op2val:0x53d0; 
   valaddr_reg:x3; val_offset:2868*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2868*FLEN/8, x4, x1, x2)

inst_1435:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x016 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x32c and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3416; op2val:0xb32c; 
   valaddr_reg:x3; val_offset:2870*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2870*FLEN/8, x4, x1, x2)

inst_1436:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x016 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x32c and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3416; op2val:0xb32c; 
   valaddr_reg:x3; val_offset:2872*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2872*FLEN/8, x4, x1, x2)

inst_1437:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x016 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x32c and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3416; op2val:0xb32c; 
   valaddr_reg:x3; val_offset:2874*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2874*FLEN/8, x4, x1, x2)

inst_1438:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x016 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x32c and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3416; op2val:0xb32c; 
   valaddr_reg:x3; val_offset:2876*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2876*FLEN/8, x4, x1, x2)

inst_1439:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x016 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x32c and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3416; op2val:0xb32c; 
   valaddr_reg:x3; val_offset:2878*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2878*FLEN/8, x4, x1, x2)

inst_1440:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x38c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x30c and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x378c; op2val:0xb70c; 
   valaddr_reg:x3; val_offset:2880*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2880*FLEN/8, x4, x1, x2)

inst_1441:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x38c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x30c and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x378c; op2val:0xb70c; 
   valaddr_reg:x3; val_offset:2882*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2882*FLEN/8, x4, x1, x2)

inst_1442:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x38c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x30c and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x378c; op2val:0xb70c; 
   valaddr_reg:x3; val_offset:2884*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2884*FLEN/8, x4, x1, x2)

inst_1443:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x38c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x30c and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x378c; op2val:0xb70c; 
   valaddr_reg:x3; val_offset:2886*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2886*FLEN/8, x4, x1, x2)

inst_1444:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x38c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x30c and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x378c; op2val:0xb70c; 
   valaddr_reg:x3; val_offset:2888*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2888*FLEN/8, x4, x1, x2)

inst_1445:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x10d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x08d and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x350d; op2val:0xb48d; 
   valaddr_reg:x3; val_offset:2890*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2890*FLEN/8, x4, x1, x2)

inst_1446:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x10d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x08d and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x350d; op2val:0xb48d; 
   valaddr_reg:x3; val_offset:2892*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2892*FLEN/8, x4, x1, x2)

inst_1447:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x10d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x08d and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x350d; op2val:0xb48d; 
   valaddr_reg:x3; val_offset:2894*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2894*FLEN/8, x4, x1, x2)

inst_1448:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x10d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x08d and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x350d; op2val:0xb48d; 
   valaddr_reg:x3; val_offset:2896*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2896*FLEN/8, x4, x1, x2)

inst_1449:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x10d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x08d and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x350d; op2val:0xb48d; 
   valaddr_reg:x3; val_offset:2898*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2898*FLEN/8, x4, x1, x2)

inst_1450:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x17c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0fc and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x357c; op2val:0xb4fc; 
   valaddr_reg:x3; val_offset:2900*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2900*FLEN/8, x4, x1, x2)

inst_1451:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x17c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0fc and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x357c; op2val:0xb4fc; 
   valaddr_reg:x3; val_offset:2902*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2902*FLEN/8, x4, x1, x2)

inst_1452:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x17c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0fc and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x357c; op2val:0xb4fc; 
   valaddr_reg:x3; val_offset:2904*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2904*FLEN/8, x4, x1, x2)

inst_1453:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x17c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0fc and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x357c; op2val:0xb4fc; 
   valaddr_reg:x3; val_offset:2906*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2906*FLEN/8, x4, x1, x2)

inst_1454:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x17c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0fc and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x357c; op2val:0xb4fc; 
   valaddr_reg:x3; val_offset:2908*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2908*FLEN/8, x4, x1, x2)

inst_1455:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x232 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1f2 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a32; op2val:0xb9f2; 
   valaddr_reg:x3; val_offset:2910*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2910*FLEN/8, x4, x1, x2)

inst_1456:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x232 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1f2 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a32; op2val:0xb9f2; 
   valaddr_reg:x3; val_offset:2912*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2912*FLEN/8, x4, x1, x2)

inst_1457:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x232 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1f2 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a32; op2val:0xb9f2; 
   valaddr_reg:x3; val_offset:2914*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2914*FLEN/8, x4, x1, x2)

inst_1458:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x232 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1f2 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a32; op2val:0xb9f2; 
   valaddr_reg:x3; val_offset:2916*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2916*FLEN/8, x4, x1, x2)

inst_1459:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x232 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1f2 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a32; op2val:0xb9f2; 
   valaddr_reg:x3; val_offset:2918*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2918*FLEN/8, x4, x1, x2)

inst_1460:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1d4 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x194 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39d4; op2val:0xb994; 
   valaddr_reg:x3; val_offset:2920*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2920*FLEN/8, x4, x1, x2)

inst_1461:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1d4 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x194 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39d4; op2val:0xb994; 
   valaddr_reg:x3; val_offset:2922*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2922*FLEN/8, x4, x1, x2)

inst_1462:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1d4 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x194 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39d4; op2val:0xb994; 
   valaddr_reg:x3; val_offset:2924*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2924*FLEN/8, x4, x1, x2)

inst_1463:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1d4 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x194 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39d4; op2val:0xb994; 
   valaddr_reg:x3; val_offset:2926*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2926*FLEN/8, x4, x1, x2)

inst_1464:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1d4 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x194 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39d4; op2val:0xb994; 
   valaddr_reg:x3; val_offset:2928*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2928*FLEN/8, x4, x1, x2)

inst_1465:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x310 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2d0 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b10; op2val:0xbad0; 
   valaddr_reg:x3; val_offset:2930*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2930*FLEN/8, x4, x1, x2)

inst_1466:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x310 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2d0 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b10; op2val:0xbad0; 
   valaddr_reg:x3; val_offset:2932*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2932*FLEN/8, x4, x1, x2)

inst_1467:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x310 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2d0 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b10; op2val:0xbad0; 
   valaddr_reg:x3; val_offset:2934*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2934*FLEN/8, x4, x1, x2)

inst_1468:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x310 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2d0 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b10; op2val:0xbad0; 
   valaddr_reg:x3; val_offset:2936*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2936*FLEN/8, x4, x1, x2)

inst_1469:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x310 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x2d0 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b10; op2val:0xbad0; 
   valaddr_reg:x3; val_offset:2938*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2938*FLEN/8, x4, x1, x2)

inst_1470:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3af and fs2 == 1 and fe2 == 0x0e and fm2 == 0x36f and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3baf; op2val:0xbb6f; 
   valaddr_reg:x3; val_offset:2940*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2940*FLEN/8, x4, x1, x2)

inst_1471:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3af and fs2 == 1 and fe2 == 0x0e and fm2 == 0x36f and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3baf; op2val:0xbb6f; 
   valaddr_reg:x3; val_offset:2942*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2942*FLEN/8, x4, x1, x2)

inst_1472:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3af and fs2 == 1 and fe2 == 0x0e and fm2 == 0x36f and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3baf; op2val:0xbb6f; 
   valaddr_reg:x3; val_offset:2944*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2944*FLEN/8, x4, x1, x2)

inst_1473:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3af and fs2 == 1 and fe2 == 0x0e and fm2 == 0x36f and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3baf; op2val:0xbb6f; 
   valaddr_reg:x3; val_offset:2946*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2946*FLEN/8, x4, x1, x2)

inst_1474:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3af and fs2 == 1 and fe2 == 0x0e and fm2 == 0x36f and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3baf; op2val:0xbb6f; 
   valaddr_reg:x3; val_offset:2948*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2948*FLEN/8, x4, x1, x2)

inst_1475:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3d8 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x358 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37d8; op2val:0xb758; 
   valaddr_reg:x3; val_offset:2950*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2950*FLEN/8, x4, x1, x2)

inst_1476:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3d8 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x358 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37d8; op2val:0xb758; 
   valaddr_reg:x3; val_offset:2952*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2952*FLEN/8, x4, x1, x2)

inst_1477:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3d8 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x358 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37d8; op2val:0xb758; 
   valaddr_reg:x3; val_offset:2954*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2954*FLEN/8, x4, x1, x2)

inst_1478:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3d8 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x358 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37d8; op2val:0xb758; 
   valaddr_reg:x3; val_offset:2956*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2956*FLEN/8, x4, x1, x2)

inst_1479:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3d8 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x358 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37d8; op2val:0xb758; 
   valaddr_reg:x3; val_offset:2958*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2958*FLEN/8, x4, x1, x2)

inst_1480:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0ed and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0ad and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38ed; op2val:0xb8ad; 
   valaddr_reg:x3; val_offset:2960*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2960*FLEN/8, x4, x1, x2)

inst_1481:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0ed and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0ad and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38ed; op2val:0xb8ad; 
   valaddr_reg:x3; val_offset:2962*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2962*FLEN/8, x4, x1, x2)

inst_1482:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0ed and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0ad and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38ed; op2val:0xb8ad; 
   valaddr_reg:x3; val_offset:2964*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2964*FLEN/8, x4, x1, x2)

inst_1483:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0ed and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0ad and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38ed; op2val:0xb8ad; 
   valaddr_reg:x3; val_offset:2966*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2966*FLEN/8, x4, x1, x2)

inst_1484:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x0ed and fs2 == 1 and fe2 == 0x0e and fm2 == 0x0ad and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x38ed; op2val:0xb8ad; 
   valaddr_reg:x3; val_offset:2968*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2968*FLEN/8, x4, x1, x2)

inst_1485:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x20a and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1ca and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a0a; op2val:0xb9ca; 
   valaddr_reg:x3; val_offset:2970*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2970*FLEN/8, x4, x1, x2)

inst_1486:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x20a and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1ca and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a0a; op2val:0xb9ca; 
   valaddr_reg:x3; val_offset:2972*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2972*FLEN/8, x4, x1, x2)

inst_1487:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x20a and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1ca and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a0a; op2val:0xb9ca; 
   valaddr_reg:x3; val_offset:2974*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2974*FLEN/8, x4, x1, x2)

inst_1488:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x20a and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1ca and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a0a; op2val:0xb9ca; 
   valaddr_reg:x3; val_offset:2976*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2976*FLEN/8, x4, x1, x2)

inst_1489:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x20a and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1ca and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a0a; op2val:0xb9ca; 
   valaddr_reg:x3; val_offset:2978*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2978*FLEN/8, x4, x1, x2)

inst_1490:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x04b and fs2 == 1 and fe2 == 0x0c and fm2 == 0x396 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x344b; op2val:0xb396; 
   valaddr_reg:x3; val_offset:2980*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2980*FLEN/8, x4, x1, x2)

inst_1491:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x04b and fs2 == 1 and fe2 == 0x0c and fm2 == 0x396 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x344b; op2val:0xb396; 
   valaddr_reg:x3; val_offset:2982*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2982*FLEN/8, x4, x1, x2)

inst_1492:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x04b and fs2 == 1 and fe2 == 0x0c and fm2 == 0x396 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x344b; op2val:0xb396; 
   valaddr_reg:x3; val_offset:2984*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2984*FLEN/8, x4, x1, x2)

inst_1493:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x04b and fs2 == 1 and fe2 == 0x0c and fm2 == 0x396 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x344b; op2val:0xb396; 
   valaddr_reg:x3; val_offset:2986*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2986*FLEN/8, x4, x1, x2)

inst_1494:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x04b and fs2 == 1 and fe2 == 0x0c and fm2 == 0x396 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x344b; op2val:0xb396; 
   valaddr_reg:x3; val_offset:2988*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2988*FLEN/8, x4, x1, x2)

inst_1495:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2c5 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x245 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36c5; op2val:0xb645; 
   valaddr_reg:x3; val_offset:2990*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 2990*FLEN/8, x4, x1, x2)

inst_1496:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2c5 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x245 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36c5; op2val:0xb645; 
   valaddr_reg:x3; val_offset:2992*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 2992*FLEN/8, x4, x1, x2)

inst_1497:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2c5 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x245 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36c5; op2val:0xb645; 
   valaddr_reg:x3; val_offset:2994*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 2994*FLEN/8, x4, x1, x2)

inst_1498:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2c5 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x245 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36c5; op2val:0xb645; 
   valaddr_reg:x3; val_offset:2996*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 2996*FLEN/8, x4, x1, x2)

inst_1499:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2c5 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x245 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36c5; op2val:0xb645; 
   valaddr_reg:x3; val_offset:2998*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 2998*FLEN/8, x4, x1, x2)

inst_1500:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x370 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x270 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3370; op2val:0xb270; 
   valaddr_reg:x3; val_offset:3000*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 3000*FLEN/8, x4, x1, x2)

inst_1501:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x370 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x270 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3370; op2val:0xb270; 
   valaddr_reg:x3; val_offset:3002*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 3002*FLEN/8, x4, x1, x2)

inst_1502:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x370 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x270 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3370; op2val:0xb270; 
   valaddr_reg:x3; val_offset:3004*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 3004*FLEN/8, x4, x1, x2)

inst_1503:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x370 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x270 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3370; op2val:0xb270; 
   valaddr_reg:x3; val_offset:3006*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 3006*FLEN/8, x4, x1, x2)

inst_1504:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x370 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x270 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3370; op2val:0xb270; 
   valaddr_reg:x3; val_offset:3008*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 3008*FLEN/8, x4, x1, x2)

inst_1505:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x15d and fs2 == 1 and fe2 == 0x0e and fm2 == 0x11d and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x395d; op2val:0xb91d; 
   valaddr_reg:x3; val_offset:3010*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 3010*FLEN/8, x4, x1, x2)

inst_1506:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x15d and fs2 == 1 and fe2 == 0x0e and fm2 == 0x11d and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x395d; op2val:0xb91d; 
   valaddr_reg:x3; val_offset:3012*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 3012*FLEN/8, x4, x1, x2)

inst_1507:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x15d and fs2 == 1 and fe2 == 0x0e and fm2 == 0x11d and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x395d; op2val:0xb91d; 
   valaddr_reg:x3; val_offset:3014*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 3014*FLEN/8, x4, x1, x2)

inst_1508:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x15d and fs2 == 1 and fe2 == 0x0e and fm2 == 0x11d and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x395d; op2val:0xb91d; 
   valaddr_reg:x3; val_offset:3016*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 3016*FLEN/8, x4, x1, x2)

inst_1509:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x15d and fs2 == 1 and fe2 == 0x0e and fm2 == 0x11d and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x395d; op2val:0xb91d; 
   valaddr_reg:x3; val_offset:3018*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 3018*FLEN/8, x4, x1, x2)

inst_1510:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x211 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1d1 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a11; op2val:0xb9d1; 
   valaddr_reg:x3; val_offset:3020*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 3020*FLEN/8, x4, x1, x2)

inst_1511:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x211 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1d1 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a11; op2val:0xb9d1; 
   valaddr_reg:x3; val_offset:3022*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 3022*FLEN/8, x4, x1, x2)

inst_1512:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x211 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1d1 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a11; op2val:0xb9d1; 
   valaddr_reg:x3; val_offset:3024*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 3024*FLEN/8, x4, x1, x2)

inst_1513:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x211 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1d1 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a11; op2val:0xb9d1; 
   valaddr_reg:x3; val_offset:3026*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 3026*FLEN/8, x4, x1, x2)

inst_1514:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x211 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1d1 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a11; op2val:0xb9d1; 
   valaddr_reg:x3; val_offset:3028*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 3028*FLEN/8, x4, x1, x2)

inst_1515:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2bb and fs2 == 1 and fe2 == 0x0e and fm2 == 0x27b and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3abb; op2val:0xba7b; 
   valaddr_reg:x3; val_offset:3030*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 3030*FLEN/8, x4, x1, x2)

inst_1516:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2bb and fs2 == 1 and fe2 == 0x0e and fm2 == 0x27b and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3abb; op2val:0xba7b; 
   valaddr_reg:x3; val_offset:3032*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 3032*FLEN/8, x4, x1, x2)

inst_1517:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2bb and fs2 == 1 and fe2 == 0x0e and fm2 == 0x27b and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3abb; op2val:0xba7b; 
   valaddr_reg:x3; val_offset:3034*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 3034*FLEN/8, x4, x1, x2)

inst_1518:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2bb and fs2 == 1 and fe2 == 0x0e and fm2 == 0x27b and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3abb; op2val:0xba7b; 
   valaddr_reg:x3; val_offset:3036*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 3036*FLEN/8, x4, x1, x2)

inst_1519:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x2bb and fs2 == 1 and fe2 == 0x0e and fm2 == 0x27b and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3abb; op2val:0xba7b; 
   valaddr_reg:x3; val_offset:3038*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 3038*FLEN/8, x4, x1, x2)

inst_1520:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1c1 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x181 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39c1; op2val:0xb981; 
   valaddr_reg:x3; val_offset:3040*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 3040*FLEN/8, x4, x1, x2)

inst_1521:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1c1 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x181 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39c1; op2val:0xb981; 
   valaddr_reg:x3; val_offset:3042*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 3042*FLEN/8, x4, x1, x2)

inst_1522:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1c1 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x181 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39c1; op2val:0xb981; 
   valaddr_reg:x3; val_offset:3044*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 3044*FLEN/8, x4, x1, x2)

inst_1523:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1c1 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x181 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39c1; op2val:0xb981; 
   valaddr_reg:x3; val_offset:3046*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 3046*FLEN/8, x4, x1, x2)

inst_1524:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1c1 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x181 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39c1; op2val:0xb981; 
   valaddr_reg:x3; val_offset:3048*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 3048*FLEN/8, x4, x1, x2)

inst_1525:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x31a and fs2 == 1 and fe2 == 0x0d and fm2 == 0x29a and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x371a; op2val:0xb69a; 
   valaddr_reg:x3; val_offset:3050*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 3050*FLEN/8, x4, x1, x2)

inst_1526:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x31a and fs2 == 1 and fe2 == 0x0d and fm2 == 0x29a and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x371a; op2val:0xb69a; 
   valaddr_reg:x3; val_offset:3052*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 3052*FLEN/8, x4, x1, x2)

inst_1527:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x31a and fs2 == 1 and fe2 == 0x0d and fm2 == 0x29a and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x371a; op2val:0xb69a; 
   valaddr_reg:x3; val_offset:3054*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 3054*FLEN/8, x4, x1, x2)

inst_1528:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x31a and fs2 == 1 and fe2 == 0x0d and fm2 == 0x29a and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x371a; op2val:0xb69a; 
   valaddr_reg:x3; val_offset:3056*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 3056*FLEN/8, x4, x1, x2)

inst_1529:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x31a and fs2 == 1 and fe2 == 0x0d and fm2 == 0x29a and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x371a; op2val:0xb69a; 
   valaddr_reg:x3; val_offset:3058*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 3058*FLEN/8, x4, x1, x2)

inst_1530:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3c3 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x343 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37c3; op2val:0xb743; 
   valaddr_reg:x3; val_offset:3060*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 3060*FLEN/8, x4, x1, x2)

inst_1531:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3c3 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x343 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37c3; op2val:0xb743; 
   valaddr_reg:x3; val_offset:3062*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 3062*FLEN/8, x4, x1, x2)

inst_1532:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3c3 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x343 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37c3; op2val:0xb743; 
   valaddr_reg:x3; val_offset:3064*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 3064*FLEN/8, x4, x1, x2)

inst_1533:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3c3 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x343 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37c3; op2val:0xb743; 
   valaddr_reg:x3; val_offset:3066*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 3066*FLEN/8, x4, x1, x2)

inst_1534:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x3c3 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x343 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x37c3; op2val:0xb743; 
   valaddr_reg:x3; val_offset:3068*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 3068*FLEN/8, x4, x1, x2)

inst_1535:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x229 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1a9 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3629; op2val:0xb5a9; 
   valaddr_reg:x3; val_offset:3070*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 3070*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_13)

inst_1536:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x229 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1a9 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3629; op2val:0xb5a9; 
   valaddr_reg:x3; val_offset:3072*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 3072*FLEN/8, x4, x1, x2)

inst_1537:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x229 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1a9 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3629; op2val:0xb5a9; 
   valaddr_reg:x3; val_offset:3074*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 3074*FLEN/8, x4, x1, x2)

inst_1538:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x229 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1a9 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3629; op2val:0xb5a9; 
   valaddr_reg:x3; val_offset:3076*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 3076*FLEN/8, x4, x1, x2)

inst_1539:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x229 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1a9 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3629; op2val:0xb5a9; 
   valaddr_reg:x3; val_offset:3078*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 3078*FLEN/8, x4, x1, x2)

inst_1540:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3dd and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2dd and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x33dd; op2val:0xb2dd; 
   valaddr_reg:x3; val_offset:3080*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 3080*FLEN/8, x4, x1, x2)

inst_1541:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3dd and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2dd and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x33dd; op2val:0xb2dd; 
   valaddr_reg:x3; val_offset:3082*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 3082*FLEN/8, x4, x1, x2)

inst_1542:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3dd and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2dd and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x33dd; op2val:0xb2dd; 
   valaddr_reg:x3; val_offset:3084*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 3084*FLEN/8, x4, x1, x2)

inst_1543:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3dd and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2dd and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x33dd; op2val:0xb2dd; 
   valaddr_reg:x3; val_offset:3086*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 3086*FLEN/8, x4, x1, x2)

inst_1544:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x3dd and fs2 == 1 and fe2 == 0x0c and fm2 == 0x2dd and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x33dd; op2val:0xb2dd; 
   valaddr_reg:x3; val_offset:3088*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 3088*FLEN/8, x4, x1, x2)

inst_1545:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1bc and fs2 == 1 and fe2 == 0x0e and fm2 == 0x17c and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39bc; op2val:0xb97c; 
   valaddr_reg:x3; val_offset:3090*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 3090*FLEN/8, x4, x1, x2)

inst_1546:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1bc and fs2 == 1 and fe2 == 0x0e and fm2 == 0x17c and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39bc; op2val:0xb97c; 
   valaddr_reg:x3; val_offset:3092*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 3092*FLEN/8, x4, x1, x2)

inst_1547:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1bc and fs2 == 1 and fe2 == 0x0e and fm2 == 0x17c and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39bc; op2val:0xb97c; 
   valaddr_reg:x3; val_offset:3094*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 3094*FLEN/8, x4, x1, x2)

inst_1548:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1bc and fs2 == 1 and fe2 == 0x0e and fm2 == 0x17c and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39bc; op2val:0xb97c; 
   valaddr_reg:x3; val_offset:3096*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 3096*FLEN/8, x4, x1, x2)

inst_1549:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x1bc and fs2 == 1 and fe2 == 0x0e and fm2 == 0x17c and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x39bc; op2val:0xb97c; 
   valaddr_reg:x3; val_offset:3098*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 3098*FLEN/8, x4, x1, x2)

inst_1550:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x240 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1c0 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3640; op2val:0xb5c0; 
   valaddr_reg:x3; val_offset:3100*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 3100*FLEN/8, x4, x1, x2)

inst_1551:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x240 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1c0 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3640; op2val:0xb5c0; 
   valaddr_reg:x3; val_offset:3102*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 3102*FLEN/8, x4, x1, x2)

inst_1552:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x240 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1c0 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3640; op2val:0xb5c0; 
   valaddr_reg:x3; val_offset:3104*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 3104*FLEN/8, x4, x1, x2)

inst_1553:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x240 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1c0 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3640; op2val:0xb5c0; 
   valaddr_reg:x3; val_offset:3106*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 3106*FLEN/8, x4, x1, x2)

inst_1554:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x240 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1c0 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3640; op2val:0xb5c0; 
   valaddr_reg:x3; val_offset:3108*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 3108*FLEN/8, x4, x1, x2)

inst_1555:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x132 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0b2 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3532; op2val:0xb4b2; 
   valaddr_reg:x3; val_offset:3110*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 3110*FLEN/8, x4, x1, x2)

inst_1556:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x132 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0b2 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3532; op2val:0xb4b2; 
   valaddr_reg:x3; val_offset:3112*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 3112*FLEN/8, x4, x1, x2)

inst_1557:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x132 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0b2 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3532; op2val:0xb4b2; 
   valaddr_reg:x3; val_offset:3114*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 3114*FLEN/8, x4, x1, x2)

inst_1558:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x132 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0b2 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3532; op2val:0xb4b2; 
   valaddr_reg:x3; val_offset:3116*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 3116*FLEN/8, x4, x1, x2)

inst_1559:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x132 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0b2 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3532; op2val:0xb4b2; 
   valaddr_reg:x3; val_offset:3118*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 3118*FLEN/8, x4, x1, x2)

inst_1560:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2d6 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x256 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36d6; op2val:0xb656; 
   valaddr_reg:x3; val_offset:3120*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 3120*FLEN/8, x4, x1, x2)

inst_1561:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2d6 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x256 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36d6; op2val:0xb656; 
   valaddr_reg:x3; val_offset:3122*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 3122*FLEN/8, x4, x1, x2)

inst_1562:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2d6 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x256 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36d6; op2val:0xb656; 
   valaddr_reg:x3; val_offset:3124*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 3124*FLEN/8, x4, x1, x2)

inst_1563:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2d6 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x256 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36d6; op2val:0xb656; 
   valaddr_reg:x3; val_offset:3126*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 3126*FLEN/8, x4, x1, x2)

inst_1564:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x2d6 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x256 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x36d6; op2val:0xb656; 
   valaddr_reg:x3; val_offset:3128*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 3128*FLEN/8, x4, x1, x2)

inst_1565:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1a4 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x124 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35a4; op2val:0xb524; 
   valaddr_reg:x3; val_offset:3130*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 3130*FLEN/8, x4, x1, x2)

inst_1566:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1a4 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x124 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35a4; op2val:0xb524; 
   valaddr_reg:x3; val_offset:3132*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 3132*FLEN/8, x4, x1, x2)

inst_1567:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1a4 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x124 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35a4; op2val:0xb524; 
   valaddr_reg:x3; val_offset:3134*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 3134*FLEN/8, x4, x1, x2)

inst_1568:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1a4 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x124 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35a4; op2val:0xb524; 
   valaddr_reg:x3; val_offset:3136*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 3136*FLEN/8, x4, x1, x2)

inst_1569:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1a4 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x124 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35a4; op2val:0xb524; 
   valaddr_reg:x3; val_offset:3138*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 3138*FLEN/8, x4, x1, x2)

inst_1570:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x056 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x016 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3856; op2val:0xb816; 
   valaddr_reg:x3; val_offset:3140*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 3140*FLEN/8, x4, x1, x2)

inst_1571:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x056 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x016 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3856; op2val:0xb816; 
   valaddr_reg:x3; val_offset:3142*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 3142*FLEN/8, x4, x1, x2)

inst_1572:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x056 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x016 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3856; op2val:0xb816; 
   valaddr_reg:x3; val_offset:3144*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 3144*FLEN/8, x4, x1, x2)

inst_1573:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x056 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x016 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3856; op2val:0xb816; 
   valaddr_reg:x3; val_offset:3146*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 3146*FLEN/8, x4, x1, x2)

inst_1574:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x056 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x016 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3856; op2val:0xb816; 
   valaddr_reg:x3; val_offset:3148*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 3148*FLEN/8, x4, x1, x2)

inst_1575:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x04e and fs2 == 1 and fe2 == 0x0e and fm2 == 0x00e and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x384e; op2val:0xb80e; 
   valaddr_reg:x3; val_offset:3150*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 3150*FLEN/8, x4, x1, x2)

inst_1576:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x04e and fs2 == 1 and fe2 == 0x0e and fm2 == 0x00e and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x384e; op2val:0xb80e; 
   valaddr_reg:x3; val_offset:3152*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 3152*FLEN/8, x4, x1, x2)

inst_1577:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x04e and fs2 == 1 and fe2 == 0x0e and fm2 == 0x00e and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x384e; op2val:0xb80e; 
   valaddr_reg:x3; val_offset:3154*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 3154*FLEN/8, x4, x1, x2)

inst_1578:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x04e and fs2 == 1 and fe2 == 0x0e and fm2 == 0x00e and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x384e; op2val:0xb80e; 
   valaddr_reg:x3; val_offset:3156*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 3156*FLEN/8, x4, x1, x2)

inst_1579:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x04e and fs2 == 1 and fe2 == 0x0e and fm2 == 0x00e and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x384e; op2val:0xb80e; 
   valaddr_reg:x3; val_offset:3158*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 3158*FLEN/8, x4, x1, x2)

inst_1580:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x188 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x148 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3988; op2val:0xb948; 
   valaddr_reg:x3; val_offset:3160*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 3160*FLEN/8, x4, x1, x2)

inst_1581:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x188 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x148 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3988; op2val:0xb948; 
   valaddr_reg:x3; val_offset:3162*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 3162*FLEN/8, x4, x1, x2)

inst_1582:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x188 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x148 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3988; op2val:0xb948; 
   valaddr_reg:x3; val_offset:3164*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 3164*FLEN/8, x4, x1, x2)

inst_1583:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x188 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x148 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3988; op2val:0xb948; 
   valaddr_reg:x3; val_offset:3166*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 3166*FLEN/8, x4, x1, x2)

inst_1584:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x188 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x148 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3988; op2val:0xb948; 
   valaddr_reg:x3; val_offset:3168*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 3168*FLEN/8, x4, x1, x2)

inst_1585:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x388 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x348 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b88; op2val:0xbb48; 
   valaddr_reg:x3; val_offset:3170*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 3170*FLEN/8, x4, x1, x2)

inst_1586:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x388 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x348 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b88; op2val:0xbb48; 
   valaddr_reg:x3; val_offset:3172*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 3172*FLEN/8, x4, x1, x2)

inst_1587:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x388 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x348 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b88; op2val:0xbb48; 
   valaddr_reg:x3; val_offset:3174*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 3174*FLEN/8, x4, x1, x2)

inst_1588:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x388 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x348 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b88; op2val:0xbb48; 
   valaddr_reg:x3; val_offset:3176*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 3176*FLEN/8, x4, x1, x2)

inst_1589:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x388 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x348 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b88; op2val:0xbb48; 
   valaddr_reg:x3; val_offset:3178*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 3178*FLEN/8, x4, x1, x2)

inst_1590:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x073 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x3e6 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3473; op2val:0xb3e6; 
   valaddr_reg:x3; val_offset:3180*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 3180*FLEN/8, x4, x1, x2)

inst_1591:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x073 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x3e6 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3473; op2val:0xb3e6; 
   valaddr_reg:x3; val_offset:3182*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 3182*FLEN/8, x4, x1, x2)

inst_1592:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x073 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x3e6 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3473; op2val:0xb3e6; 
   valaddr_reg:x3; val_offset:3184*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 3184*FLEN/8, x4, x1, x2)

inst_1593:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x073 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x3e6 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3473; op2val:0xb3e6; 
   valaddr_reg:x3; val_offset:3186*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 3186*FLEN/8, x4, x1, x2)

inst_1594:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x073 and fs2 == 1 and fe2 == 0x0c and fm2 == 0x3e6 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3473; op2val:0xb3e6; 
   valaddr_reg:x3; val_offset:3188*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 3188*FLEN/8, x4, x1, x2)

inst_1595:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x25f and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1df and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x365f; op2val:0xb5df; 
   valaddr_reg:x3; val_offset:3190*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 3190*FLEN/8, x4, x1, x2)

inst_1596:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x25f and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1df and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x365f; op2val:0xb5df; 
   valaddr_reg:x3; val_offset:3192*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 3192*FLEN/8, x4, x1, x2)

inst_1597:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x25f and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1df and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x365f; op2val:0xb5df; 
   valaddr_reg:x3; val_offset:3194*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 3194*FLEN/8, x4, x1, x2)

inst_1598:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x25f and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1df and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x365f; op2val:0xb5df; 
   valaddr_reg:x3; val_offset:3196*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 3196*FLEN/8, x4, x1, x2)

inst_1599:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x25f and fs2 == 1 and fe2 == 0x0d and fm2 == 0x1df and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x365f; op2val:0xb5df; 
   valaddr_reg:x3; val_offset:3198*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 3198*FLEN/8, x4, x1, x2)

inst_1600:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x058 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x018 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3858; op2val:0xb818; 
   valaddr_reg:x3; val_offset:3200*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 3200*FLEN/8, x4, x1, x2)

inst_1601:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x058 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x018 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3858; op2val:0xb818; 
   valaddr_reg:x3; val_offset:3202*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 3202*FLEN/8, x4, x1, x2)

inst_1602:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x058 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x018 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3858; op2val:0xb818; 
   valaddr_reg:x3; val_offset:3204*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 3204*FLEN/8, x4, x1, x2)

inst_1603:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x058 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x018 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3858; op2val:0xb818; 
   valaddr_reg:x3; val_offset:3206*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 3206*FLEN/8, x4, x1, x2)

inst_1604:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x058 and fs2 == 1 and fe2 == 0x0e and fm2 == 0x018 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3858; op2val:0xb818; 
   valaddr_reg:x3; val_offset:3208*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 3208*FLEN/8, x4, x1, x2)

inst_1605:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3eb and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3ab and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3beb; op2val:0xbbab; 
   valaddr_reg:x3; val_offset:3210*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 3210*FLEN/8, x4, x1, x2)

inst_1606:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3eb and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3ab and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3beb; op2val:0xbbab; 
   valaddr_reg:x3; val_offset:3212*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 3212*FLEN/8, x4, x1, x2)

inst_1607:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3eb and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3ab and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3beb; op2val:0xbbab; 
   valaddr_reg:x3; val_offset:3214*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 3214*FLEN/8, x4, x1, x2)

inst_1608:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3eb and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3ab and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3beb; op2val:0xbbab; 
   valaddr_reg:x3; val_offset:3216*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 3216*FLEN/8, x4, x1, x2)

inst_1609:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3eb and fs2 == 1 and fe2 == 0x0e and fm2 == 0x3ab and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3beb; op2val:0xbbab; 
   valaddr_reg:x3; val_offset:3218*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 3218*FLEN/8, x4, x1, x2)

inst_1610:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x37c and fs2 == 1 and fe2 == 0x0e and fm2 == 0x33c and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b7c; op2val:0xbb3c; 
   valaddr_reg:x3; val_offset:3220*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 3220*FLEN/8, x4, x1, x2)

inst_1611:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x37c and fs2 == 1 and fe2 == 0x0e and fm2 == 0x33c and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b7c; op2val:0xbb3c; 
   valaddr_reg:x3; val_offset:3222*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 3222*FLEN/8, x4, x1, x2)

inst_1612:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x37c and fs2 == 1 and fe2 == 0x0e and fm2 == 0x33c and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b7c; op2val:0xbb3c; 
   valaddr_reg:x3; val_offset:3224*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 3224*FLEN/8, x4, x1, x2)

inst_1613:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x37c and fs2 == 1 and fe2 == 0x0e and fm2 == 0x33c and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b7c; op2val:0xbb3c; 
   valaddr_reg:x3; val_offset:3226*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 3226*FLEN/8, x4, x1, x2)

inst_1614:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x37c and fs2 == 1 and fe2 == 0x0e and fm2 == 0x33c and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3b7c; op2val:0xbb3c; 
   valaddr_reg:x3; val_offset:3228*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 3228*FLEN/8, x4, x1, x2)

inst_1615:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x15c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0dc and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x355c; op2val:0xb4dc; 
   valaddr_reg:x3; val_offset:3230*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 3230*FLEN/8, x4, x1, x2)

inst_1616:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x15c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0dc and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x355c; op2val:0xb4dc; 
   valaddr_reg:x3; val_offset:3232*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 3232*FLEN/8, x4, x1, x2)

inst_1617:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x15c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0dc and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x355c; op2val:0xb4dc; 
   valaddr_reg:x3; val_offset:3234*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 3234*FLEN/8, x4, x1, x2)

inst_1618:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x15c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0dc and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x355c; op2val:0xb4dc; 
   valaddr_reg:x3; val_offset:3236*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 3236*FLEN/8, x4, x1, x2)

inst_1619:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x15c and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0dc and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x355c; op2val:0xb4dc; 
   valaddr_reg:x3; val_offset:3238*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 3238*FLEN/8, x4, x1, x2)

inst_1620:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1a1 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x121 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35a1; op2val:0xb521; 
   valaddr_reg:x3; val_offset:3240*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 3240*FLEN/8, x4, x1, x2)

inst_1621:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1a1 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x121 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35a1; op2val:0xb521; 
   valaddr_reg:x3; val_offset:3242*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 3242*FLEN/8, x4, x1, x2)

inst_1622:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1a1 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x121 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35a1; op2val:0xb521; 
   valaddr_reg:x3; val_offset:3244*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 3244*FLEN/8, x4, x1, x2)

inst_1623:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1a1 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x121 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35a1; op2val:0xb521; 
   valaddr_reg:x3; val_offset:3246*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 3246*FLEN/8, x4, x1, x2)

inst_1624:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x1a1 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x121 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x35a1; op2val:0xb521; 
   valaddr_reg:x3; val_offset:3248*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 3248*FLEN/8, x4, x1, x2)

inst_1625:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3ae and fs2 == 1 and fe2 == 0x0e and fm2 == 0x36e and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bae; op2val:0xbb6e; 
   valaddr_reg:x3; val_offset:3250*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 3250*FLEN/8, x4, x1, x2)

inst_1626:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3ae and fs2 == 1 and fe2 == 0x0e and fm2 == 0x36e and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bae; op2val:0xbb6e; 
   valaddr_reg:x3; val_offset:3252*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 3252*FLEN/8, x4, x1, x2)

inst_1627:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3ae and fs2 == 1 and fe2 == 0x0e and fm2 == 0x36e and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bae; op2val:0xbb6e; 
   valaddr_reg:x3; val_offset:3254*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 3254*FLEN/8, x4, x1, x2)

inst_1628:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3ae and fs2 == 1 and fe2 == 0x0e and fm2 == 0x36e and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bae; op2val:0xbb6e; 
   valaddr_reg:x3; val_offset:3256*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 3256*FLEN/8, x4, x1, x2)

inst_1629:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x3ae and fs2 == 1 and fe2 == 0x0e and fm2 == 0x36e and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3bae; op2val:0xbb6e; 
   valaddr_reg:x3; val_offset:3258*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 3258*FLEN/8, x4, x1, x2)

inst_1630:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x00a and fs2 == 1 and fe2 == 0x03 and fm2 == 0x0ff and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x280a; op2val:0x8cff; 
   valaddr_reg:x3; val_offset:3260*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 3260*FLEN/8, x4, x1, x2)

inst_1631:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x00a and fs2 == 1 and fe2 == 0x03 and fm2 == 0x0ff and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x280a; op2val:0x8cff; 
   valaddr_reg:x3; val_offset:3262*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 3262*FLEN/8, x4, x1, x2)

inst_1632:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x00a and fs2 == 1 and fe2 == 0x03 and fm2 == 0x0ff and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x280a; op2val:0x8cff; 
   valaddr_reg:x3; val_offset:3264*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 3264*FLEN/8, x4, x1, x2)

inst_1633:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x00a and fs2 == 1 and fe2 == 0x03 and fm2 == 0x0ff and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x280a; op2val:0x8cff; 
   valaddr_reg:x3; val_offset:3266*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 3266*FLEN/8, x4, x1, x2)

inst_1634:// fs1 == 0 and fe1 == 0x0a and fm1 == 0x00a and fs2 == 1 and fe2 == 0x03 and fm2 == 0x0ff and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x280a; op2val:0x8cff; 
   valaddr_reg:x3; val_offset:3268*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 3268*FLEN/8, x4, x1, x2)

inst_1635:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x127 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0a7 and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3527; op2val:0xb4a7; 
   valaddr_reg:x3; val_offset:3270*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 3270*FLEN/8, x4, x1, x2)

inst_1636:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x127 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0a7 and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3527; op2val:0xb4a7; 
   valaddr_reg:x3; val_offset:3272*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 3272*FLEN/8, x4, x1, x2)

inst_1637:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x127 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0a7 and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3527; op2val:0xb4a7; 
   valaddr_reg:x3; val_offset:3274*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 3274*FLEN/8, x4, x1, x2)

inst_1638:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x127 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0a7 and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3527; op2val:0xb4a7; 
   valaddr_reg:x3; val_offset:3276*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 3276*FLEN/8, x4, x1, x2)

inst_1639:// fs1 == 0 and fe1 == 0x0d and fm1 == 0x127 and fs2 == 1 and fe2 == 0x0d and fm2 == 0x0a7 and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3527; op2val:0xb4a7; 
   valaddr_reg:x3; val_offset:3278*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 3278*FLEN/8, x4, x1, x2)

inst_1640:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x23e and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1fe and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a3e; op2val:0xb9fe; 
   valaddr_reg:x3; val_offset:3280*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 3280*FLEN/8, x4, x1, x2)

inst_1641:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x23e and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1fe and  fcsr == 0x20 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a3e; op2val:0xb9fe; 
   valaddr_reg:x3; val_offset:3282*FLEN/8; rmval:dyn; fcsr: 32;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 32, 0, x3, 3282*FLEN/8, x4, x1, x2)

inst_1642:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x23e and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1fe and  fcsr == 0x40 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a3e; op2val:0xb9fe; 
   valaddr_reg:x3; val_offset:3284*FLEN/8; rmval:dyn; fcsr: 64;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 64, 0, x3, 3284*FLEN/8, x4, x1, x2)

inst_1643:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x23e and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1fe and  fcsr == 0x60 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a3e; op2val:0xb9fe; 
   valaddr_reg:x3; val_offset:3286*FLEN/8; rmval:dyn; fcsr: 96;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 96, 0, x3, 3286*FLEN/8, x4, x1, x2)

inst_1644:// fs1 == 0 and fe1 == 0x0e and fm1 == 0x23e and fs2 == 1 and fe2 == 0x0e and fm2 == 0x1fe and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x3a3e; op2val:0xb9fe; 
   valaddr_reg:x3; val_offset:3288*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 3288*FLEN/8, x4, x1, x2)

inst_1645:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x0fa and fs2 == 1 and fe2 == 0x0c and fm2 == 0x0fa and  fcsr == 0x0 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x30fa; op2val:0xb0fa; 
   valaddr_reg:x3; val_offset:3290*FLEN/8; rmval:dyn; fcsr: 0;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 0, 0, x3, 3290*FLEN/8, x4, x1, x2)

inst_1646:// fs1 == 0 and fe1 == 0x0c and fm1 == 0x0fa and fs2 == 1 and fe2 == 0x0c and fm2 == 0x0fa and  fcsr == 0x80 and rm_val == 7  and rs1_nan_prefix == 0xffff and rs2_nan_prefix == 0xffff  
/* opcode: fadd.h ; op1:f30; op2:f29; dest:f31; op1val:0x30fa; op2val:0xb0fa; 
   valaddr_reg:x3; val_offset:3292*FLEN/8; rmval:dyn; fcsr: 128;
   correctval:??; testreg:x2 
*/
TEST_FPRR_OP(fadd.h, f31, f30, f29, dyn, 128, 0, x3, 3292*FLEN/8, x4, x1, x2)
#endif


RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(12538,16,FLEN)
NAN_BOXED(12538,16,FLEN)
NAN_BOXED(12538,16,FLEN)
NAN_BOXED(45306,16,FLEN)
NAN_BOXED(12538,16,FLEN)
NAN_BOXED(45306,16,FLEN)
NAN_BOXED(12538,16,FLEN)
NAN_BOXED(45306,16,FLEN)
NAN_BOXED(12538,16,FLEN)
NAN_BOXED(12538,16,FLEN)
NAN_BOXED(14498,16,FLEN)
NAN_BOXED(47266,16,FLEN)
NAN_BOXED(14498,16,FLEN)
NAN_BOXED(47266,16,FLEN)
NAN_BOXED(14498,16,FLEN)
NAN_BOXED(47266,16,FLEN)
NAN_BOXED(14498,16,FLEN)
NAN_BOXED(47266,16,FLEN)
NAN_BOXED(14498,16,FLEN)
NAN_BOXED(47266,16,FLEN)
NAN_BOXED(14289,16,FLEN)
NAN_BOXED(47057,16,FLEN)
NAN_BOXED(14289,16,FLEN)
NAN_BOXED(47057,16,FLEN)
NAN_BOXED(14289,16,FLEN)
NAN_BOXED(47057,16,FLEN)
NAN_BOXED(14289,16,FLEN)
NAN_BOXED(47057,16,FLEN)
NAN_BOXED(14289,16,FLEN)
NAN_BOXED(47057,16,FLEN)
NAN_BOXED(13035,16,FLEN)
NAN_BOXED(45803,16,FLEN)
NAN_BOXED(13035,16,FLEN)
NAN_BOXED(45803,16,FLEN)
NAN_BOXED(13035,16,FLEN)
NAN_BOXED(45803,16,FLEN)
NAN_BOXED(13035,16,FLEN)
NAN_BOXED(45803,16,FLEN)
NAN_BOXED(13035,16,FLEN)
NAN_BOXED(45803,16,FLEN)
NAN_BOXED(14383,16,FLEN)
NAN_BOXED(47151,16,FLEN)
NAN_BOXED(14383,16,FLEN)
NAN_BOXED(47151,16,FLEN)
NAN_BOXED(14383,16,FLEN)
NAN_BOXED(47151,16,FLEN)
NAN_BOXED(14383,16,FLEN)
NAN_BOXED(47151,16,FLEN)
NAN_BOXED(14383,16,FLEN)
NAN_BOXED(47151,16,FLEN)
NAN_BOXED(11745,16,FLEN)
NAN_BOXED(44513,16,FLEN)
NAN_BOXED(11745,16,FLEN)
NAN_BOXED(44513,16,FLEN)
NAN_BOXED(11745,16,FLEN)
NAN_BOXED(44513,16,FLEN)
NAN_BOXED(11745,16,FLEN)
NAN_BOXED(44513,16,FLEN)
NAN_BOXED(11745,16,FLEN)
NAN_BOXED(44513,16,FLEN)
NAN_BOXED(14782,16,FLEN)
NAN_BOXED(47550,16,FLEN)
NAN_BOXED(14782,16,FLEN)
NAN_BOXED(47550,16,FLEN)
NAN_BOXED(14782,16,FLEN)
NAN_BOXED(47550,16,FLEN)
NAN_BOXED(14782,16,FLEN)
NAN_BOXED(47550,16,FLEN)
NAN_BOXED(14782,16,FLEN)
NAN_BOXED(47550,16,FLEN)
NAN_BOXED(13851,16,FLEN)
NAN_BOXED(46619,16,FLEN)
NAN_BOXED(13851,16,FLEN)
NAN_BOXED(46619,16,FLEN)
NAN_BOXED(13851,16,FLEN)
NAN_BOXED(46619,16,FLEN)
NAN_BOXED(13851,16,FLEN)
NAN_BOXED(46619,16,FLEN)
NAN_BOXED(13851,16,FLEN)
NAN_BOXED(46619,16,FLEN)
NAN_BOXED(11718,16,FLEN)
NAN_BOXED(44486,16,FLEN)
NAN_BOXED(11718,16,FLEN)
NAN_BOXED(44486,16,FLEN)
NAN_BOXED(11718,16,FLEN)
NAN_BOXED(44486,16,FLEN)
NAN_BOXED(11718,16,FLEN)
NAN_BOXED(44486,16,FLEN)
NAN_BOXED(11718,16,FLEN)
NAN_BOXED(44486,16,FLEN)
NAN_BOXED(12818,16,FLEN)
NAN_BOXED(45586,16,FLEN)
NAN_BOXED(12818,16,FLEN)
NAN_BOXED(45586,16,FLEN)
NAN_BOXED(12818,16,FLEN)
NAN_BOXED(45586,16,FLEN)
NAN_BOXED(12818,16,FLEN)
NAN_BOXED(45586,16,FLEN)
NAN_BOXED(12818,16,FLEN)
NAN_BOXED(45586,16,FLEN)
NAN_BOXED(14724,16,FLEN)
NAN_BOXED(47492,16,FLEN)
NAN_BOXED(14724,16,FLEN)
NAN_BOXED(47492,16,FLEN)
NAN_BOXED(14724,16,FLEN)
NAN_BOXED(47492,16,FLEN)
NAN_BOXED(14724,16,FLEN)
NAN_BOXED(47492,16,FLEN)
NAN_BOXED(14724,16,FLEN)
NAN_BOXED(47492,16,FLEN)
NAN_BOXED(11897,16,FLEN)
NAN_BOXED(44665,16,FLEN)
NAN_BOXED(11897,16,FLEN)
NAN_BOXED(44665,16,FLEN)
NAN_BOXED(11897,16,FLEN)
NAN_BOXED(44665,16,FLEN)
NAN_BOXED(11897,16,FLEN)
NAN_BOXED(44665,16,FLEN)
NAN_BOXED(11897,16,FLEN)
NAN_BOXED(44665,16,FLEN)
NAN_BOXED(14393,16,FLEN)
NAN_BOXED(47161,16,FLEN)
NAN_BOXED(14393,16,FLEN)
NAN_BOXED(47161,16,FLEN)
NAN_BOXED(14393,16,FLEN)
NAN_BOXED(47161,16,FLEN)
NAN_BOXED(14393,16,FLEN)
NAN_BOXED(47161,16,FLEN)
NAN_BOXED(14393,16,FLEN)
NAN_BOXED(47161,16,FLEN)
NAN_BOXED(14470,16,FLEN)
NAN_BOXED(47238,16,FLEN)
NAN_BOXED(14470,16,FLEN)
NAN_BOXED(47238,16,FLEN)
NAN_BOXED(14470,16,FLEN)
NAN_BOXED(47238,16,FLEN)
NAN_BOXED(14470,16,FLEN)
NAN_BOXED(47238,16,FLEN)
NAN_BOXED(14470,16,FLEN)
NAN_BOXED(47238,16,FLEN)
NAN_BOXED(11665,16,FLEN)
NAN_BOXED(44433,16,FLEN)
NAN_BOXED(11665,16,FLEN)
NAN_BOXED(44433,16,FLEN)
NAN_BOXED(11665,16,FLEN)
NAN_BOXED(44433,16,FLEN)
NAN_BOXED(11665,16,FLEN)
NAN_BOXED(44433,16,FLEN)
NAN_BOXED(11665,16,FLEN)
NAN_BOXED(44433,16,FLEN)
NAN_BOXED(14826,16,FLEN)
NAN_BOXED(47594,16,FLEN)
NAN_BOXED(14826,16,FLEN)
NAN_BOXED(47594,16,FLEN)
NAN_BOXED(14826,16,FLEN)
NAN_BOXED(47594,16,FLEN)
NAN_BOXED(14826,16,FLEN)
NAN_BOXED(47594,16,FLEN)
NAN_BOXED(14826,16,FLEN)
NAN_BOXED(47594,16,FLEN)
NAN_BOXED(14136,16,FLEN)
NAN_BOXED(46904,16,FLEN)
NAN_BOXED(14136,16,FLEN)
NAN_BOXED(46904,16,FLEN)
NAN_BOXED(14136,16,FLEN)
NAN_BOXED(46904,16,FLEN)
NAN_BOXED(14136,16,FLEN)
NAN_BOXED(46904,16,FLEN)
NAN_BOXED(14136,16,FLEN)
NAN_BOXED(46904,16,FLEN)
NAN_BOXED(13436,16,FLEN)
NAN_BOXED(46204,16,FLEN)
NAN_BOXED(13436,16,FLEN)
NAN_BOXED(46204,16,FLEN)
NAN_BOXED(13436,16,FLEN)
NAN_BOXED(46204,16,FLEN)
NAN_BOXED(13436,16,FLEN)
NAN_BOXED(46204,16,FLEN)
NAN_BOXED(13436,16,FLEN)
NAN_BOXED(46204,16,FLEN)
NAN_BOXED(12698,16,FLEN)
NAN_BOXED(45466,16,FLEN)
NAN_BOXED(12698,16,FLEN)
NAN_BOXED(45466,16,FLEN)
NAN_BOXED(12698,16,FLEN)
NAN_BOXED(45466,16,FLEN)
NAN_BOXED(12698,16,FLEN)
NAN_BOXED(45466,16,FLEN)
NAN_BOXED(12698,16,FLEN)
NAN_BOXED(45466,16,FLEN)
NAN_BOXED(15357,16,FLEN)
NAN_BOXED(48125,16,FLEN)
NAN_BOXED(15357,16,FLEN)
NAN_BOXED(48125,16,FLEN)
NAN_BOXED(15357,16,FLEN)
NAN_BOXED(48125,16,FLEN)
NAN_BOXED(15357,16,FLEN)
NAN_BOXED(48125,16,FLEN)
NAN_BOXED(15357,16,FLEN)
NAN_BOXED(48125,16,FLEN)
NAN_BOXED(12348,16,FLEN)
NAN_BOXED(45116,16,FLEN)
NAN_BOXED(12348,16,FLEN)
NAN_BOXED(45116,16,FLEN)
NAN_BOXED(12348,16,FLEN)
NAN_BOXED(45116,16,FLEN)
NAN_BOXED(12348,16,FLEN)
NAN_BOXED(45116,16,FLEN)
NAN_BOXED(12348,16,FLEN)
NAN_BOXED(45116,16,FLEN)
NAN_BOXED(14693,16,FLEN)
NAN_BOXED(47461,16,FLEN)
NAN_BOXED(14693,16,FLEN)
NAN_BOXED(47461,16,FLEN)
NAN_BOXED(14693,16,FLEN)
NAN_BOXED(47461,16,FLEN)
NAN_BOXED(14693,16,FLEN)
NAN_BOXED(47461,16,FLEN)
NAN_BOXED(14693,16,FLEN)
NAN_BOXED(47461,16,FLEN)
NAN_BOXED(14968,16,FLEN)
NAN_BOXED(47736,16,FLEN)
NAN_BOXED(14968,16,FLEN)
NAN_BOXED(47736,16,FLEN)
NAN_BOXED(14968,16,FLEN)
NAN_BOXED(47736,16,FLEN)
NAN_BOXED(14968,16,FLEN)
NAN_BOXED(47736,16,FLEN)
NAN_BOXED(14968,16,FLEN)
NAN_BOXED(47736,16,FLEN)
NAN_BOXED(14871,16,FLEN)
NAN_BOXED(47639,16,FLEN)
NAN_BOXED(14871,16,FLEN)
NAN_BOXED(47639,16,FLEN)
NAN_BOXED(14871,16,FLEN)
NAN_BOXED(47639,16,FLEN)
NAN_BOXED(14871,16,FLEN)
NAN_BOXED(47639,16,FLEN)
NAN_BOXED(14871,16,FLEN)
NAN_BOXED(47639,16,FLEN)
NAN_BOXED(12876,16,FLEN)
NAN_BOXED(45644,16,FLEN)
NAN_BOXED(12876,16,FLEN)
NAN_BOXED(45644,16,FLEN)
NAN_BOXED(12876,16,FLEN)
NAN_BOXED(45644,16,FLEN)
NAN_BOXED(12876,16,FLEN)
NAN_BOXED(45644,16,FLEN)
NAN_BOXED(12876,16,FLEN)
NAN_BOXED(45644,16,FLEN)
NAN_BOXED(15195,16,FLEN)
NAN_BOXED(47963,16,FLEN)
NAN_BOXED(15195,16,FLEN)
NAN_BOXED(47963,16,FLEN)
NAN_BOXED(15195,16,FLEN)
NAN_BOXED(47963,16,FLEN)
NAN_BOXED(15195,16,FLEN)
NAN_BOXED(47963,16,FLEN)
NAN_BOXED(15195,16,FLEN)
NAN_BOXED(47963,16,FLEN)
NAN_BOXED(14303,16,FLEN)
NAN_BOXED(47071,16,FLEN)
NAN_BOXED(14303,16,FLEN)
NAN_BOXED(47071,16,FLEN)
NAN_BOXED(14303,16,FLEN)
NAN_BOXED(47071,16,FLEN)
NAN_BOXED(14303,16,FLEN)
NAN_BOXED(47071,16,FLEN)
NAN_BOXED(14303,16,FLEN)
NAN_BOXED(47071,16,FLEN)
NAN_BOXED(15136,16,FLEN)
NAN_BOXED(47904,16,FLEN)
NAN_BOXED(15136,16,FLEN)
NAN_BOXED(47904,16,FLEN)
NAN_BOXED(15136,16,FLEN)
NAN_BOXED(47904,16,FLEN)
NAN_BOXED(15136,16,FLEN)
NAN_BOXED(47904,16,FLEN)
NAN_BOXED(15136,16,FLEN)
NAN_BOXED(47904,16,FLEN)
NAN_BOXED(13489,16,FLEN)
NAN_BOXED(46257,16,FLEN)
NAN_BOXED(13489,16,FLEN)
NAN_BOXED(46257,16,FLEN)
NAN_BOXED(13489,16,FLEN)
NAN_BOXED(46257,16,FLEN)
NAN_BOXED(13489,16,FLEN)
NAN_BOXED(46257,16,FLEN)
NAN_BOXED(13489,16,FLEN)
NAN_BOXED(46257,16,FLEN)
NAN_BOXED(12783,16,FLEN)
NAN_BOXED(45551,16,FLEN)
NAN_BOXED(12783,16,FLEN)
NAN_BOXED(45551,16,FLEN)
NAN_BOXED(12783,16,FLEN)
NAN_BOXED(45551,16,FLEN)
NAN_BOXED(12783,16,FLEN)
NAN_BOXED(45551,16,FLEN)
NAN_BOXED(12783,16,FLEN)
NAN_BOXED(45551,16,FLEN)
NAN_BOXED(10400,16,FLEN)
NAN_BOXED(43168,16,FLEN)
NAN_BOXED(10400,16,FLEN)
NAN_BOXED(43168,16,FLEN)
NAN_BOXED(10400,16,FLEN)
NAN_BOXED(43168,16,FLEN)
NAN_BOXED(10400,16,FLEN)
NAN_BOXED(43168,16,FLEN)
NAN_BOXED(10400,16,FLEN)
NAN_BOXED(43168,16,FLEN)
NAN_BOXED(13977,16,FLEN)
NAN_BOXED(46745,16,FLEN)
NAN_BOXED(13977,16,FLEN)
NAN_BOXED(46745,16,FLEN)
NAN_BOXED(13977,16,FLEN)
NAN_BOXED(46745,16,FLEN)
NAN_BOXED(13977,16,FLEN)
NAN_BOXED(46745,16,FLEN)
NAN_BOXED(13977,16,FLEN)
NAN_BOXED(46745,16,FLEN)
NAN_BOXED(13941,16,FLEN)
NAN_BOXED(46709,16,FLEN)
NAN_BOXED(13941,16,FLEN)
NAN_BOXED(46709,16,FLEN)
NAN_BOXED(13941,16,FLEN)
NAN_BOXED(46709,16,FLEN)
NAN_BOXED(13941,16,FLEN)
NAN_BOXED(46709,16,FLEN)
NAN_BOXED(13941,16,FLEN)
NAN_BOXED(46709,16,FLEN)
NAN_BOXED(14026,16,FLEN)
NAN_BOXED(46794,16,FLEN)
NAN_BOXED(14026,16,FLEN)
NAN_BOXED(46794,16,FLEN)
NAN_BOXED(14026,16,FLEN)
NAN_BOXED(46794,16,FLEN)
NAN_BOXED(14026,16,FLEN)
NAN_BOXED(46794,16,FLEN)
NAN_BOXED(14026,16,FLEN)
NAN_BOXED(46794,16,FLEN)
NAN_BOXED(14972,16,FLEN)
NAN_BOXED(47740,16,FLEN)
NAN_BOXED(14972,16,FLEN)
NAN_BOXED(47740,16,FLEN)
NAN_BOXED(14972,16,FLEN)
NAN_BOXED(47740,16,FLEN)
NAN_BOXED(14972,16,FLEN)
NAN_BOXED(47740,16,FLEN)
NAN_BOXED(14972,16,FLEN)
NAN_BOXED(47740,16,FLEN)
NAN_BOXED(13874,16,FLEN)
NAN_BOXED(46642,16,FLEN)
NAN_BOXED(13874,16,FLEN)
NAN_BOXED(46642,16,FLEN)
NAN_BOXED(13874,16,FLEN)
NAN_BOXED(46642,16,FLEN)
NAN_BOXED(13874,16,FLEN)
NAN_BOXED(46642,16,FLEN)
NAN_BOXED(13874,16,FLEN)
NAN_BOXED(46642,16,FLEN)
NAN_BOXED(14384,16,FLEN)
NAN_BOXED(47152,16,FLEN)
NAN_BOXED(14384,16,FLEN)
NAN_BOXED(47152,16,FLEN)
NAN_BOXED(14384,16,FLEN)
NAN_BOXED(47152,16,FLEN)
NAN_BOXED(14384,16,FLEN)
NAN_BOXED(47152,16,FLEN)
NAN_BOXED(14384,16,FLEN)
NAN_BOXED(47152,16,FLEN)
NAN_BOXED(13249,16,FLEN)
NAN_BOXED(46017,16,FLEN)
NAN_BOXED(13249,16,FLEN)
NAN_BOXED(46017,16,FLEN)
NAN_BOXED(13249,16,FLEN)
NAN_BOXED(46017,16,FLEN)
NAN_BOXED(13249,16,FLEN)
NAN_BOXED(46017,16,FLEN)
NAN_BOXED(13249,16,FLEN)
NAN_BOXED(46017,16,FLEN)
NAN_BOXED(11495,16,FLEN)
NAN_BOXED(44263,16,FLEN)
NAN_BOXED(11495,16,FLEN)
NAN_BOXED(44263,16,FLEN)
NAN_BOXED(11495,16,FLEN)
NAN_BOXED(44263,16,FLEN)
NAN_BOXED(11495,16,FLEN)
NAN_BOXED(44263,16,FLEN)
NAN_BOXED(11495,16,FLEN)
NAN_BOXED(44263,16,FLEN)
NAN_BOXED(11908,16,FLEN)
NAN_BOXED(44676,16,FLEN)
NAN_BOXED(11908,16,FLEN)
NAN_BOXED(44676,16,FLEN)
NAN_BOXED(11908,16,FLEN)
NAN_BOXED(44676,16,FLEN)
NAN_BOXED(11908,16,FLEN)
NAN_BOXED(44676,16,FLEN)
NAN_BOXED(11908,16,FLEN)
NAN_BOXED(44676,16,FLEN)
NAN_BOXED(14169,16,FLEN)
NAN_BOXED(46937,16,FLEN)
NAN_BOXED(14169,16,FLEN)
NAN_BOXED(46937,16,FLEN)
NAN_BOXED(14169,16,FLEN)
NAN_BOXED(46937,16,FLEN)
NAN_BOXED(14169,16,FLEN)
NAN_BOXED(46937,16,FLEN)
NAN_BOXED(14169,16,FLEN)
NAN_BOXED(46937,16,FLEN)
NAN_BOXED(13495,16,FLEN)
NAN_BOXED(46263,16,FLEN)
NAN_BOXED(13495,16,FLEN)
NAN_BOXED(46263,16,FLEN)
NAN_BOXED(13495,16,FLEN)
NAN_BOXED(46263,16,FLEN)
NAN_BOXED(13495,16,FLEN)
NAN_BOXED(46263,16,FLEN)
NAN_BOXED(13495,16,FLEN)
NAN_BOXED(46263,16,FLEN)
NAN_BOXED(12807,16,FLEN)
NAN_BOXED(45575,16,FLEN)
NAN_BOXED(12807,16,FLEN)
NAN_BOXED(45575,16,FLEN)
NAN_BOXED(12807,16,FLEN)
NAN_BOXED(45575,16,FLEN)
NAN_BOXED(12807,16,FLEN)
NAN_BOXED(45575,16,FLEN)
NAN_BOXED(12807,16,FLEN)
NAN_BOXED(45575,16,FLEN)
NAN_BOXED(11960,16,FLEN)
NAN_BOXED(44727,16,FLEN)
NAN_BOXED(11960,16,FLEN)
NAN_BOXED(44727,16,FLEN)
NAN_BOXED(11960,16,FLEN)
NAN_BOXED(44727,16,FLEN)
NAN_BOXED(11960,16,FLEN)
NAN_BOXED(44727,16,FLEN)
NAN_BOXED(11960,16,FLEN)
NAN_BOXED(44727,16,FLEN)
NAN_BOXED(10864,16,FLEN)
NAN_BOXED(43630,16,FLEN)
NAN_BOXED(10864,16,FLEN)
NAN_BOXED(43630,16,FLEN)
NAN_BOXED(10864,16,FLEN)
NAN_BOXED(43630,16,FLEN)
NAN_BOXED(10864,16,FLEN)
NAN_BOXED(43630,16,FLEN)
NAN_BOXED(10864,16,FLEN)
NAN_BOXED(43630,16,FLEN)
NAN_BOXED(14437,16,FLEN)
NAN_BOXED(47205,16,FLEN)
NAN_BOXED(14437,16,FLEN)
NAN_BOXED(47205,16,FLEN)
NAN_BOXED(14437,16,FLEN)
NAN_BOXED(47205,16,FLEN)
NAN_BOXED(14437,16,FLEN)
NAN_BOXED(47205,16,FLEN)
NAN_BOXED(14437,16,FLEN)
NAN_BOXED(47205,16,FLEN)
NAN_BOXED(7113,16,FLEN)
NAN_BOXED(39849,16,FLEN)
NAN_BOXED(7113,16,FLEN)
NAN_BOXED(39849,16,FLEN)
NAN_BOXED(7113,16,FLEN)
NAN_BOXED(39849,16,FLEN)
NAN_BOXED(7113,16,FLEN)
NAN_BOXED(39849,16,FLEN)
NAN_BOXED(7113,16,FLEN)
NAN_BOXED(39849,16,FLEN)
NAN_BOXED(12957,16,FLEN)
NAN_BOXED(45724,16,FLEN)
NAN_BOXED(12957,16,FLEN)
NAN_BOXED(45724,16,FLEN)
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NAN_BOXED(47389,16,FLEN)
NAN_BOXED(14685,16,FLEN)
NAN_BOXED(47389,16,FLEN)
NAN_BOXED(14865,16,FLEN)
NAN_BOXED(47569,16,FLEN)
NAN_BOXED(14865,16,FLEN)
NAN_BOXED(47569,16,FLEN)
NAN_BOXED(14865,16,FLEN)
NAN_BOXED(47569,16,FLEN)
NAN_BOXED(14865,16,FLEN)
NAN_BOXED(47569,16,FLEN)
NAN_BOXED(14865,16,FLEN)
NAN_BOXED(47569,16,FLEN)
NAN_BOXED(15035,16,FLEN)
NAN_BOXED(47739,16,FLEN)
NAN_BOXED(15035,16,FLEN)
NAN_BOXED(47739,16,FLEN)
NAN_BOXED(15035,16,FLEN)
NAN_BOXED(47739,16,FLEN)
NAN_BOXED(15035,16,FLEN)
NAN_BOXED(47739,16,FLEN)
NAN_BOXED(15035,16,FLEN)
NAN_BOXED(47739,16,FLEN)
NAN_BOXED(14785,16,FLEN)
NAN_BOXED(47489,16,FLEN)
NAN_BOXED(14785,16,FLEN)
NAN_BOXED(47489,16,FLEN)
NAN_BOXED(14785,16,FLEN)
NAN_BOXED(47489,16,FLEN)
NAN_BOXED(14785,16,FLEN)
NAN_BOXED(47489,16,FLEN)
NAN_BOXED(14785,16,FLEN)
NAN_BOXED(47489,16,FLEN)
NAN_BOXED(14106,16,FLEN)
NAN_BOXED(46746,16,FLEN)
NAN_BOXED(14106,16,FLEN)
NAN_BOXED(46746,16,FLEN)
NAN_BOXED(14106,16,FLEN)
NAN_BOXED(46746,16,FLEN)
NAN_BOXED(14106,16,FLEN)
NAN_BOXED(46746,16,FLEN)
NAN_BOXED(14106,16,FLEN)
NAN_BOXED(46746,16,FLEN)
NAN_BOXED(14275,16,FLEN)
NAN_BOXED(46915,16,FLEN)
NAN_BOXED(14275,16,FLEN)
NAN_BOXED(46915,16,FLEN)
NAN_BOXED(14275,16,FLEN)
NAN_BOXED(46915,16,FLEN)
NAN_BOXED(14275,16,FLEN)
NAN_BOXED(46915,16,FLEN)
NAN_BOXED(14275,16,FLEN)
NAN_BOXED(46915,16,FLEN)
NAN_BOXED(13865,16,FLEN)
NAN_BOXED(46505,16,FLEN)
NAN_BOXED(13865,16,FLEN)
NAN_BOXED(46505,16,FLEN)
NAN_BOXED(13865,16,FLEN)
NAN_BOXED(46505,16,FLEN)
NAN_BOXED(13865,16,FLEN)
NAN_BOXED(46505,16,FLEN)
NAN_BOXED(13865,16,FLEN)
NAN_BOXED(46505,16,FLEN)
NAN_BOXED(13277,16,FLEN)
NAN_BOXED(45789,16,FLEN)
NAN_BOXED(13277,16,FLEN)
NAN_BOXED(45789,16,FLEN)
NAN_BOXED(13277,16,FLEN)
NAN_BOXED(45789,16,FLEN)
NAN_BOXED(13277,16,FLEN)
NAN_BOXED(45789,16,FLEN)
NAN_BOXED(13277,16,FLEN)
NAN_BOXED(45789,16,FLEN)
NAN_BOXED(14780,16,FLEN)
NAN_BOXED(47484,16,FLEN)
NAN_BOXED(14780,16,FLEN)
NAN_BOXED(47484,16,FLEN)
NAN_BOXED(14780,16,FLEN)
NAN_BOXED(47484,16,FLEN)
NAN_BOXED(14780,16,FLEN)
NAN_BOXED(47484,16,FLEN)
NAN_BOXED(14780,16,FLEN)
NAN_BOXED(47484,16,FLEN)
NAN_BOXED(13888,16,FLEN)
NAN_BOXED(46528,16,FLEN)
NAN_BOXED(13888,16,FLEN)
NAN_BOXED(46528,16,FLEN)
NAN_BOXED(13888,16,FLEN)
NAN_BOXED(46528,16,FLEN)
NAN_BOXED(13888,16,FLEN)
NAN_BOXED(46528,16,FLEN)
NAN_BOXED(13888,16,FLEN)
NAN_BOXED(46528,16,FLEN)
NAN_BOXED(13618,16,FLEN)
NAN_BOXED(46258,16,FLEN)
NAN_BOXED(13618,16,FLEN)
NAN_BOXED(46258,16,FLEN)
NAN_BOXED(13618,16,FLEN)
NAN_BOXED(46258,16,FLEN)
NAN_BOXED(13618,16,FLEN)
NAN_BOXED(46258,16,FLEN)
NAN_BOXED(13618,16,FLEN)
NAN_BOXED(46258,16,FLEN)
NAN_BOXED(14038,16,FLEN)
NAN_BOXED(46678,16,FLEN)
NAN_BOXED(14038,16,FLEN)
NAN_BOXED(46678,16,FLEN)
NAN_BOXED(14038,16,FLEN)
NAN_BOXED(46678,16,FLEN)
NAN_BOXED(14038,16,FLEN)
NAN_BOXED(46678,16,FLEN)
NAN_BOXED(14038,16,FLEN)
NAN_BOXED(46678,16,FLEN)
NAN_BOXED(13732,16,FLEN)
NAN_BOXED(46372,16,FLEN)
NAN_BOXED(13732,16,FLEN)
NAN_BOXED(46372,16,FLEN)
NAN_BOXED(13732,16,FLEN)
NAN_BOXED(46372,16,FLEN)
NAN_BOXED(13732,16,FLEN)
NAN_BOXED(46372,16,FLEN)
NAN_BOXED(13732,16,FLEN)
NAN_BOXED(46372,16,FLEN)
NAN_BOXED(14422,16,FLEN)
NAN_BOXED(47126,16,FLEN)
NAN_BOXED(14422,16,FLEN)
NAN_BOXED(47126,16,FLEN)
NAN_BOXED(14422,16,FLEN)
NAN_BOXED(47126,16,FLEN)
NAN_BOXED(14422,16,FLEN)
NAN_BOXED(47126,16,FLEN)
NAN_BOXED(14422,16,FLEN)
NAN_BOXED(47126,16,FLEN)
NAN_BOXED(14414,16,FLEN)
NAN_BOXED(47118,16,FLEN)
NAN_BOXED(14414,16,FLEN)
NAN_BOXED(47118,16,FLEN)
NAN_BOXED(14414,16,FLEN)
NAN_BOXED(47118,16,FLEN)
NAN_BOXED(14414,16,FLEN)
NAN_BOXED(47118,16,FLEN)
NAN_BOXED(14414,16,FLEN)
NAN_BOXED(47118,16,FLEN)
NAN_BOXED(14728,16,FLEN)
NAN_BOXED(47432,16,FLEN)
NAN_BOXED(14728,16,FLEN)
NAN_BOXED(47432,16,FLEN)
NAN_BOXED(14728,16,FLEN)
NAN_BOXED(47432,16,FLEN)
NAN_BOXED(14728,16,FLEN)
NAN_BOXED(47432,16,FLEN)
NAN_BOXED(14728,16,FLEN)
NAN_BOXED(47432,16,FLEN)
NAN_BOXED(15240,16,FLEN)
NAN_BOXED(47944,16,FLEN)
NAN_BOXED(15240,16,FLEN)
NAN_BOXED(47944,16,FLEN)
NAN_BOXED(15240,16,FLEN)
NAN_BOXED(47944,16,FLEN)
NAN_BOXED(15240,16,FLEN)
NAN_BOXED(47944,16,FLEN)
NAN_BOXED(15240,16,FLEN)
NAN_BOXED(47944,16,FLEN)
NAN_BOXED(13427,16,FLEN)
NAN_BOXED(46054,16,FLEN)
NAN_BOXED(13427,16,FLEN)
NAN_BOXED(46054,16,FLEN)
NAN_BOXED(13427,16,FLEN)
NAN_BOXED(46054,16,FLEN)
NAN_BOXED(13427,16,FLEN)
NAN_BOXED(46054,16,FLEN)
NAN_BOXED(13427,16,FLEN)
NAN_BOXED(46054,16,FLEN)
NAN_BOXED(13919,16,FLEN)
NAN_BOXED(46559,16,FLEN)
NAN_BOXED(13919,16,FLEN)
NAN_BOXED(46559,16,FLEN)
NAN_BOXED(13919,16,FLEN)
NAN_BOXED(46559,16,FLEN)
NAN_BOXED(13919,16,FLEN)
NAN_BOXED(46559,16,FLEN)
NAN_BOXED(13919,16,FLEN)
NAN_BOXED(46559,16,FLEN)
NAN_BOXED(14424,16,FLEN)
NAN_BOXED(47128,16,FLEN)
NAN_BOXED(14424,16,FLEN)
NAN_BOXED(47128,16,FLEN)
NAN_BOXED(14424,16,FLEN)
NAN_BOXED(47128,16,FLEN)
NAN_BOXED(14424,16,FLEN)
NAN_BOXED(47128,16,FLEN)
NAN_BOXED(14424,16,FLEN)
NAN_BOXED(47128,16,FLEN)
NAN_BOXED(15339,16,FLEN)
NAN_BOXED(48043,16,FLEN)
NAN_BOXED(15339,16,FLEN)
NAN_BOXED(48043,16,FLEN)
NAN_BOXED(15339,16,FLEN)
NAN_BOXED(48043,16,FLEN)
NAN_BOXED(15339,16,FLEN)
NAN_BOXED(48043,16,FLEN)
NAN_BOXED(15339,16,FLEN)
NAN_BOXED(48043,16,FLEN)
NAN_BOXED(15228,16,FLEN)
NAN_BOXED(47932,16,FLEN)
NAN_BOXED(15228,16,FLEN)
NAN_BOXED(47932,16,FLEN)
NAN_BOXED(15228,16,FLEN)
NAN_BOXED(47932,16,FLEN)
NAN_BOXED(15228,16,FLEN)
NAN_BOXED(47932,16,FLEN)
NAN_BOXED(15228,16,FLEN)
NAN_BOXED(47932,16,FLEN)
NAN_BOXED(13660,16,FLEN)
NAN_BOXED(46300,16,FLEN)
NAN_BOXED(13660,16,FLEN)
NAN_BOXED(46300,16,FLEN)
NAN_BOXED(13660,16,FLEN)
NAN_BOXED(46300,16,FLEN)
NAN_BOXED(13660,16,FLEN)
NAN_BOXED(46300,16,FLEN)
NAN_BOXED(13660,16,FLEN)
NAN_BOXED(46300,16,FLEN)
NAN_BOXED(13729,16,FLEN)
NAN_BOXED(46369,16,FLEN)
NAN_BOXED(13729,16,FLEN)
NAN_BOXED(46369,16,FLEN)
NAN_BOXED(13729,16,FLEN)
NAN_BOXED(46369,16,FLEN)
NAN_BOXED(13729,16,FLEN)
NAN_BOXED(46369,16,FLEN)
NAN_BOXED(13729,16,FLEN)
NAN_BOXED(46369,16,FLEN)
NAN_BOXED(15278,16,FLEN)
NAN_BOXED(47982,16,FLEN)
NAN_BOXED(15278,16,FLEN)
NAN_BOXED(47982,16,FLEN)
NAN_BOXED(15278,16,FLEN)
NAN_BOXED(47982,16,FLEN)
NAN_BOXED(15278,16,FLEN)
NAN_BOXED(47982,16,FLEN)
NAN_BOXED(15278,16,FLEN)
NAN_BOXED(47982,16,FLEN)
NAN_BOXED(10250,16,FLEN)
NAN_BOXED(36095,16,FLEN)
NAN_BOXED(10250,16,FLEN)
NAN_BOXED(36095,16,FLEN)
NAN_BOXED(10250,16,FLEN)
NAN_BOXED(36095,16,FLEN)
NAN_BOXED(10250,16,FLEN)
NAN_BOXED(36095,16,FLEN)
NAN_BOXED(10250,16,FLEN)
NAN_BOXED(36095,16,FLEN)
NAN_BOXED(13607,16,FLEN)
NAN_BOXED(46247,16,FLEN)
NAN_BOXED(13607,16,FLEN)
NAN_BOXED(46247,16,FLEN)
NAN_BOXED(13607,16,FLEN)
NAN_BOXED(46247,16,FLEN)
NAN_BOXED(13607,16,FLEN)
NAN_BOXED(46247,16,FLEN)
NAN_BOXED(13607,16,FLEN)
NAN_BOXED(46247,16,FLEN)
NAN_BOXED(14910,16,FLEN)
NAN_BOXED(47614,16,FLEN)
NAN_BOXED(14910,16,FLEN)
NAN_BOXED(47614,16,FLEN)
NAN_BOXED(14910,16,FLEN)
NAN_BOXED(47614,16,FLEN)
NAN_BOXED(14910,16,FLEN)
NAN_BOXED(47614,16,FLEN)
NAN_BOXED(14910,16,FLEN)
NAN_BOXED(47614,16,FLEN)
NAN_BOXED(12538,16,FLEN)
NAN_BOXED(45306,16,FLEN)
NAN_BOXED(12538,16,FLEN)
NAN_BOXED(45306,16,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;



signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_2:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_3:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_4:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_5:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_6:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_7:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_8:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_9:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_10:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_11:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_12:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_13:
    .fill 222*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine
tsig_begin_canary:
CANARY;

mtrap_sigptr:
    .fill 64*XLEN/32,4,0xdeadbeef

tsig_end_canary:
CANARY;
#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif


sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
