
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.11.0
// timestamp : Mon Feb  5 04:35:29 2024 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /home/riscv/riscv-ctg/sample_cgfs/dataset.cgf \
//                  --cgf /home/riscv/riscv-ctg/sample_cgfs/sample_cgfs_fext/RV64Zfinx/fmadd.s.cgf \
 \
//                  -- xlen 64  \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fmadd.s instruction of the RISC-V RV64_Zfinx,RV64_Zdinx extension for the fmadd_b7 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV64I_Zfinx,RV64I_Zdinx")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*Zfinx.*);def TEST_CASE_1=True;",fmadd_b7)

RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_0:
// rs1 != rs2 and rs1 != rd and rs1 != rs3 and rs2 != rs3 and rs2 != rd and rs3 != rd, rs1==x30, rs2==x29, rs3==x28, rd==x31,fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f31b9 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x186e02 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0e6c50 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef31b9; op2val:0xbf986e02;
op3val:0x7f0e6c50; valaddr_reg:x3; val_offset:0*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x3, 0*FLEN/8, x4, x1, x2)

inst_1:
// rs1 == rs2 == rs3 != rd, rs1==x31, rs2==x31, rs3==x31, rd==x30,fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ad5a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x17b417 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x34f350 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x31; op2:x31; op3:x31; dest:x30; op1val:0x7f18ad5a; op2val:0x7f18ad5a;
op3val:0x7f18ad5a; valaddr_reg:x3; val_offset:3*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x30, x31, x31, x31, dyn, 96, 0, x3, 3*FLEN/8, x4, x1, x2)

inst_2:
// rs3 == rd != rs1 and rs3 == rd != rs2 and rs2 != rs1, rs1==x28, rs2==x30, rs3==x29, rd==x29,fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e0f7e and fs2 == 1 and fe2 == 0x7f and fm2 == 0x1f8f25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x31161d and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x28; op2:x30; op3:x29; dest:x29; op1val:0x7f0e0f7e; op2val:0xbf9f8f25;
op3val:0x7f31161d; valaddr_reg:x3; val_offset:6*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x29, x28, x30, x29, dyn, 96, 0, x3, 6*FLEN/8, x4, x1, x2)

inst_3:
// rs1 == rd == rs3 != rs2, rs1==x27, rs2==x28, rs3==x27, rd==x27,fs1 == 0 and fe1 == 0xf9 and fm1 == 0x323547 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x006caa and fs3 == 0 and fe3 == 0xfd and fm3 == 0x32cc91 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x27; op2:x28; op3:x27; dest:x27; op1val:0x7cb23547; op2val:0xc1806caa;
op3val:0x7cb23547; valaddr_reg:x3; val_offset:9*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x27, x27, x28, x27, dyn, 96, 0, x3, 9*FLEN/8, x4, x1, x2)

inst_4:
// rs1 == rd != rs2 and rs1 == rd != rs3 and rs3 != rs2, rs1==x26, rs2==x27, rs3==x30, rd==x26,fs1 == 0 and fe1 == 0xfe and fm1 == 0x351fde and fs2 == 1 and fe2 == 0x7e and fm2 == 0x301cf4 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7934ca and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x26; op2:x27; op3:x30; dest:x26; op1val:0x7f351fde; op2val:0xbf301cf4;
op3val:0x7ef934ca; valaddr_reg:x3; val_offset:12*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x26, x26, x27, x30, dyn, 96, 0, x3, 12*FLEN/8, x4, x1, x2)

inst_5:
// rs2 == rs3 != rs1 and rs2 == rs3 != rd and rd != rs1, rs1==x29, rs2==x26, rs3==x26, rd==x28,fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf90f and fs2 == 1 and fe2 == 0x7c and fm2 == 0x00acab and fs3 == 0 and fe3 == 0xfb and fm3 == 0x2de265 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x29; op2:x26; op3:x26; dest:x28; op1val:0x7f2cf90f; op2val:0xbe00acab;
op3val:0xbe00acab; valaddr_reg:x3; val_offset:15*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x28, x29, x26, x26, dyn, 96, 0, x3, 15*FLEN/8, x4, x1, x2)

inst_6:
// rd == rs2 == rs3 != rs1, rs1==x24, rs2==x25, rs3==x25, rd==x25,fs1 == 0 and fe1 == 0xfd and fm1 == 0x341f5c and fs2 == 1 and fe2 == 0x7e and fm2 == 0x0691ee and fs3 == 0 and fe3 == 0xfc and fm3 == 0x3d5e30 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x24; op2:x25; op3:x25; dest:x25; op1val:0x7eb41f5c; op2val:0xbf0691ee;
op3val:0xbf0691ee; valaddr_reg:x3; val_offset:18*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x25, x24, x25, x25, dyn, 96, 0, x3, 18*FLEN/8, x4, x1, x2)

inst_7:
// rs2 == rd != rs1 and rs2 == rd != rs3 and rs3 != rs1, rs1==x25, rs2==x24, rs3==x23, rd==x24,fs1 == 0 and fe1 == 0xfd and fm1 == 0x50cddd and fs2 == 1 and fe2 == 0x7f and fm2 == 0x071ab8 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5c64b6 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x25; op2:x24; op3:x23; dest:x24; op1val:0x7ed0cddd; op2val:0xbf871ab8;
op3val:0x7edc64b6; valaddr_reg:x3; val_offset:21*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x24, x25, x24, x23, dyn, 96, 0, x3, 21*FLEN/8, x4, x1, x2)

inst_8:
// rs1 == rs2 == rd != rs3, rs1==x23, rs2==x23, rs3==x24, rd==x23,fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2125ab and fs2 == 1 and fe2 == 0x83 and fm2 == 0x0435fb and fs3 == 0 and fe3 == 0xfc and fm3 == 0x2672cf and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x23; op2:x23; op3:x24; dest:x23; op1val:0x7c2125ab; op2val:0x7c2125ab;
op3val:0x7e2672cf; valaddr_reg:x3; val_offset:24*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x23, x23, x23, x24, dyn, 96, 0, x3, 24*FLEN/8, x4, x1, x2)

inst_9:
// rs1 == rs3 != rs2 and rs1 == rs3 != rd and rd != rs2, rs1==x21, rs2==x20, rs3==x21, rd==x22,fs1 == 0 and fe1 == 0xfc and fm1 == 0x56a477 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x51d69a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2ff034 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x21; op2:x20; op3:x21; dest:x22; op1val:0x7e56a477; op2val:0xc051d69a;
op3val:0x7e56a477; valaddr_reg:x3; val_offset:27*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x22, x21, x20, x21, dyn, 96, 0, x3, 27*FLEN/8, x4, x1, x2)

inst_10:
// rs1 == rs2 == rs3 == rd, rs1==x19, rs2==x19, rs3==x19, rd==x19,fs1 == 0 and fe1 == 0xfe and fm1 == 0x1304ef and fs2 == 1 and fe2 == 0x7c and fm2 == 0x557010 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7526ed and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x19; op2:x19; op3:x19; dest:x19; op1val:0x7f1304ef; op2val:0x7f1304ef;
op3val:0x7f1304ef; valaddr_reg:x3; val_offset:30*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x19, x19, x19, x19, dyn, 96, 0, x3, 30*FLEN/8, x4, x1, x2)

inst_11:
// rs1 == rs2 != rs3 and rs1 == rs2 != rd and rd != rs3, rs1==x22, rs2==x22, rs3==x20, rd==x21,fs1 == 0 and fe1 == 0xfe and fm1 == 0x190d5e and fs2 == 1 and fe2 == 0x7c and fm2 == 0x32420c and fs3 == 0 and fe3 == 0xfb and fm3 == 0x552591 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x22; op2:x22; op3:x20; dest:x21; op1val:0x7f190d5e; op2val:0x7f190d5e;
op3val:0x7dd52591; valaddr_reg:x3; val_offset:33*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x21, x22, x22, x20, dyn, 96, 0, x3, 33*FLEN/8, x4, x1, x2)

inst_12:
// rs1==x18, rs2==x21, rs3==x22, rd==x20,fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d1a0c and fs2 == 1 and fe2 == 0x7c and fm2 == 0x521f16 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x429c29 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x18; op2:x21; op3:x22; dest:x20; op1val:0x7eed1a0c; op2val:0xbe521f16;
op3val:0x7dc29c29; valaddr_reg:x3; val_offset:36*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x20, x18, x21, x22, dyn, 96, 0, x3, 36*FLEN/8, x4, x1, x2)

inst_13:
// rs1==x20, rs2==x17, rs3==x16, rd==x18,fs1 == 0 and fe1 == 0xf5 and fm1 == 0x2e79de and fs2 == 1 and fe2 == 0x87 and fm2 == 0x757c34 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x274f48 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x20; op2:x17; op3:x16; dest:x18; op1val:0x7aae79de; op2val:0xc3f57c34;
op3val:0x7f274f48; valaddr_reg:x3; val_offset:39*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x18, x20, x17, x16, dyn, 96, 0, x3, 39*FLEN/8, x4, x1, x2)

inst_14:
// rs1==x16, rs2==x18, rs3==x15, rd==x17,fs1 == 0 and fe1 == 0xfc and fm1 == 0x20dccc and fs2 == 1 and fe2 == 0x7f and fm2 == 0x03ae89 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x257d51 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x16; op2:x18; op3:x15; dest:x17; op1val:0x7e20dccc; op2val:0xbf83ae89;
op3val:0x7e257d51; valaddr_reg:x3; val_offset:42*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x17, x16, x18, x15, dyn, 96, 0, x3, 42*FLEN/8, x4, x1, x2)

inst_15:
// rs1==x17, rs2==x15, rs3==x18, rd==x16,fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c9ff5 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x635528 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x278095 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x17; op2:x15; op3:x18; dest:x16; op1val:0x7f3c9ff5; op2val:0xbf635528;
op3val:0x7f278095; valaddr_reg:x3; val_offset:45*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x16, x17, x15, x18, dyn, 96, 0, x3, 45*FLEN/8, x4, x1, x2)

inst_16:
// rs1==x14, rs2==x16, rs3==x17, rd==x15,fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e2fb5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x54b2a7 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x389a90 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x14; op2:x16; op3:x17; dest:x15; op1val:0x7e5e2fb5; op2val:0xc054b2a7;
op3val:0x7f389a90; valaddr_reg:x3; val_offset:48*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x15, x14, x16, x17, dyn, 96, 0, x3, 48*FLEN/8, x4, x1, x2)

inst_17:
// rs1==x15, rs2==x13, rs3==x12, rd==x14,fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f0fd2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x20e6fd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0224b8 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x15; op2:x13; op3:x12; dest:x14; op1val:0x7ecf0fd2; op2val:0xbfa0e6fd;
op3val:0x7f0224b8; valaddr_reg:x3; val_offset:51*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x14, x15, x13, x12, dyn, 96, 0, x3, 51*FLEN/8, x4, x1, x2)

inst_18:
// rs1==x12, rs2==x14, rs3==x11, rd==x13,fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d454a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x130ace and fs3 == 0 and fe3 == 0xfe and fm3 == 0x34aad9 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x12; op2:x14; op3:x11; dest:x13; op1val:0x7e1d454a; op2val:0xc0930ace;
op3val:0x7f34aad9; valaddr_reg:x3; val_offset:54*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x13, x12, x14, x11, dyn, 96, 0, x3, 54*FLEN/8, x4, x1, x2)

inst_19:
// rs1==x13, rs2==x11, rs3==x14, rd==x12,fs1 == 0 and fe1 == 0xfe and fm1 == 0x049a6e and fs2 == 1 and fe2 == 0x7f and fm2 == 0x332355 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x399491 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x13; op2:x11; op3:x14; dest:x12; op1val:0x7f049a6e; op2val:0xbfb32355;
op3val:0x7f399491; valaddr_reg:x3; val_offset:57*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x12, x13, x11, x14, dyn, 96, 0, x3, 57*FLEN/8, x4, x1, x2)

inst_20:
// rs1==x10, rs2==x12, rs3==x13, rd==x11,fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b9930 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x2b2afd and fs3 == 0 and fe3 == 0xfc and fm3 == 0x657849 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x10; op2:x12; op3:x13; dest:x11; op1val:0x7f2b9930; op2val:0xbeab2afd;
op3val:0x7e657849; valaddr_reg:x3; val_offset:60*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x11, x10, x12, x13, dyn, 96, 0, x3, 60*FLEN/8, x4, x1, x2)
RVTEST_VALBASEUPD(x12,test_dataset_1)

inst_21:
// rs1==x11, rs2==x9, rs3==x8, rd==x10,fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ab269 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x6b3fb1 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7ee893 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x11; op2:x9; op3:x8; dest:x10; op1val:0x7e8ab269; op2val:0xbeeb3fb1;
op3val:0x7dfee893; valaddr_reg:x12; val_offset:0*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x10, x11, x9, x8, dyn, 96, 0, x12, 0*FLEN/8, x13, x1, x2)

inst_22:
// rs1==x8, rs2==x10, rs3==x7, rd==x9,fs1 == 0 and fe1 == 0xfb and fm1 == 0x5fcc51 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x64e70b and fs3 == 0 and fe3 == 0xfa and fm3 == 0x481bf3 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x8; op2:x10; op3:x7; dest:x9; op1val:0x7ddfcc51; op2val:0xbee4e70b;
op3val:0x7d481bf3; valaddr_reg:x12; val_offset:3*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x9, x8, x10, x7, dyn, 96, 0, x12, 3*FLEN/8, x13, x1, x2)

inst_23:
// rs1==x9, rs2==x7, rs3==x10, rd==x8,fs1 == 0 and fe1 == 0xfc and fm1 == 0x67719b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x00154c and fs3 == 0 and fe3 == 0xfd and fm3 == 0x67981f and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x9; op2:x7; op3:x10; dest:x8; op1val:0x7e67719b; op2val:0xc000154c;
op3val:0x7ee7981f; valaddr_reg:x12; val_offset:6*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x8, x9, x7, x10, dyn, 96, 0, x12, 6*FLEN/8, x13, x1, x10)
RVTEST_SIGBASE(x9,signature_x9_0)

inst_24:
// rs1==x6, rs2==x8, rs3==x9, rd==x7,fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26497d and fs2 == 1 and fe2 == 0x86 and fm2 == 0x486327 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0229d2 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x6; op2:x8; op3:x9; dest:x7; op1val:0x7b26497d; op2val:0xc3486327;
op3val:0x7f0229d2; valaddr_reg:x12; val_offset:9*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x7, x6, x8, x9, dyn, 96, 0, x12, 9*FLEN/8, x13, x9, x10)

inst_25:
// rs1==x7, rs2==x5, rs3==x4, rd==x6,fs1 == 0 and fe1 == 0xfd and fm1 == 0x01c09c and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6ad52b and fs3 == 0 and fe3 == 0xfc and fm3 == 0x6e0c34 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x7; op2:x5; op3:x4; dest:x6; op1val:0x7e81c09c; op2val:0xbf6ad52b;
op3val:0x7e6e0c34; valaddr_reg:x12; val_offset:12*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x6, x7, x5, x4, dyn, 96, 0, x12, 12*FLEN/8, x13, x9, x10)

inst_26:
// rs1==x4, rs2==x6, rs3==x3, rd==x5,fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d27cc and fs2 == 1 and fe2 == 0x7e and fm2 == 0x165ba8 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x389b2c and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x4; op2:x6; op3:x3; dest:x5; op1val:0x7f1d27cc; op2val:0xbf165ba8;
op3val:0x7eb89b2c; valaddr_reg:x12; val_offset:15*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x5, x4, x6, x3, dyn, 96, 0, x12, 15*FLEN/8, x13, x9, x10)

inst_27:
// rs1==x5, rs2==x3, rs3==x6, rd==x4,fs1 == 0 and fe1 == 0xfc and fm1 == 0x728772 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x430d36 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x38c9b0 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x5; op2:x3; op3:x6; dest:x4; op1val:0x7e728772; op2val:0xbfc30d36;
op3val:0x7eb8c9b0; valaddr_reg:x12; val_offset:18*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x4, x5, x3, x6, dyn, 96, 0, x12, 18*FLEN/8, x13, x9, x10)

inst_28:
// rs1==x2, rs2==x4, rs3==x5, rd==x3,fs1 == 0 and fe1 == 0xfe and fm1 == 0x074be5 and fs2 == 1 and fe2 == 0x7b and fm2 == 0x25a9d6 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x2f1b5a and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x2; op2:x4; op3:x5; dest:x3; op1val:0x7f074be5; op2val:0xbda5a9d6;
op3val:0x7d2f1b5a; valaddr_reg:x12; val_offset:21*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x3, x2, x4, x5, dyn, 96, 0, x12, 21*FLEN/8, x13, x9, x10)

inst_29:
// rs1==x3, rs2==x1, rs3==x0, rd==x2,fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b3817 and fs2 == 1 and fe2 == 0x79 and fm2 == 0x401917 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x0c7c6b and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x3; op2:x1; op3:x0; dest:x2; op1val:0x7f3b3817; op2val:0xbcc01917;
op3val:0x0; valaddr_reg:x12; val_offset:24*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x2, x3, x1, x0, dyn, 96, 0, x12, 24*FLEN/8, x13, x9, x10)

inst_30:
// rs1==x1,fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff5ec and fs2 == 1 and fe2 == 0x7f and fm2 == 0x103b80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x223795 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x1; op2:x30; op3:x29; dest:x31; op1val:0x7f0ff5ec; op2val:0xbf903b80;
op3val:0x7f223795; valaddr_reg:x12; val_offset:27*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x1, x30, x29, dyn, 96, 0, x12, 27*FLEN/8, x13, x9, x10)

inst_31:
// rs1==x0,fs1 == 0 and fe1 == 0xf8 and fm1 == 0x5e038c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x2e660b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x173ee9 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x0; op2:x30; op3:x29; dest:x31; op1val:0x0; op2val:0xc22e660b;
op3val:0x7f173ee9; valaddr_reg:x12; val_offset:30*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x0, x30, x29, dyn, 96, 0, x12, 30*FLEN/8, x13, x9, x10)

inst_32:
// rs2==x2,fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c9d65 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x4a38ba and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5e26b6 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x2; op3:x29; dest:x31; op1val:0x7e8c9d65; op2val:0xbfca38ba;
op3val:0x7ede26b6; valaddr_reg:x12; val_offset:33*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x2, x29, dyn, 96, 0, x12, 33*FLEN/8, x13, x9, x10)

inst_33:
// rs2==x0,fs1 == 0 and fe1 == 0xf7 and fm1 == 0x5f1c44 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x24b4d2 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x0f8bb3 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x0; op3:x29; dest:x31; op1val:0x7bdf1c44; op2val:0x0;
op3val:0x7d0f8bb3; valaddr_reg:x12; val_offset:36*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x0, x29, dyn, 96, 0, x12, 36*FLEN/8, x13, x9, x10)

inst_34:
// rs3==x2,fs1 == 0 and fe1 == 0xfc and fm1 == 0x0af237 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28f25d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x376500 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x2; dest:x31; op1val:0x7e0af237; op2val:0xc0a8f25d;
op3val:0x7f376500; valaddr_reg:x12; val_offset:39*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x2, dyn, 96, 0, x12, 39*FLEN/8, x13, x9, x10)

inst_35:
// rs3==x1,fs1 == 0 and fe1 == 0xfc and fm1 == 0x16edbb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x761db3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1119f4 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x1; dest:x31; op1val:0x7e16edbb; op2val:0xc0761db3;
op3val:0x7f1119f4; valaddr_reg:x12; val_offset:42*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x1, dyn, 96, 0, x12, 42*FLEN/8, x13, x9, x10)

inst_36:
// rd==x1,fs1 == 0 and fe1 == 0xfe and fm1 == 0x327e6a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x01b4a9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x34df56 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x31; op2:x30; op3:x29; dest:x1; op1val:0x7f327e6a; op2val:0xbf81b4a9;
op3val:0x7f34df56; valaddr_reg:x12; val_offset:45*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x1, x31, x30, x29, dyn, 96, 0, x12, 45*FLEN/8, x13, x9, x10)

inst_37:
// rd==x0,fs1 == 0 and fe1 == 0xfd and fm1 == 0x043e1b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x03dea5 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x083d97 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x31; op2:x30; op3:x29; dest:x0; op1val:0x7e843e1b; op2val:0xbf83dea5;
op3val:0x7e883d97; valaddr_reg:x12; val_offset:48*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x0, x31, x30, x29, dyn, 96, 0, x12, 48*FLEN/8, x13, x9, x10)

inst_38:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x497c49 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3d34f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x14ea70 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec97c49; op2val:0xbfbd34f5;
op3val:0x7f14ea70; valaddr_reg:x12; val_offset:51*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 51*FLEN/8, x13, x9, x10)

inst_39:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25f81d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x5da39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0fb142 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5f81d; op2val:0xc0dda39a;
op3val:0x7f0fb142; valaddr_reg:x12; val_offset:54*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 54*FLEN/8, x13, x9, x10)

inst_40:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191148 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0a0793 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x250fb1 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191148; op2val:0xbf8a0793;
op3val:0x7f250fb1; valaddr_reg:x12; val_offset:57*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 57*FLEN/8, x13, x9, x10)

inst_41:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x61107d and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4e8dd6 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3597f8 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ce1107d; op2val:0xc1ce8dd6;
op3val:0x7f3597f8; valaddr_reg:x12; val_offset:60*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 60*FLEN/8, x13, x9, x10)

inst_42:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c0d61 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x6f2b41 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x02d828 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8c0d61; op2val:0xc06f2b41;
op3val:0x7e82d828; valaddr_reg:x12; val_offset:63*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 63*FLEN/8, x13, x9, x10)

inst_43:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a8ec9 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x406305 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3045d1 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eea8ec9; op2val:0xbfc06305;
op3val:0x7f3045d1; valaddr_reg:x12; val_offset:66*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 66*FLEN/8, x13, x9, x10)

inst_44:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028b61 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2dfcc1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x317228 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e828b61; op2val:0xc02dfcc1;
op3val:0x7f317228; valaddr_reg:x12; val_offset:69*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 69*FLEN/8, x13, x9, x10)

inst_45:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5155d6 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x12ba16 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x6ff63d and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed155d6; op2val:0xbf12ba16;
op3val:0x7e6ff63d; valaddr_reg:x12; val_offset:72*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 72*FLEN/8, x13, x9, x10)

inst_46:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x734d68 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x0f6a98 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x084d8c and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e734d68; op2val:0xbf0f6a98;
op3val:0x7e084d8c; valaddr_reg:x12; val_offset:75*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 75*FLEN/8, x13, x9, x10)

inst_47:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x703804 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x73aee7 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x64a94b and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d703804; op2val:0xbff3aee7;
op3val:0x7de4a94b; valaddr_reg:x12; val_offset:78*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 78*FLEN/8, x13, x9, x10)

inst_48:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04524e and fs2 == 1 and fe2 == 0x7f and fm2 == 0x391f1a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3f5f1d and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04524e; op2val:0xbfb91f1a;
op3val:0x7f3f5f1d; valaddr_reg:x12; val_offset:81*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 81*FLEN/8, x13, x9, x10)

inst_49:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x781bf7 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x19e553 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x1526f9 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7df81bf7; op2val:0xbe99e553;
op3val:0x7d1526f9; valaddr_reg:x12; val_offset:84*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 84*FLEN/8, x13, x9, x10)

inst_50:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d723b and fs2 == 1 and fe2 == 0x7e and fm2 == 0x0a6ccf and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4ce034 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3d723b; op2val:0xbf0a6ccf;
op3val:0x7ecce034; valaddr_reg:x12; val_offset:87*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 87*FLEN/8, x13, x9, x10)

inst_51:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1bdc6a and fs2 == 1 and fe2 == 0x7e and fm2 == 0x15b123 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x364645 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9bdc6a; op2val:0xbf15b123;
op3val:0x7e364645; valaddr_reg:x12; val_offset:90*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 90*FLEN/8, x13, x9, x10)

inst_52:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6414a9 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3211a1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1ea613 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee414a9; op2val:0xbfb211a1;
op3val:0x7f1ea613; valaddr_reg:x12; val_offset:93*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 93*FLEN/8, x13, x9, x10)

inst_53:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ef9b3 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6cf335 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x21f46d and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eaef9b3; op2val:0xbf6cf335;
op3val:0x7ea1f46d; valaddr_reg:x12; val_offset:96*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 96*FLEN/8, x13, x9, x10)

inst_54:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2b21f2 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x038e08 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2fe2a3 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d2b21f2; op2val:0xc1838e08;
op3val:0x7f2fe2a3; valaddr_reg:x12; val_offset:99*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 99*FLEN/8, x13, x9, x10)

inst_55:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x490a06 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x7157ba and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3d8755 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc90a06; op2val:0xc17157ba;
op3val:0x7ebd8755; valaddr_reg:x12; val_offset:102*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 102*FLEN/8, x13, x9, x10)

inst_56:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20fa79 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x1f78b2 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x488eed and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f20fa79; op2val:0xbe1f78b2;
op3val:0x7dc88eed; valaddr_reg:x12; val_offset:105*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 105*FLEN/8, x13, x9, x10)

inst_57:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c7ac4 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x262942 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x365c7f and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0c7ac4; op2val:0xbfa62942;
op3val:0x7f365c7f; valaddr_reg:x12; val_offset:108*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 108*FLEN/8, x13, x9, x10)

inst_58:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7212c5 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x20008a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x174c3e and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef212c5; op2val:0xbfa0008a;
op3val:0x7f174c3e; valaddr_reg:x12; val_offset:111*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 111*FLEN/8, x13, x9, x10)

inst_59:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x23c8dc and fs2 == 1 and fe2 == 0x81 and fm2 == 0x02691f and fs3 == 0 and fe3 == 0xfd and fm3 == 0x26de83 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da3c8dc; op2val:0xc082691f;
op3val:0x7ea6de83; valaddr_reg:x12; val_offset:114*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 114*FLEN/8, x13, x9, x10)

inst_60:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x653da7 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x351f02 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x22305b and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7de53da7; op2val:0xc0b51f02;
op3val:0x7f22305b; valaddr_reg:x12; val_offset:117*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 117*FLEN/8, x13, x9, x10)

inst_61:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x626a93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x44bf77 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x2e02f0 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e626a93; op2val:0xbfc4bf77;
op3val:0x7eae02f0; valaddr_reg:x12; val_offset:120*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 120*FLEN/8, x13, x9, x10)

inst_62:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fdd96 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x5a545b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x23a1eb and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3fdd96; op2val:0xbf5a545b;
op3val:0x7f23a1eb; valaddr_reg:x12; val_offset:123*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 123*FLEN/8, x13, x9, x10)

inst_63:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b64b8 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x6debb7 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x2e28cb and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3b64b8; op2val:0xbeedebb7;
op3val:0x7eae28cb; valaddr_reg:x12; val_offset:126*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 126*FLEN/8, x13, x9, x10)

inst_64:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b73fa and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3f4883 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0c10a1 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebb73fa; op2val:0xbfbf4883;
op3val:0x7f0c10a1; valaddr_reg:x12; val_offset:129*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 129*FLEN/8, x13, x9, x10)

inst_65:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f3c9 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x1b85b6 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x5f815f and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb7f3c9; op2val:0xbf1b85b6;
op3val:0x7e5f815f; valaddr_reg:x12; val_offset:132*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 132*FLEN/8, x13, x9, x10)

inst_66:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b0e1c and fs2 == 1 and fe2 == 0x7d and fm2 == 0x39c4ac and fs3 == 0 and fe3 == 0xfb and fm3 == 0x6108a4 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b0e1c; op2val:0xbeb9c4ac;
op3val:0x7de108a4; valaddr_reg:x12; val_offset:135*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 135*FLEN/8, x13, x9, x10)

inst_67:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10c4ae and fs2 == 1 and fe2 == 0x80 and fm2 == 0x27ca24 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3dc53a and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e90c4ae; op2val:0xc027ca24;
op3val:0x7f3dc53a; valaddr_reg:x12; val_offset:138*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 138*FLEN/8, x13, x9, x10)

inst_68:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3848de and fs2 == 1 and fe2 == 0x7e and fm2 == 0x273904 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x70c129 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3848de; op2val:0xbf273904;
op3val:0x7ef0c129; valaddr_reg:x12; val_offset:141*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 141*FLEN/8, x13, x9, x10)

inst_69:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3fbd64 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2d8949 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x01f9d0 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebfbd64; op2val:0xbf2d8949;
op3val:0x7e81f9d0; valaddr_reg:x12; val_offset:144*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 144*FLEN/8, x13, x9, x10)

inst_70:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x08ea41 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x438442 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x512259 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d88ea41; op2val:0xc0438442;
op3val:0x7e512259; valaddr_reg:x12; val_offset:147*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 147*FLEN/8, x13, x9, x10)

inst_71:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1625cb and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0df910 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2689cb and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1625cb; op2val:0xbf8df910;
op3val:0x7f2689cb; valaddr_reg:x12; val_offset:150*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 150*FLEN/8, x13, x9, x10)

inst_72:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0abfd0 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0b3975 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x16ea94 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8abfd0; op2val:0xc00b3975;
op3val:0x7f16ea94; valaddr_reg:x12; val_offset:153*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 153*FLEN/8, x13, x9, x10)

inst_73:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x14c7ca and fs2 == 1 and fe2 == 0x7e and fm2 == 0x65789e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x055cd1 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f14c7ca; op2val:0xbf65789e;
op3val:0x7f055cd1; valaddr_reg:x12; val_offset:156*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 156*FLEN/8, x13, x9, x10)

inst_74:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7efbaa and fs2 == 1 and fe2 == 0x7f and fm2 == 0x126eac and fs3 == 0 and fe3 == 0xfe and fm3 == 0x11d9c2 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7efefbaa; op2val:0xbf926eac;
op3val:0x7f11d9c2; valaddr_reg:x12; val_offset:159*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 159*FLEN/8, x13, x9, x10)

inst_75:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0b8ecb and fs2 == 1 and fe2 == 0x7f and fm2 == 0x781ce6 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x074216 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8b8ecb; op2val:0xbff81ce6;
op3val:0x7f074216; valaddr_reg:x12; val_offset:162*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 162*FLEN/8, x13, x9, x10)

inst_76:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b1c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5d5a9b and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3a80cc and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e57b1c2; op2val:0xbfdd5a9b;
op3val:0x7eba80cc; valaddr_reg:x12; val_offset:165*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 165*FLEN/8, x13, x9, x10)

inst_77:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x13caa0 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x65c581 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x04a647 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f13caa0; op2val:0xbf65c581;
op3val:0x7f04a647; valaddr_reg:x12; val_offset:168*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 168*FLEN/8, x13, x9, x10)

inst_78:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61ada9 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4defe6 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x358b8d and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e61ada9; op2val:0xc04defe6;
op3val:0x7f358b8d; valaddr_reg:x12; val_offset:171*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 171*FLEN/8, x13, x9, x10)

inst_79:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x797b55 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x64cca5 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5ef947 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef97b55; op2val:0xbf64cca5;
op3val:0x7edef947; valaddr_reg:x12; val_offset:174*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 174*FLEN/8, x13, x9, x10)

inst_80:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x0e4d98 and fs2 == 1 and fe2 == 0x84 and fm2 == 0x3ceebe and fs3 == 0 and fe3 == 0xfd and fm3 == 0x520b63 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c0e4d98; op2val:0xc23ceebe;
op3val:0x7ed20b63; valaddr_reg:x12; val_offset:177*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 177*FLEN/8, x13, x9, x10)

inst_81:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x40881b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2b773c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x00f497 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e40881b; op2val:0xc02b773c;
op3val:0x7f00f497; valaddr_reg:x12; val_offset:180*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 180*FLEN/8, x13, x9, x10)

inst_82:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31c4c0 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61ceaa and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1ccd6f and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb1c4c0; op2val:0xbfe1ceaa;
op3val:0x7f1ccd6f; valaddr_reg:x12; val_offset:183*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 183*FLEN/8, x13, x9, x10)

inst_83:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x789da3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x1db158 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1924e8 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef89da3; op2val:0xbf9db158;
op3val:0x7f1924e8; valaddr_reg:x12; val_offset:186*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 186*FLEN/8, x13, x9, x10)

inst_84:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x05966f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6cf9b4 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7751f9 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e85966f; op2val:0xbfecf9b4;
op3val:0x7ef751f9; valaddr_reg:x12; val_offset:189*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 189*FLEN/8, x13, x9, x10)

inst_85:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0da9b0 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0fad14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1f0320 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0da9b0; op2val:0xbf8fad14;
op3val:0x7f1f0320; valaddr_reg:x12; val_offset:192*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 192*FLEN/8, x13, x9, x10)

inst_86:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x066ad6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1a1b4e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x21d537 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e866ad6; op2val:0xc01a1b4e;
op3val:0x7f21d537; valaddr_reg:x12; val_offset:195*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 195*FLEN/8, x13, x9, x10)

inst_87:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2705e0 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x4a90d7 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x042923 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2705e0; op2val:0xbf4a90d7;
op3val:0x7f042923; valaddr_reg:x12; val_offset:198*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 198*FLEN/8, x13, x9, x10)

inst_88:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6a5b and fs2 == 1 and fe2 == 0x7e and fm2 == 0x7adbb0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x37a6b2 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3b6a5b; op2val:0xbf7adbb0;
op3val:0x7f37a6b2; valaddr_reg:x12; val_offset:201*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 201*FLEN/8, x13, x9, x10)

inst_89:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46f72d and fs2 == 1 and fe2 == 0x7f and fm2 == 0x02c459 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4b443e and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec6f72d; op2val:0xbf82c459;
op3val:0x7ecb443e; valaddr_reg:x12; val_offset:204*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 204*FLEN/8, x13, x9, x10)

inst_90:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7f3dba and fs2 == 1 and fe2 == 0x81 and fm2 == 0x211bd1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x20a18e and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dff3dba; op2val:0xc0a11bd1;
op3val:0x7f20a18e; valaddr_reg:x12; val_offset:207*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 207*FLEN/8, x13, x9, x10)

inst_91:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33fa2e and fs2 == 1 and fe2 == 0x7e and fm2 == 0x0255a1 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x37427e and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f33fa2e; op2val:0xbf0255a1;
op3val:0x7eb7427e; valaddr_reg:x12; val_offset:210*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 210*FLEN/8, x13, x9, x10)

inst_92:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04c0f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x053b56 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0a2e07 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04c0f2; op2val:0xbf853b56;
op3val:0x7f0a2e07; valaddr_reg:x12; val_offset:213*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 213*FLEN/8, x13, x9, x10)

inst_93:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c3a54 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x70e95d and fs3 == 0 and fe3 == 0xfc and fm3 == 0x03f683 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0c3a54; op2val:0xbe70e95d;
op3val:0x7e03f683; valaddr_reg:x12; val_offset:216*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 216*FLEN/8, x13, x9, x10)

inst_94:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15d4d3 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x3e8bad and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5f0b6a and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f15d4d3; op2val:0xbf3e8bad;
op3val:0x7edf0b6a; valaddr_reg:x12; val_offset:219*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 219*FLEN/8, x13, x9, x10)

inst_95:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f92d6 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x21da8e and fs3 == 0 and fe3 == 0xfd and fm3 == 0x219589 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eff92d6; op2val:0xbf21da8e;
op3val:0x7ea19589; valaddr_reg:x12; val_offset:222*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 222*FLEN/8, x13, x9, x10)

inst_96:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f83d9 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x1efb14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x14be49 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef83d9; op2val:0xbf9efb14;
op3val:0x7f14be49; valaddr_reg:x12; val_offset:225*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 225*FLEN/8, x13, x9, x10)

inst_97:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x748e89 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x10cab1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0a51cf and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef48e89; op2val:0xbf90cab1;
op3val:0x7f0a51cf; valaddr_reg:x12; val_offset:228*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 228*FLEN/8, x13, x9, x10)

inst_98:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b5ac and fs2 == 1 and fe2 == 0x81 and fm2 == 0x3962d8 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x75cba0 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ca9b5ac; op2val:0xc0b962d8;
op3val:0x7df5cba0; valaddr_reg:x12; val_offset:231*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 231*FLEN/8, x13, x9, x10)

inst_99:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x295ec9 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3caab6 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x79a51a and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea95ec9; op2val:0xbfbcaab6;
op3val:0x7ef9a51a; valaddr_reg:x12; val_offset:234*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 234*FLEN/8, x13, x9, x10)

inst_100:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2838a7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x486d6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x03b42b and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2838a7; op2val:0xc0486d6d;
op3val:0x7f03b42b; valaddr_reg:x12; val_offset:237*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 237*FLEN/8, x13, x9, x10)

inst_101:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x724091 and fs2 == 1 and fe2 == 0x7b and fm2 == 0x07e5ab and fs3 == 0 and fe3 == 0xfa and fm3 == 0x009962 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef24091; op2val:0xbd87e5ab;
op3val:0x7d009962; valaddr_reg:x12; val_offset:240*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 240*FLEN/8, x13, x9, x10)

inst_102:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3516bd and fs2 == 1 and fe2 == 0x7d and fm2 == 0x75a1a3 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x2dc11a and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb516bd; op2val:0xbef5a1a3;
op3val:0x7e2dc11a; valaddr_reg:x12; val_offset:243*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 243*FLEN/8, x13, x9, x10)

inst_103:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2653cb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1dd609 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x4d18e7 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d2653cb; op2val:0xc01dd609;
op3val:0x7dcd18e7; valaddr_reg:x12; val_offset:246*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 246*FLEN/8, x13, x9, x10)

inst_104:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x73b9b6 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x12733e and fs3 == 0 and fe3 == 0xfc and fm3 == 0x0b6da2 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e73b9b6; op2val:0xbf12733e;
op3val:0x7e0b6da2; valaddr_reg:x12; val_offset:249*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 249*FLEN/8, x13, x9, x10)

inst_105:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x148024 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x3cd5fe and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x5b1479 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e148024; op2val:0xbe3cd5fe;
op3val:0x7cdb1479; valaddr_reg:x12; val_offset:252*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 252*FLEN/8, x13, x9, x10)

inst_106:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x32afd0 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x513864 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x1208e5 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb2afd0; op2val:0xbf513864;
op3val:0x7e9208e5; valaddr_reg:x12; val_offset:255*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 255*FLEN/8, x13, x9, x10)

inst_107:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aedca and fs2 == 1 and fe2 == 0x7e and fm2 == 0x76f305 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x629f84 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeaedca; op2val:0xbf76f305;
op3val:0x7ee29f84; valaddr_reg:x12; val_offset:258*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 258*FLEN/8, x13, x9, x10)

inst_108:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x36aa81 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x730786 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2d6937 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e36aa81; op2val:0xc0730786;
op3val:0x7f2d6937; valaddr_reg:x12; val_offset:261*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 261*FLEN/8, x13, x9, x10)

inst_109:
// fs1 == 0 and fe1 == 0xf4 and fm1 == 0x01e1e1 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x196885 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x1baa0e and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7a01e1e1; op2val:0xc4196885;
op3val:0x7e9baa0e; valaddr_reg:x12; val_offset:264*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 264*FLEN/8, x13, x9, x10)

inst_110:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x55e8d8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3c7042 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x1d74cc and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e55e8d8; op2val:0xbfbc7042;
op3val:0x7e9d74cc; valaddr_reg:x12; val_offset:267*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 267*FLEN/8, x13, x9, x10)

inst_111:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30c11b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x673027 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1f9f7f and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7db0c11b; op2val:0xc0e73027;
op3val:0x7f1f9f7f; valaddr_reg:x12; val_offset:270*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 270*FLEN/8, x13, x9, x10)

inst_112:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f91dd and fs2 == 1 and fe2 == 0x7b and fm2 == 0x458990 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x5d90cb and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8f91dd; op2val:0xbdc58990;
op3val:0x7cdd90cb; valaddr_reg:x12; val_offset:273*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 273*FLEN/8, x13, x9, x10)

inst_113:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b9bcd and fs2 == 1 and fe2 == 0x7c and fm2 == 0x1e405c and fs3 == 0 and fe3 == 0xfb and fm3 == 0x11a564 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eeb9bcd; op2val:0xbe1e405c;
op3val:0x7d91a564; valaddr_reg:x12; val_offset:276*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 276*FLEN/8, x13, x9, x10)

inst_114:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515d63 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x1f58f4 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0251c0 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15d63; op2val:0xbf1f58f4;
op3val:0x7e8251c0; valaddr_reg:x12; val_offset:279*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 279*FLEN/8, x13, x9, x10)

inst_115:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f106b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x532924 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x37fe62 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf106b; op2val:0xbfd32924;
op3val:0x7f37fe62; valaddr_reg:x12; val_offset:282*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 282*FLEN/8, x13, x9, x10)

inst_116:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d27fd and fs2 == 1 and fe2 == 0x7e and fm2 == 0x0313ed and fs3 == 0 and fe3 == 0xfd and fm3 == 0x20ef64 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1d27fd; op2val:0xbf0313ed;
op3val:0x7ea0ef64; valaddr_reg:x12; val_offset:285*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 285*FLEN/8, x13, x9, x10)

inst_117:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c1813 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x4a4039 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x76a451 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1c1813; op2val:0xbf4a4039;
op3val:0x7ef6a451; valaddr_reg:x12; val_offset:288*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 288*FLEN/8, x13, x9, x10)

inst_118:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0dddb2 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x44f318 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x5a48e6 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8dddb2; op2val:0xbec4f318;
op3val:0x7dda48e6; valaddr_reg:x12; val_offset:291*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 291*FLEN/8, x13, x9, x10)

inst_119:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64d70d and fs2 == 1 and fe2 == 0x7e and fm2 == 0x723849 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x58859b and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4d70d; op2val:0xbf723849;
op3val:0x7ed8859b; valaddr_reg:x12; val_offset:294*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 294*FLEN/8, x13, x9, x10)

inst_120:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37c8e9 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x01712d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x39dafb and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f37c8e9; op2val:0xbf81712d;
op3val:0x7f39dafb; valaddr_reg:x12; val_offset:297*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 297*FLEN/8, x13, x9, x10)

inst_121:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x69b4c8 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x13b0b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x06d41d and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee9b4c8; op2val:0xbf13b0b0;
op3val:0x7e86d41d; valaddr_reg:x12; val_offset:300*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 300*FLEN/8, x13, x9, x10)

inst_122:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b8bb0 and fs2 == 1 and fe2 == 0x75 and fm2 == 0x0afed7 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x3a4824 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2b8bb0; op2val:0xba8afed7;
op3val:0x7a3a4824; valaddr_reg:x12; val_offset:303*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 303*FLEN/8, x13, x9, x10)

inst_123:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25c337 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x27c65d and fs3 == 0 and fe3 == 0xfd and fm3 == 0x594594 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5c337; op2val:0xc0a7c65d;
op3val:0x7ed94594; valaddr_reg:x12; val_offset:306*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 306*FLEN/8, x13, x9, x10)

inst_124:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6c3979 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x6a3541 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x581dad and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eec3979; op2val:0xbe6a3541;
op3val:0x7dd81dad; valaddr_reg:x12; val_offset:309*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 309*FLEN/8, x13, x9, x10)

inst_125:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71b611 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x353e03 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2b2047 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef1b611; op2val:0xbfb53e03;
op3val:0x7f2b2047; valaddr_reg:x12; val_offset:312*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 312*FLEN/8, x13, x9, x10)

inst_126:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x105363 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x1303f7 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x25c43d and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e905363; op2val:0xbf9303f7;
op3val:0x7ea5c43d; valaddr_reg:x12; val_offset:315*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 315*FLEN/8, x13, x9, x10)

inst_127:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2dd370 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x24d96b and fs3 == 0 and fe3 == 0xfc and fm3 == 0x5fde2a and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2dd370; op2val:0xbfa4d96b;
op3val:0x7e5fde2a; valaddr_reg:x12; val_offset:318*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 318*FLEN/8, x13, x9, x10)

inst_128:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ab616 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x47f49a and fs3 == 0 and fe3 == 0xfd and fm3 == 0x11d5f1 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3ab616; op2val:0xbec7f49a;
op3val:0x7e91d5f1; valaddr_reg:x12; val_offset:321*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 321*FLEN/8, x13, x9, x10)

inst_129:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3889e8 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x73608d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2f7080 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3889e8; op2val:0xbf73608d;
op3val:0x7f2f7080; valaddr_reg:x12; val_offset:324*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 324*FLEN/8, x13, x9, x10)

inst_130:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64ca80 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x5f46b8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x478b9a and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee4ca80; op2val:0xbedf46b8;
op3val:0x7e478b9a; valaddr_reg:x12; val_offset:327*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 327*FLEN/8, x13, x9, x10)

inst_131:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c5927 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x01847e and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3e94d0 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3c5927; op2val:0xbf01847e;
op3val:0x7ebe94d0; valaddr_reg:x12; val_offset:330*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 330*FLEN/8, x13, x9, x10)

inst_132:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f8c7e and fs2 == 1 and fe2 == 0x7e and fm2 == 0x44a44f and fs3 == 0 and fe3 == 0xfc and fm3 == 0x751bf1 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f8c7e; op2val:0xbf44a44f;
op3val:0x7e751bf1; valaddr_reg:x12; val_offset:333*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 333*FLEN/8, x13, x9, x10)

inst_133:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cfb28 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x7fccec and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3cd574 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3cfb28; op2val:0xbeffccec;
op3val:0x7ebcd574; valaddr_reg:x12; val_offset:336*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 336*FLEN/8, x13, x9, x10)

inst_134:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5bf434 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x552827 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3724af and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5bf434; op2val:0xbfd52827;
op3val:0x7eb724af; valaddr_reg:x12; val_offset:339*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 339*FLEN/8, x13, x9, x10)

inst_135:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3b3787 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2337c4 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x6eba47 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dbb3787; op2val:0xc0a337c4;
op3val:0x7eeeba47; valaddr_reg:x12; val_offset:342*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 342*FLEN/8, x13, x9, x10)

inst_136:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2a4aa3 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x293302 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x611a69 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eaa4aa3; op2val:0xbf293302;
op3val:0x7e611a69; valaddr_reg:x12; val_offset:345*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 345*FLEN/8, x13, x9, x10)

inst_137:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16166d and fs2 == 1 and fe2 == 0x7f and fm2 == 0x07627c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1ebf21 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f16166d; op2val:0xbf87627c;
op3val:0x7f1ebf21; valaddr_reg:x12; val_offset:348*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 348*FLEN/8, x13, x9, x10)

inst_138:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223dfa and fs2 == 1 and fe2 == 0x84 and fm2 == 0x2157ca and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4c813b and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c223dfa; op2val:0xc22157ca;
op3val:0x7ecc813b; valaddr_reg:x12; val_offset:351*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 351*FLEN/8, x13, x9, x10)

inst_139:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5244d5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x5a9f6c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x33918f and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5244d5; op2val:0xc05a9f6c;
op3val:0x7f33918f; valaddr_reg:x12; val_offset:354*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 354*FLEN/8, x13, x9, x10)

inst_140:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16204d and fs2 == 1 and fe2 == 0x7d and fm2 == 0x20dc4b and fs3 == 0 and fe3 == 0xfc and fm3 == 0x3caac1 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f16204d; op2val:0xbea0dc4b;
op3val:0x7e3caac1; valaddr_reg:x12; val_offset:357*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 357*FLEN/8, x13, x9, x10)

inst_141:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4d95b3 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x140204 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x6db854 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4d95b3; op2val:0xbf140204;
op3val:0x7dedb854; valaddr_reg:x12; val_offset:360*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 360*FLEN/8, x13, x9, x10)

inst_142:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ddabc and fs2 == 1 and fe2 == 0x7d and fm2 == 0x17cf0e and fs3 == 0 and fe3 == 0xfc and fm3 == 0x612b27 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3ddabc; op2val:0xbe97cf0e;
op3val:0x7e612b27; valaddr_reg:x12; val_offset:363*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 363*FLEN/8, x13, x9, x10)

inst_143:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x697c86 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x47d51b and fs3 == 0 and fe3 == 0xfd and fm3 == 0x36422a and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee97c86; op2val:0xbf47d51b;
op3val:0x7eb6422a; valaddr_reg:x12; val_offset:366*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 366*FLEN/8, x13, x9, x10)

inst_144:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a1f3 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6fb705 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x67e13b and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef7a1f3; op2val:0xbf6fb705;
op3val:0x7ee7e13b; valaddr_reg:x12; val_offset:369*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 369*FLEN/8, x13, x9, x10)

inst_145:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ebf31 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x22c52b and fs3 == 0 and fe3 == 0xfb and fm3 == 0x3585de and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0ebf31; op2val:0xbe22c52b;
op3val:0x7db585de; valaddr_reg:x12; val_offset:372*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 372*FLEN/8, x13, x9, x10)

inst_146:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11ff1d and fs2 == 1 and fe2 == 0x7d and fm2 == 0x4a76b7 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x66ee02 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f11ff1d; op2val:0xbeca76b7;
op3val:0x7e66ee02; valaddr_reg:x12; val_offset:375*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 375*FLEN/8, x13, x9, x10)

inst_147:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cdcfa and fs2 == 1 and fe2 == 0x7e and fm2 == 0x2149e2 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x011219 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eccdcfa; op2val:0xbf2149e2;
op3val:0x7e811219; valaddr_reg:x12; val_offset:378*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 378*FLEN/8, x13, x9, x10)

inst_148:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63f59c and fs2 == 1 and fe2 == 0x7f and fm2 == 0x647f4a and fs3 == 0 and fe3 == 0xfd and fm3 == 0x4b7817 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e63f59c; op2val:0xbfe47f4a;
op3val:0x7ecb7817; valaddr_reg:x12; val_offset:381*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 381*FLEN/8, x13, x9, x10)

inst_149:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x324e28 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x470cb8 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0aa39d and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb24e28; op2val:0xbf470cb8;
op3val:0x7e8aa39d; valaddr_reg:x12; val_offset:384*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 384*FLEN/8, x13, x9, x10)

inst_150:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f0b15 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x4b0294 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x62de76 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f0b15; op2val:0xbf4b0294;
op3val:0x7ee2de76; valaddr_reg:x12; val_offset:387*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 387*FLEN/8, x13, x9, x10)

inst_151:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5fd1b9 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x5dbbf1 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x41dc5e and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cdfd1b9; op2val:0xc0ddbbf1;
op3val:0x7e41dc5e; valaddr_reg:x12; val_offset:390*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 390*FLEN/8, x13, x9, x10)
RVTEST_SIGBASE(x9,signature_x9_1)

inst_152:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ef4a6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x00c03c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2ffb67 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eaef4a6; op2val:0xc000c03c;
op3val:0x7f2ffb67; valaddr_reg:x12; val_offset:393*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 393*FLEN/8, x13, x9, x10)

inst_153:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2a7c0d and fs2 == 1 and fe2 == 0x7e and fm2 == 0x1d4c63 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5181e6 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2a7c0d; op2val:0xbf1d4c63;
op3val:0x7ed181e6; valaddr_reg:x12; val_offset:396*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 396*FLEN/8, x13, x9, x10)

inst_154:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x32eb6c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x55d574 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x157310 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c32eb6c; op2val:0xc255d574;
op3val:0x7f157310; valaddr_reg:x12; val_offset:399*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 399*FLEN/8, x13, x9, x10)

inst_155:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x243fb8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2c433a and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5d0be3 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea43fb8; op2val:0xbfac433a;
op3val:0x7edd0be3; valaddr_reg:x12; val_offset:402*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 402*FLEN/8, x13, x9, x10)

inst_156:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07f885 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x648bdf and fs3 == 0 and fe3 == 0xfd and fm3 == 0x72c742 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f07f885; op2val:0xbf648bdf;
op3val:0x7ef2c742; valaddr_reg:x12; val_offset:405*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 405*FLEN/8, x13, x9, x10)

inst_157:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390aa3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x722d10 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2f0ca1 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb90aa3; op2val:0xbff22d10;
op3val:0x7f2f0ca1; valaddr_reg:x12; val_offset:408*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 408*FLEN/8, x13, x9, x10)

inst_158:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x14058d and fs2 == 1 and fe2 == 0x7f and fm2 == 0x021f69 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x1679f6 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e94058d; op2val:0xbf821f69;
op3val:0x7e9679f6; valaddr_reg:x12; val_offset:411*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 411*FLEN/8, x13, x9, x10)

inst_159:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2390a7 and fs2 == 1 and fe2 == 0x7c and fm2 == 0x6c2877 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x16e335 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2390a7; op2val:0xbe6c2877;
op3val:0x7e16e335; valaddr_reg:x12; val_offset:414*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 414*FLEN/8, x13, x9, x10)

inst_160:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ad5a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x17b417 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x34f350 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f18ad5a; op2val:0xbf97b417;
op3val:0x7f34f350; valaddr_reg:x12; val_offset:417*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 417*FLEN/8, x13, x9, x10)

inst_161:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x323547 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x006caa and fs3 == 0 and fe3 == 0xfd and fm3 == 0x32cc91 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cb23547; op2val:0xc1806caa;
op3val:0x7eb2cc91; valaddr_reg:x12; val_offset:420*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 420*FLEN/8, x13, x9, x10)

inst_162:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf90f and fs2 == 1 and fe2 == 0x7c and fm2 == 0x00acab and fs3 == 0 and fe3 == 0xfb and fm3 == 0x2de265 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cf90f; op2val:0xbe00acab;
op3val:0x7dade265; valaddr_reg:x12; val_offset:423*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 423*FLEN/8, x13, x9, x10)

inst_163:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x341f5c and fs2 == 1 and fe2 == 0x7e and fm2 == 0x0691ee and fs3 == 0 and fe3 == 0xfc and fm3 == 0x3d5e30 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb41f5c; op2val:0xbf0691ee;
op3val:0x7e3d5e30; valaddr_reg:x12; val_offset:426*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 426*FLEN/8, x13, x9, x10)

inst_164:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2125ab and fs2 == 1 and fe2 == 0x83 and fm2 == 0x0435fb and fs3 == 0 and fe3 == 0xfc and fm3 == 0x2672cf and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c2125ab; op2val:0xc18435fb;
op3val:0x7e2672cf; valaddr_reg:x12; val_offset:429*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 429*FLEN/8, x13, x9, x10)

inst_165:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x56a477 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x51d69a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2ff034 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e56a477; op2val:0xc051d69a;
op3val:0x7f2ff034; valaddr_reg:x12; val_offset:432*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 432*FLEN/8, x13, x9, x10)

inst_166:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1304ef and fs2 == 1 and fe2 == 0x7c and fm2 == 0x557010 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7526ed and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1304ef; op2val:0xbe557010;
op3val:0x7df526ed; valaddr_reg:x12; val_offset:435*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 435*FLEN/8, x13, x9, x10)

inst_167:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x190d5e and fs2 == 1 and fe2 == 0x7c and fm2 == 0x32420c and fs3 == 0 and fe3 == 0xfb and fm3 == 0x552591 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f190d5e; op2val:0xbe32420c;
op3val:0x7dd52591; valaddr_reg:x12; val_offset:438*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 438*FLEN/8, x13, x9, x10)

inst_168:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b3817 and fs2 == 1 and fe2 == 0x79 and fm2 == 0x401917 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x0c7c6b and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3b3817; op2val:0xbcc01917;
op3val:0x7c8c7c6b; valaddr_reg:x12; val_offset:441*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 441*FLEN/8, x13, x9, x10)

inst_169:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x5e038c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x2e660b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x173ee9 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c5e038c; op2val:0xc22e660b;
op3val:0x7f173ee9; valaddr_reg:x12; val_offset:444*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 444*FLEN/8, x13, x9, x10)

inst_170:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x5f1c44 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x24b4d2 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x0f8bb3 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bdf1c44; op2val:0xc0a4b4d2;
op3val:0x7d0f8bb3; valaddr_reg:x12; val_offset:447*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 447*FLEN/8, x13, x9, x10)

inst_171:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x043e1b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x03dea5 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x083d97 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e843e1b; op2val:0xbf83dea5;
op3val:0x7e883d97; valaddr_reg:x12; val_offset:450*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 450*FLEN/8, x13, x9, x10)
#endif


RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(2129605049,64,FLEN)
NAN_BOXED(3214437890,32,FLEN)
NAN_BOXED(2131651664,64,FLEN)
NAN_BOXED(2132323674,64,FLEN)
NAN_BOXED(2132323674,32,FLEN)
NAN_BOXED(2132323674,64,FLEN)
NAN_BOXED(2131627902,64,FLEN)
NAN_BOXED(3214905125,32,FLEN)
NAN_BOXED(2133923357,64,FLEN)
NAN_BOXED(2092053831,64,FLEN)
NAN_BOXED(3246419114,32,FLEN)
NAN_BOXED(2092053831,64,FLEN)
NAN_BOXED(2134187998,64,FLEN)
NAN_BOXED(3207601396,32,FLEN)
NAN_BOXED(2130261194,64,FLEN)
NAN_BOXED(2133653775,64,FLEN)
NAN_BOXED(3187715243,32,FLEN)
NAN_BOXED(3187715243,64,FLEN)
NAN_BOXED(2125733724,64,FLEN)
NAN_BOXED(3204878830,32,FLEN)
NAN_BOXED(3204878830,64,FLEN)
NAN_BOXED(2127613405,64,FLEN)
NAN_BOXED(3213302456,32,FLEN)
NAN_BOXED(2128372918,64,FLEN)
NAN_BOXED(2082547115,64,FLEN)
NAN_BOXED(2082547115,32,FLEN)
NAN_BOXED(2116448975,64,FLEN)
NAN_BOXED(2119607415,64,FLEN)
NAN_BOXED(3226588826,32,FLEN)
NAN_BOXED(2119607415,64,FLEN)
NAN_BOXED(2131952879,64,FLEN)
NAN_BOXED(2131952879,32,FLEN)
NAN_BOXED(2131952879,64,FLEN)
NAN_BOXED(2132348254,64,FLEN)
NAN_BOXED(2132348254,32,FLEN)
NAN_BOXED(2111120785,64,FLEN)
NAN_BOXED(2129467916,64,FLEN)
NAN_BOXED(3193052950,32,FLEN)
NAN_BOXED(2109905961,64,FLEN)
NAN_BOXED(2058254814,64,FLEN)
NAN_BOXED(3287645236,32,FLEN)
NAN_BOXED(2133282632,64,FLEN)
NAN_BOXED(2116082892,64,FLEN)
NAN_BOXED(3213078153,32,FLEN)
NAN_BOXED(2116386129,64,FLEN)
NAN_BOXED(2134679541,64,FLEN)
NAN_BOXED(3210958120,32,FLEN)
NAN_BOXED(2133295253,64,FLEN)
NAN_BOXED(2120101813,64,FLEN)
NAN_BOXED(3226776231,32,FLEN)
NAN_BOXED(2134416016,64,FLEN)
NAN_BOXED(2127499218,64,FLEN)
NAN_BOXED(3214993149,32,FLEN)
NAN_BOXED(2130846904,64,FLEN)
NAN_BOXED(2115847498,64,FLEN)
NAN_BOXED(3230862030,32,FLEN)
NAN_BOXED(2134158041,64,FLEN)
NAN_BOXED(2131008110,64,FLEN)
NAN_BOXED(3216188245,32,FLEN)
NAN_BOXED(2134480017,64,FLEN)
NAN_BOXED(2133563696,64,FLEN)
NAN_BOXED(3198888701,32,FLEN)
NAN_BOXED(2120579145,64,FLEN)
test_dataset_1:
NAN_BOXED(2123018857,32,FLEN)
NAN_BOXED(3203088305,32,FLEN)
NAN_BOXED(2113857683,32,FLEN)
NAN_BOXED(2111818833,32,FLEN)
NAN_BOXED(3202672395,32,FLEN)
NAN_BOXED(2101877747,32,FLEN)
NAN_BOXED(2120708507,32,FLEN)
NAN_BOXED(3221230924,32,FLEN)
NAN_BOXED(2129106975,32,FLEN)
NAN_BOXED(2066106749,32,FLEN)
NAN_BOXED(3276301095,32,FLEN)
NAN_BOXED(2130848210,32,FLEN)
NAN_BOXED(2122432668,32,FLEN)
NAN_BOXED(3211449643,32,FLEN)
NAN_BOXED(2121141300,32,FLEN)
NAN_BOXED(2132617164,32,FLEN)
NAN_BOXED(3205913512,32,FLEN)
NAN_BOXED(2126027564,32,FLEN)
NAN_BOXED(2121434994,32,FLEN)
NAN_BOXED(3217231158,32,FLEN)
NAN_BOXED(2126039472,32,FLEN)
NAN_BOXED(2131184613,32,FLEN)
NAN_BOXED(3181750742,32,FLEN)
NAN_BOXED(2100239194,32,FLEN)
NAN_BOXED(2134587415,32,FLEN)
NAN_BOXED(3166705943,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(2131752428,32,FLEN)
NAN_BOXED(3213900672,32,FLEN)
NAN_BOXED(2132948885,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(3257820683,32,FLEN)
NAN_BOXED(2132229865,32,FLEN)
NAN_BOXED(2123144549,32,FLEN)
NAN_BOXED(3217701050,32,FLEN)
NAN_BOXED(2128488118,32,FLEN)
NAN_BOXED(2078219332,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(2098170803,32,FLEN)
NAN_BOXED(2114646583,32,FLEN)
NAN_BOXED(3232297565,32,FLEN)
NAN_BOXED(2134336768,32,FLEN)
NAN_BOXED(2115431867,32,FLEN)
NAN_BOXED(3228966323,32,FLEN)
NAN_BOXED(2131827188,32,FLEN)
NAN_BOXED(2134015594,32,FLEN)
NAN_BOXED(3212948649,32,FLEN)
NAN_BOXED(2134171478,32,FLEN)
NAN_BOXED(2122595867,32,FLEN)
NAN_BOXED(3213090469,32,FLEN)
NAN_BOXED(2122857879,32,FLEN)
NAN_BOXED(2127133769,32,FLEN)
NAN_BOXED(3216848117,32,FLEN)
NAN_BOXED(2132077168,32,FLEN)
NAN_BOXED(2108028957,32,FLEN)
NAN_BOXED(3235750810,32,FLEN)
NAN_BOXED(2131734850,32,FLEN)
NAN_BOXED(2132349256,32,FLEN)
NAN_BOXED(3213494163,32,FLEN)
NAN_BOXED(2133135281,32,FLEN)
NAN_BOXED(2095124605,32,FLEN)
NAN_BOXED(3251539414,32,FLEN)
NAN_BOXED(2134218744,32,FLEN)
NAN_BOXED(2106330465,32,FLEN)
NAN_BOXED(3228511041,32,FLEN)
NAN_BOXED(2122504232,32,FLEN)
NAN_BOXED(2129301193,32,FLEN)
NAN_BOXED(3217056517,32,FLEN)
NAN_BOXED(2133870033,32,FLEN)
NAN_BOXED(2122484577,32,FLEN)
NAN_BOXED(3224239297,32,FLEN)
NAN_BOXED(2133946920,32,FLEN)
NAN_BOXED(2127648214,32,FLEN)
NAN_BOXED(3205675542,32,FLEN)
NAN_BOXED(2121266749,32,FLEN)
NAN_BOXED(2121485672,32,FLEN)
NAN_BOXED(3205458584,32,FLEN)
NAN_BOXED(2114473356,32,FLEN)
NAN_BOXED(2104506372,32,FLEN)
NAN_BOXED(3220418279,32,FLEN)
NAN_BOXED(2112137547,32,FLEN)
NAN_BOXED(2130989646,32,FLEN)
NAN_BOXED(3216580378,32,FLEN)
NAN_BOXED(2134859549,32,FLEN)
NAN_BOXED(2113412087,32,FLEN)
NAN_BOXED(3197756755,32,FLEN)
NAN_BOXED(2098538233,32,FLEN)
NAN_BOXED(2134733371,32,FLEN)
NAN_BOXED(3205131471,32,FLEN)
NAN_BOXED(2127355956,32,FLEN)
NAN_BOXED(2124143722,32,FLEN)
NAN_BOXED(3205869859,32,FLEN)
NAN_BOXED(2117486149,32,FLEN)
NAN_BOXED(2128876713,32,FLEN)
NAN_BOXED(3216118177,32,FLEN)
NAN_BOXED(2132715027,32,FLEN)
NAN_BOXED(2125396403,32,FLEN)
NAN_BOXED(3211588405,32,FLEN)
NAN_BOXED(2124543085,32,FLEN)
NAN_BOXED(2099978738,32,FLEN)
NAN_BOXED(3246624264,32,FLEN)
NAN_BOXED(2133844643,32,FLEN)
NAN_BOXED(2093550086,32,FLEN)
NAN_BOXED(3245430714,32,FLEN)
NAN_BOXED(2126350165,32,FLEN)
NAN_BOXED(2132867705,32,FLEN)
NAN_BOXED(3189733554,32,FLEN)
NAN_BOXED(2110295789,32,FLEN)
NAN_BOXED(2131524292,32,FLEN)
NAN_BOXED(3215337794,32,FLEN)
NAN_BOXED(2134269055,32,FLEN)
NAN_BOXED(2129793733,32,FLEN)
NAN_BOXED(3214934154,32,FLEN)
NAN_BOXED(2132233278,32,FLEN)
NAN_BOXED(2107885788,32,FLEN)
NAN_BOXED(3229772063,32,FLEN)
NAN_BOXED(2124865155,32,FLEN)
NAN_BOXED(2112175527,32,FLEN)
NAN_BOXED(3233095426,32,FLEN)
NAN_BOXED(2132947035,32,FLEN)
NAN_BOXED(2120379027,32,FLEN)
NAN_BOXED(3217342327,32,FLEN)
NAN_BOXED(2125333232,32,FLEN)
NAN_BOXED(2134891926,32,FLEN)
NAN_BOXED(3210368091,32,FLEN)
NAN_BOXED(2133041643,32,FLEN)
NAN_BOXED(2134598840,32,FLEN)
NAN_BOXED(3203263415,32,FLEN)
NAN_BOXED(2125342923,32,FLEN)
NAN_BOXED(2126214138,32,FLEN)
NAN_BOXED(3216984195,32,FLEN)
NAN_BOXED(2131497121,32,FLEN)
NAN_BOXED(2125984713,32,FLEN)
NAN_BOXED(3206251958,32,FLEN)
NAN_BOXED(2120188255,32,FLEN)
NAN_BOXED(2124090908,32,FLEN)
NAN_BOXED(3199845548,32,FLEN)
NAN_BOXED(2111899812,32,FLEN)
NAN_BOXED(2123416750,32,FLEN)
NAN_BOXED(3223833124,32,FLEN)
NAN_BOXED(2134754618,32,FLEN)
NAN_BOXED(2134395102,32,FLEN)
NAN_BOXED(3207018756,32,FLEN)
NAN_BOXED(2129707305,32,FLEN)
NAN_BOXED(2126495076,32,FLEN)
NAN_BOXED(3207432521,32,FLEN)
NAN_BOXED(2122447312,32,FLEN)
NAN_BOXED(2106124865,32,FLEN)
NAN_BOXED(3225650242,32,FLEN)
NAN_BOXED(2119246425,32,FLEN)
NAN_BOXED(2132157899,32,FLEN)
NAN_BOXED(3213752592,32,FLEN)
NAN_BOXED(2133232075,32,FLEN)
NAN_BOXED(2123022288,32,FLEN)
NAN_BOXED(3221961077,32,FLEN)
NAN_BOXED(2132208276,32,FLEN)
NAN_BOXED(2132068298,32,FLEN)
NAN_BOXED(3211098270,32,FLEN)
NAN_BOXED(2131057873,32,FLEN)
NAN_BOXED(2130639786,32,FLEN)
NAN_BOXED(3214044844,32,FLEN)
NAN_BOXED(2131876290,32,FLEN)
NAN_BOXED(2123075275,32,FLEN)
NAN_BOXED(3220708582,32,FLEN)
NAN_BOXED(2131182102,32,FLEN)
NAN_BOXED(2119676354,32,FLEN)
NAN_BOXED(3218954907,32,FLEN)
NAN_BOXED(2126151884,32,FLEN)
NAN_BOXED(2132003488,32,FLEN)
NAN_BOXED(3211117953,32,FLEN)
NAN_BOXED(2131011143,32,FLEN)
NAN_BOXED(2120330665,32,FLEN)
NAN_BOXED(3226333158,32,FLEN)
NAN_BOXED(2134215565,32,FLEN)
NAN_BOXED(2130279253,32,FLEN)
NAN_BOXED(3211054245,32,FLEN)
NAN_BOXED(2128542023,32,FLEN)
NAN_BOXED(2081312152,32,FLEN)
NAN_BOXED(3258773182,32,FLEN)
NAN_BOXED(2127694691,32,FLEN)
NAN_BOXED(2118158363,32,FLEN)
NAN_BOXED(3224074044,32,FLEN)
NAN_BOXED(2130769047,32,FLEN)
NAN_BOXED(2125579456,32,FLEN)
NAN_BOXED(3219246762,32,FLEN)
NAN_BOXED(2132594031,32,FLEN)
NAN_BOXED(2130222499,32,FLEN)
NAN_BOXED(3214782808,32,FLEN)
NAN_BOXED(2132354280,32,FLEN)
NAN_BOXED(2122684015,32,FLEN)
NAN_BOXED(3219978676,32,FLEN)
NAN_BOXED(2130137593,32,FLEN)
NAN_BOXED(2131601840,32,FLEN)
NAN_BOXED(3213864212,32,FLEN)
NAN_BOXED(2132738848,32,FLEN)
NAN_BOXED(2122738390,32,FLEN)
NAN_BOXED(3222936398,32,FLEN)
NAN_BOXED(2132923703,32,FLEN)
NAN_BOXED(2133263840,32,FLEN)
NAN_BOXED(3209334999,32,FLEN)
NAN_BOXED(2130979107,32,FLEN)
NAN_BOXED(2134600283,32,FLEN)
NAN_BOXED(3212499888,32,FLEN)
NAN_BOXED(2134353586,32,FLEN)
NAN_BOXED(2126968621,32,FLEN)
NAN_BOXED(3213018201,32,FLEN)
NAN_BOXED(2127250494,32,FLEN)
NAN_BOXED(2113879482,32,FLEN)
NAN_BOXED(3231783889,32,FLEN)
NAN_BOXED(2132844942,32,FLEN)
NAN_BOXED(2134112814,32,FLEN)
NAN_BOXED(3204601249,32,FLEN)
NAN_BOXED(2125939326,32,FLEN)
NAN_BOXED(2131017970,32,FLEN)
NAN_BOXED(3213179734,32,FLEN)
NAN_BOXED(2131373575,32,FLEN)
NAN_BOXED(2131507796,32,FLEN)
NAN_BOXED(3195070813,32,FLEN)
NAN_BOXED(2114188931,32,FLEN)
NAN_BOXED(2132137171,32,FLEN)
NAN_BOXED(3208547245,32,FLEN)
NAN_BOXED(2128546666,32,FLEN)
NAN_BOXED(2130678486,32,FLEN)
NAN_BOXED(3206666894,32,FLEN)
NAN_BOXED(2124518793,32,FLEN)
NAN_BOXED(2129626073,32,FLEN)
NAN_BOXED(3214867220,32,FLEN)
NAN_BOXED(2132065865,32,FLEN)
NAN_BOXED(2129956489,32,FLEN)
NAN_BOXED(3213937329,32,FLEN)
NAN_BOXED(2131382735,32,FLEN)
NAN_BOXED(2091496876,32,FLEN)
NAN_BOXED(3233374936,32,FLEN)
NAN_BOXED(2113260448,32,FLEN)
NAN_BOXED(2125029065,32,FLEN)
NAN_BOXED(3216812726,32,FLEN)
NAN_BOXED(2130289946,32,FLEN)
NAN_BOXED(2116565159,32,FLEN)
NAN_BOXED(3225972077,32,FLEN)
NAN_BOXED(2130949163,32,FLEN)
NAN_BOXED(2129805457,32,FLEN)
NAN_BOXED(3179799979,32,FLEN)
NAN_BOXED(2097191266,32,FLEN)
NAN_BOXED(2125797053,32,FLEN)
NAN_BOXED(3203768739,32,FLEN)
NAN_BOXED(2116927770,32,FLEN)
NAN_BOXED(2099663819,32,FLEN)
NAN_BOXED(3223180809,32,FLEN)
NAN_BOXED(2110593255,32,FLEN)
NAN_BOXED(2121513398,32,FLEN)
NAN_BOXED(3205657406,32,FLEN)
NAN_BOXED(2114678178,32,FLEN)
NAN_BOXED(2115272740,32,FLEN)
NAN_BOXED(3191657982,32,FLEN)
NAN_BOXED(2094732409,32,FLEN)
NAN_BOXED(2125639632,32,FLEN)
NAN_BOXED(3209771108,32,FLEN)
NAN_BOXED(2123499749,32,FLEN)
NAN_BOXED(2129325514,32,FLEN)
NAN_BOXED(3212243717,32,FLEN)
NAN_BOXED(2128781188,32,FLEN)
NAN_BOXED(2117511809,32,FLEN)
NAN_BOXED(3228764038,32,FLEN)
NAN_BOXED(2133682487,32,FLEN)
NAN_BOXED(2046943713,32,FLEN)
NAN_BOXED(3289999493,32,FLEN)
NAN_BOXED(2124130830,32,FLEN)
NAN_BOXED(2119559384,32,FLEN)
NAN_BOXED(3216797762,32,FLEN)
NAN_BOXED(2124248268,32,FLEN)
NAN_BOXED(2108735771,32,FLEN)
NAN_BOXED(3236376615,32,FLEN)
NAN_BOXED(2132778879,32,FLEN)
NAN_BOXED(2123338205,32,FLEN)
NAN_BOXED(3183839632,32,FLEN)
NAN_BOXED(2094895307,32,FLEN)
NAN_BOXED(2129370061,32,FLEN)
NAN_BOXED(3189653596,32,FLEN)
NAN_BOXED(2106697060,32,FLEN)
NAN_BOXED(2127650147,32,FLEN)
NAN_BOXED(3206502644,32,FLEN)
NAN_BOXED(2122469824,32,FLEN)
NAN_BOXED(2128547947,32,FLEN)
NAN_BOXED(3218286884,32,FLEN)
NAN_BOXED(2134376034,32,FLEN)
NAN_BOXED(2132617213,32,FLEN)
NAN_BOXED(3204649965,32,FLEN)
NAN_BOXED(2124476260,32,FLEN)
NAN_BOXED(2132547603,32,FLEN)
NAN_BOXED(3209314361,32,FLEN)
NAN_BOXED(2130093137,32,FLEN)
NAN_BOXED(2123226546,32,FLEN)
NAN_BOXED(3200578328,32,FLEN)
NAN_BOXED(2111457510,32,FLEN)
NAN_BOXED(2128926477,32,FLEN)
NAN_BOXED(3211933769,32,FLEN)
NAN_BOXED(2128119195,32,FLEN)
NAN_BOXED(2134362345,32,FLEN)
NAN_BOXED(3212931373,32,FLEN)
NAN_BOXED(2134498043,32,FLEN)
NAN_BOXED(2129245384,32,FLEN)
NAN_BOXED(3205738672,32,FLEN)
NAN_BOXED(2122765341,32,FLEN)
NAN_BOXED(2133560240,32,FLEN)
NAN_BOXED(3129671383,32,FLEN)
NAN_BOXED(2050639908,32,FLEN)
NAN_BOXED(2108015415,32,FLEN)
NAN_BOXED(3232220765,32,FLEN)
NAN_BOXED(2128168340,32,FLEN)
NAN_BOXED(2129410425,32,FLEN)
NAN_BOXED(3194631489,32,FLEN)
NAN_BOXED(2111315373,32,FLEN)
NAN_BOXED(2129770001,32,FLEN)
NAN_BOXED(3216326147,32,FLEN)
NAN_BOXED(2133532743,32,FLEN)
NAN_BOXED(2123387747,32,FLEN)
NAN_BOXED(3214083063,32,FLEN)
NAN_BOXED(2124792893,32,FLEN)
NAN_BOXED(2116932464,32,FLEN)
NAN_BOXED(3215251819,32,FLEN)
NAN_BOXED(2120212010,32,FLEN)
NAN_BOXED(2134554134,32,FLEN)
NAN_BOXED(3200775322,32,FLEN)
NAN_BOXED(2123486705,32,FLEN)
NAN_BOXED(2134411752,32,FLEN)
NAN_BOXED(3212009613,32,FLEN)
NAN_BOXED(2133815424,32,FLEN)
NAN_BOXED(2128923264,32,FLEN)
NAN_BOXED(3202303672,32,FLEN)
NAN_BOXED(2118618010,32,FLEN)
NAN_BOXED(2134661415,32,FLEN)
NAN_BOXED(3204547710,32,FLEN)
NAN_BOXED(2126419152,32,FLEN)
NAN_BOXED(2124385406,32,FLEN)
NAN_BOXED(3208946767,32,FLEN)
NAN_BOXED(2121604081,32,FLEN)
NAN_BOXED(2134702888,32,FLEN)
NAN_BOXED(3204435180,32,FLEN)
NAN_BOXED(2126304628,32,FLEN)
NAN_BOXED(2119955508,32,FLEN)
NAN_BOXED(3218417703,32,FLEN)
NAN_BOXED(2125931695,32,FLEN)
NAN_BOXED(2109421447,32,FLEN)
NAN_BOXED(3231922116,32,FLEN)
NAN_BOXED(2129574471,32,FLEN)
NAN_BOXED(2125089443,32,FLEN)
NAN_BOXED(3207148290,32,FLEN)
NAN_BOXED(2120292969,32,FLEN)
NAN_BOXED(2132153965,32,FLEN)
NAN_BOXED(3213320828,32,FLEN)
NAN_BOXED(2132721441,32,FLEN)
NAN_BOXED(2082618874,32,FLEN)
NAN_BOXED(3256965066,32,FLEN)
NAN_BOXED(2127331643,32,FLEN)
NAN_BOXED(2119320789,32,FLEN)
NAN_BOXED(3227164524,32,FLEN)
NAN_BOXED(2134086031,32,FLEN)
NAN_BOXED(2132156493,32,FLEN)
NAN_BOXED(3198213195,32,FLEN)
NAN_BOXED(2117905089,32,FLEN)
NAN_BOXED(2119013811,32,FLEN)
NAN_BOXED(3205759492,32,FLEN)
NAN_BOXED(2112731220,32,FLEN)
NAN_BOXED(2134760124,32,FLEN)
NAN_BOXED(3197619982,32,FLEN)
NAN_BOXED(2120297255,32,FLEN)
NAN_BOXED(2129230982,32,FLEN)
NAN_BOXED(3209155867,32,FLEN)
NAN_BOXED(2125873706,32,FLEN)
NAN_BOXED(2130158067,32,FLEN)
NAN_BOXED(3211769605,32,FLEN)
NAN_BOXED(2129125691,32,FLEN)
NAN_BOXED(2131672881,32,FLEN)
NAN_BOXED(3189949739,32,FLEN)
NAN_BOXED(2109048286,32,FLEN)
NAN_BOXED(2131885853,32,FLEN)
NAN_BOXED(3200939703,32,FLEN)
NAN_BOXED(2120674818,32,FLEN)
NAN_BOXED(2127355130,32,FLEN)
NAN_BOXED(3206629858,32,FLEN)
NAN_BOXED(2122387993,32,FLEN)
NAN_BOXED(2120480156,32,FLEN)
NAN_BOXED(3219423050,32,FLEN)
NAN_BOXED(2127263767,32,FLEN)
NAN_BOXED(2125614632,32,FLEN)
NAN_BOXED(3209104568,32,FLEN)
NAN_BOXED(2123015069,32,FLEN)
NAN_BOXED(2131692309,32,FLEN)
NAN_BOXED(3209364116,32,FLEN)
NAN_BOXED(2128797302,32,FLEN)
NAN_BOXED(2095043001,32,FLEN)
NAN_BOXED(3235757041,32,FLEN)
NAN_BOXED(2118245470,32,FLEN)
NAN_BOXED(2125395110,32,FLEN)
NAN_BOXED(3221274684,32,FLEN)
NAN_BOXED(2133850983,32,FLEN)
NAN_BOXED(2133490701,32,FLEN)
NAN_BOXED(3206368355,32,FLEN)
NAN_BOXED(2127659494,32,FLEN)
NAN_BOXED(2083711852,32,FLEN)
NAN_BOXED(3260405108,32,FLEN)
NAN_BOXED(2132112144,32,FLEN)
NAN_BOXED(2124693432,32,FLEN)
NAN_BOXED(3215737658,32,FLEN)
NAN_BOXED(2128415715,32,FLEN)
NAN_BOXED(2131228805,32,FLEN)
NAN_BOXED(3211037663,32,FLEN)
NAN_BOXED(2129839938,32,FLEN)
NAN_BOXED(2126056099,32,FLEN)
NAN_BOXED(3220319504,32,FLEN)
NAN_BOXED(2133789857,32,FLEN)
NAN_BOXED(2123629965,32,FLEN)
NAN_BOXED(3212975977,32,FLEN)
NAN_BOXED(2123790838,32,FLEN)
NAN_BOXED(2133037223,32,FLEN)
NAN_BOXED(3194759287,32,FLEN)
NAN_BOXED(2115429173,32,FLEN)
NAN_BOXED(2132323674,32,FLEN)
NAN_BOXED(3214390295,32,FLEN)
NAN_BOXED(2134176592,32,FLEN)
NAN_BOXED(2092053831,32,FLEN)
NAN_BOXED(3246419114,32,FLEN)
NAN_BOXED(2125646993,32,FLEN)
NAN_BOXED(2133653775,32,FLEN)
NAN_BOXED(3187715243,32,FLEN)
NAN_BOXED(2108547685,32,FLEN)
NAN_BOXED(2125733724,32,FLEN)
NAN_BOXED(3204878830,32,FLEN)
NAN_BOXED(2117951024,32,FLEN)
NAN_BOXED(2082547115,32,FLEN)
NAN_BOXED(3246667259,32,FLEN)
NAN_BOXED(2116448975,32,FLEN)
NAN_BOXED(2119607415,32,FLEN)
NAN_BOXED(3226588826,32,FLEN)
NAN_BOXED(2133848116,32,FLEN)
NAN_BOXED(2131952879,32,FLEN)
NAN_BOXED(3193270288,32,FLEN)
NAN_BOXED(2113218285,32,FLEN)
NAN_BOXED(2132348254,32,FLEN)
NAN_BOXED(3190964748,32,FLEN)
NAN_BOXED(2111120785,32,FLEN)
NAN_BOXED(2134587415,32,FLEN)
NAN_BOXED(3166705943,32,FLEN)
NAN_BOXED(2089581675,32,FLEN)
NAN_BOXED(2086536076,32,FLEN)
NAN_BOXED(3257820683,32,FLEN)
NAN_BOXED(2132229865,32,FLEN)
NAN_BOXED(2078219332,32,FLEN)
NAN_BOXED(3232019666,32,FLEN)
NAN_BOXED(2098170803,32,FLEN)
NAN_BOXED(2122595867,32,FLEN)
NAN_BOXED(3213090469,32,FLEN)
NAN_BOXED(2122857879,32,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;



signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 48*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_0:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_1:
    .fill 40*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine
tsig_begin_canary:
CANARY;

mtrap_sigptr:
    .fill 64*XLEN/32,4,0xdeadbeef

tsig_end_canary:
CANARY;
#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif


sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
