
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.7.1
// timestamp : Fri Jun 17 14:18:07 2022 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /scratch/pawan/work/normalised/RV32F/fmsub.s.cgf \
 \
//                  -- xlen 32  \
//                  --randomize \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fmsub.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmsub_b15 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmsub_b15)
RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fmsub_b15)
RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_5376:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7a800000; valaddr_reg:x3; val_offset:16128*0 + 3*-1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16128*0 + 3*0*FLEN/8, x4, x1, x2)

inst_5377:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7a800001; valaddr_reg:x3; val_offset:16131*0 + 3*0*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16131*0 + 3*1*FLEN/8, x4, x1, x2)

inst_5378:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7a800003; valaddr_reg:x3; val_offset:16134*0 + 3*1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16134*0 + 3*2*FLEN/8, x4, x1, x2)

inst_5379:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7a800007; valaddr_reg:x3; val_offset:16137*0 + 3*2*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16137*0 + 3*3*FLEN/8, x4, x1, x2)

inst_5380:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7a80000f; valaddr_reg:x3; val_offset:16140*0 + 3*3*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16140*0 + 3*4*FLEN/8, x4, x1, x2)

inst_5381:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7a80001f; valaddr_reg:x3; val_offset:16143*0 + 3*4*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16143*0 + 3*5*FLEN/8, x4, x1, x2)

inst_5382:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7a80003f; valaddr_reg:x3; val_offset:16146*0 + 3*5*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16146*0 + 3*6*FLEN/8, x4, x1, x2)

inst_5383:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7a80007f; valaddr_reg:x3; val_offset:16149*0 + 3*6*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16149*0 + 3*7*FLEN/8, x4, x1, x2)

inst_5384:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7a8000ff; valaddr_reg:x3; val_offset:16152*0 + 3*7*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16152*0 + 3*8*FLEN/8, x4, x1, x2)

inst_5385:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7a8001ff; valaddr_reg:x3; val_offset:16155*0 + 3*8*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16155*0 + 3*9*FLEN/8, x4, x1, x2)

inst_5386:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7a8003ff; valaddr_reg:x3; val_offset:16158*0 + 3*9*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16158*0 + 3*10*FLEN/8, x4, x1, x2)

inst_5387:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7a8007ff; valaddr_reg:x3; val_offset:16161*0 + 3*10*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16161*0 + 3*11*FLEN/8, x4, x1, x2)

inst_5388:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7a800fff; valaddr_reg:x3; val_offset:16164*0 + 3*11*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16164*0 + 3*12*FLEN/8, x4, x1, x2)

inst_5389:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7a801fff; valaddr_reg:x3; val_offset:16167*0 + 3*12*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16167*0 + 3*13*FLEN/8, x4, x1, x2)

inst_5390:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7a803fff; valaddr_reg:x3; val_offset:16170*0 + 3*13*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16170*0 + 3*14*FLEN/8, x4, x1, x2)

inst_5391:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7a807fff; valaddr_reg:x3; val_offset:16173*0 + 3*14*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16173*0 + 3*15*FLEN/8, x4, x1, x2)

inst_5392:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7a80ffff; valaddr_reg:x3; val_offset:16176*0 + 3*15*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16176*0 + 3*16*FLEN/8, x4, x1, x2)

inst_5393:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7a81ffff; valaddr_reg:x3; val_offset:16179*0 + 3*16*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16179*0 + 3*17*FLEN/8, x4, x1, x2)

inst_5394:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7a83ffff; valaddr_reg:x3; val_offset:16182*0 + 3*17*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16182*0 + 3*18*FLEN/8, x4, x1, x2)

inst_5395:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7a87ffff; valaddr_reg:x3; val_offset:16185*0 + 3*18*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16185*0 + 3*19*FLEN/8, x4, x1, x2)

inst_5396:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7a8fffff; valaddr_reg:x3; val_offset:16188*0 + 3*19*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16188*0 + 3*20*FLEN/8, x4, x1, x2)

inst_5397:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7a9fffff; valaddr_reg:x3; val_offset:16191*0 + 3*20*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16191*0 + 3*21*FLEN/8, x4, x1, x2)

inst_5398:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7abfffff; valaddr_reg:x3; val_offset:16194*0 + 3*21*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16194*0 + 3*22*FLEN/8, x4, x1, x2)

inst_5399:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7ac00000; valaddr_reg:x3; val_offset:16197*0 + 3*22*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16197*0 + 3*23*FLEN/8, x4, x1, x2)

inst_5400:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7ae00000; valaddr_reg:x3; val_offset:16200*0 + 3*23*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16200*0 + 3*24*FLEN/8, x4, x1, x2)

inst_5401:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7af00000; valaddr_reg:x3; val_offset:16203*0 + 3*24*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16203*0 + 3*25*FLEN/8, x4, x1, x2)

inst_5402:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7af80000; valaddr_reg:x3; val_offset:16206*0 + 3*25*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16206*0 + 3*26*FLEN/8, x4, x1, x2)

inst_5403:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7afc0000; valaddr_reg:x3; val_offset:16209*0 + 3*26*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16209*0 + 3*27*FLEN/8, x4, x1, x2)

inst_5404:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7afe0000; valaddr_reg:x3; val_offset:16212*0 + 3*27*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16212*0 + 3*28*FLEN/8, x4, x1, x2)

inst_5405:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7aff0000; valaddr_reg:x3; val_offset:16215*0 + 3*28*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16215*0 + 3*29*FLEN/8, x4, x1, x2)

inst_5406:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7aff8000; valaddr_reg:x3; val_offset:16218*0 + 3*29*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16218*0 + 3*30*FLEN/8, x4, x1, x2)

inst_5407:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7affc000; valaddr_reg:x3; val_offset:16221*0 + 3*30*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16221*0 + 3*31*FLEN/8, x4, x1, x2)

inst_5408:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7affe000; valaddr_reg:x3; val_offset:16224*0 + 3*31*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16224*0 + 3*32*FLEN/8, x4, x1, x2)

inst_5409:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7afff000; valaddr_reg:x3; val_offset:16227*0 + 3*32*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16227*0 + 3*33*FLEN/8, x4, x1, x2)

inst_5410:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7afff800; valaddr_reg:x3; val_offset:16230*0 + 3*33*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16230*0 + 3*34*FLEN/8, x4, x1, x2)

inst_5411:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7afffc00; valaddr_reg:x3; val_offset:16233*0 + 3*34*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16233*0 + 3*35*FLEN/8, x4, x1, x2)

inst_5412:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7afffe00; valaddr_reg:x3; val_offset:16236*0 + 3*35*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16236*0 + 3*36*FLEN/8, x4, x1, x2)

inst_5413:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7affff00; valaddr_reg:x3; val_offset:16239*0 + 3*36*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16239*0 + 3*37*FLEN/8, x4, x1, x2)

inst_5414:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7affff80; valaddr_reg:x3; val_offset:16242*0 + 3*37*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16242*0 + 3*38*FLEN/8, x4, x1, x2)

inst_5415:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7affffc0; valaddr_reg:x3; val_offset:16245*0 + 3*38*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16245*0 + 3*39*FLEN/8, x4, x1, x2)

inst_5416:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7affffe0; valaddr_reg:x3; val_offset:16248*0 + 3*39*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16248*0 + 3*40*FLEN/8, x4, x1, x2)

inst_5417:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7afffff0; valaddr_reg:x3; val_offset:16251*0 + 3*40*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16251*0 + 3*41*FLEN/8, x4, x1, x2)

inst_5418:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7afffff8; valaddr_reg:x3; val_offset:16254*0 + 3*41*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16254*0 + 3*42*FLEN/8, x4, x1, x2)

inst_5419:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7afffffc; valaddr_reg:x3; val_offset:16257*0 + 3*42*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16257*0 + 3*43*FLEN/8, x4, x1, x2)

inst_5420:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7afffffe; valaddr_reg:x3; val_offset:16260*0 + 3*43*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16260*0 + 3*44*FLEN/8, x4, x1, x2)

inst_5421:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7affffff; valaddr_reg:x3; val_offset:16263*0 + 3*44*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16263*0 + 3*45*FLEN/8, x4, x1, x2)

inst_5422:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7f000001; valaddr_reg:x3; val_offset:16266*0 + 3*45*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16266*0 + 3*46*FLEN/8, x4, x1, x2)

inst_5423:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7f000003; valaddr_reg:x3; val_offset:16269*0 + 3*46*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16269*0 + 3*47*FLEN/8, x4, x1, x2)

inst_5424:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7f000007; valaddr_reg:x3; val_offset:16272*0 + 3*47*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16272*0 + 3*48*FLEN/8, x4, x1, x2)

inst_5425:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7f199999; valaddr_reg:x3; val_offset:16275*0 + 3*48*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16275*0 + 3*49*FLEN/8, x4, x1, x2)

inst_5426:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7f249249; valaddr_reg:x3; val_offset:16278*0 + 3*49*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16278*0 + 3*50*FLEN/8, x4, x1, x2)

inst_5427:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7f333333; valaddr_reg:x3; val_offset:16281*0 + 3*50*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16281*0 + 3*51*FLEN/8, x4, x1, x2)

inst_5428:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7f36db6d; valaddr_reg:x3; val_offset:16284*0 + 3*51*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16284*0 + 3*52*FLEN/8, x4, x1, x2)

inst_5429:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:16287*0 + 3*52*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16287*0 + 3*53*FLEN/8, x4, x1, x2)

inst_5430:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7f444444; valaddr_reg:x3; val_offset:16290*0 + 3*53*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16290*0 + 3*54*FLEN/8, x4, x1, x2)

inst_5431:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:16293*0 + 3*54*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16293*0 + 3*55*FLEN/8, x4, x1, x2)

inst_5432:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:16296*0 + 3*55*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16296*0 + 3*56*FLEN/8, x4, x1, x2)

inst_5433:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7f666666; valaddr_reg:x3; val_offset:16299*0 + 3*56*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16299*0 + 3*57*FLEN/8, x4, x1, x2)

inst_5434:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7f6db6db; valaddr_reg:x3; val_offset:16302*0 + 3*57*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16302*0 + 3*58*FLEN/8, x4, x1, x2)

inst_5435:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:16305*0 + 3*58*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16305*0 + 3*59*FLEN/8, x4, x1, x2)

inst_5436:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:16308*0 + 3*59*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16308*0 + 3*60*FLEN/8, x4, x1, x2)

inst_5437:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4a6385 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x21e7fd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dca6385; op2val:0x4121e7fd;
op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:16311*0 + 3*60*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16311*0 + 3*61*FLEN/8, x4, x1, x2)

inst_5438:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4bf881 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x20a687 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcbf881; op2val:0x4120a687;
op3val:0x7f000001; valaddr_reg:x3; val_offset:16314*0 + 3*61*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16314*0 + 3*62*FLEN/8, x4, x1, x2)

inst_5439:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4bf881 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x20a687 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcbf881; op2val:0x4120a687;
op3val:0x7f000003; valaddr_reg:x3; val_offset:16317*0 + 3*62*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16317*0 + 3*63*FLEN/8, x4, x1, x2)

inst_5440:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4bf881 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x20a687 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcbf881; op2val:0x4120a687;
op3val:0x7f000007; valaddr_reg:x3; val_offset:16320*0 + 3*63*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16320*0 + 3*64*FLEN/8, x4, x1, x2)

inst_5441:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4bf881 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x20a687 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcbf881; op2val:0x4120a687;
op3val:0x7f199999; valaddr_reg:x3; val_offset:16323*0 + 3*64*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16323*0 + 3*65*FLEN/8, x4, x1, x2)

inst_5442:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4bf881 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x20a687 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcbf881; op2val:0x4120a687;
op3val:0x7f249249; valaddr_reg:x3; val_offset:16326*0 + 3*65*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16326*0 + 3*66*FLEN/8, x4, x1, x2)

inst_5443:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4bf881 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x20a687 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcbf881; op2val:0x4120a687;
op3val:0x7f333333; valaddr_reg:x3; val_offset:16329*0 + 3*66*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16329*0 + 3*67*FLEN/8, x4, x1, x2)

inst_5444:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4bf881 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x20a687 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcbf881; op2val:0x4120a687;
op3val:0x7f36db6d; valaddr_reg:x3; val_offset:16332*0 + 3*67*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16332*0 + 3*68*FLEN/8, x4, x1, x2)

inst_5445:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4bf881 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x20a687 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcbf881; op2val:0x4120a687;
op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:16335*0 + 3*68*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16335*0 + 3*69*FLEN/8, x4, x1, x2)

inst_5446:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4bf881 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x20a687 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcbf881; op2val:0x4120a687;
op3val:0x7f444444; valaddr_reg:x3; val_offset:16338*0 + 3*69*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16338*0 + 3*70*FLEN/8, x4, x1, x2)

inst_5447:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4bf881 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x20a687 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcbf881; op2val:0x4120a687;
op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:16341*0 + 3*70*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16341*0 + 3*71*FLEN/8, x4, x1, x2)

inst_5448:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4bf881 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x20a687 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcbf881; op2val:0x4120a687;
op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:16344*0 + 3*71*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16344*0 + 3*72*FLEN/8, x4, x1, x2)

inst_5449:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4bf881 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x20a687 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcbf881; op2val:0x4120a687;
op3val:0x7f666666; valaddr_reg:x3; val_offset:16347*0 + 3*72*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16347*0 + 3*73*FLEN/8, x4, x1, x2)

inst_5450:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4bf881 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x20a687 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcbf881; op2val:0x4120a687;
op3val:0x7f6db6db; valaddr_reg:x3; val_offset:16350*0 + 3*73*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16350*0 + 3*74*FLEN/8, x4, x1, x2)

inst_5451:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4bf881 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x20a687 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcbf881; op2val:0x4120a687;
op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:16353*0 + 3*74*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16353*0 + 3*75*FLEN/8, x4, x1, x2)

inst_5452:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4bf881 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x20a687 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcbf881; op2val:0x4120a687;
op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:16356*0 + 3*75*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16356*0 + 3*76*FLEN/8, x4, x1, x2)

inst_5453:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4bf881 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x20a687 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcbf881; op2val:0x4120a687;
op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:16359*0 + 3*76*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16359*0 + 3*77*FLEN/8, x4, x1, x2)

inst_5454:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4bf881 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x20a687 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcbf881; op2val:0x4120a687;
op3val:0x7f7fffff; valaddr_reg:x3; val_offset:16362*0 + 3*77*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16362*0 + 3*78*FLEN/8, x4, x1, x2)

inst_5455:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:16365*0 + 3*78*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16365*0 + 3*79*FLEN/8, x4, x1, x2)

inst_5456:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:16368*0 + 3*79*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16368*0 + 3*80*FLEN/8, x4, x1, x2)

inst_5457:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:16371*0 + 3*80*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16371*0 + 3*81*FLEN/8, x4, x1, x2)

inst_5458:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x199999; valaddr_reg:x3; val_offset:16374*0 + 3*81*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16374*0 + 3*82*FLEN/8, x4, x1, x2)

inst_5459:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x249249; valaddr_reg:x3; val_offset:16377*0 + 3*82*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16377*0 + 3*83*FLEN/8, x4, x1, x2)

inst_5460:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x333333; valaddr_reg:x3; val_offset:16380*0 + 3*83*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16380*0 + 3*84*FLEN/8, x4, x1, x2)

inst_5461:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x36db6d; valaddr_reg:x3; val_offset:16383*0 + 3*84*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16383*0 + 3*85*FLEN/8, x4, x1, x2)

inst_5462:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x3bbbbb; valaddr_reg:x3; val_offset:16386*0 + 3*85*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16386*0 + 3*86*FLEN/8, x4, x1, x2)

inst_5463:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x444444; valaddr_reg:x3; val_offset:16389*0 + 3*86*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16389*0 + 3*87*FLEN/8, x4, x1, x2)

inst_5464:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x4ccccc; valaddr_reg:x3; val_offset:16392*0 + 3*87*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16392*0 + 3*88*FLEN/8, x4, x1, x2)

inst_5465:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x5b6db6; valaddr_reg:x3; val_offset:16395*0 + 3*88*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16395*0 + 3*89*FLEN/8, x4, x1, x2)

inst_5466:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x666666; valaddr_reg:x3; val_offset:16398*0 + 3*89*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16398*0 + 3*90*FLEN/8, x4, x1, x2)

inst_5467:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x6db6db; valaddr_reg:x3; val_offset:16401*0 + 3*90*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16401*0 + 3*91*FLEN/8, x4, x1, x2)

inst_5468:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x7ffff8; valaddr_reg:x3; val_offset:16404*0 + 3*91*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16404*0 + 3*92*FLEN/8, x4, x1, x2)

inst_5469:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x7ffffc; valaddr_reg:x3; val_offset:16407*0 + 3*92*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16407*0 + 3*93*FLEN/8, x4, x1, x2)

inst_5470:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x7ffffe; valaddr_reg:x3; val_offset:16410*0 + 3*93*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16410*0 + 3*94*FLEN/8, x4, x1, x2)

inst_5471:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x10000000; valaddr_reg:x3; val_offset:16413*0 + 3*94*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16413*0 + 3*95*FLEN/8, x4, x1, x2)

inst_5472:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x10000001; valaddr_reg:x3; val_offset:16416*0 + 3*95*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16416*0 + 3*96*FLEN/8, x4, x1, x2)

inst_5473:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x10000003; valaddr_reg:x3; val_offset:16419*0 + 3*96*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16419*0 + 3*97*FLEN/8, x4, x1, x2)

inst_5474:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x10000007; valaddr_reg:x3; val_offset:16422*0 + 3*97*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16422*0 + 3*98*FLEN/8, x4, x1, x2)

inst_5475:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x1000000f; valaddr_reg:x3; val_offset:16425*0 + 3*98*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16425*0 + 3*99*FLEN/8, x4, x1, x2)

inst_5476:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x1000001f; valaddr_reg:x3; val_offset:16428*0 + 3*99*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16428*0 + 3*100*FLEN/8, x4, x1, x2)

inst_5477:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x1000003f; valaddr_reg:x3; val_offset:16431*0 + 3*100*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16431*0 + 3*101*FLEN/8, x4, x1, x2)

inst_5478:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x1000007f; valaddr_reg:x3; val_offset:16434*0 + 3*101*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16434*0 + 3*102*FLEN/8, x4, x1, x2)

inst_5479:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x100000ff; valaddr_reg:x3; val_offset:16437*0 + 3*102*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16437*0 + 3*103*FLEN/8, x4, x1, x2)

inst_5480:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x100001ff; valaddr_reg:x3; val_offset:16440*0 + 3*103*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16440*0 + 3*104*FLEN/8, x4, x1, x2)

inst_5481:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x100003ff; valaddr_reg:x3; val_offset:16443*0 + 3*104*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16443*0 + 3*105*FLEN/8, x4, x1, x2)

inst_5482:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x100007ff; valaddr_reg:x3; val_offset:16446*0 + 3*105*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16446*0 + 3*106*FLEN/8, x4, x1, x2)

inst_5483:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x10000fff; valaddr_reg:x3; val_offset:16449*0 + 3*106*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16449*0 + 3*107*FLEN/8, x4, x1, x2)

inst_5484:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x10001fff; valaddr_reg:x3; val_offset:16452*0 + 3*107*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16452*0 + 3*108*FLEN/8, x4, x1, x2)

inst_5485:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x10003fff; valaddr_reg:x3; val_offset:16455*0 + 3*108*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16455*0 + 3*109*FLEN/8, x4, x1, x2)

inst_5486:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x10007fff; valaddr_reg:x3; val_offset:16458*0 + 3*109*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16458*0 + 3*110*FLEN/8, x4, x1, x2)

inst_5487:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x1000ffff; valaddr_reg:x3; val_offset:16461*0 + 3*110*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16461*0 + 3*111*FLEN/8, x4, x1, x2)

inst_5488:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x1001ffff; valaddr_reg:x3; val_offset:16464*0 + 3*111*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16464*0 + 3*112*FLEN/8, x4, x1, x2)

inst_5489:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x1003ffff; valaddr_reg:x3; val_offset:16467*0 + 3*112*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16467*0 + 3*113*FLEN/8, x4, x1, x2)

inst_5490:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x1007ffff; valaddr_reg:x3; val_offset:16470*0 + 3*113*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16470*0 + 3*114*FLEN/8, x4, x1, x2)

inst_5491:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x100fffff; valaddr_reg:x3; val_offset:16473*0 + 3*114*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16473*0 + 3*115*FLEN/8, x4, x1, x2)

inst_5492:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x101fffff; valaddr_reg:x3; val_offset:16476*0 + 3*115*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16476*0 + 3*116*FLEN/8, x4, x1, x2)

inst_5493:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x103fffff; valaddr_reg:x3; val_offset:16479*0 + 3*116*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16479*0 + 3*117*FLEN/8, x4, x1, x2)

inst_5494:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x10400000; valaddr_reg:x3; val_offset:16482*0 + 3*117*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16482*0 + 3*118*FLEN/8, x4, x1, x2)

inst_5495:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x10600000; valaddr_reg:x3; val_offset:16485*0 + 3*118*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16485*0 + 3*119*FLEN/8, x4, x1, x2)

inst_5496:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x10700000; valaddr_reg:x3; val_offset:16488*0 + 3*119*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16488*0 + 3*120*FLEN/8, x4, x1, x2)

inst_5497:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x10780000; valaddr_reg:x3; val_offset:16491*0 + 3*120*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16491*0 + 3*121*FLEN/8, x4, x1, x2)

inst_5498:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x107c0000; valaddr_reg:x3; val_offset:16494*0 + 3*121*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16494*0 + 3*122*FLEN/8, x4, x1, x2)

inst_5499:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x107e0000; valaddr_reg:x3; val_offset:16497*0 + 3*122*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16497*0 + 3*123*FLEN/8, x4, x1, x2)

inst_5500:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x107f0000; valaddr_reg:x3; val_offset:16500*0 + 3*123*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16500*0 + 3*124*FLEN/8, x4, x1, x2)

inst_5501:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x107f8000; valaddr_reg:x3; val_offset:16503*0 + 3*124*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16503*0 + 3*125*FLEN/8, x4, x1, x2)

inst_5502:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x107fc000; valaddr_reg:x3; val_offset:16506*0 + 3*125*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16506*0 + 3*126*FLEN/8, x4, x1, x2)

inst_5503:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x107fe000; valaddr_reg:x3; val_offset:16509*0 + 3*126*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16509*0 + 3*127*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_2)

inst_5504:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x107ff000; valaddr_reg:x3; val_offset:16512*0 + 3*127*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16512*0 + 3*128*FLEN/8, x4, x1, x2)

inst_5505:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x107ff800; valaddr_reg:x3; val_offset:16515*0 + 3*128*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16515*0 + 3*129*FLEN/8, x4, x1, x2)

inst_5506:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x107ffc00; valaddr_reg:x3; val_offset:16518*0 + 3*129*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16518*0 + 3*130*FLEN/8, x4, x1, x2)

inst_5507:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x107ffe00; valaddr_reg:x3; val_offset:16521*0 + 3*130*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16521*0 + 3*131*FLEN/8, x4, x1, x2)

inst_5508:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x107fff00; valaddr_reg:x3; val_offset:16524*0 + 3*131*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16524*0 + 3*132*FLEN/8, x4, x1, x2)

inst_5509:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x107fff80; valaddr_reg:x3; val_offset:16527*0 + 3*132*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16527*0 + 3*133*FLEN/8, x4, x1, x2)

inst_5510:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x107fffc0; valaddr_reg:x3; val_offset:16530*0 + 3*133*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16530*0 + 3*134*FLEN/8, x4, x1, x2)

inst_5511:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x107fffe0; valaddr_reg:x3; val_offset:16533*0 + 3*134*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16533*0 + 3*135*FLEN/8, x4, x1, x2)

inst_5512:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x107ffff0; valaddr_reg:x3; val_offset:16536*0 + 3*135*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16536*0 + 3*136*FLEN/8, x4, x1, x2)

inst_5513:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x107ffff8; valaddr_reg:x3; val_offset:16539*0 + 3*136*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16539*0 + 3*137*FLEN/8, x4, x1, x2)

inst_5514:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x107ffffc; valaddr_reg:x3; val_offset:16542*0 + 3*137*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16542*0 + 3*138*FLEN/8, x4, x1, x2)

inst_5515:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x107ffffe; valaddr_reg:x3; val_offset:16545*0 + 3*138*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16545*0 + 3*139*FLEN/8, x4, x1, x2)

inst_5516:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ce0d7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcce0d7; op2val:0x0;
op3val:0x107fffff; valaddr_reg:x3; val_offset:16548*0 + 3*139*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16548*0 + 3*140*FLEN/8, x4, x1, x2)

inst_5517:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x800001; valaddr_reg:x3; val_offset:16551*0 + 3*140*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16551*0 + 3*141*FLEN/8, x4, x1, x2)

inst_5518:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x800003; valaddr_reg:x3; val_offset:16554*0 + 3*141*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16554*0 + 3*142*FLEN/8, x4, x1, x2)

inst_5519:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x800007; valaddr_reg:x3; val_offset:16557*0 + 3*142*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16557*0 + 3*143*FLEN/8, x4, x1, x2)

inst_5520:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x999999; valaddr_reg:x3; val_offset:16560*0 + 3*143*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16560*0 + 3*144*FLEN/8, x4, x1, x2)

inst_5521:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0xa49249; valaddr_reg:x3; val_offset:16563*0 + 3*144*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16563*0 + 3*145*FLEN/8, x4, x1, x2)

inst_5522:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0xb33333; valaddr_reg:x3; val_offset:16566*0 + 3*145*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16566*0 + 3*146*FLEN/8, x4, x1, x2)

inst_5523:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0xb6db6d; valaddr_reg:x3; val_offset:16569*0 + 3*146*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16569*0 + 3*147*FLEN/8, x4, x1, x2)

inst_5524:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0xbbbbbb; valaddr_reg:x3; val_offset:16572*0 + 3*147*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16572*0 + 3*148*FLEN/8, x4, x1, x2)

inst_5525:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0xc44444; valaddr_reg:x3; val_offset:16575*0 + 3*148*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16575*0 + 3*149*FLEN/8, x4, x1, x2)

inst_5526:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0xcccccc; valaddr_reg:x3; val_offset:16578*0 + 3*149*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16578*0 + 3*150*FLEN/8, x4, x1, x2)

inst_5527:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0xdb6db6; valaddr_reg:x3; val_offset:16581*0 + 3*150*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16581*0 + 3*151*FLEN/8, x4, x1, x2)

inst_5528:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0xe66666; valaddr_reg:x3; val_offset:16584*0 + 3*151*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16584*0 + 3*152*FLEN/8, x4, x1, x2)

inst_5529:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0xedb6db; valaddr_reg:x3; val_offset:16587*0 + 3*152*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16587*0 + 3*153*FLEN/8, x4, x1, x2)

inst_5530:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0xfffff8; valaddr_reg:x3; val_offset:16590*0 + 3*153*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16590*0 + 3*154*FLEN/8, x4, x1, x2)

inst_5531:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0xfffffc; valaddr_reg:x3; val_offset:16593*0 + 3*154*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16593*0 + 3*155*FLEN/8, x4, x1, x2)

inst_5532:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0xfffffe; valaddr_reg:x3; val_offset:16596*0 + 3*155*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16596*0 + 3*156*FLEN/8, x4, x1, x2)

inst_5533:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x4000000; valaddr_reg:x3; val_offset:16599*0 + 3*156*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16599*0 + 3*157*FLEN/8, x4, x1, x2)

inst_5534:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x4000001; valaddr_reg:x3; val_offset:16602*0 + 3*157*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16602*0 + 3*158*FLEN/8, x4, x1, x2)

inst_5535:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x4000003; valaddr_reg:x3; val_offset:16605*0 + 3*158*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16605*0 + 3*159*FLEN/8, x4, x1, x2)

inst_5536:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x4000007; valaddr_reg:x3; val_offset:16608*0 + 3*159*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16608*0 + 3*160*FLEN/8, x4, x1, x2)

inst_5537:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x400000f; valaddr_reg:x3; val_offset:16611*0 + 3*160*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16611*0 + 3*161*FLEN/8, x4, x1, x2)

inst_5538:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x400001f; valaddr_reg:x3; val_offset:16614*0 + 3*161*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16614*0 + 3*162*FLEN/8, x4, x1, x2)

inst_5539:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x400003f; valaddr_reg:x3; val_offset:16617*0 + 3*162*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16617*0 + 3*163*FLEN/8, x4, x1, x2)

inst_5540:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x400007f; valaddr_reg:x3; val_offset:16620*0 + 3*163*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16620*0 + 3*164*FLEN/8, x4, x1, x2)

inst_5541:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x40000ff; valaddr_reg:x3; val_offset:16623*0 + 3*164*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16623*0 + 3*165*FLEN/8, x4, x1, x2)

inst_5542:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x40001ff; valaddr_reg:x3; val_offset:16626*0 + 3*165*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16626*0 + 3*166*FLEN/8, x4, x1, x2)

inst_5543:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x40003ff; valaddr_reg:x3; val_offset:16629*0 + 3*166*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16629*0 + 3*167*FLEN/8, x4, x1, x2)

inst_5544:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x40007ff; valaddr_reg:x3; val_offset:16632*0 + 3*167*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16632*0 + 3*168*FLEN/8, x4, x1, x2)

inst_5545:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x4000fff; valaddr_reg:x3; val_offset:16635*0 + 3*168*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16635*0 + 3*169*FLEN/8, x4, x1, x2)

inst_5546:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x4001fff; valaddr_reg:x3; val_offset:16638*0 + 3*169*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16638*0 + 3*170*FLEN/8, x4, x1, x2)

inst_5547:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x4003fff; valaddr_reg:x3; val_offset:16641*0 + 3*170*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16641*0 + 3*171*FLEN/8, x4, x1, x2)

inst_5548:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x4007fff; valaddr_reg:x3; val_offset:16644*0 + 3*171*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16644*0 + 3*172*FLEN/8, x4, x1, x2)

inst_5549:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x400ffff; valaddr_reg:x3; val_offset:16647*0 + 3*172*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16647*0 + 3*173*FLEN/8, x4, x1, x2)

inst_5550:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x401ffff; valaddr_reg:x3; val_offset:16650*0 + 3*173*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16650*0 + 3*174*FLEN/8, x4, x1, x2)

inst_5551:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x403ffff; valaddr_reg:x3; val_offset:16653*0 + 3*174*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16653*0 + 3*175*FLEN/8, x4, x1, x2)

inst_5552:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x407ffff; valaddr_reg:x3; val_offset:16656*0 + 3*175*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16656*0 + 3*176*FLEN/8, x4, x1, x2)

inst_5553:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x40fffff; valaddr_reg:x3; val_offset:16659*0 + 3*176*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16659*0 + 3*177*FLEN/8, x4, x1, x2)

inst_5554:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x41fffff; valaddr_reg:x3; val_offset:16662*0 + 3*177*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16662*0 + 3*178*FLEN/8, x4, x1, x2)

inst_5555:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x43fffff; valaddr_reg:x3; val_offset:16665*0 + 3*178*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16665*0 + 3*179*FLEN/8, x4, x1, x2)

inst_5556:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x4400000; valaddr_reg:x3; val_offset:16668*0 + 3*179*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16668*0 + 3*180*FLEN/8, x4, x1, x2)

inst_5557:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x4600000; valaddr_reg:x3; val_offset:16671*0 + 3*180*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16671*0 + 3*181*FLEN/8, x4, x1, x2)

inst_5558:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x4700000; valaddr_reg:x3; val_offset:16674*0 + 3*181*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16674*0 + 3*182*FLEN/8, x4, x1, x2)

inst_5559:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x4780000; valaddr_reg:x3; val_offset:16677*0 + 3*182*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16677*0 + 3*183*FLEN/8, x4, x1, x2)

inst_5560:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x47c0000; valaddr_reg:x3; val_offset:16680*0 + 3*183*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16680*0 + 3*184*FLEN/8, x4, x1, x2)

inst_5561:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x47e0000; valaddr_reg:x3; val_offset:16683*0 + 3*184*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16683*0 + 3*185*FLEN/8, x4, x1, x2)

inst_5562:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x47f0000; valaddr_reg:x3; val_offset:16686*0 + 3*185*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16686*0 + 3*186*FLEN/8, x4, x1, x2)

inst_5563:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x47f8000; valaddr_reg:x3; val_offset:16689*0 + 3*186*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16689*0 + 3*187*FLEN/8, x4, x1, x2)

inst_5564:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x47fc000; valaddr_reg:x3; val_offset:16692*0 + 3*187*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16692*0 + 3*188*FLEN/8, x4, x1, x2)

inst_5565:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x47fe000; valaddr_reg:x3; val_offset:16695*0 + 3*188*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16695*0 + 3*189*FLEN/8, x4, x1, x2)

inst_5566:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x47ff000; valaddr_reg:x3; val_offset:16698*0 + 3*189*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16698*0 + 3*190*FLEN/8, x4, x1, x2)

inst_5567:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x47ff800; valaddr_reg:x3; val_offset:16701*0 + 3*190*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16701*0 + 3*191*FLEN/8, x4, x1, x2)

inst_5568:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x47ffc00; valaddr_reg:x3; val_offset:16704*0 + 3*191*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16704*0 + 3*192*FLEN/8, x4, x1, x2)

inst_5569:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x47ffe00; valaddr_reg:x3; val_offset:16707*0 + 3*192*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16707*0 + 3*193*FLEN/8, x4, x1, x2)

inst_5570:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x47fff00; valaddr_reg:x3; val_offset:16710*0 + 3*193*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16710*0 + 3*194*FLEN/8, x4, x1, x2)

inst_5571:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x47fff80; valaddr_reg:x3; val_offset:16713*0 + 3*194*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16713*0 + 3*195*FLEN/8, x4, x1, x2)

inst_5572:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x47fffc0; valaddr_reg:x3; val_offset:16716*0 + 3*195*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16716*0 + 3*196*FLEN/8, x4, x1, x2)

inst_5573:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x47fffe0; valaddr_reg:x3; val_offset:16719*0 + 3*196*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16719*0 + 3*197*FLEN/8, x4, x1, x2)

inst_5574:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x47ffff0; valaddr_reg:x3; val_offset:16722*0 + 3*197*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16722*0 + 3*198*FLEN/8, x4, x1, x2)

inst_5575:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x47ffff8; valaddr_reg:x3; val_offset:16725*0 + 3*198*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16725*0 + 3*199*FLEN/8, x4, x1, x2)

inst_5576:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x47ffffc; valaddr_reg:x3; val_offset:16728*0 + 3*199*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16728*0 + 3*200*FLEN/8, x4, x1, x2)

inst_5577:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x47ffffe; valaddr_reg:x3; val_offset:16731*0 + 3*200*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16731*0 + 3*201*FLEN/8, x4, x1, x2)

inst_5578:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ff1fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcff1fa; op2val:0x0;
op3val:0x47fffff; valaddr_reg:x3; val_offset:16734*0 + 3*201*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16734*0 + 3*202*FLEN/8, x4, x1, x2)

inst_5579:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x28800000; valaddr_reg:x3; val_offset:16737*0 + 3*202*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16737*0 + 3*203*FLEN/8, x4, x1, x2)

inst_5580:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x28800001; valaddr_reg:x3; val_offset:16740*0 + 3*203*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16740*0 + 3*204*FLEN/8, x4, x1, x2)

inst_5581:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x28800003; valaddr_reg:x3; val_offset:16743*0 + 3*204*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16743*0 + 3*205*FLEN/8, x4, x1, x2)

inst_5582:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x28800007; valaddr_reg:x3; val_offset:16746*0 + 3*205*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16746*0 + 3*206*FLEN/8, x4, x1, x2)

inst_5583:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x2880000f; valaddr_reg:x3; val_offset:16749*0 + 3*206*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16749*0 + 3*207*FLEN/8, x4, x1, x2)

inst_5584:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x2880001f; valaddr_reg:x3; val_offset:16752*0 + 3*207*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16752*0 + 3*208*FLEN/8, x4, x1, x2)

inst_5585:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x2880003f; valaddr_reg:x3; val_offset:16755*0 + 3*208*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16755*0 + 3*209*FLEN/8, x4, x1, x2)

inst_5586:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x2880007f; valaddr_reg:x3; val_offset:16758*0 + 3*209*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16758*0 + 3*210*FLEN/8, x4, x1, x2)

inst_5587:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x288000ff; valaddr_reg:x3; val_offset:16761*0 + 3*210*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16761*0 + 3*211*FLEN/8, x4, x1, x2)

inst_5588:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x288001ff; valaddr_reg:x3; val_offset:16764*0 + 3*211*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16764*0 + 3*212*FLEN/8, x4, x1, x2)

inst_5589:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x288003ff; valaddr_reg:x3; val_offset:16767*0 + 3*212*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16767*0 + 3*213*FLEN/8, x4, x1, x2)

inst_5590:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x288007ff; valaddr_reg:x3; val_offset:16770*0 + 3*213*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16770*0 + 3*214*FLEN/8, x4, x1, x2)

inst_5591:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x28800fff; valaddr_reg:x3; val_offset:16773*0 + 3*214*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16773*0 + 3*215*FLEN/8, x4, x1, x2)

inst_5592:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x28801fff; valaddr_reg:x3; val_offset:16776*0 + 3*215*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16776*0 + 3*216*FLEN/8, x4, x1, x2)

inst_5593:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x28803fff; valaddr_reg:x3; val_offset:16779*0 + 3*216*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16779*0 + 3*217*FLEN/8, x4, x1, x2)

inst_5594:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x28807fff; valaddr_reg:x3; val_offset:16782*0 + 3*217*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16782*0 + 3*218*FLEN/8, x4, x1, x2)

inst_5595:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x2880ffff; valaddr_reg:x3; val_offset:16785*0 + 3*218*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16785*0 + 3*219*FLEN/8, x4, x1, x2)

inst_5596:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x2881ffff; valaddr_reg:x3; val_offset:16788*0 + 3*219*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16788*0 + 3*220*FLEN/8, x4, x1, x2)

inst_5597:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x2883ffff; valaddr_reg:x3; val_offset:16791*0 + 3*220*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16791*0 + 3*221*FLEN/8, x4, x1, x2)

inst_5598:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x2887ffff; valaddr_reg:x3; val_offset:16794*0 + 3*221*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16794*0 + 3*222*FLEN/8, x4, x1, x2)

inst_5599:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x288fffff; valaddr_reg:x3; val_offset:16797*0 + 3*222*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16797*0 + 3*223*FLEN/8, x4, x1, x2)

inst_5600:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x289fffff; valaddr_reg:x3; val_offset:16800*0 + 3*223*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16800*0 + 3*224*FLEN/8, x4, x1, x2)

inst_5601:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x28bfffff; valaddr_reg:x3; val_offset:16803*0 + 3*224*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16803*0 + 3*225*FLEN/8, x4, x1, x2)

inst_5602:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x28c00000; valaddr_reg:x3; val_offset:16806*0 + 3*225*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16806*0 + 3*226*FLEN/8, x4, x1, x2)

inst_5603:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x28e00000; valaddr_reg:x3; val_offset:16809*0 + 3*226*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16809*0 + 3*227*FLEN/8, x4, x1, x2)

inst_5604:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x28f00000; valaddr_reg:x3; val_offset:16812*0 + 3*227*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16812*0 + 3*228*FLEN/8, x4, x1, x2)

inst_5605:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x28f80000; valaddr_reg:x3; val_offset:16815*0 + 3*228*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16815*0 + 3*229*FLEN/8, x4, x1, x2)

inst_5606:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x28fc0000; valaddr_reg:x3; val_offset:16818*0 + 3*229*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16818*0 + 3*230*FLEN/8, x4, x1, x2)

inst_5607:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x28fe0000; valaddr_reg:x3; val_offset:16821*0 + 3*230*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16821*0 + 3*231*FLEN/8, x4, x1, x2)

inst_5608:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x28ff0000; valaddr_reg:x3; val_offset:16824*0 + 3*231*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16824*0 + 3*232*FLEN/8, x4, x1, x2)

inst_5609:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x28ff8000; valaddr_reg:x3; val_offset:16827*0 + 3*232*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16827*0 + 3*233*FLEN/8, x4, x1, x2)

inst_5610:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x28ffc000; valaddr_reg:x3; val_offset:16830*0 + 3*233*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16830*0 + 3*234*FLEN/8, x4, x1, x2)

inst_5611:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x28ffe000; valaddr_reg:x3; val_offset:16833*0 + 3*234*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16833*0 + 3*235*FLEN/8, x4, x1, x2)

inst_5612:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x28fff000; valaddr_reg:x3; val_offset:16836*0 + 3*235*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16836*0 + 3*236*FLEN/8, x4, x1, x2)

inst_5613:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x28fff800; valaddr_reg:x3; val_offset:16839*0 + 3*236*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16839*0 + 3*237*FLEN/8, x4, x1, x2)

inst_5614:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x28fffc00; valaddr_reg:x3; val_offset:16842*0 + 3*237*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16842*0 + 3*238*FLEN/8, x4, x1, x2)

inst_5615:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x28fffe00; valaddr_reg:x3; val_offset:16845*0 + 3*238*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16845*0 + 3*239*FLEN/8, x4, x1, x2)

inst_5616:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x28ffff00; valaddr_reg:x3; val_offset:16848*0 + 3*239*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16848*0 + 3*240*FLEN/8, x4, x1, x2)

inst_5617:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x28ffff80; valaddr_reg:x3; val_offset:16851*0 + 3*240*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16851*0 + 3*241*FLEN/8, x4, x1, x2)

inst_5618:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x28ffffc0; valaddr_reg:x3; val_offset:16854*0 + 3*241*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16854*0 + 3*242*FLEN/8, x4, x1, x2)

inst_5619:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x28ffffe0; valaddr_reg:x3; val_offset:16857*0 + 3*242*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16857*0 + 3*243*FLEN/8, x4, x1, x2)

inst_5620:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x28fffff0; valaddr_reg:x3; val_offset:16860*0 + 3*243*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16860*0 + 3*244*FLEN/8, x4, x1, x2)

inst_5621:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x28fffff8; valaddr_reg:x3; val_offset:16863*0 + 3*244*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16863*0 + 3*245*FLEN/8, x4, x1, x2)

inst_5622:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x28fffffc; valaddr_reg:x3; val_offset:16866*0 + 3*245*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16866*0 + 3*246*FLEN/8, x4, x1, x2)

inst_5623:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x28fffffe; valaddr_reg:x3; val_offset:16869*0 + 3*246*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16869*0 + 3*247*FLEN/8, x4, x1, x2)

inst_5624:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x28ffffff; valaddr_reg:x3; val_offset:16872*0 + 3*247*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16872*0 + 3*248*FLEN/8, x4, x1, x2)

inst_5625:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x3f800001; valaddr_reg:x3; val_offset:16875*0 + 3*248*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16875*0 + 3*249*FLEN/8, x4, x1, x2)

inst_5626:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x3f800003; valaddr_reg:x3; val_offset:16878*0 + 3*249*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16878*0 + 3*250*FLEN/8, x4, x1, x2)

inst_5627:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x3f800007; valaddr_reg:x3; val_offset:16881*0 + 3*250*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16881*0 + 3*251*FLEN/8, x4, x1, x2)

inst_5628:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x3f999999; valaddr_reg:x3; val_offset:16884*0 + 3*251*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16884*0 + 3*252*FLEN/8, x4, x1, x2)

inst_5629:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x3fa49249; valaddr_reg:x3; val_offset:16887*0 + 3*252*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16887*0 + 3*253*FLEN/8, x4, x1, x2)

inst_5630:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x3fb33333; valaddr_reg:x3; val_offset:16890*0 + 3*253*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16890*0 + 3*254*FLEN/8, x4, x1, x2)

inst_5631:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:16893*0 + 3*254*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16893*0 + 3*255*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_3)

inst_5632:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:16896*0 + 3*256*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16896*0 + 3*256*FLEN/8, x4, x1, x2)

inst_5633:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x3fc44444; valaddr_reg:x3; val_offset:16899*0 + 3*257*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16899*0 + 3*257*FLEN/8, x4, x1, x2)

inst_5634:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x3fcccccc; valaddr_reg:x3; val_offset:16902*0 + 3*258*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16902*0 + 3*258*FLEN/8, x4, x1, x2)

inst_5635:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:16905*0 + 3*259*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16905*0 + 3*259*FLEN/8, x4, x1, x2)

inst_5636:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x3fe66666; valaddr_reg:x3; val_offset:16908*0 + 3*260*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16908*0 + 3*260*FLEN/8, x4, x1, x2)

inst_5637:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x3fedb6db; valaddr_reg:x3; val_offset:16911*0 + 3*261*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16911*0 + 3*261*FLEN/8, x4, x1, x2)

inst_5638:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x3ffffff8; valaddr_reg:x3; val_offset:16914*0 + 3*262*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16914*0 + 3*262*FLEN/8, x4, x1, x2)

inst_5639:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x3ffffffc; valaddr_reg:x3; val_offset:16917*0 + 3*263*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16917*0 + 3*263*FLEN/8, x4, x1, x2)

inst_5640:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51a9f0 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x1c49cc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1a9f0; op2val:0x11c49cc;
op3val:0x3ffffffe; valaddr_reg:x3; val_offset:16920*0 + 3*264*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16920*0 + 3*264*FLEN/8, x4, x1, x2)

inst_5641:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:16923*0 + 3*265*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16923*0 + 3*265*FLEN/8, x4, x1, x2)

inst_5642:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:16926*0 + 3*266*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16926*0 + 3*266*FLEN/8, x4, x1, x2)

inst_5643:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:16929*0 + 3*267*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16929*0 + 3*267*FLEN/8, x4, x1, x2)

inst_5644:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0x199999; valaddr_reg:x3; val_offset:16932*0 + 3*268*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16932*0 + 3*268*FLEN/8, x4, x1, x2)

inst_5645:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0x249249; valaddr_reg:x3; val_offset:16935*0 + 3*269*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16935*0 + 3*269*FLEN/8, x4, x1, x2)

inst_5646:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0x333333; valaddr_reg:x3; val_offset:16938*0 + 3*270*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16938*0 + 3*270*FLEN/8, x4, x1, x2)

inst_5647:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0x36db6d; valaddr_reg:x3; val_offset:16941*0 + 3*271*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16941*0 + 3*271*FLEN/8, x4, x1, x2)

inst_5648:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0x3bbbbb; valaddr_reg:x3; val_offset:16944*0 + 3*272*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16944*0 + 3*272*FLEN/8, x4, x1, x2)

inst_5649:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0x444444; valaddr_reg:x3; val_offset:16947*0 + 3*273*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16947*0 + 3*273*FLEN/8, x4, x1, x2)

inst_5650:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0x4ccccc; valaddr_reg:x3; val_offset:16950*0 + 3*274*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16950*0 + 3*274*FLEN/8, x4, x1, x2)

inst_5651:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0x5b6db6; valaddr_reg:x3; val_offset:16953*0 + 3*275*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16953*0 + 3*275*FLEN/8, x4, x1, x2)

inst_5652:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0x666666; valaddr_reg:x3; val_offset:16956*0 + 3*276*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16956*0 + 3*276*FLEN/8, x4, x1, x2)

inst_5653:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0x6db6db; valaddr_reg:x3; val_offset:16959*0 + 3*277*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16959*0 + 3*277*FLEN/8, x4, x1, x2)

inst_5654:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0x7ffff8; valaddr_reg:x3; val_offset:16962*0 + 3*278*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16962*0 + 3*278*FLEN/8, x4, x1, x2)

inst_5655:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0x7ffffc; valaddr_reg:x3; val_offset:16965*0 + 3*279*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16965*0 + 3*279*FLEN/8, x4, x1, x2)

inst_5656:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0x7ffffe; valaddr_reg:x3; val_offset:16968*0 + 3*280*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16968*0 + 3*280*FLEN/8, x4, x1, x2)

inst_5657:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe000000; valaddr_reg:x3; val_offset:16971*0 + 3*281*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16971*0 + 3*281*FLEN/8, x4, x1, x2)

inst_5658:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe000001; valaddr_reg:x3; val_offset:16974*0 + 3*282*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16974*0 + 3*282*FLEN/8, x4, x1, x2)

inst_5659:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe000003; valaddr_reg:x3; val_offset:16977*0 + 3*283*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16977*0 + 3*283*FLEN/8, x4, x1, x2)

inst_5660:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe000007; valaddr_reg:x3; val_offset:16980*0 + 3*284*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16980*0 + 3*284*FLEN/8, x4, x1, x2)

inst_5661:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe00000f; valaddr_reg:x3; val_offset:16983*0 + 3*285*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16983*0 + 3*285*FLEN/8, x4, x1, x2)

inst_5662:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe00001f; valaddr_reg:x3; val_offset:16986*0 + 3*286*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16986*0 + 3*286*FLEN/8, x4, x1, x2)

inst_5663:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe00003f; valaddr_reg:x3; val_offset:16989*0 + 3*287*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16989*0 + 3*287*FLEN/8, x4, x1, x2)

inst_5664:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe00007f; valaddr_reg:x3; val_offset:16992*0 + 3*288*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16992*0 + 3*288*FLEN/8, x4, x1, x2)

inst_5665:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe0000ff; valaddr_reg:x3; val_offset:16995*0 + 3*289*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16995*0 + 3*289*FLEN/8, x4, x1, x2)

inst_5666:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe0001ff; valaddr_reg:x3; val_offset:16998*0 + 3*290*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16998*0 + 3*290*FLEN/8, x4, x1, x2)

inst_5667:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe0003ff; valaddr_reg:x3; val_offset:17001*0 + 3*291*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17001*0 + 3*291*FLEN/8, x4, x1, x2)

inst_5668:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe0007ff; valaddr_reg:x3; val_offset:17004*0 + 3*292*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17004*0 + 3*292*FLEN/8, x4, x1, x2)

inst_5669:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe000fff; valaddr_reg:x3; val_offset:17007*0 + 3*293*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17007*0 + 3*293*FLEN/8, x4, x1, x2)

inst_5670:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe001fff; valaddr_reg:x3; val_offset:17010*0 + 3*294*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17010*0 + 3*294*FLEN/8, x4, x1, x2)

inst_5671:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe003fff; valaddr_reg:x3; val_offset:17013*0 + 3*295*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17013*0 + 3*295*FLEN/8, x4, x1, x2)

inst_5672:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe007fff; valaddr_reg:x3; val_offset:17016*0 + 3*296*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17016*0 + 3*296*FLEN/8, x4, x1, x2)

inst_5673:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe00ffff; valaddr_reg:x3; val_offset:17019*0 + 3*297*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17019*0 + 3*297*FLEN/8, x4, x1, x2)

inst_5674:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe01ffff; valaddr_reg:x3; val_offset:17022*0 + 3*298*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17022*0 + 3*298*FLEN/8, x4, x1, x2)

inst_5675:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe03ffff; valaddr_reg:x3; val_offset:17025*0 + 3*299*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17025*0 + 3*299*FLEN/8, x4, x1, x2)

inst_5676:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe07ffff; valaddr_reg:x3; val_offset:17028*0 + 3*300*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17028*0 + 3*300*FLEN/8, x4, x1, x2)

inst_5677:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe0fffff; valaddr_reg:x3; val_offset:17031*0 + 3*301*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17031*0 + 3*301*FLEN/8, x4, x1, x2)

inst_5678:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe1fffff; valaddr_reg:x3; val_offset:17034*0 + 3*302*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17034*0 + 3*302*FLEN/8, x4, x1, x2)

inst_5679:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe3fffff; valaddr_reg:x3; val_offset:17037*0 + 3*303*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17037*0 + 3*303*FLEN/8, x4, x1, x2)

inst_5680:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe400000; valaddr_reg:x3; val_offset:17040*0 + 3*304*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17040*0 + 3*304*FLEN/8, x4, x1, x2)

inst_5681:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe600000; valaddr_reg:x3; val_offset:17043*0 + 3*305*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17043*0 + 3*305*FLEN/8, x4, x1, x2)

inst_5682:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe700000; valaddr_reg:x3; val_offset:17046*0 + 3*306*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17046*0 + 3*306*FLEN/8, x4, x1, x2)

inst_5683:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe780000; valaddr_reg:x3; val_offset:17049*0 + 3*307*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17049*0 + 3*307*FLEN/8, x4, x1, x2)

inst_5684:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe7c0000; valaddr_reg:x3; val_offset:17052*0 + 3*308*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17052*0 + 3*308*FLEN/8, x4, x1, x2)

inst_5685:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe7e0000; valaddr_reg:x3; val_offset:17055*0 + 3*309*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17055*0 + 3*309*FLEN/8, x4, x1, x2)

inst_5686:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe7f0000; valaddr_reg:x3; val_offset:17058*0 + 3*310*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17058*0 + 3*310*FLEN/8, x4, x1, x2)

inst_5687:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe7f8000; valaddr_reg:x3; val_offset:17061*0 + 3*311*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17061*0 + 3*311*FLEN/8, x4, x1, x2)

inst_5688:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe7fc000; valaddr_reg:x3; val_offset:17064*0 + 3*312*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17064*0 + 3*312*FLEN/8, x4, x1, x2)

inst_5689:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe7fe000; valaddr_reg:x3; val_offset:17067*0 + 3*313*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17067*0 + 3*313*FLEN/8, x4, x1, x2)

inst_5690:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe7ff000; valaddr_reg:x3; val_offset:17070*0 + 3*314*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17070*0 + 3*314*FLEN/8, x4, x1, x2)

inst_5691:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe7ff800; valaddr_reg:x3; val_offset:17073*0 + 3*315*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17073*0 + 3*315*FLEN/8, x4, x1, x2)

inst_5692:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe7ffc00; valaddr_reg:x3; val_offset:17076*0 + 3*316*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17076*0 + 3*316*FLEN/8, x4, x1, x2)

inst_5693:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe7ffe00; valaddr_reg:x3; val_offset:17079*0 + 3*317*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17079*0 + 3*317*FLEN/8, x4, x1, x2)

inst_5694:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe7fff00; valaddr_reg:x3; val_offset:17082*0 + 3*318*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17082*0 + 3*318*FLEN/8, x4, x1, x2)

inst_5695:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe7fff80; valaddr_reg:x3; val_offset:17085*0 + 3*319*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17085*0 + 3*319*FLEN/8, x4, x1, x2)

inst_5696:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe7fffc0; valaddr_reg:x3; val_offset:17088*0 + 3*320*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17088*0 + 3*320*FLEN/8, x4, x1, x2)

inst_5697:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe7fffe0; valaddr_reg:x3; val_offset:17091*0 + 3*321*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17091*0 + 3*321*FLEN/8, x4, x1, x2)

inst_5698:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe7ffff0; valaddr_reg:x3; val_offset:17094*0 + 3*322*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17094*0 + 3*322*FLEN/8, x4, x1, x2)

inst_5699:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe7ffff8; valaddr_reg:x3; val_offset:17097*0 + 3*323*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17097*0 + 3*323*FLEN/8, x4, x1, x2)

inst_5700:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe7ffffc; valaddr_reg:x3; val_offset:17100*0 + 3*324*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17100*0 + 3*324*FLEN/8, x4, x1, x2)

inst_5701:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe7ffffe; valaddr_reg:x3; val_offset:17103*0 + 3*325*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17103*0 + 3*325*FLEN/8, x4, x1, x2)

inst_5702:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xe7fffff; valaddr_reg:x3; val_offset:17106*0 + 3*326*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17106*0 + 3*326*FLEN/8, x4, x1, x2)

inst_5703:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe8000000; valaddr_reg:x3; val_offset:17109*0 + 3*327*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17109*0 + 3*327*FLEN/8, x4, x1, x2)

inst_5704:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe8000001; valaddr_reg:x3; val_offset:17112*0 + 3*328*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17112*0 + 3*328*FLEN/8, x4, x1, x2)

inst_5705:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe8000003; valaddr_reg:x3; val_offset:17115*0 + 3*329*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17115*0 + 3*329*FLEN/8, x4, x1, x2)

inst_5706:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe8000007; valaddr_reg:x3; val_offset:17118*0 + 3*330*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17118*0 + 3*330*FLEN/8, x4, x1, x2)

inst_5707:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe800000f; valaddr_reg:x3; val_offset:17121*0 + 3*331*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17121*0 + 3*331*FLEN/8, x4, x1, x2)

inst_5708:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe800001f; valaddr_reg:x3; val_offset:17124*0 + 3*332*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17124*0 + 3*332*FLEN/8, x4, x1, x2)

inst_5709:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe800003f; valaddr_reg:x3; val_offset:17127*0 + 3*333*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17127*0 + 3*333*FLEN/8, x4, x1, x2)

inst_5710:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe800007f; valaddr_reg:x3; val_offset:17130*0 + 3*334*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17130*0 + 3*334*FLEN/8, x4, x1, x2)

inst_5711:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe80000ff; valaddr_reg:x3; val_offset:17133*0 + 3*335*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17133*0 + 3*335*FLEN/8, x4, x1, x2)

inst_5712:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe80001ff; valaddr_reg:x3; val_offset:17136*0 + 3*336*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17136*0 + 3*336*FLEN/8, x4, x1, x2)

inst_5713:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe80003ff; valaddr_reg:x3; val_offset:17139*0 + 3*337*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17139*0 + 3*337*FLEN/8, x4, x1, x2)

inst_5714:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe80007ff; valaddr_reg:x3; val_offset:17142*0 + 3*338*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17142*0 + 3*338*FLEN/8, x4, x1, x2)

inst_5715:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe8000fff; valaddr_reg:x3; val_offset:17145*0 + 3*339*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17145*0 + 3*339*FLEN/8, x4, x1, x2)

inst_5716:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe8001fff; valaddr_reg:x3; val_offset:17148*0 + 3*340*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17148*0 + 3*340*FLEN/8, x4, x1, x2)

inst_5717:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe8003fff; valaddr_reg:x3; val_offset:17151*0 + 3*341*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17151*0 + 3*341*FLEN/8, x4, x1, x2)

inst_5718:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe8007fff; valaddr_reg:x3; val_offset:17154*0 + 3*342*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17154*0 + 3*342*FLEN/8, x4, x1, x2)

inst_5719:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe800ffff; valaddr_reg:x3; val_offset:17157*0 + 3*343*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17157*0 + 3*343*FLEN/8, x4, x1, x2)

inst_5720:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe801ffff; valaddr_reg:x3; val_offset:17160*0 + 3*344*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17160*0 + 3*344*FLEN/8, x4, x1, x2)

inst_5721:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe803ffff; valaddr_reg:x3; val_offset:17163*0 + 3*345*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17163*0 + 3*345*FLEN/8, x4, x1, x2)

inst_5722:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe807ffff; valaddr_reg:x3; val_offset:17166*0 + 3*346*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17166*0 + 3*346*FLEN/8, x4, x1, x2)

inst_5723:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe80fffff; valaddr_reg:x3; val_offset:17169*0 + 3*347*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17169*0 + 3*347*FLEN/8, x4, x1, x2)

inst_5724:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe81fffff; valaddr_reg:x3; val_offset:17172*0 + 3*348*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17172*0 + 3*348*FLEN/8, x4, x1, x2)

inst_5725:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe83fffff; valaddr_reg:x3; val_offset:17175*0 + 3*349*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17175*0 + 3*349*FLEN/8, x4, x1, x2)

inst_5726:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe8400000; valaddr_reg:x3; val_offset:17178*0 + 3*350*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17178*0 + 3*350*FLEN/8, x4, x1, x2)

inst_5727:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe8600000; valaddr_reg:x3; val_offset:17181*0 + 3*351*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17181*0 + 3*351*FLEN/8, x4, x1, x2)

inst_5728:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe8700000; valaddr_reg:x3; val_offset:17184*0 + 3*352*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17184*0 + 3*352*FLEN/8, x4, x1, x2)

inst_5729:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe8780000; valaddr_reg:x3; val_offset:17187*0 + 3*353*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17187*0 + 3*353*FLEN/8, x4, x1, x2)

inst_5730:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe87c0000; valaddr_reg:x3; val_offset:17190*0 + 3*354*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17190*0 + 3*354*FLEN/8, x4, x1, x2)

inst_5731:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe87e0000; valaddr_reg:x3; val_offset:17193*0 + 3*355*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17193*0 + 3*355*FLEN/8, x4, x1, x2)

inst_5732:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe87f0000; valaddr_reg:x3; val_offset:17196*0 + 3*356*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17196*0 + 3*356*FLEN/8, x4, x1, x2)

inst_5733:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe87f8000; valaddr_reg:x3; val_offset:17199*0 + 3*357*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17199*0 + 3*357*FLEN/8, x4, x1, x2)

inst_5734:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe87fc000; valaddr_reg:x3; val_offset:17202*0 + 3*358*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17202*0 + 3*358*FLEN/8, x4, x1, x2)

inst_5735:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe87fe000; valaddr_reg:x3; val_offset:17205*0 + 3*359*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17205*0 + 3*359*FLEN/8, x4, x1, x2)

inst_5736:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe87ff000; valaddr_reg:x3; val_offset:17208*0 + 3*360*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17208*0 + 3*360*FLEN/8, x4, x1, x2)

inst_5737:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe87ff800; valaddr_reg:x3; val_offset:17211*0 + 3*361*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17211*0 + 3*361*FLEN/8, x4, x1, x2)

inst_5738:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe87ffc00; valaddr_reg:x3; val_offset:17214*0 + 3*362*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17214*0 + 3*362*FLEN/8, x4, x1, x2)

inst_5739:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe87ffe00; valaddr_reg:x3; val_offset:17217*0 + 3*363*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17217*0 + 3*363*FLEN/8, x4, x1, x2)

inst_5740:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe87fff00; valaddr_reg:x3; val_offset:17220*0 + 3*364*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17220*0 + 3*364*FLEN/8, x4, x1, x2)

inst_5741:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe87fff80; valaddr_reg:x3; val_offset:17223*0 + 3*365*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17223*0 + 3*365*FLEN/8, x4, x1, x2)

inst_5742:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe87fffc0; valaddr_reg:x3; val_offset:17226*0 + 3*366*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17226*0 + 3*366*FLEN/8, x4, x1, x2)

inst_5743:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe87fffe0; valaddr_reg:x3; val_offset:17229*0 + 3*367*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17229*0 + 3*367*FLEN/8, x4, x1, x2)

inst_5744:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe87ffff0; valaddr_reg:x3; val_offset:17232*0 + 3*368*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17232*0 + 3*368*FLEN/8, x4, x1, x2)

inst_5745:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe87ffff8; valaddr_reg:x3; val_offset:17235*0 + 3*369*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17235*0 + 3*369*FLEN/8, x4, x1, x2)

inst_5746:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe87ffffc; valaddr_reg:x3; val_offset:17238*0 + 3*370*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17238*0 + 3*370*FLEN/8, x4, x1, x2)

inst_5747:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe87ffffe; valaddr_reg:x3; val_offset:17241*0 + 3*371*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17241*0 + 3*371*FLEN/8, x4, x1, x2)

inst_5748:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xe87fffff; valaddr_reg:x3; val_offset:17244*0 + 3*372*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17244*0 + 3*372*FLEN/8, x4, x1, x2)

inst_5749:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xff000001; valaddr_reg:x3; val_offset:17247*0 + 3*373*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17247*0 + 3*373*FLEN/8, x4, x1, x2)

inst_5750:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xff000003; valaddr_reg:x3; val_offset:17250*0 + 3*374*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17250*0 + 3*374*FLEN/8, x4, x1, x2)

inst_5751:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xff000007; valaddr_reg:x3; val_offset:17253*0 + 3*375*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17253*0 + 3*375*FLEN/8, x4, x1, x2)

inst_5752:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xff199999; valaddr_reg:x3; val_offset:17256*0 + 3*376*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17256*0 + 3*376*FLEN/8, x4, x1, x2)

inst_5753:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xff249249; valaddr_reg:x3; val_offset:17259*0 + 3*377*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17259*0 + 3*377*FLEN/8, x4, x1, x2)

inst_5754:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xff333333; valaddr_reg:x3; val_offset:17262*0 + 3*378*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17262*0 + 3*378*FLEN/8, x4, x1, x2)

inst_5755:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xff36db6d; valaddr_reg:x3; val_offset:17265*0 + 3*379*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17265*0 + 3*379*FLEN/8, x4, x1, x2)

inst_5756:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:17268*0 + 3*380*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17268*0 + 3*380*FLEN/8, x4, x1, x2)

inst_5757:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xff444444; valaddr_reg:x3; val_offset:17271*0 + 3*381*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17271*0 + 3*381*FLEN/8, x4, x1, x2)

inst_5758:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xff4ccccc; valaddr_reg:x3; val_offset:17274*0 + 3*382*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17274*0 + 3*382*FLEN/8, x4, x1, x2)

inst_5759:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xff5b6db6; valaddr_reg:x3; val_offset:17277*0 + 3*383*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17277*0 + 3*383*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_4)

inst_5760:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xff666666; valaddr_reg:x3; val_offset:17280*0 + 3*384*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17280*0 + 3*384*FLEN/8, x4, x1, x2)

inst_5761:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xff6db6db; valaddr_reg:x3; val_offset:17283*0 + 3*385*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17283*0 + 3*385*FLEN/8, x4, x1, x2)

inst_5762:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xff7ffff8; valaddr_reg:x3; val_offset:17286*0 + 3*386*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17286*0 + 3*386*FLEN/8, x4, x1, x2)

inst_5763:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xff7ffffc; valaddr_reg:x3; val_offset:17289*0 + 3*387*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17289*0 + 3*387*FLEN/8, x4, x1, x2)

inst_5764:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x536007 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1b05e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd36007; op2val:0xc11b05e1;
op3val:0xff7ffffe; valaddr_reg:x3; val_offset:17292*0 + 3*388*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17292*0 + 3*388*FLEN/8, x4, x1, x2)

inst_5765:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec000000; valaddr_reg:x3; val_offset:17295*0 + 3*389*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17295*0 + 3*389*FLEN/8, x4, x1, x2)

inst_5766:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec000001; valaddr_reg:x3; val_offset:17298*0 + 3*390*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17298*0 + 3*390*FLEN/8, x4, x1, x2)

inst_5767:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec000003; valaddr_reg:x3; val_offset:17301*0 + 3*391*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17301*0 + 3*391*FLEN/8, x4, x1, x2)

inst_5768:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec000007; valaddr_reg:x3; val_offset:17304*0 + 3*392*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17304*0 + 3*392*FLEN/8, x4, x1, x2)

inst_5769:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec00000f; valaddr_reg:x3; val_offset:17307*0 + 3*393*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17307*0 + 3*393*FLEN/8, x4, x1, x2)

inst_5770:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec00001f; valaddr_reg:x3; val_offset:17310*0 + 3*394*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17310*0 + 3*394*FLEN/8, x4, x1, x2)

inst_5771:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec00003f; valaddr_reg:x3; val_offset:17313*0 + 3*395*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17313*0 + 3*395*FLEN/8, x4, x1, x2)

inst_5772:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec00007f; valaddr_reg:x3; val_offset:17316*0 + 3*396*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17316*0 + 3*396*FLEN/8, x4, x1, x2)

inst_5773:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec0000ff; valaddr_reg:x3; val_offset:17319*0 + 3*397*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17319*0 + 3*397*FLEN/8, x4, x1, x2)

inst_5774:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec0001ff; valaddr_reg:x3; val_offset:17322*0 + 3*398*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17322*0 + 3*398*FLEN/8, x4, x1, x2)

inst_5775:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec0003ff; valaddr_reg:x3; val_offset:17325*0 + 3*399*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17325*0 + 3*399*FLEN/8, x4, x1, x2)

inst_5776:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec0007ff; valaddr_reg:x3; val_offset:17328*0 + 3*400*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17328*0 + 3*400*FLEN/8, x4, x1, x2)

inst_5777:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec000fff; valaddr_reg:x3; val_offset:17331*0 + 3*401*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17331*0 + 3*401*FLEN/8, x4, x1, x2)

inst_5778:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec001fff; valaddr_reg:x3; val_offset:17334*0 + 3*402*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17334*0 + 3*402*FLEN/8, x4, x1, x2)

inst_5779:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec003fff; valaddr_reg:x3; val_offset:17337*0 + 3*403*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17337*0 + 3*403*FLEN/8, x4, x1, x2)

inst_5780:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec007fff; valaddr_reg:x3; val_offset:17340*0 + 3*404*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17340*0 + 3*404*FLEN/8, x4, x1, x2)

inst_5781:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec00ffff; valaddr_reg:x3; val_offset:17343*0 + 3*405*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17343*0 + 3*405*FLEN/8, x4, x1, x2)

inst_5782:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec01ffff; valaddr_reg:x3; val_offset:17346*0 + 3*406*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17346*0 + 3*406*FLEN/8, x4, x1, x2)

inst_5783:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec03ffff; valaddr_reg:x3; val_offset:17349*0 + 3*407*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17349*0 + 3*407*FLEN/8, x4, x1, x2)

inst_5784:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec07ffff; valaddr_reg:x3; val_offset:17352*0 + 3*408*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17352*0 + 3*408*FLEN/8, x4, x1, x2)

inst_5785:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec0fffff; valaddr_reg:x3; val_offset:17355*0 + 3*409*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17355*0 + 3*409*FLEN/8, x4, x1, x2)

inst_5786:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec1fffff; valaddr_reg:x3; val_offset:17358*0 + 3*410*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17358*0 + 3*410*FLEN/8, x4, x1, x2)

inst_5787:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec3fffff; valaddr_reg:x3; val_offset:17361*0 + 3*411*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17361*0 + 3*411*FLEN/8, x4, x1, x2)

inst_5788:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec400000; valaddr_reg:x3; val_offset:17364*0 + 3*412*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17364*0 + 3*412*FLEN/8, x4, x1, x2)

inst_5789:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec600000; valaddr_reg:x3; val_offset:17367*0 + 3*413*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17367*0 + 3*413*FLEN/8, x4, x1, x2)

inst_5790:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec700000; valaddr_reg:x3; val_offset:17370*0 + 3*414*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17370*0 + 3*414*FLEN/8, x4, x1, x2)

inst_5791:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec780000; valaddr_reg:x3; val_offset:17373*0 + 3*415*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17373*0 + 3*415*FLEN/8, x4, x1, x2)

inst_5792:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec7c0000; valaddr_reg:x3; val_offset:17376*0 + 3*416*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17376*0 + 3*416*FLEN/8, x4, x1, x2)

inst_5793:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec7e0000; valaddr_reg:x3; val_offset:17379*0 + 3*417*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17379*0 + 3*417*FLEN/8, x4, x1, x2)

inst_5794:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec7f0000; valaddr_reg:x3; val_offset:17382*0 + 3*418*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17382*0 + 3*418*FLEN/8, x4, x1, x2)

inst_5795:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec7f8000; valaddr_reg:x3; val_offset:17385*0 + 3*419*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17385*0 + 3*419*FLEN/8, x4, x1, x2)

inst_5796:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec7fc000; valaddr_reg:x3; val_offset:17388*0 + 3*420*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17388*0 + 3*420*FLEN/8, x4, x1, x2)

inst_5797:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec7fe000; valaddr_reg:x3; val_offset:17391*0 + 3*421*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17391*0 + 3*421*FLEN/8, x4, x1, x2)

inst_5798:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec7ff000; valaddr_reg:x3; val_offset:17394*0 + 3*422*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17394*0 + 3*422*FLEN/8, x4, x1, x2)

inst_5799:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec7ff800; valaddr_reg:x3; val_offset:17397*0 + 3*423*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17397*0 + 3*423*FLEN/8, x4, x1, x2)

inst_5800:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec7ffc00; valaddr_reg:x3; val_offset:17400*0 + 3*424*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17400*0 + 3*424*FLEN/8, x4, x1, x2)

inst_5801:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec7ffe00; valaddr_reg:x3; val_offset:17403*0 + 3*425*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17403*0 + 3*425*FLEN/8, x4, x1, x2)

inst_5802:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec7fff00; valaddr_reg:x3; val_offset:17406*0 + 3*426*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17406*0 + 3*426*FLEN/8, x4, x1, x2)

inst_5803:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec7fff80; valaddr_reg:x3; val_offset:17409*0 + 3*427*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17409*0 + 3*427*FLEN/8, x4, x1, x2)

inst_5804:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec7fffc0; valaddr_reg:x3; val_offset:17412*0 + 3*428*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17412*0 + 3*428*FLEN/8, x4, x1, x2)

inst_5805:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec7fffe0; valaddr_reg:x3; val_offset:17415*0 + 3*429*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17415*0 + 3*429*FLEN/8, x4, x1, x2)

inst_5806:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec7ffff0; valaddr_reg:x3; val_offset:17418*0 + 3*430*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17418*0 + 3*430*FLEN/8, x4, x1, x2)

inst_5807:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec7ffff8; valaddr_reg:x3; val_offset:17421*0 + 3*431*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17421*0 + 3*431*FLEN/8, x4, x1, x2)

inst_5808:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec7ffffc; valaddr_reg:x3; val_offset:17424*0 + 3*432*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17424*0 + 3*432*FLEN/8, x4, x1, x2)

inst_5809:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec7ffffe; valaddr_reg:x3; val_offset:17427*0 + 3*433*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17427*0 + 3*433*FLEN/8, x4, x1, x2)

inst_5810:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xec7fffff; valaddr_reg:x3; val_offset:17430*0 + 3*434*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17430*0 + 3*434*FLEN/8, x4, x1, x2)

inst_5811:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xff000001; valaddr_reg:x3; val_offset:17433*0 + 3*435*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17433*0 + 3*435*FLEN/8, x4, x1, x2)

inst_5812:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xff000003; valaddr_reg:x3; val_offset:17436*0 + 3*436*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17436*0 + 3*436*FLEN/8, x4, x1, x2)

inst_5813:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xff000007; valaddr_reg:x3; val_offset:17439*0 + 3*437*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17439*0 + 3*437*FLEN/8, x4, x1, x2)

inst_5814:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xff199999; valaddr_reg:x3; val_offset:17442*0 + 3*438*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17442*0 + 3*438*FLEN/8, x4, x1, x2)

inst_5815:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xff249249; valaddr_reg:x3; val_offset:17445*0 + 3*439*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17445*0 + 3*439*FLEN/8, x4, x1, x2)

inst_5816:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xff333333; valaddr_reg:x3; val_offset:17448*0 + 3*440*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17448*0 + 3*440*FLEN/8, x4, x1, x2)

inst_5817:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xff36db6d; valaddr_reg:x3; val_offset:17451*0 + 3*441*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17451*0 + 3*441*FLEN/8, x4, x1, x2)

inst_5818:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:17454*0 + 3*442*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17454*0 + 3*442*FLEN/8, x4, x1, x2)

inst_5819:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xff444444; valaddr_reg:x3; val_offset:17457*0 + 3*443*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17457*0 + 3*443*FLEN/8, x4, x1, x2)

inst_5820:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xff4ccccc; valaddr_reg:x3; val_offset:17460*0 + 3*444*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17460*0 + 3*444*FLEN/8, x4, x1, x2)

inst_5821:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xff5b6db6; valaddr_reg:x3; val_offset:17463*0 + 3*445*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17463*0 + 3*445*FLEN/8, x4, x1, x2)

inst_5822:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xff666666; valaddr_reg:x3; val_offset:17466*0 + 3*446*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17466*0 + 3*446*FLEN/8, x4, x1, x2)

inst_5823:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xff6db6db; valaddr_reg:x3; val_offset:17469*0 + 3*447*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17469*0 + 3*447*FLEN/8, x4, x1, x2)

inst_5824:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xff7ffff8; valaddr_reg:x3; val_offset:17472*0 + 3*448*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17472*0 + 3*448*FLEN/8, x4, x1, x2)

inst_5825:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xff7ffffc; valaddr_reg:x3; val_offset:17475*0 + 3*449*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17475*0 + 3*449*FLEN/8, x4, x1, x2)

inst_5826:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x541e75 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x1a7ab5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd41e75; op2val:0xc11a7ab5;
op3val:0xff7ffffe; valaddr_reg:x3; val_offset:17478*0 + 3*450*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17478*0 + 3*450*FLEN/8, x4, x1, x2)

inst_5827:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x75000000; valaddr_reg:x3; val_offset:17481*0 + 3*451*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17481*0 + 3*451*FLEN/8, x4, x1, x2)

inst_5828:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x75000001; valaddr_reg:x3; val_offset:17484*0 + 3*452*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17484*0 + 3*452*FLEN/8, x4, x1, x2)

inst_5829:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x75000003; valaddr_reg:x3; val_offset:17487*0 + 3*453*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17487*0 + 3*453*FLEN/8, x4, x1, x2)

inst_5830:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x75000007; valaddr_reg:x3; val_offset:17490*0 + 3*454*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17490*0 + 3*454*FLEN/8, x4, x1, x2)

inst_5831:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x7500000f; valaddr_reg:x3; val_offset:17493*0 + 3*455*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17493*0 + 3*455*FLEN/8, x4, x1, x2)

inst_5832:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x7500001f; valaddr_reg:x3; val_offset:17496*0 + 3*456*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17496*0 + 3*456*FLEN/8, x4, x1, x2)

inst_5833:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x7500003f; valaddr_reg:x3; val_offset:17499*0 + 3*457*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17499*0 + 3*457*FLEN/8, x4, x1, x2)

inst_5834:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x7500007f; valaddr_reg:x3; val_offset:17502*0 + 3*458*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17502*0 + 3*458*FLEN/8, x4, x1, x2)

inst_5835:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x750000ff; valaddr_reg:x3; val_offset:17505*0 + 3*459*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17505*0 + 3*459*FLEN/8, x4, x1, x2)

inst_5836:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x750001ff; valaddr_reg:x3; val_offset:17508*0 + 3*460*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17508*0 + 3*460*FLEN/8, x4, x1, x2)

inst_5837:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x750003ff; valaddr_reg:x3; val_offset:17511*0 + 3*461*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17511*0 + 3*461*FLEN/8, x4, x1, x2)

inst_5838:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x750007ff; valaddr_reg:x3; val_offset:17514*0 + 3*462*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17514*0 + 3*462*FLEN/8, x4, x1, x2)

inst_5839:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x75000fff; valaddr_reg:x3; val_offset:17517*0 + 3*463*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17517*0 + 3*463*FLEN/8, x4, x1, x2)

inst_5840:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x75001fff; valaddr_reg:x3; val_offset:17520*0 + 3*464*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17520*0 + 3*464*FLEN/8, x4, x1, x2)

inst_5841:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x75003fff; valaddr_reg:x3; val_offset:17523*0 + 3*465*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17523*0 + 3*465*FLEN/8, x4, x1, x2)

inst_5842:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x75007fff; valaddr_reg:x3; val_offset:17526*0 + 3*466*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17526*0 + 3*466*FLEN/8, x4, x1, x2)

inst_5843:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x7500ffff; valaddr_reg:x3; val_offset:17529*0 + 3*467*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17529*0 + 3*467*FLEN/8, x4, x1, x2)

inst_5844:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x7501ffff; valaddr_reg:x3; val_offset:17532*0 + 3*468*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17532*0 + 3*468*FLEN/8, x4, x1, x2)

inst_5845:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x7503ffff; valaddr_reg:x3; val_offset:17535*0 + 3*469*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17535*0 + 3*469*FLEN/8, x4, x1, x2)

inst_5846:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x7507ffff; valaddr_reg:x3; val_offset:17538*0 + 3*470*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17538*0 + 3*470*FLEN/8, x4, x1, x2)

inst_5847:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x750fffff; valaddr_reg:x3; val_offset:17541*0 + 3*471*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17541*0 + 3*471*FLEN/8, x4, x1, x2)

inst_5848:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x751fffff; valaddr_reg:x3; val_offset:17544*0 + 3*472*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17544*0 + 3*472*FLEN/8, x4, x1, x2)

inst_5849:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x753fffff; valaddr_reg:x3; val_offset:17547*0 + 3*473*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17547*0 + 3*473*FLEN/8, x4, x1, x2)

inst_5850:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x75400000; valaddr_reg:x3; val_offset:17550*0 + 3*474*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17550*0 + 3*474*FLEN/8, x4, x1, x2)

inst_5851:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x75600000; valaddr_reg:x3; val_offset:17553*0 + 3*475*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17553*0 + 3*475*FLEN/8, x4, x1, x2)

inst_5852:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x75700000; valaddr_reg:x3; val_offset:17556*0 + 3*476*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17556*0 + 3*476*FLEN/8, x4, x1, x2)

inst_5853:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x75780000; valaddr_reg:x3; val_offset:17559*0 + 3*477*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17559*0 + 3*477*FLEN/8, x4, x1, x2)

inst_5854:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x757c0000; valaddr_reg:x3; val_offset:17562*0 + 3*478*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17562*0 + 3*478*FLEN/8, x4, x1, x2)

inst_5855:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x757e0000; valaddr_reg:x3; val_offset:17565*0 + 3*479*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17565*0 + 3*479*FLEN/8, x4, x1, x2)

inst_5856:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x757f0000; valaddr_reg:x3; val_offset:17568*0 + 3*480*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17568*0 + 3*480*FLEN/8, x4, x1, x2)

inst_5857:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x757f8000; valaddr_reg:x3; val_offset:17571*0 + 3*481*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17571*0 + 3*481*FLEN/8, x4, x1, x2)

inst_5858:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x757fc000; valaddr_reg:x3; val_offset:17574*0 + 3*482*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17574*0 + 3*482*FLEN/8, x4, x1, x2)

inst_5859:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x757fe000; valaddr_reg:x3; val_offset:17577*0 + 3*483*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17577*0 + 3*483*FLEN/8, x4, x1, x2)

inst_5860:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x757ff000; valaddr_reg:x3; val_offset:17580*0 + 3*484*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17580*0 + 3*484*FLEN/8, x4, x1, x2)

inst_5861:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x757ff800; valaddr_reg:x3; val_offset:17583*0 + 3*485*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17583*0 + 3*485*FLEN/8, x4, x1, x2)

inst_5862:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x757ffc00; valaddr_reg:x3; val_offset:17586*0 + 3*486*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17586*0 + 3*486*FLEN/8, x4, x1, x2)

inst_5863:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x757ffe00; valaddr_reg:x3; val_offset:17589*0 + 3*487*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17589*0 + 3*487*FLEN/8, x4, x1, x2)

inst_5864:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x757fff00; valaddr_reg:x3; val_offset:17592*0 + 3*488*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17592*0 + 3*488*FLEN/8, x4, x1, x2)

inst_5865:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x757fff80; valaddr_reg:x3; val_offset:17595*0 + 3*489*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17595*0 + 3*489*FLEN/8, x4, x1, x2)

inst_5866:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x757fffc0; valaddr_reg:x3; val_offset:17598*0 + 3*490*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17598*0 + 3*490*FLEN/8, x4, x1, x2)

inst_5867:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x757fffe0; valaddr_reg:x3; val_offset:17601*0 + 3*491*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17601*0 + 3*491*FLEN/8, x4, x1, x2)

inst_5868:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x757ffff0; valaddr_reg:x3; val_offset:17604*0 + 3*492*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17604*0 + 3*492*FLEN/8, x4, x1, x2)

inst_5869:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x757ffff8; valaddr_reg:x3; val_offset:17607*0 + 3*493*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17607*0 + 3*493*FLEN/8, x4, x1, x2)

inst_5870:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x757ffffc; valaddr_reg:x3; val_offset:17610*0 + 3*494*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17610*0 + 3*494*FLEN/8, x4, x1, x2)

inst_5871:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x757ffffe; valaddr_reg:x3; val_offset:17613*0 + 3*495*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17613*0 + 3*495*FLEN/8, x4, x1, x2)

inst_5872:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x757fffff; valaddr_reg:x3; val_offset:17616*0 + 3*496*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17616*0 + 3*496*FLEN/8, x4, x1, x2)

inst_5873:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x7f000001; valaddr_reg:x3; val_offset:17619*0 + 3*497*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17619*0 + 3*497*FLEN/8, x4, x1, x2)

inst_5874:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x7f000003; valaddr_reg:x3; val_offset:17622*0 + 3*498*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17622*0 + 3*498*FLEN/8, x4, x1, x2)

inst_5875:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x7f000007; valaddr_reg:x3; val_offset:17625*0 + 3*499*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17625*0 + 3*499*FLEN/8, x4, x1, x2)

inst_5876:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x7f199999; valaddr_reg:x3; val_offset:17628*0 + 3*500*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17628*0 + 3*500*FLEN/8, x4, x1, x2)

inst_5877:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x7f249249; valaddr_reg:x3; val_offset:17631*0 + 3*501*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17631*0 + 3*501*FLEN/8, x4, x1, x2)

inst_5878:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x7f333333; valaddr_reg:x3; val_offset:17634*0 + 3*502*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17634*0 + 3*502*FLEN/8, x4, x1, x2)

inst_5879:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x7f36db6d; valaddr_reg:x3; val_offset:17637*0 + 3*503*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17637*0 + 3*503*FLEN/8, x4, x1, x2)

inst_5880:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:17640*0 + 3*504*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17640*0 + 3*504*FLEN/8, x4, x1, x2)

inst_5881:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x7f444444; valaddr_reg:x3; val_offset:17643*0 + 3*505*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17643*0 + 3*505*FLEN/8, x4, x1, x2)

inst_5882:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:17646*0 + 3*506*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17646*0 + 3*506*FLEN/8, x4, x1, x2)

inst_5883:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:17649*0 + 3*507*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17649*0 + 3*507*FLEN/8, x4, x1, x2)

inst_5884:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x7f666666; valaddr_reg:x3; val_offset:17652*0 + 3*508*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17652*0 + 3*508*FLEN/8, x4, x1, x2)

inst_5885:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x7f6db6db; valaddr_reg:x3; val_offset:17655*0 + 3*509*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17655*0 + 3*509*FLEN/8, x4, x1, x2)

inst_5886:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:17658*0 + 3*510*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17658*0 + 3*510*FLEN/8, x4, x1, x2)

inst_5887:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:17661*0 + 3*511*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17661*0 + 3*511*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_5)

inst_5888:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54f0ed and fs2 == 0 and fe2 == 0x82 and fm2 == 0x19e206 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4f0ed; op2val:0x4119e206;
op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:17664*0 + 3*512*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17664*0 + 3*512*FLEN/8, x4, x1, x2)

inst_5889:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb8000000; valaddr_reg:x3; val_offset:17667*0 + 3*513*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17667*0 + 3*513*FLEN/8, x4, x1, x2)

inst_5890:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb8000001; valaddr_reg:x3; val_offset:17670*0 + 3*514*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17670*0 + 3*514*FLEN/8, x4, x1, x2)

inst_5891:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb8000003; valaddr_reg:x3; val_offset:17673*0 + 3*515*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17673*0 + 3*515*FLEN/8, x4, x1, x2)

inst_5892:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb8000007; valaddr_reg:x3; val_offset:17676*0 + 3*516*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17676*0 + 3*516*FLEN/8, x4, x1, x2)

inst_5893:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb800000f; valaddr_reg:x3; val_offset:17679*0 + 3*517*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17679*0 + 3*517*FLEN/8, x4, x1, x2)

inst_5894:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb800001f; valaddr_reg:x3; val_offset:17682*0 + 3*518*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17682*0 + 3*518*FLEN/8, x4, x1, x2)

inst_5895:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb800003f; valaddr_reg:x3; val_offset:17685*0 + 3*519*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17685*0 + 3*519*FLEN/8, x4, x1, x2)

inst_5896:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb800007f; valaddr_reg:x3; val_offset:17688*0 + 3*520*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17688*0 + 3*520*FLEN/8, x4, x1, x2)

inst_5897:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb80000ff; valaddr_reg:x3; val_offset:17691*0 + 3*521*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17691*0 + 3*521*FLEN/8, x4, x1, x2)

inst_5898:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb80001ff; valaddr_reg:x3; val_offset:17694*0 + 3*522*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17694*0 + 3*522*FLEN/8, x4, x1, x2)

inst_5899:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb80003ff; valaddr_reg:x3; val_offset:17697*0 + 3*523*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17697*0 + 3*523*FLEN/8, x4, x1, x2)

inst_5900:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb80007ff; valaddr_reg:x3; val_offset:17700*0 + 3*524*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17700*0 + 3*524*FLEN/8, x4, x1, x2)

inst_5901:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb8000fff; valaddr_reg:x3; val_offset:17703*0 + 3*525*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17703*0 + 3*525*FLEN/8, x4, x1, x2)

inst_5902:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb8001fff; valaddr_reg:x3; val_offset:17706*0 + 3*526*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17706*0 + 3*526*FLEN/8, x4, x1, x2)

inst_5903:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb8003fff; valaddr_reg:x3; val_offset:17709*0 + 3*527*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17709*0 + 3*527*FLEN/8, x4, x1, x2)

inst_5904:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb8007fff; valaddr_reg:x3; val_offset:17712*0 + 3*528*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17712*0 + 3*528*FLEN/8, x4, x1, x2)

inst_5905:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb800ffff; valaddr_reg:x3; val_offset:17715*0 + 3*529*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17715*0 + 3*529*FLEN/8, x4, x1, x2)

inst_5906:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb801ffff; valaddr_reg:x3; val_offset:17718*0 + 3*530*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17718*0 + 3*530*FLEN/8, x4, x1, x2)

inst_5907:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb803ffff; valaddr_reg:x3; val_offset:17721*0 + 3*531*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17721*0 + 3*531*FLEN/8, x4, x1, x2)

inst_5908:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb807ffff; valaddr_reg:x3; val_offset:17724*0 + 3*532*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17724*0 + 3*532*FLEN/8, x4, x1, x2)

inst_5909:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb80fffff; valaddr_reg:x3; val_offset:17727*0 + 3*533*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17727*0 + 3*533*FLEN/8, x4, x1, x2)

inst_5910:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb81fffff; valaddr_reg:x3; val_offset:17730*0 + 3*534*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17730*0 + 3*534*FLEN/8, x4, x1, x2)

inst_5911:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb83fffff; valaddr_reg:x3; val_offset:17733*0 + 3*535*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17733*0 + 3*535*FLEN/8, x4, x1, x2)

inst_5912:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb8400000; valaddr_reg:x3; val_offset:17736*0 + 3*536*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17736*0 + 3*536*FLEN/8, x4, x1, x2)

inst_5913:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb8600000; valaddr_reg:x3; val_offset:17739*0 + 3*537*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17739*0 + 3*537*FLEN/8, x4, x1, x2)

inst_5914:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb8700000; valaddr_reg:x3; val_offset:17742*0 + 3*538*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17742*0 + 3*538*FLEN/8, x4, x1, x2)

inst_5915:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb8780000; valaddr_reg:x3; val_offset:17745*0 + 3*539*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17745*0 + 3*539*FLEN/8, x4, x1, x2)

inst_5916:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb87c0000; valaddr_reg:x3; val_offset:17748*0 + 3*540*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17748*0 + 3*540*FLEN/8, x4, x1, x2)

inst_5917:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb87e0000; valaddr_reg:x3; val_offset:17751*0 + 3*541*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17751*0 + 3*541*FLEN/8, x4, x1, x2)

inst_5918:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb87f0000; valaddr_reg:x3; val_offset:17754*0 + 3*542*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17754*0 + 3*542*FLEN/8, x4, x1, x2)

inst_5919:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb87f8000; valaddr_reg:x3; val_offset:17757*0 + 3*543*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17757*0 + 3*543*FLEN/8, x4, x1, x2)

inst_5920:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb87fc000; valaddr_reg:x3; val_offset:17760*0 + 3*544*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17760*0 + 3*544*FLEN/8, x4, x1, x2)

inst_5921:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb87fe000; valaddr_reg:x3; val_offset:17763*0 + 3*545*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17763*0 + 3*545*FLEN/8, x4, x1, x2)

inst_5922:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb87ff000; valaddr_reg:x3; val_offset:17766*0 + 3*546*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17766*0 + 3*546*FLEN/8, x4, x1, x2)

inst_5923:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb87ff800; valaddr_reg:x3; val_offset:17769*0 + 3*547*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17769*0 + 3*547*FLEN/8, x4, x1, x2)

inst_5924:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb87ffc00; valaddr_reg:x3; val_offset:17772*0 + 3*548*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17772*0 + 3*548*FLEN/8, x4, x1, x2)

inst_5925:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb87ffe00; valaddr_reg:x3; val_offset:17775*0 + 3*549*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17775*0 + 3*549*FLEN/8, x4, x1, x2)

inst_5926:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb87fff00; valaddr_reg:x3; val_offset:17778*0 + 3*550*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17778*0 + 3*550*FLEN/8, x4, x1, x2)

inst_5927:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb87fff80; valaddr_reg:x3; val_offset:17781*0 + 3*551*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17781*0 + 3*551*FLEN/8, x4, x1, x2)

inst_5928:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb87fffc0; valaddr_reg:x3; val_offset:17784*0 + 3*552*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17784*0 + 3*552*FLEN/8, x4, x1, x2)

inst_5929:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb87fffe0; valaddr_reg:x3; val_offset:17787*0 + 3*553*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17787*0 + 3*553*FLEN/8, x4, x1, x2)

inst_5930:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb87ffff0; valaddr_reg:x3; val_offset:17790*0 + 3*554*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17790*0 + 3*554*FLEN/8, x4, x1, x2)

inst_5931:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb87ffff8; valaddr_reg:x3; val_offset:17793*0 + 3*555*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17793*0 + 3*555*FLEN/8, x4, x1, x2)

inst_5932:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb87ffffc; valaddr_reg:x3; val_offset:17796*0 + 3*556*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17796*0 + 3*556*FLEN/8, x4, x1, x2)

inst_5933:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb87ffffe; valaddr_reg:x3; val_offset:17799*0 + 3*557*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17799*0 + 3*557*FLEN/8, x4, x1, x2)

inst_5934:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xb87fffff; valaddr_reg:x3; val_offset:17802*0 + 3*558*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17802*0 + 3*558*FLEN/8, x4, x1, x2)

inst_5935:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xbf800001; valaddr_reg:x3; val_offset:17805*0 + 3*559*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17805*0 + 3*559*FLEN/8, x4, x1, x2)

inst_5936:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xbf800003; valaddr_reg:x3; val_offset:17808*0 + 3*560*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17808*0 + 3*560*FLEN/8, x4, x1, x2)

inst_5937:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xbf800007; valaddr_reg:x3; val_offset:17811*0 + 3*561*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17811*0 + 3*561*FLEN/8, x4, x1, x2)

inst_5938:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xbf999999; valaddr_reg:x3; val_offset:17814*0 + 3*562*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17814*0 + 3*562*FLEN/8, x4, x1, x2)

inst_5939:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:17817*0 + 3*563*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17817*0 + 3*563*FLEN/8, x4, x1, x2)

inst_5940:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:17820*0 + 3*564*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17820*0 + 3*564*FLEN/8, x4, x1, x2)

inst_5941:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:17823*0 + 3*565*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17823*0 + 3*565*FLEN/8, x4, x1, x2)

inst_5942:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:17826*0 + 3*566*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17826*0 + 3*566*FLEN/8, x4, x1, x2)

inst_5943:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:17829*0 + 3*567*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17829*0 + 3*567*FLEN/8, x4, x1, x2)

inst_5944:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:17832*0 + 3*568*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17832*0 + 3*568*FLEN/8, x4, x1, x2)

inst_5945:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:17835*0 + 3*569*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17835*0 + 3*569*FLEN/8, x4, x1, x2)

inst_5946:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:17838*0 + 3*570*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17838*0 + 3*570*FLEN/8, x4, x1, x2)

inst_5947:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:17841*0 + 3*571*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17841*0 + 3*571*FLEN/8, x4, x1, x2)

inst_5948:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:17844*0 + 3*572*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17844*0 + 3*572*FLEN/8, x4, x1, x2)

inst_5949:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:17847*0 + 3*573*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17847*0 + 3*573*FLEN/8, x4, x1, x2)

inst_5950:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5686a2 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x18bf01 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd686a2; op2val:0x8118bf01;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:17850*0 + 3*574*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17850*0 + 3*574*FLEN/8, x4, x1, x2)

inst_5951:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x79800000; valaddr_reg:x3; val_offset:17853*0 + 3*575*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17853*0 + 3*575*FLEN/8, x4, x1, x2)

inst_5952:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x79800001; valaddr_reg:x3; val_offset:17856*0 + 3*576*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17856*0 + 3*576*FLEN/8, x4, x1, x2)

inst_5953:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x79800003; valaddr_reg:x3; val_offset:17859*0 + 3*577*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17859*0 + 3*577*FLEN/8, x4, x1, x2)

inst_5954:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x79800007; valaddr_reg:x3; val_offset:17862*0 + 3*578*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17862*0 + 3*578*FLEN/8, x4, x1, x2)

inst_5955:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x7980000f; valaddr_reg:x3; val_offset:17865*0 + 3*579*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17865*0 + 3*579*FLEN/8, x4, x1, x2)

inst_5956:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x7980001f; valaddr_reg:x3; val_offset:17868*0 + 3*580*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17868*0 + 3*580*FLEN/8, x4, x1, x2)

inst_5957:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x7980003f; valaddr_reg:x3; val_offset:17871*0 + 3*581*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17871*0 + 3*581*FLEN/8, x4, x1, x2)

inst_5958:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x7980007f; valaddr_reg:x3; val_offset:17874*0 + 3*582*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17874*0 + 3*582*FLEN/8, x4, x1, x2)

inst_5959:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x798000ff; valaddr_reg:x3; val_offset:17877*0 + 3*583*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17877*0 + 3*583*FLEN/8, x4, x1, x2)

inst_5960:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x798001ff; valaddr_reg:x3; val_offset:17880*0 + 3*584*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17880*0 + 3*584*FLEN/8, x4, x1, x2)

inst_5961:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x798003ff; valaddr_reg:x3; val_offset:17883*0 + 3*585*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17883*0 + 3*585*FLEN/8, x4, x1, x2)

inst_5962:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x798007ff; valaddr_reg:x3; val_offset:17886*0 + 3*586*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17886*0 + 3*586*FLEN/8, x4, x1, x2)

inst_5963:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x79800fff; valaddr_reg:x3; val_offset:17889*0 + 3*587*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17889*0 + 3*587*FLEN/8, x4, x1, x2)

inst_5964:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x79801fff; valaddr_reg:x3; val_offset:17892*0 + 3*588*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17892*0 + 3*588*FLEN/8, x4, x1, x2)

inst_5965:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x79803fff; valaddr_reg:x3; val_offset:17895*0 + 3*589*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17895*0 + 3*589*FLEN/8, x4, x1, x2)

inst_5966:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x79807fff; valaddr_reg:x3; val_offset:17898*0 + 3*590*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17898*0 + 3*590*FLEN/8, x4, x1, x2)

inst_5967:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x7980ffff; valaddr_reg:x3; val_offset:17901*0 + 3*591*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17901*0 + 3*591*FLEN/8, x4, x1, x2)

inst_5968:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x7981ffff; valaddr_reg:x3; val_offset:17904*0 + 3*592*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17904*0 + 3*592*FLEN/8, x4, x1, x2)

inst_5969:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x7983ffff; valaddr_reg:x3; val_offset:17907*0 + 3*593*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17907*0 + 3*593*FLEN/8, x4, x1, x2)

inst_5970:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x7987ffff; valaddr_reg:x3; val_offset:17910*0 + 3*594*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17910*0 + 3*594*FLEN/8, x4, x1, x2)

inst_5971:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x798fffff; valaddr_reg:x3; val_offset:17913*0 + 3*595*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17913*0 + 3*595*FLEN/8, x4, x1, x2)

inst_5972:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x799fffff; valaddr_reg:x3; val_offset:17916*0 + 3*596*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17916*0 + 3*596*FLEN/8, x4, x1, x2)

inst_5973:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x79bfffff; valaddr_reg:x3; val_offset:17919*0 + 3*597*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17919*0 + 3*597*FLEN/8, x4, x1, x2)

inst_5974:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x79c00000; valaddr_reg:x3; val_offset:17922*0 + 3*598*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17922*0 + 3*598*FLEN/8, x4, x1, x2)

inst_5975:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x79e00000; valaddr_reg:x3; val_offset:17925*0 + 3*599*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17925*0 + 3*599*FLEN/8, x4, x1, x2)

inst_5976:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x79f00000; valaddr_reg:x3; val_offset:17928*0 + 3*600*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17928*0 + 3*600*FLEN/8, x4, x1, x2)

inst_5977:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x79f80000; valaddr_reg:x3; val_offset:17931*0 + 3*601*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17931*0 + 3*601*FLEN/8, x4, x1, x2)

inst_5978:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x79fc0000; valaddr_reg:x3; val_offset:17934*0 + 3*602*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17934*0 + 3*602*FLEN/8, x4, x1, x2)

inst_5979:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x79fe0000; valaddr_reg:x3; val_offset:17937*0 + 3*603*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17937*0 + 3*603*FLEN/8, x4, x1, x2)

inst_5980:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x79ff0000; valaddr_reg:x3; val_offset:17940*0 + 3*604*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17940*0 + 3*604*FLEN/8, x4, x1, x2)

inst_5981:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x79ff8000; valaddr_reg:x3; val_offset:17943*0 + 3*605*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17943*0 + 3*605*FLEN/8, x4, x1, x2)

inst_5982:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x79ffc000; valaddr_reg:x3; val_offset:17946*0 + 3*606*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17946*0 + 3*606*FLEN/8, x4, x1, x2)

inst_5983:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x79ffe000; valaddr_reg:x3; val_offset:17949*0 + 3*607*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17949*0 + 3*607*FLEN/8, x4, x1, x2)

inst_5984:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x79fff000; valaddr_reg:x3; val_offset:17952*0 + 3*608*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17952*0 + 3*608*FLEN/8, x4, x1, x2)

inst_5985:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x79fff800; valaddr_reg:x3; val_offset:17955*0 + 3*609*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17955*0 + 3*609*FLEN/8, x4, x1, x2)

inst_5986:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x79fffc00; valaddr_reg:x3; val_offset:17958*0 + 3*610*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17958*0 + 3*610*FLEN/8, x4, x1, x2)

inst_5987:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x79fffe00; valaddr_reg:x3; val_offset:17961*0 + 3*611*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17961*0 + 3*611*FLEN/8, x4, x1, x2)

inst_5988:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x79ffff00; valaddr_reg:x3; val_offset:17964*0 + 3*612*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17964*0 + 3*612*FLEN/8, x4, x1, x2)

inst_5989:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x79ffff80; valaddr_reg:x3; val_offset:17967*0 + 3*613*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17967*0 + 3*613*FLEN/8, x4, x1, x2)

inst_5990:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x79ffffc0; valaddr_reg:x3; val_offset:17970*0 + 3*614*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17970*0 + 3*614*FLEN/8, x4, x1, x2)

inst_5991:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x79ffffe0; valaddr_reg:x3; val_offset:17973*0 + 3*615*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17973*0 + 3*615*FLEN/8, x4, x1, x2)

inst_5992:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x79fffff0; valaddr_reg:x3; val_offset:17976*0 + 3*616*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17976*0 + 3*616*FLEN/8, x4, x1, x2)

inst_5993:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x79fffff8; valaddr_reg:x3; val_offset:17979*0 + 3*617*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17979*0 + 3*617*FLEN/8, x4, x1, x2)

inst_5994:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x79fffffc; valaddr_reg:x3; val_offset:17982*0 + 3*618*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17982*0 + 3*618*FLEN/8, x4, x1, x2)

inst_5995:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x79fffffe; valaddr_reg:x3; val_offset:17985*0 + 3*619*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17985*0 + 3*619*FLEN/8, x4, x1, x2)

inst_5996:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x79ffffff; valaddr_reg:x3; val_offset:17988*0 + 3*620*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17988*0 + 3*620*FLEN/8, x4, x1, x2)

inst_5997:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x7f000001; valaddr_reg:x3; val_offset:17991*0 + 3*621*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17991*0 + 3*621*FLEN/8, x4, x1, x2)

inst_5998:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x7f000003; valaddr_reg:x3; val_offset:17994*0 + 3*622*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17994*0 + 3*622*FLEN/8, x4, x1, x2)

inst_5999:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x7f000007; valaddr_reg:x3; val_offset:17997*0 + 3*623*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17997*0 + 3*623*FLEN/8, x4, x1, x2)

inst_6000:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x7f199999; valaddr_reg:x3; val_offset:18000*0 + 3*624*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18000*0 + 3*624*FLEN/8, x4, x1, x2)

inst_6001:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x7f249249; valaddr_reg:x3; val_offset:18003*0 + 3*625*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18003*0 + 3*625*FLEN/8, x4, x1, x2)

inst_6002:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x7f333333; valaddr_reg:x3; val_offset:18006*0 + 3*626*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18006*0 + 3*626*FLEN/8, x4, x1, x2)

inst_6003:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x7f36db6d; valaddr_reg:x3; val_offset:18009*0 + 3*627*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18009*0 + 3*627*FLEN/8, x4, x1, x2)

inst_6004:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:18012*0 + 3*628*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18012*0 + 3*628*FLEN/8, x4, x1, x2)

inst_6005:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x7f444444; valaddr_reg:x3; val_offset:18015*0 + 3*629*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18015*0 + 3*629*FLEN/8, x4, x1, x2)

inst_6006:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:18018*0 + 3*630*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18018*0 + 3*630*FLEN/8, x4, x1, x2)

inst_6007:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:18021*0 + 3*631*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18021*0 + 3*631*FLEN/8, x4, x1, x2)

inst_6008:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x7f666666; valaddr_reg:x3; val_offset:18024*0 + 3*632*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18024*0 + 3*632*FLEN/8, x4, x1, x2)

inst_6009:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x7f6db6db; valaddr_reg:x3; val_offset:18027*0 + 3*633*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18027*0 + 3*633*FLEN/8, x4, x1, x2)

inst_6010:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:18030*0 + 3*634*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18030*0 + 3*634*FLEN/8, x4, x1, x2)

inst_6011:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:18033*0 + 3*635*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18033*0 + 3*635*FLEN/8, x4, x1, x2)

inst_6012:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56fcf2 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x186af1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6fcf2; op2val:0x41186af1;
op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:18036*0 + 3*636*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18036*0 + 3*636*FLEN/8, x4, x1, x2)

inst_6013:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x800001; valaddr_reg:x3; val_offset:18039*0 + 3*637*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18039*0 + 3*637*FLEN/8, x4, x1, x2)

inst_6014:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x800003; valaddr_reg:x3; val_offset:18042*0 + 3*638*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18042*0 + 3*638*FLEN/8, x4, x1, x2)

inst_6015:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x800007; valaddr_reg:x3; val_offset:18045*0 + 3*639*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18045*0 + 3*639*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_6)

inst_6016:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x999999; valaddr_reg:x3; val_offset:18048*0 + 3*640*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18048*0 + 3*640*FLEN/8, x4, x1, x2)

inst_6017:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0xa49249; valaddr_reg:x3; val_offset:18051*0 + 3*641*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18051*0 + 3*641*FLEN/8, x4, x1, x2)

inst_6018:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0xb33333; valaddr_reg:x3; val_offset:18054*0 + 3*642*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18054*0 + 3*642*FLEN/8, x4, x1, x2)

inst_6019:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0xb6db6d; valaddr_reg:x3; val_offset:18057*0 + 3*643*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18057*0 + 3*643*FLEN/8, x4, x1, x2)

inst_6020:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0xbbbbbb; valaddr_reg:x3; val_offset:18060*0 + 3*644*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18060*0 + 3*644*FLEN/8, x4, x1, x2)

inst_6021:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0xc44444; valaddr_reg:x3; val_offset:18063*0 + 3*645*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18063*0 + 3*645*FLEN/8, x4, x1, x2)

inst_6022:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0xcccccc; valaddr_reg:x3; val_offset:18066*0 + 3*646*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18066*0 + 3*646*FLEN/8, x4, x1, x2)

inst_6023:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0xdb6db6; valaddr_reg:x3; val_offset:18069*0 + 3*647*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18069*0 + 3*647*FLEN/8, x4, x1, x2)

inst_6024:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0xe66666; valaddr_reg:x3; val_offset:18072*0 + 3*648*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18072*0 + 3*648*FLEN/8, x4, x1, x2)

inst_6025:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0xedb6db; valaddr_reg:x3; val_offset:18075*0 + 3*649*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18075*0 + 3*649*FLEN/8, x4, x1, x2)

inst_6026:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0xfffff8; valaddr_reg:x3; val_offset:18078*0 + 3*650*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18078*0 + 3*650*FLEN/8, x4, x1, x2)

inst_6027:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0xfffffc; valaddr_reg:x3; val_offset:18081*0 + 3*651*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18081*0 + 3*651*FLEN/8, x4, x1, x2)

inst_6028:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0xfffffe; valaddr_reg:x3; val_offset:18084*0 + 3*652*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18084*0 + 3*652*FLEN/8, x4, x1, x2)

inst_6029:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x3800000; valaddr_reg:x3; val_offset:18087*0 + 3*653*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18087*0 + 3*653*FLEN/8, x4, x1, x2)

inst_6030:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x3800001; valaddr_reg:x3; val_offset:18090*0 + 3*654*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18090*0 + 3*654*FLEN/8, x4, x1, x2)

inst_6031:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x3800003; valaddr_reg:x3; val_offset:18093*0 + 3*655*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18093*0 + 3*655*FLEN/8, x4, x1, x2)

inst_6032:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x3800007; valaddr_reg:x3; val_offset:18096*0 + 3*656*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18096*0 + 3*656*FLEN/8, x4, x1, x2)

inst_6033:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x380000f; valaddr_reg:x3; val_offset:18099*0 + 3*657*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18099*0 + 3*657*FLEN/8, x4, x1, x2)

inst_6034:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x380001f; valaddr_reg:x3; val_offset:18102*0 + 3*658*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18102*0 + 3*658*FLEN/8, x4, x1, x2)

inst_6035:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x380003f; valaddr_reg:x3; val_offset:18105*0 + 3*659*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18105*0 + 3*659*FLEN/8, x4, x1, x2)

inst_6036:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x380007f; valaddr_reg:x3; val_offset:18108*0 + 3*660*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18108*0 + 3*660*FLEN/8, x4, x1, x2)

inst_6037:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x38000ff; valaddr_reg:x3; val_offset:18111*0 + 3*661*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18111*0 + 3*661*FLEN/8, x4, x1, x2)

inst_6038:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x38001ff; valaddr_reg:x3; val_offset:18114*0 + 3*662*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18114*0 + 3*662*FLEN/8, x4, x1, x2)

inst_6039:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x38003ff; valaddr_reg:x3; val_offset:18117*0 + 3*663*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18117*0 + 3*663*FLEN/8, x4, x1, x2)

inst_6040:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x38007ff; valaddr_reg:x3; val_offset:18120*0 + 3*664*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18120*0 + 3*664*FLEN/8, x4, x1, x2)

inst_6041:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x3800fff; valaddr_reg:x3; val_offset:18123*0 + 3*665*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18123*0 + 3*665*FLEN/8, x4, x1, x2)

inst_6042:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x3801fff; valaddr_reg:x3; val_offset:18126*0 + 3*666*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18126*0 + 3*666*FLEN/8, x4, x1, x2)

inst_6043:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x3803fff; valaddr_reg:x3; val_offset:18129*0 + 3*667*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18129*0 + 3*667*FLEN/8, x4, x1, x2)

inst_6044:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x3807fff; valaddr_reg:x3; val_offset:18132*0 + 3*668*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18132*0 + 3*668*FLEN/8, x4, x1, x2)

inst_6045:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x380ffff; valaddr_reg:x3; val_offset:18135*0 + 3*669*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18135*0 + 3*669*FLEN/8, x4, x1, x2)

inst_6046:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x381ffff; valaddr_reg:x3; val_offset:18138*0 + 3*670*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18138*0 + 3*670*FLEN/8, x4, x1, x2)

inst_6047:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x383ffff; valaddr_reg:x3; val_offset:18141*0 + 3*671*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18141*0 + 3*671*FLEN/8, x4, x1, x2)

inst_6048:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x387ffff; valaddr_reg:x3; val_offset:18144*0 + 3*672*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18144*0 + 3*672*FLEN/8, x4, x1, x2)

inst_6049:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x38fffff; valaddr_reg:x3; val_offset:18147*0 + 3*673*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18147*0 + 3*673*FLEN/8, x4, x1, x2)

inst_6050:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x39fffff; valaddr_reg:x3; val_offset:18150*0 + 3*674*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18150*0 + 3*674*FLEN/8, x4, x1, x2)

inst_6051:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x3bfffff; valaddr_reg:x3; val_offset:18153*0 + 3*675*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18153*0 + 3*675*FLEN/8, x4, x1, x2)

inst_6052:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x3c00000; valaddr_reg:x3; val_offset:18156*0 + 3*676*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18156*0 + 3*676*FLEN/8, x4, x1, x2)

inst_6053:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x3e00000; valaddr_reg:x3; val_offset:18159*0 + 3*677*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18159*0 + 3*677*FLEN/8, x4, x1, x2)

inst_6054:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x3f00000; valaddr_reg:x3; val_offset:18162*0 + 3*678*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18162*0 + 3*678*FLEN/8, x4, x1, x2)

inst_6055:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x3f80000; valaddr_reg:x3; val_offset:18165*0 + 3*679*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18165*0 + 3*679*FLEN/8, x4, x1, x2)

inst_6056:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x3fc0000; valaddr_reg:x3; val_offset:18168*0 + 3*680*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18168*0 + 3*680*FLEN/8, x4, x1, x2)

inst_6057:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x3fe0000; valaddr_reg:x3; val_offset:18171*0 + 3*681*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18171*0 + 3*681*FLEN/8, x4, x1, x2)

inst_6058:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x3ff0000; valaddr_reg:x3; val_offset:18174*0 + 3*682*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18174*0 + 3*682*FLEN/8, x4, x1, x2)

inst_6059:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x3ff8000; valaddr_reg:x3; val_offset:18177*0 + 3*683*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18177*0 + 3*683*FLEN/8, x4, x1, x2)

inst_6060:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x3ffc000; valaddr_reg:x3; val_offset:18180*0 + 3*684*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18180*0 + 3*684*FLEN/8, x4, x1, x2)

inst_6061:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x3ffe000; valaddr_reg:x3; val_offset:18183*0 + 3*685*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18183*0 + 3*685*FLEN/8, x4, x1, x2)

inst_6062:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x3fff000; valaddr_reg:x3; val_offset:18186*0 + 3*686*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18186*0 + 3*686*FLEN/8, x4, x1, x2)

inst_6063:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x3fff800; valaddr_reg:x3; val_offset:18189*0 + 3*687*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18189*0 + 3*687*FLEN/8, x4, x1, x2)

inst_6064:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x3fffc00; valaddr_reg:x3; val_offset:18192*0 + 3*688*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18192*0 + 3*688*FLEN/8, x4, x1, x2)

inst_6065:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x3fffe00; valaddr_reg:x3; val_offset:18195*0 + 3*689*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18195*0 + 3*689*FLEN/8, x4, x1, x2)

inst_6066:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x3ffff00; valaddr_reg:x3; val_offset:18198*0 + 3*690*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18198*0 + 3*690*FLEN/8, x4, x1, x2)

inst_6067:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x3ffff80; valaddr_reg:x3; val_offset:18201*0 + 3*691*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18201*0 + 3*691*FLEN/8, x4, x1, x2)

inst_6068:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x3ffffc0; valaddr_reg:x3; val_offset:18204*0 + 3*692*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18204*0 + 3*692*FLEN/8, x4, x1, x2)

inst_6069:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x3ffffe0; valaddr_reg:x3; val_offset:18207*0 + 3*693*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18207*0 + 3*693*FLEN/8, x4, x1, x2)

inst_6070:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x3fffff0; valaddr_reg:x3; val_offset:18210*0 + 3*694*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18210*0 + 3*694*FLEN/8, x4, x1, x2)

inst_6071:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x3fffff8; valaddr_reg:x3; val_offset:18213*0 + 3*695*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18213*0 + 3*695*FLEN/8, x4, x1, x2)

inst_6072:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x3fffffc; valaddr_reg:x3; val_offset:18216*0 + 3*696*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18216*0 + 3*696*FLEN/8, x4, x1, x2)

inst_6073:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x3fffffe; valaddr_reg:x3; val_offset:18219*0 + 3*697*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18219*0 + 3*697*FLEN/8, x4, x1, x2)

inst_6074:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x576a65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd76a65; op2val:0x0;
op3val:0x3ffffff; valaddr_reg:x3; val_offset:18222*0 + 3*698*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18222*0 + 3*698*FLEN/8, x4, x1, x2)

inst_6075:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf2000000; valaddr_reg:x3; val_offset:18225*0 + 3*699*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18225*0 + 3*699*FLEN/8, x4, x1, x2)

inst_6076:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf2000001; valaddr_reg:x3; val_offset:18228*0 + 3*700*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18228*0 + 3*700*FLEN/8, x4, x1, x2)

inst_6077:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf2000003; valaddr_reg:x3; val_offset:18231*0 + 3*701*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18231*0 + 3*701*FLEN/8, x4, x1, x2)

inst_6078:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf2000007; valaddr_reg:x3; val_offset:18234*0 + 3*702*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18234*0 + 3*702*FLEN/8, x4, x1, x2)

inst_6079:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf200000f; valaddr_reg:x3; val_offset:18237*0 + 3*703*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18237*0 + 3*703*FLEN/8, x4, x1, x2)

inst_6080:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf200001f; valaddr_reg:x3; val_offset:18240*0 + 3*704*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18240*0 + 3*704*FLEN/8, x4, x1, x2)

inst_6081:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf200003f; valaddr_reg:x3; val_offset:18243*0 + 3*705*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18243*0 + 3*705*FLEN/8, x4, x1, x2)

inst_6082:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf200007f; valaddr_reg:x3; val_offset:18246*0 + 3*706*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18246*0 + 3*706*FLEN/8, x4, x1, x2)

inst_6083:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf20000ff; valaddr_reg:x3; val_offset:18249*0 + 3*707*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18249*0 + 3*707*FLEN/8, x4, x1, x2)

inst_6084:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf20001ff; valaddr_reg:x3; val_offset:18252*0 + 3*708*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18252*0 + 3*708*FLEN/8, x4, x1, x2)

inst_6085:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf20003ff; valaddr_reg:x3; val_offset:18255*0 + 3*709*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18255*0 + 3*709*FLEN/8, x4, x1, x2)

inst_6086:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf20007ff; valaddr_reg:x3; val_offset:18258*0 + 3*710*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18258*0 + 3*710*FLEN/8, x4, x1, x2)

inst_6087:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf2000fff; valaddr_reg:x3; val_offset:18261*0 + 3*711*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18261*0 + 3*711*FLEN/8, x4, x1, x2)

inst_6088:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf2001fff; valaddr_reg:x3; val_offset:18264*0 + 3*712*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18264*0 + 3*712*FLEN/8, x4, x1, x2)

inst_6089:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf2003fff; valaddr_reg:x3; val_offset:18267*0 + 3*713*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18267*0 + 3*713*FLEN/8, x4, x1, x2)

inst_6090:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf2007fff; valaddr_reg:x3; val_offset:18270*0 + 3*714*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18270*0 + 3*714*FLEN/8, x4, x1, x2)

inst_6091:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf200ffff; valaddr_reg:x3; val_offset:18273*0 + 3*715*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18273*0 + 3*715*FLEN/8, x4, x1, x2)

inst_6092:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf201ffff; valaddr_reg:x3; val_offset:18276*0 + 3*716*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18276*0 + 3*716*FLEN/8, x4, x1, x2)

inst_6093:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf203ffff; valaddr_reg:x3; val_offset:18279*0 + 3*717*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18279*0 + 3*717*FLEN/8, x4, x1, x2)

inst_6094:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf207ffff; valaddr_reg:x3; val_offset:18282*0 + 3*718*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18282*0 + 3*718*FLEN/8, x4, x1, x2)

inst_6095:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf20fffff; valaddr_reg:x3; val_offset:18285*0 + 3*719*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18285*0 + 3*719*FLEN/8, x4, x1, x2)

inst_6096:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf21fffff; valaddr_reg:x3; val_offset:18288*0 + 3*720*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18288*0 + 3*720*FLEN/8, x4, x1, x2)

inst_6097:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf23fffff; valaddr_reg:x3; val_offset:18291*0 + 3*721*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18291*0 + 3*721*FLEN/8, x4, x1, x2)

inst_6098:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf2400000; valaddr_reg:x3; val_offset:18294*0 + 3*722*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18294*0 + 3*722*FLEN/8, x4, x1, x2)

inst_6099:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf2600000; valaddr_reg:x3; val_offset:18297*0 + 3*723*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18297*0 + 3*723*FLEN/8, x4, x1, x2)

inst_6100:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf2700000; valaddr_reg:x3; val_offset:18300*0 + 3*724*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18300*0 + 3*724*FLEN/8, x4, x1, x2)

inst_6101:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf2780000; valaddr_reg:x3; val_offset:18303*0 + 3*725*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18303*0 + 3*725*FLEN/8, x4, x1, x2)

inst_6102:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf27c0000; valaddr_reg:x3; val_offset:18306*0 + 3*726*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18306*0 + 3*726*FLEN/8, x4, x1, x2)

inst_6103:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf27e0000; valaddr_reg:x3; val_offset:18309*0 + 3*727*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18309*0 + 3*727*FLEN/8, x4, x1, x2)

inst_6104:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf27f0000; valaddr_reg:x3; val_offset:18312*0 + 3*728*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18312*0 + 3*728*FLEN/8, x4, x1, x2)

inst_6105:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf27f8000; valaddr_reg:x3; val_offset:18315*0 + 3*729*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18315*0 + 3*729*FLEN/8, x4, x1, x2)

inst_6106:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf27fc000; valaddr_reg:x3; val_offset:18318*0 + 3*730*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18318*0 + 3*730*FLEN/8, x4, x1, x2)

inst_6107:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf27fe000; valaddr_reg:x3; val_offset:18321*0 + 3*731*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18321*0 + 3*731*FLEN/8, x4, x1, x2)

inst_6108:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf27ff000; valaddr_reg:x3; val_offset:18324*0 + 3*732*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18324*0 + 3*732*FLEN/8, x4, x1, x2)

inst_6109:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf27ff800; valaddr_reg:x3; val_offset:18327*0 + 3*733*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18327*0 + 3*733*FLEN/8, x4, x1, x2)

inst_6110:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf27ffc00; valaddr_reg:x3; val_offset:18330*0 + 3*734*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18330*0 + 3*734*FLEN/8, x4, x1, x2)

inst_6111:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf27ffe00; valaddr_reg:x3; val_offset:18333*0 + 3*735*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18333*0 + 3*735*FLEN/8, x4, x1, x2)

inst_6112:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf27fff00; valaddr_reg:x3; val_offset:18336*0 + 3*736*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18336*0 + 3*736*FLEN/8, x4, x1, x2)

inst_6113:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf27fff80; valaddr_reg:x3; val_offset:18339*0 + 3*737*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18339*0 + 3*737*FLEN/8, x4, x1, x2)

inst_6114:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf27fffc0; valaddr_reg:x3; val_offset:18342*0 + 3*738*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18342*0 + 3*738*FLEN/8, x4, x1, x2)

inst_6115:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf27fffe0; valaddr_reg:x3; val_offset:18345*0 + 3*739*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18345*0 + 3*739*FLEN/8, x4, x1, x2)

inst_6116:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf27ffff0; valaddr_reg:x3; val_offset:18348*0 + 3*740*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18348*0 + 3*740*FLEN/8, x4, x1, x2)

inst_6117:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf27ffff8; valaddr_reg:x3; val_offset:18351*0 + 3*741*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18351*0 + 3*741*FLEN/8, x4, x1, x2)

inst_6118:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf27ffffc; valaddr_reg:x3; val_offset:18354*0 + 3*742*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18354*0 + 3*742*FLEN/8, x4, x1, x2)

inst_6119:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf27ffffe; valaddr_reg:x3; val_offset:18357*0 + 3*743*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18357*0 + 3*743*FLEN/8, x4, x1, x2)

inst_6120:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xf27fffff; valaddr_reg:x3; val_offset:18360*0 + 3*744*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18360*0 + 3*744*FLEN/8, x4, x1, x2)

inst_6121:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xff000001; valaddr_reg:x3; val_offset:18363*0 + 3*745*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18363*0 + 3*745*FLEN/8, x4, x1, x2)

inst_6122:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xff000003; valaddr_reg:x3; val_offset:18366*0 + 3*746*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18366*0 + 3*746*FLEN/8, x4, x1, x2)

inst_6123:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xff000007; valaddr_reg:x3; val_offset:18369*0 + 3*747*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18369*0 + 3*747*FLEN/8, x4, x1, x2)

inst_6124:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xff199999; valaddr_reg:x3; val_offset:18372*0 + 3*748*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18372*0 + 3*748*FLEN/8, x4, x1, x2)

inst_6125:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xff249249; valaddr_reg:x3; val_offset:18375*0 + 3*749*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18375*0 + 3*749*FLEN/8, x4, x1, x2)

inst_6126:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xff333333; valaddr_reg:x3; val_offset:18378*0 + 3*750*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18378*0 + 3*750*FLEN/8, x4, x1, x2)

inst_6127:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xff36db6d; valaddr_reg:x3; val_offset:18381*0 + 3*751*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18381*0 + 3*751*FLEN/8, x4, x1, x2)

inst_6128:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:18384*0 + 3*752*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18384*0 + 3*752*FLEN/8, x4, x1, x2)

inst_6129:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xff444444; valaddr_reg:x3; val_offset:18387*0 + 3*753*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18387*0 + 3*753*FLEN/8, x4, x1, x2)

inst_6130:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xff4ccccc; valaddr_reg:x3; val_offset:18390*0 + 3*754*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18390*0 + 3*754*FLEN/8, x4, x1, x2)

inst_6131:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xff5b6db6; valaddr_reg:x3; val_offset:18393*0 + 3*755*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18393*0 + 3*755*FLEN/8, x4, x1, x2)

inst_6132:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xff666666; valaddr_reg:x3; val_offset:18396*0 + 3*756*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18396*0 + 3*756*FLEN/8, x4, x1, x2)

inst_6133:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xff6db6db; valaddr_reg:x3; val_offset:18399*0 + 3*757*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18399*0 + 3*757*FLEN/8, x4, x1, x2)

inst_6134:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xff7ffff8; valaddr_reg:x3; val_offset:18402*0 + 3*758*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18402*0 + 3*758*FLEN/8, x4, x1, x2)

inst_6135:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xff7ffffc; valaddr_reg:x3; val_offset:18405*0 + 3*759*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18405*0 + 3*759*FLEN/8, x4, x1, x2)

inst_6136:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ae96 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x17ed68 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd7ae96; op2val:0xc117ed68;
op3val:0xff7ffffe; valaddr_reg:x3; val_offset:18408*0 + 3*760*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18408*0 + 3*760*FLEN/8, x4, x1, x2)

inst_6137:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5923f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd923f1; op2val:0x80000000;
op3val:0x80800001; valaddr_reg:x3; val_offset:18411*0 + 3*761*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18411*0 + 3*761*FLEN/8, x4, x1, x2)

inst_6138:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5923f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd923f1; op2val:0x80000000;
op3val:0x80800003; valaddr_reg:x3; val_offset:18414*0 + 3*762*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18414*0 + 3*762*FLEN/8, x4, x1, x2)

inst_6139:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5923f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd923f1; op2val:0x80000000;
op3val:0x80800007; valaddr_reg:x3; val_offset:18417*0 + 3*763*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18417*0 + 3*763*FLEN/8, x4, x1, x2)

inst_6140:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5923f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd923f1; op2val:0x80000000;
op3val:0x80999999; valaddr_reg:x3; val_offset:18420*0 + 3*764*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18420*0 + 3*764*FLEN/8, x4, x1, x2)

inst_6141:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5923f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd923f1; op2val:0x80000000;
op3val:0x80a49249; valaddr_reg:x3; val_offset:18423*0 + 3*765*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18423*0 + 3*765*FLEN/8, x4, x1, x2)

inst_6142:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5923f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd923f1; op2val:0x80000000;
op3val:0x80b33333; valaddr_reg:x3; val_offset:18426*0 + 3*766*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18426*0 + 3*766*FLEN/8, x4, x1, x2)

inst_6143:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5923f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd923f1; op2val:0x80000000;
op3val:0x80b6db6d; valaddr_reg:x3; val_offset:18429*0 + 3*767*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18429*0 + 3*767*FLEN/8, x4, x1, x2)
#endif


RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7a800000,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7a800001,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7a800003,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7a800007,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7a80000f,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7a80001f,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7a80003f,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7a80007f,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7a8000ff,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7a8001ff,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7a8003ff,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7a8007ff,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7a800fff,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7a801fff,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7a803fff,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7a807fff,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7a80ffff,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7a81ffff,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7a83ffff,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7a87ffff,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7a8fffff,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7a9fffff,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7abfffff,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7ac00000,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7ae00000,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7af00000,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7af80000,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7afc0000,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7afe0000,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7aff0000,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7aff8000,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7affc000,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7affe000,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7afff000,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7afff800,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7afffc00,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7afffe00,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7affff00,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7affff80,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7affffc0,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7affffe0,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7afffff0,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7afffff8,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7afffffc,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7afffffe,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7affffff,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7f000001,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7f000003,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7f000007,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7f199999,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7f249249,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7f333333,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7f36db6d,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7f3bbbbb,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7f444444,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7f4ccccc,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7f5b6db6,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7f666666,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7f6db6db,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7f7ffff8,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7f7ffffc,32,FLEN)
NAN_BOXED(0x7dca6385,32,FLEN)
NAN_BOXED(0x4121e7fd,32,FLEN)
NAN_BOXED(0x7f7ffffe,32,FLEN)
NAN_BOXED(0x7dcbf881,32,FLEN)
NAN_BOXED(0x4120a687,32,FLEN)
NAN_BOXED(0x7f000001,32,FLEN)
NAN_BOXED(0x7dcbf881,32,FLEN)
NAN_BOXED(0x4120a687,32,FLEN)
NAN_BOXED(0x7f000003,32,FLEN)
NAN_BOXED(0x7dcbf881,32,FLEN)
NAN_BOXED(0x4120a687,32,FLEN)
NAN_BOXED(0x7f000007,32,FLEN)
NAN_BOXED(0x7dcbf881,32,FLEN)
NAN_BOXED(0x4120a687,32,FLEN)
NAN_BOXED(0x7f199999,32,FLEN)
NAN_BOXED(0x7dcbf881,32,FLEN)
NAN_BOXED(0x4120a687,32,FLEN)
NAN_BOXED(0x7f249249,32,FLEN)
NAN_BOXED(0x7dcbf881,32,FLEN)
NAN_BOXED(0x4120a687,32,FLEN)
NAN_BOXED(0x7f333333,32,FLEN)
NAN_BOXED(0x7dcbf881,32,FLEN)
NAN_BOXED(0x4120a687,32,FLEN)
NAN_BOXED(0x7f36db6d,32,FLEN)
NAN_BOXED(0x7dcbf881,32,FLEN)
NAN_BOXED(0x4120a687,32,FLEN)
NAN_BOXED(0x7f3bbbbb,32,FLEN)
NAN_BOXED(0x7dcbf881,32,FLEN)
NAN_BOXED(0x4120a687,32,FLEN)
NAN_BOXED(0x7f444444,32,FLEN)
NAN_BOXED(0x7dcbf881,32,FLEN)
NAN_BOXED(0x4120a687,32,FLEN)
NAN_BOXED(0x7f4ccccc,32,FLEN)
NAN_BOXED(0x7dcbf881,32,FLEN)
NAN_BOXED(0x4120a687,32,FLEN)
NAN_BOXED(0x7f5b6db6,32,FLEN)
NAN_BOXED(0x7dcbf881,32,FLEN)
NAN_BOXED(0x4120a687,32,FLEN)
NAN_BOXED(0x7f666666,32,FLEN)
NAN_BOXED(0x7dcbf881,32,FLEN)
NAN_BOXED(0x4120a687,32,FLEN)
NAN_BOXED(0x7f6db6db,32,FLEN)
NAN_BOXED(0x7dcbf881,32,FLEN)
NAN_BOXED(0x4120a687,32,FLEN)
NAN_BOXED(0x7f7ffff8,32,FLEN)
NAN_BOXED(0x7dcbf881,32,FLEN)
NAN_BOXED(0x4120a687,32,FLEN)
NAN_BOXED(0x7f7ffffc,32,FLEN)
NAN_BOXED(0x7dcbf881,32,FLEN)
NAN_BOXED(0x4120a687,32,FLEN)
NAN_BOXED(0x7f7ffffe,32,FLEN)
NAN_BOXED(0x7dcbf881,32,FLEN)
NAN_BOXED(0x4120a687,32,FLEN)
NAN_BOXED(0x7f7fffff,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x199999,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x249249,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x333333,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x36db6d,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3bbbbb,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x444444,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ccccc,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5b6db6,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x666666,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6db6db,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff8,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffc,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffe,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x10000000,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x10000001,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x10000003,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x10000007,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1000000f,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1000001f,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1000003f,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1000007f,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x100000ff,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x100001ff,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x100003ff,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x100007ff,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x10000fff,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x10001fff,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x10003fff,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x10007fff,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1000ffff,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1001ffff,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1003ffff,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1007ffff,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x100fffff,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x101fffff,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x103fffff,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x10400000,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x10600000,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x10700000,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x10780000,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107c0000,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107e0000,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107f0000,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107f8000,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107fc000,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107fe000,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107ff000,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107ff800,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107ffc00,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107ffe00,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107fff00,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107fff80,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107fffc0,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107fffe0,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107ffff0,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107ffff8,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107ffffc,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107ffffe,32,FLEN)
NAN_BOXED(0x7dcce0d7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107fffff,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800001,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800003,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800007,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x999999,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa49249,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb33333,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb6db6d,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbbbbbb,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc44444,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcccccc,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdb6db6,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe66666,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xedb6db,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffff8,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffc,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffe,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4000000,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4000001,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4000003,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4000007,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x400000f,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x400001f,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x400003f,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x400007f,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x40000ff,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x40001ff,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x40003ff,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x40007ff,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4000fff,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4001fff,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4003fff,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4007fff,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x400ffff,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x401ffff,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x403ffff,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x407ffff,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x40fffff,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x41fffff,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x43fffff,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4400000,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4600000,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4700000,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4780000,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47c0000,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47e0000,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47f0000,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47f8000,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47fc000,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47fe000,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47ff000,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47ff800,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47ffc00,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47ffe00,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47fff00,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47fff80,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47fffc0,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47fffe0,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47ffff0,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47ffff8,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47ffffc,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47ffffe,32,FLEN)
NAN_BOXED(0x7dcff1fa,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47fffff,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x28800000,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x28800001,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x28800003,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x28800007,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x2880000f,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x2880001f,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x2880003f,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x2880007f,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x288000ff,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x288001ff,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x288003ff,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x288007ff,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x28800fff,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x28801fff,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x28803fff,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x28807fff,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x2880ffff,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x2881ffff,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x2883ffff,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x2887ffff,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x288fffff,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x289fffff,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x28bfffff,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x28c00000,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x28e00000,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x28f00000,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x28f80000,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x28fc0000,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x28fe0000,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x28ff0000,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x28ff8000,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x28ffc000,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x28ffe000,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x28fff000,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x28fff800,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x28fffc00,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x28fffe00,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x28ffff00,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x28ffff80,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x28ffffc0,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x28ffffe0,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x28fffff0,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x28fffff8,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x28fffffc,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x28fffffe,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x28ffffff,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x3f800001,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x3f800003,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x3f800007,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x3f999999,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x3fa49249,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x3fb33333,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x3fb6db6d,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x3fbbbbbb,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x3fc44444,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x3fcccccc,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x3fdb6db6,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x3fe66666,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x3fedb6db,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x3ffffff8,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x3ffffffc,32,FLEN)
NAN_BOXED(0x7dd1a9f0,32,FLEN)
NAN_BOXED(0x11c49cc,32,FLEN)
NAN_BOXED(0x3ffffffe,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x199999,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x249249,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x333333,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x36db6d,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3bbbbb,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x444444,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ccccc,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5b6db6,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x666666,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6db6db,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff8,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffc,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffe,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe000000,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe000001,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe000003,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe000007,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe00000f,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe00001f,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe00003f,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe00007f,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe0000ff,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe0001ff,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe0003ff,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe0007ff,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe000fff,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe001fff,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe003fff,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe007fff,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe00ffff,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe01ffff,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe03ffff,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe07ffff,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe0fffff,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe1fffff,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe3fffff,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe400000,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe600000,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe700000,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe780000,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe7c0000,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe7e0000,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe7f0000,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe7f8000,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe7fc000,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe7fe000,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe7ff000,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe7ff800,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe7ffc00,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe7ffe00,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe7fff00,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe7fff80,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe7fffc0,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe7fffe0,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe7ffff0,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe7ffff8,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe7ffffc,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe7ffffe,32,FLEN)
NAN_BOXED(0x7dd1f799,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe7fffff,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe8000000,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe8000001,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe8000003,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe8000007,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe800000f,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe800001f,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe800003f,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe800007f,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe80000ff,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe80001ff,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe80003ff,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe80007ff,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe8000fff,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe8001fff,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe8003fff,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe8007fff,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe800ffff,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe801ffff,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe803ffff,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe807ffff,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe80fffff,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe81fffff,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe83fffff,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe8400000,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe8600000,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe8700000,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe8780000,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe87c0000,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe87e0000,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe87f0000,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe87f8000,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe87fc000,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe87fe000,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe87ff000,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe87ff800,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe87ffc00,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe87ffe00,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe87fff00,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe87fff80,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe87fffc0,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe87fffe0,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe87ffff0,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe87ffff8,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe87ffffc,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe87ffffe,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xe87fffff,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xff000001,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xff000003,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xff000007,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xff199999,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xff249249,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xff333333,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xff36db6d,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xff3bbbbb,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xff444444,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xff4ccccc,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xff5b6db6,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xff666666,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xff6db6db,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xff7ffff8,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xff7ffffc,32,FLEN)
NAN_BOXED(0x7dd36007,32,FLEN)
NAN_BOXED(0xc11b05e1,32,FLEN)
NAN_BOXED(0xff7ffffe,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec000000,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec000001,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec000003,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec000007,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec00000f,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec00001f,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec00003f,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec00007f,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec0000ff,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec0001ff,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec0003ff,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec0007ff,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec000fff,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec001fff,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec003fff,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec007fff,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec00ffff,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec01ffff,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec03ffff,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec07ffff,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec0fffff,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec1fffff,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec3fffff,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec400000,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec600000,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec700000,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec780000,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec7c0000,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec7e0000,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec7f0000,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec7f8000,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec7fc000,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec7fe000,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec7ff000,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec7ff800,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec7ffc00,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec7ffe00,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec7fff00,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec7fff80,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec7fffc0,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec7fffe0,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec7ffff0,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec7ffff8,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec7ffffc,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec7ffffe,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xec7fffff,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xff000001,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xff000003,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xff000007,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xff199999,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xff249249,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xff333333,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xff36db6d,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xff3bbbbb,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xff444444,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xff4ccccc,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xff5b6db6,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xff666666,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xff6db6db,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xff7ffff8,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xff7ffffc,32,FLEN)
NAN_BOXED(0x7dd41e75,32,FLEN)
NAN_BOXED(0xc11a7ab5,32,FLEN)
NAN_BOXED(0xff7ffffe,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x75000000,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x75000001,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x75000003,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x75000007,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x7500000f,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x7500001f,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x7500003f,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x7500007f,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x750000ff,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x750001ff,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x750003ff,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x750007ff,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x75000fff,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x75001fff,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x75003fff,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x75007fff,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x7500ffff,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x7501ffff,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x7503ffff,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x7507ffff,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x750fffff,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x751fffff,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x753fffff,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x75400000,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x75600000,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x75700000,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x75780000,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x757c0000,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x757e0000,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x757f0000,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x757f8000,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x757fc000,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x757fe000,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x757ff000,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x757ff800,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x757ffc00,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x757ffe00,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x757fff00,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x757fff80,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x757fffc0,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x757fffe0,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x757ffff0,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x757ffff8,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x757ffffc,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x757ffffe,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x757fffff,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x7f000001,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x7f000003,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x7f000007,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x7f199999,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x7f249249,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x7f333333,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x7f36db6d,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x7f3bbbbb,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x7f444444,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x7f4ccccc,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x7f5b6db6,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x7f666666,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x7f6db6db,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x7f7ffff8,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x7f7ffffc,32,FLEN)
NAN_BOXED(0x7dd4f0ed,32,FLEN)
NAN_BOXED(0x4119e206,32,FLEN)
NAN_BOXED(0x7f7ffffe,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb8000000,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb8000001,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb8000003,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb8000007,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb800000f,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb800001f,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb800003f,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb800007f,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb80000ff,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb80001ff,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb80003ff,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb80007ff,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb8000fff,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb8001fff,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb8003fff,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb8007fff,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb800ffff,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb801ffff,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb803ffff,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb807ffff,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb80fffff,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb81fffff,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb83fffff,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb8400000,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb8600000,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb8700000,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb8780000,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb87c0000,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb87e0000,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb87f0000,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb87f8000,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb87fc000,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb87fe000,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb87ff000,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb87ff800,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb87ffc00,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb87ffe00,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb87fff00,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb87fff80,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb87fffc0,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb87fffe0,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb87ffff0,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb87ffff8,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb87ffffc,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb87ffffe,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xb87fffff,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7dd686a2,32,FLEN)
NAN_BOXED(0x8118bf01,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x79800000,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x79800001,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x79800003,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x79800007,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x7980000f,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x7980001f,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x7980003f,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x7980007f,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x798000ff,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x798001ff,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x798003ff,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x798007ff,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x79800fff,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x79801fff,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x79803fff,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x79807fff,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x7980ffff,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x7981ffff,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x7983ffff,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x7987ffff,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x798fffff,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x799fffff,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x79bfffff,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x79c00000,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x79e00000,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x79f00000,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x79f80000,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x79fc0000,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x79fe0000,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x79ff0000,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x79ff8000,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x79ffc000,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x79ffe000,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x79fff000,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x79fff800,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x79fffc00,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x79fffe00,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x79ffff00,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x79ffff80,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x79ffffc0,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x79ffffe0,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x79fffff0,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x79fffff8,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x79fffffc,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x79fffffe,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x79ffffff,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x7f000001,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x7f000003,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x7f000007,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x7f199999,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x7f249249,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x7f333333,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x7f36db6d,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x7f3bbbbb,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x7f444444,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x7f4ccccc,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x7f5b6db6,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x7f666666,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x7f6db6db,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x7f7ffff8,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x7f7ffffc,32,FLEN)
NAN_BOXED(0x7dd6fcf2,32,FLEN)
NAN_BOXED(0x41186af1,32,FLEN)
NAN_BOXED(0x7f7ffffe,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800001,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800003,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800007,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x999999,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa49249,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb33333,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb6db6d,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbbbbbb,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc44444,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcccccc,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdb6db6,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe66666,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xedb6db,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffff8,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffc,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffe,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3800000,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3800001,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3800003,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3800007,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x380000f,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x380001f,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x380003f,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x380007f,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x38000ff,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x38001ff,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x38003ff,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x38007ff,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3800fff,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3801fff,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3803fff,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3807fff,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x380ffff,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x381ffff,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x383ffff,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x387ffff,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x38fffff,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x39fffff,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3bfffff,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3c00000,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3e00000,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3f00000,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3f80000,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fc0000,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fe0000,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ff0000,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ff8000,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffc000,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffe000,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fff000,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fff800,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fffc00,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fffe00,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffff00,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffff80,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffffc0,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffffe0,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fffff0,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fffff8,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fffffc,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fffffe,32,FLEN)
NAN_BOXED(0x7dd76a65,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffffff,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf2000000,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf2000001,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf2000003,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf2000007,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf200000f,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf200001f,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf200003f,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf200007f,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf20000ff,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf20001ff,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf20003ff,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf20007ff,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf2000fff,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf2001fff,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf2003fff,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf2007fff,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf200ffff,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf201ffff,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf203ffff,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf207ffff,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf20fffff,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf21fffff,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf23fffff,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf2400000,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf2600000,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf2700000,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf2780000,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf27c0000,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf27e0000,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf27f0000,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf27f8000,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf27fc000,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf27fe000,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf27ff000,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf27ff800,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf27ffc00,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf27ffe00,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf27fff00,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf27fff80,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf27fffc0,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf27fffe0,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf27ffff0,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf27ffff8,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf27ffffc,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf27ffffe,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xf27fffff,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xff000001,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xff000003,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xff000007,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xff199999,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xff249249,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xff333333,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xff36db6d,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xff3bbbbb,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xff444444,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xff4ccccc,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xff5b6db6,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xff666666,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xff6db6db,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xff7ffff8,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xff7ffffc,32,FLEN)
NAN_BOXED(0x7dd7ae96,32,FLEN)
NAN_BOXED(0xc117ed68,32,FLEN)
NAN_BOXED(0xff7ffffe,32,FLEN)
NAN_BOXED(0x7dd923f1,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80800001,32,FLEN)
NAN_BOXED(0x7dd923f1,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80800003,32,FLEN)
NAN_BOXED(0x7dd923f1,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80800007,32,FLEN)
NAN_BOXED(0x7dd923f1,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80999999,32,FLEN)
NAN_BOXED(0x7dd923f1,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80a49249,32,FLEN)
NAN_BOXED(0x7dd923f1,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80b33333,32,FLEN)
NAN_BOXED(0x7dd923f1,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80b6db6d,32,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;


signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_2:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_3:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_4:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_5:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_6:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine

tsig_begin_canary:
CANARY;
tsig_begin_canary:
CANARY;
mtrap_sigptr:
    .fill 64*(XLEN/32),4,0xdeadbeef
tsig_end_canary:
CANARY;
tsig_end_canary:
CANARY;

#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif

sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
