
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.7.1
// timestamp : Fri Jun 17 14:18:09 2022 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /scratch/pawan/work/normalised/RV32F/fnmadd.s.cgf \
 \
//                  -- xlen 32  \
//                  --randomize \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fnmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fnmadd_b15 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fnmadd_b15)
RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmadd_b15)
RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_20736:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5750c0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4c17cf and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed750c0; op2val:0x804c17cf;
op3val:0xa17fffc0; valaddr_reg:x3; val_offset:62208*0 + 3*-1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62208*0 + 3*0*FLEN/8, x4, x1, x2)

inst_20737:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5750c0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4c17cf and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed750c0; op2val:0x804c17cf;
op3val:0xa17fffe0; valaddr_reg:x3; val_offset:62211*0 + 3*0*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62211*0 + 3*1*FLEN/8, x4, x1, x2)

inst_20738:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5750c0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4c17cf and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed750c0; op2val:0x804c17cf;
op3val:0xa17ffff0; valaddr_reg:x3; val_offset:62214*0 + 3*1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62214*0 + 3*2*FLEN/8, x4, x1, x2)

inst_20739:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5750c0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4c17cf and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed750c0; op2val:0x804c17cf;
op3val:0xa17ffff8; valaddr_reg:x3; val_offset:62217*0 + 3*2*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62217*0 + 3*3*FLEN/8, x4, x1, x2)

inst_20740:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5750c0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4c17cf and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed750c0; op2val:0x804c17cf;
op3val:0xa17ffffc; valaddr_reg:x3; val_offset:62220*0 + 3*3*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62220*0 + 3*4*FLEN/8, x4, x1, x2)

inst_20741:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5750c0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4c17cf and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed750c0; op2val:0x804c17cf;
op3val:0xa17ffffe; valaddr_reg:x3; val_offset:62223*0 + 3*4*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62223*0 + 3*5*FLEN/8, x4, x1, x2)

inst_20742:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5750c0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4c17cf and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed750c0; op2val:0x804c17cf;
op3val:0xa17fffff; valaddr_reg:x3; val_offset:62226*0 + 3*5*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62226*0 + 3*6*FLEN/8, x4, x1, x2)

inst_20743:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5750c0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4c17cf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed750c0; op2val:0x804c17cf;
op3val:0xbf800001; valaddr_reg:x3; val_offset:62229*0 + 3*6*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62229*0 + 3*7*FLEN/8, x4, x1, x2)

inst_20744:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5750c0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4c17cf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed750c0; op2val:0x804c17cf;
op3val:0xbf800003; valaddr_reg:x3; val_offset:62232*0 + 3*7*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62232*0 + 3*8*FLEN/8, x4, x1, x2)

inst_20745:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5750c0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4c17cf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed750c0; op2val:0x804c17cf;
op3val:0xbf800007; valaddr_reg:x3; val_offset:62235*0 + 3*8*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62235*0 + 3*9*FLEN/8, x4, x1, x2)

inst_20746:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5750c0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4c17cf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed750c0; op2val:0x804c17cf;
op3val:0xbf999999; valaddr_reg:x3; val_offset:62238*0 + 3*9*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62238*0 + 3*10*FLEN/8, x4, x1, x2)

inst_20747:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5750c0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4c17cf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed750c0; op2val:0x804c17cf;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:62241*0 + 3*10*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62241*0 + 3*11*FLEN/8, x4, x1, x2)

inst_20748:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5750c0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4c17cf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed750c0; op2val:0x804c17cf;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:62244*0 + 3*11*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62244*0 + 3*12*FLEN/8, x4, x1, x2)

inst_20749:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5750c0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4c17cf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed750c0; op2val:0x804c17cf;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:62247*0 + 3*12*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62247*0 + 3*13*FLEN/8, x4, x1, x2)

inst_20750:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5750c0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4c17cf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed750c0; op2val:0x804c17cf;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:62250*0 + 3*13*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62250*0 + 3*14*FLEN/8, x4, x1, x2)

inst_20751:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5750c0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4c17cf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed750c0; op2val:0x804c17cf;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:62253*0 + 3*14*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62253*0 + 3*15*FLEN/8, x4, x1, x2)

inst_20752:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5750c0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4c17cf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed750c0; op2val:0x804c17cf;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:62256*0 + 3*15*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62256*0 + 3*16*FLEN/8, x4, x1, x2)

inst_20753:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5750c0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4c17cf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed750c0; op2val:0x804c17cf;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:62259*0 + 3*16*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62259*0 + 3*17*FLEN/8, x4, x1, x2)

inst_20754:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5750c0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4c17cf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed750c0; op2val:0x804c17cf;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:62262*0 + 3*17*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62262*0 + 3*18*FLEN/8, x4, x1, x2)

inst_20755:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5750c0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4c17cf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed750c0; op2val:0x804c17cf;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:62265*0 + 3*18*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62265*0 + 3*19*FLEN/8, x4, x1, x2)

inst_20756:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5750c0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4c17cf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed750c0; op2val:0x804c17cf;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:62268*0 + 3*19*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62268*0 + 3*20*FLEN/8, x4, x1, x2)

inst_20757:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5750c0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4c17cf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed750c0; op2val:0x804c17cf;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:62271*0 + 3*20*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62271*0 + 3*21*FLEN/8, x4, x1, x2)

inst_20758:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5750c0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4c17cf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed750c0; op2val:0x804c17cf;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:62274*0 + 3*21*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62274*0 + 3*22*FLEN/8, x4, x1, x2)

inst_20759:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xae800000; valaddr_reg:x3; val_offset:62277*0 + 3*22*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62277*0 + 3*23*FLEN/8, x4, x1, x2)

inst_20760:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xae800001; valaddr_reg:x3; val_offset:62280*0 + 3*23*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62280*0 + 3*24*FLEN/8, x4, x1, x2)

inst_20761:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xae800003; valaddr_reg:x3; val_offset:62283*0 + 3*24*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62283*0 + 3*25*FLEN/8, x4, x1, x2)

inst_20762:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xae800007; valaddr_reg:x3; val_offset:62286*0 + 3*25*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62286*0 + 3*26*FLEN/8, x4, x1, x2)

inst_20763:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xae80000f; valaddr_reg:x3; val_offset:62289*0 + 3*26*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62289*0 + 3*27*FLEN/8, x4, x1, x2)

inst_20764:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xae80001f; valaddr_reg:x3; val_offset:62292*0 + 3*27*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62292*0 + 3*28*FLEN/8, x4, x1, x2)

inst_20765:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xae80003f; valaddr_reg:x3; val_offset:62295*0 + 3*28*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62295*0 + 3*29*FLEN/8, x4, x1, x2)

inst_20766:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xae80007f; valaddr_reg:x3; val_offset:62298*0 + 3*29*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62298*0 + 3*30*FLEN/8, x4, x1, x2)

inst_20767:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xae8000ff; valaddr_reg:x3; val_offset:62301*0 + 3*30*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62301*0 + 3*31*FLEN/8, x4, x1, x2)

inst_20768:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xae8001ff; valaddr_reg:x3; val_offset:62304*0 + 3*31*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62304*0 + 3*32*FLEN/8, x4, x1, x2)

inst_20769:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xae8003ff; valaddr_reg:x3; val_offset:62307*0 + 3*32*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62307*0 + 3*33*FLEN/8, x4, x1, x2)

inst_20770:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xae8007ff; valaddr_reg:x3; val_offset:62310*0 + 3*33*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62310*0 + 3*34*FLEN/8, x4, x1, x2)

inst_20771:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xae800fff; valaddr_reg:x3; val_offset:62313*0 + 3*34*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62313*0 + 3*35*FLEN/8, x4, x1, x2)

inst_20772:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xae801fff; valaddr_reg:x3; val_offset:62316*0 + 3*35*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62316*0 + 3*36*FLEN/8, x4, x1, x2)

inst_20773:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xae803fff; valaddr_reg:x3; val_offset:62319*0 + 3*36*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62319*0 + 3*37*FLEN/8, x4, x1, x2)

inst_20774:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xae807fff; valaddr_reg:x3; val_offset:62322*0 + 3*37*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62322*0 + 3*38*FLEN/8, x4, x1, x2)

inst_20775:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xae80ffff; valaddr_reg:x3; val_offset:62325*0 + 3*38*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62325*0 + 3*39*FLEN/8, x4, x1, x2)

inst_20776:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xae81ffff; valaddr_reg:x3; val_offset:62328*0 + 3*39*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62328*0 + 3*40*FLEN/8, x4, x1, x2)

inst_20777:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xae83ffff; valaddr_reg:x3; val_offset:62331*0 + 3*40*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62331*0 + 3*41*FLEN/8, x4, x1, x2)

inst_20778:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xae87ffff; valaddr_reg:x3; val_offset:62334*0 + 3*41*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62334*0 + 3*42*FLEN/8, x4, x1, x2)

inst_20779:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xae8fffff; valaddr_reg:x3; val_offset:62337*0 + 3*42*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62337*0 + 3*43*FLEN/8, x4, x1, x2)

inst_20780:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xae9fffff; valaddr_reg:x3; val_offset:62340*0 + 3*43*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62340*0 + 3*44*FLEN/8, x4, x1, x2)

inst_20781:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xaebfffff; valaddr_reg:x3; val_offset:62343*0 + 3*44*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62343*0 + 3*45*FLEN/8, x4, x1, x2)

inst_20782:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xaec00000; valaddr_reg:x3; val_offset:62346*0 + 3*45*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62346*0 + 3*46*FLEN/8, x4, x1, x2)

inst_20783:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xaee00000; valaddr_reg:x3; val_offset:62349*0 + 3*46*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62349*0 + 3*47*FLEN/8, x4, x1, x2)

inst_20784:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xaef00000; valaddr_reg:x3; val_offset:62352*0 + 3*47*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62352*0 + 3*48*FLEN/8, x4, x1, x2)

inst_20785:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xaef80000; valaddr_reg:x3; val_offset:62355*0 + 3*48*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62355*0 + 3*49*FLEN/8, x4, x1, x2)

inst_20786:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xaefc0000; valaddr_reg:x3; val_offset:62358*0 + 3*49*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62358*0 + 3*50*FLEN/8, x4, x1, x2)

inst_20787:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xaefe0000; valaddr_reg:x3; val_offset:62361*0 + 3*50*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62361*0 + 3*51*FLEN/8, x4, x1, x2)

inst_20788:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xaeff0000; valaddr_reg:x3; val_offset:62364*0 + 3*51*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62364*0 + 3*52*FLEN/8, x4, x1, x2)

inst_20789:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xaeff8000; valaddr_reg:x3; val_offset:62367*0 + 3*52*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62367*0 + 3*53*FLEN/8, x4, x1, x2)

inst_20790:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xaeffc000; valaddr_reg:x3; val_offset:62370*0 + 3*53*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62370*0 + 3*54*FLEN/8, x4, x1, x2)

inst_20791:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xaeffe000; valaddr_reg:x3; val_offset:62373*0 + 3*54*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62373*0 + 3*55*FLEN/8, x4, x1, x2)

inst_20792:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xaefff000; valaddr_reg:x3; val_offset:62376*0 + 3*55*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62376*0 + 3*56*FLEN/8, x4, x1, x2)

inst_20793:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xaefff800; valaddr_reg:x3; val_offset:62379*0 + 3*56*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62379*0 + 3*57*FLEN/8, x4, x1, x2)

inst_20794:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xaefffc00; valaddr_reg:x3; val_offset:62382*0 + 3*57*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62382*0 + 3*58*FLEN/8, x4, x1, x2)

inst_20795:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xaefffe00; valaddr_reg:x3; val_offset:62385*0 + 3*58*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62385*0 + 3*59*FLEN/8, x4, x1, x2)

inst_20796:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xaeffff00; valaddr_reg:x3; val_offset:62388*0 + 3*59*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62388*0 + 3*60*FLEN/8, x4, x1, x2)

inst_20797:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xaeffff80; valaddr_reg:x3; val_offset:62391*0 + 3*60*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62391*0 + 3*61*FLEN/8, x4, x1, x2)

inst_20798:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xaeffffc0; valaddr_reg:x3; val_offset:62394*0 + 3*61*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62394*0 + 3*62*FLEN/8, x4, x1, x2)

inst_20799:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xaeffffe0; valaddr_reg:x3; val_offset:62397*0 + 3*62*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62397*0 + 3*63*FLEN/8, x4, x1, x2)

inst_20800:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xaefffff0; valaddr_reg:x3; val_offset:62400*0 + 3*63*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62400*0 + 3*64*FLEN/8, x4, x1, x2)

inst_20801:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xaefffff8; valaddr_reg:x3; val_offset:62403*0 + 3*64*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62403*0 + 3*65*FLEN/8, x4, x1, x2)

inst_20802:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xaefffffc; valaddr_reg:x3; val_offset:62406*0 + 3*65*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62406*0 + 3*66*FLEN/8, x4, x1, x2)

inst_20803:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xaefffffe; valaddr_reg:x3; val_offset:62409*0 + 3*66*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62409*0 + 3*67*FLEN/8, x4, x1, x2)

inst_20804:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xaeffffff; valaddr_reg:x3; val_offset:62412*0 + 3*67*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62412*0 + 3*68*FLEN/8, x4, x1, x2)

inst_20805:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xbf800001; valaddr_reg:x3; val_offset:62415*0 + 3*68*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62415*0 + 3*69*FLEN/8, x4, x1, x2)

inst_20806:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xbf800003; valaddr_reg:x3; val_offset:62418*0 + 3*69*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62418*0 + 3*70*FLEN/8, x4, x1, x2)

inst_20807:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xbf800007; valaddr_reg:x3; val_offset:62421*0 + 3*70*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62421*0 + 3*71*FLEN/8, x4, x1, x2)

inst_20808:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xbf999999; valaddr_reg:x3; val_offset:62424*0 + 3*71*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62424*0 + 3*72*FLEN/8, x4, x1, x2)

inst_20809:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:62427*0 + 3*72*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62427*0 + 3*73*FLEN/8, x4, x1, x2)

inst_20810:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:62430*0 + 3*73*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62430*0 + 3*74*FLEN/8, x4, x1, x2)

inst_20811:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:62433*0 + 3*74*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62433*0 + 3*75*FLEN/8, x4, x1, x2)

inst_20812:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:62436*0 + 3*75*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62436*0 + 3*76*FLEN/8, x4, x1, x2)

inst_20813:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:62439*0 + 3*76*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62439*0 + 3*77*FLEN/8, x4, x1, x2)

inst_20814:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:62442*0 + 3*77*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62442*0 + 3*78*FLEN/8, x4, x1, x2)

inst_20815:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:62445*0 + 3*78*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62445*0 + 3*79*FLEN/8, x4, x1, x2)

inst_20816:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:62448*0 + 3*79*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62448*0 + 3*80*FLEN/8, x4, x1, x2)

inst_20817:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:62451*0 + 3*80*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62451*0 + 3*81*FLEN/8, x4, x1, x2)

inst_20818:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:62454*0 + 3*81*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62454*0 + 3*82*FLEN/8, x4, x1, x2)

inst_20819:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:62457*0 + 3*82*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62457*0 + 3*83*FLEN/8, x4, x1, x2)

inst_20820:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5852a0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4bbd1a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed852a0; op2val:0x804bbd1a;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:62460*0 + 3*83*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62460*0 + 3*84*FLEN/8, x4, x1, x2)

inst_20821:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x3; val_offset:62463*0 + 3*84*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62463*0 + 3*85*FLEN/8, x4, x1, x2)

inst_20822:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x3; val_offset:62466*0 + 3*85*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62466*0 + 3*86*FLEN/8, x4, x1, x2)

inst_20823:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x3; val_offset:62469*0 + 3*86*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62469*0 + 3*87*FLEN/8, x4, x1, x2)

inst_20824:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x3; val_offset:62472*0 + 3*87*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62472*0 + 3*88*FLEN/8, x4, x1, x2)

inst_20825:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x3; val_offset:62475*0 + 3*88*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62475*0 + 3*89*FLEN/8, x4, x1, x2)

inst_20826:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x3; val_offset:62478*0 + 3*89*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62478*0 + 3*90*FLEN/8, x4, x1, x2)

inst_20827:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x3; val_offset:62481*0 + 3*90*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62481*0 + 3*91*FLEN/8, x4, x1, x2)

inst_20828:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x3; val_offset:62484*0 + 3*91*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62484*0 + 3*92*FLEN/8, x4, x1, x2)

inst_20829:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x3; val_offset:62487*0 + 3*92*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62487*0 + 3*93*FLEN/8, x4, x1, x2)

inst_20830:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x3; val_offset:62490*0 + 3*93*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62490*0 + 3*94*FLEN/8, x4, x1, x2)

inst_20831:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x3; val_offset:62493*0 + 3*94*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62493*0 + 3*95*FLEN/8, x4, x1, x2)

inst_20832:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x3; val_offset:62496*0 + 3*95*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62496*0 + 3*96*FLEN/8, x4, x1, x2)

inst_20833:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x3; val_offset:62499*0 + 3*96*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62499*0 + 3*97*FLEN/8, x4, x1, x2)

inst_20834:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x3; val_offset:62502*0 + 3*97*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62502*0 + 3*98*FLEN/8, x4, x1, x2)

inst_20835:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x3; val_offset:62505*0 + 3*98*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62505*0 + 3*99*FLEN/8, x4, x1, x2)

inst_20836:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x3; val_offset:62508*0 + 3*99*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62508*0 + 3*100*FLEN/8, x4, x1, x2)

inst_20837:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80800000; valaddr_reg:x3; val_offset:62511*0 + 3*100*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62511*0 + 3*101*FLEN/8, x4, x1, x2)

inst_20838:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80800001; valaddr_reg:x3; val_offset:62514*0 + 3*101*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62514*0 + 3*102*FLEN/8, x4, x1, x2)

inst_20839:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80800003; valaddr_reg:x3; val_offset:62517*0 + 3*102*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62517*0 + 3*103*FLEN/8, x4, x1, x2)

inst_20840:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80800007; valaddr_reg:x3; val_offset:62520*0 + 3*103*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62520*0 + 3*104*FLEN/8, x4, x1, x2)

inst_20841:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x8080000f; valaddr_reg:x3; val_offset:62523*0 + 3*104*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62523*0 + 3*105*FLEN/8, x4, x1, x2)

inst_20842:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x8080001f; valaddr_reg:x3; val_offset:62526*0 + 3*105*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62526*0 + 3*106*FLEN/8, x4, x1, x2)

inst_20843:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x8080003f; valaddr_reg:x3; val_offset:62529*0 + 3*106*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62529*0 + 3*107*FLEN/8, x4, x1, x2)

inst_20844:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x8080007f; valaddr_reg:x3; val_offset:62532*0 + 3*107*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62532*0 + 3*108*FLEN/8, x4, x1, x2)

inst_20845:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x808000ff; valaddr_reg:x3; val_offset:62535*0 + 3*108*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62535*0 + 3*109*FLEN/8, x4, x1, x2)

inst_20846:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x808001ff; valaddr_reg:x3; val_offset:62538*0 + 3*109*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62538*0 + 3*110*FLEN/8, x4, x1, x2)

inst_20847:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x808003ff; valaddr_reg:x3; val_offset:62541*0 + 3*110*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62541*0 + 3*111*FLEN/8, x4, x1, x2)

inst_20848:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x808007ff; valaddr_reg:x3; val_offset:62544*0 + 3*111*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62544*0 + 3*112*FLEN/8, x4, x1, x2)

inst_20849:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80800fff; valaddr_reg:x3; val_offset:62547*0 + 3*112*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62547*0 + 3*113*FLEN/8, x4, x1, x2)

inst_20850:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80801fff; valaddr_reg:x3; val_offset:62550*0 + 3*113*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62550*0 + 3*114*FLEN/8, x4, x1, x2)

inst_20851:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80803fff; valaddr_reg:x3; val_offset:62553*0 + 3*114*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62553*0 + 3*115*FLEN/8, x4, x1, x2)

inst_20852:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80807fff; valaddr_reg:x3; val_offset:62556*0 + 3*115*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62556*0 + 3*116*FLEN/8, x4, x1, x2)

inst_20853:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x8080ffff; valaddr_reg:x3; val_offset:62559*0 + 3*116*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62559*0 + 3*117*FLEN/8, x4, x1, x2)

inst_20854:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x8081ffff; valaddr_reg:x3; val_offset:62562*0 + 3*117*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62562*0 + 3*118*FLEN/8, x4, x1, x2)

inst_20855:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x8083ffff; valaddr_reg:x3; val_offset:62565*0 + 3*118*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62565*0 + 3*119*FLEN/8, x4, x1, x2)

inst_20856:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x8087ffff; valaddr_reg:x3; val_offset:62568*0 + 3*119*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62568*0 + 3*120*FLEN/8, x4, x1, x2)

inst_20857:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x808fffff; valaddr_reg:x3; val_offset:62571*0 + 3*120*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62571*0 + 3*121*FLEN/8, x4, x1, x2)

inst_20858:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x809fffff; valaddr_reg:x3; val_offset:62574*0 + 3*121*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62574*0 + 3*122*FLEN/8, x4, x1, x2)

inst_20859:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80bfffff; valaddr_reg:x3; val_offset:62577*0 + 3*122*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62577*0 + 3*123*FLEN/8, x4, x1, x2)

inst_20860:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80c00000; valaddr_reg:x3; val_offset:62580*0 + 3*123*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62580*0 + 3*124*FLEN/8, x4, x1, x2)

inst_20861:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80e00000; valaddr_reg:x3; val_offset:62583*0 + 3*124*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62583*0 + 3*125*FLEN/8, x4, x1, x2)

inst_20862:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80f00000; valaddr_reg:x3; val_offset:62586*0 + 3*125*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62586*0 + 3*126*FLEN/8, x4, x1, x2)

inst_20863:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80f80000; valaddr_reg:x3; val_offset:62589*0 + 3*126*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62589*0 + 3*127*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_2)

inst_20864:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80fc0000; valaddr_reg:x3; val_offset:62592*0 + 3*127*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62592*0 + 3*128*FLEN/8, x4, x1, x2)

inst_20865:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80fe0000; valaddr_reg:x3; val_offset:62595*0 + 3*128*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62595*0 + 3*129*FLEN/8, x4, x1, x2)

inst_20866:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80ff0000; valaddr_reg:x3; val_offset:62598*0 + 3*129*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62598*0 + 3*130*FLEN/8, x4, x1, x2)

inst_20867:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80ff8000; valaddr_reg:x3; val_offset:62601*0 + 3*130*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62601*0 + 3*131*FLEN/8, x4, x1, x2)

inst_20868:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80ffc000; valaddr_reg:x3; val_offset:62604*0 + 3*131*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62604*0 + 3*132*FLEN/8, x4, x1, x2)

inst_20869:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80ffe000; valaddr_reg:x3; val_offset:62607*0 + 3*132*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62607*0 + 3*133*FLEN/8, x4, x1, x2)

inst_20870:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80fff000; valaddr_reg:x3; val_offset:62610*0 + 3*133*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62610*0 + 3*134*FLEN/8, x4, x1, x2)

inst_20871:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80fff800; valaddr_reg:x3; val_offset:62613*0 + 3*134*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62613*0 + 3*135*FLEN/8, x4, x1, x2)

inst_20872:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80fffc00; valaddr_reg:x3; val_offset:62616*0 + 3*135*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62616*0 + 3*136*FLEN/8, x4, x1, x2)

inst_20873:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80fffe00; valaddr_reg:x3; val_offset:62619*0 + 3*136*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62619*0 + 3*137*FLEN/8, x4, x1, x2)

inst_20874:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80ffff00; valaddr_reg:x3; val_offset:62622*0 + 3*137*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62622*0 + 3*138*FLEN/8, x4, x1, x2)

inst_20875:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80ffff80; valaddr_reg:x3; val_offset:62625*0 + 3*138*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62625*0 + 3*139*FLEN/8, x4, x1, x2)

inst_20876:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80ffffc0; valaddr_reg:x3; val_offset:62628*0 + 3*139*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62628*0 + 3*140*FLEN/8, x4, x1, x2)

inst_20877:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80ffffe0; valaddr_reg:x3; val_offset:62631*0 + 3*140*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62631*0 + 3*141*FLEN/8, x4, x1, x2)

inst_20878:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80fffff0; valaddr_reg:x3; val_offset:62634*0 + 3*141*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62634*0 + 3*142*FLEN/8, x4, x1, x2)

inst_20879:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80fffff8; valaddr_reg:x3; val_offset:62637*0 + 3*142*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62637*0 + 3*143*FLEN/8, x4, x1, x2)

inst_20880:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80fffffc; valaddr_reg:x3; val_offset:62640*0 + 3*143*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62640*0 + 3*144*FLEN/8, x4, x1, x2)

inst_20881:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80fffffe; valaddr_reg:x3; val_offset:62643*0 + 3*144*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62643*0 + 3*145*FLEN/8, x4, x1, x2)

inst_20882:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x589a86 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed89a86; op2val:0x80000000;
op3val:0x80ffffff; valaddr_reg:x3; val_offset:62646*0 + 3*145*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62646*0 + 3*146*FLEN/8, x4, x1, x2)

inst_20883:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa0000000; valaddr_reg:x3; val_offset:62649*0 + 3*146*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62649*0 + 3*147*FLEN/8, x4, x1, x2)

inst_20884:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa0000001; valaddr_reg:x3; val_offset:62652*0 + 3*147*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62652*0 + 3*148*FLEN/8, x4, x1, x2)

inst_20885:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa0000003; valaddr_reg:x3; val_offset:62655*0 + 3*148*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62655*0 + 3*149*FLEN/8, x4, x1, x2)

inst_20886:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa0000007; valaddr_reg:x3; val_offset:62658*0 + 3*149*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62658*0 + 3*150*FLEN/8, x4, x1, x2)

inst_20887:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa000000f; valaddr_reg:x3; val_offset:62661*0 + 3*150*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62661*0 + 3*151*FLEN/8, x4, x1, x2)

inst_20888:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa000001f; valaddr_reg:x3; val_offset:62664*0 + 3*151*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62664*0 + 3*152*FLEN/8, x4, x1, x2)

inst_20889:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa000003f; valaddr_reg:x3; val_offset:62667*0 + 3*152*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62667*0 + 3*153*FLEN/8, x4, x1, x2)

inst_20890:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa000007f; valaddr_reg:x3; val_offset:62670*0 + 3*153*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62670*0 + 3*154*FLEN/8, x4, x1, x2)

inst_20891:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa00000ff; valaddr_reg:x3; val_offset:62673*0 + 3*154*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62673*0 + 3*155*FLEN/8, x4, x1, x2)

inst_20892:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa00001ff; valaddr_reg:x3; val_offset:62676*0 + 3*155*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62676*0 + 3*156*FLEN/8, x4, x1, x2)

inst_20893:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa00003ff; valaddr_reg:x3; val_offset:62679*0 + 3*156*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62679*0 + 3*157*FLEN/8, x4, x1, x2)

inst_20894:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa00007ff; valaddr_reg:x3; val_offset:62682*0 + 3*157*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62682*0 + 3*158*FLEN/8, x4, x1, x2)

inst_20895:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa0000fff; valaddr_reg:x3; val_offset:62685*0 + 3*158*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62685*0 + 3*159*FLEN/8, x4, x1, x2)

inst_20896:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa0001fff; valaddr_reg:x3; val_offset:62688*0 + 3*159*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62688*0 + 3*160*FLEN/8, x4, x1, x2)

inst_20897:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa0003fff; valaddr_reg:x3; val_offset:62691*0 + 3*160*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62691*0 + 3*161*FLEN/8, x4, x1, x2)

inst_20898:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa0007fff; valaddr_reg:x3; val_offset:62694*0 + 3*161*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62694*0 + 3*162*FLEN/8, x4, x1, x2)

inst_20899:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa000ffff; valaddr_reg:x3; val_offset:62697*0 + 3*162*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62697*0 + 3*163*FLEN/8, x4, x1, x2)

inst_20900:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa001ffff; valaddr_reg:x3; val_offset:62700*0 + 3*163*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62700*0 + 3*164*FLEN/8, x4, x1, x2)

inst_20901:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa003ffff; valaddr_reg:x3; val_offset:62703*0 + 3*164*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62703*0 + 3*165*FLEN/8, x4, x1, x2)

inst_20902:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa007ffff; valaddr_reg:x3; val_offset:62706*0 + 3*165*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62706*0 + 3*166*FLEN/8, x4, x1, x2)

inst_20903:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa00fffff; valaddr_reg:x3; val_offset:62709*0 + 3*166*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62709*0 + 3*167*FLEN/8, x4, x1, x2)

inst_20904:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa01fffff; valaddr_reg:x3; val_offset:62712*0 + 3*167*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62712*0 + 3*168*FLEN/8, x4, x1, x2)

inst_20905:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa03fffff; valaddr_reg:x3; val_offset:62715*0 + 3*168*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62715*0 + 3*169*FLEN/8, x4, x1, x2)

inst_20906:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa0400000; valaddr_reg:x3; val_offset:62718*0 + 3*169*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62718*0 + 3*170*FLEN/8, x4, x1, x2)

inst_20907:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa0600000; valaddr_reg:x3; val_offset:62721*0 + 3*170*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62721*0 + 3*171*FLEN/8, x4, x1, x2)

inst_20908:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa0700000; valaddr_reg:x3; val_offset:62724*0 + 3*171*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62724*0 + 3*172*FLEN/8, x4, x1, x2)

inst_20909:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa0780000; valaddr_reg:x3; val_offset:62727*0 + 3*172*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62727*0 + 3*173*FLEN/8, x4, x1, x2)

inst_20910:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa07c0000; valaddr_reg:x3; val_offset:62730*0 + 3*173*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62730*0 + 3*174*FLEN/8, x4, x1, x2)

inst_20911:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa07e0000; valaddr_reg:x3; val_offset:62733*0 + 3*174*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62733*0 + 3*175*FLEN/8, x4, x1, x2)

inst_20912:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa07f0000; valaddr_reg:x3; val_offset:62736*0 + 3*175*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62736*0 + 3*176*FLEN/8, x4, x1, x2)

inst_20913:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa07f8000; valaddr_reg:x3; val_offset:62739*0 + 3*176*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62739*0 + 3*177*FLEN/8, x4, x1, x2)

inst_20914:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa07fc000; valaddr_reg:x3; val_offset:62742*0 + 3*177*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62742*0 + 3*178*FLEN/8, x4, x1, x2)

inst_20915:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa07fe000; valaddr_reg:x3; val_offset:62745*0 + 3*178*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62745*0 + 3*179*FLEN/8, x4, x1, x2)

inst_20916:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa07ff000; valaddr_reg:x3; val_offset:62748*0 + 3*179*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62748*0 + 3*180*FLEN/8, x4, x1, x2)

inst_20917:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa07ff800; valaddr_reg:x3; val_offset:62751*0 + 3*180*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62751*0 + 3*181*FLEN/8, x4, x1, x2)

inst_20918:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa07ffc00; valaddr_reg:x3; val_offset:62754*0 + 3*181*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62754*0 + 3*182*FLEN/8, x4, x1, x2)

inst_20919:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa07ffe00; valaddr_reg:x3; val_offset:62757*0 + 3*182*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62757*0 + 3*183*FLEN/8, x4, x1, x2)

inst_20920:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa07fff00; valaddr_reg:x3; val_offset:62760*0 + 3*183*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62760*0 + 3*184*FLEN/8, x4, x1, x2)

inst_20921:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa07fff80; valaddr_reg:x3; val_offset:62763*0 + 3*184*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62763*0 + 3*185*FLEN/8, x4, x1, x2)

inst_20922:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa07fffc0; valaddr_reg:x3; val_offset:62766*0 + 3*185*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62766*0 + 3*186*FLEN/8, x4, x1, x2)

inst_20923:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa07fffe0; valaddr_reg:x3; val_offset:62769*0 + 3*186*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62769*0 + 3*187*FLEN/8, x4, x1, x2)

inst_20924:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa07ffff0; valaddr_reg:x3; val_offset:62772*0 + 3*187*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62772*0 + 3*188*FLEN/8, x4, x1, x2)

inst_20925:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa07ffff8; valaddr_reg:x3; val_offset:62775*0 + 3*188*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62775*0 + 3*189*FLEN/8, x4, x1, x2)

inst_20926:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa07ffffc; valaddr_reg:x3; val_offset:62778*0 + 3*189*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62778*0 + 3*190*FLEN/8, x4, x1, x2)

inst_20927:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa07ffffe; valaddr_reg:x3; val_offset:62781*0 + 3*190*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62781*0 + 3*191*FLEN/8, x4, x1, x2)

inst_20928:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xa07fffff; valaddr_reg:x3; val_offset:62784*0 + 3*191*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62784*0 + 3*192*FLEN/8, x4, x1, x2)

inst_20929:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xbf800001; valaddr_reg:x3; val_offset:62787*0 + 3*192*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62787*0 + 3*193*FLEN/8, x4, x1, x2)

inst_20930:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xbf800003; valaddr_reg:x3; val_offset:62790*0 + 3*193*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62790*0 + 3*194*FLEN/8, x4, x1, x2)

inst_20931:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xbf800007; valaddr_reg:x3; val_offset:62793*0 + 3*194*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62793*0 + 3*195*FLEN/8, x4, x1, x2)

inst_20932:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xbf999999; valaddr_reg:x3; val_offset:62796*0 + 3*195*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62796*0 + 3*196*FLEN/8, x4, x1, x2)

inst_20933:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:62799*0 + 3*196*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62799*0 + 3*197*FLEN/8, x4, x1, x2)

inst_20934:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:62802*0 + 3*197*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62802*0 + 3*198*FLEN/8, x4, x1, x2)

inst_20935:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:62805*0 + 3*198*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62805*0 + 3*199*FLEN/8, x4, x1, x2)

inst_20936:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:62808*0 + 3*199*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62808*0 + 3*200*FLEN/8, x4, x1, x2)

inst_20937:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:62811*0 + 3*200*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62811*0 + 3*201*FLEN/8, x4, x1, x2)

inst_20938:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:62814*0 + 3*201*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62814*0 + 3*202*FLEN/8, x4, x1, x2)

inst_20939:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:62817*0 + 3*202*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62817*0 + 3*203*FLEN/8, x4, x1, x2)

inst_20940:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:62820*0 + 3*203*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62820*0 + 3*204*FLEN/8, x4, x1, x2)

inst_20941:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:62823*0 + 3*204*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62823*0 + 3*205*FLEN/8, x4, x1, x2)

inst_20942:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:62826*0 + 3*205*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62826*0 + 3*206*FLEN/8, x4, x1, x2)

inst_20943:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:62829*0 + 3*206*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62829*0 + 3*207*FLEN/8, x4, x1, x2)

inst_20944:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x58efee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b862e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed8efee; op2val:0x804b862e;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:62832*0 + 3*207*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62832*0 + 3*208*FLEN/8, x4, x1, x2)

inst_20945:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xbf800001; valaddr_reg:x3; val_offset:62835*0 + 3*208*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62835*0 + 3*209*FLEN/8, x4, x1, x2)

inst_20946:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xbf800003; valaddr_reg:x3; val_offset:62838*0 + 3*209*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62838*0 + 3*210*FLEN/8, x4, x1, x2)

inst_20947:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xbf800007; valaddr_reg:x3; val_offset:62841*0 + 3*210*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62841*0 + 3*211*FLEN/8, x4, x1, x2)

inst_20948:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xbf999999; valaddr_reg:x3; val_offset:62844*0 + 3*211*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62844*0 + 3*212*FLEN/8, x4, x1, x2)

inst_20949:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:62847*0 + 3*212*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62847*0 + 3*213*FLEN/8, x4, x1, x2)

inst_20950:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:62850*0 + 3*213*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62850*0 + 3*214*FLEN/8, x4, x1, x2)

inst_20951:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:62853*0 + 3*214*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62853*0 + 3*215*FLEN/8, x4, x1, x2)

inst_20952:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:62856*0 + 3*215*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62856*0 + 3*216*FLEN/8, x4, x1, x2)

inst_20953:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:62859*0 + 3*216*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62859*0 + 3*217*FLEN/8, x4, x1, x2)

inst_20954:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:62862*0 + 3*217*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62862*0 + 3*218*FLEN/8, x4, x1, x2)

inst_20955:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:62865*0 + 3*218*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62865*0 + 3*219*FLEN/8, x4, x1, x2)

inst_20956:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:62868*0 + 3*219*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62868*0 + 3*220*FLEN/8, x4, x1, x2)

inst_20957:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:62871*0 + 3*220*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62871*0 + 3*221*FLEN/8, x4, x1, x2)

inst_20958:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:62874*0 + 3*221*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62874*0 + 3*222*FLEN/8, x4, x1, x2)

inst_20959:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:62877*0 + 3*222*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62877*0 + 3*223*FLEN/8, x4, x1, x2)

inst_20960:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:62880*0 + 3*223*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62880*0 + 3*224*FLEN/8, x4, x1, x2)

inst_20961:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc3000000; valaddr_reg:x3; val_offset:62883*0 + 3*224*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62883*0 + 3*225*FLEN/8, x4, x1, x2)

inst_20962:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc3000001; valaddr_reg:x3; val_offset:62886*0 + 3*225*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62886*0 + 3*226*FLEN/8, x4, x1, x2)

inst_20963:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc3000003; valaddr_reg:x3; val_offset:62889*0 + 3*226*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62889*0 + 3*227*FLEN/8, x4, x1, x2)

inst_20964:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc3000007; valaddr_reg:x3; val_offset:62892*0 + 3*227*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62892*0 + 3*228*FLEN/8, x4, x1, x2)

inst_20965:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc300000f; valaddr_reg:x3; val_offset:62895*0 + 3*228*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62895*0 + 3*229*FLEN/8, x4, x1, x2)

inst_20966:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc300001f; valaddr_reg:x3; val_offset:62898*0 + 3*229*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62898*0 + 3*230*FLEN/8, x4, x1, x2)

inst_20967:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc300003f; valaddr_reg:x3; val_offset:62901*0 + 3*230*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62901*0 + 3*231*FLEN/8, x4, x1, x2)

inst_20968:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc300007f; valaddr_reg:x3; val_offset:62904*0 + 3*231*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62904*0 + 3*232*FLEN/8, x4, x1, x2)

inst_20969:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc30000ff; valaddr_reg:x3; val_offset:62907*0 + 3*232*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62907*0 + 3*233*FLEN/8, x4, x1, x2)

inst_20970:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc30001ff; valaddr_reg:x3; val_offset:62910*0 + 3*233*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62910*0 + 3*234*FLEN/8, x4, x1, x2)

inst_20971:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc30003ff; valaddr_reg:x3; val_offset:62913*0 + 3*234*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62913*0 + 3*235*FLEN/8, x4, x1, x2)

inst_20972:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc30007ff; valaddr_reg:x3; val_offset:62916*0 + 3*235*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62916*0 + 3*236*FLEN/8, x4, x1, x2)

inst_20973:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc3000fff; valaddr_reg:x3; val_offset:62919*0 + 3*236*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62919*0 + 3*237*FLEN/8, x4, x1, x2)

inst_20974:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc3001fff; valaddr_reg:x3; val_offset:62922*0 + 3*237*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62922*0 + 3*238*FLEN/8, x4, x1, x2)

inst_20975:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc3003fff; valaddr_reg:x3; val_offset:62925*0 + 3*238*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62925*0 + 3*239*FLEN/8, x4, x1, x2)

inst_20976:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc3007fff; valaddr_reg:x3; val_offset:62928*0 + 3*239*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62928*0 + 3*240*FLEN/8, x4, x1, x2)

inst_20977:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc300ffff; valaddr_reg:x3; val_offset:62931*0 + 3*240*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62931*0 + 3*241*FLEN/8, x4, x1, x2)

inst_20978:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc301ffff; valaddr_reg:x3; val_offset:62934*0 + 3*241*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62934*0 + 3*242*FLEN/8, x4, x1, x2)

inst_20979:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc303ffff; valaddr_reg:x3; val_offset:62937*0 + 3*242*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62937*0 + 3*243*FLEN/8, x4, x1, x2)

inst_20980:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc307ffff; valaddr_reg:x3; val_offset:62940*0 + 3*243*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62940*0 + 3*244*FLEN/8, x4, x1, x2)

inst_20981:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc30fffff; valaddr_reg:x3; val_offset:62943*0 + 3*244*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62943*0 + 3*245*FLEN/8, x4, x1, x2)

inst_20982:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc31fffff; valaddr_reg:x3; val_offset:62946*0 + 3*245*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62946*0 + 3*246*FLEN/8, x4, x1, x2)

inst_20983:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc33fffff; valaddr_reg:x3; val_offset:62949*0 + 3*246*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62949*0 + 3*247*FLEN/8, x4, x1, x2)

inst_20984:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc3400000; valaddr_reg:x3; val_offset:62952*0 + 3*247*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62952*0 + 3*248*FLEN/8, x4, x1, x2)

inst_20985:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc3600000; valaddr_reg:x3; val_offset:62955*0 + 3*248*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62955*0 + 3*249*FLEN/8, x4, x1, x2)

inst_20986:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc3700000; valaddr_reg:x3; val_offset:62958*0 + 3*249*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62958*0 + 3*250*FLEN/8, x4, x1, x2)

inst_20987:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc3780000; valaddr_reg:x3; val_offset:62961*0 + 3*250*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62961*0 + 3*251*FLEN/8, x4, x1, x2)

inst_20988:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc37c0000; valaddr_reg:x3; val_offset:62964*0 + 3*251*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62964*0 + 3*252*FLEN/8, x4, x1, x2)

inst_20989:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc37e0000; valaddr_reg:x3; val_offset:62967*0 + 3*252*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62967*0 + 3*253*FLEN/8, x4, x1, x2)

inst_20990:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc37f0000; valaddr_reg:x3; val_offset:62970*0 + 3*253*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62970*0 + 3*254*FLEN/8, x4, x1, x2)

inst_20991:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc37f8000; valaddr_reg:x3; val_offset:62973*0 + 3*254*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62973*0 + 3*255*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_3)

inst_20992:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc37fc000; valaddr_reg:x3; val_offset:62976*0 + 3*256*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62976*0 + 3*256*FLEN/8, x4, x1, x2)

inst_20993:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc37fe000; valaddr_reg:x3; val_offset:62979*0 + 3*257*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62979*0 + 3*257*FLEN/8, x4, x1, x2)

inst_20994:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc37ff000; valaddr_reg:x3; val_offset:62982*0 + 3*258*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62982*0 + 3*258*FLEN/8, x4, x1, x2)

inst_20995:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc37ff800; valaddr_reg:x3; val_offset:62985*0 + 3*259*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62985*0 + 3*259*FLEN/8, x4, x1, x2)

inst_20996:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc37ffc00; valaddr_reg:x3; val_offset:62988*0 + 3*260*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62988*0 + 3*260*FLEN/8, x4, x1, x2)

inst_20997:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc37ffe00; valaddr_reg:x3; val_offset:62991*0 + 3*261*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62991*0 + 3*261*FLEN/8, x4, x1, x2)

inst_20998:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc37fff00; valaddr_reg:x3; val_offset:62994*0 + 3*262*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62994*0 + 3*262*FLEN/8, x4, x1, x2)

inst_20999:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc37fff80; valaddr_reg:x3; val_offset:62997*0 + 3*263*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62997*0 + 3*263*FLEN/8, x4, x1, x2)

inst_21000:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc37fffc0; valaddr_reg:x3; val_offset:63000*0 + 3*264*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63000*0 + 3*264*FLEN/8, x4, x1, x2)

inst_21001:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc37fffe0; valaddr_reg:x3; val_offset:63003*0 + 3*265*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63003*0 + 3*265*FLEN/8, x4, x1, x2)

inst_21002:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc37ffff0; valaddr_reg:x3; val_offset:63006*0 + 3*266*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63006*0 + 3*266*FLEN/8, x4, x1, x2)

inst_21003:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc37ffff8; valaddr_reg:x3; val_offset:63009*0 + 3*267*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63009*0 + 3*267*FLEN/8, x4, x1, x2)

inst_21004:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc37ffffc; valaddr_reg:x3; val_offset:63012*0 + 3*268*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63012*0 + 3*268*FLEN/8, x4, x1, x2)

inst_21005:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc37ffffe; valaddr_reg:x3; val_offset:63015*0 + 3*269*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63015*0 + 3*269*FLEN/8, x4, x1, x2)

inst_21006:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5954c5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b6323 and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed954c5; op2val:0x804b6323;
op3val:0xc37fffff; valaddr_reg:x3; val_offset:63018*0 + 3*270*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63018*0 + 3*270*FLEN/8, x4, x1, x2)

inst_21007:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x800001; valaddr_reg:x3; val_offset:63021*0 + 3*271*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63021*0 + 3*271*FLEN/8, x4, x1, x2)

inst_21008:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x800003; valaddr_reg:x3; val_offset:63024*0 + 3*272*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63024*0 + 3*272*FLEN/8, x4, x1, x2)

inst_21009:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x800007; valaddr_reg:x3; val_offset:63027*0 + 3*273*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63027*0 + 3*273*FLEN/8, x4, x1, x2)

inst_21010:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x999999; valaddr_reg:x3; val_offset:63030*0 + 3*274*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63030*0 + 3*274*FLEN/8, x4, x1, x2)

inst_21011:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0xa49249; valaddr_reg:x3; val_offset:63033*0 + 3*275*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63033*0 + 3*275*FLEN/8, x4, x1, x2)

inst_21012:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0xb33333; valaddr_reg:x3; val_offset:63036*0 + 3*276*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63036*0 + 3*276*FLEN/8, x4, x1, x2)

inst_21013:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0xb6db6d; valaddr_reg:x3; val_offset:63039*0 + 3*277*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63039*0 + 3*277*FLEN/8, x4, x1, x2)

inst_21014:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0xbbbbbb; valaddr_reg:x3; val_offset:63042*0 + 3*278*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63042*0 + 3*278*FLEN/8, x4, x1, x2)

inst_21015:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0xc44444; valaddr_reg:x3; val_offset:63045*0 + 3*279*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63045*0 + 3*279*FLEN/8, x4, x1, x2)

inst_21016:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0xcccccc; valaddr_reg:x3; val_offset:63048*0 + 3*280*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63048*0 + 3*280*FLEN/8, x4, x1, x2)

inst_21017:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0xdb6db6; valaddr_reg:x3; val_offset:63051*0 + 3*281*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63051*0 + 3*281*FLEN/8, x4, x1, x2)

inst_21018:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0xe66666; valaddr_reg:x3; val_offset:63054*0 + 3*282*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63054*0 + 3*282*FLEN/8, x4, x1, x2)

inst_21019:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0xedb6db; valaddr_reg:x3; val_offset:63057*0 + 3*283*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63057*0 + 3*283*FLEN/8, x4, x1, x2)

inst_21020:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0xfffff8; valaddr_reg:x3; val_offset:63060*0 + 3*284*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63060*0 + 3*284*FLEN/8, x4, x1, x2)

inst_21021:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0xfffffc; valaddr_reg:x3; val_offset:63063*0 + 3*285*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63063*0 + 3*285*FLEN/8, x4, x1, x2)

inst_21022:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0xfffffe; valaddr_reg:x3; val_offset:63066*0 + 3*286*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63066*0 + 3*286*FLEN/8, x4, x1, x2)

inst_21023:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x3800000; valaddr_reg:x3; val_offset:63069*0 + 3*287*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63069*0 + 3*287*FLEN/8, x4, x1, x2)

inst_21024:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x3800001; valaddr_reg:x3; val_offset:63072*0 + 3*288*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63072*0 + 3*288*FLEN/8, x4, x1, x2)

inst_21025:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x3800003; valaddr_reg:x3; val_offset:63075*0 + 3*289*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63075*0 + 3*289*FLEN/8, x4, x1, x2)

inst_21026:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x3800007; valaddr_reg:x3; val_offset:63078*0 + 3*290*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63078*0 + 3*290*FLEN/8, x4, x1, x2)

inst_21027:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x380000f; valaddr_reg:x3; val_offset:63081*0 + 3*291*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63081*0 + 3*291*FLEN/8, x4, x1, x2)

inst_21028:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x380001f; valaddr_reg:x3; val_offset:63084*0 + 3*292*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63084*0 + 3*292*FLEN/8, x4, x1, x2)

inst_21029:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x380003f; valaddr_reg:x3; val_offset:63087*0 + 3*293*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63087*0 + 3*293*FLEN/8, x4, x1, x2)

inst_21030:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x380007f; valaddr_reg:x3; val_offset:63090*0 + 3*294*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63090*0 + 3*294*FLEN/8, x4, x1, x2)

inst_21031:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x38000ff; valaddr_reg:x3; val_offset:63093*0 + 3*295*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63093*0 + 3*295*FLEN/8, x4, x1, x2)

inst_21032:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x38001ff; valaddr_reg:x3; val_offset:63096*0 + 3*296*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63096*0 + 3*296*FLEN/8, x4, x1, x2)

inst_21033:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x38003ff; valaddr_reg:x3; val_offset:63099*0 + 3*297*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63099*0 + 3*297*FLEN/8, x4, x1, x2)

inst_21034:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x38007ff; valaddr_reg:x3; val_offset:63102*0 + 3*298*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63102*0 + 3*298*FLEN/8, x4, x1, x2)

inst_21035:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x3800fff; valaddr_reg:x3; val_offset:63105*0 + 3*299*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63105*0 + 3*299*FLEN/8, x4, x1, x2)

inst_21036:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x3801fff; valaddr_reg:x3; val_offset:63108*0 + 3*300*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63108*0 + 3*300*FLEN/8, x4, x1, x2)

inst_21037:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x3803fff; valaddr_reg:x3; val_offset:63111*0 + 3*301*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63111*0 + 3*301*FLEN/8, x4, x1, x2)

inst_21038:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x3807fff; valaddr_reg:x3; val_offset:63114*0 + 3*302*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63114*0 + 3*302*FLEN/8, x4, x1, x2)

inst_21039:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x380ffff; valaddr_reg:x3; val_offset:63117*0 + 3*303*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63117*0 + 3*303*FLEN/8, x4, x1, x2)

inst_21040:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x381ffff; valaddr_reg:x3; val_offset:63120*0 + 3*304*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63120*0 + 3*304*FLEN/8, x4, x1, x2)

inst_21041:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x383ffff; valaddr_reg:x3; val_offset:63123*0 + 3*305*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63123*0 + 3*305*FLEN/8, x4, x1, x2)

inst_21042:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x387ffff; valaddr_reg:x3; val_offset:63126*0 + 3*306*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63126*0 + 3*306*FLEN/8, x4, x1, x2)

inst_21043:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x38fffff; valaddr_reg:x3; val_offset:63129*0 + 3*307*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63129*0 + 3*307*FLEN/8, x4, x1, x2)

inst_21044:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x39fffff; valaddr_reg:x3; val_offset:63132*0 + 3*308*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63132*0 + 3*308*FLEN/8, x4, x1, x2)

inst_21045:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x3bfffff; valaddr_reg:x3; val_offset:63135*0 + 3*309*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63135*0 + 3*309*FLEN/8, x4, x1, x2)

inst_21046:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x3c00000; valaddr_reg:x3; val_offset:63138*0 + 3*310*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63138*0 + 3*310*FLEN/8, x4, x1, x2)

inst_21047:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x3e00000; valaddr_reg:x3; val_offset:63141*0 + 3*311*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63141*0 + 3*311*FLEN/8, x4, x1, x2)

inst_21048:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x3f00000; valaddr_reg:x3; val_offset:63144*0 + 3*312*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63144*0 + 3*312*FLEN/8, x4, x1, x2)

inst_21049:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x3f80000; valaddr_reg:x3; val_offset:63147*0 + 3*313*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63147*0 + 3*313*FLEN/8, x4, x1, x2)

inst_21050:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x3fc0000; valaddr_reg:x3; val_offset:63150*0 + 3*314*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63150*0 + 3*314*FLEN/8, x4, x1, x2)

inst_21051:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x3fe0000; valaddr_reg:x3; val_offset:63153*0 + 3*315*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63153*0 + 3*315*FLEN/8, x4, x1, x2)

inst_21052:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x3ff0000; valaddr_reg:x3; val_offset:63156*0 + 3*316*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63156*0 + 3*316*FLEN/8, x4, x1, x2)

inst_21053:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x3ff8000; valaddr_reg:x3; val_offset:63159*0 + 3*317*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63159*0 + 3*317*FLEN/8, x4, x1, x2)

inst_21054:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x3ffc000; valaddr_reg:x3; val_offset:63162*0 + 3*318*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63162*0 + 3*318*FLEN/8, x4, x1, x2)

inst_21055:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x3ffe000; valaddr_reg:x3; val_offset:63165*0 + 3*319*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63165*0 + 3*319*FLEN/8, x4, x1, x2)

inst_21056:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x3fff000; valaddr_reg:x3; val_offset:63168*0 + 3*320*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63168*0 + 3*320*FLEN/8, x4, x1, x2)

inst_21057:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x3fff800; valaddr_reg:x3; val_offset:63171*0 + 3*321*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63171*0 + 3*321*FLEN/8, x4, x1, x2)

inst_21058:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x3fffc00; valaddr_reg:x3; val_offset:63174*0 + 3*322*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63174*0 + 3*322*FLEN/8, x4, x1, x2)

inst_21059:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x3fffe00; valaddr_reg:x3; val_offset:63177*0 + 3*323*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63177*0 + 3*323*FLEN/8, x4, x1, x2)

inst_21060:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x3ffff00; valaddr_reg:x3; val_offset:63180*0 + 3*324*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63180*0 + 3*324*FLEN/8, x4, x1, x2)

inst_21061:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x3ffff80; valaddr_reg:x3; val_offset:63183*0 + 3*325*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63183*0 + 3*325*FLEN/8, x4, x1, x2)

inst_21062:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x3ffffc0; valaddr_reg:x3; val_offset:63186*0 + 3*326*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63186*0 + 3*326*FLEN/8, x4, x1, x2)

inst_21063:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x3ffffe0; valaddr_reg:x3; val_offset:63189*0 + 3*327*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63189*0 + 3*327*FLEN/8, x4, x1, x2)

inst_21064:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x3fffff0; valaddr_reg:x3; val_offset:63192*0 + 3*328*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63192*0 + 3*328*FLEN/8, x4, x1, x2)

inst_21065:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x3fffff8; valaddr_reg:x3; val_offset:63195*0 + 3*329*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63195*0 + 3*329*FLEN/8, x4, x1, x2)

inst_21066:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x3fffffc; valaddr_reg:x3; val_offset:63198*0 + 3*330*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63198*0 + 3*330*FLEN/8, x4, x1, x2)

inst_21067:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x3fffffe; valaddr_reg:x3; val_offset:63201*0 + 3*331*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63201*0 + 3*331*FLEN/8, x4, x1, x2)

inst_21068:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ab1d4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edab1d4; op2val:0x0;
op3val:0x3ffffff; valaddr_reg:x3; val_offset:63204*0 + 3*332*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63204*0 + 3*332*FLEN/8, x4, x1, x2)

inst_21069:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:63207*0 + 3*333*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63207*0 + 3*333*FLEN/8, x4, x1, x2)

inst_21070:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:63210*0 + 3*334*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63210*0 + 3*334*FLEN/8, x4, x1, x2)

inst_21071:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:63213*0 + 3*335*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63213*0 + 3*335*FLEN/8, x4, x1, x2)

inst_21072:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0x199999; valaddr_reg:x3; val_offset:63216*0 + 3*336*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63216*0 + 3*336*FLEN/8, x4, x1, x2)

inst_21073:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0x249249; valaddr_reg:x3; val_offset:63219*0 + 3*337*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63219*0 + 3*337*FLEN/8, x4, x1, x2)

inst_21074:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0x333333; valaddr_reg:x3; val_offset:63222*0 + 3*338*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63222*0 + 3*338*FLEN/8, x4, x1, x2)

inst_21075:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0x36db6d; valaddr_reg:x3; val_offset:63225*0 + 3*339*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63225*0 + 3*339*FLEN/8, x4, x1, x2)

inst_21076:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0x3bbbbb; valaddr_reg:x3; val_offset:63228*0 + 3*340*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63228*0 + 3*340*FLEN/8, x4, x1, x2)

inst_21077:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0x444444; valaddr_reg:x3; val_offset:63231*0 + 3*341*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63231*0 + 3*341*FLEN/8, x4, x1, x2)

inst_21078:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0x4ccccc; valaddr_reg:x3; val_offset:63234*0 + 3*342*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63234*0 + 3*342*FLEN/8, x4, x1, x2)

inst_21079:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0x5b6db6; valaddr_reg:x3; val_offset:63237*0 + 3*343*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63237*0 + 3*343*FLEN/8, x4, x1, x2)

inst_21080:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0x666666; valaddr_reg:x3; val_offset:63240*0 + 3*344*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63240*0 + 3*344*FLEN/8, x4, x1, x2)

inst_21081:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0x6db6db; valaddr_reg:x3; val_offset:63243*0 + 3*345*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63243*0 + 3*345*FLEN/8, x4, x1, x2)

inst_21082:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0x7ffff8; valaddr_reg:x3; val_offset:63246*0 + 3*346*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63246*0 + 3*346*FLEN/8, x4, x1, x2)

inst_21083:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0x7ffffc; valaddr_reg:x3; val_offset:63249*0 + 3*347*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63249*0 + 3*347*FLEN/8, x4, x1, x2)

inst_21084:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0x7ffffe; valaddr_reg:x3; val_offset:63252*0 + 3*348*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63252*0 + 3*348*FLEN/8, x4, x1, x2)

inst_21085:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xe800000; valaddr_reg:x3; val_offset:63255*0 + 3*349*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63255*0 + 3*349*FLEN/8, x4, x1, x2)

inst_21086:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xe800001; valaddr_reg:x3; val_offset:63258*0 + 3*350*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63258*0 + 3*350*FLEN/8, x4, x1, x2)

inst_21087:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xe800003; valaddr_reg:x3; val_offset:63261*0 + 3*351*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63261*0 + 3*351*FLEN/8, x4, x1, x2)

inst_21088:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xe800007; valaddr_reg:x3; val_offset:63264*0 + 3*352*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63264*0 + 3*352*FLEN/8, x4, x1, x2)

inst_21089:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xe80000f; valaddr_reg:x3; val_offset:63267*0 + 3*353*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63267*0 + 3*353*FLEN/8, x4, x1, x2)

inst_21090:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xe80001f; valaddr_reg:x3; val_offset:63270*0 + 3*354*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63270*0 + 3*354*FLEN/8, x4, x1, x2)

inst_21091:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xe80003f; valaddr_reg:x3; val_offset:63273*0 + 3*355*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63273*0 + 3*355*FLEN/8, x4, x1, x2)

inst_21092:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xe80007f; valaddr_reg:x3; val_offset:63276*0 + 3*356*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63276*0 + 3*356*FLEN/8, x4, x1, x2)

inst_21093:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xe8000ff; valaddr_reg:x3; val_offset:63279*0 + 3*357*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63279*0 + 3*357*FLEN/8, x4, x1, x2)

inst_21094:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xe8001ff; valaddr_reg:x3; val_offset:63282*0 + 3*358*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63282*0 + 3*358*FLEN/8, x4, x1, x2)

inst_21095:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xe8003ff; valaddr_reg:x3; val_offset:63285*0 + 3*359*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63285*0 + 3*359*FLEN/8, x4, x1, x2)

inst_21096:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xe8007ff; valaddr_reg:x3; val_offset:63288*0 + 3*360*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63288*0 + 3*360*FLEN/8, x4, x1, x2)

inst_21097:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xe800fff; valaddr_reg:x3; val_offset:63291*0 + 3*361*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63291*0 + 3*361*FLEN/8, x4, x1, x2)

inst_21098:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xe801fff; valaddr_reg:x3; val_offset:63294*0 + 3*362*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63294*0 + 3*362*FLEN/8, x4, x1, x2)

inst_21099:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xe803fff; valaddr_reg:x3; val_offset:63297*0 + 3*363*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63297*0 + 3*363*FLEN/8, x4, x1, x2)

inst_21100:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xe807fff; valaddr_reg:x3; val_offset:63300*0 + 3*364*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63300*0 + 3*364*FLEN/8, x4, x1, x2)

inst_21101:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xe80ffff; valaddr_reg:x3; val_offset:63303*0 + 3*365*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63303*0 + 3*365*FLEN/8, x4, x1, x2)

inst_21102:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xe81ffff; valaddr_reg:x3; val_offset:63306*0 + 3*366*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63306*0 + 3*366*FLEN/8, x4, x1, x2)

inst_21103:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xe83ffff; valaddr_reg:x3; val_offset:63309*0 + 3*367*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63309*0 + 3*367*FLEN/8, x4, x1, x2)

inst_21104:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xe87ffff; valaddr_reg:x3; val_offset:63312*0 + 3*368*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63312*0 + 3*368*FLEN/8, x4, x1, x2)

inst_21105:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xe8fffff; valaddr_reg:x3; val_offset:63315*0 + 3*369*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63315*0 + 3*369*FLEN/8, x4, x1, x2)

inst_21106:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xe9fffff; valaddr_reg:x3; val_offset:63318*0 + 3*370*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63318*0 + 3*370*FLEN/8, x4, x1, x2)

inst_21107:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xebfffff; valaddr_reg:x3; val_offset:63321*0 + 3*371*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63321*0 + 3*371*FLEN/8, x4, x1, x2)

inst_21108:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xec00000; valaddr_reg:x3; val_offset:63324*0 + 3*372*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63324*0 + 3*372*FLEN/8, x4, x1, x2)

inst_21109:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xee00000; valaddr_reg:x3; val_offset:63327*0 + 3*373*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63327*0 + 3*373*FLEN/8, x4, x1, x2)

inst_21110:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xef00000; valaddr_reg:x3; val_offset:63330*0 + 3*374*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63330*0 + 3*374*FLEN/8, x4, x1, x2)

inst_21111:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xef80000; valaddr_reg:x3; val_offset:63333*0 + 3*375*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63333*0 + 3*375*FLEN/8, x4, x1, x2)

inst_21112:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xefc0000; valaddr_reg:x3; val_offset:63336*0 + 3*376*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63336*0 + 3*376*FLEN/8, x4, x1, x2)

inst_21113:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xefe0000; valaddr_reg:x3; val_offset:63339*0 + 3*377*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63339*0 + 3*377*FLEN/8, x4, x1, x2)

inst_21114:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xeff0000; valaddr_reg:x3; val_offset:63342*0 + 3*378*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63342*0 + 3*378*FLEN/8, x4, x1, x2)

inst_21115:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xeff8000; valaddr_reg:x3; val_offset:63345*0 + 3*379*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63345*0 + 3*379*FLEN/8, x4, x1, x2)

inst_21116:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xeffc000; valaddr_reg:x3; val_offset:63348*0 + 3*380*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63348*0 + 3*380*FLEN/8, x4, x1, x2)

inst_21117:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xeffe000; valaddr_reg:x3; val_offset:63351*0 + 3*381*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63351*0 + 3*381*FLEN/8, x4, x1, x2)

inst_21118:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xefff000; valaddr_reg:x3; val_offset:63354*0 + 3*382*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63354*0 + 3*382*FLEN/8, x4, x1, x2)

inst_21119:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xefff800; valaddr_reg:x3; val_offset:63357*0 + 3*383*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63357*0 + 3*383*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_4)

inst_21120:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xefffc00; valaddr_reg:x3; val_offset:63360*0 + 3*384*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63360*0 + 3*384*FLEN/8, x4, x1, x2)

inst_21121:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xefffe00; valaddr_reg:x3; val_offset:63363*0 + 3*385*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63363*0 + 3*385*FLEN/8, x4, x1, x2)

inst_21122:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xeffff00; valaddr_reg:x3; val_offset:63366*0 + 3*386*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63366*0 + 3*386*FLEN/8, x4, x1, x2)

inst_21123:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xeffff80; valaddr_reg:x3; val_offset:63369*0 + 3*387*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63369*0 + 3*387*FLEN/8, x4, x1, x2)

inst_21124:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xeffffc0; valaddr_reg:x3; val_offset:63372*0 + 3*388*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63372*0 + 3*388*FLEN/8, x4, x1, x2)

inst_21125:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xeffffe0; valaddr_reg:x3; val_offset:63375*0 + 3*389*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63375*0 + 3*389*FLEN/8, x4, x1, x2)

inst_21126:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xefffff0; valaddr_reg:x3; val_offset:63378*0 + 3*390*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63378*0 + 3*390*FLEN/8, x4, x1, x2)

inst_21127:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xefffff8; valaddr_reg:x3; val_offset:63381*0 + 3*391*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63381*0 + 3*391*FLEN/8, x4, x1, x2)

inst_21128:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xefffffc; valaddr_reg:x3; val_offset:63384*0 + 3*392*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63384*0 + 3*392*FLEN/8, x4, x1, x2)

inst_21129:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xefffffe; valaddr_reg:x3; val_offset:63387*0 + 3*393*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63387*0 + 3*393*FLEN/8, x4, x1, x2)

inst_21130:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b1c9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb1c9d; op2val:0x0;
op3val:0xeffffff; valaddr_reg:x3; val_offset:63390*0 + 3*394*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63390*0 + 3*394*FLEN/8, x4, x1, x2)

inst_21131:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x800001; valaddr_reg:x3; val_offset:63393*0 + 3*395*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63393*0 + 3*395*FLEN/8, x4, x1, x2)

inst_21132:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x800003; valaddr_reg:x3; val_offset:63396*0 + 3*396*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63396*0 + 3*396*FLEN/8, x4, x1, x2)

inst_21133:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x800007; valaddr_reg:x3; val_offset:63399*0 + 3*397*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63399*0 + 3*397*FLEN/8, x4, x1, x2)

inst_21134:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x999999; valaddr_reg:x3; val_offset:63402*0 + 3*398*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63402*0 + 3*398*FLEN/8, x4, x1, x2)

inst_21135:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0xa49249; valaddr_reg:x3; val_offset:63405*0 + 3*399*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63405*0 + 3*399*FLEN/8, x4, x1, x2)

inst_21136:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0xb33333; valaddr_reg:x3; val_offset:63408*0 + 3*400*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63408*0 + 3*400*FLEN/8, x4, x1, x2)

inst_21137:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0xb6db6d; valaddr_reg:x3; val_offset:63411*0 + 3*401*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63411*0 + 3*401*FLEN/8, x4, x1, x2)

inst_21138:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0xbbbbbb; valaddr_reg:x3; val_offset:63414*0 + 3*402*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63414*0 + 3*402*FLEN/8, x4, x1, x2)

inst_21139:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0xc44444; valaddr_reg:x3; val_offset:63417*0 + 3*403*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63417*0 + 3*403*FLEN/8, x4, x1, x2)

inst_21140:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0xcccccc; valaddr_reg:x3; val_offset:63420*0 + 3*404*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63420*0 + 3*404*FLEN/8, x4, x1, x2)

inst_21141:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0xdb6db6; valaddr_reg:x3; val_offset:63423*0 + 3*405*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63423*0 + 3*405*FLEN/8, x4, x1, x2)

inst_21142:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0xe66666; valaddr_reg:x3; val_offset:63426*0 + 3*406*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63426*0 + 3*406*FLEN/8, x4, x1, x2)

inst_21143:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0xedb6db; valaddr_reg:x3; val_offset:63429*0 + 3*407*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63429*0 + 3*407*FLEN/8, x4, x1, x2)

inst_21144:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0xfffff8; valaddr_reg:x3; val_offset:63432*0 + 3*408*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63432*0 + 3*408*FLEN/8, x4, x1, x2)

inst_21145:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0xfffffc; valaddr_reg:x3; val_offset:63435*0 + 3*409*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63435*0 + 3*409*FLEN/8, x4, x1, x2)

inst_21146:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0xfffffe; valaddr_reg:x3; val_offset:63438*0 + 3*410*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63438*0 + 3*410*FLEN/8, x4, x1, x2)

inst_21147:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x1800000; valaddr_reg:x3; val_offset:63441*0 + 3*411*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63441*0 + 3*411*FLEN/8, x4, x1, x2)

inst_21148:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x1800001; valaddr_reg:x3; val_offset:63444*0 + 3*412*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63444*0 + 3*412*FLEN/8, x4, x1, x2)

inst_21149:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x1800003; valaddr_reg:x3; val_offset:63447*0 + 3*413*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63447*0 + 3*413*FLEN/8, x4, x1, x2)

inst_21150:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x1800007; valaddr_reg:x3; val_offset:63450*0 + 3*414*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63450*0 + 3*414*FLEN/8, x4, x1, x2)

inst_21151:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x180000f; valaddr_reg:x3; val_offset:63453*0 + 3*415*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63453*0 + 3*415*FLEN/8, x4, x1, x2)

inst_21152:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x180001f; valaddr_reg:x3; val_offset:63456*0 + 3*416*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63456*0 + 3*416*FLEN/8, x4, x1, x2)

inst_21153:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x180003f; valaddr_reg:x3; val_offset:63459*0 + 3*417*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63459*0 + 3*417*FLEN/8, x4, x1, x2)

inst_21154:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x180007f; valaddr_reg:x3; val_offset:63462*0 + 3*418*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63462*0 + 3*418*FLEN/8, x4, x1, x2)

inst_21155:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x18000ff; valaddr_reg:x3; val_offset:63465*0 + 3*419*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63465*0 + 3*419*FLEN/8, x4, x1, x2)

inst_21156:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x18001ff; valaddr_reg:x3; val_offset:63468*0 + 3*420*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63468*0 + 3*420*FLEN/8, x4, x1, x2)

inst_21157:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x18003ff; valaddr_reg:x3; val_offset:63471*0 + 3*421*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63471*0 + 3*421*FLEN/8, x4, x1, x2)

inst_21158:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x18007ff; valaddr_reg:x3; val_offset:63474*0 + 3*422*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63474*0 + 3*422*FLEN/8, x4, x1, x2)

inst_21159:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x1800fff; valaddr_reg:x3; val_offset:63477*0 + 3*423*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63477*0 + 3*423*FLEN/8, x4, x1, x2)

inst_21160:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x1801fff; valaddr_reg:x3; val_offset:63480*0 + 3*424*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63480*0 + 3*424*FLEN/8, x4, x1, x2)

inst_21161:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x1803fff; valaddr_reg:x3; val_offset:63483*0 + 3*425*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63483*0 + 3*425*FLEN/8, x4, x1, x2)

inst_21162:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x1807fff; valaddr_reg:x3; val_offset:63486*0 + 3*426*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63486*0 + 3*426*FLEN/8, x4, x1, x2)

inst_21163:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x180ffff; valaddr_reg:x3; val_offset:63489*0 + 3*427*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63489*0 + 3*427*FLEN/8, x4, x1, x2)

inst_21164:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x181ffff; valaddr_reg:x3; val_offset:63492*0 + 3*428*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63492*0 + 3*428*FLEN/8, x4, x1, x2)

inst_21165:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x183ffff; valaddr_reg:x3; val_offset:63495*0 + 3*429*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63495*0 + 3*429*FLEN/8, x4, x1, x2)

inst_21166:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x187ffff; valaddr_reg:x3; val_offset:63498*0 + 3*430*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63498*0 + 3*430*FLEN/8, x4, x1, x2)

inst_21167:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x18fffff; valaddr_reg:x3; val_offset:63501*0 + 3*431*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63501*0 + 3*431*FLEN/8, x4, x1, x2)

inst_21168:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x19fffff; valaddr_reg:x3; val_offset:63504*0 + 3*432*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63504*0 + 3*432*FLEN/8, x4, x1, x2)

inst_21169:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x1bfffff; valaddr_reg:x3; val_offset:63507*0 + 3*433*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63507*0 + 3*433*FLEN/8, x4, x1, x2)

inst_21170:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x1c00000; valaddr_reg:x3; val_offset:63510*0 + 3*434*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63510*0 + 3*434*FLEN/8, x4, x1, x2)

inst_21171:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x1e00000; valaddr_reg:x3; val_offset:63513*0 + 3*435*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63513*0 + 3*435*FLEN/8, x4, x1, x2)

inst_21172:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x1f00000; valaddr_reg:x3; val_offset:63516*0 + 3*436*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63516*0 + 3*436*FLEN/8, x4, x1, x2)

inst_21173:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x1f80000; valaddr_reg:x3; val_offset:63519*0 + 3*437*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63519*0 + 3*437*FLEN/8, x4, x1, x2)

inst_21174:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x1fc0000; valaddr_reg:x3; val_offset:63522*0 + 3*438*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63522*0 + 3*438*FLEN/8, x4, x1, x2)

inst_21175:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x1fe0000; valaddr_reg:x3; val_offset:63525*0 + 3*439*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63525*0 + 3*439*FLEN/8, x4, x1, x2)

inst_21176:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x1ff0000; valaddr_reg:x3; val_offset:63528*0 + 3*440*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63528*0 + 3*440*FLEN/8, x4, x1, x2)

inst_21177:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x1ff8000; valaddr_reg:x3; val_offset:63531*0 + 3*441*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63531*0 + 3*441*FLEN/8, x4, x1, x2)

inst_21178:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x1ffc000; valaddr_reg:x3; val_offset:63534*0 + 3*442*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63534*0 + 3*442*FLEN/8, x4, x1, x2)

inst_21179:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x1ffe000; valaddr_reg:x3; val_offset:63537*0 + 3*443*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63537*0 + 3*443*FLEN/8, x4, x1, x2)

inst_21180:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x1fff000; valaddr_reg:x3; val_offset:63540*0 + 3*444*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63540*0 + 3*444*FLEN/8, x4, x1, x2)

inst_21181:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x1fff800; valaddr_reg:x3; val_offset:63543*0 + 3*445*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63543*0 + 3*445*FLEN/8, x4, x1, x2)

inst_21182:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x1fffc00; valaddr_reg:x3; val_offset:63546*0 + 3*446*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63546*0 + 3*446*FLEN/8, x4, x1, x2)

inst_21183:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x1fffe00; valaddr_reg:x3; val_offset:63549*0 + 3*447*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63549*0 + 3*447*FLEN/8, x4, x1, x2)

inst_21184:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x1ffff00; valaddr_reg:x3; val_offset:63552*0 + 3*448*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63552*0 + 3*448*FLEN/8, x4, x1, x2)

inst_21185:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x1ffff80; valaddr_reg:x3; val_offset:63555*0 + 3*449*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63555*0 + 3*449*FLEN/8, x4, x1, x2)

inst_21186:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x1ffffc0; valaddr_reg:x3; val_offset:63558*0 + 3*450*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63558*0 + 3*450*FLEN/8, x4, x1, x2)

inst_21187:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x1ffffe0; valaddr_reg:x3; val_offset:63561*0 + 3*451*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63561*0 + 3*451*FLEN/8, x4, x1, x2)

inst_21188:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x1fffff0; valaddr_reg:x3; val_offset:63564*0 + 3*452*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63564*0 + 3*452*FLEN/8, x4, x1, x2)

inst_21189:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x1fffff8; valaddr_reg:x3; val_offset:63567*0 + 3*453*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63567*0 + 3*453*FLEN/8, x4, x1, x2)

inst_21190:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x1fffffc; valaddr_reg:x3; val_offset:63570*0 + 3*454*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63570*0 + 3*454*FLEN/8, x4, x1, x2)

inst_21191:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x1fffffe; valaddr_reg:x3; val_offset:63573*0 + 3*455*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63573*0 + 3*455*FLEN/8, x4, x1, x2)

inst_21192:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b5a74 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb5a74; op2val:0x0;
op3val:0x1ffffff; valaddr_reg:x3; val_offset:63576*0 + 3*456*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63576*0 + 3*456*FLEN/8, x4, x1, x2)

inst_21193:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x61800000; valaddr_reg:x3; val_offset:63579*0 + 3*457*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63579*0 + 3*457*FLEN/8, x4, x1, x2)

inst_21194:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x61800001; valaddr_reg:x3; val_offset:63582*0 + 3*458*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63582*0 + 3*458*FLEN/8, x4, x1, x2)

inst_21195:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x61800003; valaddr_reg:x3; val_offset:63585*0 + 3*459*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63585*0 + 3*459*FLEN/8, x4, x1, x2)

inst_21196:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x61800007; valaddr_reg:x3; val_offset:63588*0 + 3*460*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63588*0 + 3*460*FLEN/8, x4, x1, x2)

inst_21197:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x6180000f; valaddr_reg:x3; val_offset:63591*0 + 3*461*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63591*0 + 3*461*FLEN/8, x4, x1, x2)

inst_21198:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x6180001f; valaddr_reg:x3; val_offset:63594*0 + 3*462*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63594*0 + 3*462*FLEN/8, x4, x1, x2)

inst_21199:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x6180003f; valaddr_reg:x3; val_offset:63597*0 + 3*463*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63597*0 + 3*463*FLEN/8, x4, x1, x2)

inst_21200:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x6180007f; valaddr_reg:x3; val_offset:63600*0 + 3*464*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63600*0 + 3*464*FLEN/8, x4, x1, x2)

inst_21201:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x618000ff; valaddr_reg:x3; val_offset:63603*0 + 3*465*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63603*0 + 3*465*FLEN/8, x4, x1, x2)

inst_21202:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x618001ff; valaddr_reg:x3; val_offset:63606*0 + 3*466*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63606*0 + 3*466*FLEN/8, x4, x1, x2)

inst_21203:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x618003ff; valaddr_reg:x3; val_offset:63609*0 + 3*467*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63609*0 + 3*467*FLEN/8, x4, x1, x2)

inst_21204:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x618007ff; valaddr_reg:x3; val_offset:63612*0 + 3*468*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63612*0 + 3*468*FLEN/8, x4, x1, x2)

inst_21205:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x61800fff; valaddr_reg:x3; val_offset:63615*0 + 3*469*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63615*0 + 3*469*FLEN/8, x4, x1, x2)

inst_21206:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x61801fff; valaddr_reg:x3; val_offset:63618*0 + 3*470*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63618*0 + 3*470*FLEN/8, x4, x1, x2)

inst_21207:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x61803fff; valaddr_reg:x3; val_offset:63621*0 + 3*471*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63621*0 + 3*471*FLEN/8, x4, x1, x2)

inst_21208:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x61807fff; valaddr_reg:x3; val_offset:63624*0 + 3*472*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63624*0 + 3*472*FLEN/8, x4, x1, x2)

inst_21209:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x6180ffff; valaddr_reg:x3; val_offset:63627*0 + 3*473*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63627*0 + 3*473*FLEN/8, x4, x1, x2)

inst_21210:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x6181ffff; valaddr_reg:x3; val_offset:63630*0 + 3*474*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63630*0 + 3*474*FLEN/8, x4, x1, x2)

inst_21211:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x6183ffff; valaddr_reg:x3; val_offset:63633*0 + 3*475*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63633*0 + 3*475*FLEN/8, x4, x1, x2)

inst_21212:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x6187ffff; valaddr_reg:x3; val_offset:63636*0 + 3*476*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63636*0 + 3*476*FLEN/8, x4, x1, x2)

inst_21213:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x618fffff; valaddr_reg:x3; val_offset:63639*0 + 3*477*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63639*0 + 3*477*FLEN/8, x4, x1, x2)

inst_21214:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x619fffff; valaddr_reg:x3; val_offset:63642*0 + 3*478*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63642*0 + 3*478*FLEN/8, x4, x1, x2)

inst_21215:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x61bfffff; valaddr_reg:x3; val_offset:63645*0 + 3*479*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63645*0 + 3*479*FLEN/8, x4, x1, x2)

inst_21216:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x61c00000; valaddr_reg:x3; val_offset:63648*0 + 3*480*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63648*0 + 3*480*FLEN/8, x4, x1, x2)

inst_21217:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x61e00000; valaddr_reg:x3; val_offset:63651*0 + 3*481*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63651*0 + 3*481*FLEN/8, x4, x1, x2)

inst_21218:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x61f00000; valaddr_reg:x3; val_offset:63654*0 + 3*482*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63654*0 + 3*482*FLEN/8, x4, x1, x2)

inst_21219:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x61f80000; valaddr_reg:x3; val_offset:63657*0 + 3*483*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63657*0 + 3*483*FLEN/8, x4, x1, x2)

inst_21220:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x61fc0000; valaddr_reg:x3; val_offset:63660*0 + 3*484*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63660*0 + 3*484*FLEN/8, x4, x1, x2)

inst_21221:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x61fe0000; valaddr_reg:x3; val_offset:63663*0 + 3*485*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63663*0 + 3*485*FLEN/8, x4, x1, x2)

inst_21222:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x61ff0000; valaddr_reg:x3; val_offset:63666*0 + 3*486*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63666*0 + 3*486*FLEN/8, x4, x1, x2)

inst_21223:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x61ff8000; valaddr_reg:x3; val_offset:63669*0 + 3*487*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63669*0 + 3*487*FLEN/8, x4, x1, x2)

inst_21224:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x61ffc000; valaddr_reg:x3; val_offset:63672*0 + 3*488*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63672*0 + 3*488*FLEN/8, x4, x1, x2)

inst_21225:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x61ffe000; valaddr_reg:x3; val_offset:63675*0 + 3*489*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63675*0 + 3*489*FLEN/8, x4, x1, x2)

inst_21226:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x61fff000; valaddr_reg:x3; val_offset:63678*0 + 3*490*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63678*0 + 3*490*FLEN/8, x4, x1, x2)

inst_21227:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x61fff800; valaddr_reg:x3; val_offset:63681*0 + 3*491*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63681*0 + 3*491*FLEN/8, x4, x1, x2)

inst_21228:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x61fffc00; valaddr_reg:x3; val_offset:63684*0 + 3*492*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63684*0 + 3*492*FLEN/8, x4, x1, x2)

inst_21229:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x61fffe00; valaddr_reg:x3; val_offset:63687*0 + 3*493*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63687*0 + 3*493*FLEN/8, x4, x1, x2)

inst_21230:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x61ffff00; valaddr_reg:x3; val_offset:63690*0 + 3*494*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63690*0 + 3*494*FLEN/8, x4, x1, x2)

inst_21231:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x61ffff80; valaddr_reg:x3; val_offset:63693*0 + 3*495*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63693*0 + 3*495*FLEN/8, x4, x1, x2)

inst_21232:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x61ffffc0; valaddr_reg:x3; val_offset:63696*0 + 3*496*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63696*0 + 3*496*FLEN/8, x4, x1, x2)

inst_21233:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x61ffffe0; valaddr_reg:x3; val_offset:63699*0 + 3*497*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63699*0 + 3*497*FLEN/8, x4, x1, x2)

inst_21234:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x61fffff0; valaddr_reg:x3; val_offset:63702*0 + 3*498*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63702*0 + 3*498*FLEN/8, x4, x1, x2)

inst_21235:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x61fffff8; valaddr_reg:x3; val_offset:63705*0 + 3*499*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63705*0 + 3*499*FLEN/8, x4, x1, x2)

inst_21236:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x61fffffc; valaddr_reg:x3; val_offset:63708*0 + 3*500*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63708*0 + 3*500*FLEN/8, x4, x1, x2)

inst_21237:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x61fffffe; valaddr_reg:x3; val_offset:63711*0 + 3*501*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63711*0 + 3*501*FLEN/8, x4, x1, x2)

inst_21238:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x61ffffff; valaddr_reg:x3; val_offset:63714*0 + 3*502*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63714*0 + 3*502*FLEN/8, x4, x1, x2)

inst_21239:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x7f000001; valaddr_reg:x3; val_offset:63717*0 + 3*503*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63717*0 + 3*503*FLEN/8, x4, x1, x2)

inst_21240:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x7f000003; valaddr_reg:x3; val_offset:63720*0 + 3*504*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63720*0 + 3*504*FLEN/8, x4, x1, x2)

inst_21241:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x7f000007; valaddr_reg:x3; val_offset:63723*0 + 3*505*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63723*0 + 3*505*FLEN/8, x4, x1, x2)

inst_21242:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x7f199999; valaddr_reg:x3; val_offset:63726*0 + 3*506*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63726*0 + 3*506*FLEN/8, x4, x1, x2)

inst_21243:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x7f249249; valaddr_reg:x3; val_offset:63729*0 + 3*507*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63729*0 + 3*507*FLEN/8, x4, x1, x2)

inst_21244:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x7f333333; valaddr_reg:x3; val_offset:63732*0 + 3*508*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63732*0 + 3*508*FLEN/8, x4, x1, x2)

inst_21245:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x7f36db6d; valaddr_reg:x3; val_offset:63735*0 + 3*509*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63735*0 + 3*509*FLEN/8, x4, x1, x2)

inst_21246:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:63738*0 + 3*510*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63738*0 + 3*510*FLEN/8, x4, x1, x2)

inst_21247:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x7f444444; valaddr_reg:x3; val_offset:63741*0 + 3*511*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63741*0 + 3*511*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_5)

inst_21248:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:63744*0 + 3*512*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63744*0 + 3*512*FLEN/8, x4, x1, x2)

inst_21249:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:63747*0 + 3*513*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63747*0 + 3*513*FLEN/8, x4, x1, x2)

inst_21250:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x7f666666; valaddr_reg:x3; val_offset:63750*0 + 3*514*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63750*0 + 3*514*FLEN/8, x4, x1, x2)

inst_21251:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x7f6db6db; valaddr_reg:x3; val_offset:63753*0 + 3*515*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63753*0 + 3*515*FLEN/8, x4, x1, x2)

inst_21252:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:63756*0 + 3*516*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63756*0 + 3*516*FLEN/8, x4, x1, x2)

inst_21253:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:63759*0 + 3*517*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63759*0 + 3*517*FLEN/8, x4, x1, x2)

inst_21254:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5bdebb and fs2 == 0 and fe2 == 0x80 and fm2 == 0x150891 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edbdebb; op2val:0x40150891;
op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:63762*0 + 3*518*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63762*0 + 3*518*FLEN/8, x4, x1, x2)

inst_21255:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa7800000; valaddr_reg:x3; val_offset:63765*0 + 3*519*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63765*0 + 3*519*FLEN/8, x4, x1, x2)

inst_21256:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa7800001; valaddr_reg:x3; val_offset:63768*0 + 3*520*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63768*0 + 3*520*FLEN/8, x4, x1, x2)

inst_21257:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa7800003; valaddr_reg:x3; val_offset:63771*0 + 3*521*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63771*0 + 3*521*FLEN/8, x4, x1, x2)

inst_21258:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa7800007; valaddr_reg:x3; val_offset:63774*0 + 3*522*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63774*0 + 3*522*FLEN/8, x4, x1, x2)

inst_21259:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa780000f; valaddr_reg:x3; val_offset:63777*0 + 3*523*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63777*0 + 3*523*FLEN/8, x4, x1, x2)

inst_21260:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa780001f; valaddr_reg:x3; val_offset:63780*0 + 3*524*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63780*0 + 3*524*FLEN/8, x4, x1, x2)

inst_21261:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa780003f; valaddr_reg:x3; val_offset:63783*0 + 3*525*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63783*0 + 3*525*FLEN/8, x4, x1, x2)

inst_21262:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa780007f; valaddr_reg:x3; val_offset:63786*0 + 3*526*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63786*0 + 3*526*FLEN/8, x4, x1, x2)

inst_21263:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa78000ff; valaddr_reg:x3; val_offset:63789*0 + 3*527*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63789*0 + 3*527*FLEN/8, x4, x1, x2)

inst_21264:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa78001ff; valaddr_reg:x3; val_offset:63792*0 + 3*528*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63792*0 + 3*528*FLEN/8, x4, x1, x2)

inst_21265:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa78003ff; valaddr_reg:x3; val_offset:63795*0 + 3*529*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63795*0 + 3*529*FLEN/8, x4, x1, x2)

inst_21266:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa78007ff; valaddr_reg:x3; val_offset:63798*0 + 3*530*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63798*0 + 3*530*FLEN/8, x4, x1, x2)

inst_21267:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa7800fff; valaddr_reg:x3; val_offset:63801*0 + 3*531*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63801*0 + 3*531*FLEN/8, x4, x1, x2)

inst_21268:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa7801fff; valaddr_reg:x3; val_offset:63804*0 + 3*532*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63804*0 + 3*532*FLEN/8, x4, x1, x2)

inst_21269:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa7803fff; valaddr_reg:x3; val_offset:63807*0 + 3*533*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63807*0 + 3*533*FLEN/8, x4, x1, x2)

inst_21270:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa7807fff; valaddr_reg:x3; val_offset:63810*0 + 3*534*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63810*0 + 3*534*FLEN/8, x4, x1, x2)

inst_21271:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa780ffff; valaddr_reg:x3; val_offset:63813*0 + 3*535*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63813*0 + 3*535*FLEN/8, x4, x1, x2)

inst_21272:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa781ffff; valaddr_reg:x3; val_offset:63816*0 + 3*536*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63816*0 + 3*536*FLEN/8, x4, x1, x2)

inst_21273:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa783ffff; valaddr_reg:x3; val_offset:63819*0 + 3*537*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63819*0 + 3*537*FLEN/8, x4, x1, x2)

inst_21274:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa787ffff; valaddr_reg:x3; val_offset:63822*0 + 3*538*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63822*0 + 3*538*FLEN/8, x4, x1, x2)

inst_21275:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa78fffff; valaddr_reg:x3; val_offset:63825*0 + 3*539*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63825*0 + 3*539*FLEN/8, x4, x1, x2)

inst_21276:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa79fffff; valaddr_reg:x3; val_offset:63828*0 + 3*540*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63828*0 + 3*540*FLEN/8, x4, x1, x2)

inst_21277:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa7bfffff; valaddr_reg:x3; val_offset:63831*0 + 3*541*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63831*0 + 3*541*FLEN/8, x4, x1, x2)

inst_21278:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa7c00000; valaddr_reg:x3; val_offset:63834*0 + 3*542*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63834*0 + 3*542*FLEN/8, x4, x1, x2)

inst_21279:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa7e00000; valaddr_reg:x3; val_offset:63837*0 + 3*543*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63837*0 + 3*543*FLEN/8, x4, x1, x2)

inst_21280:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa7f00000; valaddr_reg:x3; val_offset:63840*0 + 3*544*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63840*0 + 3*544*FLEN/8, x4, x1, x2)

inst_21281:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa7f80000; valaddr_reg:x3; val_offset:63843*0 + 3*545*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63843*0 + 3*545*FLEN/8, x4, x1, x2)

inst_21282:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa7fc0000; valaddr_reg:x3; val_offset:63846*0 + 3*546*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63846*0 + 3*546*FLEN/8, x4, x1, x2)

inst_21283:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa7fe0000; valaddr_reg:x3; val_offset:63849*0 + 3*547*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63849*0 + 3*547*FLEN/8, x4, x1, x2)

inst_21284:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa7ff0000; valaddr_reg:x3; val_offset:63852*0 + 3*548*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63852*0 + 3*548*FLEN/8, x4, x1, x2)

inst_21285:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa7ff8000; valaddr_reg:x3; val_offset:63855*0 + 3*549*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63855*0 + 3*549*FLEN/8, x4, x1, x2)

inst_21286:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa7ffc000; valaddr_reg:x3; val_offset:63858*0 + 3*550*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63858*0 + 3*550*FLEN/8, x4, x1, x2)

inst_21287:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa7ffe000; valaddr_reg:x3; val_offset:63861*0 + 3*551*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63861*0 + 3*551*FLEN/8, x4, x1, x2)

inst_21288:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa7fff000; valaddr_reg:x3; val_offset:63864*0 + 3*552*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63864*0 + 3*552*FLEN/8, x4, x1, x2)

inst_21289:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa7fff800; valaddr_reg:x3; val_offset:63867*0 + 3*553*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63867*0 + 3*553*FLEN/8, x4, x1, x2)

inst_21290:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa7fffc00; valaddr_reg:x3; val_offset:63870*0 + 3*554*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63870*0 + 3*554*FLEN/8, x4, x1, x2)

inst_21291:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa7fffe00; valaddr_reg:x3; val_offset:63873*0 + 3*555*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63873*0 + 3*555*FLEN/8, x4, x1, x2)

inst_21292:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa7ffff00; valaddr_reg:x3; val_offset:63876*0 + 3*556*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63876*0 + 3*556*FLEN/8, x4, x1, x2)

inst_21293:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa7ffff80; valaddr_reg:x3; val_offset:63879*0 + 3*557*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63879*0 + 3*557*FLEN/8, x4, x1, x2)

inst_21294:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa7ffffc0; valaddr_reg:x3; val_offset:63882*0 + 3*558*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63882*0 + 3*558*FLEN/8, x4, x1, x2)

inst_21295:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa7ffffe0; valaddr_reg:x3; val_offset:63885*0 + 3*559*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63885*0 + 3*559*FLEN/8, x4, x1, x2)

inst_21296:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa7fffff0; valaddr_reg:x3; val_offset:63888*0 + 3*560*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63888*0 + 3*560*FLEN/8, x4, x1, x2)

inst_21297:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa7fffff8; valaddr_reg:x3; val_offset:63891*0 + 3*561*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63891*0 + 3*561*FLEN/8, x4, x1, x2)

inst_21298:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa7fffffc; valaddr_reg:x3; val_offset:63894*0 + 3*562*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63894*0 + 3*562*FLEN/8, x4, x1, x2)

inst_21299:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa7fffffe; valaddr_reg:x3; val_offset:63897*0 + 3*563*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63897*0 + 3*563*FLEN/8, x4, x1, x2)

inst_21300:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xa7ffffff; valaddr_reg:x3; val_offset:63900*0 + 3*564*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63900*0 + 3*564*FLEN/8, x4, x1, x2)

inst_21301:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xbf800001; valaddr_reg:x3; val_offset:63903*0 + 3*565*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63903*0 + 3*565*FLEN/8, x4, x1, x2)

inst_21302:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xbf800003; valaddr_reg:x3; val_offset:63906*0 + 3*566*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63906*0 + 3*566*FLEN/8, x4, x1, x2)

inst_21303:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xbf800007; valaddr_reg:x3; val_offset:63909*0 + 3*567*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63909*0 + 3*567*FLEN/8, x4, x1, x2)

inst_21304:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xbf999999; valaddr_reg:x3; val_offset:63912*0 + 3*568*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63912*0 + 3*568*FLEN/8, x4, x1, x2)

inst_21305:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:63915*0 + 3*569*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63915*0 + 3*569*FLEN/8, x4, x1, x2)

inst_21306:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:63918*0 + 3*570*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63918*0 + 3*570*FLEN/8, x4, x1, x2)

inst_21307:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:63921*0 + 3*571*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63921*0 + 3*571*FLEN/8, x4, x1, x2)

inst_21308:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:63924*0 + 3*572*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63924*0 + 3*572*FLEN/8, x4, x1, x2)

inst_21309:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:63927*0 + 3*573*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63927*0 + 3*573*FLEN/8, x4, x1, x2)

inst_21310:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:63930*0 + 3*574*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63930*0 + 3*574*FLEN/8, x4, x1, x2)

inst_21311:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:63933*0 + 3*575*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63933*0 + 3*575*FLEN/8, x4, x1, x2)

inst_21312:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:63936*0 + 3*576*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63936*0 + 3*576*FLEN/8, x4, x1, x2)

inst_21313:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:63939*0 + 3*577*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63939*0 + 3*577*FLEN/8, x4, x1, x2)

inst_21314:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:63942*0 + 3*578*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63942*0 + 3*578*FLEN/8, x4, x1, x2)

inst_21315:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:63945*0 + 3*579*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63945*0 + 3*579*FLEN/8, x4, x1, x2)

inst_21316:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c2dcf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4a6985 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc2dcf; op2val:0x804a6985;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:63948*0 + 3*580*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63948*0 + 3*580*FLEN/8, x4, x1, x2)

inst_21317:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1f800000; valaddr_reg:x3; val_offset:63951*0 + 3*581*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63951*0 + 3*581*FLEN/8, x4, x1, x2)

inst_21318:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1f800001; valaddr_reg:x3; val_offset:63954*0 + 3*582*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63954*0 + 3*582*FLEN/8, x4, x1, x2)

inst_21319:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1f800003; valaddr_reg:x3; val_offset:63957*0 + 3*583*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63957*0 + 3*583*FLEN/8, x4, x1, x2)

inst_21320:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1f800007; valaddr_reg:x3; val_offset:63960*0 + 3*584*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63960*0 + 3*584*FLEN/8, x4, x1, x2)

inst_21321:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1f80000f; valaddr_reg:x3; val_offset:63963*0 + 3*585*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63963*0 + 3*585*FLEN/8, x4, x1, x2)

inst_21322:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1f80001f; valaddr_reg:x3; val_offset:63966*0 + 3*586*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63966*0 + 3*586*FLEN/8, x4, x1, x2)

inst_21323:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1f80003f; valaddr_reg:x3; val_offset:63969*0 + 3*587*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63969*0 + 3*587*FLEN/8, x4, x1, x2)

inst_21324:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1f80007f; valaddr_reg:x3; val_offset:63972*0 + 3*588*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63972*0 + 3*588*FLEN/8, x4, x1, x2)

inst_21325:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1f8000ff; valaddr_reg:x3; val_offset:63975*0 + 3*589*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63975*0 + 3*589*FLEN/8, x4, x1, x2)

inst_21326:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1f8001ff; valaddr_reg:x3; val_offset:63978*0 + 3*590*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63978*0 + 3*590*FLEN/8, x4, x1, x2)

inst_21327:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1f8003ff; valaddr_reg:x3; val_offset:63981*0 + 3*591*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63981*0 + 3*591*FLEN/8, x4, x1, x2)

inst_21328:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1f8007ff; valaddr_reg:x3; val_offset:63984*0 + 3*592*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63984*0 + 3*592*FLEN/8, x4, x1, x2)

inst_21329:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1f800fff; valaddr_reg:x3; val_offset:63987*0 + 3*593*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63987*0 + 3*593*FLEN/8, x4, x1, x2)

inst_21330:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1f801fff; valaddr_reg:x3; val_offset:63990*0 + 3*594*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63990*0 + 3*594*FLEN/8, x4, x1, x2)

inst_21331:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1f803fff; valaddr_reg:x3; val_offset:63993*0 + 3*595*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63993*0 + 3*595*FLEN/8, x4, x1, x2)

inst_21332:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1f807fff; valaddr_reg:x3; val_offset:63996*0 + 3*596*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63996*0 + 3*596*FLEN/8, x4, x1, x2)

inst_21333:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1f80ffff; valaddr_reg:x3; val_offset:63999*0 + 3*597*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63999*0 + 3*597*FLEN/8, x4, x1, x2)

inst_21334:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1f81ffff; valaddr_reg:x3; val_offset:64002*0 + 3*598*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64002*0 + 3*598*FLEN/8, x4, x1, x2)

inst_21335:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1f83ffff; valaddr_reg:x3; val_offset:64005*0 + 3*599*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64005*0 + 3*599*FLEN/8, x4, x1, x2)

inst_21336:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1f87ffff; valaddr_reg:x3; val_offset:64008*0 + 3*600*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64008*0 + 3*600*FLEN/8, x4, x1, x2)

inst_21337:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1f8fffff; valaddr_reg:x3; val_offset:64011*0 + 3*601*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64011*0 + 3*601*FLEN/8, x4, x1, x2)

inst_21338:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1f9fffff; valaddr_reg:x3; val_offset:64014*0 + 3*602*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64014*0 + 3*602*FLEN/8, x4, x1, x2)

inst_21339:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1fbfffff; valaddr_reg:x3; val_offset:64017*0 + 3*603*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64017*0 + 3*603*FLEN/8, x4, x1, x2)

inst_21340:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1fc00000; valaddr_reg:x3; val_offset:64020*0 + 3*604*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64020*0 + 3*604*FLEN/8, x4, x1, x2)

inst_21341:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1fe00000; valaddr_reg:x3; val_offset:64023*0 + 3*605*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64023*0 + 3*605*FLEN/8, x4, x1, x2)

inst_21342:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1ff00000; valaddr_reg:x3; val_offset:64026*0 + 3*606*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64026*0 + 3*606*FLEN/8, x4, x1, x2)

inst_21343:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1ff80000; valaddr_reg:x3; val_offset:64029*0 + 3*607*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64029*0 + 3*607*FLEN/8, x4, x1, x2)

inst_21344:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1ffc0000; valaddr_reg:x3; val_offset:64032*0 + 3*608*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64032*0 + 3*608*FLEN/8, x4, x1, x2)

inst_21345:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1ffe0000; valaddr_reg:x3; val_offset:64035*0 + 3*609*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64035*0 + 3*609*FLEN/8, x4, x1, x2)

inst_21346:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1fff0000; valaddr_reg:x3; val_offset:64038*0 + 3*610*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64038*0 + 3*610*FLEN/8, x4, x1, x2)

inst_21347:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1fff8000; valaddr_reg:x3; val_offset:64041*0 + 3*611*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64041*0 + 3*611*FLEN/8, x4, x1, x2)

inst_21348:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1fffc000; valaddr_reg:x3; val_offset:64044*0 + 3*612*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64044*0 + 3*612*FLEN/8, x4, x1, x2)

inst_21349:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1fffe000; valaddr_reg:x3; val_offset:64047*0 + 3*613*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64047*0 + 3*613*FLEN/8, x4, x1, x2)

inst_21350:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1ffff000; valaddr_reg:x3; val_offset:64050*0 + 3*614*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64050*0 + 3*614*FLEN/8, x4, x1, x2)

inst_21351:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1ffff800; valaddr_reg:x3; val_offset:64053*0 + 3*615*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64053*0 + 3*615*FLEN/8, x4, x1, x2)

inst_21352:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1ffffc00; valaddr_reg:x3; val_offset:64056*0 + 3*616*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64056*0 + 3*616*FLEN/8, x4, x1, x2)

inst_21353:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1ffffe00; valaddr_reg:x3; val_offset:64059*0 + 3*617*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64059*0 + 3*617*FLEN/8, x4, x1, x2)

inst_21354:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1fffff00; valaddr_reg:x3; val_offset:64062*0 + 3*618*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64062*0 + 3*618*FLEN/8, x4, x1, x2)

inst_21355:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1fffff80; valaddr_reg:x3; val_offset:64065*0 + 3*619*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64065*0 + 3*619*FLEN/8, x4, x1, x2)

inst_21356:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1fffffc0; valaddr_reg:x3; val_offset:64068*0 + 3*620*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64068*0 + 3*620*FLEN/8, x4, x1, x2)

inst_21357:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1fffffe0; valaddr_reg:x3; val_offset:64071*0 + 3*621*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64071*0 + 3*621*FLEN/8, x4, x1, x2)

inst_21358:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1ffffff0; valaddr_reg:x3; val_offset:64074*0 + 3*622*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64074*0 + 3*622*FLEN/8, x4, x1, x2)

inst_21359:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1ffffff8; valaddr_reg:x3; val_offset:64077*0 + 3*623*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64077*0 + 3*623*FLEN/8, x4, x1, x2)

inst_21360:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1ffffffc; valaddr_reg:x3; val_offset:64080*0 + 3*624*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64080*0 + 3*624*FLEN/8, x4, x1, x2)

inst_21361:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1ffffffe; valaddr_reg:x3; val_offset:64083*0 + 3*625*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64083*0 + 3*625*FLEN/8, x4, x1, x2)

inst_21362:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x1fffffff; valaddr_reg:x3; val_offset:64086*0 + 3*626*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64086*0 + 3*626*FLEN/8, x4, x1, x2)

inst_21363:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x3f800001; valaddr_reg:x3; val_offset:64089*0 + 3*627*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64089*0 + 3*627*FLEN/8, x4, x1, x2)

inst_21364:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x3f800003; valaddr_reg:x3; val_offset:64092*0 + 3*628*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64092*0 + 3*628*FLEN/8, x4, x1, x2)

inst_21365:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x3f800007; valaddr_reg:x3; val_offset:64095*0 + 3*629*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64095*0 + 3*629*FLEN/8, x4, x1, x2)

inst_21366:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x3f999999; valaddr_reg:x3; val_offset:64098*0 + 3*630*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64098*0 + 3*630*FLEN/8, x4, x1, x2)

inst_21367:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x3fa49249; valaddr_reg:x3; val_offset:64101*0 + 3*631*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64101*0 + 3*631*FLEN/8, x4, x1, x2)

inst_21368:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x3fb33333; valaddr_reg:x3; val_offset:64104*0 + 3*632*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64104*0 + 3*632*FLEN/8, x4, x1, x2)

inst_21369:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:64107*0 + 3*633*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64107*0 + 3*633*FLEN/8, x4, x1, x2)

inst_21370:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:64110*0 + 3*634*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64110*0 + 3*634*FLEN/8, x4, x1, x2)

inst_21371:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x3fc44444; valaddr_reg:x3; val_offset:64113*0 + 3*635*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64113*0 + 3*635*FLEN/8, x4, x1, x2)

inst_21372:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x3fcccccc; valaddr_reg:x3; val_offset:64116*0 + 3*636*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64116*0 + 3*636*FLEN/8, x4, x1, x2)

inst_21373:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:64119*0 + 3*637*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64119*0 + 3*637*FLEN/8, x4, x1, x2)

inst_21374:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x3fe66666; valaddr_reg:x3; val_offset:64122*0 + 3*638*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64122*0 + 3*638*FLEN/8, x4, x1, x2)

inst_21375:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x3fedb6db; valaddr_reg:x3; val_offset:64125*0 + 3*639*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64125*0 + 3*639*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_6)

inst_21376:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x3ffffff8; valaddr_reg:x3; val_offset:64128*0 + 3*640*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64128*0 + 3*640*FLEN/8, x4, x1, x2)

inst_21377:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x3ffffffc; valaddr_reg:x3; val_offset:64131*0 + 3*641*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64131*0 + 3*641*FLEN/8, x4, x1, x2)

inst_21378:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e0500 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x49cb99 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede0500; op2val:0x49cb99;
op3val:0x3ffffffe; valaddr_reg:x3; val_offset:64134*0 + 3*642*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64134*0 + 3*642*FLEN/8, x4, x1, x2)

inst_21379:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x3; val_offset:64137*0 + 3*643*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64137*0 + 3*643*FLEN/8, x4, x1, x2)

inst_21380:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x3; val_offset:64140*0 + 3*644*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64140*0 + 3*644*FLEN/8, x4, x1, x2)

inst_21381:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x3; val_offset:64143*0 + 3*645*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64143*0 + 3*645*FLEN/8, x4, x1, x2)

inst_21382:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x3; val_offset:64146*0 + 3*646*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64146*0 + 3*646*FLEN/8, x4, x1, x2)

inst_21383:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x3; val_offset:64149*0 + 3*647*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64149*0 + 3*647*FLEN/8, x4, x1, x2)

inst_21384:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x3; val_offset:64152*0 + 3*648*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64152*0 + 3*648*FLEN/8, x4, x1, x2)

inst_21385:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x3; val_offset:64155*0 + 3*649*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64155*0 + 3*649*FLEN/8, x4, x1, x2)

inst_21386:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x3; val_offset:64158*0 + 3*650*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64158*0 + 3*650*FLEN/8, x4, x1, x2)

inst_21387:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x3; val_offset:64161*0 + 3*651*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64161*0 + 3*651*FLEN/8, x4, x1, x2)

inst_21388:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x3; val_offset:64164*0 + 3*652*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64164*0 + 3*652*FLEN/8, x4, x1, x2)

inst_21389:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x3; val_offset:64167*0 + 3*653*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64167*0 + 3*653*FLEN/8, x4, x1, x2)

inst_21390:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x3; val_offset:64170*0 + 3*654*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64170*0 + 3*654*FLEN/8, x4, x1, x2)

inst_21391:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x3; val_offset:64173*0 + 3*655*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64173*0 + 3*655*FLEN/8, x4, x1, x2)

inst_21392:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x3; val_offset:64176*0 + 3*656*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64176*0 + 3*656*FLEN/8, x4, x1, x2)

inst_21393:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x3; val_offset:64179*0 + 3*657*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64179*0 + 3*657*FLEN/8, x4, x1, x2)

inst_21394:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x3; val_offset:64182*0 + 3*658*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64182*0 + 3*658*FLEN/8, x4, x1, x2)

inst_21395:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x81000000; valaddr_reg:x3; val_offset:64185*0 + 3*659*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64185*0 + 3*659*FLEN/8, x4, x1, x2)

inst_21396:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x81000001; valaddr_reg:x3; val_offset:64188*0 + 3*660*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64188*0 + 3*660*FLEN/8, x4, x1, x2)

inst_21397:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x81000003; valaddr_reg:x3; val_offset:64191*0 + 3*661*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64191*0 + 3*661*FLEN/8, x4, x1, x2)

inst_21398:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x81000007; valaddr_reg:x3; val_offset:64194*0 + 3*662*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64194*0 + 3*662*FLEN/8, x4, x1, x2)

inst_21399:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x8100000f; valaddr_reg:x3; val_offset:64197*0 + 3*663*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64197*0 + 3*663*FLEN/8, x4, x1, x2)

inst_21400:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x8100001f; valaddr_reg:x3; val_offset:64200*0 + 3*664*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64200*0 + 3*664*FLEN/8, x4, x1, x2)

inst_21401:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x8100003f; valaddr_reg:x3; val_offset:64203*0 + 3*665*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64203*0 + 3*665*FLEN/8, x4, x1, x2)

inst_21402:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x8100007f; valaddr_reg:x3; val_offset:64206*0 + 3*666*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64206*0 + 3*666*FLEN/8, x4, x1, x2)

inst_21403:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x810000ff; valaddr_reg:x3; val_offset:64209*0 + 3*667*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64209*0 + 3*667*FLEN/8, x4, x1, x2)

inst_21404:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x810001ff; valaddr_reg:x3; val_offset:64212*0 + 3*668*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64212*0 + 3*668*FLEN/8, x4, x1, x2)

inst_21405:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x810003ff; valaddr_reg:x3; val_offset:64215*0 + 3*669*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64215*0 + 3*669*FLEN/8, x4, x1, x2)

inst_21406:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x810007ff; valaddr_reg:x3; val_offset:64218*0 + 3*670*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64218*0 + 3*670*FLEN/8, x4, x1, x2)

inst_21407:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x81000fff; valaddr_reg:x3; val_offset:64221*0 + 3*671*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64221*0 + 3*671*FLEN/8, x4, x1, x2)

inst_21408:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x81001fff; valaddr_reg:x3; val_offset:64224*0 + 3*672*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64224*0 + 3*672*FLEN/8, x4, x1, x2)

inst_21409:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x81003fff; valaddr_reg:x3; val_offset:64227*0 + 3*673*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64227*0 + 3*673*FLEN/8, x4, x1, x2)

inst_21410:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x81007fff; valaddr_reg:x3; val_offset:64230*0 + 3*674*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64230*0 + 3*674*FLEN/8, x4, x1, x2)

inst_21411:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x8100ffff; valaddr_reg:x3; val_offset:64233*0 + 3*675*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64233*0 + 3*675*FLEN/8, x4, x1, x2)

inst_21412:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x8101ffff; valaddr_reg:x3; val_offset:64236*0 + 3*676*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64236*0 + 3*676*FLEN/8, x4, x1, x2)

inst_21413:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x8103ffff; valaddr_reg:x3; val_offset:64239*0 + 3*677*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64239*0 + 3*677*FLEN/8, x4, x1, x2)

inst_21414:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x8107ffff; valaddr_reg:x3; val_offset:64242*0 + 3*678*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64242*0 + 3*678*FLEN/8, x4, x1, x2)

inst_21415:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x810fffff; valaddr_reg:x3; val_offset:64245*0 + 3*679*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64245*0 + 3*679*FLEN/8, x4, x1, x2)

inst_21416:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x811fffff; valaddr_reg:x3; val_offset:64248*0 + 3*680*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64248*0 + 3*680*FLEN/8, x4, x1, x2)

inst_21417:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x813fffff; valaddr_reg:x3; val_offset:64251*0 + 3*681*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64251*0 + 3*681*FLEN/8, x4, x1, x2)

inst_21418:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x81400000; valaddr_reg:x3; val_offset:64254*0 + 3*682*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64254*0 + 3*682*FLEN/8, x4, x1, x2)

inst_21419:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x81600000; valaddr_reg:x3; val_offset:64257*0 + 3*683*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64257*0 + 3*683*FLEN/8, x4, x1, x2)

inst_21420:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x81700000; valaddr_reg:x3; val_offset:64260*0 + 3*684*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64260*0 + 3*684*FLEN/8, x4, x1, x2)

inst_21421:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x81780000; valaddr_reg:x3; val_offset:64263*0 + 3*685*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64263*0 + 3*685*FLEN/8, x4, x1, x2)

inst_21422:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x817c0000; valaddr_reg:x3; val_offset:64266*0 + 3*686*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64266*0 + 3*686*FLEN/8, x4, x1, x2)

inst_21423:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x817e0000; valaddr_reg:x3; val_offset:64269*0 + 3*687*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64269*0 + 3*687*FLEN/8, x4, x1, x2)

inst_21424:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x817f0000; valaddr_reg:x3; val_offset:64272*0 + 3*688*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64272*0 + 3*688*FLEN/8, x4, x1, x2)

inst_21425:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x817f8000; valaddr_reg:x3; val_offset:64275*0 + 3*689*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64275*0 + 3*689*FLEN/8, x4, x1, x2)

inst_21426:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x817fc000; valaddr_reg:x3; val_offset:64278*0 + 3*690*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64278*0 + 3*690*FLEN/8, x4, x1, x2)

inst_21427:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x817fe000; valaddr_reg:x3; val_offset:64281*0 + 3*691*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64281*0 + 3*691*FLEN/8, x4, x1, x2)

inst_21428:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x817ff000; valaddr_reg:x3; val_offset:64284*0 + 3*692*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64284*0 + 3*692*FLEN/8, x4, x1, x2)

inst_21429:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x817ff800; valaddr_reg:x3; val_offset:64287*0 + 3*693*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64287*0 + 3*693*FLEN/8, x4, x1, x2)

inst_21430:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x817ffc00; valaddr_reg:x3; val_offset:64290*0 + 3*694*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64290*0 + 3*694*FLEN/8, x4, x1, x2)

inst_21431:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x817ffe00; valaddr_reg:x3; val_offset:64293*0 + 3*695*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64293*0 + 3*695*FLEN/8, x4, x1, x2)

inst_21432:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x817fff00; valaddr_reg:x3; val_offset:64296*0 + 3*696*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64296*0 + 3*696*FLEN/8, x4, x1, x2)

inst_21433:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x817fff80; valaddr_reg:x3; val_offset:64299*0 + 3*697*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64299*0 + 3*697*FLEN/8, x4, x1, x2)

inst_21434:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x817fffc0; valaddr_reg:x3; val_offset:64302*0 + 3*698*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64302*0 + 3*698*FLEN/8, x4, x1, x2)

inst_21435:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x817fffe0; valaddr_reg:x3; val_offset:64305*0 + 3*699*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64305*0 + 3*699*FLEN/8, x4, x1, x2)

inst_21436:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x817ffff0; valaddr_reg:x3; val_offset:64308*0 + 3*700*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64308*0 + 3*700*FLEN/8, x4, x1, x2)

inst_21437:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x817ffff8; valaddr_reg:x3; val_offset:64311*0 + 3*701*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64311*0 + 3*701*FLEN/8, x4, x1, x2)

inst_21438:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x817ffffc; valaddr_reg:x3; val_offset:64314*0 + 3*702*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64314*0 + 3*702*FLEN/8, x4, x1, x2)

inst_21439:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x817ffffe; valaddr_reg:x3; val_offset:64317*0 + 3*703*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64317*0 + 3*703*FLEN/8, x4, x1, x2)

inst_21440:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e56aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede56aa; op2val:0x80000000;
op3val:0x817fffff; valaddr_reg:x3; val_offset:64320*0 + 3*704*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64320*0 + 3*704*FLEN/8, x4, x1, x2)

inst_21441:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x80800001; valaddr_reg:x3; val_offset:64323*0 + 3*705*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64323*0 + 3*705*FLEN/8, x4, x1, x2)

inst_21442:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x80800003; valaddr_reg:x3; val_offset:64326*0 + 3*706*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64326*0 + 3*706*FLEN/8, x4, x1, x2)

inst_21443:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x80800007; valaddr_reg:x3; val_offset:64329*0 + 3*707*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64329*0 + 3*707*FLEN/8, x4, x1, x2)

inst_21444:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x80999999; valaddr_reg:x3; val_offset:64332*0 + 3*708*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64332*0 + 3*708*FLEN/8, x4, x1, x2)

inst_21445:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x80a49249; valaddr_reg:x3; val_offset:64335*0 + 3*709*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64335*0 + 3*709*FLEN/8, x4, x1, x2)

inst_21446:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x80b33333; valaddr_reg:x3; val_offset:64338*0 + 3*710*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64338*0 + 3*710*FLEN/8, x4, x1, x2)

inst_21447:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x80b6db6d; valaddr_reg:x3; val_offset:64341*0 + 3*711*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64341*0 + 3*711*FLEN/8, x4, x1, x2)

inst_21448:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:64344*0 + 3*712*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64344*0 + 3*712*FLEN/8, x4, x1, x2)

inst_21449:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x80c44444; valaddr_reg:x3; val_offset:64347*0 + 3*713*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64347*0 + 3*713*FLEN/8, x4, x1, x2)

inst_21450:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x80cccccc; valaddr_reg:x3; val_offset:64350*0 + 3*714*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64350*0 + 3*714*FLEN/8, x4, x1, x2)

inst_21451:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x80db6db6; valaddr_reg:x3; val_offset:64353*0 + 3*715*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64353*0 + 3*715*FLEN/8, x4, x1, x2)

inst_21452:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x80e66666; valaddr_reg:x3; val_offset:64356*0 + 3*716*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64356*0 + 3*716*FLEN/8, x4, x1, x2)

inst_21453:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x80edb6db; valaddr_reg:x3; val_offset:64359*0 + 3*717*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64359*0 + 3*717*FLEN/8, x4, x1, x2)

inst_21454:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x80fffff8; valaddr_reg:x3; val_offset:64362*0 + 3*718*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64362*0 + 3*718*FLEN/8, x4, x1, x2)

inst_21455:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x80fffffc; valaddr_reg:x3; val_offset:64365*0 + 3*719*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64365*0 + 3*719*FLEN/8, x4, x1, x2)

inst_21456:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x80fffffe; valaddr_reg:x3; val_offset:64368*0 + 3*720*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64368*0 + 3*720*FLEN/8, x4, x1, x2)

inst_21457:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x86000000; valaddr_reg:x3; val_offset:64371*0 + 3*721*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64371*0 + 3*721*FLEN/8, x4, x1, x2)

inst_21458:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x86000001; valaddr_reg:x3; val_offset:64374*0 + 3*722*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64374*0 + 3*722*FLEN/8, x4, x1, x2)

inst_21459:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x86000003; valaddr_reg:x3; val_offset:64377*0 + 3*723*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64377*0 + 3*723*FLEN/8, x4, x1, x2)

inst_21460:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x86000007; valaddr_reg:x3; val_offset:64380*0 + 3*724*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64380*0 + 3*724*FLEN/8, x4, x1, x2)

inst_21461:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x8600000f; valaddr_reg:x3; val_offset:64383*0 + 3*725*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64383*0 + 3*725*FLEN/8, x4, x1, x2)

inst_21462:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x8600001f; valaddr_reg:x3; val_offset:64386*0 + 3*726*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64386*0 + 3*726*FLEN/8, x4, x1, x2)

inst_21463:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x8600003f; valaddr_reg:x3; val_offset:64389*0 + 3*727*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64389*0 + 3*727*FLEN/8, x4, x1, x2)

inst_21464:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x8600007f; valaddr_reg:x3; val_offset:64392*0 + 3*728*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64392*0 + 3*728*FLEN/8, x4, x1, x2)

inst_21465:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x860000ff; valaddr_reg:x3; val_offset:64395*0 + 3*729*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64395*0 + 3*729*FLEN/8, x4, x1, x2)

inst_21466:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x860001ff; valaddr_reg:x3; val_offset:64398*0 + 3*730*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64398*0 + 3*730*FLEN/8, x4, x1, x2)

inst_21467:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x860003ff; valaddr_reg:x3; val_offset:64401*0 + 3*731*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64401*0 + 3*731*FLEN/8, x4, x1, x2)

inst_21468:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x860007ff; valaddr_reg:x3; val_offset:64404*0 + 3*732*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64404*0 + 3*732*FLEN/8, x4, x1, x2)

inst_21469:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x86000fff; valaddr_reg:x3; val_offset:64407*0 + 3*733*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64407*0 + 3*733*FLEN/8, x4, x1, x2)

inst_21470:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x86001fff; valaddr_reg:x3; val_offset:64410*0 + 3*734*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64410*0 + 3*734*FLEN/8, x4, x1, x2)

inst_21471:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x86003fff; valaddr_reg:x3; val_offset:64413*0 + 3*735*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64413*0 + 3*735*FLEN/8, x4, x1, x2)

inst_21472:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x86007fff; valaddr_reg:x3; val_offset:64416*0 + 3*736*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64416*0 + 3*736*FLEN/8, x4, x1, x2)

inst_21473:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x8600ffff; valaddr_reg:x3; val_offset:64419*0 + 3*737*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64419*0 + 3*737*FLEN/8, x4, x1, x2)

inst_21474:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x8601ffff; valaddr_reg:x3; val_offset:64422*0 + 3*738*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64422*0 + 3*738*FLEN/8, x4, x1, x2)

inst_21475:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x8603ffff; valaddr_reg:x3; val_offset:64425*0 + 3*739*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64425*0 + 3*739*FLEN/8, x4, x1, x2)

inst_21476:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x8607ffff; valaddr_reg:x3; val_offset:64428*0 + 3*740*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64428*0 + 3*740*FLEN/8, x4, x1, x2)

inst_21477:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x860fffff; valaddr_reg:x3; val_offset:64431*0 + 3*741*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64431*0 + 3*741*FLEN/8, x4, x1, x2)

inst_21478:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x861fffff; valaddr_reg:x3; val_offset:64434*0 + 3*742*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64434*0 + 3*742*FLEN/8, x4, x1, x2)

inst_21479:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x863fffff; valaddr_reg:x3; val_offset:64437*0 + 3*743*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64437*0 + 3*743*FLEN/8, x4, x1, x2)

inst_21480:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x86400000; valaddr_reg:x3; val_offset:64440*0 + 3*744*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64440*0 + 3*744*FLEN/8, x4, x1, x2)

inst_21481:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x86600000; valaddr_reg:x3; val_offset:64443*0 + 3*745*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64443*0 + 3*745*FLEN/8, x4, x1, x2)

inst_21482:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x86700000; valaddr_reg:x3; val_offset:64446*0 + 3*746*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64446*0 + 3*746*FLEN/8, x4, x1, x2)

inst_21483:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x86780000; valaddr_reg:x3; val_offset:64449*0 + 3*747*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64449*0 + 3*747*FLEN/8, x4, x1, x2)

inst_21484:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x867c0000; valaddr_reg:x3; val_offset:64452*0 + 3*748*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64452*0 + 3*748*FLEN/8, x4, x1, x2)

inst_21485:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x867e0000; valaddr_reg:x3; val_offset:64455*0 + 3*749*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64455*0 + 3*749*FLEN/8, x4, x1, x2)

inst_21486:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x867f0000; valaddr_reg:x3; val_offset:64458*0 + 3*750*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64458*0 + 3*750*FLEN/8, x4, x1, x2)

inst_21487:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x867f8000; valaddr_reg:x3; val_offset:64461*0 + 3*751*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64461*0 + 3*751*FLEN/8, x4, x1, x2)

inst_21488:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x867fc000; valaddr_reg:x3; val_offset:64464*0 + 3*752*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64464*0 + 3*752*FLEN/8, x4, x1, x2)

inst_21489:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x867fe000; valaddr_reg:x3; val_offset:64467*0 + 3*753*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64467*0 + 3*753*FLEN/8, x4, x1, x2)

inst_21490:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x867ff000; valaddr_reg:x3; val_offset:64470*0 + 3*754*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64470*0 + 3*754*FLEN/8, x4, x1, x2)

inst_21491:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x867ff800; valaddr_reg:x3; val_offset:64473*0 + 3*755*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64473*0 + 3*755*FLEN/8, x4, x1, x2)

inst_21492:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x867ffc00; valaddr_reg:x3; val_offset:64476*0 + 3*756*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64476*0 + 3*756*FLEN/8, x4, x1, x2)

inst_21493:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x867ffe00; valaddr_reg:x3; val_offset:64479*0 + 3*757*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64479*0 + 3*757*FLEN/8, x4, x1, x2)

inst_21494:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x867fff00; valaddr_reg:x3; val_offset:64482*0 + 3*758*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64482*0 + 3*758*FLEN/8, x4, x1, x2)

inst_21495:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x867fff80; valaddr_reg:x3; val_offset:64485*0 + 3*759*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64485*0 + 3*759*FLEN/8, x4, x1, x2)

inst_21496:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x867fffc0; valaddr_reg:x3; val_offset:64488*0 + 3*760*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64488*0 + 3*760*FLEN/8, x4, x1, x2)

inst_21497:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x867fffe0; valaddr_reg:x3; val_offset:64491*0 + 3*761*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64491*0 + 3*761*FLEN/8, x4, x1, x2)

inst_21498:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x867ffff0; valaddr_reg:x3; val_offset:64494*0 + 3*762*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64494*0 + 3*762*FLEN/8, x4, x1, x2)

inst_21499:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x867ffff8; valaddr_reg:x3; val_offset:64497*0 + 3*763*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64497*0 + 3*763*FLEN/8, x4, x1, x2)

inst_21500:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x867ffffc; valaddr_reg:x3; val_offset:64500*0 + 3*764*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64500*0 + 3*764*FLEN/8, x4, x1, x2)

inst_21501:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x867ffffe; valaddr_reg:x3; val_offset:64503*0 + 3*765*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64503*0 + 3*765*FLEN/8, x4, x1, x2)

inst_21502:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e5e22 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede5e22; op2val:0x80000000;
op3val:0x867fffff; valaddr_reg:x3; val_offset:64506*0 + 3*766*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64506*0 + 3*766*FLEN/8, x4, x1, x2)

inst_21503:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf8800000; valaddr_reg:x3; val_offset:64509*0 + 3*767*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64509*0 + 3*767*FLEN/8, x4, x1, x2)
#endif


RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(0x7ed750c0,32,FLEN)
NAN_BOXED(0x804c17cf,32,FLEN)
NAN_BOXED(0xa17fffc0,32,FLEN)
NAN_BOXED(0x7ed750c0,32,FLEN)
NAN_BOXED(0x804c17cf,32,FLEN)
NAN_BOXED(0xa17fffe0,32,FLEN)
NAN_BOXED(0x7ed750c0,32,FLEN)
NAN_BOXED(0x804c17cf,32,FLEN)
NAN_BOXED(0xa17ffff0,32,FLEN)
NAN_BOXED(0x7ed750c0,32,FLEN)
NAN_BOXED(0x804c17cf,32,FLEN)
NAN_BOXED(0xa17ffff8,32,FLEN)
NAN_BOXED(0x7ed750c0,32,FLEN)
NAN_BOXED(0x804c17cf,32,FLEN)
NAN_BOXED(0xa17ffffc,32,FLEN)
NAN_BOXED(0x7ed750c0,32,FLEN)
NAN_BOXED(0x804c17cf,32,FLEN)
NAN_BOXED(0xa17ffffe,32,FLEN)
NAN_BOXED(0x7ed750c0,32,FLEN)
NAN_BOXED(0x804c17cf,32,FLEN)
NAN_BOXED(0xa17fffff,32,FLEN)
NAN_BOXED(0x7ed750c0,32,FLEN)
NAN_BOXED(0x804c17cf,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7ed750c0,32,FLEN)
NAN_BOXED(0x804c17cf,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7ed750c0,32,FLEN)
NAN_BOXED(0x804c17cf,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7ed750c0,32,FLEN)
NAN_BOXED(0x804c17cf,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7ed750c0,32,FLEN)
NAN_BOXED(0x804c17cf,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7ed750c0,32,FLEN)
NAN_BOXED(0x804c17cf,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7ed750c0,32,FLEN)
NAN_BOXED(0x804c17cf,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7ed750c0,32,FLEN)
NAN_BOXED(0x804c17cf,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7ed750c0,32,FLEN)
NAN_BOXED(0x804c17cf,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7ed750c0,32,FLEN)
NAN_BOXED(0x804c17cf,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7ed750c0,32,FLEN)
NAN_BOXED(0x804c17cf,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7ed750c0,32,FLEN)
NAN_BOXED(0x804c17cf,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7ed750c0,32,FLEN)
NAN_BOXED(0x804c17cf,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7ed750c0,32,FLEN)
NAN_BOXED(0x804c17cf,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7ed750c0,32,FLEN)
NAN_BOXED(0x804c17cf,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7ed750c0,32,FLEN)
NAN_BOXED(0x804c17cf,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xae800000,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xae800001,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xae800003,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xae800007,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xae80000f,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xae80001f,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xae80003f,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xae80007f,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xae8000ff,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xae8001ff,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xae8003ff,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xae8007ff,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xae800fff,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xae801fff,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xae803fff,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xae807fff,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xae80ffff,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xae81ffff,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xae83ffff,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xae87ffff,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xae8fffff,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xae9fffff,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xaebfffff,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xaec00000,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xaee00000,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xaef00000,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xaef80000,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xaefc0000,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xaefe0000,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xaeff0000,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xaeff8000,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xaeffc000,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xaeffe000,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xaefff000,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xaefff800,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xaefffc00,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xaefffe00,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xaeffff00,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xaeffff80,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xaeffffc0,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xaeffffe0,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xaefffff0,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xaefffff8,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xaefffffc,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xaefffffe,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xaeffffff,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7ed852a0,32,FLEN)
NAN_BOXED(0x804bbd1a,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000001,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000003,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000007,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80199999,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80249249,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80333333,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8036db6d,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x803bbbbb,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80444444,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x804ccccc,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x805b6db6,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80666666,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x806db6db,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffff8,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffc,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffe,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80800000,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80800001,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80800003,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80800007,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8080000f,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8080001f,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8080003f,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8080007f,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x808000ff,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x808001ff,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x808003ff,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x808007ff,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80800fff,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80801fff,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80803fff,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80807fff,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8080ffff,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8081ffff,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8083ffff,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8087ffff,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x808fffff,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x809fffff,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80bfffff,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80c00000,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80e00000,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80f00000,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80f80000,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fc0000,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fe0000,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80ff0000,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80ff8000,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80ffc000,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80ffe000,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fff000,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fff800,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fffc00,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fffe00,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80ffff00,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80ffff80,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80ffffc0,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80ffffe0,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fffff0,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fffff8,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fffffc,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fffffe,32,FLEN)
NAN_BOXED(0x7ed89a86,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80ffffff,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa0000000,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa0000001,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa0000003,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa0000007,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa000000f,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa000001f,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa000003f,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa000007f,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa00000ff,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa00001ff,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa00003ff,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa00007ff,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa0000fff,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa0001fff,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa0003fff,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa0007fff,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa000ffff,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa001ffff,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa003ffff,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa007ffff,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa00fffff,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa01fffff,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa03fffff,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa0400000,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa0600000,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa0700000,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa0780000,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa07c0000,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa07e0000,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa07f0000,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa07f8000,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa07fc000,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa07fe000,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa07ff000,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa07ff800,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa07ffc00,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa07ffe00,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa07fff00,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa07fff80,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa07fffc0,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa07fffe0,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa07ffff0,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa07ffff8,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa07ffffc,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa07ffffe,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xa07fffff,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7ed8efee,32,FLEN)
NAN_BOXED(0x804b862e,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
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NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
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NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
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NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc3000000,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc3000001,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc3000003,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc3000007,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc300000f,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc300001f,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc300003f,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc300007f,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc30000ff,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc30001ff,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc30003ff,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc30007ff,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc3000fff,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc3001fff,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc3003fff,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc3007fff,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc300ffff,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc301ffff,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc303ffff,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc307ffff,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc30fffff,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc31fffff,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc33fffff,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc3400000,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc3600000,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc3700000,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc3780000,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc37c0000,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc37e0000,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc37f0000,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc37f8000,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc37fc000,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc37fe000,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc37ff000,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc37ff800,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc37ffc00,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc37ffe00,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc37fff00,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc37fff80,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc37fffc0,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc37fffe0,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc37ffff0,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc37ffff8,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc37ffffc,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc37ffffe,32,FLEN)
NAN_BOXED(0x7ed954c5,32,FLEN)
NAN_BOXED(0x804b6323,32,FLEN)
NAN_BOXED(0xc37fffff,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800001,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800003,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800007,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x999999,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa49249,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb33333,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb6db6d,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbbbbbb,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc44444,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcccccc,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdb6db6,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe66666,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xedb6db,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffff8,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffc,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffe,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3800000,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3800001,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3800003,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3800007,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x380000f,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x380001f,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x380003f,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x380007f,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x38000ff,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x38001ff,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x38003ff,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x38007ff,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3800fff,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3801fff,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3803fff,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3807fff,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x380ffff,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x381ffff,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x383ffff,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x387ffff,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x38fffff,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x39fffff,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3bfffff,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3c00000,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3e00000,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3f00000,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3f80000,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fc0000,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fe0000,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ff0000,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ff8000,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffc000,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffe000,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fff000,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fff800,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fffc00,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fffe00,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffff00,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffff80,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffffc0,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffffe0,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fffff0,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fffff8,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fffffc,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fffffe,32,FLEN)
NAN_BOXED(0x7edab1d4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffffff,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x199999,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x249249,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x333333,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x36db6d,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3bbbbb,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x444444,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ccccc,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5b6db6,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x666666,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6db6db,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff8,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffc,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffe,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe800000,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe800001,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe800003,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe800007,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe80000f,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe80001f,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe80003f,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe80007f,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe8000ff,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe8001ff,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe8003ff,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe8007ff,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe800fff,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe801fff,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe803fff,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe807fff,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe80ffff,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe81ffff,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe83ffff,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe87ffff,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe8fffff,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe9fffff,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xebfffff,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xec00000,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xee00000,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xef00000,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xef80000,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xefc0000,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xefe0000,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xeff0000,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xeff8000,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xeffc000,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xeffe000,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xefff000,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xefff800,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xefffc00,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xefffe00,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xeffff00,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xeffff80,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xeffffc0,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xeffffe0,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xefffff0,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xefffff8,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xefffffc,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xefffffe,32,FLEN)
NAN_BOXED(0x7edb1c9d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xeffffff,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800001,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800003,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800007,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x999999,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa49249,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb33333,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb6db6d,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbbbbbb,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc44444,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcccccc,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdb6db6,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe66666,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xedb6db,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffff8,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffc,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffe,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1800000,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1800001,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1800003,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1800007,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x180000f,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x180001f,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x180003f,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x180007f,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x18000ff,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x18001ff,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x18003ff,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x18007ff,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1800fff,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1801fff,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1803fff,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1807fff,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x180ffff,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x181ffff,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x183ffff,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x187ffff,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x18fffff,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x19fffff,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1bfffff,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1c00000,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1e00000,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1f00000,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1f80000,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1fc0000,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1fe0000,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1ff0000,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1ff8000,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1ffc000,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1ffe000,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1fff000,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1fff800,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1fffc00,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1fffe00,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1ffff00,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1ffff80,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1ffffc0,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1ffffe0,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1fffff0,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1fffff8,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1fffffc,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1fffffe,32,FLEN)
NAN_BOXED(0x7edb5a74,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1ffffff,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x61800000,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x61800001,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x61800003,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x61800007,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x6180000f,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x6180001f,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x6180003f,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x6180007f,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x618000ff,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x618001ff,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x618003ff,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x618007ff,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x61800fff,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x61801fff,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x61803fff,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x61807fff,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x6180ffff,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x6181ffff,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x6183ffff,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x6187ffff,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x618fffff,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x619fffff,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x61bfffff,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x61c00000,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x61e00000,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x61f00000,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x61f80000,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x61fc0000,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x61fe0000,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x61ff0000,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x61ff8000,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x61ffc000,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x61ffe000,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x61fff000,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x61fff800,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x61fffc00,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x61fffe00,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x61ffff00,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x61ffff80,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x61ffffc0,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x61ffffe0,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x61fffff0,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x61fffff8,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x61fffffc,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x61fffffe,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x61ffffff,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x7f000001,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x7f000003,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x7f000007,32,FLEN)
NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
NAN_BOXED(0x7f199999,32,FLEN)
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NAN_BOXED(0x40150891,32,FLEN)
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NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
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NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
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NAN_BOXED(0x40150891,32,FLEN)
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NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
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NAN_BOXED(0x40150891,32,FLEN)
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NAN_BOXED(0x7edbdebb,32,FLEN)
NAN_BOXED(0x40150891,32,FLEN)
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NAN_BOXED(0x40150891,32,FLEN)
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NAN_BOXED(0x40150891,32,FLEN)
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NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x804a6985,32,FLEN)
NAN_BOXED(0xa780ffff,32,FLEN)
NAN_BOXED(0x7edc2dcf,32,FLEN)
NAN_BOXED(0x804a6985,32,FLEN)
NAN_BOXED(0xa781ffff,32,FLEN)
NAN_BOXED(0x7edc2dcf,32,FLEN)
NAN_BOXED(0x804a6985,32,FLEN)
NAN_BOXED(0xa783ffff,32,FLEN)
NAN_BOXED(0x7edc2dcf,32,FLEN)
NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x7edc2dcf,32,FLEN)
NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x7edc2dcf,32,FLEN)
NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x7edc2dcf,32,FLEN)
NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x7edc2dcf,32,FLEN)
NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x7edc2dcf,32,FLEN)
NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x7edc2dcf,32,FLEN)
NAN_BOXED(0x804a6985,32,FLEN)
NAN_BOXED(0xa7ffff80,32,FLEN)
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NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x7edc2dcf,32,FLEN)
NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x7edc2dcf,32,FLEN)
NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x7edc2dcf,32,FLEN)
NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x7edc2dcf,32,FLEN)
NAN_BOXED(0x804a6985,32,FLEN)
NAN_BOXED(0xa7fffffc,32,FLEN)
NAN_BOXED(0x7edc2dcf,32,FLEN)
NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x7edc2dcf,32,FLEN)
NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x7edc2dcf,32,FLEN)
NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x7edc2dcf,32,FLEN)
NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x7edc2dcf,32,FLEN)
NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x7edc2dcf,32,FLEN)
NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x7edc2dcf,32,FLEN)
NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x7edc2dcf,32,FLEN)
NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x7edc2dcf,32,FLEN)
NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x7edc2dcf,32,FLEN)
NAN_BOXED(0x804a6985,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
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NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x7edc2dcf,32,FLEN)
NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x7edc2dcf,32,FLEN)
NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x804a6985,32,FLEN)
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NAN_BOXED(0x49cb99,32,FLEN)
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NAN_BOXED(0x7ede0500,32,FLEN)
NAN_BOXED(0x49cb99,32,FLEN)
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NAN_BOXED(0x7ede0500,32,FLEN)
NAN_BOXED(0x49cb99,32,FLEN)
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NAN_BOXED(0x7ede0500,32,FLEN)
NAN_BOXED(0x49cb99,32,FLEN)
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NAN_BOXED(0x7ede0500,32,FLEN)
NAN_BOXED(0x49cb99,32,FLEN)
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NAN_BOXED(0x49cb99,32,FLEN)
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NAN_BOXED(0x49cb99,32,FLEN)
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NAN_BOXED(0x7ede0500,32,FLEN)
NAN_BOXED(0x49cb99,32,FLEN)
NAN_BOXED(0x3ffffffc,32,FLEN)
NAN_BOXED(0x7ede0500,32,FLEN)
NAN_BOXED(0x49cb99,32,FLEN)
NAN_BOXED(0x3ffffffe,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000001,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000003,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000007,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80199999,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80249249,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80333333,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8036db6d,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x803bbbbb,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80444444,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x804ccccc,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x805b6db6,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80666666,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x806db6db,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffff8,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffc,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffe,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x81000000,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x81000001,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x81000003,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x81000007,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8100000f,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8100001f,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8100003f,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8100007f,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x810000ff,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x810001ff,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x810003ff,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x810007ff,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x81000fff,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x81001fff,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x81003fff,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x81007fff,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8100ffff,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8101ffff,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8103ffff,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8107ffff,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x810fffff,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x811fffff,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x813fffff,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x81400000,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x81600000,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x81700000,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x81780000,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x817c0000,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x817e0000,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x817f0000,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x817f8000,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x817fc000,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x817fe000,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x817ff000,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x817ff800,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x817ffc00,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x817ffe00,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x817fff00,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x817fff80,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x817fffc0,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x817fffe0,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x817ffff0,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x817ffff8,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x817ffffc,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x817ffffe,32,FLEN)
NAN_BOXED(0x7ede56aa,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x817fffff,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80800001,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80800003,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80800007,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80999999,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80a49249,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80b33333,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80b6db6d,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80bbbbbb,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80c44444,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80cccccc,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80db6db6,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80e66666,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80edb6db,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fffff8,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fffffc,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fffffe,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86000000,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86000001,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86000003,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86000007,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8600000f,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8600001f,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8600003f,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8600007f,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x860000ff,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x860001ff,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x860003ff,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x860007ff,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86000fff,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86001fff,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86003fff,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86007fff,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8600ffff,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8601ffff,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8603ffff,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8607ffff,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x860fffff,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x861fffff,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x863fffff,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86400000,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86600000,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86700000,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86780000,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867c0000,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867e0000,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867f0000,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867f8000,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867fc000,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867fe000,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867ff000,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867ff800,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867ffc00,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867ffe00,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867fff00,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867fff80,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867fffc0,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867fffe0,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867ffff0,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867ffff8,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867ffffc,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867ffffe,32,FLEN)
NAN_BOXED(0x7ede5e22,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867fffff,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf8800000,32,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;


signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_2:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_3:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_4:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_5:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_6:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine

tsig_begin_canary:
CANARY;
tsig_begin_canary:
CANARY;
mtrap_sigptr:
    .fill 64*(XLEN/32),4,0xdeadbeef
tsig_end_canary:
CANARY;
tsig_end_canary:
CANARY;

#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif

sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
