
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.7.1
// timestamp : Fri Jun 17 14:18:08 2022 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /scratch/pawan/work/normalised/RV32F/fnmsub.s.cgf \
 \
//                  -- xlen 32  \
//                  --randomize \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fnmsub.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fnmsub_b15 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fnmsub_b15)
RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15)
RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_18432:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x3; val_offset:55296*0 + 3*-1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55296*0 + 3*0*FLEN/8, x4, x1, x2)

inst_18433:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x3; val_offset:55299*0 + 3*0*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55299*0 + 3*1*FLEN/8, x4, x1, x2)

inst_18434:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x3; val_offset:55302*0 + 3*1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55302*0 + 3*2*FLEN/8, x4, x1, x2)

inst_18435:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x3; val_offset:55305*0 + 3*2*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55305*0 + 3*3*FLEN/8, x4, x1, x2)

inst_18436:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x3; val_offset:55308*0 + 3*3*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55308*0 + 3*4*FLEN/8, x4, x1, x2)

inst_18437:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x84000000; valaddr_reg:x3; val_offset:55311*0 + 3*4*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55311*0 + 3*5*FLEN/8, x4, x1, x2)

inst_18438:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x84000001; valaddr_reg:x3; val_offset:55314*0 + 3*5*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55314*0 + 3*6*FLEN/8, x4, x1, x2)

inst_18439:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x84000003; valaddr_reg:x3; val_offset:55317*0 + 3*6*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55317*0 + 3*7*FLEN/8, x4, x1, x2)

inst_18440:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x84000007; valaddr_reg:x3; val_offset:55320*0 + 3*7*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55320*0 + 3*8*FLEN/8, x4, x1, x2)

inst_18441:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x8400000f; valaddr_reg:x3; val_offset:55323*0 + 3*8*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55323*0 + 3*9*FLEN/8, x4, x1, x2)

inst_18442:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x8400001f; valaddr_reg:x3; val_offset:55326*0 + 3*9*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55326*0 + 3*10*FLEN/8, x4, x1, x2)

inst_18443:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x8400003f; valaddr_reg:x3; val_offset:55329*0 + 3*10*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55329*0 + 3*11*FLEN/8, x4, x1, x2)

inst_18444:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x8400007f; valaddr_reg:x3; val_offset:55332*0 + 3*11*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55332*0 + 3*12*FLEN/8, x4, x1, x2)

inst_18445:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x840000ff; valaddr_reg:x3; val_offset:55335*0 + 3*12*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55335*0 + 3*13*FLEN/8, x4, x1, x2)

inst_18446:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x840001ff; valaddr_reg:x3; val_offset:55338*0 + 3*13*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55338*0 + 3*14*FLEN/8, x4, x1, x2)

inst_18447:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x840003ff; valaddr_reg:x3; val_offset:55341*0 + 3*14*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55341*0 + 3*15*FLEN/8, x4, x1, x2)

inst_18448:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x840007ff; valaddr_reg:x3; val_offset:55344*0 + 3*15*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55344*0 + 3*16*FLEN/8, x4, x1, x2)

inst_18449:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x84000fff; valaddr_reg:x3; val_offset:55347*0 + 3*16*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55347*0 + 3*17*FLEN/8, x4, x1, x2)

inst_18450:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x84001fff; valaddr_reg:x3; val_offset:55350*0 + 3*17*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55350*0 + 3*18*FLEN/8, x4, x1, x2)

inst_18451:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x84003fff; valaddr_reg:x3; val_offset:55353*0 + 3*18*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55353*0 + 3*19*FLEN/8, x4, x1, x2)

inst_18452:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x84007fff; valaddr_reg:x3; val_offset:55356*0 + 3*19*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55356*0 + 3*20*FLEN/8, x4, x1, x2)

inst_18453:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x8400ffff; valaddr_reg:x3; val_offset:55359*0 + 3*20*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55359*0 + 3*21*FLEN/8, x4, x1, x2)

inst_18454:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x8401ffff; valaddr_reg:x3; val_offset:55362*0 + 3*21*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55362*0 + 3*22*FLEN/8, x4, x1, x2)

inst_18455:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x8403ffff; valaddr_reg:x3; val_offset:55365*0 + 3*22*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55365*0 + 3*23*FLEN/8, x4, x1, x2)

inst_18456:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x8407ffff; valaddr_reg:x3; val_offset:55368*0 + 3*23*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55368*0 + 3*24*FLEN/8, x4, x1, x2)

inst_18457:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x840fffff; valaddr_reg:x3; val_offset:55371*0 + 3*24*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55371*0 + 3*25*FLEN/8, x4, x1, x2)

inst_18458:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x841fffff; valaddr_reg:x3; val_offset:55374*0 + 3*25*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55374*0 + 3*26*FLEN/8, x4, x1, x2)

inst_18459:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x843fffff; valaddr_reg:x3; val_offset:55377*0 + 3*26*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55377*0 + 3*27*FLEN/8, x4, x1, x2)

inst_18460:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x84400000; valaddr_reg:x3; val_offset:55380*0 + 3*27*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55380*0 + 3*28*FLEN/8, x4, x1, x2)

inst_18461:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x84600000; valaddr_reg:x3; val_offset:55383*0 + 3*28*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55383*0 + 3*29*FLEN/8, x4, x1, x2)

inst_18462:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x84700000; valaddr_reg:x3; val_offset:55386*0 + 3*29*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55386*0 + 3*30*FLEN/8, x4, x1, x2)

inst_18463:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x84780000; valaddr_reg:x3; val_offset:55389*0 + 3*30*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55389*0 + 3*31*FLEN/8, x4, x1, x2)

inst_18464:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x847c0000; valaddr_reg:x3; val_offset:55392*0 + 3*31*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55392*0 + 3*32*FLEN/8, x4, x1, x2)

inst_18465:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x847e0000; valaddr_reg:x3; val_offset:55395*0 + 3*32*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55395*0 + 3*33*FLEN/8, x4, x1, x2)

inst_18466:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x847f0000; valaddr_reg:x3; val_offset:55398*0 + 3*33*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55398*0 + 3*34*FLEN/8, x4, x1, x2)

inst_18467:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x847f8000; valaddr_reg:x3; val_offset:55401*0 + 3*34*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55401*0 + 3*35*FLEN/8, x4, x1, x2)

inst_18468:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x847fc000; valaddr_reg:x3; val_offset:55404*0 + 3*35*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55404*0 + 3*36*FLEN/8, x4, x1, x2)

inst_18469:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x847fe000; valaddr_reg:x3; val_offset:55407*0 + 3*36*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55407*0 + 3*37*FLEN/8, x4, x1, x2)

inst_18470:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x847ff000; valaddr_reg:x3; val_offset:55410*0 + 3*37*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55410*0 + 3*38*FLEN/8, x4, x1, x2)

inst_18471:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x847ff800; valaddr_reg:x3; val_offset:55413*0 + 3*38*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55413*0 + 3*39*FLEN/8, x4, x1, x2)

inst_18472:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x847ffc00; valaddr_reg:x3; val_offset:55416*0 + 3*39*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55416*0 + 3*40*FLEN/8, x4, x1, x2)

inst_18473:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x847ffe00; valaddr_reg:x3; val_offset:55419*0 + 3*40*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55419*0 + 3*41*FLEN/8, x4, x1, x2)

inst_18474:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x847fff00; valaddr_reg:x3; val_offset:55422*0 + 3*41*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55422*0 + 3*42*FLEN/8, x4, x1, x2)

inst_18475:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x847fff80; valaddr_reg:x3; val_offset:55425*0 + 3*42*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55425*0 + 3*43*FLEN/8, x4, x1, x2)

inst_18476:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x847fffc0; valaddr_reg:x3; val_offset:55428*0 + 3*43*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55428*0 + 3*44*FLEN/8, x4, x1, x2)

inst_18477:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x847fffe0; valaddr_reg:x3; val_offset:55431*0 + 3*44*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55431*0 + 3*45*FLEN/8, x4, x1, x2)

inst_18478:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x847ffff0; valaddr_reg:x3; val_offset:55434*0 + 3*45*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55434*0 + 3*46*FLEN/8, x4, x1, x2)

inst_18479:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x847ffff8; valaddr_reg:x3; val_offset:55437*0 + 3*46*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55437*0 + 3*47*FLEN/8, x4, x1, x2)

inst_18480:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x847ffffc; valaddr_reg:x3; val_offset:55440*0 + 3*47*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55440*0 + 3*48*FLEN/8, x4, x1, x2)

inst_18481:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x847ffffe; valaddr_reg:x3; val_offset:55443*0 + 3*48*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55443*0 + 3*49*FLEN/8, x4, x1, x2)

inst_18482:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb8d1a5; op2val:0x80000000;
op3val:0x847fffff; valaddr_reg:x3; val_offset:55446*0 + 3*49*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55446*0 + 3*50*FLEN/8, x4, x1, x2)

inst_18483:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:55449*0 + 3*50*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55449*0 + 3*51*FLEN/8, x4, x1, x2)

inst_18484:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:55452*0 + 3*51*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55452*0 + 3*52*FLEN/8, x4, x1, x2)

inst_18485:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:55455*0 + 3*52*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55455*0 + 3*53*FLEN/8, x4, x1, x2)

inst_18486:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x199999; valaddr_reg:x3; val_offset:55458*0 + 3*53*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55458*0 + 3*54*FLEN/8, x4, x1, x2)

inst_18487:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x249249; valaddr_reg:x3; val_offset:55461*0 + 3*54*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55461*0 + 3*55*FLEN/8, x4, x1, x2)

inst_18488:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x333333; valaddr_reg:x3; val_offset:55464*0 + 3*55*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55464*0 + 3*56*FLEN/8, x4, x1, x2)

inst_18489:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x36db6d; valaddr_reg:x3; val_offset:55467*0 + 3*56*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55467*0 + 3*57*FLEN/8, x4, x1, x2)

inst_18490:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x3bbbbb; valaddr_reg:x3; val_offset:55470*0 + 3*57*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55470*0 + 3*58*FLEN/8, x4, x1, x2)

inst_18491:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x444444; valaddr_reg:x3; val_offset:55473*0 + 3*58*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55473*0 + 3*59*FLEN/8, x4, x1, x2)

inst_18492:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x4ccccc; valaddr_reg:x3; val_offset:55476*0 + 3*59*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55476*0 + 3*60*FLEN/8, x4, x1, x2)

inst_18493:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x5b6db6; valaddr_reg:x3; val_offset:55479*0 + 3*60*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55479*0 + 3*61*FLEN/8, x4, x1, x2)

inst_18494:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x666666; valaddr_reg:x3; val_offset:55482*0 + 3*61*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55482*0 + 3*62*FLEN/8, x4, x1, x2)

inst_18495:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x6db6db; valaddr_reg:x3; val_offset:55485*0 + 3*62*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55485*0 + 3*63*FLEN/8, x4, x1, x2)

inst_18496:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x7ffff8; valaddr_reg:x3; val_offset:55488*0 + 3*63*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55488*0 + 3*64*FLEN/8, x4, x1, x2)

inst_18497:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x7ffffc; valaddr_reg:x3; val_offset:55491*0 + 3*64*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55491*0 + 3*65*FLEN/8, x4, x1, x2)

inst_18498:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x7ffffe; valaddr_reg:x3; val_offset:55494*0 + 3*65*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55494*0 + 3*66*FLEN/8, x4, x1, x2)

inst_18499:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x4800000; valaddr_reg:x3; val_offset:55497*0 + 3*66*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55497*0 + 3*67*FLEN/8, x4, x1, x2)

inst_18500:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x4800001; valaddr_reg:x3; val_offset:55500*0 + 3*67*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55500*0 + 3*68*FLEN/8, x4, x1, x2)

inst_18501:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x4800003; valaddr_reg:x3; val_offset:55503*0 + 3*68*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55503*0 + 3*69*FLEN/8, x4, x1, x2)

inst_18502:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x4800007; valaddr_reg:x3; val_offset:55506*0 + 3*69*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55506*0 + 3*70*FLEN/8, x4, x1, x2)

inst_18503:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x480000f; valaddr_reg:x3; val_offset:55509*0 + 3*70*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55509*0 + 3*71*FLEN/8, x4, x1, x2)

inst_18504:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x480001f; valaddr_reg:x3; val_offset:55512*0 + 3*71*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55512*0 + 3*72*FLEN/8, x4, x1, x2)

inst_18505:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x480003f; valaddr_reg:x3; val_offset:55515*0 + 3*72*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55515*0 + 3*73*FLEN/8, x4, x1, x2)

inst_18506:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x480007f; valaddr_reg:x3; val_offset:55518*0 + 3*73*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55518*0 + 3*74*FLEN/8, x4, x1, x2)

inst_18507:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x48000ff; valaddr_reg:x3; val_offset:55521*0 + 3*74*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55521*0 + 3*75*FLEN/8, x4, x1, x2)

inst_18508:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x48001ff; valaddr_reg:x3; val_offset:55524*0 + 3*75*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55524*0 + 3*76*FLEN/8, x4, x1, x2)

inst_18509:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x48003ff; valaddr_reg:x3; val_offset:55527*0 + 3*76*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55527*0 + 3*77*FLEN/8, x4, x1, x2)

inst_18510:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x48007ff; valaddr_reg:x3; val_offset:55530*0 + 3*77*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55530*0 + 3*78*FLEN/8, x4, x1, x2)

inst_18511:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x4800fff; valaddr_reg:x3; val_offset:55533*0 + 3*78*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55533*0 + 3*79*FLEN/8, x4, x1, x2)

inst_18512:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x4801fff; valaddr_reg:x3; val_offset:55536*0 + 3*79*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55536*0 + 3*80*FLEN/8, x4, x1, x2)

inst_18513:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x4803fff; valaddr_reg:x3; val_offset:55539*0 + 3*80*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55539*0 + 3*81*FLEN/8, x4, x1, x2)

inst_18514:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x4807fff; valaddr_reg:x3; val_offset:55542*0 + 3*81*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55542*0 + 3*82*FLEN/8, x4, x1, x2)

inst_18515:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x480ffff; valaddr_reg:x3; val_offset:55545*0 + 3*82*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55545*0 + 3*83*FLEN/8, x4, x1, x2)

inst_18516:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x481ffff; valaddr_reg:x3; val_offset:55548*0 + 3*83*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55548*0 + 3*84*FLEN/8, x4, x1, x2)

inst_18517:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x483ffff; valaddr_reg:x3; val_offset:55551*0 + 3*84*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55551*0 + 3*85*FLEN/8, x4, x1, x2)

inst_18518:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x487ffff; valaddr_reg:x3; val_offset:55554*0 + 3*85*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55554*0 + 3*86*FLEN/8, x4, x1, x2)

inst_18519:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x48fffff; valaddr_reg:x3; val_offset:55557*0 + 3*86*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55557*0 + 3*87*FLEN/8, x4, x1, x2)

inst_18520:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x49fffff; valaddr_reg:x3; val_offset:55560*0 + 3*87*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55560*0 + 3*88*FLEN/8, x4, x1, x2)

inst_18521:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x4bfffff; valaddr_reg:x3; val_offset:55563*0 + 3*88*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55563*0 + 3*89*FLEN/8, x4, x1, x2)

inst_18522:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x4c00000; valaddr_reg:x3; val_offset:55566*0 + 3*89*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55566*0 + 3*90*FLEN/8, x4, x1, x2)

inst_18523:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x4e00000; valaddr_reg:x3; val_offset:55569*0 + 3*90*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55569*0 + 3*91*FLEN/8, x4, x1, x2)

inst_18524:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x4f00000; valaddr_reg:x3; val_offset:55572*0 + 3*91*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55572*0 + 3*92*FLEN/8, x4, x1, x2)

inst_18525:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x4f80000; valaddr_reg:x3; val_offset:55575*0 + 3*92*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55575*0 + 3*93*FLEN/8, x4, x1, x2)

inst_18526:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x4fc0000; valaddr_reg:x3; val_offset:55578*0 + 3*93*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55578*0 + 3*94*FLEN/8, x4, x1, x2)

inst_18527:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x4fe0000; valaddr_reg:x3; val_offset:55581*0 + 3*94*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55581*0 + 3*95*FLEN/8, x4, x1, x2)

inst_18528:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x4ff0000; valaddr_reg:x3; val_offset:55584*0 + 3*95*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55584*0 + 3*96*FLEN/8, x4, x1, x2)

inst_18529:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x4ff8000; valaddr_reg:x3; val_offset:55587*0 + 3*96*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55587*0 + 3*97*FLEN/8, x4, x1, x2)

inst_18530:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x4ffc000; valaddr_reg:x3; val_offset:55590*0 + 3*97*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55590*0 + 3*98*FLEN/8, x4, x1, x2)

inst_18531:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x4ffe000; valaddr_reg:x3; val_offset:55593*0 + 3*98*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55593*0 + 3*99*FLEN/8, x4, x1, x2)

inst_18532:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x4fff000; valaddr_reg:x3; val_offset:55596*0 + 3*99*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55596*0 + 3*100*FLEN/8, x4, x1, x2)

inst_18533:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x4fff800; valaddr_reg:x3; val_offset:55599*0 + 3*100*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55599*0 + 3*101*FLEN/8, x4, x1, x2)

inst_18534:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x4fffc00; valaddr_reg:x3; val_offset:55602*0 + 3*101*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55602*0 + 3*102*FLEN/8, x4, x1, x2)

inst_18535:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x4fffe00; valaddr_reg:x3; val_offset:55605*0 + 3*102*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55605*0 + 3*103*FLEN/8, x4, x1, x2)

inst_18536:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x4ffff00; valaddr_reg:x3; val_offset:55608*0 + 3*103*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55608*0 + 3*104*FLEN/8, x4, x1, x2)

inst_18537:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x4ffff80; valaddr_reg:x3; val_offset:55611*0 + 3*104*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55611*0 + 3*105*FLEN/8, x4, x1, x2)

inst_18538:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x4ffffc0; valaddr_reg:x3; val_offset:55614*0 + 3*105*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55614*0 + 3*106*FLEN/8, x4, x1, x2)

inst_18539:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x4ffffe0; valaddr_reg:x3; val_offset:55617*0 + 3*106*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55617*0 + 3*107*FLEN/8, x4, x1, x2)

inst_18540:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x4fffff0; valaddr_reg:x3; val_offset:55620*0 + 3*107*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55620*0 + 3*108*FLEN/8, x4, x1, x2)

inst_18541:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x4fffff8; valaddr_reg:x3; val_offset:55623*0 + 3*108*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55623*0 + 3*109*FLEN/8, x4, x1, x2)

inst_18542:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x4fffffc; valaddr_reg:x3; val_offset:55626*0 + 3*109*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55626*0 + 3*110*FLEN/8, x4, x1, x2)

inst_18543:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x4fffffe; valaddr_reg:x3; val_offset:55629*0 + 3*110*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55629*0 + 3*111*FLEN/8, x4, x1, x2)

inst_18544:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x39aa1a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb9aa1a; op2val:0x0;
op3val:0x4ffffff; valaddr_reg:x3; val_offset:55632*0 + 3*111*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55632*0 + 3*112*FLEN/8, x4, x1, x2)

inst_18545:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe3800000; valaddr_reg:x3; val_offset:55635*0 + 3*112*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55635*0 + 3*113*FLEN/8, x4, x1, x2)

inst_18546:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe3800001; valaddr_reg:x3; val_offset:55638*0 + 3*113*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55638*0 + 3*114*FLEN/8, x4, x1, x2)

inst_18547:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe3800003; valaddr_reg:x3; val_offset:55641*0 + 3*114*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55641*0 + 3*115*FLEN/8, x4, x1, x2)

inst_18548:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe3800007; valaddr_reg:x3; val_offset:55644*0 + 3*115*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55644*0 + 3*116*FLEN/8, x4, x1, x2)

inst_18549:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe380000f; valaddr_reg:x3; val_offset:55647*0 + 3*116*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55647*0 + 3*117*FLEN/8, x4, x1, x2)

inst_18550:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe380001f; valaddr_reg:x3; val_offset:55650*0 + 3*117*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55650*0 + 3*118*FLEN/8, x4, x1, x2)

inst_18551:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe380003f; valaddr_reg:x3; val_offset:55653*0 + 3*118*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55653*0 + 3*119*FLEN/8, x4, x1, x2)

inst_18552:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe380007f; valaddr_reg:x3; val_offset:55656*0 + 3*119*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55656*0 + 3*120*FLEN/8, x4, x1, x2)

inst_18553:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe38000ff; valaddr_reg:x3; val_offset:55659*0 + 3*120*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55659*0 + 3*121*FLEN/8, x4, x1, x2)

inst_18554:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe38001ff; valaddr_reg:x3; val_offset:55662*0 + 3*121*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55662*0 + 3*122*FLEN/8, x4, x1, x2)

inst_18555:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe38003ff; valaddr_reg:x3; val_offset:55665*0 + 3*122*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55665*0 + 3*123*FLEN/8, x4, x1, x2)

inst_18556:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe38007ff; valaddr_reg:x3; val_offset:55668*0 + 3*123*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55668*0 + 3*124*FLEN/8, x4, x1, x2)

inst_18557:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe3800fff; valaddr_reg:x3; val_offset:55671*0 + 3*124*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55671*0 + 3*125*FLEN/8, x4, x1, x2)

inst_18558:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe3801fff; valaddr_reg:x3; val_offset:55674*0 + 3*125*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55674*0 + 3*126*FLEN/8, x4, x1, x2)

inst_18559:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe3803fff; valaddr_reg:x3; val_offset:55677*0 + 3*126*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55677*0 + 3*127*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_2)

inst_18560:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe3807fff; valaddr_reg:x3; val_offset:55680*0 + 3*127*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55680*0 + 3*128*FLEN/8, x4, x1, x2)

inst_18561:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe380ffff; valaddr_reg:x3; val_offset:55683*0 + 3*128*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55683*0 + 3*129*FLEN/8, x4, x1, x2)

inst_18562:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe381ffff; valaddr_reg:x3; val_offset:55686*0 + 3*129*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55686*0 + 3*130*FLEN/8, x4, x1, x2)

inst_18563:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe383ffff; valaddr_reg:x3; val_offset:55689*0 + 3*130*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55689*0 + 3*131*FLEN/8, x4, x1, x2)

inst_18564:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe387ffff; valaddr_reg:x3; val_offset:55692*0 + 3*131*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55692*0 + 3*132*FLEN/8, x4, x1, x2)

inst_18565:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe38fffff; valaddr_reg:x3; val_offset:55695*0 + 3*132*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55695*0 + 3*133*FLEN/8, x4, x1, x2)

inst_18566:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe39fffff; valaddr_reg:x3; val_offset:55698*0 + 3*133*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55698*0 + 3*134*FLEN/8, x4, x1, x2)

inst_18567:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe3bfffff; valaddr_reg:x3; val_offset:55701*0 + 3*134*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55701*0 + 3*135*FLEN/8, x4, x1, x2)

inst_18568:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe3c00000; valaddr_reg:x3; val_offset:55704*0 + 3*135*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55704*0 + 3*136*FLEN/8, x4, x1, x2)

inst_18569:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe3e00000; valaddr_reg:x3; val_offset:55707*0 + 3*136*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55707*0 + 3*137*FLEN/8, x4, x1, x2)

inst_18570:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe3f00000; valaddr_reg:x3; val_offset:55710*0 + 3*137*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55710*0 + 3*138*FLEN/8, x4, x1, x2)

inst_18571:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe3f80000; valaddr_reg:x3; val_offset:55713*0 + 3*138*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55713*0 + 3*139*FLEN/8, x4, x1, x2)

inst_18572:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe3fc0000; valaddr_reg:x3; val_offset:55716*0 + 3*139*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55716*0 + 3*140*FLEN/8, x4, x1, x2)

inst_18573:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe3fe0000; valaddr_reg:x3; val_offset:55719*0 + 3*140*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55719*0 + 3*141*FLEN/8, x4, x1, x2)

inst_18574:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe3ff0000; valaddr_reg:x3; val_offset:55722*0 + 3*141*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55722*0 + 3*142*FLEN/8, x4, x1, x2)

inst_18575:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe3ff8000; valaddr_reg:x3; val_offset:55725*0 + 3*142*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55725*0 + 3*143*FLEN/8, x4, x1, x2)

inst_18576:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe3ffc000; valaddr_reg:x3; val_offset:55728*0 + 3*143*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55728*0 + 3*144*FLEN/8, x4, x1, x2)

inst_18577:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe3ffe000; valaddr_reg:x3; val_offset:55731*0 + 3*144*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55731*0 + 3*145*FLEN/8, x4, x1, x2)

inst_18578:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe3fff000; valaddr_reg:x3; val_offset:55734*0 + 3*145*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55734*0 + 3*146*FLEN/8, x4, x1, x2)

inst_18579:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe3fff800; valaddr_reg:x3; val_offset:55737*0 + 3*146*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55737*0 + 3*147*FLEN/8, x4, x1, x2)

inst_18580:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe3fffc00; valaddr_reg:x3; val_offset:55740*0 + 3*147*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55740*0 + 3*148*FLEN/8, x4, x1, x2)

inst_18581:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe3fffe00; valaddr_reg:x3; val_offset:55743*0 + 3*148*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55743*0 + 3*149*FLEN/8, x4, x1, x2)

inst_18582:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe3ffff00; valaddr_reg:x3; val_offset:55746*0 + 3*149*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55746*0 + 3*150*FLEN/8, x4, x1, x2)

inst_18583:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe3ffff80; valaddr_reg:x3; val_offset:55749*0 + 3*150*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55749*0 + 3*151*FLEN/8, x4, x1, x2)

inst_18584:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe3ffffc0; valaddr_reg:x3; val_offset:55752*0 + 3*151*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55752*0 + 3*152*FLEN/8, x4, x1, x2)

inst_18585:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe3ffffe0; valaddr_reg:x3; val_offset:55755*0 + 3*152*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55755*0 + 3*153*FLEN/8, x4, x1, x2)

inst_18586:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe3fffff0; valaddr_reg:x3; val_offset:55758*0 + 3*153*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55758*0 + 3*154*FLEN/8, x4, x1, x2)

inst_18587:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe3fffff8; valaddr_reg:x3; val_offset:55761*0 + 3*154*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55761*0 + 3*155*FLEN/8, x4, x1, x2)

inst_18588:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe3fffffc; valaddr_reg:x3; val_offset:55764*0 + 3*155*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55764*0 + 3*156*FLEN/8, x4, x1, x2)

inst_18589:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe3fffffe; valaddr_reg:x3; val_offset:55767*0 + 3*156*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55767*0 + 3*157*FLEN/8, x4, x1, x2)

inst_18590:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xe3ffffff; valaddr_reg:x3; val_offset:55770*0 + 3*157*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55770*0 + 3*158*FLEN/8, x4, x1, x2)

inst_18591:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xff000001; valaddr_reg:x3; val_offset:55773*0 + 3*158*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55773*0 + 3*159*FLEN/8, x4, x1, x2)

inst_18592:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xff000003; valaddr_reg:x3; val_offset:55776*0 + 3*159*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55776*0 + 3*160*FLEN/8, x4, x1, x2)

inst_18593:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xff000007; valaddr_reg:x3; val_offset:55779*0 + 3*160*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55779*0 + 3*161*FLEN/8, x4, x1, x2)

inst_18594:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xff199999; valaddr_reg:x3; val_offset:55782*0 + 3*161*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55782*0 + 3*162*FLEN/8, x4, x1, x2)

inst_18595:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xff249249; valaddr_reg:x3; val_offset:55785*0 + 3*162*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55785*0 + 3*163*FLEN/8, x4, x1, x2)

inst_18596:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xff333333; valaddr_reg:x3; val_offset:55788*0 + 3*163*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55788*0 + 3*164*FLEN/8, x4, x1, x2)

inst_18597:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xff36db6d; valaddr_reg:x3; val_offset:55791*0 + 3*164*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55791*0 + 3*165*FLEN/8, x4, x1, x2)

inst_18598:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:55794*0 + 3*165*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55794*0 + 3*166*FLEN/8, x4, x1, x2)

inst_18599:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xff444444; valaddr_reg:x3; val_offset:55797*0 + 3*166*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55797*0 + 3*167*FLEN/8, x4, x1, x2)

inst_18600:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xff4ccccc; valaddr_reg:x3; val_offset:55800*0 + 3*167*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55800*0 + 3*168*FLEN/8, x4, x1, x2)

inst_18601:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xff5b6db6; valaddr_reg:x3; val_offset:55803*0 + 3*168*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55803*0 + 3*169*FLEN/8, x4, x1, x2)

inst_18602:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xff666666; valaddr_reg:x3; val_offset:55806*0 + 3*169*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55806*0 + 3*170*FLEN/8, x4, x1, x2)

inst_18603:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xff6db6db; valaddr_reg:x3; val_offset:55809*0 + 3*170*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55809*0 + 3*171*FLEN/8, x4, x1, x2)

inst_18604:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xff7ffff8; valaddr_reg:x3; val_offset:55812*0 + 3*171*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55812*0 + 3*172*FLEN/8, x4, x1, x2)

inst_18605:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xff7ffffc; valaddr_reg:x3; val_offset:55815*0 + 3*172*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55815*0 + 3*173*FLEN/8, x4, x1, x2)

inst_18606:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a3d9c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ff1c2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba3d9c; op2val:0xc02ff1c2;
op3val:0xff7ffffe; valaddr_reg:x3; val_offset:55818*0 + 3*173*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55818*0 + 3*174*FLEN/8, x4, x1, x2)

inst_18607:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x800001; valaddr_reg:x3; val_offset:55821*0 + 3*174*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55821*0 + 3*175*FLEN/8, x4, x1, x2)

inst_18608:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x800003; valaddr_reg:x3; val_offset:55824*0 + 3*175*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55824*0 + 3*176*FLEN/8, x4, x1, x2)

inst_18609:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x800007; valaddr_reg:x3; val_offset:55827*0 + 3*176*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55827*0 + 3*177*FLEN/8, x4, x1, x2)

inst_18610:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x999999; valaddr_reg:x3; val_offset:55830*0 + 3*177*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55830*0 + 3*178*FLEN/8, x4, x1, x2)

inst_18611:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0xa49249; valaddr_reg:x3; val_offset:55833*0 + 3*178*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55833*0 + 3*179*FLEN/8, x4, x1, x2)

inst_18612:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0xb33333; valaddr_reg:x3; val_offset:55836*0 + 3*179*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55836*0 + 3*180*FLEN/8, x4, x1, x2)

inst_18613:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0xb6db6d; valaddr_reg:x3; val_offset:55839*0 + 3*180*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55839*0 + 3*181*FLEN/8, x4, x1, x2)

inst_18614:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0xbbbbbb; valaddr_reg:x3; val_offset:55842*0 + 3*181*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55842*0 + 3*182*FLEN/8, x4, x1, x2)

inst_18615:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0xc44444; valaddr_reg:x3; val_offset:55845*0 + 3*182*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55845*0 + 3*183*FLEN/8, x4, x1, x2)

inst_18616:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0xcccccc; valaddr_reg:x3; val_offset:55848*0 + 3*183*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55848*0 + 3*184*FLEN/8, x4, x1, x2)

inst_18617:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0xdb6db6; valaddr_reg:x3; val_offset:55851*0 + 3*184*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55851*0 + 3*185*FLEN/8, x4, x1, x2)

inst_18618:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0xe66666; valaddr_reg:x3; val_offset:55854*0 + 3*185*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55854*0 + 3*186*FLEN/8, x4, x1, x2)

inst_18619:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0xedb6db; valaddr_reg:x3; val_offset:55857*0 + 3*186*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55857*0 + 3*187*FLEN/8, x4, x1, x2)

inst_18620:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0xfffff8; valaddr_reg:x3; val_offset:55860*0 + 3*187*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55860*0 + 3*188*FLEN/8, x4, x1, x2)

inst_18621:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0xfffffc; valaddr_reg:x3; val_offset:55863*0 + 3*188*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55863*0 + 3*189*FLEN/8, x4, x1, x2)

inst_18622:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0xfffffe; valaddr_reg:x3; val_offset:55866*0 + 3*189*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55866*0 + 3*190*FLEN/8, x4, x1, x2)

inst_18623:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x5800000; valaddr_reg:x3; val_offset:55869*0 + 3*190*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55869*0 + 3*191*FLEN/8, x4, x1, x2)

inst_18624:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x5800001; valaddr_reg:x3; val_offset:55872*0 + 3*191*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55872*0 + 3*192*FLEN/8, x4, x1, x2)

inst_18625:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x5800003; valaddr_reg:x3; val_offset:55875*0 + 3*192*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55875*0 + 3*193*FLEN/8, x4, x1, x2)

inst_18626:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x5800007; valaddr_reg:x3; val_offset:55878*0 + 3*193*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55878*0 + 3*194*FLEN/8, x4, x1, x2)

inst_18627:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x580000f; valaddr_reg:x3; val_offset:55881*0 + 3*194*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55881*0 + 3*195*FLEN/8, x4, x1, x2)

inst_18628:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x580001f; valaddr_reg:x3; val_offset:55884*0 + 3*195*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55884*0 + 3*196*FLEN/8, x4, x1, x2)

inst_18629:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x580003f; valaddr_reg:x3; val_offset:55887*0 + 3*196*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55887*0 + 3*197*FLEN/8, x4, x1, x2)

inst_18630:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x580007f; valaddr_reg:x3; val_offset:55890*0 + 3*197*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55890*0 + 3*198*FLEN/8, x4, x1, x2)

inst_18631:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x58000ff; valaddr_reg:x3; val_offset:55893*0 + 3*198*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55893*0 + 3*199*FLEN/8, x4, x1, x2)

inst_18632:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x58001ff; valaddr_reg:x3; val_offset:55896*0 + 3*199*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55896*0 + 3*200*FLEN/8, x4, x1, x2)

inst_18633:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x58003ff; valaddr_reg:x3; val_offset:55899*0 + 3*200*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55899*0 + 3*201*FLEN/8, x4, x1, x2)

inst_18634:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x58007ff; valaddr_reg:x3; val_offset:55902*0 + 3*201*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55902*0 + 3*202*FLEN/8, x4, x1, x2)

inst_18635:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x5800fff; valaddr_reg:x3; val_offset:55905*0 + 3*202*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55905*0 + 3*203*FLEN/8, x4, x1, x2)

inst_18636:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x5801fff; valaddr_reg:x3; val_offset:55908*0 + 3*203*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55908*0 + 3*204*FLEN/8, x4, x1, x2)

inst_18637:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x5803fff; valaddr_reg:x3; val_offset:55911*0 + 3*204*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55911*0 + 3*205*FLEN/8, x4, x1, x2)

inst_18638:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x5807fff; valaddr_reg:x3; val_offset:55914*0 + 3*205*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55914*0 + 3*206*FLEN/8, x4, x1, x2)

inst_18639:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x580ffff; valaddr_reg:x3; val_offset:55917*0 + 3*206*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55917*0 + 3*207*FLEN/8, x4, x1, x2)

inst_18640:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x581ffff; valaddr_reg:x3; val_offset:55920*0 + 3*207*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55920*0 + 3*208*FLEN/8, x4, x1, x2)

inst_18641:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x583ffff; valaddr_reg:x3; val_offset:55923*0 + 3*208*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55923*0 + 3*209*FLEN/8, x4, x1, x2)

inst_18642:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x587ffff; valaddr_reg:x3; val_offset:55926*0 + 3*209*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55926*0 + 3*210*FLEN/8, x4, x1, x2)

inst_18643:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x58fffff; valaddr_reg:x3; val_offset:55929*0 + 3*210*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55929*0 + 3*211*FLEN/8, x4, x1, x2)

inst_18644:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x59fffff; valaddr_reg:x3; val_offset:55932*0 + 3*211*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55932*0 + 3*212*FLEN/8, x4, x1, x2)

inst_18645:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x5bfffff; valaddr_reg:x3; val_offset:55935*0 + 3*212*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55935*0 + 3*213*FLEN/8, x4, x1, x2)

inst_18646:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x5c00000; valaddr_reg:x3; val_offset:55938*0 + 3*213*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55938*0 + 3*214*FLEN/8, x4, x1, x2)

inst_18647:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x5e00000; valaddr_reg:x3; val_offset:55941*0 + 3*214*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55941*0 + 3*215*FLEN/8, x4, x1, x2)

inst_18648:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x5f00000; valaddr_reg:x3; val_offset:55944*0 + 3*215*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55944*0 + 3*216*FLEN/8, x4, x1, x2)

inst_18649:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x5f80000; valaddr_reg:x3; val_offset:55947*0 + 3*216*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55947*0 + 3*217*FLEN/8, x4, x1, x2)

inst_18650:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x5fc0000; valaddr_reg:x3; val_offset:55950*0 + 3*217*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55950*0 + 3*218*FLEN/8, x4, x1, x2)

inst_18651:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x5fe0000; valaddr_reg:x3; val_offset:55953*0 + 3*218*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55953*0 + 3*219*FLEN/8, x4, x1, x2)

inst_18652:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x5ff0000; valaddr_reg:x3; val_offset:55956*0 + 3*219*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55956*0 + 3*220*FLEN/8, x4, x1, x2)

inst_18653:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x5ff8000; valaddr_reg:x3; val_offset:55959*0 + 3*220*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55959*0 + 3*221*FLEN/8, x4, x1, x2)

inst_18654:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x5ffc000; valaddr_reg:x3; val_offset:55962*0 + 3*221*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55962*0 + 3*222*FLEN/8, x4, x1, x2)

inst_18655:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x5ffe000; valaddr_reg:x3; val_offset:55965*0 + 3*222*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55965*0 + 3*223*FLEN/8, x4, x1, x2)

inst_18656:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x5fff000; valaddr_reg:x3; val_offset:55968*0 + 3*223*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55968*0 + 3*224*FLEN/8, x4, x1, x2)

inst_18657:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x5fff800; valaddr_reg:x3; val_offset:55971*0 + 3*224*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55971*0 + 3*225*FLEN/8, x4, x1, x2)

inst_18658:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x5fffc00; valaddr_reg:x3; val_offset:55974*0 + 3*225*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55974*0 + 3*226*FLEN/8, x4, x1, x2)

inst_18659:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x5fffe00; valaddr_reg:x3; val_offset:55977*0 + 3*226*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55977*0 + 3*227*FLEN/8, x4, x1, x2)

inst_18660:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x5ffff00; valaddr_reg:x3; val_offset:55980*0 + 3*227*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55980*0 + 3*228*FLEN/8, x4, x1, x2)

inst_18661:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x5ffff80; valaddr_reg:x3; val_offset:55983*0 + 3*228*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55983*0 + 3*229*FLEN/8, x4, x1, x2)

inst_18662:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x5ffffc0; valaddr_reg:x3; val_offset:55986*0 + 3*229*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55986*0 + 3*230*FLEN/8, x4, x1, x2)

inst_18663:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x5ffffe0; valaddr_reg:x3; val_offset:55989*0 + 3*230*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55989*0 + 3*231*FLEN/8, x4, x1, x2)

inst_18664:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x5fffff0; valaddr_reg:x3; val_offset:55992*0 + 3*231*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55992*0 + 3*232*FLEN/8, x4, x1, x2)

inst_18665:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x5fffff8; valaddr_reg:x3; val_offset:55995*0 + 3*232*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55995*0 + 3*233*FLEN/8, x4, x1, x2)

inst_18666:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x5fffffc; valaddr_reg:x3; val_offset:55998*0 + 3*233*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55998*0 + 3*234*FLEN/8, x4, x1, x2)

inst_18667:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x5fffffe; valaddr_reg:x3; val_offset:56001*0 + 3*234*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56001*0 + 3*235*FLEN/8, x4, x1, x2)

inst_18668:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2749 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc2749; op2val:0x0;
op3val:0x5ffffff; valaddr_reg:x3; val_offset:56004*0 + 3*235*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56004*0 + 3*236*FLEN/8, x4, x1, x2)

inst_18669:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf5800000; valaddr_reg:x3; val_offset:56007*0 + 3*236*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56007*0 + 3*237*FLEN/8, x4, x1, x2)

inst_18670:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf5800001; valaddr_reg:x3; val_offset:56010*0 + 3*237*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56010*0 + 3*238*FLEN/8, x4, x1, x2)

inst_18671:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf5800003; valaddr_reg:x3; val_offset:56013*0 + 3*238*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56013*0 + 3*239*FLEN/8, x4, x1, x2)

inst_18672:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf5800007; valaddr_reg:x3; val_offset:56016*0 + 3*239*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56016*0 + 3*240*FLEN/8, x4, x1, x2)

inst_18673:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf580000f; valaddr_reg:x3; val_offset:56019*0 + 3*240*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56019*0 + 3*241*FLEN/8, x4, x1, x2)

inst_18674:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf580001f; valaddr_reg:x3; val_offset:56022*0 + 3*241*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56022*0 + 3*242*FLEN/8, x4, x1, x2)

inst_18675:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf580003f; valaddr_reg:x3; val_offset:56025*0 + 3*242*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56025*0 + 3*243*FLEN/8, x4, x1, x2)

inst_18676:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf580007f; valaddr_reg:x3; val_offset:56028*0 + 3*243*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56028*0 + 3*244*FLEN/8, x4, x1, x2)

inst_18677:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf58000ff; valaddr_reg:x3; val_offset:56031*0 + 3*244*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56031*0 + 3*245*FLEN/8, x4, x1, x2)

inst_18678:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf58001ff; valaddr_reg:x3; val_offset:56034*0 + 3*245*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56034*0 + 3*246*FLEN/8, x4, x1, x2)

inst_18679:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf58003ff; valaddr_reg:x3; val_offset:56037*0 + 3*246*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56037*0 + 3*247*FLEN/8, x4, x1, x2)

inst_18680:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf58007ff; valaddr_reg:x3; val_offset:56040*0 + 3*247*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56040*0 + 3*248*FLEN/8, x4, x1, x2)

inst_18681:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf5800fff; valaddr_reg:x3; val_offset:56043*0 + 3*248*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56043*0 + 3*249*FLEN/8, x4, x1, x2)

inst_18682:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf5801fff; valaddr_reg:x3; val_offset:56046*0 + 3*249*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56046*0 + 3*250*FLEN/8, x4, x1, x2)

inst_18683:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf5803fff; valaddr_reg:x3; val_offset:56049*0 + 3*250*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56049*0 + 3*251*FLEN/8, x4, x1, x2)

inst_18684:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf5807fff; valaddr_reg:x3; val_offset:56052*0 + 3*251*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56052*0 + 3*252*FLEN/8, x4, x1, x2)

inst_18685:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf580ffff; valaddr_reg:x3; val_offset:56055*0 + 3*252*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56055*0 + 3*253*FLEN/8, x4, x1, x2)

inst_18686:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf581ffff; valaddr_reg:x3; val_offset:56058*0 + 3*253*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56058*0 + 3*254*FLEN/8, x4, x1, x2)

inst_18687:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf583ffff; valaddr_reg:x3; val_offset:56061*0 + 3*254*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56061*0 + 3*255*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_3)

inst_18688:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf587ffff; valaddr_reg:x3; val_offset:56064*0 + 3*256*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56064*0 + 3*256*FLEN/8, x4, x1, x2)

inst_18689:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf58fffff; valaddr_reg:x3; val_offset:56067*0 + 3*257*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56067*0 + 3*257*FLEN/8, x4, x1, x2)

inst_18690:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf59fffff; valaddr_reg:x3; val_offset:56070*0 + 3*258*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56070*0 + 3*258*FLEN/8, x4, x1, x2)

inst_18691:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf5bfffff; valaddr_reg:x3; val_offset:56073*0 + 3*259*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56073*0 + 3*259*FLEN/8, x4, x1, x2)

inst_18692:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf5c00000; valaddr_reg:x3; val_offset:56076*0 + 3*260*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56076*0 + 3*260*FLEN/8, x4, x1, x2)

inst_18693:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf5e00000; valaddr_reg:x3; val_offset:56079*0 + 3*261*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56079*0 + 3*261*FLEN/8, x4, x1, x2)

inst_18694:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf5f00000; valaddr_reg:x3; val_offset:56082*0 + 3*262*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56082*0 + 3*262*FLEN/8, x4, x1, x2)

inst_18695:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf5f80000; valaddr_reg:x3; val_offset:56085*0 + 3*263*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56085*0 + 3*263*FLEN/8, x4, x1, x2)

inst_18696:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf5fc0000; valaddr_reg:x3; val_offset:56088*0 + 3*264*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56088*0 + 3*264*FLEN/8, x4, x1, x2)

inst_18697:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf5fe0000; valaddr_reg:x3; val_offset:56091*0 + 3*265*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56091*0 + 3*265*FLEN/8, x4, x1, x2)

inst_18698:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf5ff0000; valaddr_reg:x3; val_offset:56094*0 + 3*266*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56094*0 + 3*266*FLEN/8, x4, x1, x2)

inst_18699:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf5ff8000; valaddr_reg:x3; val_offset:56097*0 + 3*267*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56097*0 + 3*267*FLEN/8, x4, x1, x2)

inst_18700:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf5ffc000; valaddr_reg:x3; val_offset:56100*0 + 3*268*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56100*0 + 3*268*FLEN/8, x4, x1, x2)

inst_18701:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf5ffe000; valaddr_reg:x3; val_offset:56103*0 + 3*269*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56103*0 + 3*269*FLEN/8, x4, x1, x2)

inst_18702:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf5fff000; valaddr_reg:x3; val_offset:56106*0 + 3*270*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56106*0 + 3*270*FLEN/8, x4, x1, x2)

inst_18703:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf5fff800; valaddr_reg:x3; val_offset:56109*0 + 3*271*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56109*0 + 3*271*FLEN/8, x4, x1, x2)

inst_18704:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf5fffc00; valaddr_reg:x3; val_offset:56112*0 + 3*272*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56112*0 + 3*272*FLEN/8, x4, x1, x2)

inst_18705:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf5fffe00; valaddr_reg:x3; val_offset:56115*0 + 3*273*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56115*0 + 3*273*FLEN/8, x4, x1, x2)

inst_18706:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf5ffff00; valaddr_reg:x3; val_offset:56118*0 + 3*274*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56118*0 + 3*274*FLEN/8, x4, x1, x2)

inst_18707:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf5ffff80; valaddr_reg:x3; val_offset:56121*0 + 3*275*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56121*0 + 3*275*FLEN/8, x4, x1, x2)

inst_18708:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf5ffffc0; valaddr_reg:x3; val_offset:56124*0 + 3*276*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56124*0 + 3*276*FLEN/8, x4, x1, x2)

inst_18709:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf5ffffe0; valaddr_reg:x3; val_offset:56127*0 + 3*277*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56127*0 + 3*277*FLEN/8, x4, x1, x2)

inst_18710:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf5fffff0; valaddr_reg:x3; val_offset:56130*0 + 3*278*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56130*0 + 3*278*FLEN/8, x4, x1, x2)

inst_18711:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf5fffff8; valaddr_reg:x3; val_offset:56133*0 + 3*279*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56133*0 + 3*279*FLEN/8, x4, x1, x2)

inst_18712:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf5fffffc; valaddr_reg:x3; val_offset:56136*0 + 3*280*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56136*0 + 3*280*FLEN/8, x4, x1, x2)

inst_18713:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf5fffffe; valaddr_reg:x3; val_offset:56139*0 + 3*281*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56139*0 + 3*281*FLEN/8, x4, x1, x2)

inst_18714:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xf5ffffff; valaddr_reg:x3; val_offset:56142*0 + 3*282*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56142*0 + 3*282*FLEN/8, x4, x1, x2)

inst_18715:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xff000001; valaddr_reg:x3; val_offset:56145*0 + 3*283*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56145*0 + 3*283*FLEN/8, x4, x1, x2)

inst_18716:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xff000003; valaddr_reg:x3; val_offset:56148*0 + 3*284*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56148*0 + 3*284*FLEN/8, x4, x1, x2)

inst_18717:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xff000007; valaddr_reg:x3; val_offset:56151*0 + 3*285*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56151*0 + 3*285*FLEN/8, x4, x1, x2)

inst_18718:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xff199999; valaddr_reg:x3; val_offset:56154*0 + 3*286*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56154*0 + 3*286*FLEN/8, x4, x1, x2)

inst_18719:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xff249249; valaddr_reg:x3; val_offset:56157*0 + 3*287*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56157*0 + 3*287*FLEN/8, x4, x1, x2)

inst_18720:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xff333333; valaddr_reg:x3; val_offset:56160*0 + 3*288*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56160*0 + 3*288*FLEN/8, x4, x1, x2)

inst_18721:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xff36db6d; valaddr_reg:x3; val_offset:56163*0 + 3*289*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56163*0 + 3*289*FLEN/8, x4, x1, x2)

inst_18722:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:56166*0 + 3*290*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56166*0 + 3*290*FLEN/8, x4, x1, x2)

inst_18723:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xff444444; valaddr_reg:x3; val_offset:56169*0 + 3*291*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56169*0 + 3*291*FLEN/8, x4, x1, x2)

inst_18724:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xff4ccccc; valaddr_reg:x3; val_offset:56172*0 + 3*292*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56172*0 + 3*292*FLEN/8, x4, x1, x2)

inst_18725:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xff5b6db6; valaddr_reg:x3; val_offset:56175*0 + 3*293*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56175*0 + 3*293*FLEN/8, x4, x1, x2)

inst_18726:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xff666666; valaddr_reg:x3; val_offset:56178*0 + 3*294*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56178*0 + 3*294*FLEN/8, x4, x1, x2)

inst_18727:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xff6db6db; valaddr_reg:x3; val_offset:56181*0 + 3*295*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56181*0 + 3*295*FLEN/8, x4, x1, x2)

inst_18728:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xff7ffff8; valaddr_reg:x3; val_offset:56184*0 + 3*296*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56184*0 + 3*296*FLEN/8, x4, x1, x2)

inst_18729:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xff7ffffc; valaddr_reg:x3; val_offset:56187*0 + 3*297*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56187*0 + 3*297*FLEN/8, x4, x1, x2)

inst_18730:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4401 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2e0d4a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4401; op2val:0xc02e0d4a;
op3val:0xff7ffffe; valaddr_reg:x3; val_offset:56190*0 + 3*298*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56190*0 + 3*298*FLEN/8, x4, x1, x2)

inst_18731:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe6800000; valaddr_reg:x3; val_offset:56193*0 + 3*299*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56193*0 + 3*299*FLEN/8, x4, x1, x2)

inst_18732:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe6800001; valaddr_reg:x3; val_offset:56196*0 + 3*300*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56196*0 + 3*300*FLEN/8, x4, x1, x2)

inst_18733:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe6800003; valaddr_reg:x3; val_offset:56199*0 + 3*301*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56199*0 + 3*301*FLEN/8, x4, x1, x2)

inst_18734:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe6800007; valaddr_reg:x3; val_offset:56202*0 + 3*302*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56202*0 + 3*302*FLEN/8, x4, x1, x2)

inst_18735:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe680000f; valaddr_reg:x3; val_offset:56205*0 + 3*303*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56205*0 + 3*303*FLEN/8, x4, x1, x2)

inst_18736:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe680001f; valaddr_reg:x3; val_offset:56208*0 + 3*304*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56208*0 + 3*304*FLEN/8, x4, x1, x2)

inst_18737:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe680003f; valaddr_reg:x3; val_offset:56211*0 + 3*305*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56211*0 + 3*305*FLEN/8, x4, x1, x2)

inst_18738:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe680007f; valaddr_reg:x3; val_offset:56214*0 + 3*306*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56214*0 + 3*306*FLEN/8, x4, x1, x2)

inst_18739:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe68000ff; valaddr_reg:x3; val_offset:56217*0 + 3*307*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56217*0 + 3*307*FLEN/8, x4, x1, x2)

inst_18740:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe68001ff; valaddr_reg:x3; val_offset:56220*0 + 3*308*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56220*0 + 3*308*FLEN/8, x4, x1, x2)

inst_18741:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe68003ff; valaddr_reg:x3; val_offset:56223*0 + 3*309*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56223*0 + 3*309*FLEN/8, x4, x1, x2)

inst_18742:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe68007ff; valaddr_reg:x3; val_offset:56226*0 + 3*310*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56226*0 + 3*310*FLEN/8, x4, x1, x2)

inst_18743:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe6800fff; valaddr_reg:x3; val_offset:56229*0 + 3*311*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56229*0 + 3*311*FLEN/8, x4, x1, x2)

inst_18744:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe6801fff; valaddr_reg:x3; val_offset:56232*0 + 3*312*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56232*0 + 3*312*FLEN/8, x4, x1, x2)

inst_18745:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe6803fff; valaddr_reg:x3; val_offset:56235*0 + 3*313*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56235*0 + 3*313*FLEN/8, x4, x1, x2)

inst_18746:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe6807fff; valaddr_reg:x3; val_offset:56238*0 + 3*314*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56238*0 + 3*314*FLEN/8, x4, x1, x2)

inst_18747:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe680ffff; valaddr_reg:x3; val_offset:56241*0 + 3*315*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56241*0 + 3*315*FLEN/8, x4, x1, x2)

inst_18748:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe681ffff; valaddr_reg:x3; val_offset:56244*0 + 3*316*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56244*0 + 3*316*FLEN/8, x4, x1, x2)

inst_18749:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe683ffff; valaddr_reg:x3; val_offset:56247*0 + 3*317*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56247*0 + 3*317*FLEN/8, x4, x1, x2)

inst_18750:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe687ffff; valaddr_reg:x3; val_offset:56250*0 + 3*318*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56250*0 + 3*318*FLEN/8, x4, x1, x2)

inst_18751:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe68fffff; valaddr_reg:x3; val_offset:56253*0 + 3*319*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56253*0 + 3*319*FLEN/8, x4, x1, x2)

inst_18752:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe69fffff; valaddr_reg:x3; val_offset:56256*0 + 3*320*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56256*0 + 3*320*FLEN/8, x4, x1, x2)

inst_18753:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe6bfffff; valaddr_reg:x3; val_offset:56259*0 + 3*321*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56259*0 + 3*321*FLEN/8, x4, x1, x2)

inst_18754:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe6c00000; valaddr_reg:x3; val_offset:56262*0 + 3*322*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56262*0 + 3*322*FLEN/8, x4, x1, x2)

inst_18755:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe6e00000; valaddr_reg:x3; val_offset:56265*0 + 3*323*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56265*0 + 3*323*FLEN/8, x4, x1, x2)

inst_18756:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe6f00000; valaddr_reg:x3; val_offset:56268*0 + 3*324*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56268*0 + 3*324*FLEN/8, x4, x1, x2)

inst_18757:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe6f80000; valaddr_reg:x3; val_offset:56271*0 + 3*325*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56271*0 + 3*325*FLEN/8, x4, x1, x2)

inst_18758:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe6fc0000; valaddr_reg:x3; val_offset:56274*0 + 3*326*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56274*0 + 3*326*FLEN/8, x4, x1, x2)

inst_18759:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe6fe0000; valaddr_reg:x3; val_offset:56277*0 + 3*327*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56277*0 + 3*327*FLEN/8, x4, x1, x2)

inst_18760:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe6ff0000; valaddr_reg:x3; val_offset:56280*0 + 3*328*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56280*0 + 3*328*FLEN/8, x4, x1, x2)

inst_18761:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe6ff8000; valaddr_reg:x3; val_offset:56283*0 + 3*329*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56283*0 + 3*329*FLEN/8, x4, x1, x2)

inst_18762:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe6ffc000; valaddr_reg:x3; val_offset:56286*0 + 3*330*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56286*0 + 3*330*FLEN/8, x4, x1, x2)

inst_18763:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe6ffe000; valaddr_reg:x3; val_offset:56289*0 + 3*331*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56289*0 + 3*331*FLEN/8, x4, x1, x2)

inst_18764:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe6fff000; valaddr_reg:x3; val_offset:56292*0 + 3*332*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56292*0 + 3*332*FLEN/8, x4, x1, x2)

inst_18765:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe6fff800; valaddr_reg:x3; val_offset:56295*0 + 3*333*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56295*0 + 3*333*FLEN/8, x4, x1, x2)

inst_18766:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe6fffc00; valaddr_reg:x3; val_offset:56298*0 + 3*334*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56298*0 + 3*334*FLEN/8, x4, x1, x2)

inst_18767:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe6fffe00; valaddr_reg:x3; val_offset:56301*0 + 3*335*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56301*0 + 3*335*FLEN/8, x4, x1, x2)

inst_18768:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe6ffff00; valaddr_reg:x3; val_offset:56304*0 + 3*336*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56304*0 + 3*336*FLEN/8, x4, x1, x2)

inst_18769:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe6ffff80; valaddr_reg:x3; val_offset:56307*0 + 3*337*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56307*0 + 3*337*FLEN/8, x4, x1, x2)

inst_18770:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe6ffffc0; valaddr_reg:x3; val_offset:56310*0 + 3*338*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56310*0 + 3*338*FLEN/8, x4, x1, x2)

inst_18771:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe6ffffe0; valaddr_reg:x3; val_offset:56313*0 + 3*339*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56313*0 + 3*339*FLEN/8, x4, x1, x2)

inst_18772:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe6fffff0; valaddr_reg:x3; val_offset:56316*0 + 3*340*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56316*0 + 3*340*FLEN/8, x4, x1, x2)

inst_18773:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe6fffff8; valaddr_reg:x3; val_offset:56319*0 + 3*341*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56319*0 + 3*341*FLEN/8, x4, x1, x2)

inst_18774:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe6fffffc; valaddr_reg:x3; val_offset:56322*0 + 3*342*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56322*0 + 3*342*FLEN/8, x4, x1, x2)

inst_18775:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe6fffffe; valaddr_reg:x3; val_offset:56325*0 + 3*343*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56325*0 + 3*343*FLEN/8, x4, x1, x2)

inst_18776:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xe6ffffff; valaddr_reg:x3; val_offset:56328*0 + 3*344*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56328*0 + 3*344*FLEN/8, x4, x1, x2)

inst_18777:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xff000001; valaddr_reg:x3; val_offset:56331*0 + 3*345*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56331*0 + 3*345*FLEN/8, x4, x1, x2)

inst_18778:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xff000003; valaddr_reg:x3; val_offset:56334*0 + 3*346*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56334*0 + 3*346*FLEN/8, x4, x1, x2)

inst_18779:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xff000007; valaddr_reg:x3; val_offset:56337*0 + 3*347*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56337*0 + 3*347*FLEN/8, x4, x1, x2)

inst_18780:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xff199999; valaddr_reg:x3; val_offset:56340*0 + 3*348*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56340*0 + 3*348*FLEN/8, x4, x1, x2)

inst_18781:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xff249249; valaddr_reg:x3; val_offset:56343*0 + 3*349*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56343*0 + 3*349*FLEN/8, x4, x1, x2)

inst_18782:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xff333333; valaddr_reg:x3; val_offset:56346*0 + 3*350*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56346*0 + 3*350*FLEN/8, x4, x1, x2)

inst_18783:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xff36db6d; valaddr_reg:x3; val_offset:56349*0 + 3*351*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56349*0 + 3*351*FLEN/8, x4, x1, x2)

inst_18784:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:56352*0 + 3*352*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56352*0 + 3*352*FLEN/8, x4, x1, x2)

inst_18785:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xff444444; valaddr_reg:x3; val_offset:56355*0 + 3*353*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56355*0 + 3*353*FLEN/8, x4, x1, x2)

inst_18786:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xff4ccccc; valaddr_reg:x3; val_offset:56358*0 + 3*354*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56358*0 + 3*354*FLEN/8, x4, x1, x2)

inst_18787:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xff5b6db6; valaddr_reg:x3; val_offset:56361*0 + 3*355*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56361*0 + 3*355*FLEN/8, x4, x1, x2)

inst_18788:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xff666666; valaddr_reg:x3; val_offset:56364*0 + 3*356*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56364*0 + 3*356*FLEN/8, x4, x1, x2)

inst_18789:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xff6db6db; valaddr_reg:x3; val_offset:56367*0 + 3*357*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56367*0 + 3*357*FLEN/8, x4, x1, x2)

inst_18790:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xff7ffff8; valaddr_reg:x3; val_offset:56370*0 + 3*358*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56370*0 + 3*358*FLEN/8, x4, x1, x2)

inst_18791:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xff7ffffc; valaddr_reg:x3; val_offset:56373*0 + 3*359*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56373*0 + 3*359*FLEN/8, x4, x1, x2)

inst_18792:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee6da and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2ba602 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee6da; op2val:0xc02ba602;
op3val:0xff7ffffe; valaddr_reg:x3; val_offset:56376*0 + 3*360*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56376*0 + 3*360*FLEN/8, x4, x1, x2)

inst_18793:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6e800000; valaddr_reg:x3; val_offset:56379*0 + 3*361*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56379*0 + 3*361*FLEN/8, x4, x1, x2)

inst_18794:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6e800001; valaddr_reg:x3; val_offset:56382*0 + 3*362*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56382*0 + 3*362*FLEN/8, x4, x1, x2)

inst_18795:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6e800003; valaddr_reg:x3; val_offset:56385*0 + 3*363*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56385*0 + 3*363*FLEN/8, x4, x1, x2)

inst_18796:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6e800007; valaddr_reg:x3; val_offset:56388*0 + 3*364*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56388*0 + 3*364*FLEN/8, x4, x1, x2)

inst_18797:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6e80000f; valaddr_reg:x3; val_offset:56391*0 + 3*365*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56391*0 + 3*365*FLEN/8, x4, x1, x2)

inst_18798:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6e80001f; valaddr_reg:x3; val_offset:56394*0 + 3*366*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56394*0 + 3*366*FLEN/8, x4, x1, x2)

inst_18799:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6e80003f; valaddr_reg:x3; val_offset:56397*0 + 3*367*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56397*0 + 3*367*FLEN/8, x4, x1, x2)

inst_18800:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6e80007f; valaddr_reg:x3; val_offset:56400*0 + 3*368*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56400*0 + 3*368*FLEN/8, x4, x1, x2)

inst_18801:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6e8000ff; valaddr_reg:x3; val_offset:56403*0 + 3*369*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56403*0 + 3*369*FLEN/8, x4, x1, x2)

inst_18802:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6e8001ff; valaddr_reg:x3; val_offset:56406*0 + 3*370*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56406*0 + 3*370*FLEN/8, x4, x1, x2)

inst_18803:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6e8003ff; valaddr_reg:x3; val_offset:56409*0 + 3*371*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56409*0 + 3*371*FLEN/8, x4, x1, x2)

inst_18804:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6e8007ff; valaddr_reg:x3; val_offset:56412*0 + 3*372*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56412*0 + 3*372*FLEN/8, x4, x1, x2)

inst_18805:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6e800fff; valaddr_reg:x3; val_offset:56415*0 + 3*373*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56415*0 + 3*373*FLEN/8, x4, x1, x2)

inst_18806:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6e801fff; valaddr_reg:x3; val_offset:56418*0 + 3*374*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56418*0 + 3*374*FLEN/8, x4, x1, x2)

inst_18807:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6e803fff; valaddr_reg:x3; val_offset:56421*0 + 3*375*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56421*0 + 3*375*FLEN/8, x4, x1, x2)

inst_18808:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6e807fff; valaddr_reg:x3; val_offset:56424*0 + 3*376*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56424*0 + 3*376*FLEN/8, x4, x1, x2)

inst_18809:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6e80ffff; valaddr_reg:x3; val_offset:56427*0 + 3*377*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56427*0 + 3*377*FLEN/8, x4, x1, x2)

inst_18810:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6e81ffff; valaddr_reg:x3; val_offset:56430*0 + 3*378*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56430*0 + 3*378*FLEN/8, x4, x1, x2)

inst_18811:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6e83ffff; valaddr_reg:x3; val_offset:56433*0 + 3*379*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56433*0 + 3*379*FLEN/8, x4, x1, x2)

inst_18812:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6e87ffff; valaddr_reg:x3; val_offset:56436*0 + 3*380*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56436*0 + 3*380*FLEN/8, x4, x1, x2)

inst_18813:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6e8fffff; valaddr_reg:x3; val_offset:56439*0 + 3*381*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56439*0 + 3*381*FLEN/8, x4, x1, x2)

inst_18814:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6e9fffff; valaddr_reg:x3; val_offset:56442*0 + 3*382*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56442*0 + 3*382*FLEN/8, x4, x1, x2)

inst_18815:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6ebfffff; valaddr_reg:x3; val_offset:56445*0 + 3*383*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56445*0 + 3*383*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_4)

inst_18816:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6ec00000; valaddr_reg:x3; val_offset:56448*0 + 3*384*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56448*0 + 3*384*FLEN/8, x4, x1, x2)

inst_18817:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6ee00000; valaddr_reg:x3; val_offset:56451*0 + 3*385*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56451*0 + 3*385*FLEN/8, x4, x1, x2)

inst_18818:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6ef00000; valaddr_reg:x3; val_offset:56454*0 + 3*386*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56454*0 + 3*386*FLEN/8, x4, x1, x2)

inst_18819:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6ef80000; valaddr_reg:x3; val_offset:56457*0 + 3*387*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56457*0 + 3*387*FLEN/8, x4, x1, x2)

inst_18820:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6efc0000; valaddr_reg:x3; val_offset:56460*0 + 3*388*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56460*0 + 3*388*FLEN/8, x4, x1, x2)

inst_18821:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6efe0000; valaddr_reg:x3; val_offset:56463*0 + 3*389*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56463*0 + 3*389*FLEN/8, x4, x1, x2)

inst_18822:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6eff0000; valaddr_reg:x3; val_offset:56466*0 + 3*390*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56466*0 + 3*390*FLEN/8, x4, x1, x2)

inst_18823:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6eff8000; valaddr_reg:x3; val_offset:56469*0 + 3*391*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56469*0 + 3*391*FLEN/8, x4, x1, x2)

inst_18824:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6effc000; valaddr_reg:x3; val_offset:56472*0 + 3*392*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56472*0 + 3*392*FLEN/8, x4, x1, x2)

inst_18825:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6effe000; valaddr_reg:x3; val_offset:56475*0 + 3*393*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56475*0 + 3*393*FLEN/8, x4, x1, x2)

inst_18826:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6efff000; valaddr_reg:x3; val_offset:56478*0 + 3*394*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56478*0 + 3*394*FLEN/8, x4, x1, x2)

inst_18827:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6efff800; valaddr_reg:x3; val_offset:56481*0 + 3*395*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56481*0 + 3*395*FLEN/8, x4, x1, x2)

inst_18828:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6efffc00; valaddr_reg:x3; val_offset:56484*0 + 3*396*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56484*0 + 3*396*FLEN/8, x4, x1, x2)

inst_18829:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6efffe00; valaddr_reg:x3; val_offset:56487*0 + 3*397*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56487*0 + 3*397*FLEN/8, x4, x1, x2)

inst_18830:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6effff00; valaddr_reg:x3; val_offset:56490*0 + 3*398*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56490*0 + 3*398*FLEN/8, x4, x1, x2)

inst_18831:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6effff80; valaddr_reg:x3; val_offset:56493*0 + 3*399*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56493*0 + 3*399*FLEN/8, x4, x1, x2)

inst_18832:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6effffc0; valaddr_reg:x3; val_offset:56496*0 + 3*400*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56496*0 + 3*400*FLEN/8, x4, x1, x2)

inst_18833:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6effffe0; valaddr_reg:x3; val_offset:56499*0 + 3*401*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56499*0 + 3*401*FLEN/8, x4, x1, x2)

inst_18834:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6efffff0; valaddr_reg:x3; val_offset:56502*0 + 3*402*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56502*0 + 3*402*FLEN/8, x4, x1, x2)

inst_18835:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6efffff8; valaddr_reg:x3; val_offset:56505*0 + 3*403*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56505*0 + 3*403*FLEN/8, x4, x1, x2)

inst_18836:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6efffffc; valaddr_reg:x3; val_offset:56508*0 + 3*404*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56508*0 + 3*404*FLEN/8, x4, x1, x2)

inst_18837:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6efffffe; valaddr_reg:x3; val_offset:56511*0 + 3*405*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56511*0 + 3*405*FLEN/8, x4, x1, x2)

inst_18838:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x6effffff; valaddr_reg:x3; val_offset:56514*0 + 3*406*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56514*0 + 3*406*FLEN/8, x4, x1, x2)

inst_18839:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x7f000001; valaddr_reg:x3; val_offset:56517*0 + 3*407*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56517*0 + 3*407*FLEN/8, x4, x1, x2)

inst_18840:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x7f000003; valaddr_reg:x3; val_offset:56520*0 + 3*408*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56520*0 + 3*408*FLEN/8, x4, x1, x2)

inst_18841:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x7f000007; valaddr_reg:x3; val_offset:56523*0 + 3*409*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56523*0 + 3*409*FLEN/8, x4, x1, x2)

inst_18842:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x7f199999; valaddr_reg:x3; val_offset:56526*0 + 3*410*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56526*0 + 3*410*FLEN/8, x4, x1, x2)

inst_18843:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x7f249249; valaddr_reg:x3; val_offset:56529*0 + 3*411*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56529*0 + 3*411*FLEN/8, x4, x1, x2)

inst_18844:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x7f333333; valaddr_reg:x3; val_offset:56532*0 + 3*412*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56532*0 + 3*412*FLEN/8, x4, x1, x2)

inst_18845:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x7f36db6d; valaddr_reg:x3; val_offset:56535*0 + 3*413*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56535*0 + 3*413*FLEN/8, x4, x1, x2)

inst_18846:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:56538*0 + 3*414*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56538*0 + 3*414*FLEN/8, x4, x1, x2)

inst_18847:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x7f444444; valaddr_reg:x3; val_offset:56541*0 + 3*415*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56541*0 + 3*415*FLEN/8, x4, x1, x2)

inst_18848:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:56544*0 + 3*416*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56544*0 + 3*416*FLEN/8, x4, x1, x2)

inst_18849:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:56547*0 + 3*417*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56547*0 + 3*417*FLEN/8, x4, x1, x2)

inst_18850:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x7f666666; valaddr_reg:x3; val_offset:56550*0 + 3*418*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56550*0 + 3*418*FLEN/8, x4, x1, x2)

inst_18851:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x7f6db6db; valaddr_reg:x3; val_offset:56553*0 + 3*419*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56553*0 + 3*419*FLEN/8, x4, x1, x2)

inst_18852:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:56556*0 + 3*420*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56556*0 + 3*420*FLEN/8, x4, x1, x2)

inst_18853:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:56559*0 + 3*421*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56559*0 + 3*421*FLEN/8, x4, x1, x2)

inst_18854:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f2962 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b6a44 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf2962; op2val:0x402b6a44;
op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:56562*0 + 3*422*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56562*0 + 3*422*FLEN/8, x4, x1, x2)

inst_18855:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:56565*0 + 3*423*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56565*0 + 3*423*FLEN/8, x4, x1, x2)

inst_18856:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:56568*0 + 3*424*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56568*0 + 3*424*FLEN/8, x4, x1, x2)

inst_18857:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:56571*0 + 3*425*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56571*0 + 3*425*FLEN/8, x4, x1, x2)

inst_18858:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x199999; valaddr_reg:x3; val_offset:56574*0 + 3*426*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56574*0 + 3*426*FLEN/8, x4, x1, x2)

inst_18859:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x249249; valaddr_reg:x3; val_offset:56577*0 + 3*427*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56577*0 + 3*427*FLEN/8, x4, x1, x2)

inst_18860:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x333333; valaddr_reg:x3; val_offset:56580*0 + 3*428*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56580*0 + 3*428*FLEN/8, x4, x1, x2)

inst_18861:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x36db6d; valaddr_reg:x3; val_offset:56583*0 + 3*429*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56583*0 + 3*429*FLEN/8, x4, x1, x2)

inst_18862:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x3bbbbb; valaddr_reg:x3; val_offset:56586*0 + 3*430*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56586*0 + 3*430*FLEN/8, x4, x1, x2)

inst_18863:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x444444; valaddr_reg:x3; val_offset:56589*0 + 3*431*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56589*0 + 3*431*FLEN/8, x4, x1, x2)

inst_18864:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x4ccccc; valaddr_reg:x3; val_offset:56592*0 + 3*432*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56592*0 + 3*432*FLEN/8, x4, x1, x2)

inst_18865:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x5b6db6; valaddr_reg:x3; val_offset:56595*0 + 3*433*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56595*0 + 3*433*FLEN/8, x4, x1, x2)

inst_18866:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x666666; valaddr_reg:x3; val_offset:56598*0 + 3*434*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56598*0 + 3*434*FLEN/8, x4, x1, x2)

inst_18867:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x6db6db; valaddr_reg:x3; val_offset:56601*0 + 3*435*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56601*0 + 3*435*FLEN/8, x4, x1, x2)

inst_18868:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x7ffff8; valaddr_reg:x3; val_offset:56604*0 + 3*436*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56604*0 + 3*436*FLEN/8, x4, x1, x2)

inst_18869:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x7ffffc; valaddr_reg:x3; val_offset:56607*0 + 3*437*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56607*0 + 3*437*FLEN/8, x4, x1, x2)

inst_18870:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x7ffffe; valaddr_reg:x3; val_offset:56610*0 + 3*438*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56610*0 + 3*438*FLEN/8, x4, x1, x2)

inst_18871:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x4000000; valaddr_reg:x3; val_offset:56613*0 + 3*439*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56613*0 + 3*439*FLEN/8, x4, x1, x2)

inst_18872:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x4000001; valaddr_reg:x3; val_offset:56616*0 + 3*440*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56616*0 + 3*440*FLEN/8, x4, x1, x2)

inst_18873:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x4000003; valaddr_reg:x3; val_offset:56619*0 + 3*441*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56619*0 + 3*441*FLEN/8, x4, x1, x2)

inst_18874:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x4000007; valaddr_reg:x3; val_offset:56622*0 + 3*442*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56622*0 + 3*442*FLEN/8, x4, x1, x2)

inst_18875:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x400000f; valaddr_reg:x3; val_offset:56625*0 + 3*443*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56625*0 + 3*443*FLEN/8, x4, x1, x2)

inst_18876:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x400001f; valaddr_reg:x3; val_offset:56628*0 + 3*444*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56628*0 + 3*444*FLEN/8, x4, x1, x2)

inst_18877:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x400003f; valaddr_reg:x3; val_offset:56631*0 + 3*445*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56631*0 + 3*445*FLEN/8, x4, x1, x2)

inst_18878:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x400007f; valaddr_reg:x3; val_offset:56634*0 + 3*446*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56634*0 + 3*446*FLEN/8, x4, x1, x2)

inst_18879:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x40000ff; valaddr_reg:x3; val_offset:56637*0 + 3*447*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56637*0 + 3*447*FLEN/8, x4, x1, x2)

inst_18880:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x40001ff; valaddr_reg:x3; val_offset:56640*0 + 3*448*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56640*0 + 3*448*FLEN/8, x4, x1, x2)

inst_18881:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x40003ff; valaddr_reg:x3; val_offset:56643*0 + 3*449*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56643*0 + 3*449*FLEN/8, x4, x1, x2)

inst_18882:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x40007ff; valaddr_reg:x3; val_offset:56646*0 + 3*450*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56646*0 + 3*450*FLEN/8, x4, x1, x2)

inst_18883:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x4000fff; valaddr_reg:x3; val_offset:56649*0 + 3*451*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56649*0 + 3*451*FLEN/8, x4, x1, x2)

inst_18884:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x4001fff; valaddr_reg:x3; val_offset:56652*0 + 3*452*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56652*0 + 3*452*FLEN/8, x4, x1, x2)

inst_18885:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x4003fff; valaddr_reg:x3; val_offset:56655*0 + 3*453*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56655*0 + 3*453*FLEN/8, x4, x1, x2)

inst_18886:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x4007fff; valaddr_reg:x3; val_offset:56658*0 + 3*454*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56658*0 + 3*454*FLEN/8, x4, x1, x2)

inst_18887:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x400ffff; valaddr_reg:x3; val_offset:56661*0 + 3*455*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56661*0 + 3*455*FLEN/8, x4, x1, x2)

inst_18888:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x401ffff; valaddr_reg:x3; val_offset:56664*0 + 3*456*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56664*0 + 3*456*FLEN/8, x4, x1, x2)

inst_18889:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x403ffff; valaddr_reg:x3; val_offset:56667*0 + 3*457*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56667*0 + 3*457*FLEN/8, x4, x1, x2)

inst_18890:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x407ffff; valaddr_reg:x3; val_offset:56670*0 + 3*458*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56670*0 + 3*458*FLEN/8, x4, x1, x2)

inst_18891:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x40fffff; valaddr_reg:x3; val_offset:56673*0 + 3*459*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56673*0 + 3*459*FLEN/8, x4, x1, x2)

inst_18892:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x41fffff; valaddr_reg:x3; val_offset:56676*0 + 3*460*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56676*0 + 3*460*FLEN/8, x4, x1, x2)

inst_18893:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x43fffff; valaddr_reg:x3; val_offset:56679*0 + 3*461*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56679*0 + 3*461*FLEN/8, x4, x1, x2)

inst_18894:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x4400000; valaddr_reg:x3; val_offset:56682*0 + 3*462*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56682*0 + 3*462*FLEN/8, x4, x1, x2)

inst_18895:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x4600000; valaddr_reg:x3; val_offset:56685*0 + 3*463*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56685*0 + 3*463*FLEN/8, x4, x1, x2)

inst_18896:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x4700000; valaddr_reg:x3; val_offset:56688*0 + 3*464*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56688*0 + 3*464*FLEN/8, x4, x1, x2)

inst_18897:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x4780000; valaddr_reg:x3; val_offset:56691*0 + 3*465*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56691*0 + 3*465*FLEN/8, x4, x1, x2)

inst_18898:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x47c0000; valaddr_reg:x3; val_offset:56694*0 + 3*466*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56694*0 + 3*466*FLEN/8, x4, x1, x2)

inst_18899:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x47e0000; valaddr_reg:x3; val_offset:56697*0 + 3*467*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56697*0 + 3*467*FLEN/8, x4, x1, x2)

inst_18900:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x47f0000; valaddr_reg:x3; val_offset:56700*0 + 3*468*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56700*0 + 3*468*FLEN/8, x4, x1, x2)

inst_18901:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x47f8000; valaddr_reg:x3; val_offset:56703*0 + 3*469*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56703*0 + 3*469*FLEN/8, x4, x1, x2)

inst_18902:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x47fc000; valaddr_reg:x3; val_offset:56706*0 + 3*470*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56706*0 + 3*470*FLEN/8, x4, x1, x2)

inst_18903:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x47fe000; valaddr_reg:x3; val_offset:56709*0 + 3*471*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56709*0 + 3*471*FLEN/8, x4, x1, x2)

inst_18904:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x47ff000; valaddr_reg:x3; val_offset:56712*0 + 3*472*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56712*0 + 3*472*FLEN/8, x4, x1, x2)

inst_18905:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x47ff800; valaddr_reg:x3; val_offset:56715*0 + 3*473*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56715*0 + 3*473*FLEN/8, x4, x1, x2)

inst_18906:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x47ffc00; valaddr_reg:x3; val_offset:56718*0 + 3*474*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56718*0 + 3*474*FLEN/8, x4, x1, x2)

inst_18907:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x47ffe00; valaddr_reg:x3; val_offset:56721*0 + 3*475*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56721*0 + 3*475*FLEN/8, x4, x1, x2)

inst_18908:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x47fff00; valaddr_reg:x3; val_offset:56724*0 + 3*476*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56724*0 + 3*476*FLEN/8, x4, x1, x2)

inst_18909:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x47fff80; valaddr_reg:x3; val_offset:56727*0 + 3*477*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56727*0 + 3*477*FLEN/8, x4, x1, x2)

inst_18910:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x47fffc0; valaddr_reg:x3; val_offset:56730*0 + 3*478*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56730*0 + 3*478*FLEN/8, x4, x1, x2)

inst_18911:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x47fffe0; valaddr_reg:x3; val_offset:56733*0 + 3*479*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56733*0 + 3*479*FLEN/8, x4, x1, x2)

inst_18912:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x47ffff0; valaddr_reg:x3; val_offset:56736*0 + 3*480*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56736*0 + 3*480*FLEN/8, x4, x1, x2)

inst_18913:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x47ffff8; valaddr_reg:x3; val_offset:56739*0 + 3*481*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56739*0 + 3*481*FLEN/8, x4, x1, x2)

inst_18914:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x47ffffc; valaddr_reg:x3; val_offset:56742*0 + 3*482*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56742*0 + 3*482*FLEN/8, x4, x1, x2)

inst_18915:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x47ffffe; valaddr_reg:x3; val_offset:56745*0 + 3*483*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56745*0 + 3*483*FLEN/8, x4, x1, x2)

inst_18916:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f374b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf374b; op2val:0x0;
op3val:0x47fffff; valaddr_reg:x3; val_offset:56748*0 + 3*484*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56748*0 + 3*484*FLEN/8, x4, x1, x2)

inst_18917:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5f800000; valaddr_reg:x3; val_offset:56751*0 + 3*485*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56751*0 + 3*485*FLEN/8, x4, x1, x2)

inst_18918:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5f800001; valaddr_reg:x3; val_offset:56754*0 + 3*486*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56754*0 + 3*486*FLEN/8, x4, x1, x2)

inst_18919:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5f800003; valaddr_reg:x3; val_offset:56757*0 + 3*487*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56757*0 + 3*487*FLEN/8, x4, x1, x2)

inst_18920:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5f800007; valaddr_reg:x3; val_offset:56760*0 + 3*488*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56760*0 + 3*488*FLEN/8, x4, x1, x2)

inst_18921:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5f80000f; valaddr_reg:x3; val_offset:56763*0 + 3*489*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56763*0 + 3*489*FLEN/8, x4, x1, x2)

inst_18922:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5f80001f; valaddr_reg:x3; val_offset:56766*0 + 3*490*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56766*0 + 3*490*FLEN/8, x4, x1, x2)

inst_18923:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5f80003f; valaddr_reg:x3; val_offset:56769*0 + 3*491*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56769*0 + 3*491*FLEN/8, x4, x1, x2)

inst_18924:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5f80007f; valaddr_reg:x3; val_offset:56772*0 + 3*492*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56772*0 + 3*492*FLEN/8, x4, x1, x2)

inst_18925:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5f8000ff; valaddr_reg:x3; val_offset:56775*0 + 3*493*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56775*0 + 3*493*FLEN/8, x4, x1, x2)

inst_18926:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5f8001ff; valaddr_reg:x3; val_offset:56778*0 + 3*494*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56778*0 + 3*494*FLEN/8, x4, x1, x2)

inst_18927:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5f8003ff; valaddr_reg:x3; val_offset:56781*0 + 3*495*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56781*0 + 3*495*FLEN/8, x4, x1, x2)

inst_18928:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5f8007ff; valaddr_reg:x3; val_offset:56784*0 + 3*496*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56784*0 + 3*496*FLEN/8, x4, x1, x2)

inst_18929:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5f800fff; valaddr_reg:x3; val_offset:56787*0 + 3*497*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56787*0 + 3*497*FLEN/8, x4, x1, x2)

inst_18930:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5f801fff; valaddr_reg:x3; val_offset:56790*0 + 3*498*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56790*0 + 3*498*FLEN/8, x4, x1, x2)

inst_18931:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5f803fff; valaddr_reg:x3; val_offset:56793*0 + 3*499*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56793*0 + 3*499*FLEN/8, x4, x1, x2)

inst_18932:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5f807fff; valaddr_reg:x3; val_offset:56796*0 + 3*500*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56796*0 + 3*500*FLEN/8, x4, x1, x2)

inst_18933:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5f80ffff; valaddr_reg:x3; val_offset:56799*0 + 3*501*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56799*0 + 3*501*FLEN/8, x4, x1, x2)

inst_18934:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5f81ffff; valaddr_reg:x3; val_offset:56802*0 + 3*502*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56802*0 + 3*502*FLEN/8, x4, x1, x2)

inst_18935:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5f83ffff; valaddr_reg:x3; val_offset:56805*0 + 3*503*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56805*0 + 3*503*FLEN/8, x4, x1, x2)

inst_18936:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5f87ffff; valaddr_reg:x3; val_offset:56808*0 + 3*504*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56808*0 + 3*504*FLEN/8, x4, x1, x2)

inst_18937:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5f8fffff; valaddr_reg:x3; val_offset:56811*0 + 3*505*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56811*0 + 3*505*FLEN/8, x4, x1, x2)

inst_18938:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5f9fffff; valaddr_reg:x3; val_offset:56814*0 + 3*506*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56814*0 + 3*506*FLEN/8, x4, x1, x2)

inst_18939:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5fbfffff; valaddr_reg:x3; val_offset:56817*0 + 3*507*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56817*0 + 3*507*FLEN/8, x4, x1, x2)

inst_18940:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5fc00000; valaddr_reg:x3; val_offset:56820*0 + 3*508*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56820*0 + 3*508*FLEN/8, x4, x1, x2)

inst_18941:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5fe00000; valaddr_reg:x3; val_offset:56823*0 + 3*509*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56823*0 + 3*509*FLEN/8, x4, x1, x2)

inst_18942:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5ff00000; valaddr_reg:x3; val_offset:56826*0 + 3*510*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56826*0 + 3*510*FLEN/8, x4, x1, x2)

inst_18943:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5ff80000; valaddr_reg:x3; val_offset:56829*0 + 3*511*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56829*0 + 3*511*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_5)

inst_18944:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5ffc0000; valaddr_reg:x3; val_offset:56832*0 + 3*512*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56832*0 + 3*512*FLEN/8, x4, x1, x2)

inst_18945:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5ffe0000; valaddr_reg:x3; val_offset:56835*0 + 3*513*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56835*0 + 3*513*FLEN/8, x4, x1, x2)

inst_18946:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5fff0000; valaddr_reg:x3; val_offset:56838*0 + 3*514*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56838*0 + 3*514*FLEN/8, x4, x1, x2)

inst_18947:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5fff8000; valaddr_reg:x3; val_offset:56841*0 + 3*515*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56841*0 + 3*515*FLEN/8, x4, x1, x2)

inst_18948:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5fffc000; valaddr_reg:x3; val_offset:56844*0 + 3*516*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56844*0 + 3*516*FLEN/8, x4, x1, x2)

inst_18949:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5fffe000; valaddr_reg:x3; val_offset:56847*0 + 3*517*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56847*0 + 3*517*FLEN/8, x4, x1, x2)

inst_18950:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5ffff000; valaddr_reg:x3; val_offset:56850*0 + 3*518*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56850*0 + 3*518*FLEN/8, x4, x1, x2)

inst_18951:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5ffff800; valaddr_reg:x3; val_offset:56853*0 + 3*519*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56853*0 + 3*519*FLEN/8, x4, x1, x2)

inst_18952:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5ffffc00; valaddr_reg:x3; val_offset:56856*0 + 3*520*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56856*0 + 3*520*FLEN/8, x4, x1, x2)

inst_18953:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5ffffe00; valaddr_reg:x3; val_offset:56859*0 + 3*521*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56859*0 + 3*521*FLEN/8, x4, x1, x2)

inst_18954:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5fffff00; valaddr_reg:x3; val_offset:56862*0 + 3*522*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56862*0 + 3*522*FLEN/8, x4, x1, x2)

inst_18955:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5fffff80; valaddr_reg:x3; val_offset:56865*0 + 3*523*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56865*0 + 3*523*FLEN/8, x4, x1, x2)

inst_18956:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5fffffc0; valaddr_reg:x3; val_offset:56868*0 + 3*524*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56868*0 + 3*524*FLEN/8, x4, x1, x2)

inst_18957:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5fffffe0; valaddr_reg:x3; val_offset:56871*0 + 3*525*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56871*0 + 3*525*FLEN/8, x4, x1, x2)

inst_18958:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5ffffff0; valaddr_reg:x3; val_offset:56874*0 + 3*526*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56874*0 + 3*526*FLEN/8, x4, x1, x2)

inst_18959:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5ffffff8; valaddr_reg:x3; val_offset:56877*0 + 3*527*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56877*0 + 3*527*FLEN/8, x4, x1, x2)

inst_18960:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5ffffffc; valaddr_reg:x3; val_offset:56880*0 + 3*528*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56880*0 + 3*528*FLEN/8, x4, x1, x2)

inst_18961:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5ffffffe; valaddr_reg:x3; val_offset:56883*0 + 3*529*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56883*0 + 3*529*FLEN/8, x4, x1, x2)

inst_18962:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x5fffffff; valaddr_reg:x3; val_offset:56886*0 + 3*530*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56886*0 + 3*530*FLEN/8, x4, x1, x2)

inst_18963:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x7f000001; valaddr_reg:x3; val_offset:56889*0 + 3*531*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56889*0 + 3*531*FLEN/8, x4, x1, x2)

inst_18964:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x7f000003; valaddr_reg:x3; val_offset:56892*0 + 3*532*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56892*0 + 3*532*FLEN/8, x4, x1, x2)

inst_18965:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x7f000007; valaddr_reg:x3; val_offset:56895*0 + 3*533*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56895*0 + 3*533*FLEN/8, x4, x1, x2)

inst_18966:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x7f199999; valaddr_reg:x3; val_offset:56898*0 + 3*534*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56898*0 + 3*534*FLEN/8, x4, x1, x2)

inst_18967:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x7f249249; valaddr_reg:x3; val_offset:56901*0 + 3*535*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56901*0 + 3*535*FLEN/8, x4, x1, x2)

inst_18968:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x7f333333; valaddr_reg:x3; val_offset:56904*0 + 3*536*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56904*0 + 3*536*FLEN/8, x4, x1, x2)

inst_18969:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x7f36db6d; valaddr_reg:x3; val_offset:56907*0 + 3*537*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56907*0 + 3*537*FLEN/8, x4, x1, x2)

inst_18970:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:56910*0 + 3*538*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56910*0 + 3*538*FLEN/8, x4, x1, x2)

inst_18971:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x7f444444; valaddr_reg:x3; val_offset:56913*0 + 3*539*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56913*0 + 3*539*FLEN/8, x4, x1, x2)

inst_18972:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:56916*0 + 3*540*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56916*0 + 3*540*FLEN/8, x4, x1, x2)

inst_18973:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:56919*0 + 3*541*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56919*0 + 3*541*FLEN/8, x4, x1, x2)

inst_18974:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x7f666666; valaddr_reg:x3; val_offset:56922*0 + 3*542*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56922*0 + 3*542*FLEN/8, x4, x1, x2)

inst_18975:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x7f6db6db; valaddr_reg:x3; val_offset:56925*0 + 3*543*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56925*0 + 3*543*FLEN/8, x4, x1, x2)

inst_18976:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:56928*0 + 3*544*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56928*0 + 3*544*FLEN/8, x4, x1, x2)

inst_18977:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:56931*0 + 3*545*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56931*0 + 3*545*FLEN/8, x4, x1, x2)

inst_18978:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f3bf4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b599f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf3bf4; op2val:0x402b599f;
op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:56934*0 + 3*546*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56934*0 + 3*546*FLEN/8, x4, x1, x2)

inst_18979:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d000000; valaddr_reg:x3; val_offset:56937*0 + 3*547*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56937*0 + 3*547*FLEN/8, x4, x1, x2)

inst_18980:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d000001; valaddr_reg:x3; val_offset:56940*0 + 3*548*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56940*0 + 3*548*FLEN/8, x4, x1, x2)

inst_18981:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d000003; valaddr_reg:x3; val_offset:56943*0 + 3*549*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56943*0 + 3*549*FLEN/8, x4, x1, x2)

inst_18982:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d000007; valaddr_reg:x3; val_offset:56946*0 + 3*550*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56946*0 + 3*550*FLEN/8, x4, x1, x2)

inst_18983:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d00000f; valaddr_reg:x3; val_offset:56949*0 + 3*551*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56949*0 + 3*551*FLEN/8, x4, x1, x2)

inst_18984:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d00001f; valaddr_reg:x3; val_offset:56952*0 + 3*552*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56952*0 + 3*552*FLEN/8, x4, x1, x2)

inst_18985:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d00003f; valaddr_reg:x3; val_offset:56955*0 + 3*553*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56955*0 + 3*553*FLEN/8, x4, x1, x2)

inst_18986:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d00007f; valaddr_reg:x3; val_offset:56958*0 + 3*554*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56958*0 + 3*554*FLEN/8, x4, x1, x2)

inst_18987:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d0000ff; valaddr_reg:x3; val_offset:56961*0 + 3*555*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56961*0 + 3*555*FLEN/8, x4, x1, x2)

inst_18988:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d0001ff; valaddr_reg:x3; val_offset:56964*0 + 3*556*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56964*0 + 3*556*FLEN/8, x4, x1, x2)

inst_18989:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d0003ff; valaddr_reg:x3; val_offset:56967*0 + 3*557*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56967*0 + 3*557*FLEN/8, x4, x1, x2)

inst_18990:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d0007ff; valaddr_reg:x3; val_offset:56970*0 + 3*558*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56970*0 + 3*558*FLEN/8, x4, x1, x2)

inst_18991:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d000fff; valaddr_reg:x3; val_offset:56973*0 + 3*559*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56973*0 + 3*559*FLEN/8, x4, x1, x2)

inst_18992:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d001fff; valaddr_reg:x3; val_offset:56976*0 + 3*560*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56976*0 + 3*560*FLEN/8, x4, x1, x2)

inst_18993:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d003fff; valaddr_reg:x3; val_offset:56979*0 + 3*561*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56979*0 + 3*561*FLEN/8, x4, x1, x2)

inst_18994:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d007fff; valaddr_reg:x3; val_offset:56982*0 + 3*562*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56982*0 + 3*562*FLEN/8, x4, x1, x2)

inst_18995:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d00ffff; valaddr_reg:x3; val_offset:56985*0 + 3*563*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56985*0 + 3*563*FLEN/8, x4, x1, x2)

inst_18996:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d01ffff; valaddr_reg:x3; val_offset:56988*0 + 3*564*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56988*0 + 3*564*FLEN/8, x4, x1, x2)

inst_18997:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d03ffff; valaddr_reg:x3; val_offset:56991*0 + 3*565*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56991*0 + 3*565*FLEN/8, x4, x1, x2)

inst_18998:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d07ffff; valaddr_reg:x3; val_offset:56994*0 + 3*566*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56994*0 + 3*566*FLEN/8, x4, x1, x2)

inst_18999:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d0fffff; valaddr_reg:x3; val_offset:56997*0 + 3*567*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56997*0 + 3*567*FLEN/8, x4, x1, x2)

inst_19000:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d1fffff; valaddr_reg:x3; val_offset:57000*0 + 3*568*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57000*0 + 3*568*FLEN/8, x4, x1, x2)

inst_19001:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d3fffff; valaddr_reg:x3; val_offset:57003*0 + 3*569*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57003*0 + 3*569*FLEN/8, x4, x1, x2)

inst_19002:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d400000; valaddr_reg:x3; val_offset:57006*0 + 3*570*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57006*0 + 3*570*FLEN/8, x4, x1, x2)

inst_19003:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d600000; valaddr_reg:x3; val_offset:57009*0 + 3*571*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57009*0 + 3*571*FLEN/8, x4, x1, x2)

inst_19004:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d700000; valaddr_reg:x3; val_offset:57012*0 + 3*572*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57012*0 + 3*572*FLEN/8, x4, x1, x2)

inst_19005:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d780000; valaddr_reg:x3; val_offset:57015*0 + 3*573*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57015*0 + 3*573*FLEN/8, x4, x1, x2)

inst_19006:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d7c0000; valaddr_reg:x3; val_offset:57018*0 + 3*574*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57018*0 + 3*574*FLEN/8, x4, x1, x2)

inst_19007:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d7e0000; valaddr_reg:x3; val_offset:57021*0 + 3*575*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57021*0 + 3*575*FLEN/8, x4, x1, x2)

inst_19008:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d7f0000; valaddr_reg:x3; val_offset:57024*0 + 3*576*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57024*0 + 3*576*FLEN/8, x4, x1, x2)

inst_19009:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d7f8000; valaddr_reg:x3; val_offset:57027*0 + 3*577*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57027*0 + 3*577*FLEN/8, x4, x1, x2)

inst_19010:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d7fc000; valaddr_reg:x3; val_offset:57030*0 + 3*578*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57030*0 + 3*578*FLEN/8, x4, x1, x2)

inst_19011:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d7fe000; valaddr_reg:x3; val_offset:57033*0 + 3*579*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57033*0 + 3*579*FLEN/8, x4, x1, x2)

inst_19012:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d7ff000; valaddr_reg:x3; val_offset:57036*0 + 3*580*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57036*0 + 3*580*FLEN/8, x4, x1, x2)

inst_19013:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d7ff800; valaddr_reg:x3; val_offset:57039*0 + 3*581*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57039*0 + 3*581*FLEN/8, x4, x1, x2)

inst_19014:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d7ffc00; valaddr_reg:x3; val_offset:57042*0 + 3*582*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57042*0 + 3*582*FLEN/8, x4, x1, x2)

inst_19015:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d7ffe00; valaddr_reg:x3; val_offset:57045*0 + 3*583*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57045*0 + 3*583*FLEN/8, x4, x1, x2)

inst_19016:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d7fff00; valaddr_reg:x3; val_offset:57048*0 + 3*584*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57048*0 + 3*584*FLEN/8, x4, x1, x2)

inst_19017:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d7fff80; valaddr_reg:x3; val_offset:57051*0 + 3*585*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57051*0 + 3*585*FLEN/8, x4, x1, x2)

inst_19018:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d7fffc0; valaddr_reg:x3; val_offset:57054*0 + 3*586*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57054*0 + 3*586*FLEN/8, x4, x1, x2)

inst_19019:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d7fffe0; valaddr_reg:x3; val_offset:57057*0 + 3*587*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57057*0 + 3*587*FLEN/8, x4, x1, x2)

inst_19020:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d7ffff0; valaddr_reg:x3; val_offset:57060*0 + 3*588*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57060*0 + 3*588*FLEN/8, x4, x1, x2)

inst_19021:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d7ffff8; valaddr_reg:x3; val_offset:57063*0 + 3*589*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57063*0 + 3*589*FLEN/8, x4, x1, x2)

inst_19022:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d7ffffc; valaddr_reg:x3; val_offset:57066*0 + 3*590*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57066*0 + 3*590*FLEN/8, x4, x1, x2)

inst_19023:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d7ffffe; valaddr_reg:x3; val_offset:57069*0 + 3*591*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57069*0 + 3*591*FLEN/8, x4, x1, x2)

inst_19024:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7d7fffff; valaddr_reg:x3; val_offset:57072*0 + 3*592*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57072*0 + 3*592*FLEN/8, x4, x1, x2)

inst_19025:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7f000001; valaddr_reg:x3; val_offset:57075*0 + 3*593*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57075*0 + 3*593*FLEN/8, x4, x1, x2)

inst_19026:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7f000003; valaddr_reg:x3; val_offset:57078*0 + 3*594*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57078*0 + 3*594*FLEN/8, x4, x1, x2)

inst_19027:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7f000007; valaddr_reg:x3; val_offset:57081*0 + 3*595*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57081*0 + 3*595*FLEN/8, x4, x1, x2)

inst_19028:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7f199999; valaddr_reg:x3; val_offset:57084*0 + 3*596*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57084*0 + 3*596*FLEN/8, x4, x1, x2)

inst_19029:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7f249249; valaddr_reg:x3; val_offset:57087*0 + 3*597*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57087*0 + 3*597*FLEN/8, x4, x1, x2)

inst_19030:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7f333333; valaddr_reg:x3; val_offset:57090*0 + 3*598*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57090*0 + 3*598*FLEN/8, x4, x1, x2)

inst_19031:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7f36db6d; valaddr_reg:x3; val_offset:57093*0 + 3*599*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57093*0 + 3*599*FLEN/8, x4, x1, x2)

inst_19032:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:57096*0 + 3*600*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57096*0 + 3*600*FLEN/8, x4, x1, x2)

inst_19033:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7f444444; valaddr_reg:x3; val_offset:57099*0 + 3*601*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57099*0 + 3*601*FLEN/8, x4, x1, x2)

inst_19034:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:57102*0 + 3*602*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57102*0 + 3*602*FLEN/8, x4, x1, x2)

inst_19035:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:57105*0 + 3*603*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57105*0 + 3*603*FLEN/8, x4, x1, x2)

inst_19036:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7f666666; valaddr_reg:x3; val_offset:57108*0 + 3*604*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57108*0 + 3*604*FLEN/8, x4, x1, x2)

inst_19037:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7f6db6db; valaddr_reg:x3; val_offset:57111*0 + 3*605*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57111*0 + 3*605*FLEN/8, x4, x1, x2)

inst_19038:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:57114*0 + 3*606*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57114*0 + 3*606*FLEN/8, x4, x1, x2)

inst_19039:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:57117*0 + 3*607*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57117*0 + 3*607*FLEN/8, x4, x1, x2)

inst_19040:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7632 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2b2580 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7632; op2val:0x402b2580;
op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:57120*0 + 3*608*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57120*0 + 3*608*FLEN/8, x4, x1, x2)

inst_19041:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x3; val_offset:57123*0 + 3*609*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57123*0 + 3*609*FLEN/8, x4, x1, x2)

inst_19042:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x3; val_offset:57126*0 + 3*610*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57126*0 + 3*610*FLEN/8, x4, x1, x2)

inst_19043:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x3; val_offset:57129*0 + 3*611*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57129*0 + 3*611*FLEN/8, x4, x1, x2)

inst_19044:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x3; val_offset:57132*0 + 3*612*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57132*0 + 3*612*FLEN/8, x4, x1, x2)

inst_19045:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x3; val_offset:57135*0 + 3*613*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57135*0 + 3*613*FLEN/8, x4, x1, x2)

inst_19046:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x3; val_offset:57138*0 + 3*614*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57138*0 + 3*614*FLEN/8, x4, x1, x2)

inst_19047:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x3; val_offset:57141*0 + 3*615*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57141*0 + 3*615*FLEN/8, x4, x1, x2)

inst_19048:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x3; val_offset:57144*0 + 3*616*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57144*0 + 3*616*FLEN/8, x4, x1, x2)

inst_19049:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x3; val_offset:57147*0 + 3*617*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57147*0 + 3*617*FLEN/8, x4, x1, x2)

inst_19050:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x3; val_offset:57150*0 + 3*618*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57150*0 + 3*618*FLEN/8, x4, x1, x2)

inst_19051:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x3; val_offset:57153*0 + 3*619*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57153*0 + 3*619*FLEN/8, x4, x1, x2)

inst_19052:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x3; val_offset:57156*0 + 3*620*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57156*0 + 3*620*FLEN/8, x4, x1, x2)

inst_19053:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x3; val_offset:57159*0 + 3*621*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57159*0 + 3*621*FLEN/8, x4, x1, x2)

inst_19054:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x3; val_offset:57162*0 + 3*622*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57162*0 + 3*622*FLEN/8, x4, x1, x2)

inst_19055:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x3; val_offset:57165*0 + 3*623*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57165*0 + 3*623*FLEN/8, x4, x1, x2)

inst_19056:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x3; val_offset:57168*0 + 3*624*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57168*0 + 3*624*FLEN/8, x4, x1, x2)

inst_19057:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f000000; valaddr_reg:x3; val_offset:57171*0 + 3*625*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57171*0 + 3*625*FLEN/8, x4, x1, x2)

inst_19058:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f000001; valaddr_reg:x3; val_offset:57174*0 + 3*626*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57174*0 + 3*626*FLEN/8, x4, x1, x2)

inst_19059:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f000003; valaddr_reg:x3; val_offset:57177*0 + 3*627*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57177*0 + 3*627*FLEN/8, x4, x1, x2)

inst_19060:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f000007; valaddr_reg:x3; val_offset:57180*0 + 3*628*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57180*0 + 3*628*FLEN/8, x4, x1, x2)

inst_19061:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f00000f; valaddr_reg:x3; val_offset:57183*0 + 3*629*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57183*0 + 3*629*FLEN/8, x4, x1, x2)

inst_19062:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f00001f; valaddr_reg:x3; val_offset:57186*0 + 3*630*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57186*0 + 3*630*FLEN/8, x4, x1, x2)

inst_19063:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f00003f; valaddr_reg:x3; val_offset:57189*0 + 3*631*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57189*0 + 3*631*FLEN/8, x4, x1, x2)

inst_19064:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f00007f; valaddr_reg:x3; val_offset:57192*0 + 3*632*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57192*0 + 3*632*FLEN/8, x4, x1, x2)

inst_19065:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f0000ff; valaddr_reg:x3; val_offset:57195*0 + 3*633*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57195*0 + 3*633*FLEN/8, x4, x1, x2)

inst_19066:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f0001ff; valaddr_reg:x3; val_offset:57198*0 + 3*634*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57198*0 + 3*634*FLEN/8, x4, x1, x2)

inst_19067:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f0003ff; valaddr_reg:x3; val_offset:57201*0 + 3*635*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57201*0 + 3*635*FLEN/8, x4, x1, x2)

inst_19068:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f0007ff; valaddr_reg:x3; val_offset:57204*0 + 3*636*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57204*0 + 3*636*FLEN/8, x4, x1, x2)

inst_19069:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f000fff; valaddr_reg:x3; val_offset:57207*0 + 3*637*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57207*0 + 3*637*FLEN/8, x4, x1, x2)

inst_19070:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f001fff; valaddr_reg:x3; val_offset:57210*0 + 3*638*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57210*0 + 3*638*FLEN/8, x4, x1, x2)

inst_19071:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f003fff; valaddr_reg:x3; val_offset:57213*0 + 3*639*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57213*0 + 3*639*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_6)

inst_19072:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f007fff; valaddr_reg:x3; val_offset:57216*0 + 3*640*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57216*0 + 3*640*FLEN/8, x4, x1, x2)

inst_19073:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f00ffff; valaddr_reg:x3; val_offset:57219*0 + 3*641*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57219*0 + 3*641*FLEN/8, x4, x1, x2)

inst_19074:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f01ffff; valaddr_reg:x3; val_offset:57222*0 + 3*642*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57222*0 + 3*642*FLEN/8, x4, x1, x2)

inst_19075:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f03ffff; valaddr_reg:x3; val_offset:57225*0 + 3*643*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57225*0 + 3*643*FLEN/8, x4, x1, x2)

inst_19076:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f07ffff; valaddr_reg:x3; val_offset:57228*0 + 3*644*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57228*0 + 3*644*FLEN/8, x4, x1, x2)

inst_19077:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f0fffff; valaddr_reg:x3; val_offset:57231*0 + 3*645*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57231*0 + 3*645*FLEN/8, x4, x1, x2)

inst_19078:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f1fffff; valaddr_reg:x3; val_offset:57234*0 + 3*646*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57234*0 + 3*646*FLEN/8, x4, x1, x2)

inst_19079:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f3fffff; valaddr_reg:x3; val_offset:57237*0 + 3*647*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57237*0 + 3*647*FLEN/8, x4, x1, x2)

inst_19080:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f400000; valaddr_reg:x3; val_offset:57240*0 + 3*648*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57240*0 + 3*648*FLEN/8, x4, x1, x2)

inst_19081:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f600000; valaddr_reg:x3; val_offset:57243*0 + 3*649*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57243*0 + 3*649*FLEN/8, x4, x1, x2)

inst_19082:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f700000; valaddr_reg:x3; val_offset:57246*0 + 3*650*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57246*0 + 3*650*FLEN/8, x4, x1, x2)

inst_19083:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f780000; valaddr_reg:x3; val_offset:57249*0 + 3*651*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57249*0 + 3*651*FLEN/8, x4, x1, x2)

inst_19084:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f7c0000; valaddr_reg:x3; val_offset:57252*0 + 3*652*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57252*0 + 3*652*FLEN/8, x4, x1, x2)

inst_19085:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f7e0000; valaddr_reg:x3; val_offset:57255*0 + 3*653*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57255*0 + 3*653*FLEN/8, x4, x1, x2)

inst_19086:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f7f0000; valaddr_reg:x3; val_offset:57258*0 + 3*654*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57258*0 + 3*654*FLEN/8, x4, x1, x2)

inst_19087:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f7f8000; valaddr_reg:x3; val_offset:57261*0 + 3*655*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57261*0 + 3*655*FLEN/8, x4, x1, x2)

inst_19088:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f7fc000; valaddr_reg:x3; val_offset:57264*0 + 3*656*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57264*0 + 3*656*FLEN/8, x4, x1, x2)

inst_19089:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f7fe000; valaddr_reg:x3; val_offset:57267*0 + 3*657*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57267*0 + 3*657*FLEN/8, x4, x1, x2)

inst_19090:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f7ff000; valaddr_reg:x3; val_offset:57270*0 + 3*658*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57270*0 + 3*658*FLEN/8, x4, x1, x2)

inst_19091:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f7ff800; valaddr_reg:x3; val_offset:57273*0 + 3*659*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57273*0 + 3*659*FLEN/8, x4, x1, x2)

inst_19092:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f7ffc00; valaddr_reg:x3; val_offset:57276*0 + 3*660*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57276*0 + 3*660*FLEN/8, x4, x1, x2)

inst_19093:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f7ffe00; valaddr_reg:x3; val_offset:57279*0 + 3*661*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57279*0 + 3*661*FLEN/8, x4, x1, x2)

inst_19094:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f7fff00; valaddr_reg:x3; val_offset:57282*0 + 3*662*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57282*0 + 3*662*FLEN/8, x4, x1, x2)

inst_19095:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f7fff80; valaddr_reg:x3; val_offset:57285*0 + 3*663*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57285*0 + 3*663*FLEN/8, x4, x1, x2)

inst_19096:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f7fffc0; valaddr_reg:x3; val_offset:57288*0 + 3*664*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57288*0 + 3*664*FLEN/8, x4, x1, x2)

inst_19097:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f7fffe0; valaddr_reg:x3; val_offset:57291*0 + 3*665*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57291*0 + 3*665*FLEN/8, x4, x1, x2)

inst_19098:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f7ffff0; valaddr_reg:x3; val_offset:57294*0 + 3*666*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57294*0 + 3*666*FLEN/8, x4, x1, x2)

inst_19099:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f7ffff8; valaddr_reg:x3; val_offset:57297*0 + 3*667*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57297*0 + 3*667*FLEN/8, x4, x1, x2)

inst_19100:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f7ffffc; valaddr_reg:x3; val_offset:57300*0 + 3*668*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57300*0 + 3*668*FLEN/8, x4, x1, x2)

inst_19101:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f7ffffe; valaddr_reg:x3; val_offset:57303*0 + 3*669*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57303*0 + 3*669*FLEN/8, x4, x1, x2)

inst_19102:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x401e6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec01e6f; op2val:0x80000000;
op3val:0x8f7fffff; valaddr_reg:x3; val_offset:57306*0 + 3*670*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57306*0 + 3*670*FLEN/8, x4, x1, x2)

inst_19103:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xbf800001; valaddr_reg:x3; val_offset:57309*0 + 3*671*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57309*0 + 3*671*FLEN/8, x4, x1, x2)

inst_19104:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xbf800003; valaddr_reg:x3; val_offset:57312*0 + 3*672*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57312*0 + 3*672*FLEN/8, x4, x1, x2)

inst_19105:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xbf800007; valaddr_reg:x3; val_offset:57315*0 + 3*673*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57315*0 + 3*673*FLEN/8, x4, x1, x2)

inst_19106:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xbf999999; valaddr_reg:x3; val_offset:57318*0 + 3*674*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57318*0 + 3*674*FLEN/8, x4, x1, x2)

inst_19107:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:57321*0 + 3*675*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57321*0 + 3*675*FLEN/8, x4, x1, x2)

inst_19108:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:57324*0 + 3*676*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57324*0 + 3*676*FLEN/8, x4, x1, x2)

inst_19109:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:57327*0 + 3*677*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57327*0 + 3*677*FLEN/8, x4, x1, x2)

inst_19110:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:57330*0 + 3*678*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57330*0 + 3*678*FLEN/8, x4, x1, x2)

inst_19111:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:57333*0 + 3*679*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57333*0 + 3*679*FLEN/8, x4, x1, x2)

inst_19112:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:57336*0 + 3*680*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57336*0 + 3*680*FLEN/8, x4, x1, x2)

inst_19113:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:57339*0 + 3*681*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57339*0 + 3*681*FLEN/8, x4, x1, x2)

inst_19114:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:57342*0 + 3*682*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57342*0 + 3*682*FLEN/8, x4, x1, x2)

inst_19115:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:57345*0 + 3*683*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57345*0 + 3*683*FLEN/8, x4, x1, x2)

inst_19116:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:57348*0 + 3*684*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57348*0 + 3*684*FLEN/8, x4, x1, x2)

inst_19117:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:57351*0 + 3*685*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57351*0 + 3*685*FLEN/8, x4, x1, x2)

inst_19118:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:57354*0 + 3*686*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57354*0 + 3*686*FLEN/8, x4, x1, x2)

inst_19119:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc5000000; valaddr_reg:x3; val_offset:57357*0 + 3*687*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57357*0 + 3*687*FLEN/8, x4, x1, x2)

inst_19120:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc5000001; valaddr_reg:x3; val_offset:57360*0 + 3*688*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57360*0 + 3*688*FLEN/8, x4, x1, x2)

inst_19121:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc5000003; valaddr_reg:x3; val_offset:57363*0 + 3*689*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57363*0 + 3*689*FLEN/8, x4, x1, x2)

inst_19122:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc5000007; valaddr_reg:x3; val_offset:57366*0 + 3*690*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57366*0 + 3*690*FLEN/8, x4, x1, x2)

inst_19123:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc500000f; valaddr_reg:x3; val_offset:57369*0 + 3*691*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57369*0 + 3*691*FLEN/8, x4, x1, x2)

inst_19124:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc500001f; valaddr_reg:x3; val_offset:57372*0 + 3*692*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57372*0 + 3*692*FLEN/8, x4, x1, x2)

inst_19125:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc500003f; valaddr_reg:x3; val_offset:57375*0 + 3*693*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57375*0 + 3*693*FLEN/8, x4, x1, x2)

inst_19126:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc500007f; valaddr_reg:x3; val_offset:57378*0 + 3*694*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57378*0 + 3*694*FLEN/8, x4, x1, x2)

inst_19127:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc50000ff; valaddr_reg:x3; val_offset:57381*0 + 3*695*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57381*0 + 3*695*FLEN/8, x4, x1, x2)

inst_19128:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc50001ff; valaddr_reg:x3; val_offset:57384*0 + 3*696*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57384*0 + 3*696*FLEN/8, x4, x1, x2)

inst_19129:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc50003ff; valaddr_reg:x3; val_offset:57387*0 + 3*697*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57387*0 + 3*697*FLEN/8, x4, x1, x2)

inst_19130:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc50007ff; valaddr_reg:x3; val_offset:57390*0 + 3*698*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57390*0 + 3*698*FLEN/8, x4, x1, x2)

inst_19131:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc5000fff; valaddr_reg:x3; val_offset:57393*0 + 3*699*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57393*0 + 3*699*FLEN/8, x4, x1, x2)

inst_19132:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc5001fff; valaddr_reg:x3; val_offset:57396*0 + 3*700*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57396*0 + 3*700*FLEN/8, x4, x1, x2)

inst_19133:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc5003fff; valaddr_reg:x3; val_offset:57399*0 + 3*701*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57399*0 + 3*701*FLEN/8, x4, x1, x2)

inst_19134:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc5007fff; valaddr_reg:x3; val_offset:57402*0 + 3*702*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57402*0 + 3*702*FLEN/8, x4, x1, x2)

inst_19135:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc500ffff; valaddr_reg:x3; val_offset:57405*0 + 3*703*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57405*0 + 3*703*FLEN/8, x4, x1, x2)

inst_19136:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc501ffff; valaddr_reg:x3; val_offset:57408*0 + 3*704*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57408*0 + 3*704*FLEN/8, x4, x1, x2)

inst_19137:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc503ffff; valaddr_reg:x3; val_offset:57411*0 + 3*705*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57411*0 + 3*705*FLEN/8, x4, x1, x2)

inst_19138:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc507ffff; valaddr_reg:x3; val_offset:57414*0 + 3*706*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57414*0 + 3*706*FLEN/8, x4, x1, x2)

inst_19139:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc50fffff; valaddr_reg:x3; val_offset:57417*0 + 3*707*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57417*0 + 3*707*FLEN/8, x4, x1, x2)

inst_19140:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc51fffff; valaddr_reg:x3; val_offset:57420*0 + 3*708*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57420*0 + 3*708*FLEN/8, x4, x1, x2)

inst_19141:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc53fffff; valaddr_reg:x3; val_offset:57423*0 + 3*709*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57423*0 + 3*709*FLEN/8, x4, x1, x2)

inst_19142:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc5400000; valaddr_reg:x3; val_offset:57426*0 + 3*710*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57426*0 + 3*710*FLEN/8, x4, x1, x2)

inst_19143:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc5600000; valaddr_reg:x3; val_offset:57429*0 + 3*711*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57429*0 + 3*711*FLEN/8, x4, x1, x2)

inst_19144:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc5700000; valaddr_reg:x3; val_offset:57432*0 + 3*712*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57432*0 + 3*712*FLEN/8, x4, x1, x2)

inst_19145:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc5780000; valaddr_reg:x3; val_offset:57435*0 + 3*713*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57435*0 + 3*713*FLEN/8, x4, x1, x2)

inst_19146:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc57c0000; valaddr_reg:x3; val_offset:57438*0 + 3*714*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57438*0 + 3*714*FLEN/8, x4, x1, x2)

inst_19147:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc57e0000; valaddr_reg:x3; val_offset:57441*0 + 3*715*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57441*0 + 3*715*FLEN/8, x4, x1, x2)

inst_19148:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc57f0000; valaddr_reg:x3; val_offset:57444*0 + 3*716*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57444*0 + 3*716*FLEN/8, x4, x1, x2)

inst_19149:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc57f8000; valaddr_reg:x3; val_offset:57447*0 + 3*717*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57447*0 + 3*717*FLEN/8, x4, x1, x2)

inst_19150:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc57fc000; valaddr_reg:x3; val_offset:57450*0 + 3*718*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57450*0 + 3*718*FLEN/8, x4, x1, x2)

inst_19151:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc57fe000; valaddr_reg:x3; val_offset:57453*0 + 3*719*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57453*0 + 3*719*FLEN/8, x4, x1, x2)

inst_19152:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc57ff000; valaddr_reg:x3; val_offset:57456*0 + 3*720*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57456*0 + 3*720*FLEN/8, x4, x1, x2)

inst_19153:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc57ff800; valaddr_reg:x3; val_offset:57459*0 + 3*721*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57459*0 + 3*721*FLEN/8, x4, x1, x2)

inst_19154:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc57ffc00; valaddr_reg:x3; val_offset:57462*0 + 3*722*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57462*0 + 3*722*FLEN/8, x4, x1, x2)

inst_19155:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc57ffe00; valaddr_reg:x3; val_offset:57465*0 + 3*723*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57465*0 + 3*723*FLEN/8, x4, x1, x2)

inst_19156:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc57fff00; valaddr_reg:x3; val_offset:57468*0 + 3*724*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57468*0 + 3*724*FLEN/8, x4, x1, x2)

inst_19157:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc57fff80; valaddr_reg:x3; val_offset:57471*0 + 3*725*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57471*0 + 3*725*FLEN/8, x4, x1, x2)

inst_19158:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc57fffc0; valaddr_reg:x3; val_offset:57474*0 + 3*726*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57474*0 + 3*726*FLEN/8, x4, x1, x2)

inst_19159:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc57fffe0; valaddr_reg:x3; val_offset:57477*0 + 3*727*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57477*0 + 3*727*FLEN/8, x4, x1, x2)

inst_19160:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc57ffff0; valaddr_reg:x3; val_offset:57480*0 + 3*728*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57480*0 + 3*728*FLEN/8, x4, x1, x2)

inst_19161:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc57ffff8; valaddr_reg:x3; val_offset:57483*0 + 3*729*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57483*0 + 3*729*FLEN/8, x4, x1, x2)

inst_19162:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc57ffffc; valaddr_reg:x3; val_offset:57486*0 + 3*730*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57486*0 + 3*730*FLEN/8, x4, x1, x2)

inst_19163:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc57ffffe; valaddr_reg:x3; val_offset:57489*0 + 3*731*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57489*0 + 3*731*FLEN/8, x4, x1, x2)

inst_19164:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x40d067 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x54f919 and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec0d067; op2val:0x8054f919;
op3val:0xc57fffff; valaddr_reg:x3; val_offset:57492*0 + 3*732*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57492*0 + 3*732*FLEN/8, x4, x1, x2)

inst_19165:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x80800001; valaddr_reg:x3; val_offset:57495*0 + 3*733*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57495*0 + 3*733*FLEN/8, x4, x1, x2)

inst_19166:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x80800003; valaddr_reg:x3; val_offset:57498*0 + 3*734*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57498*0 + 3*734*FLEN/8, x4, x1, x2)

inst_19167:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x80800007; valaddr_reg:x3; val_offset:57501*0 + 3*735*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57501*0 + 3*735*FLEN/8, x4, x1, x2)

inst_19168:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x80999999; valaddr_reg:x3; val_offset:57504*0 + 3*736*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57504*0 + 3*736*FLEN/8, x4, x1, x2)

inst_19169:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x80a49249; valaddr_reg:x3; val_offset:57507*0 + 3*737*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57507*0 + 3*737*FLEN/8, x4, x1, x2)

inst_19170:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x80b33333; valaddr_reg:x3; val_offset:57510*0 + 3*738*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57510*0 + 3*738*FLEN/8, x4, x1, x2)

inst_19171:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x80b6db6d; valaddr_reg:x3; val_offset:57513*0 + 3*739*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57513*0 + 3*739*FLEN/8, x4, x1, x2)

inst_19172:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:57516*0 + 3*740*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57516*0 + 3*740*FLEN/8, x4, x1, x2)

inst_19173:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x80c44444; valaddr_reg:x3; val_offset:57519*0 + 3*741*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57519*0 + 3*741*FLEN/8, x4, x1, x2)

inst_19174:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x80cccccc; valaddr_reg:x3; val_offset:57522*0 + 3*742*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57522*0 + 3*742*FLEN/8, x4, x1, x2)

inst_19175:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x80db6db6; valaddr_reg:x3; val_offset:57525*0 + 3*743*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57525*0 + 3*743*FLEN/8, x4, x1, x2)

inst_19176:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x80e66666; valaddr_reg:x3; val_offset:57528*0 + 3*744*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57528*0 + 3*744*FLEN/8, x4, x1, x2)

inst_19177:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x80edb6db; valaddr_reg:x3; val_offset:57531*0 + 3*745*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57531*0 + 3*745*FLEN/8, x4, x1, x2)

inst_19178:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x80fffff8; valaddr_reg:x3; val_offset:57534*0 + 3*746*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57534*0 + 3*746*FLEN/8, x4, x1, x2)

inst_19179:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x80fffffc; valaddr_reg:x3; val_offset:57537*0 + 3*747*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57537*0 + 3*747*FLEN/8, x4, x1, x2)

inst_19180:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x80fffffe; valaddr_reg:x3; val_offset:57540*0 + 3*748*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57540*0 + 3*748*FLEN/8, x4, x1, x2)

inst_19181:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x8f000000; valaddr_reg:x3; val_offset:57543*0 + 3*749*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57543*0 + 3*749*FLEN/8, x4, x1, x2)

inst_19182:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x8f000001; valaddr_reg:x3; val_offset:57546*0 + 3*750*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57546*0 + 3*750*FLEN/8, x4, x1, x2)

inst_19183:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x8f000003; valaddr_reg:x3; val_offset:57549*0 + 3*751*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57549*0 + 3*751*FLEN/8, x4, x1, x2)

inst_19184:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x8f000007; valaddr_reg:x3; val_offset:57552*0 + 3*752*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57552*0 + 3*752*FLEN/8, x4, x1, x2)

inst_19185:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x8f00000f; valaddr_reg:x3; val_offset:57555*0 + 3*753*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57555*0 + 3*753*FLEN/8, x4, x1, x2)

inst_19186:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x8f00001f; valaddr_reg:x3; val_offset:57558*0 + 3*754*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57558*0 + 3*754*FLEN/8, x4, x1, x2)

inst_19187:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x8f00003f; valaddr_reg:x3; val_offset:57561*0 + 3*755*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57561*0 + 3*755*FLEN/8, x4, x1, x2)

inst_19188:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x8f00007f; valaddr_reg:x3; val_offset:57564*0 + 3*756*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57564*0 + 3*756*FLEN/8, x4, x1, x2)

inst_19189:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x8f0000ff; valaddr_reg:x3; val_offset:57567*0 + 3*757*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57567*0 + 3*757*FLEN/8, x4, x1, x2)

inst_19190:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x8f0001ff; valaddr_reg:x3; val_offset:57570*0 + 3*758*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57570*0 + 3*758*FLEN/8, x4, x1, x2)

inst_19191:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x8f0003ff; valaddr_reg:x3; val_offset:57573*0 + 3*759*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57573*0 + 3*759*FLEN/8, x4, x1, x2)

inst_19192:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x8f0007ff; valaddr_reg:x3; val_offset:57576*0 + 3*760*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57576*0 + 3*760*FLEN/8, x4, x1, x2)

inst_19193:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x8f000fff; valaddr_reg:x3; val_offset:57579*0 + 3*761*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57579*0 + 3*761*FLEN/8, x4, x1, x2)

inst_19194:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x8f001fff; valaddr_reg:x3; val_offset:57582*0 + 3*762*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57582*0 + 3*762*FLEN/8, x4, x1, x2)

inst_19195:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x8f003fff; valaddr_reg:x3; val_offset:57585*0 + 3*763*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57585*0 + 3*763*FLEN/8, x4, x1, x2)

inst_19196:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x8f007fff; valaddr_reg:x3; val_offset:57588*0 + 3*764*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57588*0 + 3*764*FLEN/8, x4, x1, x2)

inst_19197:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x8f00ffff; valaddr_reg:x3; val_offset:57591*0 + 3*765*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57591*0 + 3*765*FLEN/8, x4, x1, x2)

inst_19198:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x8f01ffff; valaddr_reg:x3; val_offset:57594*0 + 3*766*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57594*0 + 3*766*FLEN/8, x4, x1, x2)

inst_19199:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41cf2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec1cf2f; op2val:0x80000000;
op3val:0x8f03ffff; valaddr_reg:x3; val_offset:57597*0 + 3*767*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57597*0 + 3*767*FLEN/8, x4, x1, x2)
#endif


RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80666666,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x806db6db,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffff8,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffc,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffe,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84000000,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84000001,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84000003,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84000007,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8400000f,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8400001f,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8400003f,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8400007f,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x840000ff,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x840001ff,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x840003ff,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x840007ff,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84000fff,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84001fff,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84003fff,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84007fff,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8400ffff,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8401ffff,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8403ffff,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8407ffff,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x840fffff,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x841fffff,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x843fffff,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84400000,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84600000,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84700000,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84780000,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847c0000,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847e0000,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847f0000,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847f8000,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847fc000,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847fe000,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847ff000,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847ff800,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847ffc00,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847ffe00,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847fff00,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847fff80,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847fffc0,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847fffe0,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847ffff0,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847ffff8,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847ffffc,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847ffffe,32,FLEN)
NAN_BOXED(0x7eb8d1a5,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847fffff,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x199999,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x249249,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x333333,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x36db6d,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3bbbbb,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x444444,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ccccc,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5b6db6,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x666666,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6db6db,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff8,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffc,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffe,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4800000,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4800001,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4800003,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4800007,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x480000f,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x480001f,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x480003f,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x480007f,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x48000ff,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x48001ff,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x48003ff,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x48007ff,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4800fff,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4801fff,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4803fff,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4807fff,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x480ffff,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x481ffff,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x483ffff,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x487ffff,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x48fffff,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x49fffff,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4bfffff,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c00000,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4e00000,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4f00000,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4f80000,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4fc0000,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4fe0000,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ff0000,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ff8000,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ffc000,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ffe000,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4fff000,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4fff800,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4fffc00,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4fffe00,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ffff00,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ffff80,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ffffc0,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ffffe0,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4fffff0,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4fffff8,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4fffffc,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4fffffe,32,FLEN)
NAN_BOXED(0x7eb9aa1a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ffffff,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe3800000,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe3800001,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe3800003,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe3800007,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe380000f,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe380001f,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe380003f,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe380007f,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe38000ff,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe38001ff,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe38003ff,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe38007ff,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe3800fff,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe3801fff,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe3803fff,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe3807fff,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe380ffff,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe381ffff,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe383ffff,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe387ffff,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe38fffff,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe39fffff,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe3bfffff,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe3c00000,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe3e00000,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe3f00000,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe3f80000,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe3fc0000,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe3fe0000,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe3ff0000,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe3ff8000,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe3ffc000,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe3ffe000,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe3fff000,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe3fff800,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe3fffc00,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe3fffe00,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe3ffff00,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe3ffff80,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe3ffffc0,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe3ffffe0,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe3fffff0,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe3fffff8,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe3fffffc,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe3fffffe,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xe3ffffff,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xff000001,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xff000003,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xff000007,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xff199999,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xff249249,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xff333333,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xff36db6d,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xff3bbbbb,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xff444444,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xff4ccccc,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xff5b6db6,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xff666666,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xff6db6db,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xff7ffff8,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xff7ffffc,32,FLEN)
NAN_BOXED(0x7eba3d9c,32,FLEN)
NAN_BOXED(0xc02ff1c2,32,FLEN)
NAN_BOXED(0xff7ffffe,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800001,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800003,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800007,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x999999,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa49249,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb33333,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb6db6d,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbbbbbb,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc44444,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcccccc,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdb6db6,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe66666,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xedb6db,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffff8,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffc,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffe,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5800000,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5800001,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5800003,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5800007,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x580000f,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x580001f,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x580003f,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x580007f,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x58000ff,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x58001ff,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x58003ff,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x58007ff,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5800fff,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5801fff,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5803fff,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5807fff,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x580ffff,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x581ffff,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x583ffff,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x587ffff,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x58fffff,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x59fffff,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5bfffff,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5c00000,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5e00000,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5f00000,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5f80000,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5fc0000,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5fe0000,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5ff0000,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5ff8000,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5ffc000,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5ffe000,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5fff000,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5fff800,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5fffc00,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5fffe00,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5ffff00,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5ffff80,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5ffffc0,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5ffffe0,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5fffff0,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5fffff8,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5fffffc,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5fffffe,32,FLEN)
NAN_BOXED(0x7ebc2749,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5ffffff,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf5800000,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf5800001,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf5800003,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf5800007,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf580000f,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf580001f,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf580003f,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf580007f,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf58000ff,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf58001ff,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf58003ff,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf58007ff,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf5800fff,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf5801fff,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf5803fff,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf5807fff,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf580ffff,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf581ffff,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf583ffff,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf587ffff,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf58fffff,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf59fffff,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf5bfffff,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf5c00000,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf5e00000,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf5f00000,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf5f80000,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf5fc0000,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf5fe0000,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf5ff0000,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf5ff8000,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf5ffc000,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf5ffe000,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf5fff000,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf5fff800,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf5fffc00,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf5fffe00,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf5ffff00,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf5ffff80,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf5ffffc0,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf5ffffe0,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf5fffff0,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf5fffff8,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf5fffffc,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf5fffffe,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xf5ffffff,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xff000001,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xff000003,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xff000007,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xff199999,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xff249249,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xff333333,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xff36db6d,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xff3bbbbb,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xff444444,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xff4ccccc,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xff5b6db6,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xff666666,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xff6db6db,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xff7ffff8,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xff7ffffc,32,FLEN)
NAN_BOXED(0x7ebc4401,32,FLEN)
NAN_BOXED(0xc02e0d4a,32,FLEN)
NAN_BOXED(0xff7ffffe,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe6800000,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe6800001,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe6800003,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe6800007,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe680000f,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe680001f,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe680003f,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe680007f,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe68000ff,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe68001ff,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe68003ff,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe68007ff,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe6800fff,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe6801fff,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe6803fff,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe6807fff,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe680ffff,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe681ffff,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe683ffff,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe687ffff,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe68fffff,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe69fffff,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe6bfffff,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe6c00000,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe6e00000,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe6f00000,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe6f80000,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe6fc0000,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe6fe0000,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe6ff0000,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe6ff8000,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe6ffc000,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe6ffe000,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe6fff000,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe6fff800,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe6fffc00,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe6fffe00,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe6ffff00,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe6ffff80,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe6ffffc0,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe6ffffe0,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe6fffff0,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe6fffff8,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe6fffffc,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe6fffffe,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xe6ffffff,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xff000001,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xff000003,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xff000007,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xff199999,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xff249249,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xff333333,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xff36db6d,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xff3bbbbb,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xff444444,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xff4ccccc,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xff5b6db6,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xff666666,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xff6db6db,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xff7ffff8,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xff7ffffc,32,FLEN)
NAN_BOXED(0x7ebee6da,32,FLEN)
NAN_BOXED(0xc02ba602,32,FLEN)
NAN_BOXED(0xff7ffffe,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6e800000,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6e800001,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6e800003,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6e800007,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6e80000f,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6e80001f,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6e80003f,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6e80007f,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6e8000ff,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6e8001ff,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6e8003ff,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6e8007ff,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6e800fff,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6e801fff,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6e803fff,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6e807fff,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6e80ffff,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6e81ffff,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6e83ffff,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6e87ffff,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6e8fffff,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6e9fffff,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6ebfffff,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6ec00000,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6ee00000,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6ef00000,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6ef80000,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6efc0000,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6efe0000,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6eff0000,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6eff8000,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6effc000,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6effe000,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6efff000,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6efff800,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6efffc00,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6efffe00,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6effff00,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6effff80,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6effffc0,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6effffe0,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6efffff0,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6efffff8,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6efffffc,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6efffffe,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x6effffff,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x7f000001,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x7f000003,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x7f000007,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x7f199999,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x7f249249,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x7f333333,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x7f36db6d,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x7f3bbbbb,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x7f444444,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x7f4ccccc,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x7f5b6db6,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x7f666666,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x7f6db6db,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x7f7ffff8,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x7f7ffffc,32,FLEN)
NAN_BOXED(0x7ebf2962,32,FLEN)
NAN_BOXED(0x402b6a44,32,FLEN)
NAN_BOXED(0x7f7ffffe,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x199999,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x249249,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x333333,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x36db6d,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3bbbbb,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x444444,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ccccc,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5b6db6,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x666666,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6db6db,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff8,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffc,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffe,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4000000,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4000001,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4000003,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4000007,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x400000f,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x400001f,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x400003f,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x400007f,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x40000ff,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x40001ff,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x40003ff,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x40007ff,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4000fff,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4001fff,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4003fff,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4007fff,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x400ffff,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x401ffff,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x403ffff,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x407ffff,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x40fffff,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x41fffff,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x43fffff,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4400000,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4600000,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4700000,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4780000,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47c0000,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47e0000,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47f0000,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47f8000,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47fc000,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47fe000,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47ff000,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47ff800,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47ffc00,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47ffe00,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47fff00,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47fff80,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47fffc0,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47fffe0,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47ffff0,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47ffff8,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47ffffc,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47ffffe,32,FLEN)
NAN_BOXED(0x7ebf374b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47fffff,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5f800000,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5f800001,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5f800003,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5f800007,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5f80000f,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5f80001f,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5f80003f,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5f80007f,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5f8000ff,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5f8001ff,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5f8003ff,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5f8007ff,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5f800fff,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5f801fff,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5f803fff,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5f807fff,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5f80ffff,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5f81ffff,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5f83ffff,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5f87ffff,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5f8fffff,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5f9fffff,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5fbfffff,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5fc00000,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5fe00000,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5ff00000,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5ff80000,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5ffc0000,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5ffe0000,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5fff0000,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5fff8000,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5fffc000,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5fffe000,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5ffff000,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5ffff800,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5ffffc00,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5ffffe00,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5fffff00,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5fffff80,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5fffffc0,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5fffffe0,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5ffffff0,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5ffffff8,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5ffffffc,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5ffffffe,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x5fffffff,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x7f000001,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x7f000003,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x7f000007,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x7f199999,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x7f249249,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x7f333333,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x7f36db6d,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x7f3bbbbb,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x7f444444,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x7f4ccccc,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x7f5b6db6,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x7f666666,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x7f6db6db,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x7f7ffff8,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x7f7ffffc,32,FLEN)
NAN_BOXED(0x7ebf3bf4,32,FLEN)
NAN_BOXED(0x402b599f,32,FLEN)
NAN_BOXED(0x7f7ffffe,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d000000,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d000001,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d000003,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d000007,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d00000f,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d00001f,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d00003f,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d00007f,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d0000ff,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d0001ff,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d0003ff,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d0007ff,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d000fff,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d001fff,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d003fff,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d007fff,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d00ffff,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d01ffff,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d03ffff,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d07ffff,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d0fffff,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d1fffff,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d3fffff,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d400000,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d600000,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d700000,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d780000,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d7c0000,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d7e0000,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d7f0000,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d7f8000,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d7fc000,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d7fe000,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d7ff000,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d7ff800,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d7ffc00,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d7ffe00,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d7fff00,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d7fff80,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d7fffc0,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d7fffe0,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d7ffff0,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d7ffff8,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d7ffffc,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d7ffffe,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7d7fffff,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7f000001,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7f000003,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7f000007,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7f199999,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7f249249,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7f333333,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7f36db6d,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7f3bbbbb,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7f444444,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7f4ccccc,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7f5b6db6,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7f666666,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7f6db6db,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7f7ffff8,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7f7ffffc,32,FLEN)
NAN_BOXED(0x7ebf7632,32,FLEN)
NAN_BOXED(0x402b2580,32,FLEN)
NAN_BOXED(0x7f7ffffe,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000001,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000003,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000007,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80199999,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80249249,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80333333,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8036db6d,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x803bbbbb,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80444444,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x804ccccc,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x805b6db6,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80666666,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x806db6db,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffff8,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffc,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffe,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f000000,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f000001,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f000003,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f000007,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f00000f,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f00001f,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f00003f,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f00007f,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f0000ff,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f0001ff,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f0003ff,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f0007ff,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f000fff,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f001fff,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f003fff,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f007fff,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f00ffff,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f01ffff,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f03ffff,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f07ffff,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f0fffff,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f1fffff,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f3fffff,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f400000,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f600000,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f700000,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f780000,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7c0000,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7e0000,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7f0000,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7f8000,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7fc000,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7fe000,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7ff000,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7ff800,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7ffc00,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7ffe00,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7fff00,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7fff80,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7fffc0,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7fffe0,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7ffff0,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7ffff8,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7ffffc,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7ffffe,32,FLEN)
NAN_BOXED(0x7ec01e6f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7fffff,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc5000000,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc5000001,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc5000003,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc5000007,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc500000f,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc500001f,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc500003f,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc500007f,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc50000ff,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc50001ff,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc50003ff,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc50007ff,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc5000fff,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc5001fff,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc5003fff,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc5007fff,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc500ffff,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc501ffff,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc503ffff,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc507ffff,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc50fffff,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc51fffff,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc53fffff,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc5400000,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc5600000,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc5700000,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc5780000,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc57c0000,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc57e0000,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc57f0000,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc57f8000,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc57fc000,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc57fe000,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc57ff000,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc57ff800,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc57ffc00,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc57ffe00,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc57fff00,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc57fff80,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc57fffc0,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc57fffe0,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc57ffff0,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc57ffff8,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc57ffffc,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc57ffffe,32,FLEN)
NAN_BOXED(0x7ec0d067,32,FLEN)
NAN_BOXED(0x8054f919,32,FLEN)
NAN_BOXED(0xc57fffff,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80800001,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80800003,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80800007,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80999999,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80a49249,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80b33333,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80b6db6d,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80bbbbbb,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80c44444,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80cccccc,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80db6db6,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80e66666,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80edb6db,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fffff8,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fffffc,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fffffe,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f000000,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f000001,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f000003,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f000007,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f00000f,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f00001f,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f00003f,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f00007f,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f0000ff,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f0001ff,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f0003ff,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f0007ff,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f000fff,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f001fff,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f003fff,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f007fff,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f00ffff,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f01ffff,32,FLEN)
NAN_BOXED(0x7ec1cf2f,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f03ffff,32,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;


signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_2:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_3:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_4:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_5:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_6:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine

tsig_begin_canary:
CANARY;
tsig_begin_canary:
CANARY;
mtrap_sigptr:
    .fill 64*(XLEN/32),4,0xdeadbeef
tsig_end_canary:
CANARY;
tsig_end_canary:
CANARY;

#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif

sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
