
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.7.1
// timestamp : Fri Jun 17 14:18:08 2022 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /scratch/pawan/work/normalised/RV32F/fnmsub.s.cgf \
 \
//                  -- xlen 32  \
//                  --randomize \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fnmsub.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fnmsub_b15 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fnmsub_b15)
RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15)
RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_36096:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x88000ff; valaddr_reg:x3; val_offset:108288*0 + 3*-1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108288*0 + 3*0*FLEN/8, x4, x1, x2)

inst_36097:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x88001ff; valaddr_reg:x3; val_offset:108291*0 + 3*0*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108291*0 + 3*1*FLEN/8, x4, x1, x2)

inst_36098:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x88003ff; valaddr_reg:x3; val_offset:108294*0 + 3*1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108294*0 + 3*2*FLEN/8, x4, x1, x2)

inst_36099:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x88007ff; valaddr_reg:x3; val_offset:108297*0 + 3*2*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108297*0 + 3*3*FLEN/8, x4, x1, x2)

inst_36100:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x8800fff; valaddr_reg:x3; val_offset:108300*0 + 3*3*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108300*0 + 3*4*FLEN/8, x4, x1, x2)

inst_36101:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x8801fff; valaddr_reg:x3; val_offset:108303*0 + 3*4*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108303*0 + 3*5*FLEN/8, x4, x1, x2)

inst_36102:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x8803fff; valaddr_reg:x3; val_offset:108306*0 + 3*5*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108306*0 + 3*6*FLEN/8, x4, x1, x2)

inst_36103:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x8807fff; valaddr_reg:x3; val_offset:108309*0 + 3*6*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108309*0 + 3*7*FLEN/8, x4, x1, x2)

inst_36104:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x880ffff; valaddr_reg:x3; val_offset:108312*0 + 3*7*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108312*0 + 3*8*FLEN/8, x4, x1, x2)

inst_36105:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x881ffff; valaddr_reg:x3; val_offset:108315*0 + 3*8*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108315*0 + 3*9*FLEN/8, x4, x1, x2)

inst_36106:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x883ffff; valaddr_reg:x3; val_offset:108318*0 + 3*9*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108318*0 + 3*10*FLEN/8, x4, x1, x2)

inst_36107:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x887ffff; valaddr_reg:x3; val_offset:108321*0 + 3*10*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108321*0 + 3*11*FLEN/8, x4, x1, x2)

inst_36108:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x88fffff; valaddr_reg:x3; val_offset:108324*0 + 3*11*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108324*0 + 3*12*FLEN/8, x4, x1, x2)

inst_36109:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x89fffff; valaddr_reg:x3; val_offset:108327*0 + 3*12*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108327*0 + 3*13*FLEN/8, x4, x1, x2)

inst_36110:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x8bfffff; valaddr_reg:x3; val_offset:108330*0 + 3*13*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108330*0 + 3*14*FLEN/8, x4, x1, x2)

inst_36111:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x8c00000; valaddr_reg:x3; val_offset:108333*0 + 3*14*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108333*0 + 3*15*FLEN/8, x4, x1, x2)

inst_36112:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x8e00000; valaddr_reg:x3; val_offset:108336*0 + 3*15*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108336*0 + 3*16*FLEN/8, x4, x1, x2)

inst_36113:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x8f00000; valaddr_reg:x3; val_offset:108339*0 + 3*16*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108339*0 + 3*17*FLEN/8, x4, x1, x2)

inst_36114:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x8f80000; valaddr_reg:x3; val_offset:108342*0 + 3*17*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108342*0 + 3*18*FLEN/8, x4, x1, x2)

inst_36115:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x8fc0000; valaddr_reg:x3; val_offset:108345*0 + 3*18*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108345*0 + 3*19*FLEN/8, x4, x1, x2)

inst_36116:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x8fe0000; valaddr_reg:x3; val_offset:108348*0 + 3*19*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108348*0 + 3*20*FLEN/8, x4, x1, x2)

inst_36117:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x8ff0000; valaddr_reg:x3; val_offset:108351*0 + 3*20*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108351*0 + 3*21*FLEN/8, x4, x1, x2)

inst_36118:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x8ff8000; valaddr_reg:x3; val_offset:108354*0 + 3*21*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108354*0 + 3*22*FLEN/8, x4, x1, x2)

inst_36119:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x8ffc000; valaddr_reg:x3; val_offset:108357*0 + 3*22*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108357*0 + 3*23*FLEN/8, x4, x1, x2)

inst_36120:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x8ffe000; valaddr_reg:x3; val_offset:108360*0 + 3*23*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108360*0 + 3*24*FLEN/8, x4, x1, x2)

inst_36121:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x8fff000; valaddr_reg:x3; val_offset:108363*0 + 3*24*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108363*0 + 3*25*FLEN/8, x4, x1, x2)

inst_36122:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x8fff800; valaddr_reg:x3; val_offset:108366*0 + 3*25*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108366*0 + 3*26*FLEN/8, x4, x1, x2)

inst_36123:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x8fffc00; valaddr_reg:x3; val_offset:108369*0 + 3*26*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108369*0 + 3*27*FLEN/8, x4, x1, x2)

inst_36124:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x8fffe00; valaddr_reg:x3; val_offset:108372*0 + 3*27*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108372*0 + 3*28*FLEN/8, x4, x1, x2)

inst_36125:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x8ffff00; valaddr_reg:x3; val_offset:108375*0 + 3*28*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108375*0 + 3*29*FLEN/8, x4, x1, x2)

inst_36126:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x8ffff80; valaddr_reg:x3; val_offset:108378*0 + 3*29*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108378*0 + 3*30*FLEN/8, x4, x1, x2)

inst_36127:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x8ffffc0; valaddr_reg:x3; val_offset:108381*0 + 3*30*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108381*0 + 3*31*FLEN/8, x4, x1, x2)

inst_36128:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x8ffffe0; valaddr_reg:x3; val_offset:108384*0 + 3*31*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108384*0 + 3*32*FLEN/8, x4, x1, x2)

inst_36129:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x8fffff0; valaddr_reg:x3; val_offset:108387*0 + 3*32*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108387*0 + 3*33*FLEN/8, x4, x1, x2)

inst_36130:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x8fffff8; valaddr_reg:x3; val_offset:108390*0 + 3*33*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108390*0 + 3*34*FLEN/8, x4, x1, x2)

inst_36131:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x8fffffc; valaddr_reg:x3; val_offset:108393*0 + 3*34*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108393*0 + 3*35*FLEN/8, x4, x1, x2)

inst_36132:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x8fffffe; valaddr_reg:x3; val_offset:108396*0 + 3*35*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108396*0 + 3*36*FLEN/8, x4, x1, x2)

inst_36133:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x344cc5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f344cc5; op2val:0x0;
op3val:0x8ffffff; valaddr_reg:x3; val_offset:108399*0 + 3*36*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108399*0 + 3*37*FLEN/8, x4, x1, x2)

inst_36134:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e000000; valaddr_reg:x3; val_offset:108402*0 + 3*37*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108402*0 + 3*38*FLEN/8, x4, x1, x2)

inst_36135:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e000001; valaddr_reg:x3; val_offset:108405*0 + 3*38*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108405*0 + 3*39*FLEN/8, x4, x1, x2)

inst_36136:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e000003; valaddr_reg:x3; val_offset:108408*0 + 3*39*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108408*0 + 3*40*FLEN/8, x4, x1, x2)

inst_36137:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e000007; valaddr_reg:x3; val_offset:108411*0 + 3*40*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108411*0 + 3*41*FLEN/8, x4, x1, x2)

inst_36138:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e00000f; valaddr_reg:x3; val_offset:108414*0 + 3*41*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108414*0 + 3*42*FLEN/8, x4, x1, x2)

inst_36139:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e00001f; valaddr_reg:x3; val_offset:108417*0 + 3*42*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108417*0 + 3*43*FLEN/8, x4, x1, x2)

inst_36140:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e00003f; valaddr_reg:x3; val_offset:108420*0 + 3*43*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108420*0 + 3*44*FLEN/8, x4, x1, x2)

inst_36141:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e00007f; valaddr_reg:x3; val_offset:108423*0 + 3*44*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108423*0 + 3*45*FLEN/8, x4, x1, x2)

inst_36142:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e0000ff; valaddr_reg:x3; val_offset:108426*0 + 3*45*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108426*0 + 3*46*FLEN/8, x4, x1, x2)

inst_36143:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e0001ff; valaddr_reg:x3; val_offset:108429*0 + 3*46*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108429*0 + 3*47*FLEN/8, x4, x1, x2)

inst_36144:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e0003ff; valaddr_reg:x3; val_offset:108432*0 + 3*47*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108432*0 + 3*48*FLEN/8, x4, x1, x2)

inst_36145:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e0007ff; valaddr_reg:x3; val_offset:108435*0 + 3*48*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108435*0 + 3*49*FLEN/8, x4, x1, x2)

inst_36146:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e000fff; valaddr_reg:x3; val_offset:108438*0 + 3*49*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108438*0 + 3*50*FLEN/8, x4, x1, x2)

inst_36147:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e001fff; valaddr_reg:x3; val_offset:108441*0 + 3*50*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108441*0 + 3*51*FLEN/8, x4, x1, x2)

inst_36148:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e003fff; valaddr_reg:x3; val_offset:108444*0 + 3*51*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108444*0 + 3*52*FLEN/8, x4, x1, x2)

inst_36149:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e007fff; valaddr_reg:x3; val_offset:108447*0 + 3*52*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108447*0 + 3*53*FLEN/8, x4, x1, x2)

inst_36150:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e00ffff; valaddr_reg:x3; val_offset:108450*0 + 3*53*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108450*0 + 3*54*FLEN/8, x4, x1, x2)

inst_36151:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e01ffff; valaddr_reg:x3; val_offset:108453*0 + 3*54*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108453*0 + 3*55*FLEN/8, x4, x1, x2)

inst_36152:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e03ffff; valaddr_reg:x3; val_offset:108456*0 + 3*55*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108456*0 + 3*56*FLEN/8, x4, x1, x2)

inst_36153:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e07ffff; valaddr_reg:x3; val_offset:108459*0 + 3*56*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108459*0 + 3*57*FLEN/8, x4, x1, x2)

inst_36154:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e0fffff; valaddr_reg:x3; val_offset:108462*0 + 3*57*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108462*0 + 3*58*FLEN/8, x4, x1, x2)

inst_36155:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e1fffff; valaddr_reg:x3; val_offset:108465*0 + 3*58*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108465*0 + 3*59*FLEN/8, x4, x1, x2)

inst_36156:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e3fffff; valaddr_reg:x3; val_offset:108468*0 + 3*59*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108468*0 + 3*60*FLEN/8, x4, x1, x2)

inst_36157:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e400000; valaddr_reg:x3; val_offset:108471*0 + 3*60*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108471*0 + 3*61*FLEN/8, x4, x1, x2)

inst_36158:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e600000; valaddr_reg:x3; val_offset:108474*0 + 3*61*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108474*0 + 3*62*FLEN/8, x4, x1, x2)

inst_36159:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e700000; valaddr_reg:x3; val_offset:108477*0 + 3*62*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108477*0 + 3*63*FLEN/8, x4, x1, x2)

inst_36160:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e780000; valaddr_reg:x3; val_offset:108480*0 + 3*63*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108480*0 + 3*64*FLEN/8, x4, x1, x2)

inst_36161:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e7c0000; valaddr_reg:x3; val_offset:108483*0 + 3*64*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108483*0 + 3*65*FLEN/8, x4, x1, x2)

inst_36162:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e7e0000; valaddr_reg:x3; val_offset:108486*0 + 3*65*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108486*0 + 3*66*FLEN/8, x4, x1, x2)

inst_36163:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e7f0000; valaddr_reg:x3; val_offset:108489*0 + 3*66*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108489*0 + 3*67*FLEN/8, x4, x1, x2)

inst_36164:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e7f8000; valaddr_reg:x3; val_offset:108492*0 + 3*67*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108492*0 + 3*68*FLEN/8, x4, x1, x2)

inst_36165:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e7fc000; valaddr_reg:x3; val_offset:108495*0 + 3*68*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108495*0 + 3*69*FLEN/8, x4, x1, x2)

inst_36166:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e7fe000; valaddr_reg:x3; val_offset:108498*0 + 3*69*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108498*0 + 3*70*FLEN/8, x4, x1, x2)

inst_36167:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e7ff000; valaddr_reg:x3; val_offset:108501*0 + 3*70*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108501*0 + 3*71*FLEN/8, x4, x1, x2)

inst_36168:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e7ff800; valaddr_reg:x3; val_offset:108504*0 + 3*71*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108504*0 + 3*72*FLEN/8, x4, x1, x2)

inst_36169:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e7ffc00; valaddr_reg:x3; val_offset:108507*0 + 3*72*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108507*0 + 3*73*FLEN/8, x4, x1, x2)

inst_36170:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e7ffe00; valaddr_reg:x3; val_offset:108510*0 + 3*73*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108510*0 + 3*74*FLEN/8, x4, x1, x2)

inst_36171:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e7fff00; valaddr_reg:x3; val_offset:108513*0 + 3*74*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108513*0 + 3*75*FLEN/8, x4, x1, x2)

inst_36172:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e7fff80; valaddr_reg:x3; val_offset:108516*0 + 3*75*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108516*0 + 3*76*FLEN/8, x4, x1, x2)

inst_36173:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e7fffc0; valaddr_reg:x3; val_offset:108519*0 + 3*76*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108519*0 + 3*77*FLEN/8, x4, x1, x2)

inst_36174:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e7fffe0; valaddr_reg:x3; val_offset:108522*0 + 3*77*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108522*0 + 3*78*FLEN/8, x4, x1, x2)

inst_36175:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e7ffff0; valaddr_reg:x3; val_offset:108525*0 + 3*78*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108525*0 + 3*79*FLEN/8, x4, x1, x2)

inst_36176:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e7ffff8; valaddr_reg:x3; val_offset:108528*0 + 3*79*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108528*0 + 3*80*FLEN/8, x4, x1, x2)

inst_36177:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e7ffffc; valaddr_reg:x3; val_offset:108531*0 + 3*80*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108531*0 + 3*81*FLEN/8, x4, x1, x2)

inst_36178:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e7ffffe; valaddr_reg:x3; val_offset:108534*0 + 3*81*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108534*0 + 3*82*FLEN/8, x4, x1, x2)

inst_36179:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x2e7fffff; valaddr_reg:x3; val_offset:108537*0 + 3*82*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108537*0 + 3*83*FLEN/8, x4, x1, x2)

inst_36180:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x3f800001; valaddr_reg:x3; val_offset:108540*0 + 3*83*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108540*0 + 3*84*FLEN/8, x4, x1, x2)

inst_36181:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x3f800003; valaddr_reg:x3; val_offset:108543*0 + 3*84*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108543*0 + 3*85*FLEN/8, x4, x1, x2)

inst_36182:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x3f800007; valaddr_reg:x3; val_offset:108546*0 + 3*85*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108546*0 + 3*86*FLEN/8, x4, x1, x2)

inst_36183:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x3f999999; valaddr_reg:x3; val_offset:108549*0 + 3*86*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108549*0 + 3*87*FLEN/8, x4, x1, x2)

inst_36184:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x3fa49249; valaddr_reg:x3; val_offset:108552*0 + 3*87*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108552*0 + 3*88*FLEN/8, x4, x1, x2)

inst_36185:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x3fb33333; valaddr_reg:x3; val_offset:108555*0 + 3*88*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108555*0 + 3*89*FLEN/8, x4, x1, x2)

inst_36186:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:108558*0 + 3*89*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108558*0 + 3*90*FLEN/8, x4, x1, x2)

inst_36187:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:108561*0 + 3*90*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108561*0 + 3*91*FLEN/8, x4, x1, x2)

inst_36188:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x3fc44444; valaddr_reg:x3; val_offset:108564*0 + 3*91*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108564*0 + 3*92*FLEN/8, x4, x1, x2)

inst_36189:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x3fcccccc; valaddr_reg:x3; val_offset:108567*0 + 3*92*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108567*0 + 3*93*FLEN/8, x4, x1, x2)

inst_36190:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:108570*0 + 3*93*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108570*0 + 3*94*FLEN/8, x4, x1, x2)

inst_36191:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x3fe66666; valaddr_reg:x3; val_offset:108573*0 + 3*94*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108573*0 + 3*95*FLEN/8, x4, x1, x2)

inst_36192:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x3fedb6db; valaddr_reg:x3; val_offset:108576*0 + 3*95*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108576*0 + 3*96*FLEN/8, x4, x1, x2)

inst_36193:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x3ffffff8; valaddr_reg:x3; val_offset:108579*0 + 3*96*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108579*0 + 3*97*FLEN/8, x4, x1, x2)

inst_36194:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x3ffffffc; valaddr_reg:x3; val_offset:108582*0 + 3*97*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108582*0 + 3*98*FLEN/8, x4, x1, x2)

inst_36195:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34996a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d5c2f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f34996a; op2val:0x2d5c2f;
op3val:0x3ffffffe; valaddr_reg:x3; val_offset:108585*0 + 3*98*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108585*0 + 3*99*FLEN/8, x4, x1, x2)

inst_36196:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa4000000; valaddr_reg:x3; val_offset:108588*0 + 3*99*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108588*0 + 3*100*FLEN/8, x4, x1, x2)

inst_36197:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa4000001; valaddr_reg:x3; val_offset:108591*0 + 3*100*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108591*0 + 3*101*FLEN/8, x4, x1, x2)

inst_36198:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa4000003; valaddr_reg:x3; val_offset:108594*0 + 3*101*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108594*0 + 3*102*FLEN/8, x4, x1, x2)

inst_36199:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa4000007; valaddr_reg:x3; val_offset:108597*0 + 3*102*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108597*0 + 3*103*FLEN/8, x4, x1, x2)

inst_36200:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa400000f; valaddr_reg:x3; val_offset:108600*0 + 3*103*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108600*0 + 3*104*FLEN/8, x4, x1, x2)

inst_36201:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa400001f; valaddr_reg:x3; val_offset:108603*0 + 3*104*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108603*0 + 3*105*FLEN/8, x4, x1, x2)

inst_36202:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa400003f; valaddr_reg:x3; val_offset:108606*0 + 3*105*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108606*0 + 3*106*FLEN/8, x4, x1, x2)

inst_36203:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa400007f; valaddr_reg:x3; val_offset:108609*0 + 3*106*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108609*0 + 3*107*FLEN/8, x4, x1, x2)

inst_36204:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa40000ff; valaddr_reg:x3; val_offset:108612*0 + 3*107*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108612*0 + 3*108*FLEN/8, x4, x1, x2)

inst_36205:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa40001ff; valaddr_reg:x3; val_offset:108615*0 + 3*108*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108615*0 + 3*109*FLEN/8, x4, x1, x2)

inst_36206:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa40003ff; valaddr_reg:x3; val_offset:108618*0 + 3*109*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108618*0 + 3*110*FLEN/8, x4, x1, x2)

inst_36207:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa40007ff; valaddr_reg:x3; val_offset:108621*0 + 3*110*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108621*0 + 3*111*FLEN/8, x4, x1, x2)

inst_36208:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa4000fff; valaddr_reg:x3; val_offset:108624*0 + 3*111*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108624*0 + 3*112*FLEN/8, x4, x1, x2)

inst_36209:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa4001fff; valaddr_reg:x3; val_offset:108627*0 + 3*112*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108627*0 + 3*113*FLEN/8, x4, x1, x2)

inst_36210:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa4003fff; valaddr_reg:x3; val_offset:108630*0 + 3*113*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108630*0 + 3*114*FLEN/8, x4, x1, x2)

inst_36211:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa4007fff; valaddr_reg:x3; val_offset:108633*0 + 3*114*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108633*0 + 3*115*FLEN/8, x4, x1, x2)

inst_36212:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa400ffff; valaddr_reg:x3; val_offset:108636*0 + 3*115*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108636*0 + 3*116*FLEN/8, x4, x1, x2)

inst_36213:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa401ffff; valaddr_reg:x3; val_offset:108639*0 + 3*116*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108639*0 + 3*117*FLEN/8, x4, x1, x2)

inst_36214:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa403ffff; valaddr_reg:x3; val_offset:108642*0 + 3*117*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108642*0 + 3*118*FLEN/8, x4, x1, x2)

inst_36215:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa407ffff; valaddr_reg:x3; val_offset:108645*0 + 3*118*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108645*0 + 3*119*FLEN/8, x4, x1, x2)

inst_36216:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa40fffff; valaddr_reg:x3; val_offset:108648*0 + 3*119*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108648*0 + 3*120*FLEN/8, x4, x1, x2)

inst_36217:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa41fffff; valaddr_reg:x3; val_offset:108651*0 + 3*120*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108651*0 + 3*121*FLEN/8, x4, x1, x2)

inst_36218:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa43fffff; valaddr_reg:x3; val_offset:108654*0 + 3*121*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108654*0 + 3*122*FLEN/8, x4, x1, x2)

inst_36219:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa4400000; valaddr_reg:x3; val_offset:108657*0 + 3*122*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108657*0 + 3*123*FLEN/8, x4, x1, x2)

inst_36220:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa4600000; valaddr_reg:x3; val_offset:108660*0 + 3*123*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108660*0 + 3*124*FLEN/8, x4, x1, x2)

inst_36221:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa4700000; valaddr_reg:x3; val_offset:108663*0 + 3*124*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108663*0 + 3*125*FLEN/8, x4, x1, x2)

inst_36222:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa4780000; valaddr_reg:x3; val_offset:108666*0 + 3*125*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108666*0 + 3*126*FLEN/8, x4, x1, x2)

inst_36223:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa47c0000; valaddr_reg:x3; val_offset:108669*0 + 3*126*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108669*0 + 3*127*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_2)

inst_36224:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa47e0000; valaddr_reg:x3; val_offset:108672*0 + 3*127*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108672*0 + 3*128*FLEN/8, x4, x1, x2)

inst_36225:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa47f0000; valaddr_reg:x3; val_offset:108675*0 + 3*128*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108675*0 + 3*129*FLEN/8, x4, x1, x2)

inst_36226:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa47f8000; valaddr_reg:x3; val_offset:108678*0 + 3*129*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108678*0 + 3*130*FLEN/8, x4, x1, x2)

inst_36227:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa47fc000; valaddr_reg:x3; val_offset:108681*0 + 3*130*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108681*0 + 3*131*FLEN/8, x4, x1, x2)

inst_36228:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa47fe000; valaddr_reg:x3; val_offset:108684*0 + 3*131*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108684*0 + 3*132*FLEN/8, x4, x1, x2)

inst_36229:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa47ff000; valaddr_reg:x3; val_offset:108687*0 + 3*132*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108687*0 + 3*133*FLEN/8, x4, x1, x2)

inst_36230:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa47ff800; valaddr_reg:x3; val_offset:108690*0 + 3*133*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108690*0 + 3*134*FLEN/8, x4, x1, x2)

inst_36231:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa47ffc00; valaddr_reg:x3; val_offset:108693*0 + 3*134*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108693*0 + 3*135*FLEN/8, x4, x1, x2)

inst_36232:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa47ffe00; valaddr_reg:x3; val_offset:108696*0 + 3*135*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108696*0 + 3*136*FLEN/8, x4, x1, x2)

inst_36233:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa47fff00; valaddr_reg:x3; val_offset:108699*0 + 3*136*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108699*0 + 3*137*FLEN/8, x4, x1, x2)

inst_36234:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa47fff80; valaddr_reg:x3; val_offset:108702*0 + 3*137*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108702*0 + 3*138*FLEN/8, x4, x1, x2)

inst_36235:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa47fffc0; valaddr_reg:x3; val_offset:108705*0 + 3*138*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108705*0 + 3*139*FLEN/8, x4, x1, x2)

inst_36236:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa47fffe0; valaddr_reg:x3; val_offset:108708*0 + 3*139*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108708*0 + 3*140*FLEN/8, x4, x1, x2)

inst_36237:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa47ffff0; valaddr_reg:x3; val_offset:108711*0 + 3*140*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108711*0 + 3*141*FLEN/8, x4, x1, x2)

inst_36238:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa47ffff8; valaddr_reg:x3; val_offset:108714*0 + 3*141*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108714*0 + 3*142*FLEN/8, x4, x1, x2)

inst_36239:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa47ffffc; valaddr_reg:x3; val_offset:108717*0 + 3*142*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108717*0 + 3*143*FLEN/8, x4, x1, x2)

inst_36240:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa47ffffe; valaddr_reg:x3; val_offset:108720*0 + 3*143*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108720*0 + 3*144*FLEN/8, x4, x1, x2)

inst_36241:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xa47fffff; valaddr_reg:x3; val_offset:108723*0 + 3*144*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108723*0 + 3*145*FLEN/8, x4, x1, x2)

inst_36242:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xbf800001; valaddr_reg:x3; val_offset:108726*0 + 3*145*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108726*0 + 3*146*FLEN/8, x4, x1, x2)

inst_36243:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xbf800003; valaddr_reg:x3; val_offset:108729*0 + 3*146*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108729*0 + 3*147*FLEN/8, x4, x1, x2)

inst_36244:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xbf800007; valaddr_reg:x3; val_offset:108732*0 + 3*147*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108732*0 + 3*148*FLEN/8, x4, x1, x2)

inst_36245:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xbf999999; valaddr_reg:x3; val_offset:108735*0 + 3*148*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108735*0 + 3*149*FLEN/8, x4, x1, x2)

inst_36246:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:108738*0 + 3*149*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108738*0 + 3*150*FLEN/8, x4, x1, x2)

inst_36247:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:108741*0 + 3*150*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108741*0 + 3*151*FLEN/8, x4, x1, x2)

inst_36248:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:108744*0 + 3*151*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108744*0 + 3*152*FLEN/8, x4, x1, x2)

inst_36249:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:108747*0 + 3*152*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108747*0 + 3*153*FLEN/8, x4, x1, x2)

inst_36250:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:108750*0 + 3*153*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108750*0 + 3*154*FLEN/8, x4, x1, x2)

inst_36251:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:108753*0 + 3*154*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108753*0 + 3*155*FLEN/8, x4, x1, x2)

inst_36252:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:108756*0 + 3*155*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108756*0 + 3*156*FLEN/8, x4, x1, x2)

inst_36253:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:108759*0 + 3*156*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108759*0 + 3*157*FLEN/8, x4, x1, x2)

inst_36254:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:108762*0 + 3*157*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108762*0 + 3*158*FLEN/8, x4, x1, x2)

inst_36255:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:108765*0 + 3*158*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108765*0 + 3*159*FLEN/8, x4, x1, x2)

inst_36256:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:108768*0 + 3*159*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108768*0 + 3*160*FLEN/8, x4, x1, x2)

inst_36257:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x351b7f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2d3b9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f351b7f; op2val:0x802d3b9a;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:108771*0 + 3*160*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108771*0 + 3*161*FLEN/8, x4, x1, x2)

inst_36258:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0x800001; valaddr_reg:x3; val_offset:108774*0 + 3*161*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108774*0 + 3*162*FLEN/8, x4, x1, x2)

inst_36259:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0x800003; valaddr_reg:x3; val_offset:108777*0 + 3*162*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108777*0 + 3*163*FLEN/8, x4, x1, x2)

inst_36260:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0x800007; valaddr_reg:x3; val_offset:108780*0 + 3*163*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108780*0 + 3*164*FLEN/8, x4, x1, x2)

inst_36261:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0x999999; valaddr_reg:x3; val_offset:108783*0 + 3*164*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108783*0 + 3*165*FLEN/8, x4, x1, x2)

inst_36262:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xa49249; valaddr_reg:x3; val_offset:108786*0 + 3*165*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108786*0 + 3*166*FLEN/8, x4, x1, x2)

inst_36263:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xb33333; valaddr_reg:x3; val_offset:108789*0 + 3*166*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108789*0 + 3*167*FLEN/8, x4, x1, x2)

inst_36264:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xb6db6d; valaddr_reg:x3; val_offset:108792*0 + 3*167*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108792*0 + 3*168*FLEN/8, x4, x1, x2)

inst_36265:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xbbbbbb; valaddr_reg:x3; val_offset:108795*0 + 3*168*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108795*0 + 3*169*FLEN/8, x4, x1, x2)

inst_36266:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xc44444; valaddr_reg:x3; val_offset:108798*0 + 3*169*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108798*0 + 3*170*FLEN/8, x4, x1, x2)

inst_36267:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xcccccc; valaddr_reg:x3; val_offset:108801*0 + 3*170*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108801*0 + 3*171*FLEN/8, x4, x1, x2)

inst_36268:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xdb6db6; valaddr_reg:x3; val_offset:108804*0 + 3*171*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108804*0 + 3*172*FLEN/8, x4, x1, x2)

inst_36269:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xe66666; valaddr_reg:x3; val_offset:108807*0 + 3*172*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108807*0 + 3*173*FLEN/8, x4, x1, x2)

inst_36270:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xedb6db; valaddr_reg:x3; val_offset:108810*0 + 3*173*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108810*0 + 3*174*FLEN/8, x4, x1, x2)

inst_36271:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xfffff8; valaddr_reg:x3; val_offset:108813*0 + 3*174*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108813*0 + 3*175*FLEN/8, x4, x1, x2)

inst_36272:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xfffffc; valaddr_reg:x3; val_offset:108816*0 + 3*175*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108816*0 + 3*176*FLEN/8, x4, x1, x2)

inst_36273:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xfffffe; valaddr_reg:x3; val_offset:108819*0 + 3*176*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108819*0 + 3*177*FLEN/8, x4, x1, x2)

inst_36274:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xd800000; valaddr_reg:x3; val_offset:108822*0 + 3*177*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108822*0 + 3*178*FLEN/8, x4, x1, x2)

inst_36275:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xd800001; valaddr_reg:x3; val_offset:108825*0 + 3*178*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108825*0 + 3*179*FLEN/8, x4, x1, x2)

inst_36276:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xd800003; valaddr_reg:x3; val_offset:108828*0 + 3*179*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108828*0 + 3*180*FLEN/8, x4, x1, x2)

inst_36277:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xd800007; valaddr_reg:x3; val_offset:108831*0 + 3*180*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108831*0 + 3*181*FLEN/8, x4, x1, x2)

inst_36278:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xd80000f; valaddr_reg:x3; val_offset:108834*0 + 3*181*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108834*0 + 3*182*FLEN/8, x4, x1, x2)

inst_36279:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xd80001f; valaddr_reg:x3; val_offset:108837*0 + 3*182*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108837*0 + 3*183*FLEN/8, x4, x1, x2)

inst_36280:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xd80003f; valaddr_reg:x3; val_offset:108840*0 + 3*183*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108840*0 + 3*184*FLEN/8, x4, x1, x2)

inst_36281:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xd80007f; valaddr_reg:x3; val_offset:108843*0 + 3*184*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108843*0 + 3*185*FLEN/8, x4, x1, x2)

inst_36282:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xd8000ff; valaddr_reg:x3; val_offset:108846*0 + 3*185*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108846*0 + 3*186*FLEN/8, x4, x1, x2)

inst_36283:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xd8001ff; valaddr_reg:x3; val_offset:108849*0 + 3*186*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108849*0 + 3*187*FLEN/8, x4, x1, x2)

inst_36284:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xd8003ff; valaddr_reg:x3; val_offset:108852*0 + 3*187*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108852*0 + 3*188*FLEN/8, x4, x1, x2)

inst_36285:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xd8007ff; valaddr_reg:x3; val_offset:108855*0 + 3*188*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108855*0 + 3*189*FLEN/8, x4, x1, x2)

inst_36286:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xd800fff; valaddr_reg:x3; val_offset:108858*0 + 3*189*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108858*0 + 3*190*FLEN/8, x4, x1, x2)

inst_36287:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xd801fff; valaddr_reg:x3; val_offset:108861*0 + 3*190*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108861*0 + 3*191*FLEN/8, x4, x1, x2)

inst_36288:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xd803fff; valaddr_reg:x3; val_offset:108864*0 + 3*191*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108864*0 + 3*192*FLEN/8, x4, x1, x2)

inst_36289:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xd807fff; valaddr_reg:x3; val_offset:108867*0 + 3*192*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108867*0 + 3*193*FLEN/8, x4, x1, x2)

inst_36290:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xd80ffff; valaddr_reg:x3; val_offset:108870*0 + 3*193*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108870*0 + 3*194*FLEN/8, x4, x1, x2)

inst_36291:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xd81ffff; valaddr_reg:x3; val_offset:108873*0 + 3*194*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108873*0 + 3*195*FLEN/8, x4, x1, x2)

inst_36292:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xd83ffff; valaddr_reg:x3; val_offset:108876*0 + 3*195*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108876*0 + 3*196*FLEN/8, x4, x1, x2)

inst_36293:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xd87ffff; valaddr_reg:x3; val_offset:108879*0 + 3*196*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108879*0 + 3*197*FLEN/8, x4, x1, x2)

inst_36294:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xd8fffff; valaddr_reg:x3; val_offset:108882*0 + 3*197*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108882*0 + 3*198*FLEN/8, x4, x1, x2)

inst_36295:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xd9fffff; valaddr_reg:x3; val_offset:108885*0 + 3*198*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108885*0 + 3*199*FLEN/8, x4, x1, x2)

inst_36296:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xdbfffff; valaddr_reg:x3; val_offset:108888*0 + 3*199*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108888*0 + 3*200*FLEN/8, x4, x1, x2)

inst_36297:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xdc00000; valaddr_reg:x3; val_offset:108891*0 + 3*200*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108891*0 + 3*201*FLEN/8, x4, x1, x2)

inst_36298:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xde00000; valaddr_reg:x3; val_offset:108894*0 + 3*201*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108894*0 + 3*202*FLEN/8, x4, x1, x2)

inst_36299:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xdf00000; valaddr_reg:x3; val_offset:108897*0 + 3*202*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108897*0 + 3*203*FLEN/8, x4, x1, x2)

inst_36300:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xdf80000; valaddr_reg:x3; val_offset:108900*0 + 3*203*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108900*0 + 3*204*FLEN/8, x4, x1, x2)

inst_36301:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xdfc0000; valaddr_reg:x3; val_offset:108903*0 + 3*204*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108903*0 + 3*205*FLEN/8, x4, x1, x2)

inst_36302:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xdfe0000; valaddr_reg:x3; val_offset:108906*0 + 3*205*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108906*0 + 3*206*FLEN/8, x4, x1, x2)

inst_36303:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xdff0000; valaddr_reg:x3; val_offset:108909*0 + 3*206*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108909*0 + 3*207*FLEN/8, x4, x1, x2)

inst_36304:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xdff8000; valaddr_reg:x3; val_offset:108912*0 + 3*207*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108912*0 + 3*208*FLEN/8, x4, x1, x2)

inst_36305:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xdffc000; valaddr_reg:x3; val_offset:108915*0 + 3*208*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108915*0 + 3*209*FLEN/8, x4, x1, x2)

inst_36306:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xdffe000; valaddr_reg:x3; val_offset:108918*0 + 3*209*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108918*0 + 3*210*FLEN/8, x4, x1, x2)

inst_36307:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xdfff000; valaddr_reg:x3; val_offset:108921*0 + 3*210*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108921*0 + 3*211*FLEN/8, x4, x1, x2)

inst_36308:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xdfff800; valaddr_reg:x3; val_offset:108924*0 + 3*211*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108924*0 + 3*212*FLEN/8, x4, x1, x2)

inst_36309:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xdfffc00; valaddr_reg:x3; val_offset:108927*0 + 3*212*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108927*0 + 3*213*FLEN/8, x4, x1, x2)

inst_36310:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xdfffe00; valaddr_reg:x3; val_offset:108930*0 + 3*213*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108930*0 + 3*214*FLEN/8, x4, x1, x2)

inst_36311:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xdffff00; valaddr_reg:x3; val_offset:108933*0 + 3*214*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108933*0 + 3*215*FLEN/8, x4, x1, x2)

inst_36312:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xdffff80; valaddr_reg:x3; val_offset:108936*0 + 3*215*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108936*0 + 3*216*FLEN/8, x4, x1, x2)

inst_36313:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xdffffc0; valaddr_reg:x3; val_offset:108939*0 + 3*216*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108939*0 + 3*217*FLEN/8, x4, x1, x2)

inst_36314:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xdffffe0; valaddr_reg:x3; val_offset:108942*0 + 3*217*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108942*0 + 3*218*FLEN/8, x4, x1, x2)

inst_36315:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xdfffff0; valaddr_reg:x3; val_offset:108945*0 + 3*218*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108945*0 + 3*219*FLEN/8, x4, x1, x2)

inst_36316:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xdfffff8; valaddr_reg:x3; val_offset:108948*0 + 3*219*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108948*0 + 3*220*FLEN/8, x4, x1, x2)

inst_36317:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xdfffffc; valaddr_reg:x3; val_offset:108951*0 + 3*220*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108951*0 + 3*221*FLEN/8, x4, x1, x2)

inst_36318:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xdfffffe; valaddr_reg:x3; val_offset:108954*0 + 3*221*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108954*0 + 3*222*FLEN/8, x4, x1, x2)

inst_36319:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x354a49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f354a49; op2val:0x0;
op3val:0xdffffff; valaddr_reg:x3; val_offset:108957*0 + 3*222*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108957*0 + 3*223*FLEN/8, x4, x1, x2)

inst_36320:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0x800001; valaddr_reg:x3; val_offset:108960*0 + 3*223*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108960*0 + 3*224*FLEN/8, x4, x1, x2)

inst_36321:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0x800003; valaddr_reg:x3; val_offset:108963*0 + 3*224*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108963*0 + 3*225*FLEN/8, x4, x1, x2)

inst_36322:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0x800007; valaddr_reg:x3; val_offset:108966*0 + 3*225*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108966*0 + 3*226*FLEN/8, x4, x1, x2)

inst_36323:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0x999999; valaddr_reg:x3; val_offset:108969*0 + 3*226*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108969*0 + 3*227*FLEN/8, x4, x1, x2)

inst_36324:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xa49249; valaddr_reg:x3; val_offset:108972*0 + 3*227*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108972*0 + 3*228*FLEN/8, x4, x1, x2)

inst_36325:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xb33333; valaddr_reg:x3; val_offset:108975*0 + 3*228*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108975*0 + 3*229*FLEN/8, x4, x1, x2)

inst_36326:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xb6db6d; valaddr_reg:x3; val_offset:108978*0 + 3*229*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108978*0 + 3*230*FLEN/8, x4, x1, x2)

inst_36327:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xbbbbbb; valaddr_reg:x3; val_offset:108981*0 + 3*230*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108981*0 + 3*231*FLEN/8, x4, x1, x2)

inst_36328:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xc44444; valaddr_reg:x3; val_offset:108984*0 + 3*231*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108984*0 + 3*232*FLEN/8, x4, x1, x2)

inst_36329:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xcccccc; valaddr_reg:x3; val_offset:108987*0 + 3*232*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108987*0 + 3*233*FLEN/8, x4, x1, x2)

inst_36330:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xdb6db6; valaddr_reg:x3; val_offset:108990*0 + 3*233*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108990*0 + 3*234*FLEN/8, x4, x1, x2)

inst_36331:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xe66666; valaddr_reg:x3; val_offset:108993*0 + 3*234*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108993*0 + 3*235*FLEN/8, x4, x1, x2)

inst_36332:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xedb6db; valaddr_reg:x3; val_offset:108996*0 + 3*235*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108996*0 + 3*236*FLEN/8, x4, x1, x2)

inst_36333:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xfffff8; valaddr_reg:x3; val_offset:108999*0 + 3*236*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108999*0 + 3*237*FLEN/8, x4, x1, x2)

inst_36334:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xfffffc; valaddr_reg:x3; val_offset:109002*0 + 3*237*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109002*0 + 3*238*FLEN/8, x4, x1, x2)

inst_36335:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xfffffe; valaddr_reg:x3; val_offset:109005*0 + 3*238*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109005*0 + 3*239*FLEN/8, x4, x1, x2)

inst_36336:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf000000; valaddr_reg:x3; val_offset:109008*0 + 3*239*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109008*0 + 3*240*FLEN/8, x4, x1, x2)

inst_36337:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf000001; valaddr_reg:x3; val_offset:109011*0 + 3*240*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109011*0 + 3*241*FLEN/8, x4, x1, x2)

inst_36338:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf000003; valaddr_reg:x3; val_offset:109014*0 + 3*241*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109014*0 + 3*242*FLEN/8, x4, x1, x2)

inst_36339:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf000007; valaddr_reg:x3; val_offset:109017*0 + 3*242*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109017*0 + 3*243*FLEN/8, x4, x1, x2)

inst_36340:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf00000f; valaddr_reg:x3; val_offset:109020*0 + 3*243*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109020*0 + 3*244*FLEN/8, x4, x1, x2)

inst_36341:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf00001f; valaddr_reg:x3; val_offset:109023*0 + 3*244*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109023*0 + 3*245*FLEN/8, x4, x1, x2)

inst_36342:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf00003f; valaddr_reg:x3; val_offset:109026*0 + 3*245*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109026*0 + 3*246*FLEN/8, x4, x1, x2)

inst_36343:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf00007f; valaddr_reg:x3; val_offset:109029*0 + 3*246*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109029*0 + 3*247*FLEN/8, x4, x1, x2)

inst_36344:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf0000ff; valaddr_reg:x3; val_offset:109032*0 + 3*247*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109032*0 + 3*248*FLEN/8, x4, x1, x2)

inst_36345:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf0001ff; valaddr_reg:x3; val_offset:109035*0 + 3*248*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109035*0 + 3*249*FLEN/8, x4, x1, x2)

inst_36346:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf0003ff; valaddr_reg:x3; val_offset:109038*0 + 3*249*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109038*0 + 3*250*FLEN/8, x4, x1, x2)

inst_36347:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf0007ff; valaddr_reg:x3; val_offset:109041*0 + 3*250*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109041*0 + 3*251*FLEN/8, x4, x1, x2)

inst_36348:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf000fff; valaddr_reg:x3; val_offset:109044*0 + 3*251*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109044*0 + 3*252*FLEN/8, x4, x1, x2)

inst_36349:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf001fff; valaddr_reg:x3; val_offset:109047*0 + 3*252*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109047*0 + 3*253*FLEN/8, x4, x1, x2)

inst_36350:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf003fff; valaddr_reg:x3; val_offset:109050*0 + 3*253*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109050*0 + 3*254*FLEN/8, x4, x1, x2)

inst_36351:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf007fff; valaddr_reg:x3; val_offset:109053*0 + 3*254*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109053*0 + 3*255*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_3)

inst_36352:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf00ffff; valaddr_reg:x3; val_offset:109056*0 + 3*256*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109056*0 + 3*256*FLEN/8, x4, x1, x2)

inst_36353:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf01ffff; valaddr_reg:x3; val_offset:109059*0 + 3*257*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109059*0 + 3*257*FLEN/8, x4, x1, x2)

inst_36354:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf03ffff; valaddr_reg:x3; val_offset:109062*0 + 3*258*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109062*0 + 3*258*FLEN/8, x4, x1, x2)

inst_36355:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf07ffff; valaddr_reg:x3; val_offset:109065*0 + 3*259*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109065*0 + 3*259*FLEN/8, x4, x1, x2)

inst_36356:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf0fffff; valaddr_reg:x3; val_offset:109068*0 + 3*260*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109068*0 + 3*260*FLEN/8, x4, x1, x2)

inst_36357:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf1fffff; valaddr_reg:x3; val_offset:109071*0 + 3*261*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109071*0 + 3*261*FLEN/8, x4, x1, x2)

inst_36358:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf3fffff; valaddr_reg:x3; val_offset:109074*0 + 3*262*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109074*0 + 3*262*FLEN/8, x4, x1, x2)

inst_36359:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf400000; valaddr_reg:x3; val_offset:109077*0 + 3*263*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109077*0 + 3*263*FLEN/8, x4, x1, x2)

inst_36360:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf600000; valaddr_reg:x3; val_offset:109080*0 + 3*264*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109080*0 + 3*264*FLEN/8, x4, x1, x2)

inst_36361:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf700000; valaddr_reg:x3; val_offset:109083*0 + 3*265*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109083*0 + 3*265*FLEN/8, x4, x1, x2)

inst_36362:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf780000; valaddr_reg:x3; val_offset:109086*0 + 3*266*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109086*0 + 3*266*FLEN/8, x4, x1, x2)

inst_36363:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf7c0000; valaddr_reg:x3; val_offset:109089*0 + 3*267*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109089*0 + 3*267*FLEN/8, x4, x1, x2)

inst_36364:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf7e0000; valaddr_reg:x3; val_offset:109092*0 + 3*268*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109092*0 + 3*268*FLEN/8, x4, x1, x2)

inst_36365:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf7f0000; valaddr_reg:x3; val_offset:109095*0 + 3*269*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109095*0 + 3*269*FLEN/8, x4, x1, x2)

inst_36366:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf7f8000; valaddr_reg:x3; val_offset:109098*0 + 3*270*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109098*0 + 3*270*FLEN/8, x4, x1, x2)

inst_36367:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf7fc000; valaddr_reg:x3; val_offset:109101*0 + 3*271*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109101*0 + 3*271*FLEN/8, x4, x1, x2)

inst_36368:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf7fe000; valaddr_reg:x3; val_offset:109104*0 + 3*272*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109104*0 + 3*272*FLEN/8, x4, x1, x2)

inst_36369:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf7ff000; valaddr_reg:x3; val_offset:109107*0 + 3*273*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109107*0 + 3*273*FLEN/8, x4, x1, x2)

inst_36370:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf7ff800; valaddr_reg:x3; val_offset:109110*0 + 3*274*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109110*0 + 3*274*FLEN/8, x4, x1, x2)

inst_36371:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf7ffc00; valaddr_reg:x3; val_offset:109113*0 + 3*275*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109113*0 + 3*275*FLEN/8, x4, x1, x2)

inst_36372:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf7ffe00; valaddr_reg:x3; val_offset:109116*0 + 3*276*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109116*0 + 3*276*FLEN/8, x4, x1, x2)

inst_36373:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf7fff00; valaddr_reg:x3; val_offset:109119*0 + 3*277*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109119*0 + 3*277*FLEN/8, x4, x1, x2)

inst_36374:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf7fff80; valaddr_reg:x3; val_offset:109122*0 + 3*278*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109122*0 + 3*278*FLEN/8, x4, x1, x2)

inst_36375:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf7fffc0; valaddr_reg:x3; val_offset:109125*0 + 3*279*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109125*0 + 3*279*FLEN/8, x4, x1, x2)

inst_36376:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf7fffe0; valaddr_reg:x3; val_offset:109128*0 + 3*280*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109128*0 + 3*280*FLEN/8, x4, x1, x2)

inst_36377:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf7ffff0; valaddr_reg:x3; val_offset:109131*0 + 3*281*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109131*0 + 3*281*FLEN/8, x4, x1, x2)

inst_36378:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf7ffff8; valaddr_reg:x3; val_offset:109134*0 + 3*282*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109134*0 + 3*282*FLEN/8, x4, x1, x2)

inst_36379:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf7ffffc; valaddr_reg:x3; val_offset:109137*0 + 3*283*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109137*0 + 3*283*FLEN/8, x4, x1, x2)

inst_36380:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf7ffffe; valaddr_reg:x3; val_offset:109140*0 + 3*284*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109140*0 + 3*284*FLEN/8, x4, x1, x2)

inst_36381:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x355590 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f355590; op2val:0x0;
op3val:0xf7fffff; valaddr_reg:x3; val_offset:109143*0 + 3*285*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109143*0 + 3*285*FLEN/8, x4, x1, x2)

inst_36382:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2a800000; valaddr_reg:x3; val_offset:109146*0 + 3*286*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109146*0 + 3*286*FLEN/8, x4, x1, x2)

inst_36383:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2a800001; valaddr_reg:x3; val_offset:109149*0 + 3*287*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109149*0 + 3*287*FLEN/8, x4, x1, x2)

inst_36384:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2a800003; valaddr_reg:x3; val_offset:109152*0 + 3*288*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109152*0 + 3*288*FLEN/8, x4, x1, x2)

inst_36385:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2a800007; valaddr_reg:x3; val_offset:109155*0 + 3*289*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109155*0 + 3*289*FLEN/8, x4, x1, x2)

inst_36386:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2a80000f; valaddr_reg:x3; val_offset:109158*0 + 3*290*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109158*0 + 3*290*FLEN/8, x4, x1, x2)

inst_36387:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2a80001f; valaddr_reg:x3; val_offset:109161*0 + 3*291*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109161*0 + 3*291*FLEN/8, x4, x1, x2)

inst_36388:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2a80003f; valaddr_reg:x3; val_offset:109164*0 + 3*292*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109164*0 + 3*292*FLEN/8, x4, x1, x2)

inst_36389:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2a80007f; valaddr_reg:x3; val_offset:109167*0 + 3*293*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109167*0 + 3*293*FLEN/8, x4, x1, x2)

inst_36390:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2a8000ff; valaddr_reg:x3; val_offset:109170*0 + 3*294*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109170*0 + 3*294*FLEN/8, x4, x1, x2)

inst_36391:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2a8001ff; valaddr_reg:x3; val_offset:109173*0 + 3*295*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109173*0 + 3*295*FLEN/8, x4, x1, x2)

inst_36392:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2a8003ff; valaddr_reg:x3; val_offset:109176*0 + 3*296*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109176*0 + 3*296*FLEN/8, x4, x1, x2)

inst_36393:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2a8007ff; valaddr_reg:x3; val_offset:109179*0 + 3*297*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109179*0 + 3*297*FLEN/8, x4, x1, x2)

inst_36394:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2a800fff; valaddr_reg:x3; val_offset:109182*0 + 3*298*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109182*0 + 3*298*FLEN/8, x4, x1, x2)

inst_36395:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2a801fff; valaddr_reg:x3; val_offset:109185*0 + 3*299*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109185*0 + 3*299*FLEN/8, x4, x1, x2)

inst_36396:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2a803fff; valaddr_reg:x3; val_offset:109188*0 + 3*300*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109188*0 + 3*300*FLEN/8, x4, x1, x2)

inst_36397:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2a807fff; valaddr_reg:x3; val_offset:109191*0 + 3*301*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109191*0 + 3*301*FLEN/8, x4, x1, x2)

inst_36398:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2a80ffff; valaddr_reg:x3; val_offset:109194*0 + 3*302*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109194*0 + 3*302*FLEN/8, x4, x1, x2)

inst_36399:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2a81ffff; valaddr_reg:x3; val_offset:109197*0 + 3*303*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109197*0 + 3*303*FLEN/8, x4, x1, x2)

inst_36400:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2a83ffff; valaddr_reg:x3; val_offset:109200*0 + 3*304*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109200*0 + 3*304*FLEN/8, x4, x1, x2)

inst_36401:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2a87ffff; valaddr_reg:x3; val_offset:109203*0 + 3*305*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109203*0 + 3*305*FLEN/8, x4, x1, x2)

inst_36402:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2a8fffff; valaddr_reg:x3; val_offset:109206*0 + 3*306*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109206*0 + 3*306*FLEN/8, x4, x1, x2)

inst_36403:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2a9fffff; valaddr_reg:x3; val_offset:109209*0 + 3*307*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109209*0 + 3*307*FLEN/8, x4, x1, x2)

inst_36404:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2abfffff; valaddr_reg:x3; val_offset:109212*0 + 3*308*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109212*0 + 3*308*FLEN/8, x4, x1, x2)

inst_36405:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2ac00000; valaddr_reg:x3; val_offset:109215*0 + 3*309*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109215*0 + 3*309*FLEN/8, x4, x1, x2)

inst_36406:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2ae00000; valaddr_reg:x3; val_offset:109218*0 + 3*310*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109218*0 + 3*310*FLEN/8, x4, x1, x2)

inst_36407:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2af00000; valaddr_reg:x3; val_offset:109221*0 + 3*311*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109221*0 + 3*311*FLEN/8, x4, x1, x2)

inst_36408:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2af80000; valaddr_reg:x3; val_offset:109224*0 + 3*312*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109224*0 + 3*312*FLEN/8, x4, x1, x2)

inst_36409:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2afc0000; valaddr_reg:x3; val_offset:109227*0 + 3*313*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109227*0 + 3*313*FLEN/8, x4, x1, x2)

inst_36410:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2afe0000; valaddr_reg:x3; val_offset:109230*0 + 3*314*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109230*0 + 3*314*FLEN/8, x4, x1, x2)

inst_36411:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2aff0000; valaddr_reg:x3; val_offset:109233*0 + 3*315*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109233*0 + 3*315*FLEN/8, x4, x1, x2)

inst_36412:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2aff8000; valaddr_reg:x3; val_offset:109236*0 + 3*316*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109236*0 + 3*316*FLEN/8, x4, x1, x2)

inst_36413:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2affc000; valaddr_reg:x3; val_offset:109239*0 + 3*317*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109239*0 + 3*317*FLEN/8, x4, x1, x2)

inst_36414:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2affe000; valaddr_reg:x3; val_offset:109242*0 + 3*318*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109242*0 + 3*318*FLEN/8, x4, x1, x2)

inst_36415:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2afff000; valaddr_reg:x3; val_offset:109245*0 + 3*319*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109245*0 + 3*319*FLEN/8, x4, x1, x2)

inst_36416:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2afff800; valaddr_reg:x3; val_offset:109248*0 + 3*320*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109248*0 + 3*320*FLEN/8, x4, x1, x2)

inst_36417:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2afffc00; valaddr_reg:x3; val_offset:109251*0 + 3*321*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109251*0 + 3*321*FLEN/8, x4, x1, x2)

inst_36418:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2afffe00; valaddr_reg:x3; val_offset:109254*0 + 3*322*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109254*0 + 3*322*FLEN/8, x4, x1, x2)

inst_36419:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2affff00; valaddr_reg:x3; val_offset:109257*0 + 3*323*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109257*0 + 3*323*FLEN/8, x4, x1, x2)

inst_36420:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2affff80; valaddr_reg:x3; val_offset:109260*0 + 3*324*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109260*0 + 3*324*FLEN/8, x4, x1, x2)

inst_36421:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2affffc0; valaddr_reg:x3; val_offset:109263*0 + 3*325*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109263*0 + 3*325*FLEN/8, x4, x1, x2)

inst_36422:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2affffe0; valaddr_reg:x3; val_offset:109266*0 + 3*326*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109266*0 + 3*326*FLEN/8, x4, x1, x2)

inst_36423:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2afffff0; valaddr_reg:x3; val_offset:109269*0 + 3*327*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109269*0 + 3*327*FLEN/8, x4, x1, x2)

inst_36424:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2afffff8; valaddr_reg:x3; val_offset:109272*0 + 3*328*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109272*0 + 3*328*FLEN/8, x4, x1, x2)

inst_36425:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2afffffc; valaddr_reg:x3; val_offset:109275*0 + 3*329*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109275*0 + 3*329*FLEN/8, x4, x1, x2)

inst_36426:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2afffffe; valaddr_reg:x3; val_offset:109278*0 + 3*330*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109278*0 + 3*330*FLEN/8, x4, x1, x2)

inst_36427:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x2affffff; valaddr_reg:x3; val_offset:109281*0 + 3*331*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109281*0 + 3*331*FLEN/8, x4, x1, x2)

inst_36428:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x7f000001; valaddr_reg:x3; val_offset:109284*0 + 3*332*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109284*0 + 3*332*FLEN/8, x4, x1, x2)

inst_36429:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x7f000003; valaddr_reg:x3; val_offset:109287*0 + 3*333*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109287*0 + 3*333*FLEN/8, x4, x1, x2)

inst_36430:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x7f000007; valaddr_reg:x3; val_offset:109290*0 + 3*334*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109290*0 + 3*334*FLEN/8, x4, x1, x2)

inst_36431:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x7f199999; valaddr_reg:x3; val_offset:109293*0 + 3*335*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109293*0 + 3*335*FLEN/8, x4, x1, x2)

inst_36432:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x7f249249; valaddr_reg:x3; val_offset:109296*0 + 3*336*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109296*0 + 3*336*FLEN/8, x4, x1, x2)

inst_36433:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x7f333333; valaddr_reg:x3; val_offset:109299*0 + 3*337*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109299*0 + 3*337*FLEN/8, x4, x1, x2)

inst_36434:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x7f36db6d; valaddr_reg:x3; val_offset:109302*0 + 3*338*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109302*0 + 3*338*FLEN/8, x4, x1, x2)

inst_36435:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:109305*0 + 3*339*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109305*0 + 3*339*FLEN/8, x4, x1, x2)

inst_36436:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x7f444444; valaddr_reg:x3; val_offset:109308*0 + 3*340*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109308*0 + 3*340*FLEN/8, x4, x1, x2)

inst_36437:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:109311*0 + 3*341*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109311*0 + 3*341*FLEN/8, x4, x1, x2)

inst_36438:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:109314*0 + 3*342*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109314*0 + 3*342*FLEN/8, x4, x1, x2)

inst_36439:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x7f666666; valaddr_reg:x3; val_offset:109317*0 + 3*343*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109317*0 + 3*343*FLEN/8, x4, x1, x2)

inst_36440:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x7f6db6db; valaddr_reg:x3; val_offset:109320*0 + 3*344*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109320*0 + 3*344*FLEN/8, x4, x1, x2)

inst_36441:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:109323*0 + 3*345*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109323*0 + 3*345*FLEN/8, x4, x1, x2)

inst_36442:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:109326*0 + 3*346*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109326*0 + 3*346*FLEN/8, x4, x1, x2)

inst_36443:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3572c4 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x349763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3572c4; op2val:0x3fb49763;
op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:109329*0 + 3*347*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109329*0 + 3*347*FLEN/8, x4, x1, x2)

inst_36444:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x77800000; valaddr_reg:x3; val_offset:109332*0 + 3*348*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109332*0 + 3*348*FLEN/8, x4, x1, x2)

inst_36445:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x77800001; valaddr_reg:x3; val_offset:109335*0 + 3*349*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109335*0 + 3*349*FLEN/8, x4, x1, x2)

inst_36446:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x77800003; valaddr_reg:x3; val_offset:109338*0 + 3*350*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109338*0 + 3*350*FLEN/8, x4, x1, x2)

inst_36447:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x77800007; valaddr_reg:x3; val_offset:109341*0 + 3*351*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109341*0 + 3*351*FLEN/8, x4, x1, x2)

inst_36448:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x7780000f; valaddr_reg:x3; val_offset:109344*0 + 3*352*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109344*0 + 3*352*FLEN/8, x4, x1, x2)

inst_36449:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x7780001f; valaddr_reg:x3; val_offset:109347*0 + 3*353*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109347*0 + 3*353*FLEN/8, x4, x1, x2)

inst_36450:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x7780003f; valaddr_reg:x3; val_offset:109350*0 + 3*354*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109350*0 + 3*354*FLEN/8, x4, x1, x2)

inst_36451:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x7780007f; valaddr_reg:x3; val_offset:109353*0 + 3*355*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109353*0 + 3*355*FLEN/8, x4, x1, x2)

inst_36452:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x778000ff; valaddr_reg:x3; val_offset:109356*0 + 3*356*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109356*0 + 3*356*FLEN/8, x4, x1, x2)

inst_36453:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x778001ff; valaddr_reg:x3; val_offset:109359*0 + 3*357*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109359*0 + 3*357*FLEN/8, x4, x1, x2)

inst_36454:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x778003ff; valaddr_reg:x3; val_offset:109362*0 + 3*358*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109362*0 + 3*358*FLEN/8, x4, x1, x2)

inst_36455:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x778007ff; valaddr_reg:x3; val_offset:109365*0 + 3*359*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109365*0 + 3*359*FLEN/8, x4, x1, x2)

inst_36456:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x77800fff; valaddr_reg:x3; val_offset:109368*0 + 3*360*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109368*0 + 3*360*FLEN/8, x4, x1, x2)

inst_36457:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x77801fff; valaddr_reg:x3; val_offset:109371*0 + 3*361*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109371*0 + 3*361*FLEN/8, x4, x1, x2)

inst_36458:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x77803fff; valaddr_reg:x3; val_offset:109374*0 + 3*362*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109374*0 + 3*362*FLEN/8, x4, x1, x2)

inst_36459:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x77807fff; valaddr_reg:x3; val_offset:109377*0 + 3*363*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109377*0 + 3*363*FLEN/8, x4, x1, x2)

inst_36460:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x7780ffff; valaddr_reg:x3; val_offset:109380*0 + 3*364*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109380*0 + 3*364*FLEN/8, x4, x1, x2)

inst_36461:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x7781ffff; valaddr_reg:x3; val_offset:109383*0 + 3*365*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109383*0 + 3*365*FLEN/8, x4, x1, x2)

inst_36462:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x7783ffff; valaddr_reg:x3; val_offset:109386*0 + 3*366*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109386*0 + 3*366*FLEN/8, x4, x1, x2)

inst_36463:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x7787ffff; valaddr_reg:x3; val_offset:109389*0 + 3*367*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109389*0 + 3*367*FLEN/8, x4, x1, x2)

inst_36464:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x778fffff; valaddr_reg:x3; val_offset:109392*0 + 3*368*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109392*0 + 3*368*FLEN/8, x4, x1, x2)

inst_36465:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x779fffff; valaddr_reg:x3; val_offset:109395*0 + 3*369*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109395*0 + 3*369*FLEN/8, x4, x1, x2)

inst_36466:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x77bfffff; valaddr_reg:x3; val_offset:109398*0 + 3*370*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109398*0 + 3*370*FLEN/8, x4, x1, x2)

inst_36467:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x77c00000; valaddr_reg:x3; val_offset:109401*0 + 3*371*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109401*0 + 3*371*FLEN/8, x4, x1, x2)

inst_36468:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x77e00000; valaddr_reg:x3; val_offset:109404*0 + 3*372*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109404*0 + 3*372*FLEN/8, x4, x1, x2)

inst_36469:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x77f00000; valaddr_reg:x3; val_offset:109407*0 + 3*373*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109407*0 + 3*373*FLEN/8, x4, x1, x2)

inst_36470:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x77f80000; valaddr_reg:x3; val_offset:109410*0 + 3*374*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109410*0 + 3*374*FLEN/8, x4, x1, x2)

inst_36471:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x77fc0000; valaddr_reg:x3; val_offset:109413*0 + 3*375*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109413*0 + 3*375*FLEN/8, x4, x1, x2)

inst_36472:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x77fe0000; valaddr_reg:x3; val_offset:109416*0 + 3*376*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109416*0 + 3*376*FLEN/8, x4, x1, x2)

inst_36473:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x77ff0000; valaddr_reg:x3; val_offset:109419*0 + 3*377*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109419*0 + 3*377*FLEN/8, x4, x1, x2)

inst_36474:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x77ff8000; valaddr_reg:x3; val_offset:109422*0 + 3*378*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109422*0 + 3*378*FLEN/8, x4, x1, x2)

inst_36475:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x77ffc000; valaddr_reg:x3; val_offset:109425*0 + 3*379*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109425*0 + 3*379*FLEN/8, x4, x1, x2)

inst_36476:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x77ffe000; valaddr_reg:x3; val_offset:109428*0 + 3*380*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109428*0 + 3*380*FLEN/8, x4, x1, x2)

inst_36477:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x77fff000; valaddr_reg:x3; val_offset:109431*0 + 3*381*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109431*0 + 3*381*FLEN/8, x4, x1, x2)

inst_36478:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x77fff800; valaddr_reg:x3; val_offset:109434*0 + 3*382*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109434*0 + 3*382*FLEN/8, x4, x1, x2)

inst_36479:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x77fffc00; valaddr_reg:x3; val_offset:109437*0 + 3*383*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109437*0 + 3*383*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_4)

inst_36480:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x77fffe00; valaddr_reg:x3; val_offset:109440*0 + 3*384*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109440*0 + 3*384*FLEN/8, x4, x1, x2)

inst_36481:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x77ffff00; valaddr_reg:x3; val_offset:109443*0 + 3*385*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109443*0 + 3*385*FLEN/8, x4, x1, x2)

inst_36482:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x77ffff80; valaddr_reg:x3; val_offset:109446*0 + 3*386*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109446*0 + 3*386*FLEN/8, x4, x1, x2)

inst_36483:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x77ffffc0; valaddr_reg:x3; val_offset:109449*0 + 3*387*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109449*0 + 3*387*FLEN/8, x4, x1, x2)

inst_36484:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x77ffffe0; valaddr_reg:x3; val_offset:109452*0 + 3*388*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109452*0 + 3*388*FLEN/8, x4, x1, x2)

inst_36485:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x77fffff0; valaddr_reg:x3; val_offset:109455*0 + 3*389*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109455*0 + 3*389*FLEN/8, x4, x1, x2)

inst_36486:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x77fffff8; valaddr_reg:x3; val_offset:109458*0 + 3*390*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109458*0 + 3*390*FLEN/8, x4, x1, x2)

inst_36487:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x77fffffc; valaddr_reg:x3; val_offset:109461*0 + 3*391*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109461*0 + 3*391*FLEN/8, x4, x1, x2)

inst_36488:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x77fffffe; valaddr_reg:x3; val_offset:109464*0 + 3*392*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109464*0 + 3*392*FLEN/8, x4, x1, x2)

inst_36489:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xef and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x77ffffff; valaddr_reg:x3; val_offset:109467*0 + 3*393*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109467*0 + 3*393*FLEN/8, x4, x1, x2)

inst_36490:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x7f000001; valaddr_reg:x3; val_offset:109470*0 + 3*394*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109470*0 + 3*394*FLEN/8, x4, x1, x2)

inst_36491:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x7f000003; valaddr_reg:x3; val_offset:109473*0 + 3*395*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109473*0 + 3*395*FLEN/8, x4, x1, x2)

inst_36492:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x7f000007; valaddr_reg:x3; val_offset:109476*0 + 3*396*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109476*0 + 3*396*FLEN/8, x4, x1, x2)

inst_36493:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x7f199999; valaddr_reg:x3; val_offset:109479*0 + 3*397*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109479*0 + 3*397*FLEN/8, x4, x1, x2)

inst_36494:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x7f249249; valaddr_reg:x3; val_offset:109482*0 + 3*398*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109482*0 + 3*398*FLEN/8, x4, x1, x2)

inst_36495:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x7f333333; valaddr_reg:x3; val_offset:109485*0 + 3*399*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109485*0 + 3*399*FLEN/8, x4, x1, x2)

inst_36496:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x7f36db6d; valaddr_reg:x3; val_offset:109488*0 + 3*400*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109488*0 + 3*400*FLEN/8, x4, x1, x2)

inst_36497:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:109491*0 + 3*401*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109491*0 + 3*401*FLEN/8, x4, x1, x2)

inst_36498:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x7f444444; valaddr_reg:x3; val_offset:109494*0 + 3*402*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109494*0 + 3*402*FLEN/8, x4, x1, x2)

inst_36499:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:109497*0 + 3*403*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109497*0 + 3*403*FLEN/8, x4, x1, x2)

inst_36500:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:109500*0 + 3*404*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109500*0 + 3*404*FLEN/8, x4, x1, x2)

inst_36501:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x7f666666; valaddr_reg:x3; val_offset:109503*0 + 3*405*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109503*0 + 3*405*FLEN/8, x4, x1, x2)

inst_36502:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x7f6db6db; valaddr_reg:x3; val_offset:109506*0 + 3*406*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109506*0 + 3*406*FLEN/8, x4, x1, x2)

inst_36503:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:109509*0 + 3*407*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109509*0 + 3*407*FLEN/8, x4, x1, x2)

inst_36504:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:109512*0 + 3*408*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109512*0 + 3*408*FLEN/8, x4, x1, x2)

inst_36505:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35c5b2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3444ff and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f35c5b2; op2val:0x3fb444ff;
op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:109515*0 + 3*409*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109515*0 + 3*409*FLEN/8, x4, x1, x2)

inst_36506:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa6000000; valaddr_reg:x3; val_offset:109518*0 + 3*410*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109518*0 + 3*410*FLEN/8, x4, x1, x2)

inst_36507:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa6000001; valaddr_reg:x3; val_offset:109521*0 + 3*411*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109521*0 + 3*411*FLEN/8, x4, x1, x2)

inst_36508:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa6000003; valaddr_reg:x3; val_offset:109524*0 + 3*412*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109524*0 + 3*412*FLEN/8, x4, x1, x2)

inst_36509:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa6000007; valaddr_reg:x3; val_offset:109527*0 + 3*413*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109527*0 + 3*413*FLEN/8, x4, x1, x2)

inst_36510:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa600000f; valaddr_reg:x3; val_offset:109530*0 + 3*414*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109530*0 + 3*414*FLEN/8, x4, x1, x2)

inst_36511:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa600001f; valaddr_reg:x3; val_offset:109533*0 + 3*415*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109533*0 + 3*415*FLEN/8, x4, x1, x2)

inst_36512:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa600003f; valaddr_reg:x3; val_offset:109536*0 + 3*416*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109536*0 + 3*416*FLEN/8, x4, x1, x2)

inst_36513:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa600007f; valaddr_reg:x3; val_offset:109539*0 + 3*417*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109539*0 + 3*417*FLEN/8, x4, x1, x2)

inst_36514:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa60000ff; valaddr_reg:x3; val_offset:109542*0 + 3*418*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109542*0 + 3*418*FLEN/8, x4, x1, x2)

inst_36515:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa60001ff; valaddr_reg:x3; val_offset:109545*0 + 3*419*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109545*0 + 3*419*FLEN/8, x4, x1, x2)

inst_36516:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa60003ff; valaddr_reg:x3; val_offset:109548*0 + 3*420*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109548*0 + 3*420*FLEN/8, x4, x1, x2)

inst_36517:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa60007ff; valaddr_reg:x3; val_offset:109551*0 + 3*421*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109551*0 + 3*421*FLEN/8, x4, x1, x2)

inst_36518:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa6000fff; valaddr_reg:x3; val_offset:109554*0 + 3*422*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109554*0 + 3*422*FLEN/8, x4, x1, x2)

inst_36519:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa6001fff; valaddr_reg:x3; val_offset:109557*0 + 3*423*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109557*0 + 3*423*FLEN/8, x4, x1, x2)

inst_36520:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa6003fff; valaddr_reg:x3; val_offset:109560*0 + 3*424*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109560*0 + 3*424*FLEN/8, x4, x1, x2)

inst_36521:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa6007fff; valaddr_reg:x3; val_offset:109563*0 + 3*425*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109563*0 + 3*425*FLEN/8, x4, x1, x2)

inst_36522:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa600ffff; valaddr_reg:x3; val_offset:109566*0 + 3*426*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109566*0 + 3*426*FLEN/8, x4, x1, x2)

inst_36523:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa601ffff; valaddr_reg:x3; val_offset:109569*0 + 3*427*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109569*0 + 3*427*FLEN/8, x4, x1, x2)

inst_36524:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa603ffff; valaddr_reg:x3; val_offset:109572*0 + 3*428*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109572*0 + 3*428*FLEN/8, x4, x1, x2)

inst_36525:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa607ffff; valaddr_reg:x3; val_offset:109575*0 + 3*429*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109575*0 + 3*429*FLEN/8, x4, x1, x2)

inst_36526:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa60fffff; valaddr_reg:x3; val_offset:109578*0 + 3*430*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109578*0 + 3*430*FLEN/8, x4, x1, x2)

inst_36527:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa61fffff; valaddr_reg:x3; val_offset:109581*0 + 3*431*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109581*0 + 3*431*FLEN/8, x4, x1, x2)

inst_36528:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa63fffff; valaddr_reg:x3; val_offset:109584*0 + 3*432*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109584*0 + 3*432*FLEN/8, x4, x1, x2)

inst_36529:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa6400000; valaddr_reg:x3; val_offset:109587*0 + 3*433*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109587*0 + 3*433*FLEN/8, x4, x1, x2)

inst_36530:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa6600000; valaddr_reg:x3; val_offset:109590*0 + 3*434*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109590*0 + 3*434*FLEN/8, x4, x1, x2)

inst_36531:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa6700000; valaddr_reg:x3; val_offset:109593*0 + 3*435*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109593*0 + 3*435*FLEN/8, x4, x1, x2)

inst_36532:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa6780000; valaddr_reg:x3; val_offset:109596*0 + 3*436*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109596*0 + 3*436*FLEN/8, x4, x1, x2)

inst_36533:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa67c0000; valaddr_reg:x3; val_offset:109599*0 + 3*437*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109599*0 + 3*437*FLEN/8, x4, x1, x2)

inst_36534:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa67e0000; valaddr_reg:x3; val_offset:109602*0 + 3*438*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109602*0 + 3*438*FLEN/8, x4, x1, x2)

inst_36535:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa67f0000; valaddr_reg:x3; val_offset:109605*0 + 3*439*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109605*0 + 3*439*FLEN/8, x4, x1, x2)

inst_36536:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa67f8000; valaddr_reg:x3; val_offset:109608*0 + 3*440*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109608*0 + 3*440*FLEN/8, x4, x1, x2)

inst_36537:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa67fc000; valaddr_reg:x3; val_offset:109611*0 + 3*441*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109611*0 + 3*441*FLEN/8, x4, x1, x2)

inst_36538:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa67fe000; valaddr_reg:x3; val_offset:109614*0 + 3*442*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109614*0 + 3*442*FLEN/8, x4, x1, x2)

inst_36539:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa67ff000; valaddr_reg:x3; val_offset:109617*0 + 3*443*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109617*0 + 3*443*FLEN/8, x4, x1, x2)

inst_36540:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa67ff800; valaddr_reg:x3; val_offset:109620*0 + 3*444*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109620*0 + 3*444*FLEN/8, x4, x1, x2)

inst_36541:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa67ffc00; valaddr_reg:x3; val_offset:109623*0 + 3*445*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109623*0 + 3*445*FLEN/8, x4, x1, x2)

inst_36542:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa67ffe00; valaddr_reg:x3; val_offset:109626*0 + 3*446*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109626*0 + 3*446*FLEN/8, x4, x1, x2)

inst_36543:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa67fff00; valaddr_reg:x3; val_offset:109629*0 + 3*447*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109629*0 + 3*447*FLEN/8, x4, x1, x2)

inst_36544:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa67fff80; valaddr_reg:x3; val_offset:109632*0 + 3*448*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109632*0 + 3*448*FLEN/8, x4, x1, x2)

inst_36545:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa67fffc0; valaddr_reg:x3; val_offset:109635*0 + 3*449*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109635*0 + 3*449*FLEN/8, x4, x1, x2)

inst_36546:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa67fffe0; valaddr_reg:x3; val_offset:109638*0 + 3*450*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109638*0 + 3*450*FLEN/8, x4, x1, x2)

inst_36547:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa67ffff0; valaddr_reg:x3; val_offset:109641*0 + 3*451*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109641*0 + 3*451*FLEN/8, x4, x1, x2)

inst_36548:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa67ffff8; valaddr_reg:x3; val_offset:109644*0 + 3*452*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109644*0 + 3*452*FLEN/8, x4, x1, x2)

inst_36549:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa67ffffc; valaddr_reg:x3; val_offset:109647*0 + 3*453*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109647*0 + 3*453*FLEN/8, x4, x1, x2)

inst_36550:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa67ffffe; valaddr_reg:x3; val_offset:109650*0 + 3*454*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109650*0 + 3*454*FLEN/8, x4, x1, x2)

inst_36551:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xa67fffff; valaddr_reg:x3; val_offset:109653*0 + 3*455*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109653*0 + 3*455*FLEN/8, x4, x1, x2)

inst_36552:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xbf800001; valaddr_reg:x3; val_offset:109656*0 + 3*456*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109656*0 + 3*456*FLEN/8, x4, x1, x2)

inst_36553:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xbf800003; valaddr_reg:x3; val_offset:109659*0 + 3*457*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109659*0 + 3*457*FLEN/8, x4, x1, x2)

inst_36554:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xbf800007; valaddr_reg:x3; val_offset:109662*0 + 3*458*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109662*0 + 3*458*FLEN/8, x4, x1, x2)

inst_36555:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xbf999999; valaddr_reg:x3; val_offset:109665*0 + 3*459*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109665*0 + 3*459*FLEN/8, x4, x1, x2)

inst_36556:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:109668*0 + 3*460*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109668*0 + 3*460*FLEN/8, x4, x1, x2)

inst_36557:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:109671*0 + 3*461*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109671*0 + 3*461*FLEN/8, x4, x1, x2)

inst_36558:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:109674*0 + 3*462*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109674*0 + 3*462*FLEN/8, x4, x1, x2)

inst_36559:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:109677*0 + 3*463*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109677*0 + 3*463*FLEN/8, x4, x1, x2)

inst_36560:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:109680*0 + 3*464*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109680*0 + 3*464*FLEN/8, x4, x1, x2)

inst_36561:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:109683*0 + 3*465*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109683*0 + 3*465*FLEN/8, x4, x1, x2)

inst_36562:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:109686*0 + 3*466*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109686*0 + 3*466*FLEN/8, x4, x1, x2)

inst_36563:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:109689*0 + 3*467*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109689*0 + 3*467*FLEN/8, x4, x1, x2)

inst_36564:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:109692*0 + 3*468*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109692*0 + 3*468*FLEN/8, x4, x1, x2)

inst_36565:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:109695*0 + 3*469*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109695*0 + 3*469*FLEN/8, x4, x1, x2)

inst_36566:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:109698*0 + 3*470*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109698*0 + 3*470*FLEN/8, x4, x1, x2)

inst_36567:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2ce798 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f366e51; op2val:0x802ce798;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:109701*0 + 3*471*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109701*0 + 3*471*FLEN/8, x4, x1, x2)

inst_36568:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:109704*0 + 3*472*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109704*0 + 3*472*FLEN/8, x4, x1, x2)

inst_36569:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:109707*0 + 3*473*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109707*0 + 3*473*FLEN/8, x4, x1, x2)

inst_36570:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:109710*0 + 3*474*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109710*0 + 3*474*FLEN/8, x4, x1, x2)

inst_36571:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x199999; valaddr_reg:x3; val_offset:109713*0 + 3*475*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109713*0 + 3*475*FLEN/8, x4, x1, x2)

inst_36572:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x249249; valaddr_reg:x3; val_offset:109716*0 + 3*476*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109716*0 + 3*476*FLEN/8, x4, x1, x2)

inst_36573:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x333333; valaddr_reg:x3; val_offset:109719*0 + 3*477*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109719*0 + 3*477*FLEN/8, x4, x1, x2)

inst_36574:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x36db6d; valaddr_reg:x3; val_offset:109722*0 + 3*478*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109722*0 + 3*478*FLEN/8, x4, x1, x2)

inst_36575:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x3bbbbb; valaddr_reg:x3; val_offset:109725*0 + 3*479*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109725*0 + 3*479*FLEN/8, x4, x1, x2)

inst_36576:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x444444; valaddr_reg:x3; val_offset:109728*0 + 3*480*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109728*0 + 3*480*FLEN/8, x4, x1, x2)

inst_36577:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x4ccccc; valaddr_reg:x3; val_offset:109731*0 + 3*481*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109731*0 + 3*481*FLEN/8, x4, x1, x2)

inst_36578:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x5b6db6; valaddr_reg:x3; val_offset:109734*0 + 3*482*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109734*0 + 3*482*FLEN/8, x4, x1, x2)

inst_36579:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x666666; valaddr_reg:x3; val_offset:109737*0 + 3*483*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109737*0 + 3*483*FLEN/8, x4, x1, x2)

inst_36580:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x6db6db; valaddr_reg:x3; val_offset:109740*0 + 3*484*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109740*0 + 3*484*FLEN/8, x4, x1, x2)

inst_36581:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x7ffff8; valaddr_reg:x3; val_offset:109743*0 + 3*485*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109743*0 + 3*485*FLEN/8, x4, x1, x2)

inst_36582:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x7ffffc; valaddr_reg:x3; val_offset:109746*0 + 3*486*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109746*0 + 3*486*FLEN/8, x4, x1, x2)

inst_36583:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x7ffffe; valaddr_reg:x3; val_offset:109749*0 + 3*487*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109749*0 + 3*487*FLEN/8, x4, x1, x2)

inst_36584:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x800000; valaddr_reg:x3; val_offset:109752*0 + 3*488*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109752*0 + 3*488*FLEN/8, x4, x1, x2)

inst_36585:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x800001; valaddr_reg:x3; val_offset:109755*0 + 3*489*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109755*0 + 3*489*FLEN/8, x4, x1, x2)

inst_36586:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x800003; valaddr_reg:x3; val_offset:109758*0 + 3*490*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109758*0 + 3*490*FLEN/8, x4, x1, x2)

inst_36587:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x800007; valaddr_reg:x3; val_offset:109761*0 + 3*491*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109761*0 + 3*491*FLEN/8, x4, x1, x2)

inst_36588:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x80000f; valaddr_reg:x3; val_offset:109764*0 + 3*492*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109764*0 + 3*492*FLEN/8, x4, x1, x2)

inst_36589:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x80001f; valaddr_reg:x3; val_offset:109767*0 + 3*493*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109767*0 + 3*493*FLEN/8, x4, x1, x2)

inst_36590:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x80003f; valaddr_reg:x3; val_offset:109770*0 + 3*494*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109770*0 + 3*494*FLEN/8, x4, x1, x2)

inst_36591:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x80007f; valaddr_reg:x3; val_offset:109773*0 + 3*495*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109773*0 + 3*495*FLEN/8, x4, x1, x2)

inst_36592:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x8000ff; valaddr_reg:x3; val_offset:109776*0 + 3*496*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109776*0 + 3*496*FLEN/8, x4, x1, x2)

inst_36593:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x8001ff; valaddr_reg:x3; val_offset:109779*0 + 3*497*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109779*0 + 3*497*FLEN/8, x4, x1, x2)

inst_36594:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x8003ff; valaddr_reg:x3; val_offset:109782*0 + 3*498*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109782*0 + 3*498*FLEN/8, x4, x1, x2)

inst_36595:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x8007ff; valaddr_reg:x3; val_offset:109785*0 + 3*499*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109785*0 + 3*499*FLEN/8, x4, x1, x2)

inst_36596:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x800fff; valaddr_reg:x3; val_offset:109788*0 + 3*500*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109788*0 + 3*500*FLEN/8, x4, x1, x2)

inst_36597:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x801fff; valaddr_reg:x3; val_offset:109791*0 + 3*501*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109791*0 + 3*501*FLEN/8, x4, x1, x2)

inst_36598:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x803fff; valaddr_reg:x3; val_offset:109794*0 + 3*502*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109794*0 + 3*502*FLEN/8, x4, x1, x2)

inst_36599:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x807fff; valaddr_reg:x3; val_offset:109797*0 + 3*503*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109797*0 + 3*503*FLEN/8, x4, x1, x2)

inst_36600:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x80ffff; valaddr_reg:x3; val_offset:109800*0 + 3*504*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109800*0 + 3*504*FLEN/8, x4, x1, x2)

inst_36601:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x81ffff; valaddr_reg:x3; val_offset:109803*0 + 3*505*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109803*0 + 3*505*FLEN/8, x4, x1, x2)

inst_36602:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x83ffff; valaddr_reg:x3; val_offset:109806*0 + 3*506*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109806*0 + 3*506*FLEN/8, x4, x1, x2)

inst_36603:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x87ffff; valaddr_reg:x3; val_offset:109809*0 + 3*507*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109809*0 + 3*507*FLEN/8, x4, x1, x2)

inst_36604:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x8fffff; valaddr_reg:x3; val_offset:109812*0 + 3*508*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109812*0 + 3*508*FLEN/8, x4, x1, x2)

inst_36605:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0x9fffff; valaddr_reg:x3; val_offset:109815*0 + 3*509*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109815*0 + 3*509*FLEN/8, x4, x1, x2)

inst_36606:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0xbfffff; valaddr_reg:x3; val_offset:109818*0 + 3*510*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109818*0 + 3*510*FLEN/8, x4, x1, x2)

inst_36607:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0xc00000; valaddr_reg:x3; val_offset:109821*0 + 3*511*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109821*0 + 3*511*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_5)

inst_36608:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0xe00000; valaddr_reg:x3; val_offset:109824*0 + 3*512*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109824*0 + 3*512*FLEN/8, x4, x1, x2)

inst_36609:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0xf00000; valaddr_reg:x3; val_offset:109827*0 + 3*513*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109827*0 + 3*513*FLEN/8, x4, x1, x2)

inst_36610:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0xf80000; valaddr_reg:x3; val_offset:109830*0 + 3*514*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109830*0 + 3*514*FLEN/8, x4, x1, x2)

inst_36611:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0xfc0000; valaddr_reg:x3; val_offset:109833*0 + 3*515*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109833*0 + 3*515*FLEN/8, x4, x1, x2)

inst_36612:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0xfe0000; valaddr_reg:x3; val_offset:109836*0 + 3*516*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109836*0 + 3*516*FLEN/8, x4, x1, x2)

inst_36613:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0xff0000; valaddr_reg:x3; val_offset:109839*0 + 3*517*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109839*0 + 3*517*FLEN/8, x4, x1, x2)

inst_36614:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0xff8000; valaddr_reg:x3; val_offset:109842*0 + 3*518*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109842*0 + 3*518*FLEN/8, x4, x1, x2)

inst_36615:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0xffc000; valaddr_reg:x3; val_offset:109845*0 + 3*519*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109845*0 + 3*519*FLEN/8, x4, x1, x2)

inst_36616:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0xffe000; valaddr_reg:x3; val_offset:109848*0 + 3*520*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109848*0 + 3*520*FLEN/8, x4, x1, x2)

inst_36617:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0xfff000; valaddr_reg:x3; val_offset:109851*0 + 3*521*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109851*0 + 3*521*FLEN/8, x4, x1, x2)

inst_36618:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0xfff800; valaddr_reg:x3; val_offset:109854*0 + 3*522*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109854*0 + 3*522*FLEN/8, x4, x1, x2)

inst_36619:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0xfffc00; valaddr_reg:x3; val_offset:109857*0 + 3*523*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109857*0 + 3*523*FLEN/8, x4, x1, x2)

inst_36620:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0xfffe00; valaddr_reg:x3; val_offset:109860*0 + 3*524*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109860*0 + 3*524*FLEN/8, x4, x1, x2)

inst_36621:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0xffff00; valaddr_reg:x3; val_offset:109863*0 + 3*525*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109863*0 + 3*525*FLEN/8, x4, x1, x2)

inst_36622:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0xffff80; valaddr_reg:x3; val_offset:109866*0 + 3*526*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109866*0 + 3*526*FLEN/8, x4, x1, x2)

inst_36623:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0xffffc0; valaddr_reg:x3; val_offset:109869*0 + 3*527*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109869*0 + 3*527*FLEN/8, x4, x1, x2)

inst_36624:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0xffffe0; valaddr_reg:x3; val_offset:109872*0 + 3*528*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109872*0 + 3*528*FLEN/8, x4, x1, x2)

inst_36625:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0xfffff0; valaddr_reg:x3; val_offset:109875*0 + 3*529*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109875*0 + 3*529*FLEN/8, x4, x1, x2)

inst_36626:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0xfffff8; valaddr_reg:x3; val_offset:109878*0 + 3*530*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109878*0 + 3*530*FLEN/8, x4, x1, x2)

inst_36627:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0xfffffc; valaddr_reg:x3; val_offset:109881*0 + 3*531*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109881*0 + 3*531*FLEN/8, x4, x1, x2)

inst_36628:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0xfffffe; valaddr_reg:x3; val_offset:109884*0 + 3*532*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109884*0 + 3*532*FLEN/8, x4, x1, x2)

inst_36629:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36749a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36749a; op2val:0x0;
op3val:0xffffff; valaddr_reg:x3; val_offset:109887*0 + 3*533*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109887*0 + 3*533*FLEN/8, x4, x1, x2)

inst_36630:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:109890*0 + 3*534*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109890*0 + 3*534*FLEN/8, x4, x1, x2)

inst_36631:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:109893*0 + 3*535*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109893*0 + 3*535*FLEN/8, x4, x1, x2)

inst_36632:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:109896*0 + 3*536*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109896*0 + 3*536*FLEN/8, x4, x1, x2)

inst_36633:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x199999; valaddr_reg:x3; val_offset:109899*0 + 3*537*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109899*0 + 3*537*FLEN/8, x4, x1, x2)

inst_36634:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x249249; valaddr_reg:x3; val_offset:109902*0 + 3*538*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109902*0 + 3*538*FLEN/8, x4, x1, x2)

inst_36635:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x333333; valaddr_reg:x3; val_offset:109905*0 + 3*539*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109905*0 + 3*539*FLEN/8, x4, x1, x2)

inst_36636:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x36db6d; valaddr_reg:x3; val_offset:109908*0 + 3*540*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109908*0 + 3*540*FLEN/8, x4, x1, x2)

inst_36637:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x3bbbbb; valaddr_reg:x3; val_offset:109911*0 + 3*541*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109911*0 + 3*541*FLEN/8, x4, x1, x2)

inst_36638:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x444444; valaddr_reg:x3; val_offset:109914*0 + 3*542*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109914*0 + 3*542*FLEN/8, x4, x1, x2)

inst_36639:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x4ccccc; valaddr_reg:x3; val_offset:109917*0 + 3*543*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109917*0 + 3*543*FLEN/8, x4, x1, x2)

inst_36640:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x5b6db6; valaddr_reg:x3; val_offset:109920*0 + 3*544*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109920*0 + 3*544*FLEN/8, x4, x1, x2)

inst_36641:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x666666; valaddr_reg:x3; val_offset:109923*0 + 3*545*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109923*0 + 3*545*FLEN/8, x4, x1, x2)

inst_36642:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x6db6db; valaddr_reg:x3; val_offset:109926*0 + 3*546*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109926*0 + 3*546*FLEN/8, x4, x1, x2)

inst_36643:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x7ffff8; valaddr_reg:x3; val_offset:109929*0 + 3*547*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109929*0 + 3*547*FLEN/8, x4, x1, x2)

inst_36644:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x7ffffc; valaddr_reg:x3; val_offset:109932*0 + 3*548*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109932*0 + 3*548*FLEN/8, x4, x1, x2)

inst_36645:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x7ffffe; valaddr_reg:x3; val_offset:109935*0 + 3*549*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109935*0 + 3*549*FLEN/8, x4, x1, x2)

inst_36646:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x5800000; valaddr_reg:x3; val_offset:109938*0 + 3*550*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109938*0 + 3*550*FLEN/8, x4, x1, x2)

inst_36647:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x5800001; valaddr_reg:x3; val_offset:109941*0 + 3*551*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109941*0 + 3*551*FLEN/8, x4, x1, x2)

inst_36648:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x5800003; valaddr_reg:x3; val_offset:109944*0 + 3*552*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109944*0 + 3*552*FLEN/8, x4, x1, x2)

inst_36649:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x5800007; valaddr_reg:x3; val_offset:109947*0 + 3*553*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109947*0 + 3*553*FLEN/8, x4, x1, x2)

inst_36650:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x580000f; valaddr_reg:x3; val_offset:109950*0 + 3*554*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109950*0 + 3*554*FLEN/8, x4, x1, x2)

inst_36651:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x580001f; valaddr_reg:x3; val_offset:109953*0 + 3*555*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109953*0 + 3*555*FLEN/8, x4, x1, x2)

inst_36652:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x580003f; valaddr_reg:x3; val_offset:109956*0 + 3*556*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109956*0 + 3*556*FLEN/8, x4, x1, x2)

inst_36653:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x580007f; valaddr_reg:x3; val_offset:109959*0 + 3*557*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109959*0 + 3*557*FLEN/8, x4, x1, x2)

inst_36654:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x58000ff; valaddr_reg:x3; val_offset:109962*0 + 3*558*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109962*0 + 3*558*FLEN/8, x4, x1, x2)

inst_36655:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x58001ff; valaddr_reg:x3; val_offset:109965*0 + 3*559*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109965*0 + 3*559*FLEN/8, x4, x1, x2)

inst_36656:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x58003ff; valaddr_reg:x3; val_offset:109968*0 + 3*560*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109968*0 + 3*560*FLEN/8, x4, x1, x2)

inst_36657:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x58007ff; valaddr_reg:x3; val_offset:109971*0 + 3*561*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109971*0 + 3*561*FLEN/8, x4, x1, x2)

inst_36658:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x5800fff; valaddr_reg:x3; val_offset:109974*0 + 3*562*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109974*0 + 3*562*FLEN/8, x4, x1, x2)

inst_36659:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x5801fff; valaddr_reg:x3; val_offset:109977*0 + 3*563*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109977*0 + 3*563*FLEN/8, x4, x1, x2)

inst_36660:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x5803fff; valaddr_reg:x3; val_offset:109980*0 + 3*564*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109980*0 + 3*564*FLEN/8, x4, x1, x2)

inst_36661:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x5807fff; valaddr_reg:x3; val_offset:109983*0 + 3*565*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109983*0 + 3*565*FLEN/8, x4, x1, x2)

inst_36662:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x580ffff; valaddr_reg:x3; val_offset:109986*0 + 3*566*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109986*0 + 3*566*FLEN/8, x4, x1, x2)

inst_36663:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x581ffff; valaddr_reg:x3; val_offset:109989*0 + 3*567*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109989*0 + 3*567*FLEN/8, x4, x1, x2)

inst_36664:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x583ffff; valaddr_reg:x3; val_offset:109992*0 + 3*568*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109992*0 + 3*568*FLEN/8, x4, x1, x2)

inst_36665:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x587ffff; valaddr_reg:x3; val_offset:109995*0 + 3*569*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109995*0 + 3*569*FLEN/8, x4, x1, x2)

inst_36666:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x58fffff; valaddr_reg:x3; val_offset:109998*0 + 3*570*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109998*0 + 3*570*FLEN/8, x4, x1, x2)

inst_36667:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x59fffff; valaddr_reg:x3; val_offset:110001*0 + 3*571*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110001*0 + 3*571*FLEN/8, x4, x1, x2)

inst_36668:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x5bfffff; valaddr_reg:x3; val_offset:110004*0 + 3*572*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110004*0 + 3*572*FLEN/8, x4, x1, x2)

inst_36669:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x5c00000; valaddr_reg:x3; val_offset:110007*0 + 3*573*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110007*0 + 3*573*FLEN/8, x4, x1, x2)

inst_36670:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x5e00000; valaddr_reg:x3; val_offset:110010*0 + 3*574*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110010*0 + 3*574*FLEN/8, x4, x1, x2)

inst_36671:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x5f00000; valaddr_reg:x3; val_offset:110013*0 + 3*575*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110013*0 + 3*575*FLEN/8, x4, x1, x2)

inst_36672:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x5f80000; valaddr_reg:x3; val_offset:110016*0 + 3*576*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110016*0 + 3*576*FLEN/8, x4, x1, x2)

inst_36673:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x5fc0000; valaddr_reg:x3; val_offset:110019*0 + 3*577*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110019*0 + 3*577*FLEN/8, x4, x1, x2)

inst_36674:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x5fe0000; valaddr_reg:x3; val_offset:110022*0 + 3*578*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110022*0 + 3*578*FLEN/8, x4, x1, x2)

inst_36675:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x5ff0000; valaddr_reg:x3; val_offset:110025*0 + 3*579*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110025*0 + 3*579*FLEN/8, x4, x1, x2)

inst_36676:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x5ff8000; valaddr_reg:x3; val_offset:110028*0 + 3*580*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110028*0 + 3*580*FLEN/8, x4, x1, x2)

inst_36677:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x5ffc000; valaddr_reg:x3; val_offset:110031*0 + 3*581*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110031*0 + 3*581*FLEN/8, x4, x1, x2)

inst_36678:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x5ffe000; valaddr_reg:x3; val_offset:110034*0 + 3*582*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110034*0 + 3*582*FLEN/8, x4, x1, x2)

inst_36679:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x5fff000; valaddr_reg:x3; val_offset:110037*0 + 3*583*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110037*0 + 3*583*FLEN/8, x4, x1, x2)

inst_36680:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x5fff800; valaddr_reg:x3; val_offset:110040*0 + 3*584*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110040*0 + 3*584*FLEN/8, x4, x1, x2)

inst_36681:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x5fffc00; valaddr_reg:x3; val_offset:110043*0 + 3*585*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110043*0 + 3*585*FLEN/8, x4, x1, x2)

inst_36682:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x5fffe00; valaddr_reg:x3; val_offset:110046*0 + 3*586*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110046*0 + 3*586*FLEN/8, x4, x1, x2)

inst_36683:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x5ffff00; valaddr_reg:x3; val_offset:110049*0 + 3*587*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110049*0 + 3*587*FLEN/8, x4, x1, x2)

inst_36684:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x5ffff80; valaddr_reg:x3; val_offset:110052*0 + 3*588*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110052*0 + 3*588*FLEN/8, x4, x1, x2)

inst_36685:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x5ffffc0; valaddr_reg:x3; val_offset:110055*0 + 3*589*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110055*0 + 3*589*FLEN/8, x4, x1, x2)

inst_36686:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x5ffffe0; valaddr_reg:x3; val_offset:110058*0 + 3*590*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110058*0 + 3*590*FLEN/8, x4, x1, x2)

inst_36687:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x5fffff0; valaddr_reg:x3; val_offset:110061*0 + 3*591*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110061*0 + 3*591*FLEN/8, x4, x1, x2)

inst_36688:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x5fffff8; valaddr_reg:x3; val_offset:110064*0 + 3*592*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110064*0 + 3*592*FLEN/8, x4, x1, x2)

inst_36689:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x5fffffc; valaddr_reg:x3; val_offset:110067*0 + 3*593*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110067*0 + 3*593*FLEN/8, x4, x1, x2)

inst_36690:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x5fffffe; valaddr_reg:x3; val_offset:110070*0 + 3*594*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110070*0 + 3*594*FLEN/8, x4, x1, x2)

inst_36691:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x368869 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f368869; op2val:0x0;
op3val:0x5ffffff; valaddr_reg:x3; val_offset:110073*0 + 3*595*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110073*0 + 3*595*FLEN/8, x4, x1, x2)

inst_36692:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x3; val_offset:110076*0 + 3*596*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110076*0 + 3*596*FLEN/8, x4, x1, x2)

inst_36693:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x3; val_offset:110079*0 + 3*597*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110079*0 + 3*597*FLEN/8, x4, x1, x2)

inst_36694:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x3; val_offset:110082*0 + 3*598*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110082*0 + 3*598*FLEN/8, x4, x1, x2)

inst_36695:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x3; val_offset:110085*0 + 3*599*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110085*0 + 3*599*FLEN/8, x4, x1, x2)

inst_36696:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x3; val_offset:110088*0 + 3*600*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110088*0 + 3*600*FLEN/8, x4, x1, x2)

inst_36697:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x3; val_offset:110091*0 + 3*601*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110091*0 + 3*601*FLEN/8, x4, x1, x2)

inst_36698:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x3; val_offset:110094*0 + 3*602*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110094*0 + 3*602*FLEN/8, x4, x1, x2)

inst_36699:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x3; val_offset:110097*0 + 3*603*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110097*0 + 3*603*FLEN/8, x4, x1, x2)

inst_36700:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x3; val_offset:110100*0 + 3*604*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110100*0 + 3*604*FLEN/8, x4, x1, x2)

inst_36701:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x3; val_offset:110103*0 + 3*605*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110103*0 + 3*605*FLEN/8, x4, x1, x2)

inst_36702:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x3; val_offset:110106*0 + 3*606*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110106*0 + 3*606*FLEN/8, x4, x1, x2)

inst_36703:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x3; val_offset:110109*0 + 3*607*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110109*0 + 3*607*FLEN/8, x4, x1, x2)

inst_36704:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x3; val_offset:110112*0 + 3*608*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110112*0 + 3*608*FLEN/8, x4, x1, x2)

inst_36705:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x3; val_offset:110115*0 + 3*609*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110115*0 + 3*609*FLEN/8, x4, x1, x2)

inst_36706:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x3; val_offset:110118*0 + 3*610*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110118*0 + 3*610*FLEN/8, x4, x1, x2)

inst_36707:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x3; val_offset:110121*0 + 3*611*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110121*0 + 3*611*FLEN/8, x4, x1, x2)

inst_36708:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x82800000; valaddr_reg:x3; val_offset:110124*0 + 3*612*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110124*0 + 3*612*FLEN/8, x4, x1, x2)

inst_36709:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x82800001; valaddr_reg:x3; val_offset:110127*0 + 3*613*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110127*0 + 3*613*FLEN/8, x4, x1, x2)

inst_36710:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x82800003; valaddr_reg:x3; val_offset:110130*0 + 3*614*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110130*0 + 3*614*FLEN/8, x4, x1, x2)

inst_36711:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x82800007; valaddr_reg:x3; val_offset:110133*0 + 3*615*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110133*0 + 3*615*FLEN/8, x4, x1, x2)

inst_36712:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x8280000f; valaddr_reg:x3; val_offset:110136*0 + 3*616*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110136*0 + 3*616*FLEN/8, x4, x1, x2)

inst_36713:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x8280001f; valaddr_reg:x3; val_offset:110139*0 + 3*617*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110139*0 + 3*617*FLEN/8, x4, x1, x2)

inst_36714:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x8280003f; valaddr_reg:x3; val_offset:110142*0 + 3*618*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110142*0 + 3*618*FLEN/8, x4, x1, x2)

inst_36715:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x8280007f; valaddr_reg:x3; val_offset:110145*0 + 3*619*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110145*0 + 3*619*FLEN/8, x4, x1, x2)

inst_36716:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x828000ff; valaddr_reg:x3; val_offset:110148*0 + 3*620*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110148*0 + 3*620*FLEN/8, x4, x1, x2)

inst_36717:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x828001ff; valaddr_reg:x3; val_offset:110151*0 + 3*621*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110151*0 + 3*621*FLEN/8, x4, x1, x2)

inst_36718:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x828003ff; valaddr_reg:x3; val_offset:110154*0 + 3*622*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110154*0 + 3*622*FLEN/8, x4, x1, x2)

inst_36719:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x828007ff; valaddr_reg:x3; val_offset:110157*0 + 3*623*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110157*0 + 3*623*FLEN/8, x4, x1, x2)

inst_36720:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x82800fff; valaddr_reg:x3; val_offset:110160*0 + 3*624*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110160*0 + 3*624*FLEN/8, x4, x1, x2)

inst_36721:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x82801fff; valaddr_reg:x3; val_offset:110163*0 + 3*625*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110163*0 + 3*625*FLEN/8, x4, x1, x2)

inst_36722:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x82803fff; valaddr_reg:x3; val_offset:110166*0 + 3*626*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110166*0 + 3*626*FLEN/8, x4, x1, x2)

inst_36723:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x82807fff; valaddr_reg:x3; val_offset:110169*0 + 3*627*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110169*0 + 3*627*FLEN/8, x4, x1, x2)

inst_36724:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x8280ffff; valaddr_reg:x3; val_offset:110172*0 + 3*628*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110172*0 + 3*628*FLEN/8, x4, x1, x2)

inst_36725:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x8281ffff; valaddr_reg:x3; val_offset:110175*0 + 3*629*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110175*0 + 3*629*FLEN/8, x4, x1, x2)

inst_36726:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x8283ffff; valaddr_reg:x3; val_offset:110178*0 + 3*630*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110178*0 + 3*630*FLEN/8, x4, x1, x2)

inst_36727:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x8287ffff; valaddr_reg:x3; val_offset:110181*0 + 3*631*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110181*0 + 3*631*FLEN/8, x4, x1, x2)

inst_36728:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x828fffff; valaddr_reg:x3; val_offset:110184*0 + 3*632*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110184*0 + 3*632*FLEN/8, x4, x1, x2)

inst_36729:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x829fffff; valaddr_reg:x3; val_offset:110187*0 + 3*633*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110187*0 + 3*633*FLEN/8, x4, x1, x2)

inst_36730:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x82bfffff; valaddr_reg:x3; val_offset:110190*0 + 3*634*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110190*0 + 3*634*FLEN/8, x4, x1, x2)

inst_36731:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x82c00000; valaddr_reg:x3; val_offset:110193*0 + 3*635*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110193*0 + 3*635*FLEN/8, x4, x1, x2)

inst_36732:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x82e00000; valaddr_reg:x3; val_offset:110196*0 + 3*636*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110196*0 + 3*636*FLEN/8, x4, x1, x2)

inst_36733:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x82f00000; valaddr_reg:x3; val_offset:110199*0 + 3*637*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110199*0 + 3*637*FLEN/8, x4, x1, x2)

inst_36734:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x82f80000; valaddr_reg:x3; val_offset:110202*0 + 3*638*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110202*0 + 3*638*FLEN/8, x4, x1, x2)

inst_36735:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x82fc0000; valaddr_reg:x3; val_offset:110205*0 + 3*639*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110205*0 + 3*639*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_6)

inst_36736:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x82fe0000; valaddr_reg:x3; val_offset:110208*0 + 3*640*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110208*0 + 3*640*FLEN/8, x4, x1, x2)

inst_36737:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x82ff0000; valaddr_reg:x3; val_offset:110211*0 + 3*641*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110211*0 + 3*641*FLEN/8, x4, x1, x2)

inst_36738:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x82ff8000; valaddr_reg:x3; val_offset:110214*0 + 3*642*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110214*0 + 3*642*FLEN/8, x4, x1, x2)

inst_36739:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x82ffc000; valaddr_reg:x3; val_offset:110217*0 + 3*643*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110217*0 + 3*643*FLEN/8, x4, x1, x2)

inst_36740:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x82ffe000; valaddr_reg:x3; val_offset:110220*0 + 3*644*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110220*0 + 3*644*FLEN/8, x4, x1, x2)

inst_36741:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x82fff000; valaddr_reg:x3; val_offset:110223*0 + 3*645*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110223*0 + 3*645*FLEN/8, x4, x1, x2)

inst_36742:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x82fff800; valaddr_reg:x3; val_offset:110226*0 + 3*646*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110226*0 + 3*646*FLEN/8, x4, x1, x2)

inst_36743:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x82fffc00; valaddr_reg:x3; val_offset:110229*0 + 3*647*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110229*0 + 3*647*FLEN/8, x4, x1, x2)

inst_36744:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x82fffe00; valaddr_reg:x3; val_offset:110232*0 + 3*648*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110232*0 + 3*648*FLEN/8, x4, x1, x2)

inst_36745:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x82ffff00; valaddr_reg:x3; val_offset:110235*0 + 3*649*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110235*0 + 3*649*FLEN/8, x4, x1, x2)

inst_36746:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x82ffff80; valaddr_reg:x3; val_offset:110238*0 + 3*650*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110238*0 + 3*650*FLEN/8, x4, x1, x2)

inst_36747:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x82ffffc0; valaddr_reg:x3; val_offset:110241*0 + 3*651*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110241*0 + 3*651*FLEN/8, x4, x1, x2)

inst_36748:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x82ffffe0; valaddr_reg:x3; val_offset:110244*0 + 3*652*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110244*0 + 3*652*FLEN/8, x4, x1, x2)

inst_36749:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x82fffff0; valaddr_reg:x3; val_offset:110247*0 + 3*653*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110247*0 + 3*653*FLEN/8, x4, x1, x2)

inst_36750:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x82fffff8; valaddr_reg:x3; val_offset:110250*0 + 3*654*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110250*0 + 3*654*FLEN/8, x4, x1, x2)

inst_36751:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x82fffffc; valaddr_reg:x3; val_offset:110253*0 + 3*655*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110253*0 + 3*655*FLEN/8, x4, x1, x2)

inst_36752:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x82fffffe; valaddr_reg:x3; val_offset:110256*0 + 3*656*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110256*0 + 3*656*FLEN/8, x4, x1, x2)

inst_36753:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x36dceb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f36dceb; op2val:0x80000000;
op3val:0x82ffffff; valaddr_reg:x3; val_offset:110259*0 + 3*657*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110259*0 + 3*657*FLEN/8, x4, x1, x2)

inst_36754:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:110262*0 + 3*658*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110262*0 + 3*658*FLEN/8, x4, x1, x2)

inst_36755:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:110265*0 + 3*659*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110265*0 + 3*659*FLEN/8, x4, x1, x2)

inst_36756:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:110268*0 + 3*660*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110268*0 + 3*660*FLEN/8, x4, x1, x2)

inst_36757:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0x199999; valaddr_reg:x3; val_offset:110271*0 + 3*661*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110271*0 + 3*661*FLEN/8, x4, x1, x2)

inst_36758:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0x249249; valaddr_reg:x3; val_offset:110274*0 + 3*662*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110274*0 + 3*662*FLEN/8, x4, x1, x2)

inst_36759:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0x333333; valaddr_reg:x3; val_offset:110277*0 + 3*663*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110277*0 + 3*663*FLEN/8, x4, x1, x2)

inst_36760:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0x36db6d; valaddr_reg:x3; val_offset:110280*0 + 3*664*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110280*0 + 3*664*FLEN/8, x4, x1, x2)

inst_36761:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0x3bbbbb; valaddr_reg:x3; val_offset:110283*0 + 3*665*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110283*0 + 3*665*FLEN/8, x4, x1, x2)

inst_36762:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0x444444; valaddr_reg:x3; val_offset:110286*0 + 3*666*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110286*0 + 3*666*FLEN/8, x4, x1, x2)

inst_36763:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0x4ccccc; valaddr_reg:x3; val_offset:110289*0 + 3*667*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110289*0 + 3*667*FLEN/8, x4, x1, x2)

inst_36764:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0x5b6db6; valaddr_reg:x3; val_offset:110292*0 + 3*668*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110292*0 + 3*668*FLEN/8, x4, x1, x2)

inst_36765:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0x666666; valaddr_reg:x3; val_offset:110295*0 + 3*669*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110295*0 + 3*669*FLEN/8, x4, x1, x2)

inst_36766:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0x6db6db; valaddr_reg:x3; val_offset:110298*0 + 3*670*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110298*0 + 3*670*FLEN/8, x4, x1, x2)

inst_36767:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0x7ffff8; valaddr_reg:x3; val_offset:110301*0 + 3*671*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110301*0 + 3*671*FLEN/8, x4, x1, x2)

inst_36768:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0x7ffffc; valaddr_reg:x3; val_offset:110304*0 + 3*672*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110304*0 + 3*672*FLEN/8, x4, x1, x2)

inst_36769:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0x7ffffe; valaddr_reg:x3; val_offset:110307*0 + 3*673*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110307*0 + 3*673*FLEN/8, x4, x1, x2)

inst_36770:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa000000; valaddr_reg:x3; val_offset:110310*0 + 3*674*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110310*0 + 3*674*FLEN/8, x4, x1, x2)

inst_36771:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa000001; valaddr_reg:x3; val_offset:110313*0 + 3*675*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110313*0 + 3*675*FLEN/8, x4, x1, x2)

inst_36772:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa000003; valaddr_reg:x3; val_offset:110316*0 + 3*676*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110316*0 + 3*676*FLEN/8, x4, x1, x2)

inst_36773:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa000007; valaddr_reg:x3; val_offset:110319*0 + 3*677*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110319*0 + 3*677*FLEN/8, x4, x1, x2)

inst_36774:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa00000f; valaddr_reg:x3; val_offset:110322*0 + 3*678*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110322*0 + 3*678*FLEN/8, x4, x1, x2)

inst_36775:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa00001f; valaddr_reg:x3; val_offset:110325*0 + 3*679*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110325*0 + 3*679*FLEN/8, x4, x1, x2)

inst_36776:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa00003f; valaddr_reg:x3; val_offset:110328*0 + 3*680*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110328*0 + 3*680*FLEN/8, x4, x1, x2)

inst_36777:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa00007f; valaddr_reg:x3; val_offset:110331*0 + 3*681*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110331*0 + 3*681*FLEN/8, x4, x1, x2)

inst_36778:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa0000ff; valaddr_reg:x3; val_offset:110334*0 + 3*682*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110334*0 + 3*682*FLEN/8, x4, x1, x2)

inst_36779:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa0001ff; valaddr_reg:x3; val_offset:110337*0 + 3*683*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110337*0 + 3*683*FLEN/8, x4, x1, x2)

inst_36780:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa0003ff; valaddr_reg:x3; val_offset:110340*0 + 3*684*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110340*0 + 3*684*FLEN/8, x4, x1, x2)

inst_36781:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa0007ff; valaddr_reg:x3; val_offset:110343*0 + 3*685*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110343*0 + 3*685*FLEN/8, x4, x1, x2)

inst_36782:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa000fff; valaddr_reg:x3; val_offset:110346*0 + 3*686*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110346*0 + 3*686*FLEN/8, x4, x1, x2)

inst_36783:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa001fff; valaddr_reg:x3; val_offset:110349*0 + 3*687*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110349*0 + 3*687*FLEN/8, x4, x1, x2)

inst_36784:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa003fff; valaddr_reg:x3; val_offset:110352*0 + 3*688*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110352*0 + 3*688*FLEN/8, x4, x1, x2)

inst_36785:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa007fff; valaddr_reg:x3; val_offset:110355*0 + 3*689*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110355*0 + 3*689*FLEN/8, x4, x1, x2)

inst_36786:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa00ffff; valaddr_reg:x3; val_offset:110358*0 + 3*690*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110358*0 + 3*690*FLEN/8, x4, x1, x2)

inst_36787:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa01ffff; valaddr_reg:x3; val_offset:110361*0 + 3*691*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110361*0 + 3*691*FLEN/8, x4, x1, x2)

inst_36788:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa03ffff; valaddr_reg:x3; val_offset:110364*0 + 3*692*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110364*0 + 3*692*FLEN/8, x4, x1, x2)

inst_36789:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa07ffff; valaddr_reg:x3; val_offset:110367*0 + 3*693*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110367*0 + 3*693*FLEN/8, x4, x1, x2)

inst_36790:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa0fffff; valaddr_reg:x3; val_offset:110370*0 + 3*694*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110370*0 + 3*694*FLEN/8, x4, x1, x2)

inst_36791:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa1fffff; valaddr_reg:x3; val_offset:110373*0 + 3*695*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110373*0 + 3*695*FLEN/8, x4, x1, x2)

inst_36792:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa3fffff; valaddr_reg:x3; val_offset:110376*0 + 3*696*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110376*0 + 3*696*FLEN/8, x4, x1, x2)

inst_36793:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa400000; valaddr_reg:x3; val_offset:110379*0 + 3*697*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110379*0 + 3*697*FLEN/8, x4, x1, x2)

inst_36794:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa600000; valaddr_reg:x3; val_offset:110382*0 + 3*698*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110382*0 + 3*698*FLEN/8, x4, x1, x2)

inst_36795:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa700000; valaddr_reg:x3; val_offset:110385*0 + 3*699*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110385*0 + 3*699*FLEN/8, x4, x1, x2)

inst_36796:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa780000; valaddr_reg:x3; val_offset:110388*0 + 3*700*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110388*0 + 3*700*FLEN/8, x4, x1, x2)

inst_36797:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa7c0000; valaddr_reg:x3; val_offset:110391*0 + 3*701*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110391*0 + 3*701*FLEN/8, x4, x1, x2)

inst_36798:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa7e0000; valaddr_reg:x3; val_offset:110394*0 + 3*702*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110394*0 + 3*702*FLEN/8, x4, x1, x2)

inst_36799:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa7f0000; valaddr_reg:x3; val_offset:110397*0 + 3*703*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110397*0 + 3*703*FLEN/8, x4, x1, x2)

inst_36800:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa7f8000; valaddr_reg:x3; val_offset:110400*0 + 3*704*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110400*0 + 3*704*FLEN/8, x4, x1, x2)

inst_36801:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa7fc000; valaddr_reg:x3; val_offset:110403*0 + 3*705*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110403*0 + 3*705*FLEN/8, x4, x1, x2)

inst_36802:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa7fe000; valaddr_reg:x3; val_offset:110406*0 + 3*706*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110406*0 + 3*706*FLEN/8, x4, x1, x2)

inst_36803:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa7ff000; valaddr_reg:x3; val_offset:110409*0 + 3*707*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110409*0 + 3*707*FLEN/8, x4, x1, x2)

inst_36804:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa7ff800; valaddr_reg:x3; val_offset:110412*0 + 3*708*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110412*0 + 3*708*FLEN/8, x4, x1, x2)

inst_36805:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa7ffc00; valaddr_reg:x3; val_offset:110415*0 + 3*709*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110415*0 + 3*709*FLEN/8, x4, x1, x2)

inst_36806:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa7ffe00; valaddr_reg:x3; val_offset:110418*0 + 3*710*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110418*0 + 3*710*FLEN/8, x4, x1, x2)

inst_36807:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa7fff00; valaddr_reg:x3; val_offset:110421*0 + 3*711*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110421*0 + 3*711*FLEN/8, x4, x1, x2)

inst_36808:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa7fff80; valaddr_reg:x3; val_offset:110424*0 + 3*712*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110424*0 + 3*712*FLEN/8, x4, x1, x2)

inst_36809:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa7fffc0; valaddr_reg:x3; val_offset:110427*0 + 3*713*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110427*0 + 3*713*FLEN/8, x4, x1, x2)

inst_36810:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa7fffe0; valaddr_reg:x3; val_offset:110430*0 + 3*714*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110430*0 + 3*714*FLEN/8, x4, x1, x2)

inst_36811:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa7ffff0; valaddr_reg:x3; val_offset:110433*0 + 3*715*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110433*0 + 3*715*FLEN/8, x4, x1, x2)

inst_36812:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa7ffff8; valaddr_reg:x3; val_offset:110436*0 + 3*716*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110436*0 + 3*716*FLEN/8, x4, x1, x2)

inst_36813:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa7ffffc; valaddr_reg:x3; val_offset:110439*0 + 3*717*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110439*0 + 3*717*FLEN/8, x4, x1, x2)

inst_36814:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa7ffffe; valaddr_reg:x3; val_offset:110442*0 + 3*718*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110442*0 + 3*718*FLEN/8, x4, x1, x2)

inst_36815:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d6e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37d6e4; op2val:0x0;
op3val:0xa7fffff; valaddr_reg:x3; val_offset:110445*0 + 3*719*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110445*0 + 3*719*FLEN/8, x4, x1, x2)

inst_36816:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x29800000; valaddr_reg:x3; val_offset:110448*0 + 3*720*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110448*0 + 3*720*FLEN/8, x4, x1, x2)

inst_36817:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x29800001; valaddr_reg:x3; val_offset:110451*0 + 3*721*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110451*0 + 3*721*FLEN/8, x4, x1, x2)

inst_36818:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x29800003; valaddr_reg:x3; val_offset:110454*0 + 3*722*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110454*0 + 3*722*FLEN/8, x4, x1, x2)

inst_36819:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x29800007; valaddr_reg:x3; val_offset:110457*0 + 3*723*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110457*0 + 3*723*FLEN/8, x4, x1, x2)

inst_36820:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x2980000f; valaddr_reg:x3; val_offset:110460*0 + 3*724*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110460*0 + 3*724*FLEN/8, x4, x1, x2)

inst_36821:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x2980001f; valaddr_reg:x3; val_offset:110463*0 + 3*725*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110463*0 + 3*725*FLEN/8, x4, x1, x2)

inst_36822:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x2980003f; valaddr_reg:x3; val_offset:110466*0 + 3*726*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110466*0 + 3*726*FLEN/8, x4, x1, x2)

inst_36823:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x2980007f; valaddr_reg:x3; val_offset:110469*0 + 3*727*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110469*0 + 3*727*FLEN/8, x4, x1, x2)

inst_36824:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x298000ff; valaddr_reg:x3; val_offset:110472*0 + 3*728*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110472*0 + 3*728*FLEN/8, x4, x1, x2)

inst_36825:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x298001ff; valaddr_reg:x3; val_offset:110475*0 + 3*729*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110475*0 + 3*729*FLEN/8, x4, x1, x2)

inst_36826:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x298003ff; valaddr_reg:x3; val_offset:110478*0 + 3*730*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110478*0 + 3*730*FLEN/8, x4, x1, x2)

inst_36827:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x298007ff; valaddr_reg:x3; val_offset:110481*0 + 3*731*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110481*0 + 3*731*FLEN/8, x4, x1, x2)

inst_36828:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x29800fff; valaddr_reg:x3; val_offset:110484*0 + 3*732*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110484*0 + 3*732*FLEN/8, x4, x1, x2)

inst_36829:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x29801fff; valaddr_reg:x3; val_offset:110487*0 + 3*733*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110487*0 + 3*733*FLEN/8, x4, x1, x2)

inst_36830:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x29803fff; valaddr_reg:x3; val_offset:110490*0 + 3*734*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110490*0 + 3*734*FLEN/8, x4, x1, x2)

inst_36831:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x29807fff; valaddr_reg:x3; val_offset:110493*0 + 3*735*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110493*0 + 3*735*FLEN/8, x4, x1, x2)

inst_36832:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x2980ffff; valaddr_reg:x3; val_offset:110496*0 + 3*736*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110496*0 + 3*736*FLEN/8, x4, x1, x2)

inst_36833:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x2981ffff; valaddr_reg:x3; val_offset:110499*0 + 3*737*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110499*0 + 3*737*FLEN/8, x4, x1, x2)

inst_36834:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x2983ffff; valaddr_reg:x3; val_offset:110502*0 + 3*738*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110502*0 + 3*738*FLEN/8, x4, x1, x2)

inst_36835:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x2987ffff; valaddr_reg:x3; val_offset:110505*0 + 3*739*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110505*0 + 3*739*FLEN/8, x4, x1, x2)

inst_36836:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x298fffff; valaddr_reg:x3; val_offset:110508*0 + 3*740*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110508*0 + 3*740*FLEN/8, x4, x1, x2)

inst_36837:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x299fffff; valaddr_reg:x3; val_offset:110511*0 + 3*741*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110511*0 + 3*741*FLEN/8, x4, x1, x2)

inst_36838:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x29bfffff; valaddr_reg:x3; val_offset:110514*0 + 3*742*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110514*0 + 3*742*FLEN/8, x4, x1, x2)

inst_36839:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x29c00000; valaddr_reg:x3; val_offset:110517*0 + 3*743*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110517*0 + 3*743*FLEN/8, x4, x1, x2)

inst_36840:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x29e00000; valaddr_reg:x3; val_offset:110520*0 + 3*744*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110520*0 + 3*744*FLEN/8, x4, x1, x2)

inst_36841:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x29f00000; valaddr_reg:x3; val_offset:110523*0 + 3*745*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110523*0 + 3*745*FLEN/8, x4, x1, x2)

inst_36842:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x29f80000; valaddr_reg:x3; val_offset:110526*0 + 3*746*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110526*0 + 3*746*FLEN/8, x4, x1, x2)

inst_36843:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x29fc0000; valaddr_reg:x3; val_offset:110529*0 + 3*747*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110529*0 + 3*747*FLEN/8, x4, x1, x2)

inst_36844:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x29fe0000; valaddr_reg:x3; val_offset:110532*0 + 3*748*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110532*0 + 3*748*FLEN/8, x4, x1, x2)

inst_36845:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x29ff0000; valaddr_reg:x3; val_offset:110535*0 + 3*749*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110535*0 + 3*749*FLEN/8, x4, x1, x2)

inst_36846:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x29ff8000; valaddr_reg:x3; val_offset:110538*0 + 3*750*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110538*0 + 3*750*FLEN/8, x4, x1, x2)

inst_36847:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x29ffc000; valaddr_reg:x3; val_offset:110541*0 + 3*751*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110541*0 + 3*751*FLEN/8, x4, x1, x2)

inst_36848:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x29ffe000; valaddr_reg:x3; val_offset:110544*0 + 3*752*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110544*0 + 3*752*FLEN/8, x4, x1, x2)

inst_36849:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x29fff000; valaddr_reg:x3; val_offset:110547*0 + 3*753*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110547*0 + 3*753*FLEN/8, x4, x1, x2)

inst_36850:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x29fff800; valaddr_reg:x3; val_offset:110550*0 + 3*754*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110550*0 + 3*754*FLEN/8, x4, x1, x2)

inst_36851:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x29fffc00; valaddr_reg:x3; val_offset:110553*0 + 3*755*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110553*0 + 3*755*FLEN/8, x4, x1, x2)

inst_36852:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x29fffe00; valaddr_reg:x3; val_offset:110556*0 + 3*756*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110556*0 + 3*756*FLEN/8, x4, x1, x2)

inst_36853:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x29ffff00; valaddr_reg:x3; val_offset:110559*0 + 3*757*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110559*0 + 3*757*FLEN/8, x4, x1, x2)

inst_36854:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x29ffff80; valaddr_reg:x3; val_offset:110562*0 + 3*758*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110562*0 + 3*758*FLEN/8, x4, x1, x2)

inst_36855:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x29ffffc0; valaddr_reg:x3; val_offset:110565*0 + 3*759*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110565*0 + 3*759*FLEN/8, x4, x1, x2)

inst_36856:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x29ffffe0; valaddr_reg:x3; val_offset:110568*0 + 3*760*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110568*0 + 3*760*FLEN/8, x4, x1, x2)

inst_36857:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x29fffff0; valaddr_reg:x3; val_offset:110571*0 + 3*761*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110571*0 + 3*761*FLEN/8, x4, x1, x2)

inst_36858:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x29fffff8; valaddr_reg:x3; val_offset:110574*0 + 3*762*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110574*0 + 3*762*FLEN/8, x4, x1, x2)

inst_36859:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x29fffffc; valaddr_reg:x3; val_offset:110577*0 + 3*763*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110577*0 + 3*763*FLEN/8, x4, x1, x2)

inst_36860:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x29fffffe; valaddr_reg:x3; val_offset:110580*0 + 3*764*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110580*0 + 3*764*FLEN/8, x4, x1, x2)

inst_36861:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x29ffffff; valaddr_reg:x3; val_offset:110583*0 + 3*765*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110583*0 + 3*765*FLEN/8, x4, x1, x2)

inst_36862:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x3f800001; valaddr_reg:x3; val_offset:110586*0 + 3*766*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110586*0 + 3*766*FLEN/8, x4, x1, x2)

inst_36863:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x381006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2c81b0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f381006; op2val:0x2c81b0;
op3val:0x3f800003; valaddr_reg:x3; val_offset:110589*0 + 3*767*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110589*0 + 3*767*FLEN/8, x4, x1, x2)
#endif


RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x88000ff,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x88001ff,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x88003ff,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x88007ff,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8800fff,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8801fff,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8803fff,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8807fff,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x880ffff,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x881ffff,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x883ffff,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x887ffff,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x88fffff,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x89fffff,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8bfffff,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8c00000,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8e00000,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8f00000,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8f80000,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8fc0000,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8fe0000,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8ff0000,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8ff8000,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8ffc000,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8ffe000,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8fff000,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8fff800,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8fffc00,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8fffe00,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8ffff00,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8ffff80,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8ffffc0,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8ffffe0,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8fffff0,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8fffff8,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8fffffc,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8fffffe,32,FLEN)
NAN_BOXED(0x7f344cc5,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8ffffff,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e000000,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e000001,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e000003,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e000007,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e00000f,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e00001f,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e00003f,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e00007f,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e0000ff,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e0001ff,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e0003ff,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e0007ff,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e000fff,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e001fff,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e003fff,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e007fff,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e00ffff,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e01ffff,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e03ffff,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e07ffff,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e0fffff,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e1fffff,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e3fffff,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e400000,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e600000,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e700000,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e780000,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e7c0000,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e7e0000,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e7f0000,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e7f8000,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e7fc000,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e7fe000,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e7ff000,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e7ff800,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e7ffc00,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e7ffe00,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e7fff00,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e7fff80,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e7fffc0,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e7fffe0,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e7ffff0,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e7ffff8,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e7ffffc,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e7ffffe,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x2e7fffff,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x3f800001,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x3f800003,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x3f800007,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x3f999999,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x3fa49249,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x3fb33333,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x3fb6db6d,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x3fbbbbbb,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x3fc44444,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x3fcccccc,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x3fdb6db6,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x3fe66666,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x3fedb6db,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x3ffffff8,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x3ffffffc,32,FLEN)
NAN_BOXED(0x7f34996a,32,FLEN)
NAN_BOXED(0x2d5c2f,32,FLEN)
NAN_BOXED(0x3ffffffe,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa4000000,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa4000001,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa4000003,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa4000007,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa400000f,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa400001f,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa400003f,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa400007f,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa40000ff,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa40001ff,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa40003ff,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa40007ff,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa4000fff,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa4001fff,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa4003fff,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa4007fff,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa400ffff,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa401ffff,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa403ffff,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa407ffff,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa40fffff,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa41fffff,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa43fffff,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa4400000,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa4600000,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa4700000,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa4780000,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa47c0000,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa47e0000,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa47f0000,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa47f8000,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa47fc000,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa47fe000,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa47ff000,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa47ff800,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa47ffc00,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa47ffe00,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa47fff00,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa47fff80,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa47fffc0,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa47fffe0,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa47ffff0,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa47ffff8,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa47ffffc,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa47ffffe,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xa47fffff,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7f351b7f,32,FLEN)
NAN_BOXED(0x802d3b9a,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800001,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800003,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800007,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x999999,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa49249,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb33333,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb6db6d,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbbbbbb,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc44444,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcccccc,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdb6db6,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe66666,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xedb6db,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffff8,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffc,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffe,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xd800000,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xd800001,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xd800003,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xd800007,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xd80000f,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xd80001f,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xd80003f,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xd80007f,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xd8000ff,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xd8001ff,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xd8003ff,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xd8007ff,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xd800fff,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xd801fff,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xd803fff,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xd807fff,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xd80ffff,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xd81ffff,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xd83ffff,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xd87ffff,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xd8fffff,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xd9fffff,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdbfffff,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdc00000,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xde00000,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdf00000,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdf80000,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdfc0000,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdfe0000,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdff0000,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdff8000,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdffc000,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdffe000,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdfff000,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdfff800,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdfffc00,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdfffe00,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdffff00,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdffff80,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdffffc0,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdffffe0,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdfffff0,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdfffff8,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdfffffc,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdfffffe,32,FLEN)
NAN_BOXED(0x7f354a49,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdffffff,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800001,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800003,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800007,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x999999,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa49249,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb33333,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb6db6d,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbbbbbb,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc44444,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcccccc,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdb6db6,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe66666,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xedb6db,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffff8,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffc,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffe,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf000000,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf000001,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf000003,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf000007,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf00000f,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf00001f,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf00003f,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf00007f,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf0000ff,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf0001ff,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf0003ff,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf0007ff,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf000fff,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf001fff,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf003fff,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf007fff,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf00ffff,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf01ffff,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf03ffff,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf07ffff,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf0fffff,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf1fffff,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf3fffff,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf400000,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf600000,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf700000,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf780000,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf7c0000,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf7e0000,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf7f0000,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf7f8000,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf7fc000,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf7fe000,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf7ff000,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf7ff800,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf7ffc00,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf7ffe00,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf7fff00,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf7fff80,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf7fffc0,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf7fffe0,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf7ffff0,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf7ffff8,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf7ffffc,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf7ffffe,32,FLEN)
NAN_BOXED(0x7f355590,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf7fffff,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2a800000,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2a800001,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2a800003,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2a800007,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2a80000f,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2a80001f,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2a80003f,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2a80007f,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2a8000ff,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2a8001ff,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2a8003ff,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2a8007ff,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2a800fff,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2a801fff,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2a803fff,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2a807fff,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2a80ffff,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2a81ffff,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2a83ffff,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2a87ffff,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2a8fffff,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2a9fffff,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2abfffff,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2ac00000,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2ae00000,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2af00000,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2af80000,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
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NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
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NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2aff0000,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2aff8000,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2affc000,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2affe000,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2afff000,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2afff800,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
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NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
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NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
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NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
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NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
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NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2affffe0,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2afffff0,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x2afffff8,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
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NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
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NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
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NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
NAN_BOXED(0x7f000001,32,FLEN)
NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
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NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
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NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
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NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
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NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
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NAN_BOXED(0x7f3572c4,32,FLEN)
NAN_BOXED(0x3fb49763,32,FLEN)
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NAN_BOXED(0x7f3572c4,32,FLEN)
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NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x7780ffff,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x7781ffff,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x7783ffff,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x7787ffff,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x778fffff,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x779fffff,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x77bfffff,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x77c00000,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x77e00000,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x77f00000,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x77f80000,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x77fc0000,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x77fe0000,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x77ff0000,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x77ff8000,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x77ffc000,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x77ffe000,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x77fff000,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x77fff800,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x77fffc00,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x77fffe00,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x77ffff00,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x77ffff80,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x77ffffc0,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x77ffffe0,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x77fffff0,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x77fffff8,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x77fffffc,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x77fffffe,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x77ffffff,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x7f000001,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x7f000003,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x7f000007,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x7f199999,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x7f249249,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x7f333333,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x7f36db6d,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x7f3bbbbb,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x7f444444,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x7f4ccccc,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x7f5b6db6,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x7f666666,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x7f6db6db,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x7f7ffff8,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x7f7ffffc,32,FLEN)
NAN_BOXED(0x7f35c5b2,32,FLEN)
NAN_BOXED(0x3fb444ff,32,FLEN)
NAN_BOXED(0x7f7ffffe,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa6000000,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa6000001,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa6000003,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa6000007,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa600000f,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa600001f,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa600003f,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa600007f,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa60000ff,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa60001ff,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa60003ff,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa60007ff,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa6000fff,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa6001fff,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa6003fff,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa6007fff,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa600ffff,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa601ffff,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa603ffff,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa607ffff,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa60fffff,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa61fffff,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa63fffff,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa6400000,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa6600000,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa6700000,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa6780000,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa67c0000,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa67e0000,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa67f0000,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa67f8000,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa67fc000,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa67fe000,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa67ff000,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa67ff800,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa67ffc00,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa67ffe00,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa67fff00,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa67fff80,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa67fffc0,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa67fffe0,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa67ffff0,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa67ffff8,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa67ffffc,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa67ffffe,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xa67fffff,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
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NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7f366e51,32,FLEN)
NAN_BOXED(0x802ce798,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x199999,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
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NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
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NAN_BOXED(0x7f36749a,32,FLEN)
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NAN_BOXED(0x7f36749a,32,FLEN)
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NAN_BOXED(0x3bbbbb,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x444444,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ccccc,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
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NAN_BOXED(0x5b6db6,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x666666,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6db6db,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff8,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffc,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffe,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800000,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800001,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800003,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800007,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x80000f,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x80001f,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x80003f,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x80007f,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8000ff,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8001ff,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8003ff,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8007ff,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800fff,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x801fff,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x803fff,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x807fff,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x80ffff,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x81ffff,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x83ffff,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87ffff,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8fffff,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x9fffff,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbfffff,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc00000,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe00000,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf00000,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf80000,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfc0000,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfe0000,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xff0000,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xff8000,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xffc000,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xffe000,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfff000,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfff800,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffc00,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffe00,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xffff00,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xffff80,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xffffc0,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xffffe0,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffff0,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffff8,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffc,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffe,32,FLEN)
NAN_BOXED(0x7f36749a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xffffff,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x199999,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x249249,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x333333,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x36db6d,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3bbbbb,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x444444,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ccccc,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5b6db6,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x666666,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6db6db,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff8,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffc,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffe,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5800000,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5800001,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5800003,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5800007,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x580000f,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x580001f,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x580003f,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x580007f,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x58000ff,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x58001ff,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x58003ff,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x58007ff,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5800fff,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5801fff,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5803fff,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5807fff,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x580ffff,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x581ffff,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x583ffff,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x587ffff,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x58fffff,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x59fffff,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5bfffff,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5c00000,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5e00000,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5f00000,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5f80000,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5fc0000,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5fe0000,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5ff0000,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5ff8000,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5ffc000,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5ffe000,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5fff000,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5fff800,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5fffc00,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5fffe00,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5ffff00,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5ffff80,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5ffffc0,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5ffffe0,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5fffff0,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5fffff8,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5fffffc,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5fffffe,32,FLEN)
NAN_BOXED(0x7f368869,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5ffffff,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000001,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000003,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000007,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80199999,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80249249,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80333333,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8036db6d,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x803bbbbb,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80444444,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x804ccccc,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x805b6db6,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80666666,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x806db6db,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffff8,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffc,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffe,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82800000,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82800001,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82800003,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82800007,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8280000f,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8280001f,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8280003f,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8280007f,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x828000ff,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x828001ff,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x828003ff,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x828007ff,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82800fff,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82801fff,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82803fff,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82807fff,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8280ffff,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8281ffff,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8283ffff,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8287ffff,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x828fffff,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x829fffff,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82bfffff,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82c00000,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82e00000,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82f00000,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82f80000,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82fc0000,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82fe0000,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82ff0000,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82ff8000,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82ffc000,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82ffe000,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82fff000,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82fff800,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82fffc00,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82fffe00,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82ffff00,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82ffff80,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82ffffc0,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82ffffe0,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82fffff0,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82fffff8,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82fffffc,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82fffffe,32,FLEN)
NAN_BOXED(0x7f36dceb,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82ffffff,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x199999,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x249249,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x333333,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x36db6d,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3bbbbb,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x444444,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ccccc,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5b6db6,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x666666,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6db6db,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff8,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffc,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffe,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa000000,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa000001,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa000003,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa000007,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa00000f,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa00001f,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa00003f,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa00007f,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa0000ff,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa0001ff,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa0003ff,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa0007ff,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa000fff,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa001fff,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa003fff,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa007fff,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa00ffff,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa01ffff,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa03ffff,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa07ffff,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa0fffff,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa1fffff,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa3fffff,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa400000,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa600000,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa700000,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa780000,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa7c0000,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa7e0000,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa7f0000,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa7f8000,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa7fc000,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa7fe000,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa7ff000,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa7ff800,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa7ffc00,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa7ffe00,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa7fff00,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa7fff80,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa7fffc0,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa7fffe0,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa7ffff0,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa7ffff8,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa7ffffc,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa7ffffe,32,FLEN)
NAN_BOXED(0x7f37d6e4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa7fffff,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x29800000,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x29800001,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x29800003,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x29800007,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x2980000f,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x2980001f,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x2980003f,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x2980007f,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x298000ff,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x298001ff,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x298003ff,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x298007ff,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x29800fff,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x29801fff,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x29803fff,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x29807fff,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x2980ffff,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x2981ffff,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x2983ffff,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x2987ffff,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x298fffff,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x299fffff,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x29bfffff,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x29c00000,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x29e00000,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x29f00000,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x29f80000,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x29fc0000,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x29fe0000,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x29ff0000,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x29ff8000,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x29ffc000,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x29ffe000,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x29fff000,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x29fff800,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x29fffc00,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x29fffe00,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x29ffff00,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x29ffff80,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x29ffffc0,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x29ffffe0,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x29fffff0,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x29fffff8,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x29fffffc,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x29fffffe,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x29ffffff,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x3f800001,32,FLEN)
NAN_BOXED(0x7f381006,32,FLEN)
NAN_BOXED(0x2c81b0,32,FLEN)
NAN_BOXED(0x3f800003,32,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;


signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_2:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_3:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_4:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_5:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_6:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine

tsig_begin_canary:
CANARY;
tsig_begin_canary:
CANARY;
mtrap_sigptr:
    .fill 64*(XLEN/32),4,0xdeadbeef
tsig_end_canary:
CANARY;
tsig_end_canary:
CANARY;

#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif

sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
