
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.11.0
// timestamp : Mon Feb  5 07:30:48 2024 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /home/riscv/riscv-ctg/sample_cgfs/dataset.cgf \
//                  --cgf /home/riscv/riscv-ctg/sample_cgfs/sample_cgfs_fext/RV64Zfinx/fnmadd.s.cgf \
 \
//                  -- xlen 64  \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fnmadd.s instruction of the RISC-V RV64_Zfinx,RV64_Zdinx extension for the fnmadd_b15 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV64I_Zfinx,RV64I_Zdinx")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*Zfinx.*);def TEST_CASE_1=True;",fnmadd_b15)

RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_4602:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x788209 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41edf2 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef88209; op2val:0x41edf2;
op3val:0x207ffff0; valaddr_reg:x12; val_offset:13743*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13743*FLEN/8, x13, x9, x10)

inst_4603:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x788209 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41edf2 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef88209; op2val:0x41edf2;
op3val:0x2000000f; valaddr_reg:x12; val_offset:13746*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13746*FLEN/8, x13, x9, x10)

inst_4604:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x788209 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41edf2 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef88209; op2val:0x41edf2;
op3val:0x207ffff8; valaddr_reg:x12; val_offset:13749*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13749*FLEN/8, x13, x9, x10)

inst_4605:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x788209 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41edf2 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef88209; op2val:0x41edf2;
op3val:0x20000007; valaddr_reg:x12; val_offset:13752*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13752*FLEN/8, x13, x9, x10)

inst_4606:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x788209 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41edf2 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef88209; op2val:0x41edf2;
op3val:0x207ffffc; valaddr_reg:x12; val_offset:13755*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13755*FLEN/8, x13, x9, x10)

inst_4607:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x788209 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41edf2 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef88209; op2val:0x41edf2;
op3val:0x20000003; valaddr_reg:x12; val_offset:13758*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13758*FLEN/8, x13, x9, x10)

inst_4608:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x788209 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41edf2 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef88209; op2val:0x41edf2;
op3val:0x207ffffe; valaddr_reg:x12; val_offset:13761*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13761*FLEN/8, x13, x9, x10)

inst_4609:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x788209 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41edf2 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef88209; op2val:0x41edf2;
op3val:0x20000001; valaddr_reg:x12; val_offset:13764*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13764*FLEN/8, x13, x9, x10)

inst_4610:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x788209 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41edf2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef88209; op2val:0x41edf2;
op3val:0x3ffffff8; valaddr_reg:x12; val_offset:13767*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13767*FLEN/8, x13, x9, x10)

inst_4611:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x788209 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41edf2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef88209; op2val:0x41edf2;
op3val:0x3f800007; valaddr_reg:x12; val_offset:13770*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13770*FLEN/8, x13, x9, x10)

inst_4612:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x788209 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41edf2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef88209; op2val:0x41edf2;
op3val:0x3ffffffc; valaddr_reg:x12; val_offset:13773*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13773*FLEN/8, x13, x9, x10)

inst_4613:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x788209 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41edf2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef88209; op2val:0x41edf2;
op3val:0x3f800003; valaddr_reg:x12; val_offset:13776*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13776*FLEN/8, x13, x9, x10)

inst_4614:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x788209 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41edf2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef88209; op2val:0x41edf2;
op3val:0x3ffffffe; valaddr_reg:x12; val_offset:13779*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13779*FLEN/8, x13, x9, x10)

inst_4615:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x788209 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41edf2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef88209; op2val:0x41edf2;
op3val:0x3f800001; valaddr_reg:x12; val_offset:13782*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13782*FLEN/8, x13, x9, x10)

inst_4616:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x788209 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41edf2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef88209; op2val:0x41edf2;
op3val:0x3fb6db6d; valaddr_reg:x12; val_offset:13785*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13785*FLEN/8, x13, x9, x10)

inst_4617:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x788209 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41edf2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef88209; op2val:0x41edf2;
op3val:0x3fedb6db; valaddr_reg:x12; val_offset:13788*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13788*FLEN/8, x13, x9, x10)

inst_4618:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x788209 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41edf2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef88209; op2val:0x41edf2;
op3val:0x3f999999; valaddr_reg:x12; val_offset:13791*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13791*FLEN/8, x13, x9, x10)

inst_4619:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x788209 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41edf2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef88209; op2val:0x41edf2;
op3val:0x3fe66666; valaddr_reg:x12; val_offset:13794*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13794*FLEN/8, x13, x9, x10)

inst_4620:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x788209 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41edf2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef88209; op2val:0x41edf2;
op3val:0x3fbbbbbb; valaddr_reg:x12; val_offset:13797*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13797*FLEN/8, x13, x9, x10)

inst_4621:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x788209 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41edf2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef88209; op2val:0x41edf2;
op3val:0x3fc44444; valaddr_reg:x12; val_offset:13800*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13800*FLEN/8, x13, x9, x10)

inst_4622:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x788209 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41edf2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef88209; op2val:0x41edf2;
op3val:0x3fa49249; valaddr_reg:x12; val_offset:13803*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13803*FLEN/8, x13, x9, x10)

inst_4623:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x788209 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41edf2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef88209; op2val:0x41edf2;
op3val:0x3fdb6db6; valaddr_reg:x12; val_offset:13806*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13806*FLEN/8, x13, x9, x10)

inst_4624:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x788209 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41edf2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef88209; op2val:0x41edf2;
op3val:0x3fb33333; valaddr_reg:x12; val_offset:13809*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13809*FLEN/8, x13, x9, x10)

inst_4625:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x788209 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41edf2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef88209; op2val:0x41edf2;
op3val:0x3fcccccc; valaddr_reg:x12; val_offset:13812*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13812*FLEN/8, x13, x9, x10)

inst_4626:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x20800000; valaddr_reg:x12; val_offset:13815*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13815*FLEN/8, x13, x9, x10)

inst_4627:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x20ffffff; valaddr_reg:x12; val_offset:13818*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13818*FLEN/8, x13, x9, x10)

inst_4628:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x20c00000; valaddr_reg:x12; val_offset:13821*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13821*FLEN/8, x13, x9, x10)

inst_4629:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x20bfffff; valaddr_reg:x12; val_offset:13824*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13824*FLEN/8, x13, x9, x10)

inst_4630:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x20e00000; valaddr_reg:x12; val_offset:13827*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13827*FLEN/8, x13, x9, x10)

inst_4631:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x209fffff; valaddr_reg:x12; val_offset:13830*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13830*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_36)
inst_4632:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x20f00000; valaddr_reg:x12; val_offset:13833*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13833*FLEN/8, x13, x9, x10)

inst_4633:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x208fffff; valaddr_reg:x12; val_offset:13836*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13836*FLEN/8, x13, x9, x10)

inst_4634:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x20f80000; valaddr_reg:x12; val_offset:13839*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13839*FLEN/8, x13, x9, x10)

inst_4635:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x2087ffff; valaddr_reg:x12; val_offset:13842*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13842*FLEN/8, x13, x9, x10)

inst_4636:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x20fc0000; valaddr_reg:x12; val_offset:13845*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13845*FLEN/8, x13, x9, x10)

inst_4637:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x2083ffff; valaddr_reg:x12; val_offset:13848*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13848*FLEN/8, x13, x9, x10)

inst_4638:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x20fe0000; valaddr_reg:x12; val_offset:13851*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13851*FLEN/8, x13, x9, x10)

inst_4639:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x2081ffff; valaddr_reg:x12; val_offset:13854*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13854*FLEN/8, x13, x9, x10)

inst_4640:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x20ff0000; valaddr_reg:x12; val_offset:13857*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13857*FLEN/8, x13, x9, x10)

inst_4641:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x2080ffff; valaddr_reg:x12; val_offset:13860*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13860*FLEN/8, x13, x9, x10)

inst_4642:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x20ff8000; valaddr_reg:x12; val_offset:13863*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13863*FLEN/8, x13, x9, x10)

inst_4643:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x20807fff; valaddr_reg:x12; val_offset:13866*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13866*FLEN/8, x13, x9, x10)

inst_4644:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x20ffc000; valaddr_reg:x12; val_offset:13869*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13869*FLEN/8, x13, x9, x10)

inst_4645:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x20803fff; valaddr_reg:x12; val_offset:13872*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13872*FLEN/8, x13, x9, x10)

inst_4646:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x20ffe000; valaddr_reg:x12; val_offset:13875*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13875*FLEN/8, x13, x9, x10)

inst_4647:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x20801fff; valaddr_reg:x12; val_offset:13878*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13878*FLEN/8, x13, x9, x10)

inst_4648:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x20fff000; valaddr_reg:x12; val_offset:13881*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13881*FLEN/8, x13, x9, x10)

inst_4649:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x20800fff; valaddr_reg:x12; val_offset:13884*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13884*FLEN/8, x13, x9, x10)

inst_4650:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x20fff800; valaddr_reg:x12; val_offset:13887*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13887*FLEN/8, x13, x9, x10)

inst_4651:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x208007ff; valaddr_reg:x12; val_offset:13890*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13890*FLEN/8, x13, x9, x10)

inst_4652:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x20fffc00; valaddr_reg:x12; val_offset:13893*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13893*FLEN/8, x13, x9, x10)

inst_4653:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x208003ff; valaddr_reg:x12; val_offset:13896*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13896*FLEN/8, x13, x9, x10)

inst_4654:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x20fffe00; valaddr_reg:x12; val_offset:13899*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13899*FLEN/8, x13, x9, x10)

inst_4655:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x208001ff; valaddr_reg:x12; val_offset:13902*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13902*FLEN/8, x13, x9, x10)

inst_4656:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x20ffff00; valaddr_reg:x12; val_offset:13905*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13905*FLEN/8, x13, x9, x10)

inst_4657:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x208000ff; valaddr_reg:x12; val_offset:13908*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13908*FLEN/8, x13, x9, x10)

inst_4658:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x20ffff80; valaddr_reg:x12; val_offset:13911*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13911*FLEN/8, x13, x9, x10)

inst_4659:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x2080007f; valaddr_reg:x12; val_offset:13914*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13914*FLEN/8, x13, x9, x10)

inst_4660:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x20ffffc0; valaddr_reg:x12; val_offset:13917*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13917*FLEN/8, x13, x9, x10)

inst_4661:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x2080003f; valaddr_reg:x12; val_offset:13920*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13920*FLEN/8, x13, x9, x10)

inst_4662:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x20ffffe0; valaddr_reg:x12; val_offset:13923*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13923*FLEN/8, x13, x9, x10)

inst_4663:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x2080001f; valaddr_reg:x12; val_offset:13926*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13926*FLEN/8, x13, x9, x10)

inst_4664:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x20fffff0; valaddr_reg:x12; val_offset:13929*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13929*FLEN/8, x13, x9, x10)

inst_4665:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x2080000f; valaddr_reg:x12; val_offset:13932*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13932*FLEN/8, x13, x9, x10)

inst_4666:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x20fffff8; valaddr_reg:x12; val_offset:13935*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13935*FLEN/8, x13, x9, x10)

inst_4667:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x20800007; valaddr_reg:x12; val_offset:13938*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13938*FLEN/8, x13, x9, x10)

inst_4668:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x20fffffc; valaddr_reg:x12; val_offset:13941*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13941*FLEN/8, x13, x9, x10)

inst_4669:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x20800003; valaddr_reg:x12; val_offset:13944*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13944*FLEN/8, x13, x9, x10)

inst_4670:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x20fffffe; valaddr_reg:x12; val_offset:13947*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13947*FLEN/8, x13, x9, x10)

inst_4671:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x41 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x20800001; valaddr_reg:x12; val_offset:13950*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13950*FLEN/8, x13, x9, x10)

inst_4672:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x3ffffff8; valaddr_reg:x12; val_offset:13953*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13953*FLEN/8, x13, x9, x10)

inst_4673:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x3f800007; valaddr_reg:x12; val_offset:13956*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13956*FLEN/8, x13, x9, x10)

inst_4674:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x3ffffffc; valaddr_reg:x12; val_offset:13959*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13959*FLEN/8, x13, x9, x10)

inst_4675:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x3f800003; valaddr_reg:x12; val_offset:13962*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13962*FLEN/8, x13, x9, x10)

inst_4676:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x3ffffffe; valaddr_reg:x12; val_offset:13965*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13965*FLEN/8, x13, x9, x10)

inst_4677:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x3f800001; valaddr_reg:x12; val_offset:13968*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13968*FLEN/8, x13, x9, x10)

inst_4678:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x3fb6db6d; valaddr_reg:x12; val_offset:13971*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13971*FLEN/8, x13, x9, x10)

inst_4679:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x3fedb6db; valaddr_reg:x12; val_offset:13974*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13974*FLEN/8, x13, x9, x10)

inst_4680:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x3f999999; valaddr_reg:x12; val_offset:13977*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13977*FLEN/8, x13, x9, x10)

inst_4681:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x3fe66666; valaddr_reg:x12; val_offset:13980*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13980*FLEN/8, x13, x9, x10)

inst_4682:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x3fbbbbbb; valaddr_reg:x12; val_offset:13983*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13983*FLEN/8, x13, x9, x10)

inst_4683:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x3fc44444; valaddr_reg:x12; val_offset:13986*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13986*FLEN/8, x13, x9, x10)

inst_4684:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x3fa49249; valaddr_reg:x12; val_offset:13989*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13989*FLEN/8, x13, x9, x10)

inst_4685:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x3fdb6db6; valaddr_reg:x12; val_offset:13992*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13992*FLEN/8, x13, x9, x10)

inst_4686:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x3fb33333; valaddr_reg:x12; val_offset:13995*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13995*FLEN/8, x13, x9, x10)

inst_4687:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x017afc and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7d12b1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e017afc; op2val:0xfd12b1;
op3val:0x3fcccccc; valaddr_reg:x12; val_offset:13998*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 13998*FLEN/8, x13, x9, x10)

inst_4688:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x21000000; valaddr_reg:x12; val_offset:14001*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14001*FLEN/8, x13, x9, x10)

inst_4689:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x217fffff; valaddr_reg:x12; val_offset:14004*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14004*FLEN/8, x13, x9, x10)

inst_4690:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x21400000; valaddr_reg:x12; val_offset:14007*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14007*FLEN/8, x13, x9, x10)

inst_4691:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x213fffff; valaddr_reg:x12; val_offset:14010*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14010*FLEN/8, x13, x9, x10)

inst_4692:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x21600000; valaddr_reg:x12; val_offset:14013*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14013*FLEN/8, x13, x9, x10)

inst_4693:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x211fffff; valaddr_reg:x12; val_offset:14016*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14016*FLEN/8, x13, x9, x10)

inst_4694:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x21700000; valaddr_reg:x12; val_offset:14019*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14019*FLEN/8, x13, x9, x10)

inst_4695:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x210fffff; valaddr_reg:x12; val_offset:14022*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14022*FLEN/8, x13, x9, x10)

inst_4696:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x21780000; valaddr_reg:x12; val_offset:14025*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14025*FLEN/8, x13, x9, x10)

inst_4697:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x2107ffff; valaddr_reg:x12; val_offset:14028*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14028*FLEN/8, x13, x9, x10)

inst_4698:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x217c0000; valaddr_reg:x12; val_offset:14031*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14031*FLEN/8, x13, x9, x10)

inst_4699:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x2103ffff; valaddr_reg:x12; val_offset:14034*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14034*FLEN/8, x13, x9, x10)

inst_4700:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x217e0000; valaddr_reg:x12; val_offset:14037*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14037*FLEN/8, x13, x9, x10)

inst_4701:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x2101ffff; valaddr_reg:x12; val_offset:14040*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14040*FLEN/8, x13, x9, x10)

inst_4702:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x217f0000; valaddr_reg:x12; val_offset:14043*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14043*FLEN/8, x13, x9, x10)

inst_4703:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x2100ffff; valaddr_reg:x12; val_offset:14046*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14046*FLEN/8, x13, x9, x10)

inst_4704:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x217f8000; valaddr_reg:x12; val_offset:14049*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14049*FLEN/8, x13, x9, x10)

inst_4705:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x21007fff; valaddr_reg:x12; val_offset:14052*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14052*FLEN/8, x13, x9, x10)

inst_4706:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x217fc000; valaddr_reg:x12; val_offset:14055*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14055*FLEN/8, x13, x9, x10)

inst_4707:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x21003fff; valaddr_reg:x12; val_offset:14058*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14058*FLEN/8, x13, x9, x10)

inst_4708:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x217fe000; valaddr_reg:x12; val_offset:14061*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14061*FLEN/8, x13, x9, x10)

inst_4709:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x21001fff; valaddr_reg:x12; val_offset:14064*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14064*FLEN/8, x13, x9, x10)

inst_4710:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x217ff000; valaddr_reg:x12; val_offset:14067*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14067*FLEN/8, x13, x9, x10)

inst_4711:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x21000fff; valaddr_reg:x12; val_offset:14070*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14070*FLEN/8, x13, x9, x10)

inst_4712:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x217ff800; valaddr_reg:x12; val_offset:14073*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14073*FLEN/8, x13, x9, x10)

inst_4713:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x210007ff; valaddr_reg:x12; val_offset:14076*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14076*FLEN/8, x13, x9, x10)

inst_4714:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x217ffc00; valaddr_reg:x12; val_offset:14079*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14079*FLEN/8, x13, x9, x10)

inst_4715:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x210003ff; valaddr_reg:x12; val_offset:14082*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14082*FLEN/8, x13, x9, x10)

inst_4716:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x217ffe00; valaddr_reg:x12; val_offset:14085*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14085*FLEN/8, x13, x9, x10)

inst_4717:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x210001ff; valaddr_reg:x12; val_offset:14088*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14088*FLEN/8, x13, x9, x10)

inst_4718:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x217fff00; valaddr_reg:x12; val_offset:14091*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14091*FLEN/8, x13, x9, x10)

inst_4719:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x210000ff; valaddr_reg:x12; val_offset:14094*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14094*FLEN/8, x13, x9, x10)

inst_4720:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x217fff80; valaddr_reg:x12; val_offset:14097*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14097*FLEN/8, x13, x9, x10)

inst_4721:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x2100007f; valaddr_reg:x12; val_offset:14100*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14100*FLEN/8, x13, x9, x10)

inst_4722:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x217fffc0; valaddr_reg:x12; val_offset:14103*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14103*FLEN/8, x13, x9, x10)

inst_4723:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x2100003f; valaddr_reg:x12; val_offset:14106*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14106*FLEN/8, x13, x9, x10)

inst_4724:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x217fffe0; valaddr_reg:x12; val_offset:14109*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14109*FLEN/8, x13, x9, x10)

inst_4725:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x2100001f; valaddr_reg:x12; val_offset:14112*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14112*FLEN/8, x13, x9, x10)

inst_4726:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x217ffff0; valaddr_reg:x12; val_offset:14115*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14115*FLEN/8, x13, x9, x10)

inst_4727:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x2100000f; valaddr_reg:x12; val_offset:14118*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14118*FLEN/8, x13, x9, x10)

inst_4728:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x217ffff8; valaddr_reg:x12; val_offset:14121*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14121*FLEN/8, x13, x9, x10)

inst_4729:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x21000007; valaddr_reg:x12; val_offset:14124*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14124*FLEN/8, x13, x9, x10)

inst_4730:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x217ffffc; valaddr_reg:x12; val_offset:14127*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14127*FLEN/8, x13, x9, x10)

inst_4731:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x21000003; valaddr_reg:x12; val_offset:14130*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14130*FLEN/8, x13, x9, x10)

inst_4732:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x217ffffe; valaddr_reg:x12; val_offset:14133*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14133*FLEN/8, x13, x9, x10)

inst_4733:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x21000001; valaddr_reg:x12; val_offset:14136*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14136*FLEN/8, x13, x9, x10)

inst_4734:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x3ffffff8; valaddr_reg:x12; val_offset:14139*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14139*FLEN/8, x13, x9, x10)

inst_4735:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x3f800007; valaddr_reg:x12; val_offset:14142*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14142*FLEN/8, x13, x9, x10)

inst_4736:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x3ffffffc; valaddr_reg:x12; val_offset:14145*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14145*FLEN/8, x13, x9, x10)

inst_4737:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x3f800003; valaddr_reg:x12; val_offset:14148*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14148*FLEN/8, x13, x9, x10)

inst_4738:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x3ffffffe; valaddr_reg:x12; val_offset:14151*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14151*FLEN/8, x13, x9, x10)

inst_4739:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x3f800001; valaddr_reg:x12; val_offset:14154*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14154*FLEN/8, x13, x9, x10)

inst_4740:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x3fb6db6d; valaddr_reg:x12; val_offset:14157*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14157*FLEN/8, x13, x9, x10)

inst_4741:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x3fedb6db; valaddr_reg:x12; val_offset:14160*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14160*FLEN/8, x13, x9, x10)

inst_4742:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x3f999999; valaddr_reg:x12; val_offset:14163*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14163*FLEN/8, x13, x9, x10)

inst_4743:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x3fe66666; valaddr_reg:x12; val_offset:14166*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14166*FLEN/8, x13, x9, x10)

inst_4744:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x3fbbbbbb; valaddr_reg:x12; val_offset:14169*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14169*FLEN/8, x13, x9, x10)

inst_4745:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x3fc44444; valaddr_reg:x12; val_offset:14172*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14172*FLEN/8, x13, x9, x10)

inst_4746:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x3fa49249; valaddr_reg:x12; val_offset:14175*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14175*FLEN/8, x13, x9, x10)

inst_4747:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x3fdb6db6; valaddr_reg:x12; val_offset:14178*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14178*FLEN/8, x13, x9, x10)

inst_4748:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x3fb33333; valaddr_reg:x12; val_offset:14181*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14181*FLEN/8, x13, x9, x10)

inst_4749:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e49b2 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x3c02c2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e49b2; op2val:0xbc02c2;
op3val:0x3fcccccc; valaddr_reg:x12; val_offset:14184*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14184*FLEN/8, x13, x9, x10)

inst_4750:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x21800000; valaddr_reg:x12; val_offset:14187*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14187*FLEN/8, x13, x9, x10)

inst_4751:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x21ffffff; valaddr_reg:x12; val_offset:14190*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14190*FLEN/8, x13, x9, x10)

inst_4752:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x21c00000; valaddr_reg:x12; val_offset:14193*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14193*FLEN/8, x13, x9, x10)

inst_4753:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x21bfffff; valaddr_reg:x12; val_offset:14196*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14196*FLEN/8, x13, x9, x10)

inst_4754:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x21e00000; valaddr_reg:x12; val_offset:14199*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14199*FLEN/8, x13, x9, x10)

inst_4755:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x219fffff; valaddr_reg:x12; val_offset:14202*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14202*FLEN/8, x13, x9, x10)

inst_4756:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x21f00000; valaddr_reg:x12; val_offset:14205*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14205*FLEN/8, x13, x9, x10)

inst_4757:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x218fffff; valaddr_reg:x12; val_offset:14208*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14208*FLEN/8, x13, x9, x10)

inst_4758:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x21f80000; valaddr_reg:x12; val_offset:14211*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14211*FLEN/8, x13, x9, x10)

inst_4759:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x2187ffff; valaddr_reg:x12; val_offset:14214*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14214*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_37)
inst_4760:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x21fc0000; valaddr_reg:x12; val_offset:14217*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14217*FLEN/8, x13, x9, x10)

inst_4761:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x2183ffff; valaddr_reg:x12; val_offset:14220*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14220*FLEN/8, x13, x9, x10)

inst_4762:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x21fe0000; valaddr_reg:x12; val_offset:14223*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14223*FLEN/8, x13, x9, x10)

inst_4763:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x2181ffff; valaddr_reg:x12; val_offset:14226*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14226*FLEN/8, x13, x9, x10)

inst_4764:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x21ff0000; valaddr_reg:x12; val_offset:14229*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14229*FLEN/8, x13, x9, x10)

inst_4765:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x2180ffff; valaddr_reg:x12; val_offset:14232*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14232*FLEN/8, x13, x9, x10)

inst_4766:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x21ff8000; valaddr_reg:x12; val_offset:14235*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14235*FLEN/8, x13, x9, x10)

inst_4767:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x21807fff; valaddr_reg:x12; val_offset:14238*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14238*FLEN/8, x13, x9, x10)

inst_4768:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x21ffc000; valaddr_reg:x12; val_offset:14241*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14241*FLEN/8, x13, x9, x10)

inst_4769:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x21803fff; valaddr_reg:x12; val_offset:14244*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14244*FLEN/8, x13, x9, x10)

inst_4770:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x21ffe000; valaddr_reg:x12; val_offset:14247*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14247*FLEN/8, x13, x9, x10)

inst_4771:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x21801fff; valaddr_reg:x12; val_offset:14250*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14250*FLEN/8, x13, x9, x10)

inst_4772:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x21fff000; valaddr_reg:x12; val_offset:14253*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14253*FLEN/8, x13, x9, x10)

inst_4773:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x21800fff; valaddr_reg:x12; val_offset:14256*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14256*FLEN/8, x13, x9, x10)

inst_4774:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x21fff800; valaddr_reg:x12; val_offset:14259*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14259*FLEN/8, x13, x9, x10)

inst_4775:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x218007ff; valaddr_reg:x12; val_offset:14262*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14262*FLEN/8, x13, x9, x10)

inst_4776:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x21fffc00; valaddr_reg:x12; val_offset:14265*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14265*FLEN/8, x13, x9, x10)

inst_4777:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x218003ff; valaddr_reg:x12; val_offset:14268*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14268*FLEN/8, x13, x9, x10)

inst_4778:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x21fffe00; valaddr_reg:x12; val_offset:14271*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14271*FLEN/8, x13, x9, x10)

inst_4779:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x218001ff; valaddr_reg:x12; val_offset:14274*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14274*FLEN/8, x13, x9, x10)

inst_4780:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x21ffff00; valaddr_reg:x12; val_offset:14277*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14277*FLEN/8, x13, x9, x10)

inst_4781:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x218000ff; valaddr_reg:x12; val_offset:14280*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14280*FLEN/8, x13, x9, x10)

inst_4782:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x21ffff80; valaddr_reg:x12; val_offset:14283*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14283*FLEN/8, x13, x9, x10)

inst_4783:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x2180007f; valaddr_reg:x12; val_offset:14286*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14286*FLEN/8, x13, x9, x10)

inst_4784:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x21ffffc0; valaddr_reg:x12; val_offset:14289*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14289*FLEN/8, x13, x9, x10)

inst_4785:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x2180003f; valaddr_reg:x12; val_offset:14292*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14292*FLEN/8, x13, x9, x10)

inst_4786:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x21ffffe0; valaddr_reg:x12; val_offset:14295*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14295*FLEN/8, x13, x9, x10)

inst_4787:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x2180001f; valaddr_reg:x12; val_offset:14298*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14298*FLEN/8, x13, x9, x10)

inst_4788:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x21fffff0; valaddr_reg:x12; val_offset:14301*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14301*FLEN/8, x13, x9, x10)

inst_4789:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x2180000f; valaddr_reg:x12; val_offset:14304*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14304*FLEN/8, x13, x9, x10)

inst_4790:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x21fffff8; valaddr_reg:x12; val_offset:14307*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14307*FLEN/8, x13, x9, x10)

inst_4791:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x21800007; valaddr_reg:x12; val_offset:14310*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14310*FLEN/8, x13, x9, x10)

inst_4792:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x21fffffc; valaddr_reg:x12; val_offset:14313*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14313*FLEN/8, x13, x9, x10)

inst_4793:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x21800003; valaddr_reg:x12; val_offset:14316*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14316*FLEN/8, x13, x9, x10)

inst_4794:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x21fffffe; valaddr_reg:x12; val_offset:14319*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14319*FLEN/8, x13, x9, x10)

inst_4795:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x21800001; valaddr_reg:x12; val_offset:14322*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14322*FLEN/8, x13, x9, x10)

inst_4796:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x3ffffff8; valaddr_reg:x12; val_offset:14325*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14325*FLEN/8, x13, x9, x10)

inst_4797:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x3f800007; valaddr_reg:x12; val_offset:14328*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14328*FLEN/8, x13, x9, x10)

inst_4798:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x3ffffffc; valaddr_reg:x12; val_offset:14331*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14331*FLEN/8, x13, x9, x10)

inst_4799:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x3f800003; valaddr_reg:x12; val_offset:14334*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14334*FLEN/8, x13, x9, x10)

inst_4800:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x3ffffffe; valaddr_reg:x12; val_offset:14337*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14337*FLEN/8, x13, x9, x10)

inst_4801:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x3f800001; valaddr_reg:x12; val_offset:14340*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14340*FLEN/8, x13, x9, x10)

inst_4802:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x3fb6db6d; valaddr_reg:x12; val_offset:14343*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14343*FLEN/8, x13, x9, x10)

inst_4803:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x3fedb6db; valaddr_reg:x12; val_offset:14346*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14346*FLEN/8, x13, x9, x10)

inst_4804:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x3f999999; valaddr_reg:x12; val_offset:14349*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14349*FLEN/8, x13, x9, x10)

inst_4805:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x3fe66666; valaddr_reg:x12; val_offset:14352*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14352*FLEN/8, x13, x9, x10)

inst_4806:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x3fbbbbbb; valaddr_reg:x12; val_offset:14355*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14355*FLEN/8, x13, x9, x10)

inst_4807:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x3fc44444; valaddr_reg:x12; val_offset:14358*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14358*FLEN/8, x13, x9, x10)

inst_4808:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x3fa49249; valaddr_reg:x12; val_offset:14361*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14361*FLEN/8, x13, x9, x10)

inst_4809:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x3fdb6db6; valaddr_reg:x12; val_offset:14364*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14364*FLEN/8, x13, x9, x10)

inst_4810:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x3fb33333; valaddr_reg:x12; val_offset:14367*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14367*FLEN/8, x13, x9, x10)

inst_4811:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x172970 and fs2 == 0 and fe2 == 0x05 and fm2 == 0x58c634 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c172970; op2val:0x2d8c634;
op3val:0x3fcccccc; valaddr_reg:x12; val_offset:14370*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14370*FLEN/8, x13, x9, x10)

inst_4812:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x22000000; valaddr_reg:x12; val_offset:14373*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14373*FLEN/8, x13, x9, x10)

inst_4813:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x227fffff; valaddr_reg:x12; val_offset:14376*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14376*FLEN/8, x13, x9, x10)

inst_4814:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x22400000; valaddr_reg:x12; val_offset:14379*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14379*FLEN/8, x13, x9, x10)

inst_4815:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x223fffff; valaddr_reg:x12; val_offset:14382*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14382*FLEN/8, x13, x9, x10)

inst_4816:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x22600000; valaddr_reg:x12; val_offset:14385*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14385*FLEN/8, x13, x9, x10)

inst_4817:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x221fffff; valaddr_reg:x12; val_offset:14388*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14388*FLEN/8, x13, x9, x10)

inst_4818:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x22700000; valaddr_reg:x12; val_offset:14391*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14391*FLEN/8, x13, x9, x10)

inst_4819:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x220fffff; valaddr_reg:x12; val_offset:14394*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14394*FLEN/8, x13, x9, x10)

inst_4820:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x22780000; valaddr_reg:x12; val_offset:14397*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14397*FLEN/8, x13, x9, x10)

inst_4821:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x2207ffff; valaddr_reg:x12; val_offset:14400*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14400*FLEN/8, x13, x9, x10)

inst_4822:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x227c0000; valaddr_reg:x12; val_offset:14403*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14403*FLEN/8, x13, x9, x10)

inst_4823:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x2203ffff; valaddr_reg:x12; val_offset:14406*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14406*FLEN/8, x13, x9, x10)

inst_4824:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x227e0000; valaddr_reg:x12; val_offset:14409*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14409*FLEN/8, x13, x9, x10)

inst_4825:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x2201ffff; valaddr_reg:x12; val_offset:14412*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14412*FLEN/8, x13, x9, x10)

inst_4826:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x227f0000; valaddr_reg:x12; val_offset:14415*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14415*FLEN/8, x13, x9, x10)

inst_4827:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x2200ffff; valaddr_reg:x12; val_offset:14418*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14418*FLEN/8, x13, x9, x10)

inst_4828:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x227f8000; valaddr_reg:x12; val_offset:14421*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14421*FLEN/8, x13, x9, x10)

inst_4829:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x22007fff; valaddr_reg:x12; val_offset:14424*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14424*FLEN/8, x13, x9, x10)

inst_4830:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x227fc000; valaddr_reg:x12; val_offset:14427*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14427*FLEN/8, x13, x9, x10)

inst_4831:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x22003fff; valaddr_reg:x12; val_offset:14430*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14430*FLEN/8, x13, x9, x10)

inst_4832:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x227fe000; valaddr_reg:x12; val_offset:14433*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14433*FLEN/8, x13, x9, x10)

inst_4833:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x22001fff; valaddr_reg:x12; val_offset:14436*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14436*FLEN/8, x13, x9, x10)

inst_4834:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x227ff000; valaddr_reg:x12; val_offset:14439*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14439*FLEN/8, x13, x9, x10)

inst_4835:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x22000fff; valaddr_reg:x12; val_offset:14442*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14442*FLEN/8, x13, x9, x10)

inst_4836:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x227ff800; valaddr_reg:x12; val_offset:14445*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14445*FLEN/8, x13, x9, x10)

inst_4837:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x220007ff; valaddr_reg:x12; val_offset:14448*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14448*FLEN/8, x13, x9, x10)

inst_4838:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x227ffc00; valaddr_reg:x12; val_offset:14451*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14451*FLEN/8, x13, x9, x10)

inst_4839:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x220003ff; valaddr_reg:x12; val_offset:14454*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14454*FLEN/8, x13, x9, x10)

inst_4840:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x227ffe00; valaddr_reg:x12; val_offset:14457*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14457*FLEN/8, x13, x9, x10)

inst_4841:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x220001ff; valaddr_reg:x12; val_offset:14460*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14460*FLEN/8, x13, x9, x10)

inst_4842:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x227fff00; valaddr_reg:x12; val_offset:14463*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14463*FLEN/8, x13, x9, x10)

inst_4843:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x220000ff; valaddr_reg:x12; val_offset:14466*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14466*FLEN/8, x13, x9, x10)

inst_4844:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x227fff80; valaddr_reg:x12; val_offset:14469*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14469*FLEN/8, x13, x9, x10)

inst_4845:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x2200007f; valaddr_reg:x12; val_offset:14472*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14472*FLEN/8, x13, x9, x10)

inst_4846:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x227fffc0; valaddr_reg:x12; val_offset:14475*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14475*FLEN/8, x13, x9, x10)

inst_4847:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x2200003f; valaddr_reg:x12; val_offset:14478*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14478*FLEN/8, x13, x9, x10)

inst_4848:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x227fffe0; valaddr_reg:x12; val_offset:14481*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14481*FLEN/8, x13, x9, x10)

inst_4849:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x2200001f; valaddr_reg:x12; val_offset:14484*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14484*FLEN/8, x13, x9, x10)

inst_4850:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x227ffff0; valaddr_reg:x12; val_offset:14487*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14487*FLEN/8, x13, x9, x10)

inst_4851:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x2200000f; valaddr_reg:x12; val_offset:14490*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14490*FLEN/8, x13, x9, x10)

inst_4852:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x227ffff8; valaddr_reg:x12; val_offset:14493*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14493*FLEN/8, x13, x9, x10)

inst_4853:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x22000007; valaddr_reg:x12; val_offset:14496*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14496*FLEN/8, x13, x9, x10)

inst_4854:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x227ffffc; valaddr_reg:x12; val_offset:14499*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14499*FLEN/8, x13, x9, x10)

inst_4855:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x22000003; valaddr_reg:x12; val_offset:14502*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14502*FLEN/8, x13, x9, x10)

inst_4856:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x227ffffe; valaddr_reg:x12; val_offset:14505*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14505*FLEN/8, x13, x9, x10)

inst_4857:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x44 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x22000001; valaddr_reg:x12; val_offset:14508*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14508*FLEN/8, x13, x9, x10)

inst_4858:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x3ffffff8; valaddr_reg:x12; val_offset:14511*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14511*FLEN/8, x13, x9, x10)

inst_4859:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x3f800007; valaddr_reg:x12; val_offset:14514*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14514*FLEN/8, x13, x9, x10)

inst_4860:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x3ffffffc; valaddr_reg:x12; val_offset:14517*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14517*FLEN/8, x13, x9, x10)

inst_4861:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x3f800003; valaddr_reg:x12; val_offset:14520*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14520*FLEN/8, x13, x9, x10)

inst_4862:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x3ffffffe; valaddr_reg:x12; val_offset:14523*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14523*FLEN/8, x13, x9, x10)

inst_4863:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x3f800001; valaddr_reg:x12; val_offset:14526*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14526*FLEN/8, x13, x9, x10)

inst_4864:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x3fb6db6d; valaddr_reg:x12; val_offset:14529*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14529*FLEN/8, x13, x9, x10)

inst_4865:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x3fedb6db; valaddr_reg:x12; val_offset:14532*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14532*FLEN/8, x13, x9, x10)

inst_4866:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x3f999999; valaddr_reg:x12; val_offset:14535*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14535*FLEN/8, x13, x9, x10)

inst_4867:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x3fe66666; valaddr_reg:x12; val_offset:14538*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14538*FLEN/8, x13, x9, x10)

inst_4868:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x3fbbbbbb; valaddr_reg:x12; val_offset:14541*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14541*FLEN/8, x13, x9, x10)

inst_4869:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x3fc44444; valaddr_reg:x12; val_offset:14544*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14544*FLEN/8, x13, x9, x10)

inst_4870:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x3fa49249; valaddr_reg:x12; val_offset:14547*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14547*FLEN/8, x13, x9, x10)

inst_4871:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x3fdb6db6; valaddr_reg:x12; val_offset:14550*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14550*FLEN/8, x13, x9, x10)

inst_4872:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x3fb33333; valaddr_reg:x12; val_offset:14553*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14553*FLEN/8, x13, x9, x10)

inst_4873:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x193a83 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x55d9b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e193a83; op2val:0xd5d9b8;
op3val:0x3fcccccc; valaddr_reg:x12; val_offset:14556*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14556*FLEN/8, x13, x9, x10)

inst_4874:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x22800000; valaddr_reg:x12; val_offset:14559*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14559*FLEN/8, x13, x9, x10)

inst_4875:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x22ffffff; valaddr_reg:x12; val_offset:14562*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14562*FLEN/8, x13, x9, x10)

inst_4876:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x22c00000; valaddr_reg:x12; val_offset:14565*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14565*FLEN/8, x13, x9, x10)

inst_4877:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x22bfffff; valaddr_reg:x12; val_offset:14568*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14568*FLEN/8, x13, x9, x10)

inst_4878:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x22e00000; valaddr_reg:x12; val_offset:14571*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14571*FLEN/8, x13, x9, x10)

inst_4879:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x229fffff; valaddr_reg:x12; val_offset:14574*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14574*FLEN/8, x13, x9, x10)

inst_4880:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x22f00000; valaddr_reg:x12; val_offset:14577*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14577*FLEN/8, x13, x9, x10)

inst_4881:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x228fffff; valaddr_reg:x12; val_offset:14580*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14580*FLEN/8, x13, x9, x10)

inst_4882:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x22f80000; valaddr_reg:x12; val_offset:14583*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14583*FLEN/8, x13, x9, x10)

inst_4883:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x2287ffff; valaddr_reg:x12; val_offset:14586*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14586*FLEN/8, x13, x9, x10)

inst_4884:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x22fc0000; valaddr_reg:x12; val_offset:14589*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14589*FLEN/8, x13, x9, x10)

inst_4885:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x2283ffff; valaddr_reg:x12; val_offset:14592*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14592*FLEN/8, x13, x9, x10)

inst_4886:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x22fe0000; valaddr_reg:x12; val_offset:14595*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14595*FLEN/8, x13, x9, x10)

inst_4887:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x2281ffff; valaddr_reg:x12; val_offset:14598*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14598*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_38)
inst_4888:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x22ff0000; valaddr_reg:x12; val_offset:14601*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14601*FLEN/8, x13, x9, x10)

inst_4889:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x2280ffff; valaddr_reg:x12; val_offset:14604*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14604*FLEN/8, x13, x9, x10)

inst_4890:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x22ff8000; valaddr_reg:x12; val_offset:14607*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14607*FLEN/8, x13, x9, x10)

inst_4891:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x22807fff; valaddr_reg:x12; val_offset:14610*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14610*FLEN/8, x13, x9, x10)

inst_4892:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x22ffc000; valaddr_reg:x12; val_offset:14613*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14613*FLEN/8, x13, x9, x10)

inst_4893:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x22803fff; valaddr_reg:x12; val_offset:14616*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14616*FLEN/8, x13, x9, x10)

inst_4894:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x22ffe000; valaddr_reg:x12; val_offset:14619*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14619*FLEN/8, x13, x9, x10)

inst_4895:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x22801fff; valaddr_reg:x12; val_offset:14622*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14622*FLEN/8, x13, x9, x10)

inst_4896:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x22fff000; valaddr_reg:x12; val_offset:14625*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14625*FLEN/8, x13, x9, x10)

inst_4897:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x22800fff; valaddr_reg:x12; val_offset:14628*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14628*FLEN/8, x13, x9, x10)

inst_4898:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x22fff800; valaddr_reg:x12; val_offset:14631*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14631*FLEN/8, x13, x9, x10)

inst_4899:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x228007ff; valaddr_reg:x12; val_offset:14634*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14634*FLEN/8, x13, x9, x10)

inst_4900:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x22fffc00; valaddr_reg:x12; val_offset:14637*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14637*FLEN/8, x13, x9, x10)

inst_4901:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x228003ff; valaddr_reg:x12; val_offset:14640*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14640*FLEN/8, x13, x9, x10)

inst_4902:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x22fffe00; valaddr_reg:x12; val_offset:14643*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14643*FLEN/8, x13, x9, x10)

inst_4903:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x228001ff; valaddr_reg:x12; val_offset:14646*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14646*FLEN/8, x13, x9, x10)

inst_4904:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x22ffff00; valaddr_reg:x12; val_offset:14649*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14649*FLEN/8, x13, x9, x10)

inst_4905:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x228000ff; valaddr_reg:x12; val_offset:14652*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14652*FLEN/8, x13, x9, x10)

inst_4906:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x22ffff80; valaddr_reg:x12; val_offset:14655*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14655*FLEN/8, x13, x9, x10)

inst_4907:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x2280007f; valaddr_reg:x12; val_offset:14658*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14658*FLEN/8, x13, x9, x10)

inst_4908:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x22ffffc0; valaddr_reg:x12; val_offset:14661*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14661*FLEN/8, x13, x9, x10)

inst_4909:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x2280003f; valaddr_reg:x12; val_offset:14664*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14664*FLEN/8, x13, x9, x10)

inst_4910:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x22ffffe0; valaddr_reg:x12; val_offset:14667*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14667*FLEN/8, x13, x9, x10)

inst_4911:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x2280001f; valaddr_reg:x12; val_offset:14670*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14670*FLEN/8, x13, x9, x10)

inst_4912:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x22fffff0; valaddr_reg:x12; val_offset:14673*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14673*FLEN/8, x13, x9, x10)

inst_4913:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x2280000f; valaddr_reg:x12; val_offset:14676*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14676*FLEN/8, x13, x9, x10)

inst_4914:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x22fffff8; valaddr_reg:x12; val_offset:14679*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14679*FLEN/8, x13, x9, x10)

inst_4915:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x22800007; valaddr_reg:x12; val_offset:14682*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14682*FLEN/8, x13, x9, x10)

inst_4916:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x22fffffc; valaddr_reg:x12; val_offset:14685*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14685*FLEN/8, x13, x9, x10)

inst_4917:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x22800003; valaddr_reg:x12; val_offset:14688*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14688*FLEN/8, x13, x9, x10)

inst_4918:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x22fffffe; valaddr_reg:x12; val_offset:14691*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14691*FLEN/8, x13, x9, x10)

inst_4919:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x45 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x22800001; valaddr_reg:x12; val_offset:14694*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14694*FLEN/8, x13, x9, x10)

inst_4920:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x3ffffff8; valaddr_reg:x12; val_offset:14697*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14697*FLEN/8, x13, x9, x10)

inst_4921:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x3f800007; valaddr_reg:x12; val_offset:14700*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14700*FLEN/8, x13, x9, x10)

inst_4922:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x3ffffffc; valaddr_reg:x12; val_offset:14703*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14703*FLEN/8, x13, x9, x10)

inst_4923:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x3f800003; valaddr_reg:x12; val_offset:14706*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14706*FLEN/8, x13, x9, x10)

inst_4924:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x3ffffffe; valaddr_reg:x12; val_offset:14709*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14709*FLEN/8, x13, x9, x10)

inst_4925:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x3f800001; valaddr_reg:x12; val_offset:14712*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14712*FLEN/8, x13, x9, x10)

inst_4926:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x3fb6db6d; valaddr_reg:x12; val_offset:14715*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14715*FLEN/8, x13, x9, x10)

inst_4927:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x3fedb6db; valaddr_reg:x12; val_offset:14718*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14718*FLEN/8, x13, x9, x10)

inst_4928:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x3f999999; valaddr_reg:x12; val_offset:14721*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14721*FLEN/8, x13, x9, x10)

inst_4929:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x3fe66666; valaddr_reg:x12; val_offset:14724*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14724*FLEN/8, x13, x9, x10)

inst_4930:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x3fbbbbbb; valaddr_reg:x12; val_offset:14727*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14727*FLEN/8, x13, x9, x10)

inst_4931:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x3fc44444; valaddr_reg:x12; val_offset:14730*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14730*FLEN/8, x13, x9, x10)

inst_4932:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x3fa49249; valaddr_reg:x12; val_offset:14733*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14733*FLEN/8, x13, x9, x10)

inst_4933:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x3fdb6db6; valaddr_reg:x12; val_offset:14736*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14736*FLEN/8, x13, x9, x10)

inst_4934:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x3fb33333; valaddr_reg:x12; val_offset:14739*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14739*FLEN/8, x13, x9, x10)

inst_4935:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e5f59 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30a816; op2val:0x2e5f59;
op3val:0x3fcccccc; valaddr_reg:x12; val_offset:14742*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14742*FLEN/8, x13, x9, x10)

inst_4936:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x23000000; valaddr_reg:x12; val_offset:14745*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14745*FLEN/8, x13, x9, x10)

inst_4937:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x237fffff; valaddr_reg:x12; val_offset:14748*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14748*FLEN/8, x13, x9, x10)

inst_4938:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x23400000; valaddr_reg:x12; val_offset:14751*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14751*FLEN/8, x13, x9, x10)

inst_4939:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x233fffff; valaddr_reg:x12; val_offset:14754*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14754*FLEN/8, x13, x9, x10)

inst_4940:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x23600000; valaddr_reg:x12; val_offset:14757*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14757*FLEN/8, x13, x9, x10)

inst_4941:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x231fffff; valaddr_reg:x12; val_offset:14760*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14760*FLEN/8, x13, x9, x10)

inst_4942:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x23700000; valaddr_reg:x12; val_offset:14763*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14763*FLEN/8, x13, x9, x10)

inst_4943:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x230fffff; valaddr_reg:x12; val_offset:14766*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14766*FLEN/8, x13, x9, x10)

inst_4944:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x23780000; valaddr_reg:x12; val_offset:14769*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14769*FLEN/8, x13, x9, x10)

inst_4945:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x2307ffff; valaddr_reg:x12; val_offset:14772*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14772*FLEN/8, x13, x9, x10)

inst_4946:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x237c0000; valaddr_reg:x12; val_offset:14775*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14775*FLEN/8, x13, x9, x10)

inst_4947:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x2303ffff; valaddr_reg:x12; val_offset:14778*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14778*FLEN/8, x13, x9, x10)

inst_4948:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x237e0000; valaddr_reg:x12; val_offset:14781*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14781*FLEN/8, x13, x9, x10)

inst_4949:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x2301ffff; valaddr_reg:x12; val_offset:14784*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14784*FLEN/8, x13, x9, x10)

inst_4950:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x237f0000; valaddr_reg:x12; val_offset:14787*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14787*FLEN/8, x13, x9, x10)

inst_4951:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x2300ffff; valaddr_reg:x12; val_offset:14790*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14790*FLEN/8, x13, x9, x10)

inst_4952:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x237f8000; valaddr_reg:x12; val_offset:14793*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14793*FLEN/8, x13, x9, x10)

inst_4953:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x23007fff; valaddr_reg:x12; val_offset:14796*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14796*FLEN/8, x13, x9, x10)

inst_4954:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x237fc000; valaddr_reg:x12; val_offset:14799*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14799*FLEN/8, x13, x9, x10)

inst_4955:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x23003fff; valaddr_reg:x12; val_offset:14802*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14802*FLEN/8, x13, x9, x10)

inst_4956:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x237fe000; valaddr_reg:x12; val_offset:14805*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14805*FLEN/8, x13, x9, x10)

inst_4957:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x23001fff; valaddr_reg:x12; val_offset:14808*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14808*FLEN/8, x13, x9, x10)

inst_4958:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x237ff000; valaddr_reg:x12; val_offset:14811*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14811*FLEN/8, x13, x9, x10)

inst_4959:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x23000fff; valaddr_reg:x12; val_offset:14814*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14814*FLEN/8, x13, x9, x10)

inst_4960:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x237ff800; valaddr_reg:x12; val_offset:14817*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14817*FLEN/8, x13, x9, x10)

inst_4961:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x230007ff; valaddr_reg:x12; val_offset:14820*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14820*FLEN/8, x13, x9, x10)

inst_4962:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x237ffc00; valaddr_reg:x12; val_offset:14823*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14823*FLEN/8, x13, x9, x10)

inst_4963:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x230003ff; valaddr_reg:x12; val_offset:14826*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14826*FLEN/8, x13, x9, x10)

inst_4964:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x237ffe00; valaddr_reg:x12; val_offset:14829*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14829*FLEN/8, x13, x9, x10)

inst_4965:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x230001ff; valaddr_reg:x12; val_offset:14832*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14832*FLEN/8, x13, x9, x10)

inst_4966:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x237fff00; valaddr_reg:x12; val_offset:14835*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14835*FLEN/8, x13, x9, x10)

inst_4967:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x230000ff; valaddr_reg:x12; val_offset:14838*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14838*FLEN/8, x13, x9, x10)

inst_4968:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x237fff80; valaddr_reg:x12; val_offset:14841*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14841*FLEN/8, x13, x9, x10)

inst_4969:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x2300007f; valaddr_reg:x12; val_offset:14844*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14844*FLEN/8, x13, x9, x10)

inst_4970:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x237fffc0; valaddr_reg:x12; val_offset:14847*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14847*FLEN/8, x13, x9, x10)

inst_4971:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x2300003f; valaddr_reg:x12; val_offset:14850*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14850*FLEN/8, x13, x9, x10)

inst_4972:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x237fffe0; valaddr_reg:x12; val_offset:14853*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14853*FLEN/8, x13, x9, x10)

inst_4973:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x2300001f; valaddr_reg:x12; val_offset:14856*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14856*FLEN/8, x13, x9, x10)

inst_4974:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x237ffff0; valaddr_reg:x12; val_offset:14859*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14859*FLEN/8, x13, x9, x10)

inst_4975:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x2300000f; valaddr_reg:x12; val_offset:14862*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14862*FLEN/8, x13, x9, x10)

inst_4976:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x237ffff8; valaddr_reg:x12; val_offset:14865*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14865*FLEN/8, x13, x9, x10)

inst_4977:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x23000007; valaddr_reg:x12; val_offset:14868*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14868*FLEN/8, x13, x9, x10)

inst_4978:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x237ffffc; valaddr_reg:x12; val_offset:14871*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14871*FLEN/8, x13, x9, x10)

inst_4979:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x23000003; valaddr_reg:x12; val_offset:14874*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14874*FLEN/8, x13, x9, x10)

inst_4980:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x237ffffe; valaddr_reg:x12; val_offset:14877*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14877*FLEN/8, x13, x9, x10)

inst_4981:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x23000001; valaddr_reg:x12; val_offset:14880*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14880*FLEN/8, x13, x9, x10)

inst_4982:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x3ffffff8; valaddr_reg:x12; val_offset:14883*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14883*FLEN/8, x13, x9, x10)

inst_4983:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x3f800007; valaddr_reg:x12; val_offset:14886*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14886*FLEN/8, x13, x9, x10)

inst_4984:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x3ffffffc; valaddr_reg:x12; val_offset:14889*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14889*FLEN/8, x13, x9, x10)

inst_4985:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x3f800003; valaddr_reg:x12; val_offset:14892*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14892*FLEN/8, x13, x9, x10)

inst_4986:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x3ffffffe; valaddr_reg:x12; val_offset:14895*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14895*FLEN/8, x13, x9, x10)

inst_4987:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x3f800001; valaddr_reg:x12; val_offset:14898*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14898*FLEN/8, x13, x9, x10)

inst_4988:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x3fb6db6d; valaddr_reg:x12; val_offset:14901*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14901*FLEN/8, x13, x9, x10)

inst_4989:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x3fedb6db; valaddr_reg:x12; val_offset:14904*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14904*FLEN/8, x13, x9, x10)

inst_4990:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x3f999999; valaddr_reg:x12; val_offset:14907*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14907*FLEN/8, x13, x9, x10)

inst_4991:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x3fe66666; valaddr_reg:x12; val_offset:14910*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14910*FLEN/8, x13, x9, x10)

inst_4992:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x3fbbbbbb; valaddr_reg:x12; val_offset:14913*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14913*FLEN/8, x13, x9, x10)

inst_4993:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x3fc44444; valaddr_reg:x12; val_offset:14916*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14916*FLEN/8, x13, x9, x10)

inst_4994:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x3fa49249; valaddr_reg:x12; val_offset:14919*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14919*FLEN/8, x13, x9, x10)

inst_4995:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x3fdb6db6; valaddr_reg:x12; val_offset:14922*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14922*FLEN/8, x13, x9, x10)

inst_4996:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x3fb33333; valaddr_reg:x12; val_offset:14925*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14925*FLEN/8, x13, x9, x10)

inst_4997:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x528fdc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4dcf92 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed28fdc; op2val:0x4dcf92;
op3val:0x3fcccccc; valaddr_reg:x12; val_offset:14928*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14928*FLEN/8, x13, x9, x10)

inst_4998:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x23800000; valaddr_reg:x12; val_offset:14931*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14931*FLEN/8, x13, x9, x10)

inst_4999:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x23ffffff; valaddr_reg:x12; val_offset:14934*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14934*FLEN/8, x13, x9, x10)

inst_5000:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x23c00000; valaddr_reg:x12; val_offset:14937*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14937*FLEN/8, x13, x9, x10)

inst_5001:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x23bfffff; valaddr_reg:x12; val_offset:14940*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14940*FLEN/8, x13, x9, x10)

inst_5002:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x23e00000; valaddr_reg:x12; val_offset:14943*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14943*FLEN/8, x13, x9, x10)

inst_5003:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x239fffff; valaddr_reg:x12; val_offset:14946*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14946*FLEN/8, x13, x9, x10)

inst_5004:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x23f00000; valaddr_reg:x12; val_offset:14949*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14949*FLEN/8, x13, x9, x10)

inst_5005:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x238fffff; valaddr_reg:x12; val_offset:14952*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14952*FLEN/8, x13, x9, x10)

inst_5006:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x23f80000; valaddr_reg:x12; val_offset:14955*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14955*FLEN/8, x13, x9, x10)

inst_5007:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x2387ffff; valaddr_reg:x12; val_offset:14958*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14958*FLEN/8, x13, x9, x10)

inst_5008:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x23fc0000; valaddr_reg:x12; val_offset:14961*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14961*FLEN/8, x13, x9, x10)

inst_5009:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x2383ffff; valaddr_reg:x12; val_offset:14964*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14964*FLEN/8, x13, x9, x10)

inst_5010:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x23fe0000; valaddr_reg:x12; val_offset:14967*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14967*FLEN/8, x13, x9, x10)

inst_5011:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x2381ffff; valaddr_reg:x12; val_offset:14970*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14970*FLEN/8, x13, x9, x10)

inst_5012:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x23ff0000; valaddr_reg:x12; val_offset:14973*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14973*FLEN/8, x13, x9, x10)

inst_5013:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x2380ffff; valaddr_reg:x12; val_offset:14976*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14976*FLEN/8, x13, x9, x10)

inst_5014:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x23ff8000; valaddr_reg:x12; val_offset:14979*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14979*FLEN/8, x13, x9, x10)

inst_5015:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x23807fff; valaddr_reg:x12; val_offset:14982*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14982*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_39)
inst_5016:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x23ffc000; valaddr_reg:x12; val_offset:14985*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14985*FLEN/8, x13, x9, x10)

inst_5017:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x23803fff; valaddr_reg:x12; val_offset:14988*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14988*FLEN/8, x13, x9, x10)

inst_5018:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x23ffe000; valaddr_reg:x12; val_offset:14991*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14991*FLEN/8, x13, x9, x10)

inst_5019:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x23801fff; valaddr_reg:x12; val_offset:14994*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14994*FLEN/8, x13, x9, x10)

inst_5020:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x23fff000; valaddr_reg:x12; val_offset:14997*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 14997*FLEN/8, x13, x9, x10)

inst_5021:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x23800fff; valaddr_reg:x12; val_offset:15000*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15000*FLEN/8, x13, x9, x10)

inst_5022:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x23fff800; valaddr_reg:x12; val_offset:15003*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15003*FLEN/8, x13, x9, x10)

inst_5023:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x238007ff; valaddr_reg:x12; val_offset:15006*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15006*FLEN/8, x13, x9, x10)

inst_5024:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x23fffc00; valaddr_reg:x12; val_offset:15009*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15009*FLEN/8, x13, x9, x10)

inst_5025:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x238003ff; valaddr_reg:x12; val_offset:15012*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15012*FLEN/8, x13, x9, x10)

inst_5026:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x23fffe00; valaddr_reg:x12; val_offset:15015*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15015*FLEN/8, x13, x9, x10)

inst_5027:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x238001ff; valaddr_reg:x12; val_offset:15018*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15018*FLEN/8, x13, x9, x10)

inst_5028:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x23ffff00; valaddr_reg:x12; val_offset:15021*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15021*FLEN/8, x13, x9, x10)

inst_5029:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x238000ff; valaddr_reg:x12; val_offset:15024*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15024*FLEN/8, x13, x9, x10)

inst_5030:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x23ffff80; valaddr_reg:x12; val_offset:15027*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15027*FLEN/8, x13, x9, x10)

inst_5031:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x2380007f; valaddr_reg:x12; val_offset:15030*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15030*FLEN/8, x13, x9, x10)

inst_5032:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x23ffffc0; valaddr_reg:x12; val_offset:15033*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15033*FLEN/8, x13, x9, x10)

inst_5033:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x2380003f; valaddr_reg:x12; val_offset:15036*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15036*FLEN/8, x13, x9, x10)

inst_5034:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x23ffffe0; valaddr_reg:x12; val_offset:15039*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15039*FLEN/8, x13, x9, x10)

inst_5035:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x2380001f; valaddr_reg:x12; val_offset:15042*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15042*FLEN/8, x13, x9, x10)

inst_5036:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x23fffff0; valaddr_reg:x12; val_offset:15045*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15045*FLEN/8, x13, x9, x10)

inst_5037:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x2380000f; valaddr_reg:x12; val_offset:15048*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15048*FLEN/8, x13, x9, x10)

inst_5038:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x23fffff8; valaddr_reg:x12; val_offset:15051*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15051*FLEN/8, x13, x9, x10)

inst_5039:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x23800007; valaddr_reg:x12; val_offset:15054*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15054*FLEN/8, x13, x9, x10)

inst_5040:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x23fffffc; valaddr_reg:x12; val_offset:15057*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15057*FLEN/8, x13, x9, x10)

inst_5041:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x23800003; valaddr_reg:x12; val_offset:15060*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15060*FLEN/8, x13, x9, x10)

inst_5042:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x23fffffe; valaddr_reg:x12; val_offset:15063*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15063*FLEN/8, x13, x9, x10)

inst_5043:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x23800001; valaddr_reg:x12; val_offset:15066*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15066*FLEN/8, x13, x9, x10)

inst_5044:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x3ffffff8; valaddr_reg:x12; val_offset:15069*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15069*FLEN/8, x13, x9, x10)

inst_5045:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x3f800007; valaddr_reg:x12; val_offset:15072*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15072*FLEN/8, x13, x9, x10)

inst_5046:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x3ffffffc; valaddr_reg:x12; val_offset:15075*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15075*FLEN/8, x13, x9, x10)

inst_5047:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x3f800003; valaddr_reg:x12; val_offset:15078*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15078*FLEN/8, x13, x9, x10)

inst_5048:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x3ffffffe; valaddr_reg:x12; val_offset:15081*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15081*FLEN/8, x13, x9, x10)

inst_5049:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x3f800001; valaddr_reg:x12; val_offset:15084*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15084*FLEN/8, x13, x9, x10)

inst_5050:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x3fb6db6d; valaddr_reg:x12; val_offset:15087*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15087*FLEN/8, x13, x9, x10)

inst_5051:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x3fedb6db; valaddr_reg:x12; val_offset:15090*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15090*FLEN/8, x13, x9, x10)

inst_5052:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x3f999999; valaddr_reg:x12; val_offset:15093*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15093*FLEN/8, x13, x9, x10)

inst_5053:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x3fe66666; valaddr_reg:x12; val_offset:15096*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15096*FLEN/8, x13, x9, x10)

inst_5054:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x3fbbbbbb; valaddr_reg:x12; val_offset:15099*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15099*FLEN/8, x13, x9, x10)

inst_5055:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x3fc44444; valaddr_reg:x12; val_offset:15102*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15102*FLEN/8, x13, x9, x10)

inst_5056:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x3fa49249; valaddr_reg:x12; val_offset:15105*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15105*FLEN/8, x13, x9, x10)

inst_5057:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x3fdb6db6; valaddr_reg:x12; val_offset:15108*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15108*FLEN/8, x13, x9, x10)

inst_5058:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x3fb33333; valaddr_reg:x12; val_offset:15111*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15111*FLEN/8, x13, x9, x10)

inst_5059:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1b4f87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x697de6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9b4f87; op2val:0x697de6;
op3val:0x3fcccccc; valaddr_reg:x12; val_offset:15114*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15114*FLEN/8, x13, x9, x10)

inst_5060:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x24000000; valaddr_reg:x12; val_offset:15117*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15117*FLEN/8, x13, x9, x10)

inst_5061:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x247fffff; valaddr_reg:x12; val_offset:15120*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15120*FLEN/8, x13, x9, x10)

inst_5062:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x24400000; valaddr_reg:x12; val_offset:15123*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15123*FLEN/8, x13, x9, x10)

inst_5063:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x243fffff; valaddr_reg:x12; val_offset:15126*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15126*FLEN/8, x13, x9, x10)

inst_5064:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x24600000; valaddr_reg:x12; val_offset:15129*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15129*FLEN/8, x13, x9, x10)

inst_5065:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x241fffff; valaddr_reg:x12; val_offset:15132*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15132*FLEN/8, x13, x9, x10)

inst_5066:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x24700000; valaddr_reg:x12; val_offset:15135*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15135*FLEN/8, x13, x9, x10)

inst_5067:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x240fffff; valaddr_reg:x12; val_offset:15138*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15138*FLEN/8, x13, x9, x10)

inst_5068:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x24780000; valaddr_reg:x12; val_offset:15141*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15141*FLEN/8, x13, x9, x10)

inst_5069:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x2407ffff; valaddr_reg:x12; val_offset:15144*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15144*FLEN/8, x13, x9, x10)

inst_5070:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x247c0000; valaddr_reg:x12; val_offset:15147*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15147*FLEN/8, x13, x9, x10)

inst_5071:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x2403ffff; valaddr_reg:x12; val_offset:15150*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15150*FLEN/8, x13, x9, x10)

inst_5072:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x247e0000; valaddr_reg:x12; val_offset:15153*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15153*FLEN/8, x13, x9, x10)

inst_5073:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x2401ffff; valaddr_reg:x12; val_offset:15156*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15156*FLEN/8, x13, x9, x10)

inst_5074:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x247f0000; valaddr_reg:x12; val_offset:15159*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15159*FLEN/8, x13, x9, x10)

inst_5075:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x2400ffff; valaddr_reg:x12; val_offset:15162*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15162*FLEN/8, x13, x9, x10)

inst_5076:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x247f8000; valaddr_reg:x12; val_offset:15165*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15165*FLEN/8, x13, x9, x10)

inst_5077:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x24007fff; valaddr_reg:x12; val_offset:15168*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15168*FLEN/8, x13, x9, x10)

inst_5078:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x247fc000; valaddr_reg:x12; val_offset:15171*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15171*FLEN/8, x13, x9, x10)

inst_5079:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x24003fff; valaddr_reg:x12; val_offset:15174*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15174*FLEN/8, x13, x9, x10)

inst_5080:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x247fe000; valaddr_reg:x12; val_offset:15177*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15177*FLEN/8, x13, x9, x10)

inst_5081:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x24001fff; valaddr_reg:x12; val_offset:15180*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15180*FLEN/8, x13, x9, x10)

inst_5082:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x247ff000; valaddr_reg:x12; val_offset:15183*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15183*FLEN/8, x13, x9, x10)

inst_5083:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x24000fff; valaddr_reg:x12; val_offset:15186*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15186*FLEN/8, x13, x9, x10)

inst_5084:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x247ff800; valaddr_reg:x12; val_offset:15189*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15189*FLEN/8, x13, x9, x10)

inst_5085:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x240007ff; valaddr_reg:x12; val_offset:15192*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15192*FLEN/8, x13, x9, x10)

inst_5086:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x247ffc00; valaddr_reg:x12; val_offset:15195*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15195*FLEN/8, x13, x9, x10)

inst_5087:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x240003ff; valaddr_reg:x12; val_offset:15198*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15198*FLEN/8, x13, x9, x10)

inst_5088:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x247ffe00; valaddr_reg:x12; val_offset:15201*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15201*FLEN/8, x13, x9, x10)

inst_5089:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x240001ff; valaddr_reg:x12; val_offset:15204*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15204*FLEN/8, x13, x9, x10)

inst_5090:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x247fff00; valaddr_reg:x12; val_offset:15207*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15207*FLEN/8, x13, x9, x10)

inst_5091:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x240000ff; valaddr_reg:x12; val_offset:15210*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15210*FLEN/8, x13, x9, x10)

inst_5092:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x247fff80; valaddr_reg:x12; val_offset:15213*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15213*FLEN/8, x13, x9, x10)

inst_5093:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x2400007f; valaddr_reg:x12; val_offset:15216*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15216*FLEN/8, x13, x9, x10)

inst_5094:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x247fffc0; valaddr_reg:x12; val_offset:15219*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15219*FLEN/8, x13, x9, x10)

inst_5095:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x2400003f; valaddr_reg:x12; val_offset:15222*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15222*FLEN/8, x13, x9, x10)

inst_5096:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x247fffe0; valaddr_reg:x12; val_offset:15225*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15225*FLEN/8, x13, x9, x10)

inst_5097:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x2400001f; valaddr_reg:x12; val_offset:15228*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15228*FLEN/8, x13, x9, x10)

inst_5098:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x247ffff0; valaddr_reg:x12; val_offset:15231*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15231*FLEN/8, x13, x9, x10)

inst_5099:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x2400000f; valaddr_reg:x12; val_offset:15234*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15234*FLEN/8, x13, x9, x10)

inst_5100:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x247ffff8; valaddr_reg:x12; val_offset:15237*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15237*FLEN/8, x13, x9, x10)

inst_5101:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x24000007; valaddr_reg:x12; val_offset:15240*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15240*FLEN/8, x13, x9, x10)

inst_5102:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x247ffffc; valaddr_reg:x12; val_offset:15243*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15243*FLEN/8, x13, x9, x10)

inst_5103:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x24000003; valaddr_reg:x12; val_offset:15246*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15246*FLEN/8, x13, x9, x10)

inst_5104:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x247ffffe; valaddr_reg:x12; val_offset:15249*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15249*FLEN/8, x13, x9, x10)

inst_5105:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x48 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x24000001; valaddr_reg:x12; val_offset:15252*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15252*FLEN/8, x13, x9, x10)

inst_5106:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x3ffffff8; valaddr_reg:x12; val_offset:15255*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15255*FLEN/8, x13, x9, x10)

inst_5107:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x3f800007; valaddr_reg:x12; val_offset:15258*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15258*FLEN/8, x13, x9, x10)

inst_5108:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x3ffffffc; valaddr_reg:x12; val_offset:15261*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15261*FLEN/8, x13, x9, x10)

inst_5109:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x3f800003; valaddr_reg:x12; val_offset:15264*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15264*FLEN/8, x13, x9, x10)

inst_5110:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x3ffffffe; valaddr_reg:x12; val_offset:15267*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15267*FLEN/8, x13, x9, x10)

inst_5111:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x3f800001; valaddr_reg:x12; val_offset:15270*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15270*FLEN/8, x13, x9, x10)

inst_5112:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x3fb6db6d; valaddr_reg:x12; val_offset:15273*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15273*FLEN/8, x13, x9, x10)

inst_5113:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x3fedb6db; valaddr_reg:x12; val_offset:15276*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15276*FLEN/8, x13, x9, x10)

inst_5114:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x3f999999; valaddr_reg:x12; val_offset:15279*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15279*FLEN/8, x13, x9, x10)

inst_5115:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x3fe66666; valaddr_reg:x12; val_offset:15282*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15282*FLEN/8, x13, x9, x10)

inst_5116:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x3fbbbbbb; valaddr_reg:x12; val_offset:15285*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15285*FLEN/8, x13, x9, x10)

inst_5117:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x3fc44444; valaddr_reg:x12; val_offset:15288*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15288*FLEN/8, x13, x9, x10)

inst_5118:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x3fa49249; valaddr_reg:x12; val_offset:15291*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15291*FLEN/8, x13, x9, x10)

inst_5119:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x3fdb6db6; valaddr_reg:x12; val_offset:15294*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15294*FLEN/8, x13, x9, x10)

inst_5120:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x3fb33333; valaddr_reg:x12; val_offset:15297*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15297*FLEN/8, x13, x9, x10)

inst_5121:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x040775 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7c1804 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e840775; op2val:0x7c1804;
op3val:0x3fcccccc; valaddr_reg:x12; val_offset:15300*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15300*FLEN/8, x13, x9, x10)

inst_5122:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x24800000; valaddr_reg:x12; val_offset:15303*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15303*FLEN/8, x13, x9, x10)

inst_5123:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x24ffffff; valaddr_reg:x12; val_offset:15306*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15306*FLEN/8, x13, x9, x10)

inst_5124:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x24c00000; valaddr_reg:x12; val_offset:15309*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15309*FLEN/8, x13, x9, x10)

inst_5125:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x24bfffff; valaddr_reg:x12; val_offset:15312*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15312*FLEN/8, x13, x9, x10)

inst_5126:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x24e00000; valaddr_reg:x12; val_offset:15315*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15315*FLEN/8, x13, x9, x10)

inst_5127:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x249fffff; valaddr_reg:x12; val_offset:15318*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15318*FLEN/8, x13, x9, x10)

inst_5128:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x24f00000; valaddr_reg:x12; val_offset:15321*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15321*FLEN/8, x13, x9, x10)

inst_5129:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x248fffff; valaddr_reg:x12; val_offset:15324*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15324*FLEN/8, x13, x9, x10)

inst_5130:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x24f80000; valaddr_reg:x12; val_offset:15327*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15327*FLEN/8, x13, x9, x10)

inst_5131:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x2487ffff; valaddr_reg:x12; val_offset:15330*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15330*FLEN/8, x13, x9, x10)

inst_5132:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x24fc0000; valaddr_reg:x12; val_offset:15333*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15333*FLEN/8, x13, x9, x10)

inst_5133:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x2483ffff; valaddr_reg:x12; val_offset:15336*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15336*FLEN/8, x13, x9, x10)

inst_5134:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x24fe0000; valaddr_reg:x12; val_offset:15339*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15339*FLEN/8, x13, x9, x10)

inst_5135:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x2481ffff; valaddr_reg:x12; val_offset:15342*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15342*FLEN/8, x13, x9, x10)

inst_5136:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x24ff0000; valaddr_reg:x12; val_offset:15345*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15345*FLEN/8, x13, x9, x10)

inst_5137:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x2480ffff; valaddr_reg:x12; val_offset:15348*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15348*FLEN/8, x13, x9, x10)

inst_5138:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x24ff8000; valaddr_reg:x12; val_offset:15351*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15351*FLEN/8, x13, x9, x10)

inst_5139:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x24807fff; valaddr_reg:x12; val_offset:15354*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15354*FLEN/8, x13, x9, x10)

inst_5140:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x24ffc000; valaddr_reg:x12; val_offset:15357*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15357*FLEN/8, x13, x9, x10)

inst_5141:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x24803fff; valaddr_reg:x12; val_offset:15360*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15360*FLEN/8, x13, x9, x10)

inst_5142:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x24ffe000; valaddr_reg:x12; val_offset:15363*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15363*FLEN/8, x13, x9, x10)

inst_5143:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x24801fff; valaddr_reg:x12; val_offset:15366*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15366*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_40)
inst_5144:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x24fff000; valaddr_reg:x12; val_offset:15369*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15369*FLEN/8, x13, x9, x10)

inst_5145:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x24800fff; valaddr_reg:x12; val_offset:15372*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15372*FLEN/8, x13, x9, x10)

inst_5146:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x24fff800; valaddr_reg:x12; val_offset:15375*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15375*FLEN/8, x13, x9, x10)

inst_5147:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x248007ff; valaddr_reg:x12; val_offset:15378*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15378*FLEN/8, x13, x9, x10)

inst_5148:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x24fffc00; valaddr_reg:x12; val_offset:15381*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15381*FLEN/8, x13, x9, x10)

inst_5149:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x248003ff; valaddr_reg:x12; val_offset:15384*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15384*FLEN/8, x13, x9, x10)

inst_5150:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x24fffe00; valaddr_reg:x12; val_offset:15387*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15387*FLEN/8, x13, x9, x10)

inst_5151:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x248001ff; valaddr_reg:x12; val_offset:15390*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15390*FLEN/8, x13, x9, x10)

inst_5152:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x24ffff00; valaddr_reg:x12; val_offset:15393*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15393*FLEN/8, x13, x9, x10)

inst_5153:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x248000ff; valaddr_reg:x12; val_offset:15396*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15396*FLEN/8, x13, x9, x10)

inst_5154:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x24ffff80; valaddr_reg:x12; val_offset:15399*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15399*FLEN/8, x13, x9, x10)

inst_5155:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x2480007f; valaddr_reg:x12; val_offset:15402*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15402*FLEN/8, x13, x9, x10)

inst_5156:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x24ffffc0; valaddr_reg:x12; val_offset:15405*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15405*FLEN/8, x13, x9, x10)

inst_5157:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x2480003f; valaddr_reg:x12; val_offset:15408*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15408*FLEN/8, x13, x9, x10)

inst_5158:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x24ffffe0; valaddr_reg:x12; val_offset:15411*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15411*FLEN/8, x13, x9, x10)

inst_5159:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x2480001f; valaddr_reg:x12; val_offset:15414*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15414*FLEN/8, x13, x9, x10)

inst_5160:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x24fffff0; valaddr_reg:x12; val_offset:15417*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15417*FLEN/8, x13, x9, x10)

inst_5161:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x2480000f; valaddr_reg:x12; val_offset:15420*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15420*FLEN/8, x13, x9, x10)

inst_5162:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x24fffff8; valaddr_reg:x12; val_offset:15423*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15423*FLEN/8, x13, x9, x10)

inst_5163:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x24800007; valaddr_reg:x12; val_offset:15426*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15426*FLEN/8, x13, x9, x10)

inst_5164:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x24fffffc; valaddr_reg:x12; val_offset:15429*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15429*FLEN/8, x13, x9, x10)

inst_5165:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x24800003; valaddr_reg:x12; val_offset:15432*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15432*FLEN/8, x13, x9, x10)

inst_5166:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x24fffffe; valaddr_reg:x12; val_offset:15435*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15435*FLEN/8, x13, x9, x10)

inst_5167:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x24800001; valaddr_reg:x12; val_offset:15438*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15438*FLEN/8, x13, x9, x10)

inst_5168:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x3ffffff8; valaddr_reg:x12; val_offset:15441*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15441*FLEN/8, x13, x9, x10)

inst_5169:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x3f800007; valaddr_reg:x12; val_offset:15444*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15444*FLEN/8, x13, x9, x10)

inst_5170:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x3ffffffc; valaddr_reg:x12; val_offset:15447*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15447*FLEN/8, x13, x9, x10)

inst_5171:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x3f800003; valaddr_reg:x12; val_offset:15450*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15450*FLEN/8, x13, x9, x10)

inst_5172:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x3ffffffe; valaddr_reg:x12; val_offset:15453*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15453*FLEN/8, x13, x9, x10)

inst_5173:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x3f800001; valaddr_reg:x12; val_offset:15456*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15456*FLEN/8, x13, x9, x10)

inst_5174:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x3fb6db6d; valaddr_reg:x12; val_offset:15459*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15459*FLEN/8, x13, x9, x10)

inst_5175:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x3fedb6db; valaddr_reg:x12; val_offset:15462*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15462*FLEN/8, x13, x9, x10)

inst_5176:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x3f999999; valaddr_reg:x12; val_offset:15465*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15465*FLEN/8, x13, x9, x10)

inst_5177:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x3fe66666; valaddr_reg:x12; val_offset:15468*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15468*FLEN/8, x13, x9, x10)

inst_5178:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x3fbbbbbb; valaddr_reg:x12; val_offset:15471*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15471*FLEN/8, x13, x9, x10)

inst_5179:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x3fc44444; valaddr_reg:x12; val_offset:15474*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15474*FLEN/8, x13, x9, x10)

inst_5180:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x3fa49249; valaddr_reg:x12; val_offset:15477*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15477*FLEN/8, x13, x9, x10)

inst_5181:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x3fdb6db6; valaddr_reg:x12; val_offset:15480*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15480*FLEN/8, x13, x9, x10)

inst_5182:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x3fb33333; valaddr_reg:x12; val_offset:15483*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15483*FLEN/8, x13, x9, x10)

inst_5183:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22b666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3258b2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f22b666; op2val:0x3258b2;
op3val:0x3fcccccc; valaddr_reg:x12; val_offset:15486*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15486*FLEN/8, x13, x9, x10)

inst_5184:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x25000000; valaddr_reg:x12; val_offset:15489*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15489*FLEN/8, x13, x9, x10)

inst_5185:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x257fffff; valaddr_reg:x12; val_offset:15492*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15492*FLEN/8, x13, x9, x10)

inst_5186:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x25400000; valaddr_reg:x12; val_offset:15495*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15495*FLEN/8, x13, x9, x10)

inst_5187:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x253fffff; valaddr_reg:x12; val_offset:15498*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15498*FLEN/8, x13, x9, x10)

inst_5188:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x25600000; valaddr_reg:x12; val_offset:15501*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15501*FLEN/8, x13, x9, x10)

inst_5189:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x251fffff; valaddr_reg:x12; val_offset:15504*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15504*FLEN/8, x13, x9, x10)

inst_5190:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x25700000; valaddr_reg:x12; val_offset:15507*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15507*FLEN/8, x13, x9, x10)

inst_5191:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x250fffff; valaddr_reg:x12; val_offset:15510*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15510*FLEN/8, x13, x9, x10)

inst_5192:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x25780000; valaddr_reg:x12; val_offset:15513*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15513*FLEN/8, x13, x9, x10)

inst_5193:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x2507ffff; valaddr_reg:x12; val_offset:15516*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15516*FLEN/8, x13, x9, x10)

inst_5194:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x257c0000; valaddr_reg:x12; val_offset:15519*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15519*FLEN/8, x13, x9, x10)

inst_5195:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x2503ffff; valaddr_reg:x12; val_offset:15522*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15522*FLEN/8, x13, x9, x10)

inst_5196:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x257e0000; valaddr_reg:x12; val_offset:15525*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15525*FLEN/8, x13, x9, x10)

inst_5197:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x2501ffff; valaddr_reg:x12; val_offset:15528*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15528*FLEN/8, x13, x9, x10)

inst_5198:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x257f0000; valaddr_reg:x12; val_offset:15531*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15531*FLEN/8, x13, x9, x10)

inst_5199:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x2500ffff; valaddr_reg:x12; val_offset:15534*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15534*FLEN/8, x13, x9, x10)

inst_5200:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x257f8000; valaddr_reg:x12; val_offset:15537*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15537*FLEN/8, x13, x9, x10)

inst_5201:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x25007fff; valaddr_reg:x12; val_offset:15540*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15540*FLEN/8, x13, x9, x10)

inst_5202:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x257fc000; valaddr_reg:x12; val_offset:15543*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15543*FLEN/8, x13, x9, x10)

inst_5203:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x25003fff; valaddr_reg:x12; val_offset:15546*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15546*FLEN/8, x13, x9, x10)

inst_5204:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x257fe000; valaddr_reg:x12; val_offset:15549*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15549*FLEN/8, x13, x9, x10)

inst_5205:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x25001fff; valaddr_reg:x12; val_offset:15552*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15552*FLEN/8, x13, x9, x10)

inst_5206:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x257ff000; valaddr_reg:x12; val_offset:15555*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15555*FLEN/8, x13, x9, x10)

inst_5207:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x25000fff; valaddr_reg:x12; val_offset:15558*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15558*FLEN/8, x13, x9, x10)

inst_5208:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x257ff800; valaddr_reg:x12; val_offset:15561*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15561*FLEN/8, x13, x9, x10)

inst_5209:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x250007ff; valaddr_reg:x12; val_offset:15564*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15564*FLEN/8, x13, x9, x10)

inst_5210:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x257ffc00; valaddr_reg:x12; val_offset:15567*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15567*FLEN/8, x13, x9, x10)

inst_5211:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x250003ff; valaddr_reg:x12; val_offset:15570*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15570*FLEN/8, x13, x9, x10)

inst_5212:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x257ffe00; valaddr_reg:x12; val_offset:15573*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15573*FLEN/8, x13, x9, x10)

inst_5213:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x250001ff; valaddr_reg:x12; val_offset:15576*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15576*FLEN/8, x13, x9, x10)

inst_5214:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x257fff00; valaddr_reg:x12; val_offset:15579*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15579*FLEN/8, x13, x9, x10)

inst_5215:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x250000ff; valaddr_reg:x12; val_offset:15582*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15582*FLEN/8, x13, x9, x10)

inst_5216:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x257fff80; valaddr_reg:x12; val_offset:15585*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15585*FLEN/8, x13, x9, x10)

inst_5217:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x2500007f; valaddr_reg:x12; val_offset:15588*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15588*FLEN/8, x13, x9, x10)

inst_5218:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x257fffc0; valaddr_reg:x12; val_offset:15591*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15591*FLEN/8, x13, x9, x10)

inst_5219:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x2500003f; valaddr_reg:x12; val_offset:15594*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15594*FLEN/8, x13, x9, x10)

inst_5220:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x257fffe0; valaddr_reg:x12; val_offset:15597*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15597*FLEN/8, x13, x9, x10)

inst_5221:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x2500001f; valaddr_reg:x12; val_offset:15600*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15600*FLEN/8, x13, x9, x10)

inst_5222:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x257ffff0; valaddr_reg:x12; val_offset:15603*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15603*FLEN/8, x13, x9, x10)

inst_5223:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x2500000f; valaddr_reg:x12; val_offset:15606*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15606*FLEN/8, x13, x9, x10)

inst_5224:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x257ffff8; valaddr_reg:x12; val_offset:15609*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15609*FLEN/8, x13, x9, x10)

inst_5225:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x25000007; valaddr_reg:x12; val_offset:15612*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15612*FLEN/8, x13, x9, x10)

inst_5226:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x257ffffc; valaddr_reg:x12; val_offset:15615*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15615*FLEN/8, x13, x9, x10)

inst_5227:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x25000003; valaddr_reg:x12; val_offset:15618*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15618*FLEN/8, x13, x9, x10)

inst_5228:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x257ffffe; valaddr_reg:x12; val_offset:15621*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15621*FLEN/8, x13, x9, x10)

inst_5229:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x25000001; valaddr_reg:x12; val_offset:15624*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15624*FLEN/8, x13, x9, x10)

inst_5230:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x3ffffff8; valaddr_reg:x12; val_offset:15627*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15627*FLEN/8, x13, x9, x10)

inst_5231:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x3f800007; valaddr_reg:x12; val_offset:15630*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15630*FLEN/8, x13, x9, x10)

inst_5232:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x3ffffffc; valaddr_reg:x12; val_offset:15633*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15633*FLEN/8, x13, x9, x10)

inst_5233:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x3f800003; valaddr_reg:x12; val_offset:15636*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15636*FLEN/8, x13, x9, x10)

inst_5234:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x3ffffffe; valaddr_reg:x12; val_offset:15639*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15639*FLEN/8, x13, x9, x10)

inst_5235:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x3f800001; valaddr_reg:x12; val_offset:15642*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15642*FLEN/8, x13, x9, x10)

inst_5236:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x3fb6db6d; valaddr_reg:x12; val_offset:15645*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15645*FLEN/8, x13, x9, x10)

inst_5237:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x3fedb6db; valaddr_reg:x12; val_offset:15648*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15648*FLEN/8, x13, x9, x10)

inst_5238:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x3f999999; valaddr_reg:x12; val_offset:15651*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15651*FLEN/8, x13, x9, x10)

inst_5239:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x3fe66666; valaddr_reg:x12; val_offset:15654*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15654*FLEN/8, x13, x9, x10)

inst_5240:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x3fbbbbbb; valaddr_reg:x12; val_offset:15657*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15657*FLEN/8, x13, x9, x10)

inst_5241:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x3fc44444; valaddr_reg:x12; val_offset:15660*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15660*FLEN/8, x13, x9, x10)

inst_5242:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x3fa49249; valaddr_reg:x12; val_offset:15663*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15663*FLEN/8, x13, x9, x10)

inst_5243:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x3fdb6db6; valaddr_reg:x12; val_offset:15666*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15666*FLEN/8, x13, x9, x10)

inst_5244:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x3fb33333; valaddr_reg:x12; val_offset:15669*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15669*FLEN/8, x13, x9, x10)

inst_5245:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07a843 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x78c662 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87a843; op2val:0x78c662;
op3val:0x3fcccccc; valaddr_reg:x12; val_offset:15672*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15672*FLEN/8, x13, x9, x10)

inst_5246:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x25800000; valaddr_reg:x12; val_offset:15675*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15675*FLEN/8, x13, x9, x10)

inst_5247:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x25ffffff; valaddr_reg:x12; val_offset:15678*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15678*FLEN/8, x13, x9, x10)

inst_5248:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x25c00000; valaddr_reg:x12; val_offset:15681*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15681*FLEN/8, x13, x9, x10)

inst_5249:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x25bfffff; valaddr_reg:x12; val_offset:15684*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15684*FLEN/8, x13, x9, x10)

inst_5250:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x25e00000; valaddr_reg:x12; val_offset:15687*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15687*FLEN/8, x13, x9, x10)

inst_5251:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x259fffff; valaddr_reg:x12; val_offset:15690*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15690*FLEN/8, x13, x9, x10)

inst_5252:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x25f00000; valaddr_reg:x12; val_offset:15693*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15693*FLEN/8, x13, x9, x10)

inst_5253:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x258fffff; valaddr_reg:x12; val_offset:15696*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15696*FLEN/8, x13, x9, x10)

inst_5254:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x25f80000; valaddr_reg:x12; val_offset:15699*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15699*FLEN/8, x13, x9, x10)

inst_5255:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x2587ffff; valaddr_reg:x12; val_offset:15702*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15702*FLEN/8, x13, x9, x10)

inst_5256:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x25fc0000; valaddr_reg:x12; val_offset:15705*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15705*FLEN/8, x13, x9, x10)

inst_5257:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x2583ffff; valaddr_reg:x12; val_offset:15708*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15708*FLEN/8, x13, x9, x10)

inst_5258:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x25fe0000; valaddr_reg:x12; val_offset:15711*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15711*FLEN/8, x13, x9, x10)

inst_5259:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x2581ffff; valaddr_reg:x12; val_offset:15714*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15714*FLEN/8, x13, x9, x10)

inst_5260:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x25ff0000; valaddr_reg:x12; val_offset:15717*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15717*FLEN/8, x13, x9, x10)

inst_5261:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x2580ffff; valaddr_reg:x12; val_offset:15720*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15720*FLEN/8, x13, x9, x10)

inst_5262:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x25ff8000; valaddr_reg:x12; val_offset:15723*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15723*FLEN/8, x13, x9, x10)

inst_5263:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x25807fff; valaddr_reg:x12; val_offset:15726*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15726*FLEN/8, x13, x9, x10)

inst_5264:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x25ffc000; valaddr_reg:x12; val_offset:15729*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15729*FLEN/8, x13, x9, x10)

inst_5265:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x25803fff; valaddr_reg:x12; val_offset:15732*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15732*FLEN/8, x13, x9, x10)

inst_5266:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x25ffe000; valaddr_reg:x12; val_offset:15735*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15735*FLEN/8, x13, x9, x10)

inst_5267:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x25801fff; valaddr_reg:x12; val_offset:15738*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15738*FLEN/8, x13, x9, x10)

inst_5268:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x25fff000; valaddr_reg:x12; val_offset:15741*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15741*FLEN/8, x13, x9, x10)

inst_5269:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x25800fff; valaddr_reg:x12; val_offset:15744*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15744*FLEN/8, x13, x9, x10)

inst_5270:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x25fff800; valaddr_reg:x12; val_offset:15747*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15747*FLEN/8, x13, x9, x10)

inst_5271:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x258007ff; valaddr_reg:x12; val_offset:15750*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15750*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_41)
inst_5272:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x25fffc00; valaddr_reg:x12; val_offset:15753*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15753*FLEN/8, x13, x9, x10)

inst_5273:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x258003ff; valaddr_reg:x12; val_offset:15756*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15756*FLEN/8, x13, x9, x10)

inst_5274:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x25fffe00; valaddr_reg:x12; val_offset:15759*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15759*FLEN/8, x13, x9, x10)

inst_5275:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x258001ff; valaddr_reg:x12; val_offset:15762*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15762*FLEN/8, x13, x9, x10)

inst_5276:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x25ffff00; valaddr_reg:x12; val_offset:15765*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15765*FLEN/8, x13, x9, x10)

inst_5277:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x258000ff; valaddr_reg:x12; val_offset:15768*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15768*FLEN/8, x13, x9, x10)

inst_5278:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x25ffff80; valaddr_reg:x12; val_offset:15771*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15771*FLEN/8, x13, x9, x10)

inst_5279:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x2580007f; valaddr_reg:x12; val_offset:15774*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15774*FLEN/8, x13, x9, x10)

inst_5280:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x25ffffc0; valaddr_reg:x12; val_offset:15777*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15777*FLEN/8, x13, x9, x10)

inst_5281:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x2580003f; valaddr_reg:x12; val_offset:15780*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15780*FLEN/8, x13, x9, x10)

inst_5282:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x25ffffe0; valaddr_reg:x12; val_offset:15783*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15783*FLEN/8, x13, x9, x10)

inst_5283:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x2580001f; valaddr_reg:x12; val_offset:15786*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15786*FLEN/8, x13, x9, x10)

inst_5284:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x25fffff0; valaddr_reg:x12; val_offset:15789*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15789*FLEN/8, x13, x9, x10)

inst_5285:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x2580000f; valaddr_reg:x12; val_offset:15792*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15792*FLEN/8, x13, x9, x10)

inst_5286:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x25fffff8; valaddr_reg:x12; val_offset:15795*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15795*FLEN/8, x13, x9, x10)

inst_5287:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x25800007; valaddr_reg:x12; val_offset:15798*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15798*FLEN/8, x13, x9, x10)

inst_5288:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x25fffffc; valaddr_reg:x12; val_offset:15801*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15801*FLEN/8, x13, x9, x10)

inst_5289:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x25800003; valaddr_reg:x12; val_offset:15804*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15804*FLEN/8, x13, x9, x10)

inst_5290:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x25fffffe; valaddr_reg:x12; val_offset:15807*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15807*FLEN/8, x13, x9, x10)

inst_5291:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x25800001; valaddr_reg:x12; val_offset:15810*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15810*FLEN/8, x13, x9, x10)

inst_5292:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x3ffffff8; valaddr_reg:x12; val_offset:15813*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15813*FLEN/8, x13, x9, x10)

inst_5293:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x3f800007; valaddr_reg:x12; val_offset:15816*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15816*FLEN/8, x13, x9, x10)

inst_5294:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x3ffffffc; valaddr_reg:x12; val_offset:15819*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15819*FLEN/8, x13, x9, x10)

inst_5295:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x3f800003; valaddr_reg:x12; val_offset:15822*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15822*FLEN/8, x13, x9, x10)

inst_5296:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x3ffffffe; valaddr_reg:x12; val_offset:15825*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15825*FLEN/8, x13, x9, x10)

inst_5297:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x3f800001; valaddr_reg:x12; val_offset:15828*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15828*FLEN/8, x13, x9, x10)

inst_5298:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x3fb6db6d; valaddr_reg:x12; val_offset:15831*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15831*FLEN/8, x13, x9, x10)

inst_5299:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x3fedb6db; valaddr_reg:x12; val_offset:15834*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15834*FLEN/8, x13, x9, x10)

inst_5300:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x3f999999; valaddr_reg:x12; val_offset:15837*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15837*FLEN/8, x13, x9, x10)

inst_5301:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x3fe66666; valaddr_reg:x12; val_offset:15840*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15840*FLEN/8, x13, x9, x10)

inst_5302:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x3fbbbbbb; valaddr_reg:x12; val_offset:15843*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15843*FLEN/8, x13, x9, x10)

inst_5303:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x3fc44444; valaddr_reg:x12; val_offset:15846*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15846*FLEN/8, x13, x9, x10)

inst_5304:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x3fa49249; valaddr_reg:x12; val_offset:15849*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15849*FLEN/8, x13, x9, x10)

inst_5305:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x3fdb6db6; valaddr_reg:x12; val_offset:15852*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15852*FLEN/8, x13, x9, x10)

inst_5306:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x3fb33333; valaddr_reg:x12; val_offset:15855*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15855*FLEN/8, x13, x9, x10)

inst_5307:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eac46 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2ee629 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eac46; op2val:0x2ee629;
op3val:0x3fcccccc; valaddr_reg:x12; val_offset:15858*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15858*FLEN/8, x13, x9, x10)

inst_5308:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d2373 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40b935 and fs3 == 0 and fe3 == 0x4c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7efd2373; op2val:0x40b935;
op3val:0x26000000; valaddr_reg:x12; val_offset:15861*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15861*FLEN/8, x13, x9, x10)

inst_5309:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d2373 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40b935 and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7efd2373; op2val:0x40b935;
op3val:0x267fffff; valaddr_reg:x12; val_offset:15864*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15864*FLEN/8, x13, x9, x10)

inst_5310:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d2373 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40b935 and fs3 == 0 and fe3 == 0x4c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7efd2373; op2val:0x40b935;
op3val:0x26400000; valaddr_reg:x12; val_offset:15867*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15867*FLEN/8, x13, x9, x10)

inst_5311:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d2373 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40b935 and fs3 == 0 and fe3 == 0x4c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7efd2373; op2val:0x40b935;
op3val:0x263fffff; valaddr_reg:x12; val_offset:15870*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15870*FLEN/8, x13, x9, x10)

inst_5312:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d2373 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40b935 and fs3 == 0 and fe3 == 0x4c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7efd2373; op2val:0x40b935;
op3val:0x26600000; valaddr_reg:x12; val_offset:15873*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15873*FLEN/8, x13, x9, x10)

inst_5313:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d2373 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40b935 and fs3 == 0 and fe3 == 0x4c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7efd2373; op2val:0x40b935;
op3val:0x261fffff; valaddr_reg:x12; val_offset:15876*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15876*FLEN/8, x13, x9, x10)

inst_5314:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d2373 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40b935 and fs3 == 0 and fe3 == 0x4c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7efd2373; op2val:0x40b935;
op3val:0x26700000; valaddr_reg:x12; val_offset:15879*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15879*FLEN/8, x13, x9, x10)

inst_5315:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d2373 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40b935 and fs3 == 0 and fe3 == 0x4c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7efd2373; op2val:0x40b935;
op3val:0x260fffff; valaddr_reg:x12; val_offset:15882*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15882*FLEN/8, x13, x9, x10)

inst_5316:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d2373 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40b935 and fs3 == 0 and fe3 == 0x4c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7efd2373; op2val:0x40b935;
op3val:0x26780000; valaddr_reg:x12; val_offset:15885*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15885*FLEN/8, x13, x9, x10)

inst_5317:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d2373 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40b935 and fs3 == 0 and fe3 == 0x4c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7efd2373; op2val:0x40b935;
op3val:0x2607ffff; valaddr_reg:x12; val_offset:15888*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15888*FLEN/8, x13, x9, x10)

inst_5318:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d2373 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40b935 and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7efd2373; op2val:0x40b935;
op3val:0x267c0000; valaddr_reg:x12; val_offset:15891*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15891*FLEN/8, x13, x9, x10)

inst_5319:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d2373 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40b935 and fs3 == 0 and fe3 == 0x4c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7efd2373; op2val:0x40b935;
op3val:0x2603ffff; valaddr_reg:x12; val_offset:15894*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15894*FLEN/8, x13, x9, x10)

inst_5320:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d2373 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40b935 and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7efd2373; op2val:0x40b935;
op3val:0x267e0000; valaddr_reg:x12; val_offset:15897*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15897*FLEN/8, x13, x9, x10)

inst_5321:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d2373 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40b935 and fs3 == 0 and fe3 == 0x4c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7efd2373; op2val:0x40b935;
op3val:0x2601ffff; valaddr_reg:x12; val_offset:15900*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15900*FLEN/8, x13, x9, x10)

inst_5322:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d2373 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40b935 and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7efd2373; op2val:0x40b935;
op3val:0x267f0000; valaddr_reg:x12; val_offset:15903*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15903*FLEN/8, x13, x9, x10)

inst_5323:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d2373 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40b935 and fs3 == 0 and fe3 == 0x4c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7efd2373; op2val:0x40b935;
op3val:0x2600ffff; valaddr_reg:x12; val_offset:15906*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15906*FLEN/8, x13, x9, x10)

inst_5324:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d2373 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40b935 and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7efd2373; op2val:0x40b935;
op3val:0x267f8000; valaddr_reg:x12; val_offset:15909*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15909*FLEN/8, x13, x9, x10)

inst_5325:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d2373 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40b935 and fs3 == 0 and fe3 == 0x4c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7efd2373; op2val:0x40b935;
op3val:0x26007fff; valaddr_reg:x12; val_offset:15912*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15912*FLEN/8, x13, x9, x10)

inst_5326:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d2373 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40b935 and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7efd2373; op2val:0x40b935;
op3val:0x267fc000; valaddr_reg:x12; val_offset:15915*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15915*FLEN/8, x13, x9, x10)

inst_5327:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d2373 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40b935 and fs3 == 0 and fe3 == 0x4c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7efd2373; op2val:0x40b935;
op3val:0x26003fff; valaddr_reg:x12; val_offset:15918*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 15918*FLEN/8, x13, x9, x10)

#endif
RVTEST_CODE_END
RVMODEL_HALT
RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(2130215433,32,FLEN)
NAN_BOXED(4320754,32,FLEN)
NAN_BOXED(545259516,32,FLEN)
NAN_BOXED(2130215433,32,FLEN)
NAN_BOXED(4320754,32,FLEN)
NAN_BOXED(536870915,32,FLEN)
NAN_BOXED(2130215433,32,FLEN)
NAN_BOXED(4320754,32,FLEN)
NAN_BOXED(545259518,32,FLEN)
NAN_BOXED(2130215433,32,FLEN)
NAN_BOXED(4320754,32,FLEN)
NAN_BOXED(536870913,32,FLEN)
NAN_BOXED(2130215433,32,FLEN)
NAN_BOXED(4320754,32,FLEN)
NAN_BOXED(1073741816,32,FLEN)
NAN_BOXED(2130215433,32,FLEN)
NAN_BOXED(4320754,32,FLEN)
NAN_BOXED(1065353223,32,FLEN)
NAN_BOXED(2130215433,32,FLEN)
NAN_BOXED(4320754,32,FLEN)
NAN_BOXED(1073741820,32,FLEN)
NAN_BOXED(2130215433,32,FLEN)
NAN_BOXED(4320754,32,FLEN)
NAN_BOXED(1065353219,32,FLEN)
NAN_BOXED(2130215433,32,FLEN)
NAN_BOXED(4320754,32,FLEN)
NAN_BOXED(1073741822,32,FLEN)
NAN_BOXED(2130215433,32,FLEN)
NAN_BOXED(4320754,32,FLEN)
NAN_BOXED(1065353217,32,FLEN)
NAN_BOXED(2130215433,32,FLEN)
NAN_BOXED(4320754,32,FLEN)
NAN_BOXED(1068948333,32,FLEN)
NAN_BOXED(2130215433,32,FLEN)
NAN_BOXED(4320754,32,FLEN)
NAN_BOXED(1072543451,32,FLEN)
NAN_BOXED(2130215433,32,FLEN)
NAN_BOXED(4320754,32,FLEN)
NAN_BOXED(1067030937,32,FLEN)
NAN_BOXED(2130215433,32,FLEN)
NAN_BOXED(4320754,32,FLEN)
NAN_BOXED(1072064102,32,FLEN)
NAN_BOXED(2130215433,32,FLEN)
NAN_BOXED(4320754,32,FLEN)
NAN_BOXED(1069267899,32,FLEN)
NAN_BOXED(2130215433,32,FLEN)
NAN_BOXED(4320754,32,FLEN)
NAN_BOXED(1069827140,32,FLEN)
NAN_BOXED(2130215433,32,FLEN)
NAN_BOXED(4320754,32,FLEN)
NAN_BOXED(1067749961,32,FLEN)
NAN_BOXED(2130215433,32,FLEN)
NAN_BOXED(4320754,32,FLEN)
NAN_BOXED(1071345078,32,FLEN)
NAN_BOXED(2130215433,32,FLEN)
NAN_BOXED(4320754,32,FLEN)
NAN_BOXED(1068708659,32,FLEN)
NAN_BOXED(2130215433,32,FLEN)
NAN_BOXED(4320754,32,FLEN)
NAN_BOXED(1070386380,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(545259520,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(553648127,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(549453824,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(549453823,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(551550976,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(547356671,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(552599552,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(546308095,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(553123840,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(545783807,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(553385984,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(545521663,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(553517056,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(545390591,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(553582592,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(545325055,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(553615360,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(545292287,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(553631744,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(545275903,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(553639936,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(545267711,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(553644032,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(545263615,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(553646080,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(545261567,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(553647104,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(545260543,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(553647616,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(545260031,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(553647872,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(545259775,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(553648000,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(545259647,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(553648064,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(545259583,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(553648096,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(545259551,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(553648112,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(545259535,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(553648120,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(545259527,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(553648124,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(545259523,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(553648126,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(545259521,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(1073741816,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(1065353223,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(1073741820,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(1065353219,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(1073741822,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(1065353217,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(1068948333,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(1072543451,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(1067030937,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(1072064102,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(1069267899,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(1069827140,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(1067749961,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(1071345078,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(1068708659,32,FLEN)
NAN_BOXED(2114026236,32,FLEN)
NAN_BOXED(16585393,32,FLEN)
NAN_BOXED(1070386380,32,FLEN)
NAN_BOXED(2116962738,32,FLEN)
NAN_BOXED(12321474,32,FLEN)
NAN_BOXED(553648128,32,FLEN)
NAN_BOXED(2116962738,32,FLEN)
NAN_BOXED(12321474,32,FLEN)
NAN_BOXED(562036735,32,FLEN)
NAN_BOXED(2116962738,32,FLEN)
NAN_BOXED(12321474,32,FLEN)
NAN_BOXED(557842432,32,FLEN)
NAN_BOXED(2116962738,32,FLEN)
NAN_BOXED(12321474,32,FLEN)
NAN_BOXED(557842431,32,FLEN)
NAN_BOXED(2116962738,32,FLEN)
NAN_BOXED(12321474,32,FLEN)
NAN_BOXED(559939584,32,FLEN)
NAN_BOXED(2116962738,32,FLEN)
NAN_BOXED(12321474,32,FLEN)
NAN_BOXED(555745279,32,FLEN)
NAN_BOXED(2116962738,32,FLEN)
NAN_BOXED(12321474,32,FLEN)
NAN_BOXED(560988160,32,FLEN)
NAN_BOXED(2116962738,32,FLEN)
NAN_BOXED(12321474,32,FLEN)
NAN_BOXED(554696703,32,FLEN)
NAN_BOXED(2116962738,32,FLEN)
NAN_BOXED(12321474,32,FLEN)
NAN_BOXED(561512448,32,FLEN)
NAN_BOXED(2116962738,32,FLEN)
NAN_BOXED(12321474,32,FLEN)
NAN_BOXED(554172415,32,FLEN)
NAN_BOXED(2116962738,32,FLEN)
NAN_BOXED(12321474,32,FLEN)
NAN_BOXED(561774592,32,FLEN)
NAN_BOXED(2116962738,32,FLEN)
NAN_BOXED(12321474,32,FLEN)
NAN_BOXED(553910271,32,FLEN)
NAN_BOXED(2116962738,32,FLEN)
NAN_BOXED(12321474,32,FLEN)
NAN_BOXED(561905664,32,FLEN)
NAN_BOXED(2116962738,32,FLEN)
NAN_BOXED(12321474,32,FLEN)
NAN_BOXED(553779199,32,FLEN)
NAN_BOXED(2116962738,32,FLEN)
NAN_BOXED(12321474,32,FLEN)
NAN_BOXED(561971200,32,FLEN)
NAN_BOXED(2116962738,32,FLEN)
NAN_BOXED(12321474,32,FLEN)
NAN_BOXED(553713663,32,FLEN)
NAN_BOXED(2116962738,32,FLEN)
NAN_BOXED(12321474,32,FLEN)
NAN_BOXED(562003968,32,FLEN)
NAN_BOXED(2116962738,32,FLEN)
NAN_BOXED(12321474,32,FLEN)
NAN_BOXED(553680895,32,FLEN)
NAN_BOXED(2116962738,32,FLEN)
NAN_BOXED(12321474,32,FLEN)
NAN_BOXED(562020352,32,FLEN)
NAN_BOXED(2116962738,32,FLEN)
NAN_BOXED(12321474,32,FLEN)
NAN_BOXED(553664511,32,FLEN)
NAN_BOXED(2116962738,32,FLEN)
NAN_BOXED(12321474,32,FLEN)
NAN_BOXED(562028544,32,FLEN)
NAN_BOXED(2116962738,32,FLEN)
NAN_BOXED(12321474,32,FLEN)
NAN_BOXED(553656319,32,FLEN)
NAN_BOXED(2116962738,32,FLEN)
NAN_BOXED(12321474,32,FLEN)
NAN_BOXED(562032640,32,FLEN)
NAN_BOXED(2116962738,32,FLEN)
NAN_BOXED(12321474,32,FLEN)
NAN_BOXED(553652223,32,FLEN)
NAN_BOXED(2116962738,32,FLEN)
NAN_BOXED(12321474,32,FLEN)
NAN_BOXED(562034688,32,FLEN)
NAN_BOXED(2116962738,32,FLEN)
NAN_BOXED(12321474,32,FLEN)
NAN_BOXED(553650175,32,FLEN)
NAN_BOXED(2116962738,32,FLEN)
NAN_BOXED(12321474,32,FLEN)
NAN_BOXED(562035712,32,FLEN)
NAN_BOXED(2116962738,32,FLEN)
NAN_BOXED(12321474,32,FLEN)
NAN_BOXED(553649151,32,FLEN)
NAN_BOXED(2116962738,32,FLEN)
NAN_BOXED(12321474,32,FLEN)
NAN_BOXED(562036224,32,FLEN)
NAN_BOXED(2116962738,32,FLEN)
NAN_BOXED(12321474,32,FLEN)
NAN_BOXED(553648639,32,FLEN)
NAN_BOXED(2116962738,32,FLEN)
NAN_BOXED(12321474,32,FLEN)
NAN_BOXED(562036480,32,FLEN)
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NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(637538303,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(645920768,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(637536255,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(645921792,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(637535231,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(645922304,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(637534719,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(645922560,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(637534463,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(645922688,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(637534335,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(645922752,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(637534271,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(645922784,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(637534239,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(645922800,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(637534223,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(645922808,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(637534215,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(645922812,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(637534211,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(645922814,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(637534209,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(1073741816,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(1065353223,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(1073741820,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(1065353219,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(1073741822,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(1065353217,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(1068948333,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(1072543451,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(1067030937,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(1072064102,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(1069267899,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(1069827140,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(1067749961,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(1071345078,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(1068708659,32,FLEN)
NAN_BOXED(2130518899,32,FLEN)
NAN_BOXED(4241717,32,FLEN)
NAN_BOXED(1070386380,32,FLEN)
NAN_BOXED(2129253813,32,FLEN)
NAN_BOXED(4591881,32,FLEN)
NAN_BOXED(645922816,32,FLEN)
NAN_BOXED(2129253813,32,FLEN)
NAN_BOXED(4591881,32,FLEN)
NAN_BOXED(654311423,32,FLEN)
NAN_BOXED(2129253813,32,FLEN)
NAN_BOXED(4591881,32,FLEN)
NAN_BOXED(650117120,32,FLEN)
NAN_BOXED(2129253813,32,FLEN)
NAN_BOXED(4591881,32,FLEN)
NAN_BOXED(650117119,32,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;



signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 48*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_0:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_2:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_3:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_4:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_5:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_6:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_7:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_8:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_9:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_10:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_11:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_12:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_13:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_14:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_15:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_16:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_17:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_18:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_19:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_20:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_21:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_22:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_23:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_24:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_25:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_26:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_27:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_28:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_29:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_30:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_31:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_32:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_33:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_34:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_35:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_36:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_37:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_38:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_39:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_40:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_41:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_42:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_43:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_44:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_45:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_46:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_47:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_48:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_49:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_50:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_51:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_52:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_53:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_54:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_55:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_56:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_57:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_58:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_59:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_60:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_61:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_62:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_63:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_64:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_65:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_66:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_67:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_68:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_69:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_70:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_71:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_72:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_73:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_74:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_75:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_76:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_77:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_78:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_79:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_80:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_81:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_82:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_83:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_84:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_85:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_86:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_87:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_88:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_89:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_90:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_91:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_92:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_93:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_94:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_95:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_96:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_97:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_98:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_99:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_100:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_101:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_102:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_103:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_104:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_105:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_106:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_107:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_108:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_109:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_110:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_111:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_112:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_113:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_114:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_115:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_116:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_117:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_118:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_119:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_120:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_121:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_122:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_123:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_124:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_125:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_126:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_127:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_128:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_129:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_130:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_131:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_132:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_133:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_134:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_135:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_136:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_137:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_138:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_139:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_140:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_141:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_142:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_143:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_144:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_145:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_146:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_147:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_148:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_149:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_150:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_151:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_152:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_153:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_154:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_155:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_156:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_157:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_158:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_159:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_160:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_161:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_162:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_163:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_164:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_165:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_166:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_167:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_168:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_169:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_170:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_171:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_172:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_173:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_174:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_175:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_176:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_177:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_178:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_179:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_180:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_181:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_182:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_183:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_184:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_185:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_186:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_187:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_188:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_189:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_190:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_191:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_192:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_193:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_194:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_195:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_196:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_197:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_198:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_199:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_200:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_201:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_202:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_203:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_204:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_205:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_206:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_207:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_208:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_209:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_210:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_211:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_212:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_213:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_214:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_215:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_216:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_217:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_218:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_219:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_220:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_221:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_222:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_223:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_224:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_225:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_226:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_227:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_228:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_229:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_230:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_231:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_232:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_233:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_234:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_235:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_236:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_237:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_238:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_239:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_240:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_241:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_242:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_243:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_244:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_245:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_246:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_247:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_248:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_249:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_250:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_251:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_252:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_253:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_254:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_255:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_256:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_257:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_258:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_259:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_260:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_261:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_262:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_263:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_264:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_265:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_266:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_267:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_268:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_269:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_270:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_271:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_272:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_273:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_274:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_275:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_276:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_277:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_278:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_279:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_280:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_281:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_282:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_283:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_284:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_285:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_286:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_287:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_288:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_289:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_290:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_291:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_292:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_293:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_294:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_295:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_296:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_297:
    .fill 180*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine
tsig_begin_canary:
CANARY;

mtrap_sigptr:
    .fill 64*XLEN/32,4,0xdeadbeef

tsig_end_canary:
CANARY;
#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif


sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
