
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.7.1
// timestamp : Fri Jun 17 14:18:08 2022 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /scratch/pawan/work/normalised/RV32F/fnmsub.s.cgf \
 \
//                  -- xlen 32  \
//                  --randomize \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fnmsub.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fnmsub_b15 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fnmsub_b15)
RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15)
RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_30720:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a33ce and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a33ce; op2val:0x0;
op3val:0x3ffc000; valaddr_reg:x3; val_offset:92160*0 + 3*-1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92160*0 + 3*0*FLEN/8, x4, x1, x2)

inst_30721:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a33ce and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a33ce; op2val:0x0;
op3val:0x3ffe000; valaddr_reg:x3; val_offset:92163*0 + 3*0*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92163*0 + 3*1*FLEN/8, x4, x1, x2)

inst_30722:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a33ce and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a33ce; op2val:0x0;
op3val:0x3fff000; valaddr_reg:x3; val_offset:92166*0 + 3*1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92166*0 + 3*2*FLEN/8, x4, x1, x2)

inst_30723:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a33ce and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a33ce; op2val:0x0;
op3val:0x3fff800; valaddr_reg:x3; val_offset:92169*0 + 3*2*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92169*0 + 3*3*FLEN/8, x4, x1, x2)

inst_30724:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a33ce and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a33ce; op2val:0x0;
op3val:0x3fffc00; valaddr_reg:x3; val_offset:92172*0 + 3*3*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92172*0 + 3*4*FLEN/8, x4, x1, x2)

inst_30725:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a33ce and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a33ce; op2val:0x0;
op3val:0x3fffe00; valaddr_reg:x3; val_offset:92175*0 + 3*4*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92175*0 + 3*5*FLEN/8, x4, x1, x2)

inst_30726:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a33ce and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a33ce; op2val:0x0;
op3val:0x3ffff00; valaddr_reg:x3; val_offset:92178*0 + 3*5*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92178*0 + 3*6*FLEN/8, x4, x1, x2)

inst_30727:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a33ce and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a33ce; op2val:0x0;
op3val:0x3ffff80; valaddr_reg:x3; val_offset:92181*0 + 3*6*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92181*0 + 3*7*FLEN/8, x4, x1, x2)

inst_30728:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a33ce and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a33ce; op2val:0x0;
op3val:0x3ffffc0; valaddr_reg:x3; val_offset:92184*0 + 3*7*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92184*0 + 3*8*FLEN/8, x4, x1, x2)

inst_30729:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a33ce and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a33ce; op2val:0x0;
op3val:0x3ffffe0; valaddr_reg:x3; val_offset:92187*0 + 3*8*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92187*0 + 3*9*FLEN/8, x4, x1, x2)

inst_30730:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a33ce and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a33ce; op2val:0x0;
op3val:0x3fffff0; valaddr_reg:x3; val_offset:92190*0 + 3*9*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92190*0 + 3*10*FLEN/8, x4, x1, x2)

inst_30731:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a33ce and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a33ce; op2val:0x0;
op3val:0x3fffff8; valaddr_reg:x3; val_offset:92193*0 + 3*10*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92193*0 + 3*11*FLEN/8, x4, x1, x2)

inst_30732:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a33ce and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a33ce; op2val:0x0;
op3val:0x3fffffc; valaddr_reg:x3; val_offset:92196*0 + 3*11*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92196*0 + 3*12*FLEN/8, x4, x1, x2)

inst_30733:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a33ce and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a33ce; op2val:0x0;
op3val:0x3fffffe; valaddr_reg:x3; val_offset:92199*0 + 3*12*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92199*0 + 3*13*FLEN/8, x4, x1, x2)

inst_30734:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a33ce and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a33ce; op2val:0x0;
op3val:0x3ffffff; valaddr_reg:x3; val_offset:92202*0 + 3*13*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92202*0 + 3*14*FLEN/8, x4, x1, x2)

inst_30735:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x3f800001; valaddr_reg:x3; val_offset:92205*0 + 3*14*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92205*0 + 3*15*FLEN/8, x4, x1, x2)

inst_30736:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x3f800003; valaddr_reg:x3; val_offset:92208*0 + 3*15*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92208*0 + 3*16*FLEN/8, x4, x1, x2)

inst_30737:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x3f800007; valaddr_reg:x3; val_offset:92211*0 + 3*16*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92211*0 + 3*17*FLEN/8, x4, x1, x2)

inst_30738:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x3f999999; valaddr_reg:x3; val_offset:92214*0 + 3*17*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92214*0 + 3*18*FLEN/8, x4, x1, x2)

inst_30739:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x3fa49249; valaddr_reg:x3; val_offset:92217*0 + 3*18*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92217*0 + 3*19*FLEN/8, x4, x1, x2)

inst_30740:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x3fb33333; valaddr_reg:x3; val_offset:92220*0 + 3*19*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92220*0 + 3*20*FLEN/8, x4, x1, x2)

inst_30741:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:92223*0 + 3*20*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92223*0 + 3*21*FLEN/8, x4, x1, x2)

inst_30742:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:92226*0 + 3*21*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92226*0 + 3*22*FLEN/8, x4, x1, x2)

inst_30743:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x3fc44444; valaddr_reg:x3; val_offset:92229*0 + 3*22*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92229*0 + 3*23*FLEN/8, x4, x1, x2)

inst_30744:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x3fcccccc; valaddr_reg:x3; val_offset:92232*0 + 3*23*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92232*0 + 3*24*FLEN/8, x4, x1, x2)

inst_30745:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:92235*0 + 3*24*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92235*0 + 3*25*FLEN/8, x4, x1, x2)

inst_30746:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x3fe66666; valaddr_reg:x3; val_offset:92238*0 + 3*25*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92238*0 + 3*26*FLEN/8, x4, x1, x2)

inst_30747:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x3fedb6db; valaddr_reg:x3; val_offset:92241*0 + 3*26*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92241*0 + 3*27*FLEN/8, x4, x1, x2)

inst_30748:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x3ffffff8; valaddr_reg:x3; val_offset:92244*0 + 3*27*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92244*0 + 3*28*FLEN/8, x4, x1, x2)

inst_30749:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x3ffffffc; valaddr_reg:x3; val_offset:92247*0 + 3*28*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92247*0 + 3*29*FLEN/8, x4, x1, x2)

inst_30750:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x3ffffffe; valaddr_reg:x3; val_offset:92250*0 + 3*29*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92250*0 + 3*30*FLEN/8, x4, x1, x2)

inst_30751:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x43000000; valaddr_reg:x3; val_offset:92253*0 + 3*30*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92253*0 + 3*31*FLEN/8, x4, x1, x2)

inst_30752:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x43000001; valaddr_reg:x3; val_offset:92256*0 + 3*31*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92256*0 + 3*32*FLEN/8, x4, x1, x2)

inst_30753:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x43000003; valaddr_reg:x3; val_offset:92259*0 + 3*32*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92259*0 + 3*33*FLEN/8, x4, x1, x2)

inst_30754:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x43000007; valaddr_reg:x3; val_offset:92262*0 + 3*33*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92262*0 + 3*34*FLEN/8, x4, x1, x2)

inst_30755:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x4300000f; valaddr_reg:x3; val_offset:92265*0 + 3*34*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92265*0 + 3*35*FLEN/8, x4, x1, x2)

inst_30756:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x4300001f; valaddr_reg:x3; val_offset:92268*0 + 3*35*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92268*0 + 3*36*FLEN/8, x4, x1, x2)

inst_30757:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x4300003f; valaddr_reg:x3; val_offset:92271*0 + 3*36*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92271*0 + 3*37*FLEN/8, x4, x1, x2)

inst_30758:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x4300007f; valaddr_reg:x3; val_offset:92274*0 + 3*37*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92274*0 + 3*38*FLEN/8, x4, x1, x2)

inst_30759:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x430000ff; valaddr_reg:x3; val_offset:92277*0 + 3*38*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92277*0 + 3*39*FLEN/8, x4, x1, x2)

inst_30760:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x430001ff; valaddr_reg:x3; val_offset:92280*0 + 3*39*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92280*0 + 3*40*FLEN/8, x4, x1, x2)

inst_30761:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x430003ff; valaddr_reg:x3; val_offset:92283*0 + 3*40*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92283*0 + 3*41*FLEN/8, x4, x1, x2)

inst_30762:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x430007ff; valaddr_reg:x3; val_offset:92286*0 + 3*41*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92286*0 + 3*42*FLEN/8, x4, x1, x2)

inst_30763:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x43000fff; valaddr_reg:x3; val_offset:92289*0 + 3*42*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92289*0 + 3*43*FLEN/8, x4, x1, x2)

inst_30764:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x43001fff; valaddr_reg:x3; val_offset:92292*0 + 3*43*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92292*0 + 3*44*FLEN/8, x4, x1, x2)

inst_30765:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x43003fff; valaddr_reg:x3; val_offset:92295*0 + 3*44*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92295*0 + 3*45*FLEN/8, x4, x1, x2)

inst_30766:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x43007fff; valaddr_reg:x3; val_offset:92298*0 + 3*45*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92298*0 + 3*46*FLEN/8, x4, x1, x2)

inst_30767:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x4300ffff; valaddr_reg:x3; val_offset:92301*0 + 3*46*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92301*0 + 3*47*FLEN/8, x4, x1, x2)

inst_30768:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x4301ffff; valaddr_reg:x3; val_offset:92304*0 + 3*47*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92304*0 + 3*48*FLEN/8, x4, x1, x2)

inst_30769:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x4303ffff; valaddr_reg:x3; val_offset:92307*0 + 3*48*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92307*0 + 3*49*FLEN/8, x4, x1, x2)

inst_30770:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x4307ffff; valaddr_reg:x3; val_offset:92310*0 + 3*49*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92310*0 + 3*50*FLEN/8, x4, x1, x2)

inst_30771:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x430fffff; valaddr_reg:x3; val_offset:92313*0 + 3*50*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92313*0 + 3*51*FLEN/8, x4, x1, x2)

inst_30772:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x431fffff; valaddr_reg:x3; val_offset:92316*0 + 3*51*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92316*0 + 3*52*FLEN/8, x4, x1, x2)

inst_30773:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x433fffff; valaddr_reg:x3; val_offset:92319*0 + 3*52*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92319*0 + 3*53*FLEN/8, x4, x1, x2)

inst_30774:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x43400000; valaddr_reg:x3; val_offset:92322*0 + 3*53*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92322*0 + 3*54*FLEN/8, x4, x1, x2)

inst_30775:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x43600000; valaddr_reg:x3; val_offset:92325*0 + 3*54*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92325*0 + 3*55*FLEN/8, x4, x1, x2)

inst_30776:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x43700000; valaddr_reg:x3; val_offset:92328*0 + 3*55*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92328*0 + 3*56*FLEN/8, x4, x1, x2)

inst_30777:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x43780000; valaddr_reg:x3; val_offset:92331*0 + 3*56*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92331*0 + 3*57*FLEN/8, x4, x1, x2)

inst_30778:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x437c0000; valaddr_reg:x3; val_offset:92334*0 + 3*57*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92334*0 + 3*58*FLEN/8, x4, x1, x2)

inst_30779:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x437e0000; valaddr_reg:x3; val_offset:92337*0 + 3*58*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92337*0 + 3*59*FLEN/8, x4, x1, x2)

inst_30780:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x437f0000; valaddr_reg:x3; val_offset:92340*0 + 3*59*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92340*0 + 3*60*FLEN/8, x4, x1, x2)

inst_30781:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x437f8000; valaddr_reg:x3; val_offset:92343*0 + 3*60*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92343*0 + 3*61*FLEN/8, x4, x1, x2)

inst_30782:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x437fc000; valaddr_reg:x3; val_offset:92346*0 + 3*61*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92346*0 + 3*62*FLEN/8, x4, x1, x2)

inst_30783:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x437fe000; valaddr_reg:x3; val_offset:92349*0 + 3*62*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92349*0 + 3*63*FLEN/8, x4, x1, x2)

inst_30784:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x437ff000; valaddr_reg:x3; val_offset:92352*0 + 3*63*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92352*0 + 3*64*FLEN/8, x4, x1, x2)

inst_30785:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x437ff800; valaddr_reg:x3; val_offset:92355*0 + 3*64*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92355*0 + 3*65*FLEN/8, x4, x1, x2)

inst_30786:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x437ffc00; valaddr_reg:x3; val_offset:92358*0 + 3*65*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92358*0 + 3*66*FLEN/8, x4, x1, x2)

inst_30787:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x437ffe00; valaddr_reg:x3; val_offset:92361*0 + 3*66*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92361*0 + 3*67*FLEN/8, x4, x1, x2)

inst_30788:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x437fff00; valaddr_reg:x3; val_offset:92364*0 + 3*67*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92364*0 + 3*68*FLEN/8, x4, x1, x2)

inst_30789:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x437fff80; valaddr_reg:x3; val_offset:92367*0 + 3*68*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92367*0 + 3*69*FLEN/8, x4, x1, x2)

inst_30790:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x437fffc0; valaddr_reg:x3; val_offset:92370*0 + 3*69*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92370*0 + 3*70*FLEN/8, x4, x1, x2)

inst_30791:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x437fffe0; valaddr_reg:x3; val_offset:92373*0 + 3*70*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92373*0 + 3*71*FLEN/8, x4, x1, x2)

inst_30792:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x437ffff0; valaddr_reg:x3; val_offset:92376*0 + 3*71*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92376*0 + 3*72*FLEN/8, x4, x1, x2)

inst_30793:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x437ffff8; valaddr_reg:x3; val_offset:92379*0 + 3*72*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92379*0 + 3*73*FLEN/8, x4, x1, x2)

inst_30794:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x437ffffc; valaddr_reg:x3; val_offset:92382*0 + 3*73*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92382*0 + 3*74*FLEN/8, x4, x1, x2)

inst_30795:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x437ffffe; valaddr_reg:x3; val_offset:92385*0 + 3*74*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92385*0 + 3*75*FLEN/8, x4, x1, x2)

inst_30796:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a54c0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3514a8 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a54c0; op2val:0x3514a8;
op3val:0x437fffff; valaddr_reg:x3; val_offset:92388*0 + 3*75*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92388*0 + 3*76*FLEN/8, x4, x1, x2)

inst_30797:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:92391*0 + 3*76*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92391*0 + 3*77*FLEN/8, x4, x1, x2)

inst_30798:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:92394*0 + 3*77*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92394*0 + 3*78*FLEN/8, x4, x1, x2)

inst_30799:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:92397*0 + 3*78*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92397*0 + 3*79*FLEN/8, x4, x1, x2)

inst_30800:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0x199999; valaddr_reg:x3; val_offset:92400*0 + 3*79*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92400*0 + 3*80*FLEN/8, x4, x1, x2)

inst_30801:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0x249249; valaddr_reg:x3; val_offset:92403*0 + 3*80*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92403*0 + 3*81*FLEN/8, x4, x1, x2)

inst_30802:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0x333333; valaddr_reg:x3; val_offset:92406*0 + 3*81*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92406*0 + 3*82*FLEN/8, x4, x1, x2)

inst_30803:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0x36db6d; valaddr_reg:x3; val_offset:92409*0 + 3*82*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92409*0 + 3*83*FLEN/8, x4, x1, x2)

inst_30804:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0x3bbbbb; valaddr_reg:x3; val_offset:92412*0 + 3*83*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92412*0 + 3*84*FLEN/8, x4, x1, x2)

inst_30805:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0x444444; valaddr_reg:x3; val_offset:92415*0 + 3*84*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92415*0 + 3*85*FLEN/8, x4, x1, x2)

inst_30806:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0x4ccccc; valaddr_reg:x3; val_offset:92418*0 + 3*85*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92418*0 + 3*86*FLEN/8, x4, x1, x2)

inst_30807:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0x5b6db6; valaddr_reg:x3; val_offset:92421*0 + 3*86*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92421*0 + 3*87*FLEN/8, x4, x1, x2)

inst_30808:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0x666666; valaddr_reg:x3; val_offset:92424*0 + 3*87*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92424*0 + 3*88*FLEN/8, x4, x1, x2)

inst_30809:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0x6db6db; valaddr_reg:x3; val_offset:92427*0 + 3*88*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92427*0 + 3*89*FLEN/8, x4, x1, x2)

inst_30810:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0x7ffff8; valaddr_reg:x3; val_offset:92430*0 + 3*89*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92430*0 + 3*90*FLEN/8, x4, x1, x2)

inst_30811:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0x7ffffc; valaddr_reg:x3; val_offset:92433*0 + 3*90*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92433*0 + 3*91*FLEN/8, x4, x1, x2)

inst_30812:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0x7ffffe; valaddr_reg:x3; val_offset:92436*0 + 3*91*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92436*0 + 3*92*FLEN/8, x4, x1, x2)

inst_30813:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf000000; valaddr_reg:x3; val_offset:92439*0 + 3*92*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92439*0 + 3*93*FLEN/8, x4, x1, x2)

inst_30814:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf000001; valaddr_reg:x3; val_offset:92442*0 + 3*93*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92442*0 + 3*94*FLEN/8, x4, x1, x2)

inst_30815:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf000003; valaddr_reg:x3; val_offset:92445*0 + 3*94*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92445*0 + 3*95*FLEN/8, x4, x1, x2)

inst_30816:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf000007; valaddr_reg:x3; val_offset:92448*0 + 3*95*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92448*0 + 3*96*FLEN/8, x4, x1, x2)

inst_30817:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf00000f; valaddr_reg:x3; val_offset:92451*0 + 3*96*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92451*0 + 3*97*FLEN/8, x4, x1, x2)

inst_30818:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf00001f; valaddr_reg:x3; val_offset:92454*0 + 3*97*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92454*0 + 3*98*FLEN/8, x4, x1, x2)

inst_30819:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf00003f; valaddr_reg:x3; val_offset:92457*0 + 3*98*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92457*0 + 3*99*FLEN/8, x4, x1, x2)

inst_30820:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf00007f; valaddr_reg:x3; val_offset:92460*0 + 3*99*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92460*0 + 3*100*FLEN/8, x4, x1, x2)

inst_30821:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf0000ff; valaddr_reg:x3; val_offset:92463*0 + 3*100*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92463*0 + 3*101*FLEN/8, x4, x1, x2)

inst_30822:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf0001ff; valaddr_reg:x3; val_offset:92466*0 + 3*101*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92466*0 + 3*102*FLEN/8, x4, x1, x2)

inst_30823:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf0003ff; valaddr_reg:x3; val_offset:92469*0 + 3*102*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92469*0 + 3*103*FLEN/8, x4, x1, x2)

inst_30824:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf0007ff; valaddr_reg:x3; val_offset:92472*0 + 3*103*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92472*0 + 3*104*FLEN/8, x4, x1, x2)

inst_30825:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf000fff; valaddr_reg:x3; val_offset:92475*0 + 3*104*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92475*0 + 3*105*FLEN/8, x4, x1, x2)

inst_30826:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf001fff; valaddr_reg:x3; val_offset:92478*0 + 3*105*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92478*0 + 3*106*FLEN/8, x4, x1, x2)

inst_30827:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf003fff; valaddr_reg:x3; val_offset:92481*0 + 3*106*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92481*0 + 3*107*FLEN/8, x4, x1, x2)

inst_30828:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf007fff; valaddr_reg:x3; val_offset:92484*0 + 3*107*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92484*0 + 3*108*FLEN/8, x4, x1, x2)

inst_30829:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf00ffff; valaddr_reg:x3; val_offset:92487*0 + 3*108*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92487*0 + 3*109*FLEN/8, x4, x1, x2)

inst_30830:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf01ffff; valaddr_reg:x3; val_offset:92490*0 + 3*109*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92490*0 + 3*110*FLEN/8, x4, x1, x2)

inst_30831:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf03ffff; valaddr_reg:x3; val_offset:92493*0 + 3*110*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92493*0 + 3*111*FLEN/8, x4, x1, x2)

inst_30832:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf07ffff; valaddr_reg:x3; val_offset:92496*0 + 3*111*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92496*0 + 3*112*FLEN/8, x4, x1, x2)

inst_30833:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf0fffff; valaddr_reg:x3; val_offset:92499*0 + 3*112*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92499*0 + 3*113*FLEN/8, x4, x1, x2)

inst_30834:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf1fffff; valaddr_reg:x3; val_offset:92502*0 + 3*113*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92502*0 + 3*114*FLEN/8, x4, x1, x2)

inst_30835:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf3fffff; valaddr_reg:x3; val_offset:92505*0 + 3*114*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92505*0 + 3*115*FLEN/8, x4, x1, x2)

inst_30836:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf400000; valaddr_reg:x3; val_offset:92508*0 + 3*115*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92508*0 + 3*116*FLEN/8, x4, x1, x2)

inst_30837:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf600000; valaddr_reg:x3; val_offset:92511*0 + 3*116*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92511*0 + 3*117*FLEN/8, x4, x1, x2)

inst_30838:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf700000; valaddr_reg:x3; val_offset:92514*0 + 3*117*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92514*0 + 3*118*FLEN/8, x4, x1, x2)

inst_30839:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf780000; valaddr_reg:x3; val_offset:92517*0 + 3*118*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92517*0 + 3*119*FLEN/8, x4, x1, x2)

inst_30840:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf7c0000; valaddr_reg:x3; val_offset:92520*0 + 3*119*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92520*0 + 3*120*FLEN/8, x4, x1, x2)

inst_30841:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf7e0000; valaddr_reg:x3; val_offset:92523*0 + 3*120*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92523*0 + 3*121*FLEN/8, x4, x1, x2)

inst_30842:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf7f0000; valaddr_reg:x3; val_offset:92526*0 + 3*121*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92526*0 + 3*122*FLEN/8, x4, x1, x2)

inst_30843:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf7f8000; valaddr_reg:x3; val_offset:92529*0 + 3*122*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92529*0 + 3*123*FLEN/8, x4, x1, x2)

inst_30844:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf7fc000; valaddr_reg:x3; val_offset:92532*0 + 3*123*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92532*0 + 3*124*FLEN/8, x4, x1, x2)

inst_30845:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf7fe000; valaddr_reg:x3; val_offset:92535*0 + 3*124*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92535*0 + 3*125*FLEN/8, x4, x1, x2)

inst_30846:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf7ff000; valaddr_reg:x3; val_offset:92538*0 + 3*125*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92538*0 + 3*126*FLEN/8, x4, x1, x2)

inst_30847:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf7ff800; valaddr_reg:x3; val_offset:92541*0 + 3*126*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92541*0 + 3*127*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_2)

inst_30848:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf7ffc00; valaddr_reg:x3; val_offset:92544*0 + 3*127*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92544*0 + 3*128*FLEN/8, x4, x1, x2)

inst_30849:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf7ffe00; valaddr_reg:x3; val_offset:92547*0 + 3*128*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92547*0 + 3*129*FLEN/8, x4, x1, x2)

inst_30850:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf7fff00; valaddr_reg:x3; val_offset:92550*0 + 3*129*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92550*0 + 3*130*FLEN/8, x4, x1, x2)

inst_30851:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf7fff80; valaddr_reg:x3; val_offset:92553*0 + 3*130*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92553*0 + 3*131*FLEN/8, x4, x1, x2)

inst_30852:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf7fffc0; valaddr_reg:x3; val_offset:92556*0 + 3*131*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92556*0 + 3*132*FLEN/8, x4, x1, x2)

inst_30853:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf7fffe0; valaddr_reg:x3; val_offset:92559*0 + 3*132*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92559*0 + 3*133*FLEN/8, x4, x1, x2)

inst_30854:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf7ffff0; valaddr_reg:x3; val_offset:92562*0 + 3*133*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92562*0 + 3*134*FLEN/8, x4, x1, x2)

inst_30855:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf7ffff8; valaddr_reg:x3; val_offset:92565*0 + 3*134*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92565*0 + 3*135*FLEN/8, x4, x1, x2)

inst_30856:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf7ffffc; valaddr_reg:x3; val_offset:92568*0 + 3*135*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92568*0 + 3*136*FLEN/8, x4, x1, x2)

inst_30857:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf7ffffe; valaddr_reg:x3; val_offset:92571*0 + 3*136*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92571*0 + 3*137*FLEN/8, x4, x1, x2)

inst_30858:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a62f6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a62f6; op2val:0x0;
op3val:0xf7fffff; valaddr_reg:x3; val_offset:92574*0 + 3*137*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92574*0 + 3*138*FLEN/8, x4, x1, x2)

inst_30859:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb000000; valaddr_reg:x3; val_offset:92577*0 + 3*138*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92577*0 + 3*139*FLEN/8, x4, x1, x2)

inst_30860:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb000001; valaddr_reg:x3; val_offset:92580*0 + 3*139*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92580*0 + 3*140*FLEN/8, x4, x1, x2)

inst_30861:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb000003; valaddr_reg:x3; val_offset:92583*0 + 3*140*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92583*0 + 3*141*FLEN/8, x4, x1, x2)

inst_30862:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb000007; valaddr_reg:x3; val_offset:92586*0 + 3*141*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92586*0 + 3*142*FLEN/8, x4, x1, x2)

inst_30863:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb00000f; valaddr_reg:x3; val_offset:92589*0 + 3*142*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92589*0 + 3*143*FLEN/8, x4, x1, x2)

inst_30864:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb00001f; valaddr_reg:x3; val_offset:92592*0 + 3*143*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92592*0 + 3*144*FLEN/8, x4, x1, x2)

inst_30865:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb00003f; valaddr_reg:x3; val_offset:92595*0 + 3*144*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92595*0 + 3*145*FLEN/8, x4, x1, x2)

inst_30866:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb00007f; valaddr_reg:x3; val_offset:92598*0 + 3*145*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92598*0 + 3*146*FLEN/8, x4, x1, x2)

inst_30867:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb0000ff; valaddr_reg:x3; val_offset:92601*0 + 3*146*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92601*0 + 3*147*FLEN/8, x4, x1, x2)

inst_30868:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb0001ff; valaddr_reg:x3; val_offset:92604*0 + 3*147*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92604*0 + 3*148*FLEN/8, x4, x1, x2)

inst_30869:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb0003ff; valaddr_reg:x3; val_offset:92607*0 + 3*148*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92607*0 + 3*149*FLEN/8, x4, x1, x2)

inst_30870:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb0007ff; valaddr_reg:x3; val_offset:92610*0 + 3*149*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92610*0 + 3*150*FLEN/8, x4, x1, x2)

inst_30871:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb000fff; valaddr_reg:x3; val_offset:92613*0 + 3*150*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92613*0 + 3*151*FLEN/8, x4, x1, x2)

inst_30872:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb001fff; valaddr_reg:x3; val_offset:92616*0 + 3*151*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92616*0 + 3*152*FLEN/8, x4, x1, x2)

inst_30873:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb003fff; valaddr_reg:x3; val_offset:92619*0 + 3*152*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92619*0 + 3*153*FLEN/8, x4, x1, x2)

inst_30874:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb007fff; valaddr_reg:x3; val_offset:92622*0 + 3*153*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92622*0 + 3*154*FLEN/8, x4, x1, x2)

inst_30875:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb00ffff; valaddr_reg:x3; val_offset:92625*0 + 3*154*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92625*0 + 3*155*FLEN/8, x4, x1, x2)

inst_30876:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb01ffff; valaddr_reg:x3; val_offset:92628*0 + 3*155*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92628*0 + 3*156*FLEN/8, x4, x1, x2)

inst_30877:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb03ffff; valaddr_reg:x3; val_offset:92631*0 + 3*156*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92631*0 + 3*157*FLEN/8, x4, x1, x2)

inst_30878:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb07ffff; valaddr_reg:x3; val_offset:92634*0 + 3*157*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92634*0 + 3*158*FLEN/8, x4, x1, x2)

inst_30879:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb0fffff; valaddr_reg:x3; val_offset:92637*0 + 3*158*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92637*0 + 3*159*FLEN/8, x4, x1, x2)

inst_30880:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb1fffff; valaddr_reg:x3; val_offset:92640*0 + 3*159*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92640*0 + 3*160*FLEN/8, x4, x1, x2)

inst_30881:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb3fffff; valaddr_reg:x3; val_offset:92643*0 + 3*160*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92643*0 + 3*161*FLEN/8, x4, x1, x2)

inst_30882:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb400000; valaddr_reg:x3; val_offset:92646*0 + 3*161*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92646*0 + 3*162*FLEN/8, x4, x1, x2)

inst_30883:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb600000; valaddr_reg:x3; val_offset:92649*0 + 3*162*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92649*0 + 3*163*FLEN/8, x4, x1, x2)

inst_30884:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb700000; valaddr_reg:x3; val_offset:92652*0 + 3*163*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92652*0 + 3*164*FLEN/8, x4, x1, x2)

inst_30885:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb780000; valaddr_reg:x3; val_offset:92655*0 + 3*164*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92655*0 + 3*165*FLEN/8, x4, x1, x2)

inst_30886:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7c0000; valaddr_reg:x3; val_offset:92658*0 + 3*165*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92658*0 + 3*166*FLEN/8, x4, x1, x2)

inst_30887:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7e0000; valaddr_reg:x3; val_offset:92661*0 + 3*166*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92661*0 + 3*167*FLEN/8, x4, x1, x2)

inst_30888:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7f0000; valaddr_reg:x3; val_offset:92664*0 + 3*167*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92664*0 + 3*168*FLEN/8, x4, x1, x2)

inst_30889:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7f8000; valaddr_reg:x3; val_offset:92667*0 + 3*168*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92667*0 + 3*169*FLEN/8, x4, x1, x2)

inst_30890:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7fc000; valaddr_reg:x3; val_offset:92670*0 + 3*169*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92670*0 + 3*170*FLEN/8, x4, x1, x2)

inst_30891:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7fe000; valaddr_reg:x3; val_offset:92673*0 + 3*170*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92673*0 + 3*171*FLEN/8, x4, x1, x2)

inst_30892:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7ff000; valaddr_reg:x3; val_offset:92676*0 + 3*171*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92676*0 + 3*172*FLEN/8, x4, x1, x2)

inst_30893:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7ff800; valaddr_reg:x3; val_offset:92679*0 + 3*172*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92679*0 + 3*173*FLEN/8, x4, x1, x2)

inst_30894:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7ffc00; valaddr_reg:x3; val_offset:92682*0 + 3*173*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92682*0 + 3*174*FLEN/8, x4, x1, x2)

inst_30895:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7ffe00; valaddr_reg:x3; val_offset:92685*0 + 3*174*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92685*0 + 3*175*FLEN/8, x4, x1, x2)

inst_30896:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7fff00; valaddr_reg:x3; val_offset:92688*0 + 3*175*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92688*0 + 3*176*FLEN/8, x4, x1, x2)

inst_30897:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7fff80; valaddr_reg:x3; val_offset:92691*0 + 3*176*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92691*0 + 3*177*FLEN/8, x4, x1, x2)

inst_30898:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7fffc0; valaddr_reg:x3; val_offset:92694*0 + 3*177*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92694*0 + 3*178*FLEN/8, x4, x1, x2)

inst_30899:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7fffe0; valaddr_reg:x3; val_offset:92697*0 + 3*178*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92697*0 + 3*179*FLEN/8, x4, x1, x2)

inst_30900:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7ffff0; valaddr_reg:x3; val_offset:92700*0 + 3*179*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92700*0 + 3*180*FLEN/8, x4, x1, x2)

inst_30901:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7ffff8; valaddr_reg:x3; val_offset:92703*0 + 3*180*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92703*0 + 3*181*FLEN/8, x4, x1, x2)

inst_30902:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7ffffc; valaddr_reg:x3; val_offset:92706*0 + 3*181*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92706*0 + 3*182*FLEN/8, x4, x1, x2)

inst_30903:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7ffffe; valaddr_reg:x3; val_offset:92709*0 + 3*182*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92709*0 + 3*183*FLEN/8, x4, x1, x2)

inst_30904:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7fffff; valaddr_reg:x3; val_offset:92712*0 + 3*183*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92712*0 + 3*184*FLEN/8, x4, x1, x2)

inst_30905:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbf800001; valaddr_reg:x3; val_offset:92715*0 + 3*184*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92715*0 + 3*185*FLEN/8, x4, x1, x2)

inst_30906:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbf800003; valaddr_reg:x3; val_offset:92718*0 + 3*185*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92718*0 + 3*186*FLEN/8, x4, x1, x2)

inst_30907:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbf800007; valaddr_reg:x3; val_offset:92721*0 + 3*186*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92721*0 + 3*187*FLEN/8, x4, x1, x2)

inst_30908:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbf999999; valaddr_reg:x3; val_offset:92724*0 + 3*187*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92724*0 + 3*188*FLEN/8, x4, x1, x2)

inst_30909:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:92727*0 + 3*188*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92727*0 + 3*189*FLEN/8, x4, x1, x2)

inst_30910:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:92730*0 + 3*189*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92730*0 + 3*190*FLEN/8, x4, x1, x2)

inst_30911:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:92733*0 + 3*190*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92733*0 + 3*191*FLEN/8, x4, x1, x2)

inst_30912:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:92736*0 + 3*191*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92736*0 + 3*192*FLEN/8, x4, x1, x2)

inst_30913:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:92739*0 + 3*192*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92739*0 + 3*193*FLEN/8, x4, x1, x2)

inst_30914:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:92742*0 + 3*193*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92742*0 + 3*194*FLEN/8, x4, x1, x2)

inst_30915:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:92745*0 + 3*194*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92745*0 + 3*195*FLEN/8, x4, x1, x2)

inst_30916:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:92748*0 + 3*195*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92748*0 + 3*196*FLEN/8, x4, x1, x2)

inst_30917:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:92751*0 + 3*196*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92751*0 + 3*197*FLEN/8, x4, x1, x2)

inst_30918:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:92754*0 + 3*197*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92754*0 + 3*198*FLEN/8, x4, x1, x2)

inst_30919:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:92757*0 + 3*198*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92757*0 + 3*199*FLEN/8, x4, x1, x2)

inst_30920:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:92760*0 + 3*199*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92760*0 + 3*200*FLEN/8, x4, x1, x2)

inst_30921:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe1000000; valaddr_reg:x3; val_offset:92763*0 + 3*200*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92763*0 + 3*201*FLEN/8, x4, x1, x2)

inst_30922:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe1000001; valaddr_reg:x3; val_offset:92766*0 + 3*201*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92766*0 + 3*202*FLEN/8, x4, x1, x2)

inst_30923:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe1000003; valaddr_reg:x3; val_offset:92769*0 + 3*202*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92769*0 + 3*203*FLEN/8, x4, x1, x2)

inst_30924:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe1000007; valaddr_reg:x3; val_offset:92772*0 + 3*203*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92772*0 + 3*204*FLEN/8, x4, x1, x2)

inst_30925:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe100000f; valaddr_reg:x3; val_offset:92775*0 + 3*204*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92775*0 + 3*205*FLEN/8, x4, x1, x2)

inst_30926:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe100001f; valaddr_reg:x3; val_offset:92778*0 + 3*205*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92778*0 + 3*206*FLEN/8, x4, x1, x2)

inst_30927:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe100003f; valaddr_reg:x3; val_offset:92781*0 + 3*206*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92781*0 + 3*207*FLEN/8, x4, x1, x2)

inst_30928:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe100007f; valaddr_reg:x3; val_offset:92784*0 + 3*207*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92784*0 + 3*208*FLEN/8, x4, x1, x2)

inst_30929:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe10000ff; valaddr_reg:x3; val_offset:92787*0 + 3*208*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92787*0 + 3*209*FLEN/8, x4, x1, x2)

inst_30930:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe10001ff; valaddr_reg:x3; val_offset:92790*0 + 3*209*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92790*0 + 3*210*FLEN/8, x4, x1, x2)

inst_30931:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe10003ff; valaddr_reg:x3; val_offset:92793*0 + 3*210*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92793*0 + 3*211*FLEN/8, x4, x1, x2)

inst_30932:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe10007ff; valaddr_reg:x3; val_offset:92796*0 + 3*211*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92796*0 + 3*212*FLEN/8, x4, x1, x2)

inst_30933:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe1000fff; valaddr_reg:x3; val_offset:92799*0 + 3*212*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92799*0 + 3*213*FLEN/8, x4, x1, x2)

inst_30934:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe1001fff; valaddr_reg:x3; val_offset:92802*0 + 3*213*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92802*0 + 3*214*FLEN/8, x4, x1, x2)

inst_30935:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe1003fff; valaddr_reg:x3; val_offset:92805*0 + 3*214*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92805*0 + 3*215*FLEN/8, x4, x1, x2)

inst_30936:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe1007fff; valaddr_reg:x3; val_offset:92808*0 + 3*215*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92808*0 + 3*216*FLEN/8, x4, x1, x2)

inst_30937:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe100ffff; valaddr_reg:x3; val_offset:92811*0 + 3*216*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92811*0 + 3*217*FLEN/8, x4, x1, x2)

inst_30938:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe101ffff; valaddr_reg:x3; val_offset:92814*0 + 3*217*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92814*0 + 3*218*FLEN/8, x4, x1, x2)

inst_30939:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe103ffff; valaddr_reg:x3; val_offset:92817*0 + 3*218*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92817*0 + 3*219*FLEN/8, x4, x1, x2)

inst_30940:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe107ffff; valaddr_reg:x3; val_offset:92820*0 + 3*219*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92820*0 + 3*220*FLEN/8, x4, x1, x2)

inst_30941:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe10fffff; valaddr_reg:x3; val_offset:92823*0 + 3*220*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92823*0 + 3*221*FLEN/8, x4, x1, x2)

inst_30942:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe11fffff; valaddr_reg:x3; val_offset:92826*0 + 3*221*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92826*0 + 3*222*FLEN/8, x4, x1, x2)

inst_30943:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe13fffff; valaddr_reg:x3; val_offset:92829*0 + 3*222*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92829*0 + 3*223*FLEN/8, x4, x1, x2)

inst_30944:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe1400000; valaddr_reg:x3; val_offset:92832*0 + 3*223*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92832*0 + 3*224*FLEN/8, x4, x1, x2)

inst_30945:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe1600000; valaddr_reg:x3; val_offset:92835*0 + 3*224*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92835*0 + 3*225*FLEN/8, x4, x1, x2)

inst_30946:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe1700000; valaddr_reg:x3; val_offset:92838*0 + 3*225*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92838*0 + 3*226*FLEN/8, x4, x1, x2)

inst_30947:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe1780000; valaddr_reg:x3; val_offset:92841*0 + 3*226*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92841*0 + 3*227*FLEN/8, x4, x1, x2)

inst_30948:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe17c0000; valaddr_reg:x3; val_offset:92844*0 + 3*227*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92844*0 + 3*228*FLEN/8, x4, x1, x2)

inst_30949:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe17e0000; valaddr_reg:x3; val_offset:92847*0 + 3*228*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92847*0 + 3*229*FLEN/8, x4, x1, x2)

inst_30950:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe17f0000; valaddr_reg:x3; val_offset:92850*0 + 3*229*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92850*0 + 3*230*FLEN/8, x4, x1, x2)

inst_30951:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe17f8000; valaddr_reg:x3; val_offset:92853*0 + 3*230*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92853*0 + 3*231*FLEN/8, x4, x1, x2)

inst_30952:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe17fc000; valaddr_reg:x3; val_offset:92856*0 + 3*231*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92856*0 + 3*232*FLEN/8, x4, x1, x2)

inst_30953:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe17fe000; valaddr_reg:x3; val_offset:92859*0 + 3*232*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92859*0 + 3*233*FLEN/8, x4, x1, x2)

inst_30954:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe17ff000; valaddr_reg:x3; val_offset:92862*0 + 3*233*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92862*0 + 3*234*FLEN/8, x4, x1, x2)

inst_30955:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe17ff800; valaddr_reg:x3; val_offset:92865*0 + 3*234*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92865*0 + 3*235*FLEN/8, x4, x1, x2)

inst_30956:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe17ffc00; valaddr_reg:x3; val_offset:92868*0 + 3*235*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92868*0 + 3*236*FLEN/8, x4, x1, x2)

inst_30957:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe17ffe00; valaddr_reg:x3; val_offset:92871*0 + 3*236*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92871*0 + 3*237*FLEN/8, x4, x1, x2)

inst_30958:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe17fff00; valaddr_reg:x3; val_offset:92874*0 + 3*237*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92874*0 + 3*238*FLEN/8, x4, x1, x2)

inst_30959:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe17fff80; valaddr_reg:x3; val_offset:92877*0 + 3*238*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92877*0 + 3*239*FLEN/8, x4, x1, x2)

inst_30960:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe17fffc0; valaddr_reg:x3; val_offset:92880*0 + 3*239*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92880*0 + 3*240*FLEN/8, x4, x1, x2)

inst_30961:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe17fffe0; valaddr_reg:x3; val_offset:92883*0 + 3*240*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92883*0 + 3*241*FLEN/8, x4, x1, x2)

inst_30962:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe17ffff0; valaddr_reg:x3; val_offset:92886*0 + 3*241*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92886*0 + 3*242*FLEN/8, x4, x1, x2)

inst_30963:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe17ffff8; valaddr_reg:x3; val_offset:92889*0 + 3*242*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92889*0 + 3*243*FLEN/8, x4, x1, x2)

inst_30964:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe17ffffc; valaddr_reg:x3; val_offset:92892*0 + 3*243*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92892*0 + 3*244*FLEN/8, x4, x1, x2)

inst_30965:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe17ffffe; valaddr_reg:x3; val_offset:92895*0 + 3*244*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92895*0 + 3*245*FLEN/8, x4, x1, x2)

inst_30966:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xe17fffff; valaddr_reg:x3; val_offset:92898*0 + 3*245*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92898*0 + 3*246*FLEN/8, x4, x1, x2)

inst_30967:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xff000001; valaddr_reg:x3; val_offset:92901*0 + 3*246*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92901*0 + 3*247*FLEN/8, x4, x1, x2)

inst_30968:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xff000003; valaddr_reg:x3; val_offset:92904*0 + 3*247*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92904*0 + 3*248*FLEN/8, x4, x1, x2)

inst_30969:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xff000007; valaddr_reg:x3; val_offset:92907*0 + 3*248*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92907*0 + 3*249*FLEN/8, x4, x1, x2)

inst_30970:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xff199999; valaddr_reg:x3; val_offset:92910*0 + 3*249*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92910*0 + 3*250*FLEN/8, x4, x1, x2)

inst_30971:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xff249249; valaddr_reg:x3; val_offset:92913*0 + 3*250*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92913*0 + 3*251*FLEN/8, x4, x1, x2)

inst_30972:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xff333333; valaddr_reg:x3; val_offset:92916*0 + 3*251*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92916*0 + 3*252*FLEN/8, x4, x1, x2)

inst_30973:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xff36db6d; valaddr_reg:x3; val_offset:92919*0 + 3*252*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92919*0 + 3*253*FLEN/8, x4, x1, x2)

inst_30974:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:92922*0 + 3*253*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92922*0 + 3*254*FLEN/8, x4, x1, x2)

inst_30975:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xff444444; valaddr_reg:x3; val_offset:92925*0 + 3*254*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92925*0 + 3*255*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_3)

inst_30976:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xff4ccccc; valaddr_reg:x3; val_offset:92928*0 + 3*256*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92928*0 + 3*256*FLEN/8, x4, x1, x2)

inst_30977:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xff5b6db6; valaddr_reg:x3; val_offset:92931*0 + 3*257*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92931*0 + 3*257*FLEN/8, x4, x1, x2)

inst_30978:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xff666666; valaddr_reg:x3; val_offset:92934*0 + 3*258*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92934*0 + 3*258*FLEN/8, x4, x1, x2)

inst_30979:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xff6db6db; valaddr_reg:x3; val_offset:92937*0 + 3*259*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92937*0 + 3*259*FLEN/8, x4, x1, x2)

inst_30980:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xff7ffff8; valaddr_reg:x3; val_offset:92940*0 + 3*260*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92940*0 + 3*260*FLEN/8, x4, x1, x2)

inst_30981:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xff7ffffc; valaddr_reg:x3; val_offset:92943*0 + 3*261*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92943*0 + 3*261*FLEN/8, x4, x1, x2)

inst_30982:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x539111 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae1f2; op2val:0xbfd39111;
op3val:0xff7ffffe; valaddr_reg:x3; val_offset:92946*0 + 3*262*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92946*0 + 3*262*FLEN/8, x4, x1, x2)

inst_30983:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x3f800001; valaddr_reg:x3; val_offset:92949*0 + 3*263*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92949*0 + 3*263*FLEN/8, x4, x1, x2)

inst_30984:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x3f800003; valaddr_reg:x3; val_offset:92952*0 + 3*264*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92952*0 + 3*264*FLEN/8, x4, x1, x2)

inst_30985:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x3f800007; valaddr_reg:x3; val_offset:92955*0 + 3*265*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92955*0 + 3*265*FLEN/8, x4, x1, x2)

inst_30986:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x3f999999; valaddr_reg:x3; val_offset:92958*0 + 3*266*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92958*0 + 3*266*FLEN/8, x4, x1, x2)

inst_30987:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x3fa49249; valaddr_reg:x3; val_offset:92961*0 + 3*267*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92961*0 + 3*267*FLEN/8, x4, x1, x2)

inst_30988:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x3fb33333; valaddr_reg:x3; val_offset:92964*0 + 3*268*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92964*0 + 3*268*FLEN/8, x4, x1, x2)

inst_30989:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:92967*0 + 3*269*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92967*0 + 3*269*FLEN/8, x4, x1, x2)

inst_30990:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:92970*0 + 3*270*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92970*0 + 3*270*FLEN/8, x4, x1, x2)

inst_30991:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x3fc44444; valaddr_reg:x3; val_offset:92973*0 + 3*271*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92973*0 + 3*271*FLEN/8, x4, x1, x2)

inst_30992:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x3fcccccc; valaddr_reg:x3; val_offset:92976*0 + 3*272*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92976*0 + 3*272*FLEN/8, x4, x1, x2)

inst_30993:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:92979*0 + 3*273*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92979*0 + 3*273*FLEN/8, x4, x1, x2)

inst_30994:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x3fe66666; valaddr_reg:x3; val_offset:92982*0 + 3*274*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92982*0 + 3*274*FLEN/8, x4, x1, x2)

inst_30995:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x3fedb6db; valaddr_reg:x3; val_offset:92985*0 + 3*275*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92985*0 + 3*275*FLEN/8, x4, x1, x2)

inst_30996:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x3ffffff8; valaddr_reg:x3; val_offset:92988*0 + 3*276*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92988*0 + 3*276*FLEN/8, x4, x1, x2)

inst_30997:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x3ffffffc; valaddr_reg:x3; val_offset:92991*0 + 3*277*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92991*0 + 3*277*FLEN/8, x4, x1, x2)

inst_30998:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x3ffffffe; valaddr_reg:x3; val_offset:92994*0 + 3*278*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92994*0 + 3*278*FLEN/8, x4, x1, x2)

inst_30999:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d000000; valaddr_reg:x3; val_offset:92997*0 + 3*279*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92997*0 + 3*279*FLEN/8, x4, x1, x2)

inst_31000:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d000001; valaddr_reg:x3; val_offset:93000*0 + 3*280*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93000*0 + 3*280*FLEN/8, x4, x1, x2)

inst_31001:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d000003; valaddr_reg:x3; val_offset:93003*0 + 3*281*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93003*0 + 3*281*FLEN/8, x4, x1, x2)

inst_31002:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d000007; valaddr_reg:x3; val_offset:93006*0 + 3*282*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93006*0 + 3*282*FLEN/8, x4, x1, x2)

inst_31003:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d00000f; valaddr_reg:x3; val_offset:93009*0 + 3*283*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93009*0 + 3*283*FLEN/8, x4, x1, x2)

inst_31004:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d00001f; valaddr_reg:x3; val_offset:93012*0 + 3*284*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93012*0 + 3*284*FLEN/8, x4, x1, x2)

inst_31005:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d00003f; valaddr_reg:x3; val_offset:93015*0 + 3*285*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93015*0 + 3*285*FLEN/8, x4, x1, x2)

inst_31006:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d00007f; valaddr_reg:x3; val_offset:93018*0 + 3*286*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93018*0 + 3*286*FLEN/8, x4, x1, x2)

inst_31007:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d0000ff; valaddr_reg:x3; val_offset:93021*0 + 3*287*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93021*0 + 3*287*FLEN/8, x4, x1, x2)

inst_31008:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d0001ff; valaddr_reg:x3; val_offset:93024*0 + 3*288*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93024*0 + 3*288*FLEN/8, x4, x1, x2)

inst_31009:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d0003ff; valaddr_reg:x3; val_offset:93027*0 + 3*289*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93027*0 + 3*289*FLEN/8, x4, x1, x2)

inst_31010:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d0007ff; valaddr_reg:x3; val_offset:93030*0 + 3*290*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93030*0 + 3*290*FLEN/8, x4, x1, x2)

inst_31011:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d000fff; valaddr_reg:x3; val_offset:93033*0 + 3*291*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93033*0 + 3*291*FLEN/8, x4, x1, x2)

inst_31012:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d001fff; valaddr_reg:x3; val_offset:93036*0 + 3*292*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93036*0 + 3*292*FLEN/8, x4, x1, x2)

inst_31013:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d003fff; valaddr_reg:x3; val_offset:93039*0 + 3*293*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93039*0 + 3*293*FLEN/8, x4, x1, x2)

inst_31014:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d007fff; valaddr_reg:x3; val_offset:93042*0 + 3*294*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93042*0 + 3*294*FLEN/8, x4, x1, x2)

inst_31015:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d00ffff; valaddr_reg:x3; val_offset:93045*0 + 3*295*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93045*0 + 3*295*FLEN/8, x4, x1, x2)

inst_31016:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d01ffff; valaddr_reg:x3; val_offset:93048*0 + 3*296*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93048*0 + 3*296*FLEN/8, x4, x1, x2)

inst_31017:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d03ffff; valaddr_reg:x3; val_offset:93051*0 + 3*297*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93051*0 + 3*297*FLEN/8, x4, x1, x2)

inst_31018:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d07ffff; valaddr_reg:x3; val_offset:93054*0 + 3*298*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93054*0 + 3*298*FLEN/8, x4, x1, x2)

inst_31019:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d0fffff; valaddr_reg:x3; val_offset:93057*0 + 3*299*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93057*0 + 3*299*FLEN/8, x4, x1, x2)

inst_31020:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d1fffff; valaddr_reg:x3; val_offset:93060*0 + 3*300*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93060*0 + 3*300*FLEN/8, x4, x1, x2)

inst_31021:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d3fffff; valaddr_reg:x3; val_offset:93063*0 + 3*301*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93063*0 + 3*301*FLEN/8, x4, x1, x2)

inst_31022:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d400000; valaddr_reg:x3; val_offset:93066*0 + 3*302*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93066*0 + 3*302*FLEN/8, x4, x1, x2)

inst_31023:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d600000; valaddr_reg:x3; val_offset:93069*0 + 3*303*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93069*0 + 3*303*FLEN/8, x4, x1, x2)

inst_31024:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d700000; valaddr_reg:x3; val_offset:93072*0 + 3*304*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93072*0 + 3*304*FLEN/8, x4, x1, x2)

inst_31025:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d780000; valaddr_reg:x3; val_offset:93075*0 + 3*305*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93075*0 + 3*305*FLEN/8, x4, x1, x2)

inst_31026:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d7c0000; valaddr_reg:x3; val_offset:93078*0 + 3*306*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93078*0 + 3*306*FLEN/8, x4, x1, x2)

inst_31027:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d7e0000; valaddr_reg:x3; val_offset:93081*0 + 3*307*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93081*0 + 3*307*FLEN/8, x4, x1, x2)

inst_31028:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d7f0000; valaddr_reg:x3; val_offset:93084*0 + 3*308*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93084*0 + 3*308*FLEN/8, x4, x1, x2)

inst_31029:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d7f8000; valaddr_reg:x3; val_offset:93087*0 + 3*309*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93087*0 + 3*309*FLEN/8, x4, x1, x2)

inst_31030:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d7fc000; valaddr_reg:x3; val_offset:93090*0 + 3*310*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93090*0 + 3*310*FLEN/8, x4, x1, x2)

inst_31031:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d7fe000; valaddr_reg:x3; val_offset:93093*0 + 3*311*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93093*0 + 3*311*FLEN/8, x4, x1, x2)

inst_31032:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d7ff000; valaddr_reg:x3; val_offset:93096*0 + 3*312*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93096*0 + 3*312*FLEN/8, x4, x1, x2)

inst_31033:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d7ff800; valaddr_reg:x3; val_offset:93099*0 + 3*313*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93099*0 + 3*313*FLEN/8, x4, x1, x2)

inst_31034:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d7ffc00; valaddr_reg:x3; val_offset:93102*0 + 3*314*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93102*0 + 3*314*FLEN/8, x4, x1, x2)

inst_31035:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d7ffe00; valaddr_reg:x3; val_offset:93105*0 + 3*315*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93105*0 + 3*315*FLEN/8, x4, x1, x2)

inst_31036:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d7fff00; valaddr_reg:x3; val_offset:93108*0 + 3*316*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93108*0 + 3*316*FLEN/8, x4, x1, x2)

inst_31037:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d7fff80; valaddr_reg:x3; val_offset:93111*0 + 3*317*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93111*0 + 3*317*FLEN/8, x4, x1, x2)

inst_31038:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d7fffc0; valaddr_reg:x3; val_offset:93114*0 + 3*318*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93114*0 + 3*318*FLEN/8, x4, x1, x2)

inst_31039:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d7fffe0; valaddr_reg:x3; val_offset:93117*0 + 3*319*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93117*0 + 3*319*FLEN/8, x4, x1, x2)

inst_31040:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d7ffff0; valaddr_reg:x3; val_offset:93120*0 + 3*320*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93120*0 + 3*320*FLEN/8, x4, x1, x2)

inst_31041:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d7ffff8; valaddr_reg:x3; val_offset:93123*0 + 3*321*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93123*0 + 3*321*FLEN/8, x4, x1, x2)

inst_31042:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d7ffffc; valaddr_reg:x3; val_offset:93126*0 + 3*322*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93126*0 + 3*322*FLEN/8, x4, x1, x2)

inst_31043:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d7ffffe; valaddr_reg:x3; val_offset:93129*0 + 3*323*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93129*0 + 3*323*FLEN/8, x4, x1, x2)

inst_31044:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae6b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34e2a4 and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ae6b6; op2val:0x34e2a4;
op3val:0x4d7fffff; valaddr_reg:x3; val_offset:93132*0 + 3*324*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93132*0 + 3*324*FLEN/8, x4, x1, x2)

inst_31045:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x3f800001; valaddr_reg:x3; val_offset:93135*0 + 3*325*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93135*0 + 3*325*FLEN/8, x4, x1, x2)

inst_31046:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x3f800003; valaddr_reg:x3; val_offset:93138*0 + 3*326*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93138*0 + 3*326*FLEN/8, x4, x1, x2)

inst_31047:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x3f800007; valaddr_reg:x3; val_offset:93141*0 + 3*327*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93141*0 + 3*327*FLEN/8, x4, x1, x2)

inst_31048:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x3f999999; valaddr_reg:x3; val_offset:93144*0 + 3*328*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93144*0 + 3*328*FLEN/8, x4, x1, x2)

inst_31049:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x3fa49249; valaddr_reg:x3; val_offset:93147*0 + 3*329*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93147*0 + 3*329*FLEN/8, x4, x1, x2)

inst_31050:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x3fb33333; valaddr_reg:x3; val_offset:93150*0 + 3*330*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93150*0 + 3*330*FLEN/8, x4, x1, x2)

inst_31051:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:93153*0 + 3*331*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93153*0 + 3*331*FLEN/8, x4, x1, x2)

inst_31052:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:93156*0 + 3*332*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93156*0 + 3*332*FLEN/8, x4, x1, x2)

inst_31053:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x3fc44444; valaddr_reg:x3; val_offset:93159*0 + 3*333*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93159*0 + 3*333*FLEN/8, x4, x1, x2)

inst_31054:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x3fcccccc; valaddr_reg:x3; val_offset:93162*0 + 3*334*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93162*0 + 3*334*FLEN/8, x4, x1, x2)

inst_31055:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:93165*0 + 3*335*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93165*0 + 3*335*FLEN/8, x4, x1, x2)

inst_31056:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x3fe66666; valaddr_reg:x3; val_offset:93168*0 + 3*336*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93168*0 + 3*336*FLEN/8, x4, x1, x2)

inst_31057:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x3fedb6db; valaddr_reg:x3; val_offset:93171*0 + 3*337*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93171*0 + 3*337*FLEN/8, x4, x1, x2)

inst_31058:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x3ffffff8; valaddr_reg:x3; val_offset:93174*0 + 3*338*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93174*0 + 3*338*FLEN/8, x4, x1, x2)

inst_31059:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x3ffffffc; valaddr_reg:x3; val_offset:93177*0 + 3*339*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93177*0 + 3*339*FLEN/8, x4, x1, x2)

inst_31060:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x3ffffffe; valaddr_reg:x3; val_offset:93180*0 + 3*340*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93180*0 + 3*340*FLEN/8, x4, x1, x2)

inst_31061:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f000000; valaddr_reg:x3; val_offset:93183*0 + 3*341*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93183*0 + 3*341*FLEN/8, x4, x1, x2)

inst_31062:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f000001; valaddr_reg:x3; val_offset:93186*0 + 3*342*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93186*0 + 3*342*FLEN/8, x4, x1, x2)

inst_31063:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f000003; valaddr_reg:x3; val_offset:93189*0 + 3*343*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93189*0 + 3*343*FLEN/8, x4, x1, x2)

inst_31064:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f000007; valaddr_reg:x3; val_offset:93192*0 + 3*344*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93192*0 + 3*344*FLEN/8, x4, x1, x2)

inst_31065:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f00000f; valaddr_reg:x3; val_offset:93195*0 + 3*345*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93195*0 + 3*345*FLEN/8, x4, x1, x2)

inst_31066:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f00001f; valaddr_reg:x3; val_offset:93198*0 + 3*346*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93198*0 + 3*346*FLEN/8, x4, x1, x2)

inst_31067:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f00003f; valaddr_reg:x3; val_offset:93201*0 + 3*347*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93201*0 + 3*347*FLEN/8, x4, x1, x2)

inst_31068:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f00007f; valaddr_reg:x3; val_offset:93204*0 + 3*348*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93204*0 + 3*348*FLEN/8, x4, x1, x2)

inst_31069:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f0000ff; valaddr_reg:x3; val_offset:93207*0 + 3*349*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93207*0 + 3*349*FLEN/8, x4, x1, x2)

inst_31070:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f0001ff; valaddr_reg:x3; val_offset:93210*0 + 3*350*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93210*0 + 3*350*FLEN/8, x4, x1, x2)

inst_31071:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f0003ff; valaddr_reg:x3; val_offset:93213*0 + 3*351*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93213*0 + 3*351*FLEN/8, x4, x1, x2)

inst_31072:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f0007ff; valaddr_reg:x3; val_offset:93216*0 + 3*352*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93216*0 + 3*352*FLEN/8, x4, x1, x2)

inst_31073:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f000fff; valaddr_reg:x3; val_offset:93219*0 + 3*353*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93219*0 + 3*353*FLEN/8, x4, x1, x2)

inst_31074:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f001fff; valaddr_reg:x3; val_offset:93222*0 + 3*354*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93222*0 + 3*354*FLEN/8, x4, x1, x2)

inst_31075:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f003fff; valaddr_reg:x3; val_offset:93225*0 + 3*355*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93225*0 + 3*355*FLEN/8, x4, x1, x2)

inst_31076:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f007fff; valaddr_reg:x3; val_offset:93228*0 + 3*356*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93228*0 + 3*356*FLEN/8, x4, x1, x2)

inst_31077:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f00ffff; valaddr_reg:x3; val_offset:93231*0 + 3*357*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93231*0 + 3*357*FLEN/8, x4, x1, x2)

inst_31078:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f01ffff; valaddr_reg:x3; val_offset:93234*0 + 3*358*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93234*0 + 3*358*FLEN/8, x4, x1, x2)

inst_31079:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f03ffff; valaddr_reg:x3; val_offset:93237*0 + 3*359*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93237*0 + 3*359*FLEN/8, x4, x1, x2)

inst_31080:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f07ffff; valaddr_reg:x3; val_offset:93240*0 + 3*360*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93240*0 + 3*360*FLEN/8, x4, x1, x2)

inst_31081:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f0fffff; valaddr_reg:x3; val_offset:93243*0 + 3*361*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93243*0 + 3*361*FLEN/8, x4, x1, x2)

inst_31082:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f1fffff; valaddr_reg:x3; val_offset:93246*0 + 3*362*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93246*0 + 3*362*FLEN/8, x4, x1, x2)

inst_31083:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f3fffff; valaddr_reg:x3; val_offset:93249*0 + 3*363*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93249*0 + 3*363*FLEN/8, x4, x1, x2)

inst_31084:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f400000; valaddr_reg:x3; val_offset:93252*0 + 3*364*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93252*0 + 3*364*FLEN/8, x4, x1, x2)

inst_31085:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f600000; valaddr_reg:x3; val_offset:93255*0 + 3*365*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93255*0 + 3*365*FLEN/8, x4, x1, x2)

inst_31086:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f700000; valaddr_reg:x3; val_offset:93258*0 + 3*366*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93258*0 + 3*366*FLEN/8, x4, x1, x2)

inst_31087:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f780000; valaddr_reg:x3; val_offset:93261*0 + 3*367*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93261*0 + 3*367*FLEN/8, x4, x1, x2)

inst_31088:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f7c0000; valaddr_reg:x3; val_offset:93264*0 + 3*368*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93264*0 + 3*368*FLEN/8, x4, x1, x2)

inst_31089:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f7e0000; valaddr_reg:x3; val_offset:93267*0 + 3*369*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93267*0 + 3*369*FLEN/8, x4, x1, x2)

inst_31090:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f7f0000; valaddr_reg:x3; val_offset:93270*0 + 3*370*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93270*0 + 3*370*FLEN/8, x4, x1, x2)

inst_31091:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f7f8000; valaddr_reg:x3; val_offset:93273*0 + 3*371*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93273*0 + 3*371*FLEN/8, x4, x1, x2)

inst_31092:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f7fc000; valaddr_reg:x3; val_offset:93276*0 + 3*372*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93276*0 + 3*372*FLEN/8, x4, x1, x2)

inst_31093:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f7fe000; valaddr_reg:x3; val_offset:93279*0 + 3*373*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93279*0 + 3*373*FLEN/8, x4, x1, x2)

inst_31094:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f7ff000; valaddr_reg:x3; val_offset:93282*0 + 3*374*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93282*0 + 3*374*FLEN/8, x4, x1, x2)

inst_31095:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f7ff800; valaddr_reg:x3; val_offset:93285*0 + 3*375*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93285*0 + 3*375*FLEN/8, x4, x1, x2)

inst_31096:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f7ffc00; valaddr_reg:x3; val_offset:93288*0 + 3*376*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93288*0 + 3*376*FLEN/8, x4, x1, x2)

inst_31097:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f7ffe00; valaddr_reg:x3; val_offset:93291*0 + 3*377*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93291*0 + 3*377*FLEN/8, x4, x1, x2)

inst_31098:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f7fff00; valaddr_reg:x3; val_offset:93294*0 + 3*378*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93294*0 + 3*378*FLEN/8, x4, x1, x2)

inst_31099:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f7fff80; valaddr_reg:x3; val_offset:93297*0 + 3*379*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93297*0 + 3*379*FLEN/8, x4, x1, x2)

inst_31100:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f7fffc0; valaddr_reg:x3; val_offset:93300*0 + 3*380*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93300*0 + 3*380*FLEN/8, x4, x1, x2)

inst_31101:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f7fffe0; valaddr_reg:x3; val_offset:93303*0 + 3*381*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93303*0 + 3*381*FLEN/8, x4, x1, x2)

inst_31102:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f7ffff0; valaddr_reg:x3; val_offset:93306*0 + 3*382*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93306*0 + 3*382*FLEN/8, x4, x1, x2)

inst_31103:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f7ffff8; valaddr_reg:x3; val_offset:93309*0 + 3*383*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93309*0 + 3*383*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_4)

inst_31104:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f7ffffc; valaddr_reg:x3; val_offset:93312*0 + 3*384*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93312*0 + 3*384*FLEN/8, x4, x1, x2)

inst_31105:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f7ffffe; valaddr_reg:x3; val_offset:93315*0 + 3*385*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93315*0 + 3*385*FLEN/8, x4, x1, x2)

inst_31106:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1afcca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x34db1b and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1afcca; op2val:0x34db1b;
op3val:0x4f7fffff; valaddr_reg:x3; val_offset:93318*0 + 3*386*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93318*0 + 3*386*FLEN/8, x4, x1, x2)

inst_31107:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5e800000; valaddr_reg:x3; val_offset:93321*0 + 3*387*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93321*0 + 3*387*FLEN/8, x4, x1, x2)

inst_31108:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5e800001; valaddr_reg:x3; val_offset:93324*0 + 3*388*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93324*0 + 3*388*FLEN/8, x4, x1, x2)

inst_31109:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5e800003; valaddr_reg:x3; val_offset:93327*0 + 3*389*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93327*0 + 3*389*FLEN/8, x4, x1, x2)

inst_31110:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5e800007; valaddr_reg:x3; val_offset:93330*0 + 3*390*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93330*0 + 3*390*FLEN/8, x4, x1, x2)

inst_31111:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5e80000f; valaddr_reg:x3; val_offset:93333*0 + 3*391*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93333*0 + 3*391*FLEN/8, x4, x1, x2)

inst_31112:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5e80001f; valaddr_reg:x3; val_offset:93336*0 + 3*392*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93336*0 + 3*392*FLEN/8, x4, x1, x2)

inst_31113:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5e80003f; valaddr_reg:x3; val_offset:93339*0 + 3*393*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93339*0 + 3*393*FLEN/8, x4, x1, x2)

inst_31114:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5e80007f; valaddr_reg:x3; val_offset:93342*0 + 3*394*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93342*0 + 3*394*FLEN/8, x4, x1, x2)

inst_31115:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5e8000ff; valaddr_reg:x3; val_offset:93345*0 + 3*395*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93345*0 + 3*395*FLEN/8, x4, x1, x2)

inst_31116:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5e8001ff; valaddr_reg:x3; val_offset:93348*0 + 3*396*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93348*0 + 3*396*FLEN/8, x4, x1, x2)

inst_31117:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5e8003ff; valaddr_reg:x3; val_offset:93351*0 + 3*397*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93351*0 + 3*397*FLEN/8, x4, x1, x2)

inst_31118:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5e8007ff; valaddr_reg:x3; val_offset:93354*0 + 3*398*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93354*0 + 3*398*FLEN/8, x4, x1, x2)

inst_31119:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5e800fff; valaddr_reg:x3; val_offset:93357*0 + 3*399*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93357*0 + 3*399*FLEN/8, x4, x1, x2)

inst_31120:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5e801fff; valaddr_reg:x3; val_offset:93360*0 + 3*400*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93360*0 + 3*400*FLEN/8, x4, x1, x2)

inst_31121:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5e803fff; valaddr_reg:x3; val_offset:93363*0 + 3*401*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93363*0 + 3*401*FLEN/8, x4, x1, x2)

inst_31122:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5e807fff; valaddr_reg:x3; val_offset:93366*0 + 3*402*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93366*0 + 3*402*FLEN/8, x4, x1, x2)

inst_31123:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5e80ffff; valaddr_reg:x3; val_offset:93369*0 + 3*403*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93369*0 + 3*403*FLEN/8, x4, x1, x2)

inst_31124:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5e81ffff; valaddr_reg:x3; val_offset:93372*0 + 3*404*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93372*0 + 3*404*FLEN/8, x4, x1, x2)

inst_31125:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5e83ffff; valaddr_reg:x3; val_offset:93375*0 + 3*405*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93375*0 + 3*405*FLEN/8, x4, x1, x2)

inst_31126:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5e87ffff; valaddr_reg:x3; val_offset:93378*0 + 3*406*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93378*0 + 3*406*FLEN/8, x4, x1, x2)

inst_31127:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5e8fffff; valaddr_reg:x3; val_offset:93381*0 + 3*407*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93381*0 + 3*407*FLEN/8, x4, x1, x2)

inst_31128:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5e9fffff; valaddr_reg:x3; val_offset:93384*0 + 3*408*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93384*0 + 3*408*FLEN/8, x4, x1, x2)

inst_31129:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5ebfffff; valaddr_reg:x3; val_offset:93387*0 + 3*409*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93387*0 + 3*409*FLEN/8, x4, x1, x2)

inst_31130:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5ec00000; valaddr_reg:x3; val_offset:93390*0 + 3*410*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93390*0 + 3*410*FLEN/8, x4, x1, x2)

inst_31131:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5ee00000; valaddr_reg:x3; val_offset:93393*0 + 3*411*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93393*0 + 3*411*FLEN/8, x4, x1, x2)

inst_31132:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5ef00000; valaddr_reg:x3; val_offset:93396*0 + 3*412*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93396*0 + 3*412*FLEN/8, x4, x1, x2)

inst_31133:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5ef80000; valaddr_reg:x3; val_offset:93399*0 + 3*413*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93399*0 + 3*413*FLEN/8, x4, x1, x2)

inst_31134:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5efc0000; valaddr_reg:x3; val_offset:93402*0 + 3*414*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93402*0 + 3*414*FLEN/8, x4, x1, x2)

inst_31135:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5efe0000; valaddr_reg:x3; val_offset:93405*0 + 3*415*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93405*0 + 3*415*FLEN/8, x4, x1, x2)

inst_31136:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5eff0000; valaddr_reg:x3; val_offset:93408*0 + 3*416*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93408*0 + 3*416*FLEN/8, x4, x1, x2)

inst_31137:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5eff8000; valaddr_reg:x3; val_offset:93411*0 + 3*417*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93411*0 + 3*417*FLEN/8, x4, x1, x2)

inst_31138:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5effc000; valaddr_reg:x3; val_offset:93414*0 + 3*418*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93414*0 + 3*418*FLEN/8, x4, x1, x2)

inst_31139:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5effe000; valaddr_reg:x3; val_offset:93417*0 + 3*419*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93417*0 + 3*419*FLEN/8, x4, x1, x2)

inst_31140:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5efff000; valaddr_reg:x3; val_offset:93420*0 + 3*420*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93420*0 + 3*420*FLEN/8, x4, x1, x2)

inst_31141:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5efff800; valaddr_reg:x3; val_offset:93423*0 + 3*421*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93423*0 + 3*421*FLEN/8, x4, x1, x2)

inst_31142:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5efffc00; valaddr_reg:x3; val_offset:93426*0 + 3*422*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93426*0 + 3*422*FLEN/8, x4, x1, x2)

inst_31143:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5efffe00; valaddr_reg:x3; val_offset:93429*0 + 3*423*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93429*0 + 3*423*FLEN/8, x4, x1, x2)

inst_31144:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5effff00; valaddr_reg:x3; val_offset:93432*0 + 3*424*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93432*0 + 3*424*FLEN/8, x4, x1, x2)

inst_31145:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5effff80; valaddr_reg:x3; val_offset:93435*0 + 3*425*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93435*0 + 3*425*FLEN/8, x4, x1, x2)

inst_31146:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5effffc0; valaddr_reg:x3; val_offset:93438*0 + 3*426*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93438*0 + 3*426*FLEN/8, x4, x1, x2)

inst_31147:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5effffe0; valaddr_reg:x3; val_offset:93441*0 + 3*427*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93441*0 + 3*427*FLEN/8, x4, x1, x2)

inst_31148:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5efffff0; valaddr_reg:x3; val_offset:93444*0 + 3*428*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93444*0 + 3*428*FLEN/8, x4, x1, x2)

inst_31149:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5efffff8; valaddr_reg:x3; val_offset:93447*0 + 3*429*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93447*0 + 3*429*FLEN/8, x4, x1, x2)

inst_31150:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5efffffc; valaddr_reg:x3; val_offset:93450*0 + 3*430*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93450*0 + 3*430*FLEN/8, x4, x1, x2)

inst_31151:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5efffffe; valaddr_reg:x3; val_offset:93453*0 + 3*431*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93453*0 + 3*431*FLEN/8, x4, x1, x2)

inst_31152:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x5effffff; valaddr_reg:x3; val_offset:93456*0 + 3*432*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93456*0 + 3*432*FLEN/8, x4, x1, x2)

inst_31153:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x7f000001; valaddr_reg:x3; val_offset:93459*0 + 3*433*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93459*0 + 3*433*FLEN/8, x4, x1, x2)

inst_31154:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x7f000003; valaddr_reg:x3; val_offset:93462*0 + 3*434*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93462*0 + 3*434*FLEN/8, x4, x1, x2)

inst_31155:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x7f000007; valaddr_reg:x3; val_offset:93465*0 + 3*435*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93465*0 + 3*435*FLEN/8, x4, x1, x2)

inst_31156:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x7f199999; valaddr_reg:x3; val_offset:93468*0 + 3*436*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93468*0 + 3*436*FLEN/8, x4, x1, x2)

inst_31157:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x7f249249; valaddr_reg:x3; val_offset:93471*0 + 3*437*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93471*0 + 3*437*FLEN/8, x4, x1, x2)

inst_31158:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x7f333333; valaddr_reg:x3; val_offset:93474*0 + 3*438*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93474*0 + 3*438*FLEN/8, x4, x1, x2)

inst_31159:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x7f36db6d; valaddr_reg:x3; val_offset:93477*0 + 3*439*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93477*0 + 3*439*FLEN/8, x4, x1, x2)

inst_31160:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:93480*0 + 3*440*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93480*0 + 3*440*FLEN/8, x4, x1, x2)

inst_31161:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x7f444444; valaddr_reg:x3; val_offset:93483*0 + 3*441*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93483*0 + 3*441*FLEN/8, x4, x1, x2)

inst_31162:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:93486*0 + 3*442*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93486*0 + 3*442*FLEN/8, x4, x1, x2)

inst_31163:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:93489*0 + 3*443*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93489*0 + 3*443*FLEN/8, x4, x1, x2)

inst_31164:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x7f666666; valaddr_reg:x3; val_offset:93492*0 + 3*444*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93492*0 + 3*444*FLEN/8, x4, x1, x2)

inst_31165:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x7f6db6db; valaddr_reg:x3; val_offset:93495*0 + 3*445*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93495*0 + 3*445*FLEN/8, x4, x1, x2)

inst_31166:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:93498*0 + 3*446*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93498*0 + 3*446*FLEN/8, x4, x1, x2)

inst_31167:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:93501*0 + 3*447*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93501*0 + 3*447*FLEN/8, x4, x1, x2)

inst_31168:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b5ba0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x52eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b5ba0; op2val:0x3fd2eb5e;
op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:93504*0 + 3*448*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93504*0 + 3*448*FLEN/8, x4, x1, x2)

inst_31169:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac800000; valaddr_reg:x3; val_offset:93507*0 + 3*449*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93507*0 + 3*449*FLEN/8, x4, x1, x2)

inst_31170:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac800001; valaddr_reg:x3; val_offset:93510*0 + 3*450*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93510*0 + 3*450*FLEN/8, x4, x1, x2)

inst_31171:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac800003; valaddr_reg:x3; val_offset:93513*0 + 3*451*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93513*0 + 3*451*FLEN/8, x4, x1, x2)

inst_31172:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac800007; valaddr_reg:x3; val_offset:93516*0 + 3*452*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93516*0 + 3*452*FLEN/8, x4, x1, x2)

inst_31173:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac80000f; valaddr_reg:x3; val_offset:93519*0 + 3*453*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93519*0 + 3*453*FLEN/8, x4, x1, x2)

inst_31174:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac80001f; valaddr_reg:x3; val_offset:93522*0 + 3*454*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93522*0 + 3*454*FLEN/8, x4, x1, x2)

inst_31175:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac80003f; valaddr_reg:x3; val_offset:93525*0 + 3*455*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93525*0 + 3*455*FLEN/8, x4, x1, x2)

inst_31176:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac80007f; valaddr_reg:x3; val_offset:93528*0 + 3*456*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93528*0 + 3*456*FLEN/8, x4, x1, x2)

inst_31177:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac8000ff; valaddr_reg:x3; val_offset:93531*0 + 3*457*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93531*0 + 3*457*FLEN/8, x4, x1, x2)

inst_31178:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac8001ff; valaddr_reg:x3; val_offset:93534*0 + 3*458*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93534*0 + 3*458*FLEN/8, x4, x1, x2)

inst_31179:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac8003ff; valaddr_reg:x3; val_offset:93537*0 + 3*459*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93537*0 + 3*459*FLEN/8, x4, x1, x2)

inst_31180:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac8007ff; valaddr_reg:x3; val_offset:93540*0 + 3*460*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93540*0 + 3*460*FLEN/8, x4, x1, x2)

inst_31181:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac800fff; valaddr_reg:x3; val_offset:93543*0 + 3*461*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93543*0 + 3*461*FLEN/8, x4, x1, x2)

inst_31182:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac801fff; valaddr_reg:x3; val_offset:93546*0 + 3*462*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93546*0 + 3*462*FLEN/8, x4, x1, x2)

inst_31183:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac803fff; valaddr_reg:x3; val_offset:93549*0 + 3*463*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93549*0 + 3*463*FLEN/8, x4, x1, x2)

inst_31184:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac807fff; valaddr_reg:x3; val_offset:93552*0 + 3*464*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93552*0 + 3*464*FLEN/8, x4, x1, x2)

inst_31185:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac80ffff; valaddr_reg:x3; val_offset:93555*0 + 3*465*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93555*0 + 3*465*FLEN/8, x4, x1, x2)

inst_31186:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac81ffff; valaddr_reg:x3; val_offset:93558*0 + 3*466*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93558*0 + 3*466*FLEN/8, x4, x1, x2)

inst_31187:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac83ffff; valaddr_reg:x3; val_offset:93561*0 + 3*467*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93561*0 + 3*467*FLEN/8, x4, x1, x2)

inst_31188:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac87ffff; valaddr_reg:x3; val_offset:93564*0 + 3*468*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93564*0 + 3*468*FLEN/8, x4, x1, x2)

inst_31189:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac8fffff; valaddr_reg:x3; val_offset:93567*0 + 3*469*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93567*0 + 3*469*FLEN/8, x4, x1, x2)

inst_31190:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac9fffff; valaddr_reg:x3; val_offset:93570*0 + 3*470*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93570*0 + 3*470*FLEN/8, x4, x1, x2)

inst_31191:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacbfffff; valaddr_reg:x3; val_offset:93573*0 + 3*471*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93573*0 + 3*471*FLEN/8, x4, x1, x2)

inst_31192:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacc00000; valaddr_reg:x3; val_offset:93576*0 + 3*472*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93576*0 + 3*472*FLEN/8, x4, x1, x2)

inst_31193:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xace00000; valaddr_reg:x3; val_offset:93579*0 + 3*473*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93579*0 + 3*473*FLEN/8, x4, x1, x2)

inst_31194:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacf00000; valaddr_reg:x3; val_offset:93582*0 + 3*474*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93582*0 + 3*474*FLEN/8, x4, x1, x2)

inst_31195:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacf80000; valaddr_reg:x3; val_offset:93585*0 + 3*475*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93585*0 + 3*475*FLEN/8, x4, x1, x2)

inst_31196:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacfc0000; valaddr_reg:x3; val_offset:93588*0 + 3*476*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93588*0 + 3*476*FLEN/8, x4, x1, x2)

inst_31197:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacfe0000; valaddr_reg:x3; val_offset:93591*0 + 3*477*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93591*0 + 3*477*FLEN/8, x4, x1, x2)

inst_31198:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacff0000; valaddr_reg:x3; val_offset:93594*0 + 3*478*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93594*0 + 3*478*FLEN/8, x4, x1, x2)

inst_31199:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacff8000; valaddr_reg:x3; val_offset:93597*0 + 3*479*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93597*0 + 3*479*FLEN/8, x4, x1, x2)

inst_31200:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacffc000; valaddr_reg:x3; val_offset:93600*0 + 3*480*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93600*0 + 3*480*FLEN/8, x4, x1, x2)

inst_31201:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacffe000; valaddr_reg:x3; val_offset:93603*0 + 3*481*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93603*0 + 3*481*FLEN/8, x4, x1, x2)

inst_31202:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacfff000; valaddr_reg:x3; val_offset:93606*0 + 3*482*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93606*0 + 3*482*FLEN/8, x4, x1, x2)

inst_31203:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacfff800; valaddr_reg:x3; val_offset:93609*0 + 3*483*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93609*0 + 3*483*FLEN/8, x4, x1, x2)

inst_31204:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacfffc00; valaddr_reg:x3; val_offset:93612*0 + 3*484*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93612*0 + 3*484*FLEN/8, x4, x1, x2)

inst_31205:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacfffe00; valaddr_reg:x3; val_offset:93615*0 + 3*485*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93615*0 + 3*485*FLEN/8, x4, x1, x2)

inst_31206:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacffff00; valaddr_reg:x3; val_offset:93618*0 + 3*486*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93618*0 + 3*486*FLEN/8, x4, x1, x2)

inst_31207:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacffff80; valaddr_reg:x3; val_offset:93621*0 + 3*487*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93621*0 + 3*487*FLEN/8, x4, x1, x2)

inst_31208:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacffffc0; valaddr_reg:x3; val_offset:93624*0 + 3*488*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93624*0 + 3*488*FLEN/8, x4, x1, x2)

inst_31209:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacffffe0; valaddr_reg:x3; val_offset:93627*0 + 3*489*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93627*0 + 3*489*FLEN/8, x4, x1, x2)

inst_31210:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacfffff0; valaddr_reg:x3; val_offset:93630*0 + 3*490*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93630*0 + 3*490*FLEN/8, x4, x1, x2)

inst_31211:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacfffff8; valaddr_reg:x3; val_offset:93633*0 + 3*491*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93633*0 + 3*491*FLEN/8, x4, x1, x2)

inst_31212:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacfffffc; valaddr_reg:x3; val_offset:93636*0 + 3*492*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93636*0 + 3*492*FLEN/8, x4, x1, x2)

inst_31213:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacfffffe; valaddr_reg:x3; val_offset:93639*0 + 3*493*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93639*0 + 3*493*FLEN/8, x4, x1, x2)

inst_31214:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacffffff; valaddr_reg:x3; val_offset:93642*0 + 3*494*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93642*0 + 3*494*FLEN/8, x4, x1, x2)

inst_31215:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xbf800001; valaddr_reg:x3; val_offset:93645*0 + 3*495*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93645*0 + 3*495*FLEN/8, x4, x1, x2)

inst_31216:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xbf800003; valaddr_reg:x3; val_offset:93648*0 + 3*496*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93648*0 + 3*496*FLEN/8, x4, x1, x2)

inst_31217:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xbf800007; valaddr_reg:x3; val_offset:93651*0 + 3*497*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93651*0 + 3*497*FLEN/8, x4, x1, x2)

inst_31218:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xbf999999; valaddr_reg:x3; val_offset:93654*0 + 3*498*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93654*0 + 3*498*FLEN/8, x4, x1, x2)

inst_31219:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:93657*0 + 3*499*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93657*0 + 3*499*FLEN/8, x4, x1, x2)

inst_31220:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:93660*0 + 3*500*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93660*0 + 3*500*FLEN/8, x4, x1, x2)

inst_31221:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:93663*0 + 3*501*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93663*0 + 3*501*FLEN/8, x4, x1, x2)

inst_31222:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:93666*0 + 3*502*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93666*0 + 3*502*FLEN/8, x4, x1, x2)

inst_31223:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:93669*0 + 3*503*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93669*0 + 3*503*FLEN/8, x4, x1, x2)

inst_31224:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:93672*0 + 3*504*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93672*0 + 3*504*FLEN/8, x4, x1, x2)

inst_31225:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:93675*0 + 3*505*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93675*0 + 3*505*FLEN/8, x4, x1, x2)

inst_31226:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:93678*0 + 3*506*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93678*0 + 3*506*FLEN/8, x4, x1, x2)

inst_31227:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:93681*0 + 3*507*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93681*0 + 3*507*FLEN/8, x4, x1, x2)

inst_31228:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:93684*0 + 3*508*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93684*0 + 3*508*FLEN/8, x4, x1, x2)

inst_31229:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:93687*0 + 3*509*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93687*0 + 3*509*FLEN/8, x4, x1, x2)

inst_31230:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:93690*0 + 3*510*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93690*0 + 3*510*FLEN/8, x4, x1, x2)

inst_31231:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:93693*0 + 3*511*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93693*0 + 3*511*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_5)

inst_31232:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:93696*0 + 3*512*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93696*0 + 3*512*FLEN/8, x4, x1, x2)

inst_31233:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:93699*0 + 3*513*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93699*0 + 3*513*FLEN/8, x4, x1, x2)

inst_31234:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0x199999; valaddr_reg:x3; val_offset:93702*0 + 3*514*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93702*0 + 3*514*FLEN/8, x4, x1, x2)

inst_31235:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0x249249; valaddr_reg:x3; val_offset:93705*0 + 3*515*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93705*0 + 3*515*FLEN/8, x4, x1, x2)

inst_31236:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0x333333; valaddr_reg:x3; val_offset:93708*0 + 3*516*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93708*0 + 3*516*FLEN/8, x4, x1, x2)

inst_31237:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0x36db6d; valaddr_reg:x3; val_offset:93711*0 + 3*517*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93711*0 + 3*517*FLEN/8, x4, x1, x2)

inst_31238:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0x3bbbbb; valaddr_reg:x3; val_offset:93714*0 + 3*518*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93714*0 + 3*518*FLEN/8, x4, x1, x2)

inst_31239:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0x444444; valaddr_reg:x3; val_offset:93717*0 + 3*519*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93717*0 + 3*519*FLEN/8, x4, x1, x2)

inst_31240:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0x4ccccc; valaddr_reg:x3; val_offset:93720*0 + 3*520*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93720*0 + 3*520*FLEN/8, x4, x1, x2)

inst_31241:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0x5b6db6; valaddr_reg:x3; val_offset:93723*0 + 3*521*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93723*0 + 3*521*FLEN/8, x4, x1, x2)

inst_31242:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0x666666; valaddr_reg:x3; val_offset:93726*0 + 3*522*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93726*0 + 3*522*FLEN/8, x4, x1, x2)

inst_31243:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0x6db6db; valaddr_reg:x3; val_offset:93729*0 + 3*523*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93729*0 + 3*523*FLEN/8, x4, x1, x2)

inst_31244:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0x7ffff8; valaddr_reg:x3; val_offset:93732*0 + 3*524*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93732*0 + 3*524*FLEN/8, x4, x1, x2)

inst_31245:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0x7ffffc; valaddr_reg:x3; val_offset:93735*0 + 3*525*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93735*0 + 3*525*FLEN/8, x4, x1, x2)

inst_31246:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0x7ffffe; valaddr_reg:x3; val_offset:93738*0 + 3*526*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93738*0 + 3*526*FLEN/8, x4, x1, x2)

inst_31247:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xc800000; valaddr_reg:x3; val_offset:93741*0 + 3*527*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93741*0 + 3*527*FLEN/8, x4, x1, x2)

inst_31248:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xc800001; valaddr_reg:x3; val_offset:93744*0 + 3*528*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93744*0 + 3*528*FLEN/8, x4, x1, x2)

inst_31249:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xc800003; valaddr_reg:x3; val_offset:93747*0 + 3*529*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93747*0 + 3*529*FLEN/8, x4, x1, x2)

inst_31250:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xc800007; valaddr_reg:x3; val_offset:93750*0 + 3*530*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93750*0 + 3*530*FLEN/8, x4, x1, x2)

inst_31251:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xc80000f; valaddr_reg:x3; val_offset:93753*0 + 3*531*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93753*0 + 3*531*FLEN/8, x4, x1, x2)

inst_31252:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xc80001f; valaddr_reg:x3; val_offset:93756*0 + 3*532*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93756*0 + 3*532*FLEN/8, x4, x1, x2)

inst_31253:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xc80003f; valaddr_reg:x3; val_offset:93759*0 + 3*533*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93759*0 + 3*533*FLEN/8, x4, x1, x2)

inst_31254:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xc80007f; valaddr_reg:x3; val_offset:93762*0 + 3*534*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93762*0 + 3*534*FLEN/8, x4, x1, x2)

inst_31255:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xc8000ff; valaddr_reg:x3; val_offset:93765*0 + 3*535*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93765*0 + 3*535*FLEN/8, x4, x1, x2)

inst_31256:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xc8001ff; valaddr_reg:x3; val_offset:93768*0 + 3*536*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93768*0 + 3*536*FLEN/8, x4, x1, x2)

inst_31257:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xc8003ff; valaddr_reg:x3; val_offset:93771*0 + 3*537*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93771*0 + 3*537*FLEN/8, x4, x1, x2)

inst_31258:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xc8007ff; valaddr_reg:x3; val_offset:93774*0 + 3*538*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93774*0 + 3*538*FLEN/8, x4, x1, x2)

inst_31259:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xc800fff; valaddr_reg:x3; val_offset:93777*0 + 3*539*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93777*0 + 3*539*FLEN/8, x4, x1, x2)

inst_31260:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xc801fff; valaddr_reg:x3; val_offset:93780*0 + 3*540*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93780*0 + 3*540*FLEN/8, x4, x1, x2)

inst_31261:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xc803fff; valaddr_reg:x3; val_offset:93783*0 + 3*541*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93783*0 + 3*541*FLEN/8, x4, x1, x2)

inst_31262:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xc807fff; valaddr_reg:x3; val_offset:93786*0 + 3*542*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93786*0 + 3*542*FLEN/8, x4, x1, x2)

inst_31263:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xc80ffff; valaddr_reg:x3; val_offset:93789*0 + 3*543*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93789*0 + 3*543*FLEN/8, x4, x1, x2)

inst_31264:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xc81ffff; valaddr_reg:x3; val_offset:93792*0 + 3*544*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93792*0 + 3*544*FLEN/8, x4, x1, x2)

inst_31265:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xc83ffff; valaddr_reg:x3; val_offset:93795*0 + 3*545*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93795*0 + 3*545*FLEN/8, x4, x1, x2)

inst_31266:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xc87ffff; valaddr_reg:x3; val_offset:93798*0 + 3*546*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93798*0 + 3*546*FLEN/8, x4, x1, x2)

inst_31267:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xc8fffff; valaddr_reg:x3; val_offset:93801*0 + 3*547*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93801*0 + 3*547*FLEN/8, x4, x1, x2)

inst_31268:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xc9fffff; valaddr_reg:x3; val_offset:93804*0 + 3*548*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93804*0 + 3*548*FLEN/8, x4, x1, x2)

inst_31269:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xcbfffff; valaddr_reg:x3; val_offset:93807*0 + 3*549*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93807*0 + 3*549*FLEN/8, x4, x1, x2)

inst_31270:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xcc00000; valaddr_reg:x3; val_offset:93810*0 + 3*550*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93810*0 + 3*550*FLEN/8, x4, x1, x2)

inst_31271:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xce00000; valaddr_reg:x3; val_offset:93813*0 + 3*551*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93813*0 + 3*551*FLEN/8, x4, x1, x2)

inst_31272:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xcf00000; valaddr_reg:x3; val_offset:93816*0 + 3*552*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93816*0 + 3*552*FLEN/8, x4, x1, x2)

inst_31273:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xcf80000; valaddr_reg:x3; val_offset:93819*0 + 3*553*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93819*0 + 3*553*FLEN/8, x4, x1, x2)

inst_31274:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xcfc0000; valaddr_reg:x3; val_offset:93822*0 + 3*554*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93822*0 + 3*554*FLEN/8, x4, x1, x2)

inst_31275:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xcfe0000; valaddr_reg:x3; val_offset:93825*0 + 3*555*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93825*0 + 3*555*FLEN/8, x4, x1, x2)

inst_31276:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xcff0000; valaddr_reg:x3; val_offset:93828*0 + 3*556*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93828*0 + 3*556*FLEN/8, x4, x1, x2)

inst_31277:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xcff8000; valaddr_reg:x3; val_offset:93831*0 + 3*557*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93831*0 + 3*557*FLEN/8, x4, x1, x2)

inst_31278:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xcffc000; valaddr_reg:x3; val_offset:93834*0 + 3*558*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93834*0 + 3*558*FLEN/8, x4, x1, x2)

inst_31279:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xcffe000; valaddr_reg:x3; val_offset:93837*0 + 3*559*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93837*0 + 3*559*FLEN/8, x4, x1, x2)

inst_31280:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xcfff000; valaddr_reg:x3; val_offset:93840*0 + 3*560*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93840*0 + 3*560*FLEN/8, x4, x1, x2)

inst_31281:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xcfff800; valaddr_reg:x3; val_offset:93843*0 + 3*561*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93843*0 + 3*561*FLEN/8, x4, x1, x2)

inst_31282:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xcfffc00; valaddr_reg:x3; val_offset:93846*0 + 3*562*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93846*0 + 3*562*FLEN/8, x4, x1, x2)

inst_31283:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xcfffe00; valaddr_reg:x3; val_offset:93849*0 + 3*563*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93849*0 + 3*563*FLEN/8, x4, x1, x2)

inst_31284:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xcffff00; valaddr_reg:x3; val_offset:93852*0 + 3*564*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93852*0 + 3*564*FLEN/8, x4, x1, x2)

inst_31285:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xcffff80; valaddr_reg:x3; val_offset:93855*0 + 3*565*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93855*0 + 3*565*FLEN/8, x4, x1, x2)

inst_31286:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xcffffc0; valaddr_reg:x3; val_offset:93858*0 + 3*566*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93858*0 + 3*566*FLEN/8, x4, x1, x2)

inst_31287:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xcffffe0; valaddr_reg:x3; val_offset:93861*0 + 3*567*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93861*0 + 3*567*FLEN/8, x4, x1, x2)

inst_31288:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xcfffff0; valaddr_reg:x3; val_offset:93864*0 + 3*568*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93864*0 + 3*568*FLEN/8, x4, x1, x2)

inst_31289:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xcfffff8; valaddr_reg:x3; val_offset:93867*0 + 3*569*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93867*0 + 3*569*FLEN/8, x4, x1, x2)

inst_31290:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xcfffffc; valaddr_reg:x3; val_offset:93870*0 + 3*570*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93870*0 + 3*570*FLEN/8, x4, x1, x2)

inst_31291:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xcfffffe; valaddr_reg:x3; val_offset:93873*0 + 3*571*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93873*0 + 3*571*FLEN/8, x4, x1, x2)

inst_31292:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bd4c8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1bd4c8; op2val:0x0;
op3val:0xcffffff; valaddr_reg:x3; val_offset:93876*0 + 3*572*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93876*0 + 3*572*FLEN/8, x4, x1, x2)

inst_31293:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x76800000; valaddr_reg:x3; val_offset:93879*0 + 3*573*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93879*0 + 3*573*FLEN/8, x4, x1, x2)

inst_31294:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x76800001; valaddr_reg:x3; val_offset:93882*0 + 3*574*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93882*0 + 3*574*FLEN/8, x4, x1, x2)

inst_31295:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x76800003; valaddr_reg:x3; val_offset:93885*0 + 3*575*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93885*0 + 3*575*FLEN/8, x4, x1, x2)

inst_31296:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x76800007; valaddr_reg:x3; val_offset:93888*0 + 3*576*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93888*0 + 3*576*FLEN/8, x4, x1, x2)

inst_31297:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x7680000f; valaddr_reg:x3; val_offset:93891*0 + 3*577*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93891*0 + 3*577*FLEN/8, x4, x1, x2)

inst_31298:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x7680001f; valaddr_reg:x3; val_offset:93894*0 + 3*578*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93894*0 + 3*578*FLEN/8, x4, x1, x2)

inst_31299:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x7680003f; valaddr_reg:x3; val_offset:93897*0 + 3*579*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93897*0 + 3*579*FLEN/8, x4, x1, x2)

inst_31300:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x7680007f; valaddr_reg:x3; val_offset:93900*0 + 3*580*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93900*0 + 3*580*FLEN/8, x4, x1, x2)

inst_31301:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x768000ff; valaddr_reg:x3; val_offset:93903*0 + 3*581*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93903*0 + 3*581*FLEN/8, x4, x1, x2)

inst_31302:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x768001ff; valaddr_reg:x3; val_offset:93906*0 + 3*582*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93906*0 + 3*582*FLEN/8, x4, x1, x2)

inst_31303:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x768003ff; valaddr_reg:x3; val_offset:93909*0 + 3*583*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93909*0 + 3*583*FLEN/8, x4, x1, x2)

inst_31304:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x768007ff; valaddr_reg:x3; val_offset:93912*0 + 3*584*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93912*0 + 3*584*FLEN/8, x4, x1, x2)

inst_31305:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x76800fff; valaddr_reg:x3; val_offset:93915*0 + 3*585*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93915*0 + 3*585*FLEN/8, x4, x1, x2)

inst_31306:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x76801fff; valaddr_reg:x3; val_offset:93918*0 + 3*586*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93918*0 + 3*586*FLEN/8, x4, x1, x2)

inst_31307:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x76803fff; valaddr_reg:x3; val_offset:93921*0 + 3*587*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93921*0 + 3*587*FLEN/8, x4, x1, x2)

inst_31308:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x76807fff; valaddr_reg:x3; val_offset:93924*0 + 3*588*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93924*0 + 3*588*FLEN/8, x4, x1, x2)

inst_31309:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x7680ffff; valaddr_reg:x3; val_offset:93927*0 + 3*589*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93927*0 + 3*589*FLEN/8, x4, x1, x2)

inst_31310:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x7681ffff; valaddr_reg:x3; val_offset:93930*0 + 3*590*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93930*0 + 3*590*FLEN/8, x4, x1, x2)

inst_31311:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x7683ffff; valaddr_reg:x3; val_offset:93933*0 + 3*591*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93933*0 + 3*591*FLEN/8, x4, x1, x2)

inst_31312:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x7687ffff; valaddr_reg:x3; val_offset:93936*0 + 3*592*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93936*0 + 3*592*FLEN/8, x4, x1, x2)

inst_31313:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x768fffff; valaddr_reg:x3; val_offset:93939*0 + 3*593*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93939*0 + 3*593*FLEN/8, x4, x1, x2)

inst_31314:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x769fffff; valaddr_reg:x3; val_offset:93942*0 + 3*594*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93942*0 + 3*594*FLEN/8, x4, x1, x2)

inst_31315:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x76bfffff; valaddr_reg:x3; val_offset:93945*0 + 3*595*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93945*0 + 3*595*FLEN/8, x4, x1, x2)

inst_31316:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x76c00000; valaddr_reg:x3; val_offset:93948*0 + 3*596*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93948*0 + 3*596*FLEN/8, x4, x1, x2)

inst_31317:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x76e00000; valaddr_reg:x3; val_offset:93951*0 + 3*597*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93951*0 + 3*597*FLEN/8, x4, x1, x2)

inst_31318:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x76f00000; valaddr_reg:x3; val_offset:93954*0 + 3*598*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93954*0 + 3*598*FLEN/8, x4, x1, x2)

inst_31319:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x76f80000; valaddr_reg:x3; val_offset:93957*0 + 3*599*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93957*0 + 3*599*FLEN/8, x4, x1, x2)

inst_31320:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x76fc0000; valaddr_reg:x3; val_offset:93960*0 + 3*600*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93960*0 + 3*600*FLEN/8, x4, x1, x2)

inst_31321:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x76fe0000; valaddr_reg:x3; val_offset:93963*0 + 3*601*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93963*0 + 3*601*FLEN/8, x4, x1, x2)

inst_31322:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x76ff0000; valaddr_reg:x3; val_offset:93966*0 + 3*602*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93966*0 + 3*602*FLEN/8, x4, x1, x2)

inst_31323:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x76ff8000; valaddr_reg:x3; val_offset:93969*0 + 3*603*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93969*0 + 3*603*FLEN/8, x4, x1, x2)

inst_31324:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x76ffc000; valaddr_reg:x3; val_offset:93972*0 + 3*604*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93972*0 + 3*604*FLEN/8, x4, x1, x2)

inst_31325:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x76ffe000; valaddr_reg:x3; val_offset:93975*0 + 3*605*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93975*0 + 3*605*FLEN/8, x4, x1, x2)

inst_31326:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x76fff000; valaddr_reg:x3; val_offset:93978*0 + 3*606*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93978*0 + 3*606*FLEN/8, x4, x1, x2)

inst_31327:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x76fff800; valaddr_reg:x3; val_offset:93981*0 + 3*607*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93981*0 + 3*607*FLEN/8, x4, x1, x2)

inst_31328:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x76fffc00; valaddr_reg:x3; val_offset:93984*0 + 3*608*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93984*0 + 3*608*FLEN/8, x4, x1, x2)

inst_31329:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x76fffe00; valaddr_reg:x3; val_offset:93987*0 + 3*609*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93987*0 + 3*609*FLEN/8, x4, x1, x2)

inst_31330:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x76ffff00; valaddr_reg:x3; val_offset:93990*0 + 3*610*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93990*0 + 3*610*FLEN/8, x4, x1, x2)

inst_31331:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x76ffff80; valaddr_reg:x3; val_offset:93993*0 + 3*611*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93993*0 + 3*611*FLEN/8, x4, x1, x2)

inst_31332:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x76ffffc0; valaddr_reg:x3; val_offset:93996*0 + 3*612*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93996*0 + 3*612*FLEN/8, x4, x1, x2)

inst_31333:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x76ffffe0; valaddr_reg:x3; val_offset:93999*0 + 3*613*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93999*0 + 3*613*FLEN/8, x4, x1, x2)

inst_31334:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x76fffff0; valaddr_reg:x3; val_offset:94002*0 + 3*614*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94002*0 + 3*614*FLEN/8, x4, x1, x2)

inst_31335:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x76fffff8; valaddr_reg:x3; val_offset:94005*0 + 3*615*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94005*0 + 3*615*FLEN/8, x4, x1, x2)

inst_31336:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x76fffffc; valaddr_reg:x3; val_offset:94008*0 + 3*616*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94008*0 + 3*616*FLEN/8, x4, x1, x2)

inst_31337:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x76fffffe; valaddr_reg:x3; val_offset:94011*0 + 3*617*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94011*0 + 3*617*FLEN/8, x4, x1, x2)

inst_31338:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x76ffffff; valaddr_reg:x3; val_offset:94014*0 + 3*618*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94014*0 + 3*618*FLEN/8, x4, x1, x2)

inst_31339:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x7f000001; valaddr_reg:x3; val_offset:94017*0 + 3*619*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94017*0 + 3*619*FLEN/8, x4, x1, x2)

inst_31340:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x7f000003; valaddr_reg:x3; val_offset:94020*0 + 3*620*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94020*0 + 3*620*FLEN/8, x4, x1, x2)

inst_31341:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x7f000007; valaddr_reg:x3; val_offset:94023*0 + 3*621*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94023*0 + 3*621*FLEN/8, x4, x1, x2)

inst_31342:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x7f199999; valaddr_reg:x3; val_offset:94026*0 + 3*622*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94026*0 + 3*622*FLEN/8, x4, x1, x2)

inst_31343:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x7f249249; valaddr_reg:x3; val_offset:94029*0 + 3*623*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94029*0 + 3*623*FLEN/8, x4, x1, x2)

inst_31344:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x7f333333; valaddr_reg:x3; val_offset:94032*0 + 3*624*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94032*0 + 3*624*FLEN/8, x4, x1, x2)

inst_31345:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x7f36db6d; valaddr_reg:x3; val_offset:94035*0 + 3*625*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94035*0 + 3*625*FLEN/8, x4, x1, x2)

inst_31346:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:94038*0 + 3*626*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94038*0 + 3*626*FLEN/8, x4, x1, x2)

inst_31347:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x7f444444; valaddr_reg:x3; val_offset:94041*0 + 3*627*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94041*0 + 3*627*FLEN/8, x4, x1, x2)

inst_31348:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:94044*0 + 3*628*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94044*0 + 3*628*FLEN/8, x4, x1, x2)

inst_31349:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:94047*0 + 3*629*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94047*0 + 3*629*FLEN/8, x4, x1, x2)

inst_31350:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x7f666666; valaddr_reg:x3; val_offset:94050*0 + 3*630*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94050*0 + 3*630*FLEN/8, x4, x1, x2)

inst_31351:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x7f6db6db; valaddr_reg:x3; val_offset:94053*0 + 3*631*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94053*0 + 3*631*FLEN/8, x4, x1, x2)

inst_31352:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:94056*0 + 3*632*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94056*0 + 3*632*FLEN/8, x4, x1, x2)

inst_31353:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:94059*0 + 3*633*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94059*0 + 3*633*FLEN/8, x4, x1, x2)

inst_31354:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c0af2 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x51fe63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c0af2; op2val:0x3fd1fe63;
op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:94062*0 + 3*634*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94062*0 + 3*634*FLEN/8, x4, x1, x2)

inst_31355:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6c800000; valaddr_reg:x3; val_offset:94065*0 + 3*635*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94065*0 + 3*635*FLEN/8, x4, x1, x2)

inst_31356:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6c800001; valaddr_reg:x3; val_offset:94068*0 + 3*636*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94068*0 + 3*636*FLEN/8, x4, x1, x2)

inst_31357:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6c800003; valaddr_reg:x3; val_offset:94071*0 + 3*637*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94071*0 + 3*637*FLEN/8, x4, x1, x2)

inst_31358:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6c800007; valaddr_reg:x3; val_offset:94074*0 + 3*638*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94074*0 + 3*638*FLEN/8, x4, x1, x2)

inst_31359:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6c80000f; valaddr_reg:x3; val_offset:94077*0 + 3*639*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94077*0 + 3*639*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_6)

inst_31360:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6c80001f; valaddr_reg:x3; val_offset:94080*0 + 3*640*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94080*0 + 3*640*FLEN/8, x4, x1, x2)

inst_31361:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6c80003f; valaddr_reg:x3; val_offset:94083*0 + 3*641*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94083*0 + 3*641*FLEN/8, x4, x1, x2)

inst_31362:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6c80007f; valaddr_reg:x3; val_offset:94086*0 + 3*642*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94086*0 + 3*642*FLEN/8, x4, x1, x2)

inst_31363:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6c8000ff; valaddr_reg:x3; val_offset:94089*0 + 3*643*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94089*0 + 3*643*FLEN/8, x4, x1, x2)

inst_31364:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6c8001ff; valaddr_reg:x3; val_offset:94092*0 + 3*644*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94092*0 + 3*644*FLEN/8, x4, x1, x2)

inst_31365:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6c8003ff; valaddr_reg:x3; val_offset:94095*0 + 3*645*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94095*0 + 3*645*FLEN/8, x4, x1, x2)

inst_31366:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6c8007ff; valaddr_reg:x3; val_offset:94098*0 + 3*646*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94098*0 + 3*646*FLEN/8, x4, x1, x2)

inst_31367:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6c800fff; valaddr_reg:x3; val_offset:94101*0 + 3*647*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94101*0 + 3*647*FLEN/8, x4, x1, x2)

inst_31368:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6c801fff; valaddr_reg:x3; val_offset:94104*0 + 3*648*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94104*0 + 3*648*FLEN/8, x4, x1, x2)

inst_31369:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6c803fff; valaddr_reg:x3; val_offset:94107*0 + 3*649*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94107*0 + 3*649*FLEN/8, x4, x1, x2)

inst_31370:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6c807fff; valaddr_reg:x3; val_offset:94110*0 + 3*650*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94110*0 + 3*650*FLEN/8, x4, x1, x2)

inst_31371:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6c80ffff; valaddr_reg:x3; val_offset:94113*0 + 3*651*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94113*0 + 3*651*FLEN/8, x4, x1, x2)

inst_31372:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6c81ffff; valaddr_reg:x3; val_offset:94116*0 + 3*652*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94116*0 + 3*652*FLEN/8, x4, x1, x2)

inst_31373:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6c83ffff; valaddr_reg:x3; val_offset:94119*0 + 3*653*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94119*0 + 3*653*FLEN/8, x4, x1, x2)

inst_31374:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6c87ffff; valaddr_reg:x3; val_offset:94122*0 + 3*654*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94122*0 + 3*654*FLEN/8, x4, x1, x2)

inst_31375:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6c8fffff; valaddr_reg:x3; val_offset:94125*0 + 3*655*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94125*0 + 3*655*FLEN/8, x4, x1, x2)

inst_31376:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6c9fffff; valaddr_reg:x3; val_offset:94128*0 + 3*656*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94128*0 + 3*656*FLEN/8, x4, x1, x2)

inst_31377:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6cbfffff; valaddr_reg:x3; val_offset:94131*0 + 3*657*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94131*0 + 3*657*FLEN/8, x4, x1, x2)

inst_31378:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6cc00000; valaddr_reg:x3; val_offset:94134*0 + 3*658*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94134*0 + 3*658*FLEN/8, x4, x1, x2)

inst_31379:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6ce00000; valaddr_reg:x3; val_offset:94137*0 + 3*659*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94137*0 + 3*659*FLEN/8, x4, x1, x2)

inst_31380:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6cf00000; valaddr_reg:x3; val_offset:94140*0 + 3*660*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94140*0 + 3*660*FLEN/8, x4, x1, x2)

inst_31381:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6cf80000; valaddr_reg:x3; val_offset:94143*0 + 3*661*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94143*0 + 3*661*FLEN/8, x4, x1, x2)

inst_31382:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6cfc0000; valaddr_reg:x3; val_offset:94146*0 + 3*662*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94146*0 + 3*662*FLEN/8, x4, x1, x2)

inst_31383:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6cfe0000; valaddr_reg:x3; val_offset:94149*0 + 3*663*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94149*0 + 3*663*FLEN/8, x4, x1, x2)

inst_31384:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6cff0000; valaddr_reg:x3; val_offset:94152*0 + 3*664*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94152*0 + 3*664*FLEN/8, x4, x1, x2)

inst_31385:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6cff8000; valaddr_reg:x3; val_offset:94155*0 + 3*665*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94155*0 + 3*665*FLEN/8, x4, x1, x2)

inst_31386:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6cffc000; valaddr_reg:x3; val_offset:94158*0 + 3*666*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94158*0 + 3*666*FLEN/8, x4, x1, x2)

inst_31387:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6cffe000; valaddr_reg:x3; val_offset:94161*0 + 3*667*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94161*0 + 3*667*FLEN/8, x4, x1, x2)

inst_31388:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6cfff000; valaddr_reg:x3; val_offset:94164*0 + 3*668*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94164*0 + 3*668*FLEN/8, x4, x1, x2)

inst_31389:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6cfff800; valaddr_reg:x3; val_offset:94167*0 + 3*669*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94167*0 + 3*669*FLEN/8, x4, x1, x2)

inst_31390:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6cfffc00; valaddr_reg:x3; val_offset:94170*0 + 3*670*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94170*0 + 3*670*FLEN/8, x4, x1, x2)

inst_31391:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6cfffe00; valaddr_reg:x3; val_offset:94173*0 + 3*671*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94173*0 + 3*671*FLEN/8, x4, x1, x2)

inst_31392:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6cffff00; valaddr_reg:x3; val_offset:94176*0 + 3*672*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94176*0 + 3*672*FLEN/8, x4, x1, x2)

inst_31393:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6cffff80; valaddr_reg:x3; val_offset:94179*0 + 3*673*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94179*0 + 3*673*FLEN/8, x4, x1, x2)

inst_31394:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6cffffc0; valaddr_reg:x3; val_offset:94182*0 + 3*674*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94182*0 + 3*674*FLEN/8, x4, x1, x2)

inst_31395:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6cffffe0; valaddr_reg:x3; val_offset:94185*0 + 3*675*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94185*0 + 3*675*FLEN/8, x4, x1, x2)

inst_31396:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6cfffff0; valaddr_reg:x3; val_offset:94188*0 + 3*676*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94188*0 + 3*676*FLEN/8, x4, x1, x2)

inst_31397:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6cfffff8; valaddr_reg:x3; val_offset:94191*0 + 3*677*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94191*0 + 3*677*FLEN/8, x4, x1, x2)

inst_31398:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6cfffffc; valaddr_reg:x3; val_offset:94194*0 + 3*678*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94194*0 + 3*678*FLEN/8, x4, x1, x2)

inst_31399:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6cfffffe; valaddr_reg:x3; val_offset:94197*0 + 3*679*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94197*0 + 3*679*FLEN/8, x4, x1, x2)

inst_31400:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x6cffffff; valaddr_reg:x3; val_offset:94200*0 + 3*680*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94200*0 + 3*680*FLEN/8, x4, x1, x2)

inst_31401:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x7f000001; valaddr_reg:x3; val_offset:94203*0 + 3*681*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94203*0 + 3*681*FLEN/8, x4, x1, x2)

inst_31402:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x7f000003; valaddr_reg:x3; val_offset:94206*0 + 3*682*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94206*0 + 3*682*FLEN/8, x4, x1, x2)

inst_31403:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x7f000007; valaddr_reg:x3; val_offset:94209*0 + 3*683*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94209*0 + 3*683*FLEN/8, x4, x1, x2)

inst_31404:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x7f199999; valaddr_reg:x3; val_offset:94212*0 + 3*684*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94212*0 + 3*684*FLEN/8, x4, x1, x2)

inst_31405:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x7f249249; valaddr_reg:x3; val_offset:94215*0 + 3*685*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94215*0 + 3*685*FLEN/8, x4, x1, x2)

inst_31406:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x7f333333; valaddr_reg:x3; val_offset:94218*0 + 3*686*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94218*0 + 3*686*FLEN/8, x4, x1, x2)

inst_31407:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x7f36db6d; valaddr_reg:x3; val_offset:94221*0 + 3*687*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94221*0 + 3*687*FLEN/8, x4, x1, x2)

inst_31408:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:94224*0 + 3*688*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94224*0 + 3*688*FLEN/8, x4, x1, x2)

inst_31409:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x7f444444; valaddr_reg:x3; val_offset:94227*0 + 3*689*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94227*0 + 3*689*FLEN/8, x4, x1, x2)

inst_31410:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:94230*0 + 3*690*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94230*0 + 3*690*FLEN/8, x4, x1, x2)

inst_31411:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:94233*0 + 3*691*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94233*0 + 3*691*FLEN/8, x4, x1, x2)

inst_31412:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x7f666666; valaddr_reg:x3; val_offset:94236*0 + 3*692*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94236*0 + 3*692*FLEN/8, x4, x1, x2)

inst_31413:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x7f6db6db; valaddr_reg:x3; val_offset:94239*0 + 3*693*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94239*0 + 3*693*FLEN/8, x4, x1, x2)

inst_31414:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:94242*0 + 3*694*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94242*0 + 3*694*FLEN/8, x4, x1, x2)

inst_31415:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:94245*0 + 3*695*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94245*0 + 3*695*FLEN/8, x4, x1, x2)

inst_31416:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c62df and fs2 == 0 and fe2 == 0x7f and fm2 == 0x518853 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c62df; op2val:0x3fd18853;
op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:94248*0 + 3*696*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94248*0 + 3*696*FLEN/8, x4, x1, x2)

inst_31417:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb9000000; valaddr_reg:x3; val_offset:94251*0 + 3*697*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94251*0 + 3*697*FLEN/8, x4, x1, x2)

inst_31418:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb9000001; valaddr_reg:x3; val_offset:94254*0 + 3*698*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94254*0 + 3*698*FLEN/8, x4, x1, x2)

inst_31419:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb9000003; valaddr_reg:x3; val_offset:94257*0 + 3*699*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94257*0 + 3*699*FLEN/8, x4, x1, x2)

inst_31420:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb9000007; valaddr_reg:x3; val_offset:94260*0 + 3*700*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94260*0 + 3*700*FLEN/8, x4, x1, x2)

inst_31421:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb900000f; valaddr_reg:x3; val_offset:94263*0 + 3*701*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94263*0 + 3*701*FLEN/8, x4, x1, x2)

inst_31422:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb900001f; valaddr_reg:x3; val_offset:94266*0 + 3*702*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94266*0 + 3*702*FLEN/8, x4, x1, x2)

inst_31423:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb900003f; valaddr_reg:x3; val_offset:94269*0 + 3*703*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94269*0 + 3*703*FLEN/8, x4, x1, x2)

inst_31424:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb900007f; valaddr_reg:x3; val_offset:94272*0 + 3*704*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94272*0 + 3*704*FLEN/8, x4, x1, x2)

inst_31425:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb90000ff; valaddr_reg:x3; val_offset:94275*0 + 3*705*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94275*0 + 3*705*FLEN/8, x4, x1, x2)

inst_31426:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb90001ff; valaddr_reg:x3; val_offset:94278*0 + 3*706*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94278*0 + 3*706*FLEN/8, x4, x1, x2)

inst_31427:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb90003ff; valaddr_reg:x3; val_offset:94281*0 + 3*707*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94281*0 + 3*707*FLEN/8, x4, x1, x2)

inst_31428:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb90007ff; valaddr_reg:x3; val_offset:94284*0 + 3*708*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94284*0 + 3*708*FLEN/8, x4, x1, x2)

inst_31429:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb9000fff; valaddr_reg:x3; val_offset:94287*0 + 3*709*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94287*0 + 3*709*FLEN/8, x4, x1, x2)

inst_31430:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb9001fff; valaddr_reg:x3; val_offset:94290*0 + 3*710*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94290*0 + 3*710*FLEN/8, x4, x1, x2)

inst_31431:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb9003fff; valaddr_reg:x3; val_offset:94293*0 + 3*711*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94293*0 + 3*711*FLEN/8, x4, x1, x2)

inst_31432:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb9007fff; valaddr_reg:x3; val_offset:94296*0 + 3*712*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94296*0 + 3*712*FLEN/8, x4, x1, x2)

inst_31433:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb900ffff; valaddr_reg:x3; val_offset:94299*0 + 3*713*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94299*0 + 3*713*FLEN/8, x4, x1, x2)

inst_31434:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb901ffff; valaddr_reg:x3; val_offset:94302*0 + 3*714*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94302*0 + 3*714*FLEN/8, x4, x1, x2)

inst_31435:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb903ffff; valaddr_reg:x3; val_offset:94305*0 + 3*715*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94305*0 + 3*715*FLEN/8, x4, x1, x2)

inst_31436:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb907ffff; valaddr_reg:x3; val_offset:94308*0 + 3*716*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94308*0 + 3*716*FLEN/8, x4, x1, x2)

inst_31437:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb90fffff; valaddr_reg:x3; val_offset:94311*0 + 3*717*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94311*0 + 3*717*FLEN/8, x4, x1, x2)

inst_31438:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb91fffff; valaddr_reg:x3; val_offset:94314*0 + 3*718*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94314*0 + 3*718*FLEN/8, x4, x1, x2)

inst_31439:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb93fffff; valaddr_reg:x3; val_offset:94317*0 + 3*719*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94317*0 + 3*719*FLEN/8, x4, x1, x2)

inst_31440:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb9400000; valaddr_reg:x3; val_offset:94320*0 + 3*720*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94320*0 + 3*720*FLEN/8, x4, x1, x2)

inst_31441:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb9600000; valaddr_reg:x3; val_offset:94323*0 + 3*721*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94323*0 + 3*721*FLEN/8, x4, x1, x2)

inst_31442:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb9700000; valaddr_reg:x3; val_offset:94326*0 + 3*722*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94326*0 + 3*722*FLEN/8, x4, x1, x2)

inst_31443:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb9780000; valaddr_reg:x3; val_offset:94329*0 + 3*723*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94329*0 + 3*723*FLEN/8, x4, x1, x2)

inst_31444:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97c0000; valaddr_reg:x3; val_offset:94332*0 + 3*724*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94332*0 + 3*724*FLEN/8, x4, x1, x2)

inst_31445:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97e0000; valaddr_reg:x3; val_offset:94335*0 + 3*725*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94335*0 + 3*725*FLEN/8, x4, x1, x2)

inst_31446:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97f0000; valaddr_reg:x3; val_offset:94338*0 + 3*726*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94338*0 + 3*726*FLEN/8, x4, x1, x2)

inst_31447:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97f8000; valaddr_reg:x3; val_offset:94341*0 + 3*727*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94341*0 + 3*727*FLEN/8, x4, x1, x2)

inst_31448:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97fc000; valaddr_reg:x3; val_offset:94344*0 + 3*728*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94344*0 + 3*728*FLEN/8, x4, x1, x2)

inst_31449:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97fe000; valaddr_reg:x3; val_offset:94347*0 + 3*729*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94347*0 + 3*729*FLEN/8, x4, x1, x2)

inst_31450:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97ff000; valaddr_reg:x3; val_offset:94350*0 + 3*730*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94350*0 + 3*730*FLEN/8, x4, x1, x2)

inst_31451:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97ff800; valaddr_reg:x3; val_offset:94353*0 + 3*731*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94353*0 + 3*731*FLEN/8, x4, x1, x2)

inst_31452:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97ffc00; valaddr_reg:x3; val_offset:94356*0 + 3*732*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94356*0 + 3*732*FLEN/8, x4, x1, x2)

inst_31453:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97ffe00; valaddr_reg:x3; val_offset:94359*0 + 3*733*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94359*0 + 3*733*FLEN/8, x4, x1, x2)

inst_31454:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97fff00; valaddr_reg:x3; val_offset:94362*0 + 3*734*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94362*0 + 3*734*FLEN/8, x4, x1, x2)

inst_31455:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97fff80; valaddr_reg:x3; val_offset:94365*0 + 3*735*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94365*0 + 3*735*FLEN/8, x4, x1, x2)

inst_31456:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97fffc0; valaddr_reg:x3; val_offset:94368*0 + 3*736*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94368*0 + 3*736*FLEN/8, x4, x1, x2)

inst_31457:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97fffe0; valaddr_reg:x3; val_offset:94371*0 + 3*737*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94371*0 + 3*737*FLEN/8, x4, x1, x2)

inst_31458:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97ffff0; valaddr_reg:x3; val_offset:94374*0 + 3*738*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94374*0 + 3*738*FLEN/8, x4, x1, x2)

inst_31459:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97ffff8; valaddr_reg:x3; val_offset:94377*0 + 3*739*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94377*0 + 3*739*FLEN/8, x4, x1, x2)

inst_31460:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97ffffc; valaddr_reg:x3; val_offset:94380*0 + 3*740*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94380*0 + 3*740*FLEN/8, x4, x1, x2)

inst_31461:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97ffffe; valaddr_reg:x3; val_offset:94383*0 + 3*741*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94383*0 + 3*741*FLEN/8, x4, x1, x2)

inst_31462:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97fffff; valaddr_reg:x3; val_offset:94386*0 + 3*742*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94386*0 + 3*742*FLEN/8, x4, x1, x2)

inst_31463:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xbf800001; valaddr_reg:x3; val_offset:94389*0 + 3*743*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94389*0 + 3*743*FLEN/8, x4, x1, x2)

inst_31464:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xbf800003; valaddr_reg:x3; val_offset:94392*0 + 3*744*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94392*0 + 3*744*FLEN/8, x4, x1, x2)

inst_31465:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xbf800007; valaddr_reg:x3; val_offset:94395*0 + 3*745*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94395*0 + 3*745*FLEN/8, x4, x1, x2)

inst_31466:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xbf999999; valaddr_reg:x3; val_offset:94398*0 + 3*746*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94398*0 + 3*746*FLEN/8, x4, x1, x2)

inst_31467:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:94401*0 + 3*747*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94401*0 + 3*747*FLEN/8, x4, x1, x2)

inst_31468:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:94404*0 + 3*748*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94404*0 + 3*748*FLEN/8, x4, x1, x2)

inst_31469:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:94407*0 + 3*749*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94407*0 + 3*749*FLEN/8, x4, x1, x2)

inst_31470:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:94410*0 + 3*750*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94410*0 + 3*750*FLEN/8, x4, x1, x2)

inst_31471:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:94413*0 + 3*751*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94413*0 + 3*751*FLEN/8, x4, x1, x2)

inst_31472:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:94416*0 + 3*752*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94416*0 + 3*752*FLEN/8, x4, x1, x2)

inst_31473:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:94419*0 + 3*753*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94419*0 + 3*753*FLEN/8, x4, x1, x2)

inst_31474:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:94422*0 + 3*754*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94422*0 + 3*754*FLEN/8, x4, x1, x2)

inst_31475:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:94425*0 + 3*755*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94425*0 + 3*755*FLEN/8, x4, x1, x2)

inst_31476:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:94428*0 + 3*756*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94428*0 + 3*756*FLEN/8, x4, x1, x2)

inst_31477:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:94431*0 + 3*757*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94431*0 + 3*757*FLEN/8, x4, x1, x2)

inst_31478:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:94434*0 + 3*758*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94434*0 + 3*758*FLEN/8, x4, x1, x2)

inst_31479:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cee66 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cee66; op2val:0x0;
op3val:0x800001; valaddr_reg:x3; val_offset:94437*0 + 3*759*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94437*0 + 3*759*FLEN/8, x4, x1, x2)

inst_31480:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cee66 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cee66; op2val:0x0;
op3val:0x800003; valaddr_reg:x3; val_offset:94440*0 + 3*760*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94440*0 + 3*760*FLEN/8, x4, x1, x2)

inst_31481:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cee66 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cee66; op2val:0x0;
op3val:0x800007; valaddr_reg:x3; val_offset:94443*0 + 3*761*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94443*0 + 3*761*FLEN/8, x4, x1, x2)

inst_31482:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cee66 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cee66; op2val:0x0;
op3val:0x999999; valaddr_reg:x3; val_offset:94446*0 + 3*762*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94446*0 + 3*762*FLEN/8, x4, x1, x2)

inst_31483:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cee66 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cee66; op2val:0x0;
op3val:0xa49249; valaddr_reg:x3; val_offset:94449*0 + 3*763*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94449*0 + 3*763*FLEN/8, x4, x1, x2)

inst_31484:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cee66 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cee66; op2val:0x0;
op3val:0xb33333; valaddr_reg:x3; val_offset:94452*0 + 3*764*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94452*0 + 3*764*FLEN/8, x4, x1, x2)

inst_31485:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cee66 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cee66; op2val:0x0;
op3val:0xb6db6d; valaddr_reg:x3; val_offset:94455*0 + 3*765*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94455*0 + 3*765*FLEN/8, x4, x1, x2)

inst_31486:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cee66 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cee66; op2val:0x0;
op3val:0xbbbbbb; valaddr_reg:x3; val_offset:94458*0 + 3*766*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94458*0 + 3*766*FLEN/8, x4, x1, x2)

inst_31487:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cee66 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cee66; op2val:0x0;
op3val:0xc44444; valaddr_reg:x3; val_offset:94461*0 + 3*767*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94461*0 + 3*767*FLEN/8, x4, x1, x2)
#endif


RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(0x7f1a33ce,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffc000,32,FLEN)
NAN_BOXED(0x7f1a33ce,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffe000,32,FLEN)
NAN_BOXED(0x7f1a33ce,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fff000,32,FLEN)
NAN_BOXED(0x7f1a33ce,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fff800,32,FLEN)
NAN_BOXED(0x7f1a33ce,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fffc00,32,FLEN)
NAN_BOXED(0x7f1a33ce,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fffe00,32,FLEN)
NAN_BOXED(0x7f1a33ce,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffff00,32,FLEN)
NAN_BOXED(0x7f1a33ce,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffff80,32,FLEN)
NAN_BOXED(0x7f1a33ce,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffffc0,32,FLEN)
NAN_BOXED(0x7f1a33ce,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffffe0,32,FLEN)
NAN_BOXED(0x7f1a33ce,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fffff0,32,FLEN)
NAN_BOXED(0x7f1a33ce,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fffff8,32,FLEN)
NAN_BOXED(0x7f1a33ce,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fffffc,32,FLEN)
NAN_BOXED(0x7f1a33ce,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fffffe,32,FLEN)
NAN_BOXED(0x7f1a33ce,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffffff,32,FLEN)
NAN_BOXED(0x7f1a54c0,32,FLEN)
NAN_BOXED(0x3514a8,32,FLEN)
NAN_BOXED(0x3f800001,32,FLEN)
NAN_BOXED(0x7f1a54c0,32,FLEN)
NAN_BOXED(0x3514a8,32,FLEN)
NAN_BOXED(0x3f800003,32,FLEN)
NAN_BOXED(0x7f1a54c0,32,FLEN)
NAN_BOXED(0x3514a8,32,FLEN)
NAN_BOXED(0x3f800007,32,FLEN)
NAN_BOXED(0x7f1a54c0,32,FLEN)
NAN_BOXED(0x3514a8,32,FLEN)
NAN_BOXED(0x3f999999,32,FLEN)
NAN_BOXED(0x7f1a54c0,32,FLEN)
NAN_BOXED(0x3514a8,32,FLEN)
NAN_BOXED(0x3fa49249,32,FLEN)
NAN_BOXED(0x7f1a54c0,32,FLEN)
NAN_BOXED(0x3514a8,32,FLEN)
NAN_BOXED(0x3fb33333,32,FLEN)
NAN_BOXED(0x7f1a54c0,32,FLEN)
NAN_BOXED(0x3514a8,32,FLEN)
NAN_BOXED(0x3fb6db6d,32,FLEN)
NAN_BOXED(0x7f1a54c0,32,FLEN)
NAN_BOXED(0x3514a8,32,FLEN)
NAN_BOXED(0x3fbbbbbb,32,FLEN)
NAN_BOXED(0x7f1a54c0,32,FLEN)
NAN_BOXED(0x3514a8,32,FLEN)
NAN_BOXED(0x3fc44444,32,FLEN)
NAN_BOXED(0x7f1a54c0,32,FLEN)
NAN_BOXED(0x3514a8,32,FLEN)
NAN_BOXED(0x3fcccccc,32,FLEN)
NAN_BOXED(0x7f1a54c0,32,FLEN)
NAN_BOXED(0x3514a8,32,FLEN)
NAN_BOXED(0x3fdb6db6,32,FLEN)
NAN_BOXED(0x7f1a54c0,32,FLEN)
NAN_BOXED(0x3514a8,32,FLEN)
NAN_BOXED(0x3fe66666,32,FLEN)
NAN_BOXED(0x7f1a54c0,32,FLEN)
NAN_BOXED(0x3514a8,32,FLEN)
NAN_BOXED(0x3fedb6db,32,FLEN)
NAN_BOXED(0x7f1a54c0,32,FLEN)
NAN_BOXED(0x3514a8,32,FLEN)
NAN_BOXED(0x3ffffff8,32,FLEN)
NAN_BOXED(0x7f1a54c0,32,FLEN)
NAN_BOXED(0x3514a8,32,FLEN)
NAN_BOXED(0x3ffffffc,32,FLEN)
NAN_BOXED(0x7f1a54c0,32,FLEN)
NAN_BOXED(0x3514a8,32,FLEN)
NAN_BOXED(0x3ffffffe,32,FLEN)
NAN_BOXED(0x7f1a54c0,32,FLEN)
NAN_BOXED(0x3514a8,32,FLEN)
NAN_BOXED(0x43000000,32,FLEN)
NAN_BOXED(0x7f1a54c0,32,FLEN)
NAN_BOXED(0x3514a8,32,FLEN)
NAN_BOXED(0x43000001,32,FLEN)
NAN_BOXED(0x7f1a54c0,32,FLEN)
NAN_BOXED(0x3514a8,32,FLEN)
NAN_BOXED(0x43000003,32,FLEN)
NAN_BOXED(0x7f1a54c0,32,FLEN)
NAN_BOXED(0x3514a8,32,FLEN)
NAN_BOXED(0x43000007,32,FLEN)
NAN_BOXED(0x7f1a54c0,32,FLEN)
NAN_BOXED(0x3514a8,32,FLEN)
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NAN_BOXED(0x4300001f,32,FLEN)
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NAN_BOXED(0x3514a8,32,FLEN)
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NAN_BOXED(0x7f1a54c0,32,FLEN)
NAN_BOXED(0x3514a8,32,FLEN)
NAN_BOXED(0x4300ffff,32,FLEN)
NAN_BOXED(0x7f1a54c0,32,FLEN)
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NAN_BOXED(0x4301ffff,32,FLEN)
NAN_BOXED(0x7f1a54c0,32,FLEN)
NAN_BOXED(0x3514a8,32,FLEN)
NAN_BOXED(0x4303ffff,32,FLEN)
NAN_BOXED(0x7f1a54c0,32,FLEN)
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NAN_BOXED(0x4307ffff,32,FLEN)
NAN_BOXED(0x7f1a54c0,32,FLEN)
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NAN_BOXED(0x430fffff,32,FLEN)
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NAN_BOXED(0x431fffff,32,FLEN)
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NAN_BOXED(0x43600000,32,FLEN)
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NAN_BOXED(0x7f1a54c0,32,FLEN)
NAN_BOXED(0x3514a8,32,FLEN)
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NAN_BOXED(0x7f1a54c0,32,FLEN)
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NAN_BOXED(0x7f1a54c0,32,FLEN)
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NAN_BOXED(0x437ffff0,32,FLEN)
NAN_BOXED(0x7f1a54c0,32,FLEN)
NAN_BOXED(0x3514a8,32,FLEN)
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NAN_BOXED(0x7f1a54c0,32,FLEN)
NAN_BOXED(0x3514a8,32,FLEN)
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NAN_BOXED(0x7f1a54c0,32,FLEN)
NAN_BOXED(0x3514a8,32,FLEN)
NAN_BOXED(0x437ffffe,32,FLEN)
NAN_BOXED(0x7f1a54c0,32,FLEN)
NAN_BOXED(0x3514a8,32,FLEN)
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NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x199999,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x249249,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x333333,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x36db6d,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3bbbbb,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x444444,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ccccc,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5b6db6,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x666666,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
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NAN_BOXED(0x6db6db,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff8,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffc,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffe,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf000000,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf000001,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf000003,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
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NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
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NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf00001f,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
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NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf00007f,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf0000ff,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf0001ff,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf0003ff,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf0007ff,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf000fff,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf001fff,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf003fff,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf007fff,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf00ffff,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf01ffff,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf03ffff,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf07ffff,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf0fffff,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf1fffff,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf3fffff,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf400000,32,FLEN)
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NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf700000,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
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NAN_BOXED(0x7f1a62f6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf7c0000,32,FLEN)
NAN_BOXED(0x7f1a62f6,32,FLEN)
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NAN_BOXED(0x7f1a62f6,32,FLEN)
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NAN_BOXED(0x7f1a62f6,32,FLEN)
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NAN_BOXED(0x7f1a62f6,32,FLEN)
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NAN_BOXED(0x7f1a62f6,32,FLEN)
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NAN_BOXED(0x7f1a62f6,32,FLEN)
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NAN_BOXED(0xbb7f8000,32,FLEN)
NAN_BOXED(0x7f1ac304,32,FLEN)
NAN_BOXED(0x8034eed6,32,FLEN)
NAN_BOXED(0xbb7fc000,32,FLEN)
NAN_BOXED(0x7f1ac304,32,FLEN)
NAN_BOXED(0x8034eed6,32,FLEN)
NAN_BOXED(0xbb7fe000,32,FLEN)
NAN_BOXED(0x7f1ac304,32,FLEN)
NAN_BOXED(0x8034eed6,32,FLEN)
NAN_BOXED(0xbb7ff000,32,FLEN)
NAN_BOXED(0x7f1ac304,32,FLEN)
NAN_BOXED(0x8034eed6,32,FLEN)
NAN_BOXED(0xbb7ff800,32,FLEN)
NAN_BOXED(0x7f1ac304,32,FLEN)
NAN_BOXED(0x8034eed6,32,FLEN)
NAN_BOXED(0xbb7ffc00,32,FLEN)
NAN_BOXED(0x7f1ac304,32,FLEN)
NAN_BOXED(0x8034eed6,32,FLEN)
NAN_BOXED(0xbb7ffe00,32,FLEN)
NAN_BOXED(0x7f1ac304,32,FLEN)
NAN_BOXED(0x8034eed6,32,FLEN)
NAN_BOXED(0xbb7fff00,32,FLEN)
NAN_BOXED(0x7f1ac304,32,FLEN)
NAN_BOXED(0x8034eed6,32,FLEN)
NAN_BOXED(0xbb7fff80,32,FLEN)
NAN_BOXED(0x7f1ac304,32,FLEN)
NAN_BOXED(0x8034eed6,32,FLEN)
NAN_BOXED(0xbb7fffc0,32,FLEN)
NAN_BOXED(0x7f1ac304,32,FLEN)
NAN_BOXED(0x8034eed6,32,FLEN)
NAN_BOXED(0xbb7fffe0,32,FLEN)
NAN_BOXED(0x7f1ac304,32,FLEN)
NAN_BOXED(0x8034eed6,32,FLEN)
NAN_BOXED(0xbb7ffff0,32,FLEN)
NAN_BOXED(0x7f1ac304,32,FLEN)
NAN_BOXED(0x8034eed6,32,FLEN)
NAN_BOXED(0xbb7ffff8,32,FLEN)
NAN_BOXED(0x7f1ac304,32,FLEN)
NAN_BOXED(0x8034eed6,32,FLEN)
NAN_BOXED(0xbb7ffffc,32,FLEN)
NAN_BOXED(0x7f1ac304,32,FLEN)
NAN_BOXED(0x8034eed6,32,FLEN)
NAN_BOXED(0xbb7ffffe,32,FLEN)
NAN_BOXED(0x7f1ac304,32,FLEN)
NAN_BOXED(0x8034eed6,32,FLEN)
NAN_BOXED(0xbb7fffff,32,FLEN)
NAN_BOXED(0x7f1ac304,32,FLEN)
NAN_BOXED(0x8034eed6,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7f1ac304,32,FLEN)
NAN_BOXED(0x8034eed6,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7f1ac304,32,FLEN)
NAN_BOXED(0x8034eed6,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7f1ac304,32,FLEN)
NAN_BOXED(0x8034eed6,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7f1ac304,32,FLEN)
NAN_BOXED(0x8034eed6,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7f1ac304,32,FLEN)
NAN_BOXED(0x8034eed6,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7f1ac304,32,FLEN)
NAN_BOXED(0x8034eed6,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7f1ac304,32,FLEN)
NAN_BOXED(0x8034eed6,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7f1ac304,32,FLEN)
NAN_BOXED(0x8034eed6,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7f1ac304,32,FLEN)
NAN_BOXED(0x8034eed6,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7f1ac304,32,FLEN)
NAN_BOXED(0x8034eed6,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7f1ac304,32,FLEN)
NAN_BOXED(0x8034eed6,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7f1ac304,32,FLEN)
NAN_BOXED(0x8034eed6,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7f1ac304,32,FLEN)
NAN_BOXED(0x8034eed6,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7f1ac304,32,FLEN)
NAN_BOXED(0x8034eed6,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7f1ac304,32,FLEN)
NAN_BOXED(0x8034eed6,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe1000000,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe1000001,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe1000003,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe1000007,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe100000f,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe100001f,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe100003f,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe100007f,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe10000ff,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe10001ff,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe10003ff,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe10007ff,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe1000fff,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe1001fff,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe1003fff,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe1007fff,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe100ffff,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe101ffff,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe103ffff,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe107ffff,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe10fffff,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe11fffff,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe13fffff,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe1400000,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe1600000,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe1700000,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe1780000,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe17c0000,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe17e0000,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe17f0000,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe17f8000,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe17fc000,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe17fe000,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe17ff000,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe17ff800,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe17ffc00,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe17ffe00,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe17fff00,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe17fff80,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe17fffc0,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe17fffe0,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe17ffff0,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe17ffff8,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe17ffffc,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe17ffffe,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xe17fffff,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xff000001,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xff000003,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xff000007,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xff199999,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xff249249,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xff333333,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xff36db6d,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xff3bbbbb,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xff444444,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xff4ccccc,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xff5b6db6,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xff666666,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xff6db6db,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xff7ffff8,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xff7ffffc,32,FLEN)
NAN_BOXED(0x7f1ae1f2,32,FLEN)
NAN_BOXED(0xbfd39111,32,FLEN)
NAN_BOXED(0xff7ffffe,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x3f800001,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x3f800003,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x3f800007,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x3f999999,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x3fa49249,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x3fb33333,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x3fb6db6d,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x3fbbbbbb,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x3fc44444,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x3fcccccc,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x3fdb6db6,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x3fe66666,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x3fedb6db,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x3ffffff8,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x3ffffffc,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x3ffffffe,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d000000,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d000001,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d000003,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d000007,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d00000f,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d00001f,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d00003f,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d00007f,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d0000ff,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d0001ff,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d0003ff,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d0007ff,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d000fff,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d001fff,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d003fff,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d007fff,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d00ffff,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d01ffff,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d03ffff,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d07ffff,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d0fffff,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d1fffff,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d3fffff,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d400000,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d600000,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d700000,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d780000,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d7c0000,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d7e0000,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d7f0000,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d7f8000,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d7fc000,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d7fe000,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d7ff000,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d7ff800,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d7ffc00,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d7ffe00,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d7fff00,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d7fff80,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d7fffc0,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d7fffe0,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d7ffff0,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d7ffff8,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d7ffffc,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d7ffffe,32,FLEN)
NAN_BOXED(0x7f1ae6b6,32,FLEN)
NAN_BOXED(0x34e2a4,32,FLEN)
NAN_BOXED(0x4d7fffff,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x3f800001,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x3f800003,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x3f800007,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x3f999999,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x3fa49249,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x3fb33333,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x3fb6db6d,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x3fbbbbbb,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x3fc44444,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x3fcccccc,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x3fdb6db6,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x3fe66666,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x3fedb6db,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x3ffffff8,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x3ffffffc,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x3ffffffe,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f000000,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f000001,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f000003,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f000007,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f00000f,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f00001f,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f00003f,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f00007f,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f0000ff,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f0001ff,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f0003ff,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f0007ff,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f000fff,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f001fff,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f003fff,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f007fff,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f00ffff,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f01ffff,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f03ffff,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f07ffff,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f0fffff,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f1fffff,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f3fffff,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f400000,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f600000,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f700000,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f780000,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f7c0000,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f7e0000,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f7f0000,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f7f8000,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f7fc000,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f7fe000,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f7ff000,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f7ff800,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f7ffc00,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f7ffe00,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f7fff00,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f7fff80,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f7fffc0,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f7fffe0,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f7ffff0,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f7ffff8,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f7ffffc,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f7ffffe,32,FLEN)
NAN_BOXED(0x7f1afcca,32,FLEN)
NAN_BOXED(0x34db1b,32,FLEN)
NAN_BOXED(0x4f7fffff,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5e800000,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5e800001,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5e800003,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5e800007,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5e80000f,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5e80001f,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5e80003f,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5e80007f,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5e8000ff,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5e8001ff,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5e8003ff,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5e8007ff,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5e800fff,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5e801fff,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5e803fff,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5e807fff,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5e80ffff,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5e81ffff,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5e83ffff,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5e87ffff,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5e8fffff,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5e9fffff,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5ebfffff,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5ec00000,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5ee00000,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5ef00000,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5ef80000,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5efc0000,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5efe0000,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5eff0000,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5eff8000,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5effc000,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5effe000,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5efff000,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5efff800,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5efffc00,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5efffe00,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5effff00,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5effff80,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5effffc0,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5effffe0,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5efffff0,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5efffff8,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5efffffc,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5efffffe,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x5effffff,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x7f000001,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x7f000003,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x7f000007,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x7f199999,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x7f249249,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x7f333333,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x7f36db6d,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x7f3bbbbb,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x7f444444,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x7f4ccccc,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x7f5b6db6,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x7f666666,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x7f6db6db,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x7f7ffff8,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x7f7ffffc,32,FLEN)
NAN_BOXED(0x7f1b5ba0,32,FLEN)
NAN_BOXED(0x3fd2eb5e,32,FLEN)
NAN_BOXED(0x7f7ffffe,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xac800000,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xac800001,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xac800003,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xac800007,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xac80000f,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xac80001f,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xac80003f,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xac80007f,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xac8000ff,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xac8001ff,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xac8003ff,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xac8007ff,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xac800fff,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xac801fff,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xac803fff,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xac807fff,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xac80ffff,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xac81ffff,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xac83ffff,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xac87ffff,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xac8fffff,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xac9fffff,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xacbfffff,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xacc00000,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xace00000,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xacf00000,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xacf80000,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xacfc0000,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xacfe0000,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xacff0000,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xacff8000,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xacffc000,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xacffe000,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xacfff000,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xacfff800,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xacfffc00,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xacfffe00,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xacffff00,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xacffff80,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xacffffc0,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xacffffe0,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xacfffff0,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xacfffff8,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xacfffffc,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xacfffffe,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xacffffff,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7f1b8e8c,32,FLEN)
NAN_BOXED(0x8034a994,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x199999,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x249249,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x333333,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x36db6d,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3bbbbb,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x444444,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ccccc,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5b6db6,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x666666,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6db6db,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff8,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffc,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffe,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc800000,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc800001,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc800003,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc800007,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc80000f,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc80001f,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc80003f,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc80007f,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc8000ff,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc8001ff,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc8003ff,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc8007ff,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc800fff,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc801fff,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc803fff,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc807fff,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc80ffff,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc81ffff,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc83ffff,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc87ffff,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc8fffff,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc9fffff,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcbfffff,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcc00000,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xce00000,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcf00000,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcf80000,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcfc0000,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcfe0000,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcff0000,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcff8000,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcffc000,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcffe000,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcfff000,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcfff800,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcfffc00,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcfffe00,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcffff00,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcffff80,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcffffc0,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcffffe0,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcfffff0,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcfffff8,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcfffffc,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcfffffe,32,FLEN)
NAN_BOXED(0x7f1bd4c8,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcffffff,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x76800000,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x76800001,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x76800003,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x76800007,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x7680000f,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x7680001f,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x7680003f,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x7680007f,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x768000ff,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x768001ff,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x768003ff,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x768007ff,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x76800fff,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x76801fff,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x76803fff,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x76807fff,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x7680ffff,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x7681ffff,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x7683ffff,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x7687ffff,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x768fffff,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x769fffff,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x76bfffff,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x76c00000,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x76e00000,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x76f00000,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x76f80000,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x76fc0000,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x76fe0000,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x76ff0000,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x76ff8000,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x76ffc000,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x76ffe000,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x76fff000,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x76fff800,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x76fffc00,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x76fffe00,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x76ffff00,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x76ffff80,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x76ffffc0,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x76ffffe0,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x76fffff0,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x76fffff8,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x76fffffc,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x76fffffe,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x76ffffff,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x7f000001,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x7f000003,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x7f000007,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x7f199999,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x7f249249,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x7f333333,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x7f36db6d,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x7f3bbbbb,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x7f444444,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x7f4ccccc,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x7f5b6db6,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x7f666666,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x7f6db6db,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x7f7ffff8,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x7f7ffffc,32,FLEN)
NAN_BOXED(0x7f1c0af2,32,FLEN)
NAN_BOXED(0x3fd1fe63,32,FLEN)
NAN_BOXED(0x7f7ffffe,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6c800000,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6c800001,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6c800003,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6c800007,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6c80000f,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6c80001f,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6c80003f,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6c80007f,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6c8000ff,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6c8001ff,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6c8003ff,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6c8007ff,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6c800fff,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6c801fff,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6c803fff,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6c807fff,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6c80ffff,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6c81ffff,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6c83ffff,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6c87ffff,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6c8fffff,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6c9fffff,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6cbfffff,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6cc00000,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6ce00000,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6cf00000,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6cf80000,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6cfc0000,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6cfe0000,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6cff0000,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6cff8000,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6cffc000,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6cffe000,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6cfff000,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6cfff800,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6cfffc00,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6cfffe00,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6cffff00,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6cffff80,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6cffffc0,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6cffffe0,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6cfffff0,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6cfffff8,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6cfffffc,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6cfffffe,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x6cffffff,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x7f000001,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x7f000003,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x7f000007,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x7f199999,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x7f249249,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x7f333333,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x7f36db6d,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x7f3bbbbb,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x7f444444,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x7f4ccccc,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x7f5b6db6,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x7f666666,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x7f6db6db,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x7f7ffff8,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x7f7ffffc,32,FLEN)
NAN_BOXED(0x7f1c62df,32,FLEN)
NAN_BOXED(0x3fd18853,32,FLEN)
NAN_BOXED(0x7f7ffffe,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb9000000,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb9000001,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb9000003,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb9000007,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb900000f,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb900001f,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb900003f,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb900007f,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb90000ff,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb90001ff,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb90003ff,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb90007ff,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb9000fff,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb9001fff,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb9003fff,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb9007fff,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb900ffff,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb901ffff,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb903ffff,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb907ffff,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb90fffff,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb91fffff,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb93fffff,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb9400000,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb9600000,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb9700000,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb9780000,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb97c0000,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb97e0000,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb97f0000,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb97f8000,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb97fc000,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb97fe000,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb97ff000,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb97ff800,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb97ffc00,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb97ffe00,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb97fff00,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb97fff80,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb97fffc0,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb97fffe0,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb97ffff0,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb97ffff8,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb97ffffc,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb97ffffe,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xb97fffff,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7f1cd3e2,32,FLEN)
NAN_BOXED(0x80343c55,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7f1cee66,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800001,32,FLEN)
NAN_BOXED(0x7f1cee66,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800003,32,FLEN)
NAN_BOXED(0x7f1cee66,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800007,32,FLEN)
NAN_BOXED(0x7f1cee66,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x999999,32,FLEN)
NAN_BOXED(0x7f1cee66,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa49249,32,FLEN)
NAN_BOXED(0x7f1cee66,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb33333,32,FLEN)
NAN_BOXED(0x7f1cee66,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb6db6d,32,FLEN)
NAN_BOXED(0x7f1cee66,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbbbbbb,32,FLEN)
NAN_BOXED(0x7f1cee66,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc44444,32,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;


signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_2:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_3:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_4:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_5:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_6:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine

tsig_begin_canary:
CANARY;
tsig_begin_canary:
CANARY;
mtrap_sigptr:
    .fill 64*(XLEN/32),4,0xdeadbeef
tsig_end_canary:
CANARY;
tsig_end_canary:
CANARY;

#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif

sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
