
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.11.0
// timestamp : Mon Feb  5 04:35:29 2024 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /home/riscv/riscv-ctg/sample_cgfs/dataset.cgf \
//                  --cgf /home/riscv/riscv-ctg/sample_cgfs/sample_cgfs_fext/RV64Zfinx/fmadd.s.cgf \
 \
//                  -- xlen 64  \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fmadd.s instruction of the RISC-V RV64_Zfinx,RV64_Zdinx extension for the fmadd_b15 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV64I_Zfinx,RV64I_Zdinx")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*Zfinx.*);def TEST_CASE_1=True;",fmadd_b15)

RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_35282:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe883ffff; valaddr_reg:x12; val_offset:105783*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105783*FLEN/8, x13, x9, x10)

inst_35283:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe8fc0000; valaddr_reg:x12; val_offset:105786*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105786*FLEN/8, x13, x9, x10)

inst_35284:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe881ffff; valaddr_reg:x12; val_offset:105789*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105789*FLEN/8, x13, x9, x10)

inst_35285:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe8fe0000; valaddr_reg:x12; val_offset:105792*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105792*FLEN/8, x13, x9, x10)

inst_35286:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe880ffff; valaddr_reg:x12; val_offset:105795*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105795*FLEN/8, x13, x9, x10)

inst_35287:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe8ff0000; valaddr_reg:x12; val_offset:105798*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105798*FLEN/8, x13, x9, x10)

inst_35288:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe8807fff; valaddr_reg:x12; val_offset:105801*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105801*FLEN/8, x13, x9, x10)

inst_35289:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe8ff8000; valaddr_reg:x12; val_offset:105804*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105804*FLEN/8, x13, x9, x10)

inst_35290:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe8803fff; valaddr_reg:x12; val_offset:105807*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105807*FLEN/8, x13, x9, x10)

inst_35291:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe8ffc000; valaddr_reg:x12; val_offset:105810*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105810*FLEN/8, x13, x9, x10)

inst_35292:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe8801fff; valaddr_reg:x12; val_offset:105813*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105813*FLEN/8, x13, x9, x10)

inst_35293:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe8ffe000; valaddr_reg:x12; val_offset:105816*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105816*FLEN/8, x13, x9, x10)

inst_35294:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe8800fff; valaddr_reg:x12; val_offset:105819*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105819*FLEN/8, x13, x9, x10)

inst_35295:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe8fff000; valaddr_reg:x12; val_offset:105822*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105822*FLEN/8, x13, x9, x10)

inst_35296:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe88007ff; valaddr_reg:x12; val_offset:105825*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105825*FLEN/8, x13, x9, x10)

inst_35297:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe8fff800; valaddr_reg:x12; val_offset:105828*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105828*FLEN/8, x13, x9, x10)

inst_35298:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe88003ff; valaddr_reg:x12; val_offset:105831*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105831*FLEN/8, x13, x9, x10)

inst_35299:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe8fffc00; valaddr_reg:x12; val_offset:105834*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105834*FLEN/8, x13, x9, x10)

inst_35300:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe88001ff; valaddr_reg:x12; val_offset:105837*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105837*FLEN/8, x13, x9, x10)

inst_35301:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe8fffe00; valaddr_reg:x12; val_offset:105840*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105840*FLEN/8, x13, x9, x10)

inst_35302:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe88000ff; valaddr_reg:x12; val_offset:105843*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105843*FLEN/8, x13, x9, x10)

inst_35303:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe8ffff00; valaddr_reg:x12; val_offset:105846*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105846*FLEN/8, x13, x9, x10)

inst_35304:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe880007f; valaddr_reg:x12; val_offset:105849*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105849*FLEN/8, x13, x9, x10)

inst_35305:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe8ffff80; valaddr_reg:x12; val_offset:105852*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105852*FLEN/8, x13, x9, x10)

inst_35306:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe880003f; valaddr_reg:x12; val_offset:105855*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105855*FLEN/8, x13, x9, x10)

inst_35307:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe8ffffc0; valaddr_reg:x12; val_offset:105858*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105858*FLEN/8, x13, x9, x10)

inst_35308:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe880001f; valaddr_reg:x12; val_offset:105861*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105861*FLEN/8, x13, x9, x10)

inst_35309:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe8ffffe0; valaddr_reg:x12; val_offset:105864*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105864*FLEN/8, x13, x9, x10)

inst_35310:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe880000f; valaddr_reg:x12; val_offset:105867*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105867*FLEN/8, x13, x9, x10)

inst_35311:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe8fffff0; valaddr_reg:x12; val_offset:105870*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105870*FLEN/8, x13, x9, x10)

inst_35312:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe8800007; valaddr_reg:x12; val_offset:105873*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105873*FLEN/8, x13, x9, x10)

inst_35313:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe8fffff8; valaddr_reg:x12; val_offset:105876*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105876*FLEN/8, x13, x9, x10)

inst_35314:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe8800003; valaddr_reg:x12; val_offset:105879*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105879*FLEN/8, x13, x9, x10)

inst_35315:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe8fffffc; valaddr_reg:x12; val_offset:105882*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105882*FLEN/8, x13, x9, x10)

inst_35316:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe8800001; valaddr_reg:x12; val_offset:105885*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105885*FLEN/8, x13, x9, x10)

inst_35317:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xe8fffffe; valaddr_reg:x12; val_offset:105888*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105888*FLEN/8, x13, x9, x10)

inst_35318:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xff7ffff8; valaddr_reg:x12; val_offset:105891*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105891*FLEN/8, x13, x9, x10)

inst_35319:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xff000007; valaddr_reg:x12; val_offset:105894*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105894*FLEN/8, x13, x9, x10)

inst_35320:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xff7ffffc; valaddr_reg:x12; val_offset:105897*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105897*FLEN/8, x13, x9, x10)

inst_35321:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xff000003; valaddr_reg:x12; val_offset:105900*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105900*FLEN/8, x13, x9, x10)

inst_35322:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xff7ffffe; valaddr_reg:x12; val_offset:105903*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105903*FLEN/8, x13, x9, x10)

inst_35323:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xff000001; valaddr_reg:x12; val_offset:105906*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105906*FLEN/8, x13, x9, x10)

inst_35324:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xff36db6d; valaddr_reg:x12; val_offset:105909*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105909*FLEN/8, x13, x9, x10)

inst_35325:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xff6db6db; valaddr_reg:x12; val_offset:105912*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105912*FLEN/8, x13, x9, x10)

inst_35326:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xff199999; valaddr_reg:x12; val_offset:105915*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105915*FLEN/8, x13, x9, x10)

inst_35327:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xff666666; valaddr_reg:x12; val_offset:105918*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105918*FLEN/8, x13, x9, x10)

inst_35328:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xff3bbbbb; valaddr_reg:x12; val_offset:105921*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105921*FLEN/8, x13, x9, x10)

inst_35329:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xff444444; valaddr_reg:x12; val_offset:105924*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105924*FLEN/8, x13, x9, x10)

inst_35330:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xff249249; valaddr_reg:x12; val_offset:105927*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105927*FLEN/8, x13, x9, x10)

inst_35331:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xff5b6db6; valaddr_reg:x12; val_offset:105930*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105930*FLEN/8, x13, x9, x10)

inst_35332:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xff333333; valaddr_reg:x12; val_offset:105933*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105933*FLEN/8, x13, x9, x10)

inst_35333:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4b97b; op2val:0xc005e5c0;
op3val:0xff4ccccc; valaddr_reg:x12; val_offset:105936*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105936*FLEN/8, x13, x9, x10)

inst_35334:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe97fffff; valaddr_reg:x12; val_offset:105939*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105939*FLEN/8, x13, x9, x10)

inst_35335:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe9000000; valaddr_reg:x12; val_offset:105942*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105942*FLEN/8, x13, x9, x10)

inst_35336:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe93fffff; valaddr_reg:x12; val_offset:105945*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105945*FLEN/8, x13, x9, x10)

inst_35337:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe9400000; valaddr_reg:x12; val_offset:105948*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105948*FLEN/8, x13, x9, x10)

inst_35338:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe91fffff; valaddr_reg:x12; val_offset:105951*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105951*FLEN/8, x13, x9, x10)

inst_35339:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe9600000; valaddr_reg:x12; val_offset:105954*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105954*FLEN/8, x13, x9, x10)

inst_35340:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe90fffff; valaddr_reg:x12; val_offset:105957*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105957*FLEN/8, x13, x9, x10)

inst_35341:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe9700000; valaddr_reg:x12; val_offset:105960*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105960*FLEN/8, x13, x9, x10)

inst_35342:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe907ffff; valaddr_reg:x12; val_offset:105963*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105963*FLEN/8, x13, x9, x10)

inst_35343:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe9780000; valaddr_reg:x12; val_offset:105966*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105966*FLEN/8, x13, x9, x10)

inst_35344:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe903ffff; valaddr_reg:x12; val_offset:105969*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105969*FLEN/8, x13, x9, x10)

inst_35345:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe97c0000; valaddr_reg:x12; val_offset:105972*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105972*FLEN/8, x13, x9, x10)

inst_35346:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe901ffff; valaddr_reg:x12; val_offset:105975*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105975*FLEN/8, x13, x9, x10)

inst_35347:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe97e0000; valaddr_reg:x12; val_offset:105978*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105978*FLEN/8, x13, x9, x10)

inst_35348:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe900ffff; valaddr_reg:x12; val_offset:105981*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105981*FLEN/8, x13, x9, x10)

inst_35349:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe97f0000; valaddr_reg:x12; val_offset:105984*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105984*FLEN/8, x13, x9, x10)

inst_35350:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe9007fff; valaddr_reg:x12; val_offset:105987*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105987*FLEN/8, x13, x9, x10)

inst_35351:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe97f8000; valaddr_reg:x12; val_offset:105990*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105990*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_276)
inst_35352:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe9003fff; valaddr_reg:x12; val_offset:105993*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105993*FLEN/8, x13, x9, x10)

inst_35353:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe97fc000; valaddr_reg:x12; val_offset:105996*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105996*FLEN/8, x13, x9, x10)

inst_35354:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe9001fff; valaddr_reg:x12; val_offset:105999*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105999*FLEN/8, x13, x9, x10)

inst_35355:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe97fe000; valaddr_reg:x12; val_offset:106002*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106002*FLEN/8, x13, x9, x10)

inst_35356:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe9000fff; valaddr_reg:x12; val_offset:106005*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106005*FLEN/8, x13, x9, x10)

inst_35357:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe97ff000; valaddr_reg:x12; val_offset:106008*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106008*FLEN/8, x13, x9, x10)

inst_35358:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe90007ff; valaddr_reg:x12; val_offset:106011*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106011*FLEN/8, x13, x9, x10)

inst_35359:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe97ff800; valaddr_reg:x12; val_offset:106014*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106014*FLEN/8, x13, x9, x10)

inst_35360:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe90003ff; valaddr_reg:x12; val_offset:106017*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106017*FLEN/8, x13, x9, x10)

inst_35361:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe97ffc00; valaddr_reg:x12; val_offset:106020*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106020*FLEN/8, x13, x9, x10)

inst_35362:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe90001ff; valaddr_reg:x12; val_offset:106023*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106023*FLEN/8, x13, x9, x10)

inst_35363:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe97ffe00; valaddr_reg:x12; val_offset:106026*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106026*FLEN/8, x13, x9, x10)

inst_35364:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe90000ff; valaddr_reg:x12; val_offset:106029*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106029*FLEN/8, x13, x9, x10)

inst_35365:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe97fff00; valaddr_reg:x12; val_offset:106032*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106032*FLEN/8, x13, x9, x10)

inst_35366:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe900007f; valaddr_reg:x12; val_offset:106035*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106035*FLEN/8, x13, x9, x10)

inst_35367:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe97fff80; valaddr_reg:x12; val_offset:106038*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106038*FLEN/8, x13, x9, x10)

inst_35368:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe900003f; valaddr_reg:x12; val_offset:106041*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106041*FLEN/8, x13, x9, x10)

inst_35369:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe97fffc0; valaddr_reg:x12; val_offset:106044*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106044*FLEN/8, x13, x9, x10)

inst_35370:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe900001f; valaddr_reg:x12; val_offset:106047*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106047*FLEN/8, x13, x9, x10)

inst_35371:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe97fffe0; valaddr_reg:x12; val_offset:106050*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106050*FLEN/8, x13, x9, x10)

inst_35372:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe900000f; valaddr_reg:x12; val_offset:106053*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106053*FLEN/8, x13, x9, x10)

inst_35373:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe97ffff0; valaddr_reg:x12; val_offset:106056*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106056*FLEN/8, x13, x9, x10)

inst_35374:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe9000007; valaddr_reg:x12; val_offset:106059*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106059*FLEN/8, x13, x9, x10)

inst_35375:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe97ffff8; valaddr_reg:x12; val_offset:106062*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106062*FLEN/8, x13, x9, x10)

inst_35376:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe9000003; valaddr_reg:x12; val_offset:106065*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106065*FLEN/8, x13, x9, x10)

inst_35377:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe97ffffc; valaddr_reg:x12; val_offset:106068*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106068*FLEN/8, x13, x9, x10)

inst_35378:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe9000001; valaddr_reg:x12; val_offset:106071*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106071*FLEN/8, x13, x9, x10)

inst_35379:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xe97ffffe; valaddr_reg:x12; val_offset:106074*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106074*FLEN/8, x13, x9, x10)

inst_35380:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xff7ffff8; valaddr_reg:x12; val_offset:106077*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106077*FLEN/8, x13, x9, x10)

inst_35381:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xff000007; valaddr_reg:x12; val_offset:106080*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106080*FLEN/8, x13, x9, x10)

inst_35382:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xff7ffffc; valaddr_reg:x12; val_offset:106083*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106083*FLEN/8, x13, x9, x10)

inst_35383:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xff000003; valaddr_reg:x12; val_offset:106086*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106086*FLEN/8, x13, x9, x10)

inst_35384:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xff7ffffe; valaddr_reg:x12; val_offset:106089*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106089*FLEN/8, x13, x9, x10)

inst_35385:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xff000001; valaddr_reg:x12; val_offset:106092*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106092*FLEN/8, x13, x9, x10)

inst_35386:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xff36db6d; valaddr_reg:x12; val_offset:106095*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106095*FLEN/8, x13, x9, x10)

inst_35387:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xff6db6db; valaddr_reg:x12; val_offset:106098*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106098*FLEN/8, x13, x9, x10)

inst_35388:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xff199999; valaddr_reg:x12; val_offset:106101*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106101*FLEN/8, x13, x9, x10)

inst_35389:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xff666666; valaddr_reg:x12; val_offset:106104*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106104*FLEN/8, x13, x9, x10)

inst_35390:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xff3bbbbb; valaddr_reg:x12; val_offset:106107*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106107*FLEN/8, x13, x9, x10)

inst_35391:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xff444444; valaddr_reg:x12; val_offset:106110*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106110*FLEN/8, x13, x9, x10)

inst_35392:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xff249249; valaddr_reg:x12; val_offset:106113*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106113*FLEN/8, x13, x9, x10)

inst_35393:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xff5b6db6; valaddr_reg:x12; val_offset:106116*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106116*FLEN/8, x13, x9, x10)

inst_35394:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xff333333; valaddr_reg:x12; val_offset:106119*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106119*FLEN/8, x13, x9, x10)

inst_35395:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb99523; op2val:0xc030917b;
op3val:0xff4ccccc; valaddr_reg:x12; val_offset:106122*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106122*FLEN/8, x13, x9, x10)

inst_35396:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe9ffffff; valaddr_reg:x12; val_offset:106125*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106125*FLEN/8, x13, x9, x10)

inst_35397:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe9800000; valaddr_reg:x12; val_offset:106128*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106128*FLEN/8, x13, x9, x10)

inst_35398:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe9bfffff; valaddr_reg:x12; val_offset:106131*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106131*FLEN/8, x13, x9, x10)

inst_35399:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe9c00000; valaddr_reg:x12; val_offset:106134*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106134*FLEN/8, x13, x9, x10)

inst_35400:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe99fffff; valaddr_reg:x12; val_offset:106137*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106137*FLEN/8, x13, x9, x10)

inst_35401:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe9e00000; valaddr_reg:x12; val_offset:106140*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106140*FLEN/8, x13, x9, x10)

inst_35402:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe98fffff; valaddr_reg:x12; val_offset:106143*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106143*FLEN/8, x13, x9, x10)

inst_35403:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe9f00000; valaddr_reg:x12; val_offset:106146*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106146*FLEN/8, x13, x9, x10)

inst_35404:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe987ffff; valaddr_reg:x12; val_offset:106149*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106149*FLEN/8, x13, x9, x10)

inst_35405:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe9f80000; valaddr_reg:x12; val_offset:106152*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106152*FLEN/8, x13, x9, x10)

inst_35406:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe983ffff; valaddr_reg:x12; val_offset:106155*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106155*FLEN/8, x13, x9, x10)

inst_35407:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe9fc0000; valaddr_reg:x12; val_offset:106158*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106158*FLEN/8, x13, x9, x10)

inst_35408:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe981ffff; valaddr_reg:x12; val_offset:106161*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106161*FLEN/8, x13, x9, x10)

inst_35409:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe9fe0000; valaddr_reg:x12; val_offset:106164*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106164*FLEN/8, x13, x9, x10)

inst_35410:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe980ffff; valaddr_reg:x12; val_offset:106167*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106167*FLEN/8, x13, x9, x10)

inst_35411:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe9ff0000; valaddr_reg:x12; val_offset:106170*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106170*FLEN/8, x13, x9, x10)

inst_35412:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe9807fff; valaddr_reg:x12; val_offset:106173*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106173*FLEN/8, x13, x9, x10)

inst_35413:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe9ff8000; valaddr_reg:x12; val_offset:106176*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106176*FLEN/8, x13, x9, x10)

inst_35414:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe9803fff; valaddr_reg:x12; val_offset:106179*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106179*FLEN/8, x13, x9, x10)

inst_35415:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe9ffc000; valaddr_reg:x12; val_offset:106182*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106182*FLEN/8, x13, x9, x10)

inst_35416:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe9801fff; valaddr_reg:x12; val_offset:106185*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106185*FLEN/8, x13, x9, x10)

inst_35417:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe9ffe000; valaddr_reg:x12; val_offset:106188*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106188*FLEN/8, x13, x9, x10)

inst_35418:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe9800fff; valaddr_reg:x12; val_offset:106191*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106191*FLEN/8, x13, x9, x10)

inst_35419:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe9fff000; valaddr_reg:x12; val_offset:106194*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106194*FLEN/8, x13, x9, x10)

inst_35420:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe98007ff; valaddr_reg:x12; val_offset:106197*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106197*FLEN/8, x13, x9, x10)

inst_35421:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe9fff800; valaddr_reg:x12; val_offset:106200*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106200*FLEN/8, x13, x9, x10)

inst_35422:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe98003ff; valaddr_reg:x12; val_offset:106203*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106203*FLEN/8, x13, x9, x10)

inst_35423:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe9fffc00; valaddr_reg:x12; val_offset:106206*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106206*FLEN/8, x13, x9, x10)

inst_35424:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe98001ff; valaddr_reg:x12; val_offset:106209*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106209*FLEN/8, x13, x9, x10)

inst_35425:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe9fffe00; valaddr_reg:x12; val_offset:106212*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106212*FLEN/8, x13, x9, x10)

inst_35426:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe98000ff; valaddr_reg:x12; val_offset:106215*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106215*FLEN/8, x13, x9, x10)

inst_35427:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe9ffff00; valaddr_reg:x12; val_offset:106218*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106218*FLEN/8, x13, x9, x10)

inst_35428:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe980007f; valaddr_reg:x12; val_offset:106221*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106221*FLEN/8, x13, x9, x10)

inst_35429:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe9ffff80; valaddr_reg:x12; val_offset:106224*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106224*FLEN/8, x13, x9, x10)

inst_35430:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe980003f; valaddr_reg:x12; val_offset:106227*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106227*FLEN/8, x13, x9, x10)

inst_35431:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe9ffffc0; valaddr_reg:x12; val_offset:106230*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106230*FLEN/8, x13, x9, x10)

inst_35432:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe980001f; valaddr_reg:x12; val_offset:106233*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106233*FLEN/8, x13, x9, x10)

inst_35433:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe9ffffe0; valaddr_reg:x12; val_offset:106236*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106236*FLEN/8, x13, x9, x10)

inst_35434:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe980000f; valaddr_reg:x12; val_offset:106239*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106239*FLEN/8, x13, x9, x10)

inst_35435:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe9fffff0; valaddr_reg:x12; val_offset:106242*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106242*FLEN/8, x13, x9, x10)

inst_35436:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe9800007; valaddr_reg:x12; val_offset:106245*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106245*FLEN/8, x13, x9, x10)

inst_35437:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe9fffff8; valaddr_reg:x12; val_offset:106248*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106248*FLEN/8, x13, x9, x10)

inst_35438:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe9800003; valaddr_reg:x12; val_offset:106251*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106251*FLEN/8, x13, x9, x10)

inst_35439:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe9fffffc; valaddr_reg:x12; val_offset:106254*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106254*FLEN/8, x13, x9, x10)

inst_35440:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe9800001; valaddr_reg:x12; val_offset:106257*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106257*FLEN/8, x13, x9, x10)

inst_35441:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xe9fffffe; valaddr_reg:x12; val_offset:106260*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106260*FLEN/8, x13, x9, x10)

inst_35442:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xff7ffff8; valaddr_reg:x12; val_offset:106263*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106263*FLEN/8, x13, x9, x10)

inst_35443:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xff000007; valaddr_reg:x12; val_offset:106266*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106266*FLEN/8, x13, x9, x10)

inst_35444:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xff7ffffc; valaddr_reg:x12; val_offset:106269*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106269*FLEN/8, x13, x9, x10)

inst_35445:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xff000003; valaddr_reg:x12; val_offset:106272*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106272*FLEN/8, x13, x9, x10)

inst_35446:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xff7ffffe; valaddr_reg:x12; val_offset:106275*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106275*FLEN/8, x13, x9, x10)

inst_35447:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xff000001; valaddr_reg:x12; val_offset:106278*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106278*FLEN/8, x13, x9, x10)

inst_35448:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xff36db6d; valaddr_reg:x12; val_offset:106281*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106281*FLEN/8, x13, x9, x10)

inst_35449:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xff6db6db; valaddr_reg:x12; val_offset:106284*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106284*FLEN/8, x13, x9, x10)

inst_35450:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xff199999; valaddr_reg:x12; val_offset:106287*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106287*FLEN/8, x13, x9, x10)

inst_35451:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xff666666; valaddr_reg:x12; val_offset:106290*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106290*FLEN/8, x13, x9, x10)

inst_35452:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xff3bbbbb; valaddr_reg:x12; val_offset:106293*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106293*FLEN/8, x13, x9, x10)

inst_35453:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xff444444; valaddr_reg:x12; val_offset:106296*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106296*FLEN/8, x13, x9, x10)

inst_35454:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xff249249; valaddr_reg:x12; val_offset:106299*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106299*FLEN/8, x13, x9, x10)

inst_35455:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xff5b6db6; valaddr_reg:x12; val_offset:106302*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106302*FLEN/8, x13, x9, x10)

inst_35456:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xff333333; valaddr_reg:x12; val_offset:106305*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106305*FLEN/8, x13, x9, x10)

inst_35457:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0xc0d18529;
op3val:0xff4ccccc; valaddr_reg:x12; val_offset:106308*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106308*FLEN/8, x13, x9, x10)

inst_35458:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea7fffff; valaddr_reg:x12; val_offset:106311*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106311*FLEN/8, x13, x9, x10)

inst_35459:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea000000; valaddr_reg:x12; val_offset:106314*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106314*FLEN/8, x13, x9, x10)

inst_35460:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea3fffff; valaddr_reg:x12; val_offset:106317*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106317*FLEN/8, x13, x9, x10)

inst_35461:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea400000; valaddr_reg:x12; val_offset:106320*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106320*FLEN/8, x13, x9, x10)

inst_35462:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea1fffff; valaddr_reg:x12; val_offset:106323*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106323*FLEN/8, x13, x9, x10)

inst_35463:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea600000; valaddr_reg:x12; val_offset:106326*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106326*FLEN/8, x13, x9, x10)

inst_35464:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea0fffff; valaddr_reg:x12; val_offset:106329*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106329*FLEN/8, x13, x9, x10)

inst_35465:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea700000; valaddr_reg:x12; val_offset:106332*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106332*FLEN/8, x13, x9, x10)

inst_35466:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea07ffff; valaddr_reg:x12; val_offset:106335*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106335*FLEN/8, x13, x9, x10)

inst_35467:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea780000; valaddr_reg:x12; val_offset:106338*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106338*FLEN/8, x13, x9, x10)

inst_35468:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea03ffff; valaddr_reg:x12; val_offset:106341*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106341*FLEN/8, x13, x9, x10)

inst_35469:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea7c0000; valaddr_reg:x12; val_offset:106344*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106344*FLEN/8, x13, x9, x10)

inst_35470:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea01ffff; valaddr_reg:x12; val_offset:106347*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106347*FLEN/8, x13, x9, x10)

inst_35471:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea7e0000; valaddr_reg:x12; val_offset:106350*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106350*FLEN/8, x13, x9, x10)

inst_35472:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea00ffff; valaddr_reg:x12; val_offset:106353*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106353*FLEN/8, x13, x9, x10)

inst_35473:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea7f0000; valaddr_reg:x12; val_offset:106356*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106356*FLEN/8, x13, x9, x10)

inst_35474:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea007fff; valaddr_reg:x12; val_offset:106359*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106359*FLEN/8, x13, x9, x10)

inst_35475:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea7f8000; valaddr_reg:x12; val_offset:106362*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106362*FLEN/8, x13, x9, x10)

inst_35476:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea003fff; valaddr_reg:x12; val_offset:106365*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106365*FLEN/8, x13, x9, x10)

inst_35477:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea7fc000; valaddr_reg:x12; val_offset:106368*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106368*FLEN/8, x13, x9, x10)

inst_35478:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea001fff; valaddr_reg:x12; val_offset:106371*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106371*FLEN/8, x13, x9, x10)

inst_35479:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea7fe000; valaddr_reg:x12; val_offset:106374*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106374*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_277)
inst_35480:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea000fff; valaddr_reg:x12; val_offset:106377*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106377*FLEN/8, x13, x9, x10)

inst_35481:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea7ff000; valaddr_reg:x12; val_offset:106380*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106380*FLEN/8, x13, x9, x10)

inst_35482:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea0007ff; valaddr_reg:x12; val_offset:106383*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106383*FLEN/8, x13, x9, x10)

inst_35483:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea7ff800; valaddr_reg:x12; val_offset:106386*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106386*FLEN/8, x13, x9, x10)

inst_35484:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea0003ff; valaddr_reg:x12; val_offset:106389*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106389*FLEN/8, x13, x9, x10)

inst_35485:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea7ffc00; valaddr_reg:x12; val_offset:106392*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106392*FLEN/8, x13, x9, x10)

inst_35486:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea0001ff; valaddr_reg:x12; val_offset:106395*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106395*FLEN/8, x13, x9, x10)

inst_35487:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea7ffe00; valaddr_reg:x12; val_offset:106398*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106398*FLEN/8, x13, x9, x10)

inst_35488:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea0000ff; valaddr_reg:x12; val_offset:106401*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106401*FLEN/8, x13, x9, x10)

inst_35489:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea7fff00; valaddr_reg:x12; val_offset:106404*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106404*FLEN/8, x13, x9, x10)

inst_35490:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea00007f; valaddr_reg:x12; val_offset:106407*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106407*FLEN/8, x13, x9, x10)

inst_35491:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea7fff80; valaddr_reg:x12; val_offset:106410*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106410*FLEN/8, x13, x9, x10)

inst_35492:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea00003f; valaddr_reg:x12; val_offset:106413*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106413*FLEN/8, x13, x9, x10)

inst_35493:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea7fffc0; valaddr_reg:x12; val_offset:106416*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106416*FLEN/8, x13, x9, x10)

inst_35494:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea00001f; valaddr_reg:x12; val_offset:106419*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106419*FLEN/8, x13, x9, x10)

inst_35495:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea7fffe0; valaddr_reg:x12; val_offset:106422*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106422*FLEN/8, x13, x9, x10)

inst_35496:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea00000f; valaddr_reg:x12; val_offset:106425*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106425*FLEN/8, x13, x9, x10)

inst_35497:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea7ffff0; valaddr_reg:x12; val_offset:106428*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106428*FLEN/8, x13, x9, x10)

inst_35498:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea000007; valaddr_reg:x12; val_offset:106431*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106431*FLEN/8, x13, x9, x10)

inst_35499:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea7ffff8; valaddr_reg:x12; val_offset:106434*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106434*FLEN/8, x13, x9, x10)

inst_35500:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea000003; valaddr_reg:x12; val_offset:106437*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106437*FLEN/8, x13, x9, x10)

inst_35501:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea7ffffc; valaddr_reg:x12; val_offset:106440*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106440*FLEN/8, x13, x9, x10)

inst_35502:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea000001; valaddr_reg:x12; val_offset:106443*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106443*FLEN/8, x13, x9, x10)

inst_35503:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xea7ffffe; valaddr_reg:x12; val_offset:106446*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106446*FLEN/8, x13, x9, x10)

inst_35504:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xff7ffff8; valaddr_reg:x12; val_offset:106449*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106449*FLEN/8, x13, x9, x10)

inst_35505:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xff000007; valaddr_reg:x12; val_offset:106452*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106452*FLEN/8, x13, x9, x10)

inst_35506:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xff7ffffc; valaddr_reg:x12; val_offset:106455*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106455*FLEN/8, x13, x9, x10)

inst_35507:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xff000003; valaddr_reg:x12; val_offset:106458*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106458*FLEN/8, x13, x9, x10)

inst_35508:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xff7ffffe; valaddr_reg:x12; val_offset:106461*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106461*FLEN/8, x13, x9, x10)

inst_35509:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xff000001; valaddr_reg:x12; val_offset:106464*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106464*FLEN/8, x13, x9, x10)

inst_35510:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xff36db6d; valaddr_reg:x12; val_offset:106467*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106467*FLEN/8, x13, x9, x10)

inst_35511:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xff6db6db; valaddr_reg:x12; val_offset:106470*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106470*FLEN/8, x13, x9, x10)

inst_35512:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xff199999; valaddr_reg:x12; val_offset:106473*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106473*FLEN/8, x13, x9, x10)

inst_35513:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xff666666; valaddr_reg:x12; val_offset:106476*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106476*FLEN/8, x13, x9, x10)

inst_35514:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xff3bbbbb; valaddr_reg:x12; val_offset:106479*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106479*FLEN/8, x13, x9, x10)

inst_35515:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xff444444; valaddr_reg:x12; val_offset:106482*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106482*FLEN/8, x13, x9, x10)

inst_35516:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xff249249; valaddr_reg:x12; val_offset:106485*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106485*FLEN/8, x13, x9, x10)

inst_35517:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xff5b6db6; valaddr_reg:x12; val_offset:106488*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106488*FLEN/8, x13, x9, x10)

inst_35518:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xff333333; valaddr_reg:x12; val_offset:106491*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106491*FLEN/8, x13, x9, x10)

inst_35519:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab530a7; op2val:0xc434d948;
op3val:0xff4ccccc; valaddr_reg:x12; val_offset:106494*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106494*FLEN/8, x13, x9, x10)

inst_35520:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xeaffffff; valaddr_reg:x12; val_offset:106497*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106497*FLEN/8, x13, x9, x10)

inst_35521:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xea800000; valaddr_reg:x12; val_offset:106500*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106500*FLEN/8, x13, x9, x10)

inst_35522:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xeabfffff; valaddr_reg:x12; val_offset:106503*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106503*FLEN/8, x13, x9, x10)

inst_35523:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xeac00000; valaddr_reg:x12; val_offset:106506*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106506*FLEN/8, x13, x9, x10)

inst_35524:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xea9fffff; valaddr_reg:x12; val_offset:106509*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106509*FLEN/8, x13, x9, x10)

inst_35525:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xeae00000; valaddr_reg:x12; val_offset:106512*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106512*FLEN/8, x13, x9, x10)

inst_35526:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xea8fffff; valaddr_reg:x12; val_offset:106515*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106515*FLEN/8, x13, x9, x10)

inst_35527:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xeaf00000; valaddr_reg:x12; val_offset:106518*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106518*FLEN/8, x13, x9, x10)

inst_35528:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xea87ffff; valaddr_reg:x12; val_offset:106521*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106521*FLEN/8, x13, x9, x10)

inst_35529:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xeaf80000; valaddr_reg:x12; val_offset:106524*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106524*FLEN/8, x13, x9, x10)

inst_35530:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xea83ffff; valaddr_reg:x12; val_offset:106527*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106527*FLEN/8, x13, x9, x10)

inst_35531:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xeafc0000; valaddr_reg:x12; val_offset:106530*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106530*FLEN/8, x13, x9, x10)

inst_35532:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xea81ffff; valaddr_reg:x12; val_offset:106533*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106533*FLEN/8, x13, x9, x10)

inst_35533:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xeafe0000; valaddr_reg:x12; val_offset:106536*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106536*FLEN/8, x13, x9, x10)

inst_35534:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xea80ffff; valaddr_reg:x12; val_offset:106539*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106539*FLEN/8, x13, x9, x10)

inst_35535:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xeaff0000; valaddr_reg:x12; val_offset:106542*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106542*FLEN/8, x13, x9, x10)

inst_35536:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xea807fff; valaddr_reg:x12; val_offset:106545*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106545*FLEN/8, x13, x9, x10)

inst_35537:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xeaff8000; valaddr_reg:x12; val_offset:106548*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106548*FLEN/8, x13, x9, x10)

inst_35538:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xea803fff; valaddr_reg:x12; val_offset:106551*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106551*FLEN/8, x13, x9, x10)

inst_35539:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xeaffc000; valaddr_reg:x12; val_offset:106554*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106554*FLEN/8, x13, x9, x10)

inst_35540:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xea801fff; valaddr_reg:x12; val_offset:106557*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106557*FLEN/8, x13, x9, x10)

inst_35541:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xeaffe000; valaddr_reg:x12; val_offset:106560*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106560*FLEN/8, x13, x9, x10)

inst_35542:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xea800fff; valaddr_reg:x12; val_offset:106563*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106563*FLEN/8, x13, x9, x10)

inst_35543:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xeafff000; valaddr_reg:x12; val_offset:106566*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106566*FLEN/8, x13, x9, x10)

inst_35544:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xea8007ff; valaddr_reg:x12; val_offset:106569*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106569*FLEN/8, x13, x9, x10)

inst_35545:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xeafff800; valaddr_reg:x12; val_offset:106572*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106572*FLEN/8, x13, x9, x10)

inst_35546:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xea8003ff; valaddr_reg:x12; val_offset:106575*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106575*FLEN/8, x13, x9, x10)

inst_35547:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xeafffc00; valaddr_reg:x12; val_offset:106578*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106578*FLEN/8, x13, x9, x10)

inst_35548:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xea8001ff; valaddr_reg:x12; val_offset:106581*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106581*FLEN/8, x13, x9, x10)

inst_35549:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xeafffe00; valaddr_reg:x12; val_offset:106584*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106584*FLEN/8, x13, x9, x10)

inst_35550:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xea8000ff; valaddr_reg:x12; val_offset:106587*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106587*FLEN/8, x13, x9, x10)

inst_35551:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xeaffff00; valaddr_reg:x12; val_offset:106590*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106590*FLEN/8, x13, x9, x10)

inst_35552:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xea80007f; valaddr_reg:x12; val_offset:106593*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106593*FLEN/8, x13, x9, x10)

inst_35553:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xeaffff80; valaddr_reg:x12; val_offset:106596*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106596*FLEN/8, x13, x9, x10)

inst_35554:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xea80003f; valaddr_reg:x12; val_offset:106599*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106599*FLEN/8, x13, x9, x10)

inst_35555:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xeaffffc0; valaddr_reg:x12; val_offset:106602*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106602*FLEN/8, x13, x9, x10)

inst_35556:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xea80001f; valaddr_reg:x12; val_offset:106605*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106605*FLEN/8, x13, x9, x10)

inst_35557:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xeaffffe0; valaddr_reg:x12; val_offset:106608*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106608*FLEN/8, x13, x9, x10)

inst_35558:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xea80000f; valaddr_reg:x12; val_offset:106611*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106611*FLEN/8, x13, x9, x10)

inst_35559:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xeafffff0; valaddr_reg:x12; val_offset:106614*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106614*FLEN/8, x13, x9, x10)

inst_35560:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xea800007; valaddr_reg:x12; val_offset:106617*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106617*FLEN/8, x13, x9, x10)

inst_35561:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xeafffff8; valaddr_reg:x12; val_offset:106620*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106620*FLEN/8, x13, x9, x10)

inst_35562:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xea800003; valaddr_reg:x12; val_offset:106623*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106623*FLEN/8, x13, x9, x10)

inst_35563:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xeafffffc; valaddr_reg:x12; val_offset:106626*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106626*FLEN/8, x13, x9, x10)

inst_35564:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xea800001; valaddr_reg:x12; val_offset:106629*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106629*FLEN/8, x13, x9, x10)

inst_35565:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xeafffffe; valaddr_reg:x12; val_offset:106632*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106632*FLEN/8, x13, x9, x10)

inst_35566:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xff7ffff8; valaddr_reg:x12; val_offset:106635*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106635*FLEN/8, x13, x9, x10)

inst_35567:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xff000007; valaddr_reg:x12; val_offset:106638*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106638*FLEN/8, x13, x9, x10)

inst_35568:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xff7ffffc; valaddr_reg:x12; val_offset:106641*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106641*FLEN/8, x13, x9, x10)

inst_35569:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xff000003; valaddr_reg:x12; val_offset:106644*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106644*FLEN/8, x13, x9, x10)

inst_35570:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xff7ffffe; valaddr_reg:x12; val_offset:106647*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106647*FLEN/8, x13, x9, x10)

inst_35571:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xff000001; valaddr_reg:x12; val_offset:106650*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106650*FLEN/8, x13, x9, x10)

inst_35572:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xff36db6d; valaddr_reg:x12; val_offset:106653*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106653*FLEN/8, x13, x9, x10)

inst_35573:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xff6db6db; valaddr_reg:x12; val_offset:106656*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106656*FLEN/8, x13, x9, x10)

inst_35574:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xff199999; valaddr_reg:x12; val_offset:106659*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106659*FLEN/8, x13, x9, x10)

inst_35575:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xff666666; valaddr_reg:x12; val_offset:106662*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106662*FLEN/8, x13, x9, x10)

inst_35576:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xff3bbbbb; valaddr_reg:x12; val_offset:106665*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106665*FLEN/8, x13, x9, x10)

inst_35577:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xff444444; valaddr_reg:x12; val_offset:106668*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106668*FLEN/8, x13, x9, x10)

inst_35578:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xff249249; valaddr_reg:x12; val_offset:106671*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106671*FLEN/8, x13, x9, x10)

inst_35579:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xff5b6db6; valaddr_reg:x12; val_offset:106674*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106674*FLEN/8, x13, x9, x10)

inst_35580:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xff333333; valaddr_reg:x12; val_offset:106677*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106677*FLEN/8, x13, x9, x10)

inst_35581:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0634d6; op2val:0xbff42945;
op3val:0xff4ccccc; valaddr_reg:x12; val_offset:106680*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106680*FLEN/8, x13, x9, x10)

inst_35582:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb7fffff; valaddr_reg:x12; val_offset:106683*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106683*FLEN/8, x13, x9, x10)

inst_35583:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb000000; valaddr_reg:x12; val_offset:106686*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106686*FLEN/8, x13, x9, x10)

inst_35584:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb3fffff; valaddr_reg:x12; val_offset:106689*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106689*FLEN/8, x13, x9, x10)

inst_35585:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb400000; valaddr_reg:x12; val_offset:106692*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106692*FLEN/8, x13, x9, x10)

inst_35586:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb1fffff; valaddr_reg:x12; val_offset:106695*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106695*FLEN/8, x13, x9, x10)

inst_35587:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb600000; valaddr_reg:x12; val_offset:106698*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106698*FLEN/8, x13, x9, x10)

inst_35588:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb0fffff; valaddr_reg:x12; val_offset:106701*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106701*FLEN/8, x13, x9, x10)

inst_35589:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb700000; valaddr_reg:x12; val_offset:106704*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106704*FLEN/8, x13, x9, x10)

inst_35590:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb07ffff; valaddr_reg:x12; val_offset:106707*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106707*FLEN/8, x13, x9, x10)

inst_35591:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb780000; valaddr_reg:x12; val_offset:106710*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106710*FLEN/8, x13, x9, x10)

inst_35592:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb03ffff; valaddr_reg:x12; val_offset:106713*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106713*FLEN/8, x13, x9, x10)

inst_35593:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb7c0000; valaddr_reg:x12; val_offset:106716*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106716*FLEN/8, x13, x9, x10)

inst_35594:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb01ffff; valaddr_reg:x12; val_offset:106719*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106719*FLEN/8, x13, x9, x10)

inst_35595:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb7e0000; valaddr_reg:x12; val_offset:106722*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106722*FLEN/8, x13, x9, x10)

inst_35596:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb00ffff; valaddr_reg:x12; val_offset:106725*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106725*FLEN/8, x13, x9, x10)

inst_35597:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb7f0000; valaddr_reg:x12; val_offset:106728*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106728*FLEN/8, x13, x9, x10)

inst_35598:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb007fff; valaddr_reg:x12; val_offset:106731*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106731*FLEN/8, x13, x9, x10)

inst_35599:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb7f8000; valaddr_reg:x12; val_offset:106734*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106734*FLEN/8, x13, x9, x10)

inst_35600:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb003fff; valaddr_reg:x12; val_offset:106737*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106737*FLEN/8, x13, x9, x10)

inst_35601:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb7fc000; valaddr_reg:x12; val_offset:106740*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106740*FLEN/8, x13, x9, x10)

inst_35602:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb001fff; valaddr_reg:x12; val_offset:106743*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106743*FLEN/8, x13, x9, x10)

inst_35603:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb7fe000; valaddr_reg:x12; val_offset:106746*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106746*FLEN/8, x13, x9, x10)

inst_35604:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb000fff; valaddr_reg:x12; val_offset:106749*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106749*FLEN/8, x13, x9, x10)

inst_35605:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb7ff000; valaddr_reg:x12; val_offset:106752*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106752*FLEN/8, x13, x9, x10)

inst_35606:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb0007ff; valaddr_reg:x12; val_offset:106755*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106755*FLEN/8, x13, x9, x10)

inst_35607:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb7ff800; valaddr_reg:x12; val_offset:106758*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106758*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_278)
inst_35608:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb0003ff; valaddr_reg:x12; val_offset:106761*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106761*FLEN/8, x13, x9, x10)

inst_35609:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb7ffc00; valaddr_reg:x12; val_offset:106764*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106764*FLEN/8, x13, x9, x10)

inst_35610:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb0001ff; valaddr_reg:x12; val_offset:106767*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106767*FLEN/8, x13, x9, x10)

inst_35611:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb7ffe00; valaddr_reg:x12; val_offset:106770*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106770*FLEN/8, x13, x9, x10)

inst_35612:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb0000ff; valaddr_reg:x12; val_offset:106773*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106773*FLEN/8, x13, x9, x10)

inst_35613:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb7fff00; valaddr_reg:x12; val_offset:106776*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106776*FLEN/8, x13, x9, x10)

inst_35614:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb00007f; valaddr_reg:x12; val_offset:106779*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106779*FLEN/8, x13, x9, x10)

inst_35615:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb7fff80; valaddr_reg:x12; val_offset:106782*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106782*FLEN/8, x13, x9, x10)

inst_35616:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb00003f; valaddr_reg:x12; val_offset:106785*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106785*FLEN/8, x13, x9, x10)

inst_35617:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb7fffc0; valaddr_reg:x12; val_offset:106788*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106788*FLEN/8, x13, x9, x10)

inst_35618:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb00001f; valaddr_reg:x12; val_offset:106791*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106791*FLEN/8, x13, x9, x10)

inst_35619:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb7fffe0; valaddr_reg:x12; val_offset:106794*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106794*FLEN/8, x13, x9, x10)

inst_35620:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb00000f; valaddr_reg:x12; val_offset:106797*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106797*FLEN/8, x13, x9, x10)

inst_35621:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb7ffff0; valaddr_reg:x12; val_offset:106800*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106800*FLEN/8, x13, x9, x10)

inst_35622:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb000007; valaddr_reg:x12; val_offset:106803*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106803*FLEN/8, x13, x9, x10)

inst_35623:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb7ffff8; valaddr_reg:x12; val_offset:106806*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106806*FLEN/8, x13, x9, x10)

inst_35624:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb000003; valaddr_reg:x12; val_offset:106809*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106809*FLEN/8, x13, x9, x10)

inst_35625:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb7ffffc; valaddr_reg:x12; val_offset:106812*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106812*FLEN/8, x13, x9, x10)

inst_35626:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb000001; valaddr_reg:x12; val_offset:106815*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106815*FLEN/8, x13, x9, x10)

inst_35627:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xeb7ffffe; valaddr_reg:x12; val_offset:106818*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106818*FLEN/8, x13, x9, x10)

inst_35628:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xff7ffff8; valaddr_reg:x12; val_offset:106821*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106821*FLEN/8, x13, x9, x10)

inst_35629:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xff000007; valaddr_reg:x12; val_offset:106824*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106824*FLEN/8, x13, x9, x10)

inst_35630:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xff7ffffc; valaddr_reg:x12; val_offset:106827*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106827*FLEN/8, x13, x9, x10)

inst_35631:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xff000003; valaddr_reg:x12; val_offset:106830*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106830*FLEN/8, x13, x9, x10)

inst_35632:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xff7ffffe; valaddr_reg:x12; val_offset:106833*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106833*FLEN/8, x13, x9, x10)

inst_35633:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xff000001; valaddr_reg:x12; val_offset:106836*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106836*FLEN/8, x13, x9, x10)

inst_35634:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xff36db6d; valaddr_reg:x12; val_offset:106839*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106839*FLEN/8, x13, x9, x10)

inst_35635:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xff6db6db; valaddr_reg:x12; val_offset:106842*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106842*FLEN/8, x13, x9, x10)

inst_35636:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xff199999; valaddr_reg:x12; val_offset:106845*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106845*FLEN/8, x13, x9, x10)

inst_35637:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xff666666; valaddr_reg:x12; val_offset:106848*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106848*FLEN/8, x13, x9, x10)

inst_35638:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xff3bbbbb; valaddr_reg:x12; val_offset:106851*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106851*FLEN/8, x13, x9, x10)

inst_35639:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xff444444; valaddr_reg:x12; val_offset:106854*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106854*FLEN/8, x13, x9, x10)

inst_35640:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xff249249; valaddr_reg:x12; val_offset:106857*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106857*FLEN/8, x13, x9, x10)

inst_35641:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xff5b6db6; valaddr_reg:x12; val_offset:106860*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106860*FLEN/8, x13, x9, x10)

inst_35642:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xff333333; valaddr_reg:x12; val_offset:106863*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106863*FLEN/8, x13, x9, x10)

inst_35643:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0xc009ea6a;
op3val:0xff4ccccc; valaddr_reg:x12; val_offset:106866*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106866*FLEN/8, x13, x9, x10)

inst_35644:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xebffffff; valaddr_reg:x12; val_offset:106869*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106869*FLEN/8, x13, x9, x10)

inst_35645:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xeb800000; valaddr_reg:x12; val_offset:106872*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106872*FLEN/8, x13, x9, x10)

inst_35646:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xebbfffff; valaddr_reg:x12; val_offset:106875*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106875*FLEN/8, x13, x9, x10)

inst_35647:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xebc00000; valaddr_reg:x12; val_offset:106878*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106878*FLEN/8, x13, x9, x10)

inst_35648:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xeb9fffff; valaddr_reg:x12; val_offset:106881*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106881*FLEN/8, x13, x9, x10)

inst_35649:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xebe00000; valaddr_reg:x12; val_offset:106884*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106884*FLEN/8, x13, x9, x10)

inst_35650:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xeb8fffff; valaddr_reg:x12; val_offset:106887*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106887*FLEN/8, x13, x9, x10)

inst_35651:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xebf00000; valaddr_reg:x12; val_offset:106890*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106890*FLEN/8, x13, x9, x10)

inst_35652:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xeb87ffff; valaddr_reg:x12; val_offset:106893*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106893*FLEN/8, x13, x9, x10)

inst_35653:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xebf80000; valaddr_reg:x12; val_offset:106896*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106896*FLEN/8, x13, x9, x10)

inst_35654:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xeb83ffff; valaddr_reg:x12; val_offset:106899*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106899*FLEN/8, x13, x9, x10)

inst_35655:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xebfc0000; valaddr_reg:x12; val_offset:106902*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106902*FLEN/8, x13, x9, x10)

inst_35656:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xeb81ffff; valaddr_reg:x12; val_offset:106905*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106905*FLEN/8, x13, x9, x10)

inst_35657:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xebfe0000; valaddr_reg:x12; val_offset:106908*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106908*FLEN/8, x13, x9, x10)

inst_35658:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xeb80ffff; valaddr_reg:x12; val_offset:106911*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106911*FLEN/8, x13, x9, x10)

inst_35659:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xebff0000; valaddr_reg:x12; val_offset:106914*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106914*FLEN/8, x13, x9, x10)

inst_35660:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xeb807fff; valaddr_reg:x12; val_offset:106917*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106917*FLEN/8, x13, x9, x10)

inst_35661:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xebff8000; valaddr_reg:x12; val_offset:106920*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106920*FLEN/8, x13, x9, x10)

inst_35662:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xeb803fff; valaddr_reg:x12; val_offset:106923*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106923*FLEN/8, x13, x9, x10)

inst_35663:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xebffc000; valaddr_reg:x12; val_offset:106926*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106926*FLEN/8, x13, x9, x10)

inst_35664:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xeb801fff; valaddr_reg:x12; val_offset:106929*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106929*FLEN/8, x13, x9, x10)

inst_35665:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xebffe000; valaddr_reg:x12; val_offset:106932*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106932*FLEN/8, x13, x9, x10)

inst_35666:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xeb800fff; valaddr_reg:x12; val_offset:106935*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106935*FLEN/8, x13, x9, x10)

inst_35667:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xebfff000; valaddr_reg:x12; val_offset:106938*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106938*FLEN/8, x13, x9, x10)

inst_35668:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xeb8007ff; valaddr_reg:x12; val_offset:106941*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106941*FLEN/8, x13, x9, x10)

inst_35669:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xebfff800; valaddr_reg:x12; val_offset:106944*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106944*FLEN/8, x13, x9, x10)

inst_35670:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xeb8003ff; valaddr_reg:x12; val_offset:106947*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106947*FLEN/8, x13, x9, x10)

inst_35671:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xebfffc00; valaddr_reg:x12; val_offset:106950*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106950*FLEN/8, x13, x9, x10)

inst_35672:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xeb8001ff; valaddr_reg:x12; val_offset:106953*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106953*FLEN/8, x13, x9, x10)

inst_35673:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xebfffe00; valaddr_reg:x12; val_offset:106956*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106956*FLEN/8, x13, x9, x10)

inst_35674:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xeb8000ff; valaddr_reg:x12; val_offset:106959*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106959*FLEN/8, x13, x9, x10)

inst_35675:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xebffff00; valaddr_reg:x12; val_offset:106962*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106962*FLEN/8, x13, x9, x10)

inst_35676:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xeb80007f; valaddr_reg:x12; val_offset:106965*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106965*FLEN/8, x13, x9, x10)

inst_35677:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xebffff80; valaddr_reg:x12; val_offset:106968*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106968*FLEN/8, x13, x9, x10)

inst_35678:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xeb80003f; valaddr_reg:x12; val_offset:106971*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106971*FLEN/8, x13, x9, x10)

inst_35679:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xebffffc0; valaddr_reg:x12; val_offset:106974*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106974*FLEN/8, x13, x9, x10)

inst_35680:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xeb80001f; valaddr_reg:x12; val_offset:106977*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106977*FLEN/8, x13, x9, x10)

inst_35681:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xebffffe0; valaddr_reg:x12; val_offset:106980*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106980*FLEN/8, x13, x9, x10)

inst_35682:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xeb80000f; valaddr_reg:x12; val_offset:106983*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106983*FLEN/8, x13, x9, x10)

inst_35683:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xebfffff0; valaddr_reg:x12; val_offset:106986*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106986*FLEN/8, x13, x9, x10)

inst_35684:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xeb800007; valaddr_reg:x12; val_offset:106989*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106989*FLEN/8, x13, x9, x10)

inst_35685:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xebfffff8; valaddr_reg:x12; val_offset:106992*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106992*FLEN/8, x13, x9, x10)

inst_35686:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xeb800003; valaddr_reg:x12; val_offset:106995*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106995*FLEN/8, x13, x9, x10)

inst_35687:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xebfffffc; valaddr_reg:x12; val_offset:106998*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 106998*FLEN/8, x13, x9, x10)

inst_35688:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xeb800001; valaddr_reg:x12; val_offset:107001*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107001*FLEN/8, x13, x9, x10)

inst_35689:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xebfffffe; valaddr_reg:x12; val_offset:107004*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107004*FLEN/8, x13, x9, x10)

inst_35690:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xff7ffff8; valaddr_reg:x12; val_offset:107007*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107007*FLEN/8, x13, x9, x10)

inst_35691:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xff000007; valaddr_reg:x12; val_offset:107010*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107010*FLEN/8, x13, x9, x10)

inst_35692:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xff7ffffc; valaddr_reg:x12; val_offset:107013*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107013*FLEN/8, x13, x9, x10)

inst_35693:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xff000003; valaddr_reg:x12; val_offset:107016*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107016*FLEN/8, x13, x9, x10)

inst_35694:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xff7ffffe; valaddr_reg:x12; val_offset:107019*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107019*FLEN/8, x13, x9, x10)

inst_35695:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xff000001; valaddr_reg:x12; val_offset:107022*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107022*FLEN/8, x13, x9, x10)

inst_35696:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xff36db6d; valaddr_reg:x12; val_offset:107025*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107025*FLEN/8, x13, x9, x10)

inst_35697:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xff6db6db; valaddr_reg:x12; val_offset:107028*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107028*FLEN/8, x13, x9, x10)

inst_35698:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xff199999; valaddr_reg:x12; val_offset:107031*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107031*FLEN/8, x13, x9, x10)

inst_35699:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xff666666; valaddr_reg:x12; val_offset:107034*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107034*FLEN/8, x13, x9, x10)

inst_35700:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xff3bbbbb; valaddr_reg:x12; val_offset:107037*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107037*FLEN/8, x13, x9, x10)

inst_35701:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xff444444; valaddr_reg:x12; val_offset:107040*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107040*FLEN/8, x13, x9, x10)

inst_35702:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xff249249; valaddr_reg:x12; val_offset:107043*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107043*FLEN/8, x13, x9, x10)

inst_35703:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xff5b6db6; valaddr_reg:x12; val_offset:107046*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107046*FLEN/8, x13, x9, x10)

inst_35704:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xff333333; valaddr_reg:x12; val_offset:107049*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107049*FLEN/8, x13, x9, x10)

inst_35705:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bbf1e72; op2val:0xc32b7414;
op3val:0xff4ccccc; valaddr_reg:x12; val_offset:107052*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107052*FLEN/8, x13, x9, x10)

inst_35706:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec7fffff; valaddr_reg:x12; val_offset:107055*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107055*FLEN/8, x13, x9, x10)

inst_35707:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec000000; valaddr_reg:x12; val_offset:107058*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107058*FLEN/8, x13, x9, x10)

inst_35708:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec3fffff; valaddr_reg:x12; val_offset:107061*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107061*FLEN/8, x13, x9, x10)

inst_35709:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec400000; valaddr_reg:x12; val_offset:107064*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107064*FLEN/8, x13, x9, x10)

inst_35710:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec1fffff; valaddr_reg:x12; val_offset:107067*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107067*FLEN/8, x13, x9, x10)

inst_35711:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec600000; valaddr_reg:x12; val_offset:107070*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107070*FLEN/8, x13, x9, x10)

inst_35712:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec0fffff; valaddr_reg:x12; val_offset:107073*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107073*FLEN/8, x13, x9, x10)

inst_35713:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec700000; valaddr_reg:x12; val_offset:107076*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107076*FLEN/8, x13, x9, x10)

inst_35714:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec07ffff; valaddr_reg:x12; val_offset:107079*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107079*FLEN/8, x13, x9, x10)

inst_35715:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec780000; valaddr_reg:x12; val_offset:107082*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107082*FLEN/8, x13, x9, x10)

inst_35716:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec03ffff; valaddr_reg:x12; val_offset:107085*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107085*FLEN/8, x13, x9, x10)

inst_35717:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec7c0000; valaddr_reg:x12; val_offset:107088*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107088*FLEN/8, x13, x9, x10)

inst_35718:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec01ffff; valaddr_reg:x12; val_offset:107091*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107091*FLEN/8, x13, x9, x10)

inst_35719:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec7e0000; valaddr_reg:x12; val_offset:107094*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107094*FLEN/8, x13, x9, x10)

inst_35720:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec00ffff; valaddr_reg:x12; val_offset:107097*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107097*FLEN/8, x13, x9, x10)

inst_35721:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec7f0000; valaddr_reg:x12; val_offset:107100*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107100*FLEN/8, x13, x9, x10)

inst_35722:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec007fff; valaddr_reg:x12; val_offset:107103*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107103*FLEN/8, x13, x9, x10)

inst_35723:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec7f8000; valaddr_reg:x12; val_offset:107106*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107106*FLEN/8, x13, x9, x10)

inst_35724:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec003fff; valaddr_reg:x12; val_offset:107109*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107109*FLEN/8, x13, x9, x10)

inst_35725:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec7fc000; valaddr_reg:x12; val_offset:107112*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107112*FLEN/8, x13, x9, x10)

inst_35726:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec001fff; valaddr_reg:x12; val_offset:107115*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107115*FLEN/8, x13, x9, x10)

inst_35727:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec7fe000; valaddr_reg:x12; val_offset:107118*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107118*FLEN/8, x13, x9, x10)

inst_35728:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec000fff; valaddr_reg:x12; val_offset:107121*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107121*FLEN/8, x13, x9, x10)

inst_35729:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec7ff000; valaddr_reg:x12; val_offset:107124*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107124*FLEN/8, x13, x9, x10)

inst_35730:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec0007ff; valaddr_reg:x12; val_offset:107127*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107127*FLEN/8, x13, x9, x10)

inst_35731:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec7ff800; valaddr_reg:x12; val_offset:107130*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107130*FLEN/8, x13, x9, x10)

inst_35732:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec0003ff; valaddr_reg:x12; val_offset:107133*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107133*FLEN/8, x13, x9, x10)

inst_35733:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec7ffc00; valaddr_reg:x12; val_offset:107136*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107136*FLEN/8, x13, x9, x10)

inst_35734:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec0001ff; valaddr_reg:x12; val_offset:107139*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107139*FLEN/8, x13, x9, x10)

inst_35735:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec7ffe00; valaddr_reg:x12; val_offset:107142*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107142*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_279)
inst_35736:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec0000ff; valaddr_reg:x12; val_offset:107145*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107145*FLEN/8, x13, x9, x10)

inst_35737:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec7fff00; valaddr_reg:x12; val_offset:107148*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107148*FLEN/8, x13, x9, x10)

inst_35738:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec00007f; valaddr_reg:x12; val_offset:107151*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107151*FLEN/8, x13, x9, x10)

inst_35739:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec7fff80; valaddr_reg:x12; val_offset:107154*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107154*FLEN/8, x13, x9, x10)

inst_35740:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec00003f; valaddr_reg:x12; val_offset:107157*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107157*FLEN/8, x13, x9, x10)

inst_35741:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec7fffc0; valaddr_reg:x12; val_offset:107160*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107160*FLEN/8, x13, x9, x10)

inst_35742:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec00001f; valaddr_reg:x12; val_offset:107163*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107163*FLEN/8, x13, x9, x10)

inst_35743:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec7fffe0; valaddr_reg:x12; val_offset:107166*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107166*FLEN/8, x13, x9, x10)

inst_35744:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec00000f; valaddr_reg:x12; val_offset:107169*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107169*FLEN/8, x13, x9, x10)

inst_35745:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec7ffff0; valaddr_reg:x12; val_offset:107172*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107172*FLEN/8, x13, x9, x10)

inst_35746:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec000007; valaddr_reg:x12; val_offset:107175*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107175*FLEN/8, x13, x9, x10)

inst_35747:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec7ffff8; valaddr_reg:x12; val_offset:107178*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107178*FLEN/8, x13, x9, x10)

inst_35748:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec000003; valaddr_reg:x12; val_offset:107181*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107181*FLEN/8, x13, x9, x10)

inst_35749:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec7ffffc; valaddr_reg:x12; val_offset:107184*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107184*FLEN/8, x13, x9, x10)

inst_35750:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec000001; valaddr_reg:x12; val_offset:107187*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107187*FLEN/8, x13, x9, x10)

inst_35751:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xec7ffffe; valaddr_reg:x12; val_offset:107190*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107190*FLEN/8, x13, x9, x10)

inst_35752:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xff7ffff8; valaddr_reg:x12; val_offset:107193*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107193*FLEN/8, x13, x9, x10)

inst_35753:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xff000007; valaddr_reg:x12; val_offset:107196*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107196*FLEN/8, x13, x9, x10)

inst_35754:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xff7ffffc; valaddr_reg:x12; val_offset:107199*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107199*FLEN/8, x13, x9, x10)

inst_35755:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xff000003; valaddr_reg:x12; val_offset:107202*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107202*FLEN/8, x13, x9, x10)

inst_35756:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xff7ffffe; valaddr_reg:x12; val_offset:107205*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107205*FLEN/8, x13, x9, x10)

inst_35757:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xff000001; valaddr_reg:x12; val_offset:107208*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107208*FLEN/8, x13, x9, x10)

inst_35758:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xff36db6d; valaddr_reg:x12; val_offset:107211*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107211*FLEN/8, x13, x9, x10)

inst_35759:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xff6db6db; valaddr_reg:x12; val_offset:107214*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107214*FLEN/8, x13, x9, x10)

inst_35760:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xff199999; valaddr_reg:x12; val_offset:107217*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107217*FLEN/8, x13, x9, x10)

inst_35761:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xff666666; valaddr_reg:x12; val_offset:107220*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107220*FLEN/8, x13, x9, x10)

inst_35762:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xff3bbbbb; valaddr_reg:x12; val_offset:107223*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107223*FLEN/8, x13, x9, x10)

inst_35763:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xff444444; valaddr_reg:x12; val_offset:107226*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107226*FLEN/8, x13, x9, x10)

inst_35764:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xff249249; valaddr_reg:x12; val_offset:107229*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107229*FLEN/8, x13, x9, x10)

inst_35765:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xff5b6db6; valaddr_reg:x12; val_offset:107232*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107232*FLEN/8, x13, x9, x10)

inst_35766:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xff333333; valaddr_reg:x12; val_offset:107235*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107235*FLEN/8, x13, x9, x10)

inst_35767:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e654b4e; op2val:0xc08ee87a;
op3val:0xff4ccccc; valaddr_reg:x12; val_offset:107238*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107238*FLEN/8, x13, x9, x10)

inst_35768:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xecffffff; valaddr_reg:x12; val_offset:107241*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107241*FLEN/8, x13, x9, x10)

inst_35769:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xec800000; valaddr_reg:x12; val_offset:107244*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107244*FLEN/8, x13, x9, x10)

inst_35770:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xecbfffff; valaddr_reg:x12; val_offset:107247*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107247*FLEN/8, x13, x9, x10)

inst_35771:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xecc00000; valaddr_reg:x12; val_offset:107250*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107250*FLEN/8, x13, x9, x10)

inst_35772:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xec9fffff; valaddr_reg:x12; val_offset:107253*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107253*FLEN/8, x13, x9, x10)

inst_35773:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xece00000; valaddr_reg:x12; val_offset:107256*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107256*FLEN/8, x13, x9, x10)

inst_35774:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xec8fffff; valaddr_reg:x12; val_offset:107259*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107259*FLEN/8, x13, x9, x10)

inst_35775:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xecf00000; valaddr_reg:x12; val_offset:107262*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107262*FLEN/8, x13, x9, x10)

inst_35776:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xec87ffff; valaddr_reg:x12; val_offset:107265*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107265*FLEN/8, x13, x9, x10)

inst_35777:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xecf80000; valaddr_reg:x12; val_offset:107268*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107268*FLEN/8, x13, x9, x10)

inst_35778:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xec83ffff; valaddr_reg:x12; val_offset:107271*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107271*FLEN/8, x13, x9, x10)

inst_35779:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xecfc0000; valaddr_reg:x12; val_offset:107274*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107274*FLEN/8, x13, x9, x10)

inst_35780:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xec81ffff; valaddr_reg:x12; val_offset:107277*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107277*FLEN/8, x13, x9, x10)

inst_35781:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xecfe0000; valaddr_reg:x12; val_offset:107280*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107280*FLEN/8, x13, x9, x10)

inst_35782:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xec80ffff; valaddr_reg:x12; val_offset:107283*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107283*FLEN/8, x13, x9, x10)

inst_35783:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xecff0000; valaddr_reg:x12; val_offset:107286*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107286*FLEN/8, x13, x9, x10)

inst_35784:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xec807fff; valaddr_reg:x12; val_offset:107289*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107289*FLEN/8, x13, x9, x10)

inst_35785:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xecff8000; valaddr_reg:x12; val_offset:107292*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107292*FLEN/8, x13, x9, x10)

inst_35786:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xec803fff; valaddr_reg:x12; val_offset:107295*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107295*FLEN/8, x13, x9, x10)

inst_35787:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xecffc000; valaddr_reg:x12; val_offset:107298*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107298*FLEN/8, x13, x9, x10)

inst_35788:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xec801fff; valaddr_reg:x12; val_offset:107301*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107301*FLEN/8, x13, x9, x10)

inst_35789:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xecffe000; valaddr_reg:x12; val_offset:107304*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107304*FLEN/8, x13, x9, x10)

inst_35790:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xec800fff; valaddr_reg:x12; val_offset:107307*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107307*FLEN/8, x13, x9, x10)

inst_35791:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xecfff000; valaddr_reg:x12; val_offset:107310*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107310*FLEN/8, x13, x9, x10)

inst_35792:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xec8007ff; valaddr_reg:x12; val_offset:107313*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107313*FLEN/8, x13, x9, x10)

inst_35793:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xecfff800; valaddr_reg:x12; val_offset:107316*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107316*FLEN/8, x13, x9, x10)

inst_35794:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xec8003ff; valaddr_reg:x12; val_offset:107319*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107319*FLEN/8, x13, x9, x10)

inst_35795:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xecfffc00; valaddr_reg:x12; val_offset:107322*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107322*FLEN/8, x13, x9, x10)

inst_35796:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xec8001ff; valaddr_reg:x12; val_offset:107325*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107325*FLEN/8, x13, x9, x10)

inst_35797:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xecfffe00; valaddr_reg:x12; val_offset:107328*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107328*FLEN/8, x13, x9, x10)

inst_35798:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xec8000ff; valaddr_reg:x12; val_offset:107331*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107331*FLEN/8, x13, x9, x10)

inst_35799:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xecffff00; valaddr_reg:x12; val_offset:107334*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107334*FLEN/8, x13, x9, x10)

inst_35800:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xec80007f; valaddr_reg:x12; val_offset:107337*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107337*FLEN/8, x13, x9, x10)

inst_35801:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xecffff80; valaddr_reg:x12; val_offset:107340*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107340*FLEN/8, x13, x9, x10)

inst_35802:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xec80003f; valaddr_reg:x12; val_offset:107343*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107343*FLEN/8, x13, x9, x10)

inst_35803:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xecffffc0; valaddr_reg:x12; val_offset:107346*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107346*FLEN/8, x13, x9, x10)

inst_35804:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xec80001f; valaddr_reg:x12; val_offset:107349*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107349*FLEN/8, x13, x9, x10)

inst_35805:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xecffffe0; valaddr_reg:x12; val_offset:107352*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107352*FLEN/8, x13, x9, x10)

inst_35806:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xec80000f; valaddr_reg:x12; val_offset:107355*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107355*FLEN/8, x13, x9, x10)

inst_35807:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xecfffff0; valaddr_reg:x12; val_offset:107358*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107358*FLEN/8, x13, x9, x10)

inst_35808:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xec800007; valaddr_reg:x12; val_offset:107361*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107361*FLEN/8, x13, x9, x10)

inst_35809:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xecfffff8; valaddr_reg:x12; val_offset:107364*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107364*FLEN/8, x13, x9, x10)

inst_35810:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xec800003; valaddr_reg:x12; val_offset:107367*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107367*FLEN/8, x13, x9, x10)

inst_35811:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xecfffffc; valaddr_reg:x12; val_offset:107370*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107370*FLEN/8, x13, x9, x10)

inst_35812:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xec800001; valaddr_reg:x12; val_offset:107373*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107373*FLEN/8, x13, x9, x10)

inst_35813:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xecfffffe; valaddr_reg:x12; val_offset:107376*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107376*FLEN/8, x13, x9, x10)

inst_35814:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xff7ffff8; valaddr_reg:x12; val_offset:107379*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107379*FLEN/8, x13, x9, x10)

inst_35815:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xff000007; valaddr_reg:x12; val_offset:107382*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107382*FLEN/8, x13, x9, x10)

inst_35816:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xff7ffffc; valaddr_reg:x12; val_offset:107385*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107385*FLEN/8, x13, x9, x10)

inst_35817:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xff000003; valaddr_reg:x12; val_offset:107388*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107388*FLEN/8, x13, x9, x10)

inst_35818:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xff7ffffe; valaddr_reg:x12; val_offset:107391*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107391*FLEN/8, x13, x9, x10)

inst_35819:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xff000001; valaddr_reg:x12; val_offset:107394*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107394*FLEN/8, x13, x9, x10)

inst_35820:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xff36db6d; valaddr_reg:x12; val_offset:107397*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107397*FLEN/8, x13, x9, x10)

inst_35821:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xff6db6db; valaddr_reg:x12; val_offset:107400*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107400*FLEN/8, x13, x9, x10)

inst_35822:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xff199999; valaddr_reg:x12; val_offset:107403*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107403*FLEN/8, x13, x9, x10)

inst_35823:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xff666666; valaddr_reg:x12; val_offset:107406*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107406*FLEN/8, x13, x9, x10)

inst_35824:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xff3bbbbb; valaddr_reg:x12; val_offset:107409*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107409*FLEN/8, x13, x9, x10)

inst_35825:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xff444444; valaddr_reg:x12; val_offset:107412*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107412*FLEN/8, x13, x9, x10)

inst_35826:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xff249249; valaddr_reg:x12; val_offset:107415*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107415*FLEN/8, x13, x9, x10)

inst_35827:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xff5b6db6; valaddr_reg:x12; val_offset:107418*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107418*FLEN/8, x13, x9, x10)

inst_35828:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xff333333; valaddr_reg:x12; val_offset:107421*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107421*FLEN/8, x13, x9, x10)

inst_35829:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0xbfde09f1;
op3val:0xff4ccccc; valaddr_reg:x12; val_offset:107424*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107424*FLEN/8, x13, x9, x10)

inst_35830:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed7fffff; valaddr_reg:x12; val_offset:107427*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107427*FLEN/8, x13, x9, x10)

inst_35831:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed000000; valaddr_reg:x12; val_offset:107430*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107430*FLEN/8, x13, x9, x10)

inst_35832:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed3fffff; valaddr_reg:x12; val_offset:107433*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107433*FLEN/8, x13, x9, x10)

inst_35833:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed400000; valaddr_reg:x12; val_offset:107436*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107436*FLEN/8, x13, x9, x10)

inst_35834:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed1fffff; valaddr_reg:x12; val_offset:107439*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107439*FLEN/8, x13, x9, x10)

inst_35835:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed600000; valaddr_reg:x12; val_offset:107442*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107442*FLEN/8, x13, x9, x10)

inst_35836:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed0fffff; valaddr_reg:x12; val_offset:107445*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107445*FLEN/8, x13, x9, x10)

inst_35837:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed700000; valaddr_reg:x12; val_offset:107448*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107448*FLEN/8, x13, x9, x10)

inst_35838:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed07ffff; valaddr_reg:x12; val_offset:107451*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107451*FLEN/8, x13, x9, x10)

inst_35839:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed780000; valaddr_reg:x12; val_offset:107454*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107454*FLEN/8, x13, x9, x10)

inst_35840:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed03ffff; valaddr_reg:x12; val_offset:107457*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107457*FLEN/8, x13, x9, x10)

inst_35841:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed7c0000; valaddr_reg:x12; val_offset:107460*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107460*FLEN/8, x13, x9, x10)

inst_35842:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed01ffff; valaddr_reg:x12; val_offset:107463*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107463*FLEN/8, x13, x9, x10)

inst_35843:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed7e0000; valaddr_reg:x12; val_offset:107466*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107466*FLEN/8, x13, x9, x10)

inst_35844:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed00ffff; valaddr_reg:x12; val_offset:107469*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107469*FLEN/8, x13, x9, x10)

inst_35845:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed7f0000; valaddr_reg:x12; val_offset:107472*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107472*FLEN/8, x13, x9, x10)

inst_35846:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed007fff; valaddr_reg:x12; val_offset:107475*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107475*FLEN/8, x13, x9, x10)

inst_35847:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed7f8000; valaddr_reg:x12; val_offset:107478*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107478*FLEN/8, x13, x9, x10)

inst_35848:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed003fff; valaddr_reg:x12; val_offset:107481*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107481*FLEN/8, x13, x9, x10)

inst_35849:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed7fc000; valaddr_reg:x12; val_offset:107484*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107484*FLEN/8, x13, x9, x10)

inst_35850:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed001fff; valaddr_reg:x12; val_offset:107487*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107487*FLEN/8, x13, x9, x10)

inst_35851:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed7fe000; valaddr_reg:x12; val_offset:107490*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107490*FLEN/8, x13, x9, x10)

inst_35852:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed000fff; valaddr_reg:x12; val_offset:107493*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107493*FLEN/8, x13, x9, x10)

inst_35853:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed7ff000; valaddr_reg:x12; val_offset:107496*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107496*FLEN/8, x13, x9, x10)

inst_35854:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed0007ff; valaddr_reg:x12; val_offset:107499*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107499*FLEN/8, x13, x9, x10)

inst_35855:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed7ff800; valaddr_reg:x12; val_offset:107502*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107502*FLEN/8, x13, x9, x10)

inst_35856:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed0003ff; valaddr_reg:x12; val_offset:107505*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107505*FLEN/8, x13, x9, x10)

inst_35857:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed7ffc00; valaddr_reg:x12; val_offset:107508*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107508*FLEN/8, x13, x9, x10)

inst_35858:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed0001ff; valaddr_reg:x12; val_offset:107511*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107511*FLEN/8, x13, x9, x10)

inst_35859:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed7ffe00; valaddr_reg:x12; val_offset:107514*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107514*FLEN/8, x13, x9, x10)

inst_35860:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed0000ff; valaddr_reg:x12; val_offset:107517*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107517*FLEN/8, x13, x9, x10)

inst_35861:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed7fff00; valaddr_reg:x12; val_offset:107520*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107520*FLEN/8, x13, x9, x10)

inst_35862:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed00007f; valaddr_reg:x12; val_offset:107523*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107523*FLEN/8, x13, x9, x10)

inst_35863:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed7fff80; valaddr_reg:x12; val_offset:107526*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107526*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_280)
inst_35864:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed00003f; valaddr_reg:x12; val_offset:107529*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107529*FLEN/8, x13, x9, x10)

inst_35865:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed7fffc0; valaddr_reg:x12; val_offset:107532*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107532*FLEN/8, x13, x9, x10)

inst_35866:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed00001f; valaddr_reg:x12; val_offset:107535*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107535*FLEN/8, x13, x9, x10)

inst_35867:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed7fffe0; valaddr_reg:x12; val_offset:107538*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107538*FLEN/8, x13, x9, x10)

inst_35868:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed00000f; valaddr_reg:x12; val_offset:107541*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107541*FLEN/8, x13, x9, x10)

inst_35869:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed7ffff0; valaddr_reg:x12; val_offset:107544*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107544*FLEN/8, x13, x9, x10)

inst_35870:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed000007; valaddr_reg:x12; val_offset:107547*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107547*FLEN/8, x13, x9, x10)

inst_35871:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed7ffff8; valaddr_reg:x12; val_offset:107550*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107550*FLEN/8, x13, x9, x10)

inst_35872:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed000003; valaddr_reg:x12; val_offset:107553*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107553*FLEN/8, x13, x9, x10)

inst_35873:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed7ffffc; valaddr_reg:x12; val_offset:107556*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107556*FLEN/8, x13, x9, x10)

inst_35874:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed000001; valaddr_reg:x12; val_offset:107559*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107559*FLEN/8, x13, x9, x10)

inst_35875:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xed7ffffe; valaddr_reg:x12; val_offset:107562*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107562*FLEN/8, x13, x9, x10)

inst_35876:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xff7ffff8; valaddr_reg:x12; val_offset:107565*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107565*FLEN/8, x13, x9, x10)

inst_35877:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xff000007; valaddr_reg:x12; val_offset:107568*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107568*FLEN/8, x13, x9, x10)

inst_35878:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xff7ffffc; valaddr_reg:x12; val_offset:107571*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107571*FLEN/8, x13, x9, x10)

inst_35879:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xff000003; valaddr_reg:x12; val_offset:107574*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107574*FLEN/8, x13, x9, x10)

inst_35880:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xff7ffffe; valaddr_reg:x12; val_offset:107577*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107577*FLEN/8, x13, x9, x10)

inst_35881:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xff000001; valaddr_reg:x12; val_offset:107580*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107580*FLEN/8, x13, x9, x10)

inst_35882:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xff36db6d; valaddr_reg:x12; val_offset:107583*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107583*FLEN/8, x13, x9, x10)

inst_35883:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xff6db6db; valaddr_reg:x12; val_offset:107586*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107586*FLEN/8, x13, x9, x10)

inst_35884:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xff199999; valaddr_reg:x12; val_offset:107589*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107589*FLEN/8, x13, x9, x10)

inst_35885:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xff666666; valaddr_reg:x12; val_offset:107592*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107592*FLEN/8, x13, x9, x10)

inst_35886:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xff3bbbbb; valaddr_reg:x12; val_offset:107595*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107595*FLEN/8, x13, x9, x10)

inst_35887:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xff444444; valaddr_reg:x12; val_offset:107598*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107598*FLEN/8, x13, x9, x10)

inst_35888:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xff249249; valaddr_reg:x12; val_offset:107601*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107601*FLEN/8, x13, x9, x10)

inst_35889:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xff5b6db6; valaddr_reg:x12; val_offset:107604*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107604*FLEN/8, x13, x9, x10)

inst_35890:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xff333333; valaddr_reg:x12; val_offset:107607*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107607*FLEN/8, x13, x9, x10)

inst_35891:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef18162; op2val:0xc007aea7;
op3val:0xff4ccccc; valaddr_reg:x12; val_offset:107610*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107610*FLEN/8, x13, x9, x10)

inst_35892:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xedffffff; valaddr_reg:x12; val_offset:107613*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107613*FLEN/8, x13, x9, x10)

inst_35893:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xed800000; valaddr_reg:x12; val_offset:107616*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107616*FLEN/8, x13, x9, x10)

inst_35894:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xedbfffff; valaddr_reg:x12; val_offset:107619*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107619*FLEN/8, x13, x9, x10)

inst_35895:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xedc00000; valaddr_reg:x12; val_offset:107622*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107622*FLEN/8, x13, x9, x10)

inst_35896:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xed9fffff; valaddr_reg:x12; val_offset:107625*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107625*FLEN/8, x13, x9, x10)

inst_35897:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xede00000; valaddr_reg:x12; val_offset:107628*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107628*FLEN/8, x13, x9, x10)

inst_35898:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xed8fffff; valaddr_reg:x12; val_offset:107631*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107631*FLEN/8, x13, x9, x10)

inst_35899:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xedf00000; valaddr_reg:x12; val_offset:107634*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107634*FLEN/8, x13, x9, x10)

inst_35900:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xed87ffff; valaddr_reg:x12; val_offset:107637*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107637*FLEN/8, x13, x9, x10)

inst_35901:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xedf80000; valaddr_reg:x12; val_offset:107640*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107640*FLEN/8, x13, x9, x10)

inst_35902:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xed83ffff; valaddr_reg:x12; val_offset:107643*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107643*FLEN/8, x13, x9, x10)

inst_35903:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xedfc0000; valaddr_reg:x12; val_offset:107646*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107646*FLEN/8, x13, x9, x10)

inst_35904:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xed81ffff; valaddr_reg:x12; val_offset:107649*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107649*FLEN/8, x13, x9, x10)

inst_35905:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xedfe0000; valaddr_reg:x12; val_offset:107652*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107652*FLEN/8, x13, x9, x10)

inst_35906:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xed80ffff; valaddr_reg:x12; val_offset:107655*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107655*FLEN/8, x13, x9, x10)

inst_35907:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xedff0000; valaddr_reg:x12; val_offset:107658*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107658*FLEN/8, x13, x9, x10)

inst_35908:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xed807fff; valaddr_reg:x12; val_offset:107661*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107661*FLEN/8, x13, x9, x10)

inst_35909:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xedff8000; valaddr_reg:x12; val_offset:107664*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107664*FLEN/8, x13, x9, x10)

inst_35910:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xed803fff; valaddr_reg:x12; val_offset:107667*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107667*FLEN/8, x13, x9, x10)

inst_35911:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xedffc000; valaddr_reg:x12; val_offset:107670*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107670*FLEN/8, x13, x9, x10)

inst_35912:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xed801fff; valaddr_reg:x12; val_offset:107673*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107673*FLEN/8, x13, x9, x10)

inst_35913:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xedffe000; valaddr_reg:x12; val_offset:107676*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107676*FLEN/8, x13, x9, x10)

inst_35914:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xed800fff; valaddr_reg:x12; val_offset:107679*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107679*FLEN/8, x13, x9, x10)

inst_35915:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xedfff000; valaddr_reg:x12; val_offset:107682*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107682*FLEN/8, x13, x9, x10)

inst_35916:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xed8007ff; valaddr_reg:x12; val_offset:107685*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107685*FLEN/8, x13, x9, x10)

inst_35917:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xedfff800; valaddr_reg:x12; val_offset:107688*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107688*FLEN/8, x13, x9, x10)

inst_35918:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xed8003ff; valaddr_reg:x12; val_offset:107691*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107691*FLEN/8, x13, x9, x10)

inst_35919:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xedfffc00; valaddr_reg:x12; val_offset:107694*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107694*FLEN/8, x13, x9, x10)

inst_35920:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xed8001ff; valaddr_reg:x12; val_offset:107697*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107697*FLEN/8, x13, x9, x10)

inst_35921:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xedfffe00; valaddr_reg:x12; val_offset:107700*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107700*FLEN/8, x13, x9, x10)

inst_35922:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xed8000ff; valaddr_reg:x12; val_offset:107703*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107703*FLEN/8, x13, x9, x10)

inst_35923:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xedffff00; valaddr_reg:x12; val_offset:107706*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107706*FLEN/8, x13, x9, x10)

inst_35924:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xed80007f; valaddr_reg:x12; val_offset:107709*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107709*FLEN/8, x13, x9, x10)

inst_35925:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xedffff80; valaddr_reg:x12; val_offset:107712*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107712*FLEN/8, x13, x9, x10)

inst_35926:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xed80003f; valaddr_reg:x12; val_offset:107715*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107715*FLEN/8, x13, x9, x10)

inst_35927:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xedffffc0; valaddr_reg:x12; val_offset:107718*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107718*FLEN/8, x13, x9, x10)

inst_35928:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xed80001f; valaddr_reg:x12; val_offset:107721*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107721*FLEN/8, x13, x9, x10)

inst_35929:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xedffffe0; valaddr_reg:x12; val_offset:107724*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107724*FLEN/8, x13, x9, x10)

inst_35930:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xed80000f; valaddr_reg:x12; val_offset:107727*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107727*FLEN/8, x13, x9, x10)

inst_35931:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xedfffff0; valaddr_reg:x12; val_offset:107730*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107730*FLEN/8, x13, x9, x10)

inst_35932:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xed800007; valaddr_reg:x12; val_offset:107733*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107733*FLEN/8, x13, x9, x10)

inst_35933:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xedfffff8; valaddr_reg:x12; val_offset:107736*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107736*FLEN/8, x13, x9, x10)

inst_35934:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xed800003; valaddr_reg:x12; val_offset:107739*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107739*FLEN/8, x13, x9, x10)

inst_35935:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xedfffffc; valaddr_reg:x12; val_offset:107742*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107742*FLEN/8, x13, x9, x10)

inst_35936:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xed800001; valaddr_reg:x12; val_offset:107745*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107745*FLEN/8, x13, x9, x10)

inst_35937:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xedfffffe; valaddr_reg:x12; val_offset:107748*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107748*FLEN/8, x13, x9, x10)

inst_35938:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xff7ffff8; valaddr_reg:x12; val_offset:107751*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107751*FLEN/8, x13, x9, x10)

inst_35939:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xff000007; valaddr_reg:x12; val_offset:107754*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107754*FLEN/8, x13, x9, x10)

inst_35940:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xff7ffffc; valaddr_reg:x12; val_offset:107757*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107757*FLEN/8, x13, x9, x10)

inst_35941:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xff000003; valaddr_reg:x12; val_offset:107760*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107760*FLEN/8, x13, x9, x10)

inst_35942:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xff7ffffe; valaddr_reg:x12; val_offset:107763*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107763*FLEN/8, x13, x9, x10)

inst_35943:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xff000001; valaddr_reg:x12; val_offset:107766*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107766*FLEN/8, x13, x9, x10)

inst_35944:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xff36db6d; valaddr_reg:x12; val_offset:107769*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107769*FLEN/8, x13, x9, x10)

inst_35945:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xff6db6db; valaddr_reg:x12; val_offset:107772*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107772*FLEN/8, x13, x9, x10)

inst_35946:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xff199999; valaddr_reg:x12; val_offset:107775*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107775*FLEN/8, x13, x9, x10)

inst_35947:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xff666666; valaddr_reg:x12; val_offset:107778*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107778*FLEN/8, x13, x9, x10)

inst_35948:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xff3bbbbb; valaddr_reg:x12; val_offset:107781*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107781*FLEN/8, x13, x9, x10)

inst_35949:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xff444444; valaddr_reg:x12; val_offset:107784*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107784*FLEN/8, x13, x9, x10)

inst_35950:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xff249249; valaddr_reg:x12; val_offset:107787*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107787*FLEN/8, x13, x9, x10)

inst_35951:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xff5b6db6; valaddr_reg:x12; val_offset:107790*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107790*FLEN/8, x13, x9, x10)

inst_35952:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xff333333; valaddr_reg:x12; val_offset:107793*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107793*FLEN/8, x13, x9, x10)

inst_35953:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed15c22; op2val:0xc01c83e1;
op3val:0xff4ccccc; valaddr_reg:x12; val_offset:107796*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107796*FLEN/8, x13, x9, x10)

inst_35954:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee7fffff; valaddr_reg:x12; val_offset:107799*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107799*FLEN/8, x13, x9, x10)

inst_35955:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee000000; valaddr_reg:x12; val_offset:107802*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107802*FLEN/8, x13, x9, x10)

inst_35956:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee3fffff; valaddr_reg:x12; val_offset:107805*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107805*FLEN/8, x13, x9, x10)

inst_35957:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee400000; valaddr_reg:x12; val_offset:107808*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107808*FLEN/8, x13, x9, x10)

inst_35958:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee1fffff; valaddr_reg:x12; val_offset:107811*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107811*FLEN/8, x13, x9, x10)

inst_35959:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee600000; valaddr_reg:x12; val_offset:107814*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107814*FLEN/8, x13, x9, x10)

inst_35960:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee0fffff; valaddr_reg:x12; val_offset:107817*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107817*FLEN/8, x13, x9, x10)

inst_35961:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee700000; valaddr_reg:x12; val_offset:107820*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107820*FLEN/8, x13, x9, x10)

inst_35962:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee07ffff; valaddr_reg:x12; val_offset:107823*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107823*FLEN/8, x13, x9, x10)

inst_35963:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee780000; valaddr_reg:x12; val_offset:107826*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107826*FLEN/8, x13, x9, x10)

inst_35964:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee03ffff; valaddr_reg:x12; val_offset:107829*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107829*FLEN/8, x13, x9, x10)

inst_35965:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee7c0000; valaddr_reg:x12; val_offset:107832*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107832*FLEN/8, x13, x9, x10)

inst_35966:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee01ffff; valaddr_reg:x12; val_offset:107835*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107835*FLEN/8, x13, x9, x10)

inst_35967:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee7e0000; valaddr_reg:x12; val_offset:107838*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107838*FLEN/8, x13, x9, x10)

inst_35968:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee00ffff; valaddr_reg:x12; val_offset:107841*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107841*FLEN/8, x13, x9, x10)

inst_35969:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee7f0000; valaddr_reg:x12; val_offset:107844*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107844*FLEN/8, x13, x9, x10)

inst_35970:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee007fff; valaddr_reg:x12; val_offset:107847*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107847*FLEN/8, x13, x9, x10)

inst_35971:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee7f8000; valaddr_reg:x12; val_offset:107850*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107850*FLEN/8, x13, x9, x10)

inst_35972:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee003fff; valaddr_reg:x12; val_offset:107853*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107853*FLEN/8, x13, x9, x10)

inst_35973:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee7fc000; valaddr_reg:x12; val_offset:107856*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107856*FLEN/8, x13, x9, x10)

inst_35974:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee001fff; valaddr_reg:x12; val_offset:107859*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107859*FLEN/8, x13, x9, x10)

inst_35975:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee7fe000; valaddr_reg:x12; val_offset:107862*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107862*FLEN/8, x13, x9, x10)

inst_35976:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee000fff; valaddr_reg:x12; val_offset:107865*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107865*FLEN/8, x13, x9, x10)

inst_35977:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee7ff000; valaddr_reg:x12; val_offset:107868*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107868*FLEN/8, x13, x9, x10)

inst_35978:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee0007ff; valaddr_reg:x12; val_offset:107871*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107871*FLEN/8, x13, x9, x10)

inst_35979:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee7ff800; valaddr_reg:x12; val_offset:107874*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107874*FLEN/8, x13, x9, x10)

inst_35980:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee0003ff; valaddr_reg:x12; val_offset:107877*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107877*FLEN/8, x13, x9, x10)

inst_35981:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee7ffc00; valaddr_reg:x12; val_offset:107880*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107880*FLEN/8, x13, x9, x10)

inst_35982:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee0001ff; valaddr_reg:x12; val_offset:107883*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107883*FLEN/8, x13, x9, x10)

inst_35983:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee7ffe00; valaddr_reg:x12; val_offset:107886*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107886*FLEN/8, x13, x9, x10)

inst_35984:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee0000ff; valaddr_reg:x12; val_offset:107889*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107889*FLEN/8, x13, x9, x10)

inst_35985:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee7fff00; valaddr_reg:x12; val_offset:107892*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107892*FLEN/8, x13, x9, x10)

inst_35986:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee00007f; valaddr_reg:x12; val_offset:107895*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107895*FLEN/8, x13, x9, x10)

inst_35987:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee7fff80; valaddr_reg:x12; val_offset:107898*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107898*FLEN/8, x13, x9, x10)

inst_35988:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee00003f; valaddr_reg:x12; val_offset:107901*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107901*FLEN/8, x13, x9, x10)

inst_35989:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee7fffc0; valaddr_reg:x12; val_offset:107904*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107904*FLEN/8, x13, x9, x10)

inst_35990:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee00001f; valaddr_reg:x12; val_offset:107907*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107907*FLEN/8, x13, x9, x10)

inst_35991:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee7fffe0; valaddr_reg:x12; val_offset:107910*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107910*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_281)
inst_35992:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee00000f; valaddr_reg:x12; val_offset:107913*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107913*FLEN/8, x13, x9, x10)

inst_35993:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee7ffff0; valaddr_reg:x12; val_offset:107916*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107916*FLEN/8, x13, x9, x10)

inst_35994:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee000007; valaddr_reg:x12; val_offset:107919*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107919*FLEN/8, x13, x9, x10)

inst_35995:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee7ffff8; valaddr_reg:x12; val_offset:107922*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107922*FLEN/8, x13, x9, x10)

inst_35996:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee000003; valaddr_reg:x12; val_offset:107925*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107925*FLEN/8, x13, x9, x10)

inst_35997:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee7ffffc; valaddr_reg:x12; val_offset:107928*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107928*FLEN/8, x13, x9, x10)

inst_35998:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee000001; valaddr_reg:x12; val_offset:107931*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107931*FLEN/8, x13, x9, x10)

inst_35999:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xee7ffffe; valaddr_reg:x12; val_offset:107934*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107934*FLEN/8, x13, x9, x10)

inst_36000:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xff7ffff8; valaddr_reg:x12; val_offset:107937*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107937*FLEN/8, x13, x9, x10)

inst_36001:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xff000007; valaddr_reg:x12; val_offset:107940*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107940*FLEN/8, x13, x9, x10)

inst_36002:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xff7ffffc; valaddr_reg:x12; val_offset:107943*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107943*FLEN/8, x13, x9, x10)

inst_36003:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xff000003; valaddr_reg:x12; val_offset:107946*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107946*FLEN/8, x13, x9, x10)

inst_36004:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xff7ffffe; valaddr_reg:x12; val_offset:107949*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107949*FLEN/8, x13, x9, x10)

inst_36005:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xff000001; valaddr_reg:x12; val_offset:107952*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107952*FLEN/8, x13, x9, x10)

inst_36006:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xff36db6d; valaddr_reg:x12; val_offset:107955*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107955*FLEN/8, x13, x9, x10)

inst_36007:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0xc1088eff;
op3val:0xff6db6db; valaddr_reg:x12; val_offset:107958*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 107958*FLEN/8, x13, x9, x10)

#endif
RVTEST_CODE_END
RVMODEL_HALT
RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
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NAN_BOXED(3220284168,32,FLEN)
NAN_BOXED(4009754608,32,FLEN)
NAN_BOXED(2131205059,32,FLEN)
NAN_BOXED(3220284168,32,FLEN)
NAN_BOXED(4001366023,32,FLEN)
NAN_BOXED(2131205059,32,FLEN)
NAN_BOXED(3220284168,32,FLEN)
NAN_BOXED(4009754616,32,FLEN)
NAN_BOXED(2131205059,32,FLEN)
NAN_BOXED(3220284168,32,FLEN)
NAN_BOXED(4001366019,32,FLEN)
NAN_BOXED(2131205059,32,FLEN)
NAN_BOXED(3220284168,32,FLEN)
NAN_BOXED(4009754620,32,FLEN)
NAN_BOXED(2131205059,32,FLEN)
NAN_BOXED(3220284168,32,FLEN)
NAN_BOXED(4001366017,32,FLEN)
NAN_BOXED(2131205059,32,FLEN)
NAN_BOXED(3220284168,32,FLEN)
NAN_BOXED(4009754622,32,FLEN)
NAN_BOXED(2131205059,32,FLEN)
NAN_BOXED(3220284168,32,FLEN)
NAN_BOXED(4286578680,32,FLEN)
NAN_BOXED(2131205059,32,FLEN)
NAN_BOXED(3220284168,32,FLEN)
NAN_BOXED(4278190087,32,FLEN)
NAN_BOXED(2131205059,32,FLEN)
NAN_BOXED(3220284168,32,FLEN)
NAN_BOXED(4286578684,32,FLEN)
NAN_BOXED(2131205059,32,FLEN)
NAN_BOXED(3220284168,32,FLEN)
NAN_BOXED(4278190083,32,FLEN)
NAN_BOXED(2131205059,32,FLEN)
NAN_BOXED(3220284168,32,FLEN)
NAN_BOXED(4286578686,32,FLEN)
NAN_BOXED(2131205059,32,FLEN)
NAN_BOXED(3220284168,32,FLEN)
NAN_BOXED(4278190081,32,FLEN)
NAN_BOXED(2131205059,32,FLEN)
NAN_BOXED(3220284168,32,FLEN)
NAN_BOXED(4281785197,32,FLEN)
NAN_BOXED(2131205059,32,FLEN)
NAN_BOXED(3220284168,32,FLEN)
NAN_BOXED(4285380315,32,FLEN)
NAN_BOXED(2131205059,32,FLEN)
NAN_BOXED(3220284168,32,FLEN)
NAN_BOXED(4279867801,32,FLEN)
NAN_BOXED(2131205059,32,FLEN)
NAN_BOXED(3220284168,32,FLEN)
NAN_BOXED(4284900966,32,FLEN)
NAN_BOXED(2131205059,32,FLEN)
NAN_BOXED(3220284168,32,FLEN)
NAN_BOXED(4282104763,32,FLEN)
NAN_BOXED(2131205059,32,FLEN)
NAN_BOXED(3220284168,32,FLEN)
NAN_BOXED(4282664004,32,FLEN)
NAN_BOXED(2131205059,32,FLEN)
NAN_BOXED(3220284168,32,FLEN)
NAN_BOXED(4280586825,32,FLEN)
NAN_BOXED(2131205059,32,FLEN)
NAN_BOXED(3220284168,32,FLEN)
NAN_BOXED(4284181942,32,FLEN)
NAN_BOXED(2131205059,32,FLEN)
NAN_BOXED(3220284168,32,FLEN)
NAN_BOXED(4281545523,32,FLEN)
NAN_BOXED(2131205059,32,FLEN)
NAN_BOXED(3220284168,32,FLEN)
NAN_BOXED(4283223244,32,FLEN)
NAN_BOXED(2125793263,32,FLEN)
NAN_BOXED(3224699381,32,FLEN)
NAN_BOXED(4018143231,32,FLEN)
NAN_BOXED(2125793263,32,FLEN)
NAN_BOXED(3224699381,32,FLEN)
NAN_BOXED(4009754624,32,FLEN)
NAN_BOXED(2125793263,32,FLEN)
NAN_BOXED(3224699381,32,FLEN)

RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;



signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 48*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_0:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_2:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_3:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_4:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_5:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_6:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_7:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_8:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_9:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_10:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_11:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_12:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_13:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_14:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_15:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_16:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_17:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_18:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_19:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_20:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_21:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_22:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_23:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_24:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_25:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_26:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_27:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_28:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_29:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_30:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_31:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_32:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_33:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_34:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_35:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_36:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_37:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_38:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_39:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_40:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_41:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_42:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_43:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_44:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_45:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_46:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_47:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_48:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_49:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_50:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_51:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_52:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_53:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_54:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_55:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_56:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_57:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_58:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_59:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_60:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_61:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_62:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_63:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_64:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_65:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_66:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_67:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_68:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_69:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_70:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_71:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_72:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_73:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_74:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_75:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_76:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_77:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_78:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_79:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_80:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_81:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_82:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_83:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_84:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_85:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_86:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_87:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_88:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_89:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_90:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_91:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_92:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_93:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_94:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_95:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_96:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_97:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_98:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_99:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_100:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_101:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_102:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_103:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_104:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_105:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_106:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_107:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_108:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_109:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_110:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_111:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_112:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_113:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_114:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_115:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_116:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_117:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_118:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_119:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_120:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_121:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_122:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_123:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_124:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_125:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_126:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_127:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_128:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_129:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_130:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_131:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_132:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_133:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_134:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_135:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_136:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_137:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_138:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_139:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_140:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_141:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_142:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_143:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_144:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_145:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_146:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_147:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_148:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_149:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_150:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_151:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_152:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_153:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_154:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_155:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_156:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_157:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_158:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_159:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_160:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_161:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_162:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_163:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_164:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_165:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_166:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_167:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_168:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_169:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_170:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_171:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_172:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_173:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_174:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_175:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_176:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_177:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_178:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_179:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_180:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_181:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_182:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_183:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_184:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_185:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_186:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_187:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_188:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_189:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_190:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_191:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_192:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_193:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_194:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_195:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_196:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_197:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_198:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_199:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_200:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_201:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_202:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_203:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_204:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_205:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_206:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_207:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_208:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_209:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_210:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_211:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_212:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_213:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_214:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_215:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_216:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_217:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_218:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_219:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_220:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_221:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_222:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_223:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_224:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_225:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_226:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_227:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_228:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_229:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_230:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_231:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_232:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_233:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_234:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_235:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_236:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_237:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_238:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_239:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_240:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_241:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_242:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_243:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_244:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_245:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_246:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_247:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_248:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_249:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_250:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_251:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_252:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_253:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_254:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_255:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_256:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_257:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_258:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_259:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_260:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_261:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_262:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_263:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_264:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_265:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_266:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_267:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_268:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_269:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_270:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_271:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_272:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_273:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_274:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_275:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_276:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_277:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_278:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_279:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_280:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_281:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_282:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_283:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_284:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_285:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_286:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_287:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_288:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_289:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_290:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_291:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_292:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_293:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_294:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_295:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_296:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_297:
    .fill 180*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine
tsig_begin_canary:
CANARY;

mtrap_sigptr:
    .fill 64*XLEN/32,4,0xdeadbeef

tsig_end_canary:
CANARY;
#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif


sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
