
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.7.1
// timestamp : Fri Jun 17 14:18:07 2022 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /scratch/pawan/work/normalised/RV32F/fmsub.s.cgf \
 \
//                  -- xlen 32  \
//                  --randomize \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fmsub.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmsub_b15 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmsub_b15)
RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fmsub_b15)
RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_12288:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x410001ff; valaddr_reg:x3; val_offset:36864*0 + 3*-1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36864*0 + 3*0*FLEN/8, x4, x1, x2)

inst_12289:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x410003ff; valaddr_reg:x3; val_offset:36867*0 + 3*0*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36867*0 + 3*1*FLEN/8, x4, x1, x2)

inst_12290:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x410007ff; valaddr_reg:x3; val_offset:36870*0 + 3*1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36870*0 + 3*2*FLEN/8, x4, x1, x2)

inst_12291:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x41000fff; valaddr_reg:x3; val_offset:36873*0 + 3*2*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36873*0 + 3*3*FLEN/8, x4, x1, x2)

inst_12292:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x41001fff; valaddr_reg:x3; val_offset:36876*0 + 3*3*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36876*0 + 3*4*FLEN/8, x4, x1, x2)

inst_12293:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x41003fff; valaddr_reg:x3; val_offset:36879*0 + 3*4*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36879*0 + 3*5*FLEN/8, x4, x1, x2)

inst_12294:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x41007fff; valaddr_reg:x3; val_offset:36882*0 + 3*5*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36882*0 + 3*6*FLEN/8, x4, x1, x2)

inst_12295:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x4100ffff; valaddr_reg:x3; val_offset:36885*0 + 3*6*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36885*0 + 3*7*FLEN/8, x4, x1, x2)

inst_12296:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x4101ffff; valaddr_reg:x3; val_offset:36888*0 + 3*7*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36888*0 + 3*8*FLEN/8, x4, x1, x2)

inst_12297:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x4103ffff; valaddr_reg:x3; val_offset:36891*0 + 3*8*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36891*0 + 3*9*FLEN/8, x4, x1, x2)

inst_12298:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x4107ffff; valaddr_reg:x3; val_offset:36894*0 + 3*9*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36894*0 + 3*10*FLEN/8, x4, x1, x2)

inst_12299:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x410fffff; valaddr_reg:x3; val_offset:36897*0 + 3*10*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36897*0 + 3*11*FLEN/8, x4, x1, x2)

inst_12300:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x411fffff; valaddr_reg:x3; val_offset:36900*0 + 3*11*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36900*0 + 3*12*FLEN/8, x4, x1, x2)

inst_12301:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x413fffff; valaddr_reg:x3; val_offset:36903*0 + 3*12*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36903*0 + 3*13*FLEN/8, x4, x1, x2)

inst_12302:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x41400000; valaddr_reg:x3; val_offset:36906*0 + 3*13*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36906*0 + 3*14*FLEN/8, x4, x1, x2)

inst_12303:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x41600000; valaddr_reg:x3; val_offset:36909*0 + 3*14*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36909*0 + 3*15*FLEN/8, x4, x1, x2)

inst_12304:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x41700000; valaddr_reg:x3; val_offset:36912*0 + 3*15*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36912*0 + 3*16*FLEN/8, x4, x1, x2)

inst_12305:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x41780000; valaddr_reg:x3; val_offset:36915*0 + 3*16*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36915*0 + 3*17*FLEN/8, x4, x1, x2)

inst_12306:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x417c0000; valaddr_reg:x3; val_offset:36918*0 + 3*17*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36918*0 + 3*18*FLEN/8, x4, x1, x2)

inst_12307:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x417e0000; valaddr_reg:x3; val_offset:36921*0 + 3*18*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36921*0 + 3*19*FLEN/8, x4, x1, x2)

inst_12308:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x417f0000; valaddr_reg:x3; val_offset:36924*0 + 3*19*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36924*0 + 3*20*FLEN/8, x4, x1, x2)

inst_12309:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x417f8000; valaddr_reg:x3; val_offset:36927*0 + 3*20*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36927*0 + 3*21*FLEN/8, x4, x1, x2)

inst_12310:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x417fc000; valaddr_reg:x3; val_offset:36930*0 + 3*21*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36930*0 + 3*22*FLEN/8, x4, x1, x2)

inst_12311:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x417fe000; valaddr_reg:x3; val_offset:36933*0 + 3*22*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36933*0 + 3*23*FLEN/8, x4, x1, x2)

inst_12312:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x417ff000; valaddr_reg:x3; val_offset:36936*0 + 3*23*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36936*0 + 3*24*FLEN/8, x4, x1, x2)

inst_12313:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x417ff800; valaddr_reg:x3; val_offset:36939*0 + 3*24*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36939*0 + 3*25*FLEN/8, x4, x1, x2)

inst_12314:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x417ffc00; valaddr_reg:x3; val_offset:36942*0 + 3*25*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36942*0 + 3*26*FLEN/8, x4, x1, x2)

inst_12315:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x417ffe00; valaddr_reg:x3; val_offset:36945*0 + 3*26*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36945*0 + 3*27*FLEN/8, x4, x1, x2)

inst_12316:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x417fff00; valaddr_reg:x3; val_offset:36948*0 + 3*27*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36948*0 + 3*28*FLEN/8, x4, x1, x2)

inst_12317:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x417fff80; valaddr_reg:x3; val_offset:36951*0 + 3*28*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36951*0 + 3*29*FLEN/8, x4, x1, x2)

inst_12318:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x417fffc0; valaddr_reg:x3; val_offset:36954*0 + 3*29*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36954*0 + 3*30*FLEN/8, x4, x1, x2)

inst_12319:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x417fffe0; valaddr_reg:x3; val_offset:36957*0 + 3*30*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36957*0 + 3*31*FLEN/8, x4, x1, x2)

inst_12320:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x417ffff0; valaddr_reg:x3; val_offset:36960*0 + 3*31*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36960*0 + 3*32*FLEN/8, x4, x1, x2)

inst_12321:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x417ffff8; valaddr_reg:x3; val_offset:36963*0 + 3*32*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36963*0 + 3*33*FLEN/8, x4, x1, x2)

inst_12322:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x417ffffc; valaddr_reg:x3; val_offset:36966*0 + 3*33*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36966*0 + 3*34*FLEN/8, x4, x1, x2)

inst_12323:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x417ffffe; valaddr_reg:x3; val_offset:36969*0 + 3*34*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36969*0 + 3*35*FLEN/8, x4, x1, x2)

inst_12324:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7bdfb7 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0218cb and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7bdfb7; op2val:0x8218cb;
op3val:0x417fffff; valaddr_reg:x3; val_offset:36972*0 + 3*35*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36972*0 + 3*36*FLEN/8, x4, x1, x2)

inst_12325:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x0; valaddr_reg:x3; val_offset:36975*0 + 3*36*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36975*0 + 3*37*FLEN/8, x4, x1, x2)

inst_12326:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:36978*0 + 3*37*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36978*0 + 3*38*FLEN/8, x4, x1, x2)

inst_12327:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:36981*0 + 3*38*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36981*0 + 3*39*FLEN/8, x4, x1, x2)

inst_12328:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:36984*0 + 3*39*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36984*0 + 3*40*FLEN/8, x4, x1, x2)

inst_12329:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0xf; valaddr_reg:x3; val_offset:36987*0 + 3*40*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36987*0 + 3*41*FLEN/8, x4, x1, x2)

inst_12330:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x1f; valaddr_reg:x3; val_offset:36990*0 + 3*41*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36990*0 + 3*42*FLEN/8, x4, x1, x2)

inst_12331:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x3f; valaddr_reg:x3; val_offset:36993*0 + 3*42*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36993*0 + 3*43*FLEN/8, x4, x1, x2)

inst_12332:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x7f; valaddr_reg:x3; val_offset:36996*0 + 3*43*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36996*0 + 3*44*FLEN/8, x4, x1, x2)

inst_12333:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0xff; valaddr_reg:x3; val_offset:36999*0 + 3*44*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36999*0 + 3*45*FLEN/8, x4, x1, x2)

inst_12334:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x1ff; valaddr_reg:x3; val_offset:37002*0 + 3*45*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37002*0 + 3*46*FLEN/8, x4, x1, x2)

inst_12335:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x3ff; valaddr_reg:x3; val_offset:37005*0 + 3*46*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37005*0 + 3*47*FLEN/8, x4, x1, x2)

inst_12336:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x7ff; valaddr_reg:x3; val_offset:37008*0 + 3*47*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37008*0 + 3*48*FLEN/8, x4, x1, x2)

inst_12337:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0xfff; valaddr_reg:x3; val_offset:37011*0 + 3*48*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37011*0 + 3*49*FLEN/8, x4, x1, x2)

inst_12338:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x1fff; valaddr_reg:x3; val_offset:37014*0 + 3*49*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37014*0 + 3*50*FLEN/8, x4, x1, x2)

inst_12339:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x3fff; valaddr_reg:x3; val_offset:37017*0 + 3*50*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37017*0 + 3*51*FLEN/8, x4, x1, x2)

inst_12340:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x7fff; valaddr_reg:x3; val_offset:37020*0 + 3*51*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37020*0 + 3*52*FLEN/8, x4, x1, x2)

inst_12341:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0xffff; valaddr_reg:x3; val_offset:37023*0 + 3*52*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37023*0 + 3*53*FLEN/8, x4, x1, x2)

inst_12342:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x1ffff; valaddr_reg:x3; val_offset:37026*0 + 3*53*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37026*0 + 3*54*FLEN/8, x4, x1, x2)

inst_12343:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x3ffff; valaddr_reg:x3; val_offset:37029*0 + 3*54*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37029*0 + 3*55*FLEN/8, x4, x1, x2)

inst_12344:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x7ffff; valaddr_reg:x3; val_offset:37032*0 + 3*55*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37032*0 + 3*56*FLEN/8, x4, x1, x2)

inst_12345:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0xfffff; valaddr_reg:x3; val_offset:37035*0 + 3*56*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37035*0 + 3*57*FLEN/8, x4, x1, x2)

inst_12346:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x199999; valaddr_reg:x3; val_offset:37038*0 + 3*57*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37038*0 + 3*58*FLEN/8, x4, x1, x2)

inst_12347:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x1fffff; valaddr_reg:x3; val_offset:37041*0 + 3*58*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37041*0 + 3*59*FLEN/8, x4, x1, x2)

inst_12348:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x249249; valaddr_reg:x3; val_offset:37044*0 + 3*59*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37044*0 + 3*60*FLEN/8, x4, x1, x2)

inst_12349:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x333333; valaddr_reg:x3; val_offset:37047*0 + 3*60*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37047*0 + 3*61*FLEN/8, x4, x1, x2)

inst_12350:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x36db6d; valaddr_reg:x3; val_offset:37050*0 + 3*61*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37050*0 + 3*62*FLEN/8, x4, x1, x2)

inst_12351:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x3bbbbb; valaddr_reg:x3; val_offset:37053*0 + 3*62*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37053*0 + 3*63*FLEN/8, x4, x1, x2)

inst_12352:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x3fffff; valaddr_reg:x3; val_offset:37056*0 + 3*63*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37056*0 + 3*64*FLEN/8, x4, x1, x2)

inst_12353:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x400000; valaddr_reg:x3; val_offset:37059*0 + 3*64*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37059*0 + 3*65*FLEN/8, x4, x1, x2)

inst_12354:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x444444; valaddr_reg:x3; val_offset:37062*0 + 3*65*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37062*0 + 3*66*FLEN/8, x4, x1, x2)

inst_12355:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x4ccccc; valaddr_reg:x3; val_offset:37065*0 + 3*66*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37065*0 + 3*67*FLEN/8, x4, x1, x2)

inst_12356:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x5b6db6; valaddr_reg:x3; val_offset:37068*0 + 3*67*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37068*0 + 3*68*FLEN/8, x4, x1, x2)

inst_12357:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x600000; valaddr_reg:x3; val_offset:37071*0 + 3*68*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37071*0 + 3*69*FLEN/8, x4, x1, x2)

inst_12358:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x666666; valaddr_reg:x3; val_offset:37074*0 + 3*69*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37074*0 + 3*70*FLEN/8, x4, x1, x2)

inst_12359:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x6db6db; valaddr_reg:x3; val_offset:37077*0 + 3*70*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37077*0 + 3*71*FLEN/8, x4, x1, x2)

inst_12360:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x700000; valaddr_reg:x3; val_offset:37080*0 + 3*71*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37080*0 + 3*72*FLEN/8, x4, x1, x2)

inst_12361:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x780000; valaddr_reg:x3; val_offset:37083*0 + 3*72*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37083*0 + 3*73*FLEN/8, x4, x1, x2)

inst_12362:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x7c0000; valaddr_reg:x3; val_offset:37086*0 + 3*73*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37086*0 + 3*74*FLEN/8, x4, x1, x2)

inst_12363:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x7e0000; valaddr_reg:x3; val_offset:37089*0 + 3*74*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37089*0 + 3*75*FLEN/8, x4, x1, x2)

inst_12364:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x7f0000; valaddr_reg:x3; val_offset:37092*0 + 3*75*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37092*0 + 3*76*FLEN/8, x4, x1, x2)

inst_12365:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x7f8000; valaddr_reg:x3; val_offset:37095*0 + 3*76*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37095*0 + 3*77*FLEN/8, x4, x1, x2)

inst_12366:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x7fc000; valaddr_reg:x3; val_offset:37098*0 + 3*77*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37098*0 + 3*78*FLEN/8, x4, x1, x2)

inst_12367:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x7fe000; valaddr_reg:x3; val_offset:37101*0 + 3*78*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37101*0 + 3*79*FLEN/8, x4, x1, x2)

inst_12368:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x7ff000; valaddr_reg:x3; val_offset:37104*0 + 3*79*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37104*0 + 3*80*FLEN/8, x4, x1, x2)

inst_12369:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x7ff800; valaddr_reg:x3; val_offset:37107*0 + 3*80*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37107*0 + 3*81*FLEN/8, x4, x1, x2)

inst_12370:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x7ffc00; valaddr_reg:x3; val_offset:37110*0 + 3*81*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37110*0 + 3*82*FLEN/8, x4, x1, x2)

inst_12371:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x7ffe00; valaddr_reg:x3; val_offset:37113*0 + 3*82*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37113*0 + 3*83*FLEN/8, x4, x1, x2)

inst_12372:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x7fff00; valaddr_reg:x3; val_offset:37116*0 + 3*83*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37116*0 + 3*84*FLEN/8, x4, x1, x2)

inst_12373:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x7fff80; valaddr_reg:x3; val_offset:37119*0 + 3*84*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37119*0 + 3*85*FLEN/8, x4, x1, x2)

inst_12374:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x7fffc0; valaddr_reg:x3; val_offset:37122*0 + 3*85*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37122*0 + 3*86*FLEN/8, x4, x1, x2)

inst_12375:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x7fffe0; valaddr_reg:x3; val_offset:37125*0 + 3*86*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37125*0 + 3*87*FLEN/8, x4, x1, x2)

inst_12376:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x7ffff0; valaddr_reg:x3; val_offset:37128*0 + 3*87*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37128*0 + 3*88*FLEN/8, x4, x1, x2)

inst_12377:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x7ffff8; valaddr_reg:x3; val_offset:37131*0 + 3*88*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37131*0 + 3*89*FLEN/8, x4, x1, x2)

inst_12378:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x7ffffc; valaddr_reg:x3; val_offset:37134*0 + 3*89*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37134*0 + 3*90*FLEN/8, x4, x1, x2)

inst_12379:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x7ffffe; valaddr_reg:x3; val_offset:37137*0 + 3*90*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37137*0 + 3*91*FLEN/8, x4, x1, x2)

inst_12380:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7cfd8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7cfd8d; op2val:0x0;
op3val:0x7fffff; valaddr_reg:x3; val_offset:37140*0 + 3*91*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37140*0 + 3*92*FLEN/8, x4, x1, x2)

inst_12381:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:37143*0 + 3*92*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37143*0 + 3*93*FLEN/8, x4, x1, x2)

inst_12382:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:37146*0 + 3*93*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37146*0 + 3*94*FLEN/8, x4, x1, x2)

inst_12383:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:37149*0 + 3*94*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37149*0 + 3*95*FLEN/8, x4, x1, x2)

inst_12384:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0x199999; valaddr_reg:x3; val_offset:37152*0 + 3*95*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37152*0 + 3*96*FLEN/8, x4, x1, x2)

inst_12385:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0x249249; valaddr_reg:x3; val_offset:37155*0 + 3*96*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37155*0 + 3*97*FLEN/8, x4, x1, x2)

inst_12386:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0x333333; valaddr_reg:x3; val_offset:37158*0 + 3*97*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37158*0 + 3*98*FLEN/8, x4, x1, x2)

inst_12387:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0x36db6d; valaddr_reg:x3; val_offset:37161*0 + 3*98*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37161*0 + 3*99*FLEN/8, x4, x1, x2)

inst_12388:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0x3bbbbb; valaddr_reg:x3; val_offset:37164*0 + 3*99*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37164*0 + 3*100*FLEN/8, x4, x1, x2)

inst_12389:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0x444444; valaddr_reg:x3; val_offset:37167*0 + 3*100*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37167*0 + 3*101*FLEN/8, x4, x1, x2)

inst_12390:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0x4ccccc; valaddr_reg:x3; val_offset:37170*0 + 3*101*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37170*0 + 3*102*FLEN/8, x4, x1, x2)

inst_12391:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0x5b6db6; valaddr_reg:x3; val_offset:37173*0 + 3*102*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37173*0 + 3*103*FLEN/8, x4, x1, x2)

inst_12392:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0x666666; valaddr_reg:x3; val_offset:37176*0 + 3*103*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37176*0 + 3*104*FLEN/8, x4, x1, x2)

inst_12393:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0x6db6db; valaddr_reg:x3; val_offset:37179*0 + 3*104*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37179*0 + 3*105*FLEN/8, x4, x1, x2)

inst_12394:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0x7ffff8; valaddr_reg:x3; val_offset:37182*0 + 3*105*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37182*0 + 3*106*FLEN/8, x4, x1, x2)

inst_12395:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0x7ffffc; valaddr_reg:x3; val_offset:37185*0 + 3*106*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37185*0 + 3*107*FLEN/8, x4, x1, x2)

inst_12396:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0x7ffffe; valaddr_reg:x3; val_offset:37188*0 + 3*107*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37188*0 + 3*108*FLEN/8, x4, x1, x2)

inst_12397:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xe800000; valaddr_reg:x3; val_offset:37191*0 + 3*108*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37191*0 + 3*109*FLEN/8, x4, x1, x2)

inst_12398:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xe800001; valaddr_reg:x3; val_offset:37194*0 + 3*109*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37194*0 + 3*110*FLEN/8, x4, x1, x2)

inst_12399:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xe800003; valaddr_reg:x3; val_offset:37197*0 + 3*110*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37197*0 + 3*111*FLEN/8, x4, x1, x2)

inst_12400:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xe800007; valaddr_reg:x3; val_offset:37200*0 + 3*111*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37200*0 + 3*112*FLEN/8, x4, x1, x2)

inst_12401:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xe80000f; valaddr_reg:x3; val_offset:37203*0 + 3*112*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37203*0 + 3*113*FLEN/8, x4, x1, x2)

inst_12402:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xe80001f; valaddr_reg:x3; val_offset:37206*0 + 3*113*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37206*0 + 3*114*FLEN/8, x4, x1, x2)

inst_12403:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xe80003f; valaddr_reg:x3; val_offset:37209*0 + 3*114*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37209*0 + 3*115*FLEN/8, x4, x1, x2)

inst_12404:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xe80007f; valaddr_reg:x3; val_offset:37212*0 + 3*115*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37212*0 + 3*116*FLEN/8, x4, x1, x2)

inst_12405:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xe8000ff; valaddr_reg:x3; val_offset:37215*0 + 3*116*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37215*0 + 3*117*FLEN/8, x4, x1, x2)

inst_12406:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xe8001ff; valaddr_reg:x3; val_offset:37218*0 + 3*117*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37218*0 + 3*118*FLEN/8, x4, x1, x2)

inst_12407:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xe8003ff; valaddr_reg:x3; val_offset:37221*0 + 3*118*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37221*0 + 3*119*FLEN/8, x4, x1, x2)

inst_12408:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xe8007ff; valaddr_reg:x3; val_offset:37224*0 + 3*119*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37224*0 + 3*120*FLEN/8, x4, x1, x2)

inst_12409:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xe800fff; valaddr_reg:x3; val_offset:37227*0 + 3*120*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37227*0 + 3*121*FLEN/8, x4, x1, x2)

inst_12410:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xe801fff; valaddr_reg:x3; val_offset:37230*0 + 3*121*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37230*0 + 3*122*FLEN/8, x4, x1, x2)

inst_12411:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xe803fff; valaddr_reg:x3; val_offset:37233*0 + 3*122*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37233*0 + 3*123*FLEN/8, x4, x1, x2)

inst_12412:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xe807fff; valaddr_reg:x3; val_offset:37236*0 + 3*123*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37236*0 + 3*124*FLEN/8, x4, x1, x2)

inst_12413:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xe80ffff; valaddr_reg:x3; val_offset:37239*0 + 3*124*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37239*0 + 3*125*FLEN/8, x4, x1, x2)

inst_12414:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xe81ffff; valaddr_reg:x3; val_offset:37242*0 + 3*125*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37242*0 + 3*126*FLEN/8, x4, x1, x2)

inst_12415:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xe83ffff; valaddr_reg:x3; val_offset:37245*0 + 3*126*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37245*0 + 3*127*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_2)

inst_12416:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xe87ffff; valaddr_reg:x3; val_offset:37248*0 + 3*127*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37248*0 + 3*128*FLEN/8, x4, x1, x2)

inst_12417:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xe8fffff; valaddr_reg:x3; val_offset:37251*0 + 3*128*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37251*0 + 3*129*FLEN/8, x4, x1, x2)

inst_12418:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xe9fffff; valaddr_reg:x3; val_offset:37254*0 + 3*129*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37254*0 + 3*130*FLEN/8, x4, x1, x2)

inst_12419:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xebfffff; valaddr_reg:x3; val_offset:37257*0 + 3*130*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37257*0 + 3*131*FLEN/8, x4, x1, x2)

inst_12420:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xec00000; valaddr_reg:x3; val_offset:37260*0 + 3*131*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37260*0 + 3*132*FLEN/8, x4, x1, x2)

inst_12421:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xee00000; valaddr_reg:x3; val_offset:37263*0 + 3*132*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37263*0 + 3*133*FLEN/8, x4, x1, x2)

inst_12422:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xef00000; valaddr_reg:x3; val_offset:37266*0 + 3*133*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37266*0 + 3*134*FLEN/8, x4, x1, x2)

inst_12423:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xef80000; valaddr_reg:x3; val_offset:37269*0 + 3*134*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37269*0 + 3*135*FLEN/8, x4, x1, x2)

inst_12424:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xefc0000; valaddr_reg:x3; val_offset:37272*0 + 3*135*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37272*0 + 3*136*FLEN/8, x4, x1, x2)

inst_12425:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xefe0000; valaddr_reg:x3; val_offset:37275*0 + 3*136*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37275*0 + 3*137*FLEN/8, x4, x1, x2)

inst_12426:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xeff0000; valaddr_reg:x3; val_offset:37278*0 + 3*137*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37278*0 + 3*138*FLEN/8, x4, x1, x2)

inst_12427:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xeff8000; valaddr_reg:x3; val_offset:37281*0 + 3*138*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37281*0 + 3*139*FLEN/8, x4, x1, x2)

inst_12428:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xeffc000; valaddr_reg:x3; val_offset:37284*0 + 3*139*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37284*0 + 3*140*FLEN/8, x4, x1, x2)

inst_12429:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xeffe000; valaddr_reg:x3; val_offset:37287*0 + 3*140*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37287*0 + 3*141*FLEN/8, x4, x1, x2)

inst_12430:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xefff000; valaddr_reg:x3; val_offset:37290*0 + 3*141*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37290*0 + 3*142*FLEN/8, x4, x1, x2)

inst_12431:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xefff800; valaddr_reg:x3; val_offset:37293*0 + 3*142*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37293*0 + 3*143*FLEN/8, x4, x1, x2)

inst_12432:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xefffc00; valaddr_reg:x3; val_offset:37296*0 + 3*143*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37296*0 + 3*144*FLEN/8, x4, x1, x2)

inst_12433:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xefffe00; valaddr_reg:x3; val_offset:37299*0 + 3*144*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37299*0 + 3*145*FLEN/8, x4, x1, x2)

inst_12434:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xeffff00; valaddr_reg:x3; val_offset:37302*0 + 3*145*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37302*0 + 3*146*FLEN/8, x4, x1, x2)

inst_12435:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xeffff80; valaddr_reg:x3; val_offset:37305*0 + 3*146*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37305*0 + 3*147*FLEN/8, x4, x1, x2)

inst_12436:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xeffffc0; valaddr_reg:x3; val_offset:37308*0 + 3*147*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37308*0 + 3*148*FLEN/8, x4, x1, x2)

inst_12437:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xeffffe0; valaddr_reg:x3; val_offset:37311*0 + 3*148*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37311*0 + 3*149*FLEN/8, x4, x1, x2)

inst_12438:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xefffff0; valaddr_reg:x3; val_offset:37314*0 + 3*149*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37314*0 + 3*150*FLEN/8, x4, x1, x2)

inst_12439:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xefffff8; valaddr_reg:x3; val_offset:37317*0 + 3*150*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37317*0 + 3*151*FLEN/8, x4, x1, x2)

inst_12440:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xefffffc; valaddr_reg:x3; val_offset:37320*0 + 3*151*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37320*0 + 3*152*FLEN/8, x4, x1, x2)

inst_12441:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xefffffe; valaddr_reg:x3; val_offset:37323*0 + 3*152*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37323*0 + 3*153*FLEN/8, x4, x1, x2)

inst_12442:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7dffab and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7dffab; op2val:0x0;
op3val:0xeffffff; valaddr_reg:x3; val_offset:37326*0 + 3*153*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37326*0 + 3*154*FLEN/8, x4, x1, x2)

inst_12443:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x80800001; valaddr_reg:x3; val_offset:37329*0 + 3*154*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37329*0 + 3*155*FLEN/8, x4, x1, x2)

inst_12444:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x80800003; valaddr_reg:x3; val_offset:37332*0 + 3*155*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37332*0 + 3*156*FLEN/8, x4, x1, x2)

inst_12445:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x80800007; valaddr_reg:x3; val_offset:37335*0 + 3*156*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37335*0 + 3*157*FLEN/8, x4, x1, x2)

inst_12446:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x80999999; valaddr_reg:x3; val_offset:37338*0 + 3*157*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37338*0 + 3*158*FLEN/8, x4, x1, x2)

inst_12447:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x80a49249; valaddr_reg:x3; val_offset:37341*0 + 3*158*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37341*0 + 3*159*FLEN/8, x4, x1, x2)

inst_12448:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x80b33333; valaddr_reg:x3; val_offset:37344*0 + 3*159*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37344*0 + 3*160*FLEN/8, x4, x1, x2)

inst_12449:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x80b6db6d; valaddr_reg:x3; val_offset:37347*0 + 3*160*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37347*0 + 3*161*FLEN/8, x4, x1, x2)

inst_12450:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:37350*0 + 3*161*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37350*0 + 3*162*FLEN/8, x4, x1, x2)

inst_12451:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x80c44444; valaddr_reg:x3; val_offset:37353*0 + 3*162*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37353*0 + 3*163*FLEN/8, x4, x1, x2)

inst_12452:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x80cccccc; valaddr_reg:x3; val_offset:37356*0 + 3*163*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37356*0 + 3*164*FLEN/8, x4, x1, x2)

inst_12453:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x80db6db6; valaddr_reg:x3; val_offset:37359*0 + 3*164*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37359*0 + 3*165*FLEN/8, x4, x1, x2)

inst_12454:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x80e66666; valaddr_reg:x3; val_offset:37362*0 + 3*165*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37362*0 + 3*166*FLEN/8, x4, x1, x2)

inst_12455:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x80edb6db; valaddr_reg:x3; val_offset:37365*0 + 3*166*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37365*0 + 3*167*FLEN/8, x4, x1, x2)

inst_12456:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x80fffff8; valaddr_reg:x3; val_offset:37368*0 + 3*167*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37368*0 + 3*168*FLEN/8, x4, x1, x2)

inst_12457:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x80fffffc; valaddr_reg:x3; val_offset:37371*0 + 3*168*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37371*0 + 3*169*FLEN/8, x4, x1, x2)

inst_12458:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x80fffffe; valaddr_reg:x3; val_offset:37374*0 + 3*169*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37374*0 + 3*170*FLEN/8, x4, x1, x2)

inst_12459:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a000000; valaddr_reg:x3; val_offset:37377*0 + 3*170*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37377*0 + 3*171*FLEN/8, x4, x1, x2)

inst_12460:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a000001; valaddr_reg:x3; val_offset:37380*0 + 3*171*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37380*0 + 3*172*FLEN/8, x4, x1, x2)

inst_12461:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a000003; valaddr_reg:x3; val_offset:37383*0 + 3*172*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37383*0 + 3*173*FLEN/8, x4, x1, x2)

inst_12462:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a000007; valaddr_reg:x3; val_offset:37386*0 + 3*173*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37386*0 + 3*174*FLEN/8, x4, x1, x2)

inst_12463:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a00000f; valaddr_reg:x3; val_offset:37389*0 + 3*174*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37389*0 + 3*175*FLEN/8, x4, x1, x2)

inst_12464:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a00001f; valaddr_reg:x3; val_offset:37392*0 + 3*175*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37392*0 + 3*176*FLEN/8, x4, x1, x2)

inst_12465:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a00003f; valaddr_reg:x3; val_offset:37395*0 + 3*176*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37395*0 + 3*177*FLEN/8, x4, x1, x2)

inst_12466:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a00007f; valaddr_reg:x3; val_offset:37398*0 + 3*177*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37398*0 + 3*178*FLEN/8, x4, x1, x2)

inst_12467:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a0000ff; valaddr_reg:x3; val_offset:37401*0 + 3*178*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37401*0 + 3*179*FLEN/8, x4, x1, x2)

inst_12468:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a0001ff; valaddr_reg:x3; val_offset:37404*0 + 3*179*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37404*0 + 3*180*FLEN/8, x4, x1, x2)

inst_12469:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a0003ff; valaddr_reg:x3; val_offset:37407*0 + 3*180*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37407*0 + 3*181*FLEN/8, x4, x1, x2)

inst_12470:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a0007ff; valaddr_reg:x3; val_offset:37410*0 + 3*181*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37410*0 + 3*182*FLEN/8, x4, x1, x2)

inst_12471:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a000fff; valaddr_reg:x3; val_offset:37413*0 + 3*182*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37413*0 + 3*183*FLEN/8, x4, x1, x2)

inst_12472:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a001fff; valaddr_reg:x3; val_offset:37416*0 + 3*183*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37416*0 + 3*184*FLEN/8, x4, x1, x2)

inst_12473:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a003fff; valaddr_reg:x3; val_offset:37419*0 + 3*184*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37419*0 + 3*185*FLEN/8, x4, x1, x2)

inst_12474:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a007fff; valaddr_reg:x3; val_offset:37422*0 + 3*185*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37422*0 + 3*186*FLEN/8, x4, x1, x2)

inst_12475:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a00ffff; valaddr_reg:x3; val_offset:37425*0 + 3*186*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37425*0 + 3*187*FLEN/8, x4, x1, x2)

inst_12476:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a01ffff; valaddr_reg:x3; val_offset:37428*0 + 3*187*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37428*0 + 3*188*FLEN/8, x4, x1, x2)

inst_12477:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a03ffff; valaddr_reg:x3; val_offset:37431*0 + 3*188*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37431*0 + 3*189*FLEN/8, x4, x1, x2)

inst_12478:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a07ffff; valaddr_reg:x3; val_offset:37434*0 + 3*189*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37434*0 + 3*190*FLEN/8, x4, x1, x2)

inst_12479:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a0fffff; valaddr_reg:x3; val_offset:37437*0 + 3*190*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37437*0 + 3*191*FLEN/8, x4, x1, x2)

inst_12480:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a1fffff; valaddr_reg:x3; val_offset:37440*0 + 3*191*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37440*0 + 3*192*FLEN/8, x4, x1, x2)

inst_12481:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a3fffff; valaddr_reg:x3; val_offset:37443*0 + 3*192*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37443*0 + 3*193*FLEN/8, x4, x1, x2)

inst_12482:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a400000; valaddr_reg:x3; val_offset:37446*0 + 3*193*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37446*0 + 3*194*FLEN/8, x4, x1, x2)

inst_12483:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a600000; valaddr_reg:x3; val_offset:37449*0 + 3*194*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37449*0 + 3*195*FLEN/8, x4, x1, x2)

inst_12484:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a700000; valaddr_reg:x3; val_offset:37452*0 + 3*195*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37452*0 + 3*196*FLEN/8, x4, x1, x2)

inst_12485:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a780000; valaddr_reg:x3; val_offset:37455*0 + 3*196*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37455*0 + 3*197*FLEN/8, x4, x1, x2)

inst_12486:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a7c0000; valaddr_reg:x3; val_offset:37458*0 + 3*197*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37458*0 + 3*198*FLEN/8, x4, x1, x2)

inst_12487:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a7e0000; valaddr_reg:x3; val_offset:37461*0 + 3*198*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37461*0 + 3*199*FLEN/8, x4, x1, x2)

inst_12488:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a7f0000; valaddr_reg:x3; val_offset:37464*0 + 3*199*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37464*0 + 3*200*FLEN/8, x4, x1, x2)

inst_12489:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a7f8000; valaddr_reg:x3; val_offset:37467*0 + 3*200*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37467*0 + 3*201*FLEN/8, x4, x1, x2)

inst_12490:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a7fc000; valaddr_reg:x3; val_offset:37470*0 + 3*201*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37470*0 + 3*202*FLEN/8, x4, x1, x2)

inst_12491:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a7fe000; valaddr_reg:x3; val_offset:37473*0 + 3*202*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37473*0 + 3*203*FLEN/8, x4, x1, x2)

inst_12492:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a7ff000; valaddr_reg:x3; val_offset:37476*0 + 3*203*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37476*0 + 3*204*FLEN/8, x4, x1, x2)

inst_12493:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a7ff800; valaddr_reg:x3; val_offset:37479*0 + 3*204*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37479*0 + 3*205*FLEN/8, x4, x1, x2)

inst_12494:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a7ffc00; valaddr_reg:x3; val_offset:37482*0 + 3*205*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37482*0 + 3*206*FLEN/8, x4, x1, x2)

inst_12495:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a7ffe00; valaddr_reg:x3; val_offset:37485*0 + 3*206*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37485*0 + 3*207*FLEN/8, x4, x1, x2)

inst_12496:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a7fff00; valaddr_reg:x3; val_offset:37488*0 + 3*207*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37488*0 + 3*208*FLEN/8, x4, x1, x2)

inst_12497:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a7fff80; valaddr_reg:x3; val_offset:37491*0 + 3*208*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37491*0 + 3*209*FLEN/8, x4, x1, x2)

inst_12498:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a7fffc0; valaddr_reg:x3; val_offset:37494*0 + 3*209*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37494*0 + 3*210*FLEN/8, x4, x1, x2)

inst_12499:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a7fffe0; valaddr_reg:x3; val_offset:37497*0 + 3*210*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37497*0 + 3*211*FLEN/8, x4, x1, x2)

inst_12500:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a7ffff0; valaddr_reg:x3; val_offset:37500*0 + 3*211*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37500*0 + 3*212*FLEN/8, x4, x1, x2)

inst_12501:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a7ffff8; valaddr_reg:x3; val_offset:37503*0 + 3*212*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37503*0 + 3*213*FLEN/8, x4, x1, x2)

inst_12502:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a7ffffc; valaddr_reg:x3; val_offset:37506*0 + 3*213*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37506*0 + 3*214*FLEN/8, x4, x1, x2)

inst_12503:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a7ffffe; valaddr_reg:x3; val_offset:37509*0 + 3*214*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37509*0 + 3*215*FLEN/8, x4, x1, x2)

inst_12504:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7e766c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7e766c; op2val:0x80000000;
op3val:0x8a7fffff; valaddr_reg:x3; val_offset:37512*0 + 3*215*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37512*0 + 3*216*FLEN/8, x4, x1, x2)

inst_12505:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb000000; valaddr_reg:x3; val_offset:37515*0 + 3*216*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37515*0 + 3*217*FLEN/8, x4, x1, x2)

inst_12506:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb000001; valaddr_reg:x3; val_offset:37518*0 + 3*217*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37518*0 + 3*218*FLEN/8, x4, x1, x2)

inst_12507:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb000003; valaddr_reg:x3; val_offset:37521*0 + 3*218*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37521*0 + 3*219*FLEN/8, x4, x1, x2)

inst_12508:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb000007; valaddr_reg:x3; val_offset:37524*0 + 3*219*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37524*0 + 3*220*FLEN/8, x4, x1, x2)

inst_12509:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb00000f; valaddr_reg:x3; val_offset:37527*0 + 3*220*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37527*0 + 3*221*FLEN/8, x4, x1, x2)

inst_12510:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb00001f; valaddr_reg:x3; val_offset:37530*0 + 3*221*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37530*0 + 3*222*FLEN/8, x4, x1, x2)

inst_12511:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb00003f; valaddr_reg:x3; val_offset:37533*0 + 3*222*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37533*0 + 3*223*FLEN/8, x4, x1, x2)

inst_12512:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb00007f; valaddr_reg:x3; val_offset:37536*0 + 3*223*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37536*0 + 3*224*FLEN/8, x4, x1, x2)

inst_12513:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb0000ff; valaddr_reg:x3; val_offset:37539*0 + 3*224*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37539*0 + 3*225*FLEN/8, x4, x1, x2)

inst_12514:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb0001ff; valaddr_reg:x3; val_offset:37542*0 + 3*225*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37542*0 + 3*226*FLEN/8, x4, x1, x2)

inst_12515:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb0003ff; valaddr_reg:x3; val_offset:37545*0 + 3*226*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37545*0 + 3*227*FLEN/8, x4, x1, x2)

inst_12516:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb0007ff; valaddr_reg:x3; val_offset:37548*0 + 3*227*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37548*0 + 3*228*FLEN/8, x4, x1, x2)

inst_12517:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb000fff; valaddr_reg:x3; val_offset:37551*0 + 3*228*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37551*0 + 3*229*FLEN/8, x4, x1, x2)

inst_12518:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb001fff; valaddr_reg:x3; val_offset:37554*0 + 3*229*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37554*0 + 3*230*FLEN/8, x4, x1, x2)

inst_12519:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb003fff; valaddr_reg:x3; val_offset:37557*0 + 3*230*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37557*0 + 3*231*FLEN/8, x4, x1, x2)

inst_12520:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb007fff; valaddr_reg:x3; val_offset:37560*0 + 3*231*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37560*0 + 3*232*FLEN/8, x4, x1, x2)

inst_12521:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb00ffff; valaddr_reg:x3; val_offset:37563*0 + 3*232*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37563*0 + 3*233*FLEN/8, x4, x1, x2)

inst_12522:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb01ffff; valaddr_reg:x3; val_offset:37566*0 + 3*233*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37566*0 + 3*234*FLEN/8, x4, x1, x2)

inst_12523:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb03ffff; valaddr_reg:x3; val_offset:37569*0 + 3*234*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37569*0 + 3*235*FLEN/8, x4, x1, x2)

inst_12524:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb07ffff; valaddr_reg:x3; val_offset:37572*0 + 3*235*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37572*0 + 3*236*FLEN/8, x4, x1, x2)

inst_12525:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb0fffff; valaddr_reg:x3; val_offset:37575*0 + 3*236*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37575*0 + 3*237*FLEN/8, x4, x1, x2)

inst_12526:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb1fffff; valaddr_reg:x3; val_offset:37578*0 + 3*237*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37578*0 + 3*238*FLEN/8, x4, x1, x2)

inst_12527:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb3fffff; valaddr_reg:x3; val_offset:37581*0 + 3*238*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37581*0 + 3*239*FLEN/8, x4, x1, x2)

inst_12528:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb400000; valaddr_reg:x3; val_offset:37584*0 + 3*239*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37584*0 + 3*240*FLEN/8, x4, x1, x2)

inst_12529:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb600000; valaddr_reg:x3; val_offset:37587*0 + 3*240*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37587*0 + 3*241*FLEN/8, x4, x1, x2)

inst_12530:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb700000; valaddr_reg:x3; val_offset:37590*0 + 3*241*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37590*0 + 3*242*FLEN/8, x4, x1, x2)

inst_12531:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb780000; valaddr_reg:x3; val_offset:37593*0 + 3*242*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37593*0 + 3*243*FLEN/8, x4, x1, x2)

inst_12532:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb7c0000; valaddr_reg:x3; val_offset:37596*0 + 3*243*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37596*0 + 3*244*FLEN/8, x4, x1, x2)

inst_12533:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb7e0000; valaddr_reg:x3; val_offset:37599*0 + 3*244*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37599*0 + 3*245*FLEN/8, x4, x1, x2)

inst_12534:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb7f0000; valaddr_reg:x3; val_offset:37602*0 + 3*245*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37602*0 + 3*246*FLEN/8, x4, x1, x2)

inst_12535:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb7f8000; valaddr_reg:x3; val_offset:37605*0 + 3*246*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37605*0 + 3*247*FLEN/8, x4, x1, x2)

inst_12536:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb7fc000; valaddr_reg:x3; val_offset:37608*0 + 3*247*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37608*0 + 3*248*FLEN/8, x4, x1, x2)

inst_12537:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb7fe000; valaddr_reg:x3; val_offset:37611*0 + 3*248*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37611*0 + 3*249*FLEN/8, x4, x1, x2)

inst_12538:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb7ff000; valaddr_reg:x3; val_offset:37614*0 + 3*249*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37614*0 + 3*250*FLEN/8, x4, x1, x2)

inst_12539:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb7ff800; valaddr_reg:x3; val_offset:37617*0 + 3*250*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37617*0 + 3*251*FLEN/8, x4, x1, x2)

inst_12540:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb7ffc00; valaddr_reg:x3; val_offset:37620*0 + 3*251*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37620*0 + 3*252*FLEN/8, x4, x1, x2)

inst_12541:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb7ffe00; valaddr_reg:x3; val_offset:37623*0 + 3*252*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37623*0 + 3*253*FLEN/8, x4, x1, x2)

inst_12542:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb7fff00; valaddr_reg:x3; val_offset:37626*0 + 3*253*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37626*0 + 3*254*FLEN/8, x4, x1, x2)

inst_12543:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb7fff80; valaddr_reg:x3; val_offset:37629*0 + 3*254*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37629*0 + 3*255*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_3)

inst_12544:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb7fffc0; valaddr_reg:x3; val_offset:37632*0 + 3*256*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37632*0 + 3*256*FLEN/8, x4, x1, x2)

inst_12545:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb7fffe0; valaddr_reg:x3; val_offset:37635*0 + 3*257*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37635*0 + 3*257*FLEN/8, x4, x1, x2)

inst_12546:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb7ffff0; valaddr_reg:x3; val_offset:37638*0 + 3*258*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37638*0 + 3*258*FLEN/8, x4, x1, x2)

inst_12547:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb7ffff8; valaddr_reg:x3; val_offset:37641*0 + 3*259*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37641*0 + 3*259*FLEN/8, x4, x1, x2)

inst_12548:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb7ffffc; valaddr_reg:x3; val_offset:37644*0 + 3*260*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37644*0 + 3*260*FLEN/8, x4, x1, x2)

inst_12549:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb7ffffe; valaddr_reg:x3; val_offset:37647*0 + 3*261*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37647*0 + 3*261*FLEN/8, x4, x1, x2)

inst_12550:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbb7fffff; valaddr_reg:x3; val_offset:37650*0 + 3*262*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37650*0 + 3*262*FLEN/8, x4, x1, x2)

inst_12551:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbf800001; valaddr_reg:x3; val_offset:37653*0 + 3*263*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37653*0 + 3*263*FLEN/8, x4, x1, x2)

inst_12552:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbf800003; valaddr_reg:x3; val_offset:37656*0 + 3*264*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37656*0 + 3*264*FLEN/8, x4, x1, x2)

inst_12553:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbf800007; valaddr_reg:x3; val_offset:37659*0 + 3*265*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37659*0 + 3*265*FLEN/8, x4, x1, x2)

inst_12554:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbf999999; valaddr_reg:x3; val_offset:37662*0 + 3*266*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37662*0 + 3*266*FLEN/8, x4, x1, x2)

inst_12555:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:37665*0 + 3*267*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37665*0 + 3*267*FLEN/8, x4, x1, x2)

inst_12556:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:37668*0 + 3*268*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37668*0 + 3*268*FLEN/8, x4, x1, x2)

inst_12557:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:37671*0 + 3*269*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37671*0 + 3*269*FLEN/8, x4, x1, x2)

inst_12558:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:37674*0 + 3*270*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37674*0 + 3*270*FLEN/8, x4, x1, x2)

inst_12559:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:37677*0 + 3*271*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37677*0 + 3*271*FLEN/8, x4, x1, x2)

inst_12560:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:37680*0 + 3*272*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37680*0 + 3*272*FLEN/8, x4, x1, x2)

inst_12561:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:37683*0 + 3*273*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37683*0 + 3*273*FLEN/8, x4, x1, x2)

inst_12562:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:37686*0 + 3*274*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37686*0 + 3*274*FLEN/8, x4, x1, x2)

inst_12563:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:37689*0 + 3*275*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37689*0 + 3*275*FLEN/8, x4, x1, x2)

inst_12564:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:37692*0 + 3*276*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37692*0 + 3*276*FLEN/8, x4, x1, x2)

inst_12565:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:37695*0 + 3*277*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37695*0 + 3*277*FLEN/8, x4, x1, x2)

inst_12566:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x007108 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7f8f5a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e807108; op2val:0x807f8f5a;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:37698*0 + 3*278*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37698*0 + 3*278*FLEN/8, x4, x1, x2)

inst_12567:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5f800000; valaddr_reg:x3; val_offset:37701*0 + 3*279*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37701*0 + 3*279*FLEN/8, x4, x1, x2)

inst_12568:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5f800001; valaddr_reg:x3; val_offset:37704*0 + 3*280*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37704*0 + 3*280*FLEN/8, x4, x1, x2)

inst_12569:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5f800003; valaddr_reg:x3; val_offset:37707*0 + 3*281*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37707*0 + 3*281*FLEN/8, x4, x1, x2)

inst_12570:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5f800007; valaddr_reg:x3; val_offset:37710*0 + 3*282*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37710*0 + 3*282*FLEN/8, x4, x1, x2)

inst_12571:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5f80000f; valaddr_reg:x3; val_offset:37713*0 + 3*283*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37713*0 + 3*283*FLEN/8, x4, x1, x2)

inst_12572:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5f80001f; valaddr_reg:x3; val_offset:37716*0 + 3*284*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37716*0 + 3*284*FLEN/8, x4, x1, x2)

inst_12573:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5f80003f; valaddr_reg:x3; val_offset:37719*0 + 3*285*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37719*0 + 3*285*FLEN/8, x4, x1, x2)

inst_12574:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5f80007f; valaddr_reg:x3; val_offset:37722*0 + 3*286*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37722*0 + 3*286*FLEN/8, x4, x1, x2)

inst_12575:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5f8000ff; valaddr_reg:x3; val_offset:37725*0 + 3*287*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37725*0 + 3*287*FLEN/8, x4, x1, x2)

inst_12576:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5f8001ff; valaddr_reg:x3; val_offset:37728*0 + 3*288*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37728*0 + 3*288*FLEN/8, x4, x1, x2)

inst_12577:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5f8003ff; valaddr_reg:x3; val_offset:37731*0 + 3*289*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37731*0 + 3*289*FLEN/8, x4, x1, x2)

inst_12578:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5f8007ff; valaddr_reg:x3; val_offset:37734*0 + 3*290*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37734*0 + 3*290*FLEN/8, x4, x1, x2)

inst_12579:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5f800fff; valaddr_reg:x3; val_offset:37737*0 + 3*291*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37737*0 + 3*291*FLEN/8, x4, x1, x2)

inst_12580:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5f801fff; valaddr_reg:x3; val_offset:37740*0 + 3*292*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37740*0 + 3*292*FLEN/8, x4, x1, x2)

inst_12581:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5f803fff; valaddr_reg:x3; val_offset:37743*0 + 3*293*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37743*0 + 3*293*FLEN/8, x4, x1, x2)

inst_12582:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5f807fff; valaddr_reg:x3; val_offset:37746*0 + 3*294*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37746*0 + 3*294*FLEN/8, x4, x1, x2)

inst_12583:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5f80ffff; valaddr_reg:x3; val_offset:37749*0 + 3*295*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37749*0 + 3*295*FLEN/8, x4, x1, x2)

inst_12584:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5f81ffff; valaddr_reg:x3; val_offset:37752*0 + 3*296*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37752*0 + 3*296*FLEN/8, x4, x1, x2)

inst_12585:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5f83ffff; valaddr_reg:x3; val_offset:37755*0 + 3*297*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37755*0 + 3*297*FLEN/8, x4, x1, x2)

inst_12586:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5f87ffff; valaddr_reg:x3; val_offset:37758*0 + 3*298*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37758*0 + 3*298*FLEN/8, x4, x1, x2)

inst_12587:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5f8fffff; valaddr_reg:x3; val_offset:37761*0 + 3*299*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37761*0 + 3*299*FLEN/8, x4, x1, x2)

inst_12588:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5f9fffff; valaddr_reg:x3; val_offset:37764*0 + 3*300*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37764*0 + 3*300*FLEN/8, x4, x1, x2)

inst_12589:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5fbfffff; valaddr_reg:x3; val_offset:37767*0 + 3*301*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37767*0 + 3*301*FLEN/8, x4, x1, x2)

inst_12590:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5fc00000; valaddr_reg:x3; val_offset:37770*0 + 3*302*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37770*0 + 3*302*FLEN/8, x4, x1, x2)

inst_12591:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5fe00000; valaddr_reg:x3; val_offset:37773*0 + 3*303*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37773*0 + 3*303*FLEN/8, x4, x1, x2)

inst_12592:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5ff00000; valaddr_reg:x3; val_offset:37776*0 + 3*304*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37776*0 + 3*304*FLEN/8, x4, x1, x2)

inst_12593:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5ff80000; valaddr_reg:x3; val_offset:37779*0 + 3*305*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37779*0 + 3*305*FLEN/8, x4, x1, x2)

inst_12594:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5ffc0000; valaddr_reg:x3; val_offset:37782*0 + 3*306*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37782*0 + 3*306*FLEN/8, x4, x1, x2)

inst_12595:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5ffe0000; valaddr_reg:x3; val_offset:37785*0 + 3*307*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37785*0 + 3*307*FLEN/8, x4, x1, x2)

inst_12596:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5fff0000; valaddr_reg:x3; val_offset:37788*0 + 3*308*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37788*0 + 3*308*FLEN/8, x4, x1, x2)

inst_12597:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5fff8000; valaddr_reg:x3; val_offset:37791*0 + 3*309*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37791*0 + 3*309*FLEN/8, x4, x1, x2)

inst_12598:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5fffc000; valaddr_reg:x3; val_offset:37794*0 + 3*310*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37794*0 + 3*310*FLEN/8, x4, x1, x2)

inst_12599:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5fffe000; valaddr_reg:x3; val_offset:37797*0 + 3*311*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37797*0 + 3*311*FLEN/8, x4, x1, x2)

inst_12600:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5ffff000; valaddr_reg:x3; val_offset:37800*0 + 3*312*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37800*0 + 3*312*FLEN/8, x4, x1, x2)

inst_12601:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5ffff800; valaddr_reg:x3; val_offset:37803*0 + 3*313*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37803*0 + 3*313*FLEN/8, x4, x1, x2)

inst_12602:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5ffffc00; valaddr_reg:x3; val_offset:37806*0 + 3*314*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37806*0 + 3*314*FLEN/8, x4, x1, x2)

inst_12603:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5ffffe00; valaddr_reg:x3; val_offset:37809*0 + 3*315*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37809*0 + 3*315*FLEN/8, x4, x1, x2)

inst_12604:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5fffff00; valaddr_reg:x3; val_offset:37812*0 + 3*316*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37812*0 + 3*316*FLEN/8, x4, x1, x2)

inst_12605:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5fffff80; valaddr_reg:x3; val_offset:37815*0 + 3*317*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37815*0 + 3*317*FLEN/8, x4, x1, x2)

inst_12606:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5fffffc0; valaddr_reg:x3; val_offset:37818*0 + 3*318*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37818*0 + 3*318*FLEN/8, x4, x1, x2)

inst_12607:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5fffffe0; valaddr_reg:x3; val_offset:37821*0 + 3*319*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37821*0 + 3*319*FLEN/8, x4, x1, x2)

inst_12608:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5ffffff0; valaddr_reg:x3; val_offset:37824*0 + 3*320*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37824*0 + 3*320*FLEN/8, x4, x1, x2)

inst_12609:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5ffffff8; valaddr_reg:x3; val_offset:37827*0 + 3*321*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37827*0 + 3*321*FLEN/8, x4, x1, x2)

inst_12610:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5ffffffc; valaddr_reg:x3; val_offset:37830*0 + 3*322*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37830*0 + 3*322*FLEN/8, x4, x1, x2)

inst_12611:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5ffffffe; valaddr_reg:x3; val_offset:37833*0 + 3*323*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37833*0 + 3*323*FLEN/8, x4, x1, x2)

inst_12612:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x5fffffff; valaddr_reg:x3; val_offset:37836*0 + 3*324*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37836*0 + 3*324*FLEN/8, x4, x1, x2)

inst_12613:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x7f000001; valaddr_reg:x3; val_offset:37839*0 + 3*325*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37839*0 + 3*325*FLEN/8, x4, x1, x2)

inst_12614:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x7f000003; valaddr_reg:x3; val_offset:37842*0 + 3*326*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37842*0 + 3*326*FLEN/8, x4, x1, x2)

inst_12615:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x7f000007; valaddr_reg:x3; val_offset:37845*0 + 3*327*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37845*0 + 3*327*FLEN/8, x4, x1, x2)

inst_12616:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x7f199999; valaddr_reg:x3; val_offset:37848*0 + 3*328*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37848*0 + 3*328*FLEN/8, x4, x1, x2)

inst_12617:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x7f249249; valaddr_reg:x3; val_offset:37851*0 + 3*329*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37851*0 + 3*329*FLEN/8, x4, x1, x2)

inst_12618:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x7f333333; valaddr_reg:x3; val_offset:37854*0 + 3*330*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37854*0 + 3*330*FLEN/8, x4, x1, x2)

inst_12619:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x7f36db6d; valaddr_reg:x3; val_offset:37857*0 + 3*331*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37857*0 + 3*331*FLEN/8, x4, x1, x2)

inst_12620:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:37860*0 + 3*332*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37860*0 + 3*332*FLEN/8, x4, x1, x2)

inst_12621:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x7f444444; valaddr_reg:x3; val_offset:37863*0 + 3*333*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37863*0 + 3*333*FLEN/8, x4, x1, x2)

inst_12622:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:37866*0 + 3*334*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37866*0 + 3*334*FLEN/8, x4, x1, x2)

inst_12623:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:37869*0 + 3*335*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37869*0 + 3*335*FLEN/8, x4, x1, x2)

inst_12624:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x7f666666; valaddr_reg:x3; val_offset:37872*0 + 3*336*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37872*0 + 3*336*FLEN/8, x4, x1, x2)

inst_12625:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x7f6db6db; valaddr_reg:x3; val_offset:37875*0 + 3*337*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37875*0 + 3*337*FLEN/8, x4, x1, x2)

inst_12626:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:37878*0 + 3*338*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37878*0 + 3*338*FLEN/8, x4, x1, x2)

inst_12627:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:37881*0 + 3*339*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37881*0 + 3*339*FLEN/8, x4, x1, x2)

inst_12628:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01ceda and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7c6f2e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81ceda; op2val:0x407c6f2e;
op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:37884*0 + 3*340*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37884*0 + 3*340*FLEN/8, x4, x1, x2)

inst_12629:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe2000000; valaddr_reg:x3; val_offset:37887*0 + 3*341*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37887*0 + 3*341*FLEN/8, x4, x1, x2)

inst_12630:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe2000001; valaddr_reg:x3; val_offset:37890*0 + 3*342*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37890*0 + 3*342*FLEN/8, x4, x1, x2)

inst_12631:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe2000003; valaddr_reg:x3; val_offset:37893*0 + 3*343*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37893*0 + 3*343*FLEN/8, x4, x1, x2)

inst_12632:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe2000007; valaddr_reg:x3; val_offset:37896*0 + 3*344*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37896*0 + 3*344*FLEN/8, x4, x1, x2)

inst_12633:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe200000f; valaddr_reg:x3; val_offset:37899*0 + 3*345*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37899*0 + 3*345*FLEN/8, x4, x1, x2)

inst_12634:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe200001f; valaddr_reg:x3; val_offset:37902*0 + 3*346*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37902*0 + 3*346*FLEN/8, x4, x1, x2)

inst_12635:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe200003f; valaddr_reg:x3; val_offset:37905*0 + 3*347*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37905*0 + 3*347*FLEN/8, x4, x1, x2)

inst_12636:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe200007f; valaddr_reg:x3; val_offset:37908*0 + 3*348*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37908*0 + 3*348*FLEN/8, x4, x1, x2)

inst_12637:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe20000ff; valaddr_reg:x3; val_offset:37911*0 + 3*349*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37911*0 + 3*349*FLEN/8, x4, x1, x2)

inst_12638:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe20001ff; valaddr_reg:x3; val_offset:37914*0 + 3*350*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37914*0 + 3*350*FLEN/8, x4, x1, x2)

inst_12639:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe20003ff; valaddr_reg:x3; val_offset:37917*0 + 3*351*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37917*0 + 3*351*FLEN/8, x4, x1, x2)

inst_12640:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe20007ff; valaddr_reg:x3; val_offset:37920*0 + 3*352*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37920*0 + 3*352*FLEN/8, x4, x1, x2)

inst_12641:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe2000fff; valaddr_reg:x3; val_offset:37923*0 + 3*353*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37923*0 + 3*353*FLEN/8, x4, x1, x2)

inst_12642:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe2001fff; valaddr_reg:x3; val_offset:37926*0 + 3*354*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37926*0 + 3*354*FLEN/8, x4, x1, x2)

inst_12643:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe2003fff; valaddr_reg:x3; val_offset:37929*0 + 3*355*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37929*0 + 3*355*FLEN/8, x4, x1, x2)

inst_12644:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe2007fff; valaddr_reg:x3; val_offset:37932*0 + 3*356*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37932*0 + 3*356*FLEN/8, x4, x1, x2)

inst_12645:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe200ffff; valaddr_reg:x3; val_offset:37935*0 + 3*357*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37935*0 + 3*357*FLEN/8, x4, x1, x2)

inst_12646:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe201ffff; valaddr_reg:x3; val_offset:37938*0 + 3*358*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37938*0 + 3*358*FLEN/8, x4, x1, x2)

inst_12647:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe203ffff; valaddr_reg:x3; val_offset:37941*0 + 3*359*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37941*0 + 3*359*FLEN/8, x4, x1, x2)

inst_12648:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe207ffff; valaddr_reg:x3; val_offset:37944*0 + 3*360*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37944*0 + 3*360*FLEN/8, x4, x1, x2)

inst_12649:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe20fffff; valaddr_reg:x3; val_offset:37947*0 + 3*361*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37947*0 + 3*361*FLEN/8, x4, x1, x2)

inst_12650:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe21fffff; valaddr_reg:x3; val_offset:37950*0 + 3*362*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37950*0 + 3*362*FLEN/8, x4, x1, x2)

inst_12651:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe23fffff; valaddr_reg:x3; val_offset:37953*0 + 3*363*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37953*0 + 3*363*FLEN/8, x4, x1, x2)

inst_12652:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe2400000; valaddr_reg:x3; val_offset:37956*0 + 3*364*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37956*0 + 3*364*FLEN/8, x4, x1, x2)

inst_12653:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe2600000; valaddr_reg:x3; val_offset:37959*0 + 3*365*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37959*0 + 3*365*FLEN/8, x4, x1, x2)

inst_12654:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe2700000; valaddr_reg:x3; val_offset:37962*0 + 3*366*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37962*0 + 3*366*FLEN/8, x4, x1, x2)

inst_12655:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe2780000; valaddr_reg:x3; val_offset:37965*0 + 3*367*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37965*0 + 3*367*FLEN/8, x4, x1, x2)

inst_12656:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe27c0000; valaddr_reg:x3; val_offset:37968*0 + 3*368*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37968*0 + 3*368*FLEN/8, x4, x1, x2)

inst_12657:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe27e0000; valaddr_reg:x3; val_offset:37971*0 + 3*369*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37971*0 + 3*369*FLEN/8, x4, x1, x2)

inst_12658:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe27f0000; valaddr_reg:x3; val_offset:37974*0 + 3*370*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37974*0 + 3*370*FLEN/8, x4, x1, x2)

inst_12659:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe27f8000; valaddr_reg:x3; val_offset:37977*0 + 3*371*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37977*0 + 3*371*FLEN/8, x4, x1, x2)

inst_12660:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe27fc000; valaddr_reg:x3; val_offset:37980*0 + 3*372*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37980*0 + 3*372*FLEN/8, x4, x1, x2)

inst_12661:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe27fe000; valaddr_reg:x3; val_offset:37983*0 + 3*373*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37983*0 + 3*373*FLEN/8, x4, x1, x2)

inst_12662:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe27ff000; valaddr_reg:x3; val_offset:37986*0 + 3*374*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37986*0 + 3*374*FLEN/8, x4, x1, x2)

inst_12663:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe27ff800; valaddr_reg:x3; val_offset:37989*0 + 3*375*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37989*0 + 3*375*FLEN/8, x4, x1, x2)

inst_12664:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe27ffc00; valaddr_reg:x3; val_offset:37992*0 + 3*376*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37992*0 + 3*376*FLEN/8, x4, x1, x2)

inst_12665:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe27ffe00; valaddr_reg:x3; val_offset:37995*0 + 3*377*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37995*0 + 3*377*FLEN/8, x4, x1, x2)

inst_12666:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe27fff00; valaddr_reg:x3; val_offset:37998*0 + 3*378*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37998*0 + 3*378*FLEN/8, x4, x1, x2)

inst_12667:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe27fff80; valaddr_reg:x3; val_offset:38001*0 + 3*379*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38001*0 + 3*379*FLEN/8, x4, x1, x2)

inst_12668:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe27fffc0; valaddr_reg:x3; val_offset:38004*0 + 3*380*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38004*0 + 3*380*FLEN/8, x4, x1, x2)

inst_12669:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe27fffe0; valaddr_reg:x3; val_offset:38007*0 + 3*381*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38007*0 + 3*381*FLEN/8, x4, x1, x2)

inst_12670:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe27ffff0; valaddr_reg:x3; val_offset:38010*0 + 3*382*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38010*0 + 3*382*FLEN/8, x4, x1, x2)

inst_12671:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe27ffff8; valaddr_reg:x3; val_offset:38013*0 + 3*383*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38013*0 + 3*383*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_4)

inst_12672:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe27ffffc; valaddr_reg:x3; val_offset:38016*0 + 3*384*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38016*0 + 3*384*FLEN/8, x4, x1, x2)

inst_12673:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe27ffffe; valaddr_reg:x3; val_offset:38019*0 + 3*385*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38019*0 + 3*385*FLEN/8, x4, x1, x2)

inst_12674:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xe27fffff; valaddr_reg:x3; val_offset:38022*0 + 3*386*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38022*0 + 3*386*FLEN/8, x4, x1, x2)

inst_12675:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xff000001; valaddr_reg:x3; val_offset:38025*0 + 3*387*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38025*0 + 3*387*FLEN/8, x4, x1, x2)

inst_12676:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xff000003; valaddr_reg:x3; val_offset:38028*0 + 3*388*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38028*0 + 3*388*FLEN/8, x4, x1, x2)

inst_12677:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xff000007; valaddr_reg:x3; val_offset:38031*0 + 3*389*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38031*0 + 3*389*FLEN/8, x4, x1, x2)

inst_12678:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xff199999; valaddr_reg:x3; val_offset:38034*0 + 3*390*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38034*0 + 3*390*FLEN/8, x4, x1, x2)

inst_12679:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xff249249; valaddr_reg:x3; val_offset:38037*0 + 3*391*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38037*0 + 3*391*FLEN/8, x4, x1, x2)

inst_12680:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xff333333; valaddr_reg:x3; val_offset:38040*0 + 3*392*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38040*0 + 3*392*FLEN/8, x4, x1, x2)

inst_12681:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xff36db6d; valaddr_reg:x3; val_offset:38043*0 + 3*393*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38043*0 + 3*393*FLEN/8, x4, x1, x2)

inst_12682:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:38046*0 + 3*394*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38046*0 + 3*394*FLEN/8, x4, x1, x2)

inst_12683:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xff444444; valaddr_reg:x3; val_offset:38049*0 + 3*395*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38049*0 + 3*395*FLEN/8, x4, x1, x2)

inst_12684:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xff4ccccc; valaddr_reg:x3; val_offset:38052*0 + 3*396*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38052*0 + 3*396*FLEN/8, x4, x1, x2)

inst_12685:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xff5b6db6; valaddr_reg:x3; val_offset:38055*0 + 3*397*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38055*0 + 3*397*FLEN/8, x4, x1, x2)

inst_12686:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xff666666; valaddr_reg:x3; val_offset:38058*0 + 3*398*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38058*0 + 3*398*FLEN/8, x4, x1, x2)

inst_12687:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xff6db6db; valaddr_reg:x3; val_offset:38061*0 + 3*399*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38061*0 + 3*399*FLEN/8, x4, x1, x2)

inst_12688:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xff7ffff8; valaddr_reg:x3; val_offset:38064*0 + 3*400*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38064*0 + 3*400*FLEN/8, x4, x1, x2)

inst_12689:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xff7ffffc; valaddr_reg:x3; val_offset:38067*0 + 3*401*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38067*0 + 3*401*FLEN/8, x4, x1, x2)

inst_12690:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02ce1a and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7a8296 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82ce1a; op2val:0xc07a8296;
op3val:0xff7ffffe; valaddr_reg:x3; val_offset:38070*0 + 3*402*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38070*0 + 3*402*FLEN/8, x4, x1, x2)

inst_12691:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x3f800001; valaddr_reg:x3; val_offset:38073*0 + 3*403*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38073*0 + 3*403*FLEN/8, x4, x1, x2)

inst_12692:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x3f800003; valaddr_reg:x3; val_offset:38076*0 + 3*404*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38076*0 + 3*404*FLEN/8, x4, x1, x2)

inst_12693:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x3f800007; valaddr_reg:x3; val_offset:38079*0 + 3*405*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38079*0 + 3*405*FLEN/8, x4, x1, x2)

inst_12694:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x3f999999; valaddr_reg:x3; val_offset:38082*0 + 3*406*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38082*0 + 3*406*FLEN/8, x4, x1, x2)

inst_12695:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x3fa49249; valaddr_reg:x3; val_offset:38085*0 + 3*407*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38085*0 + 3*407*FLEN/8, x4, x1, x2)

inst_12696:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x3fb33333; valaddr_reg:x3; val_offset:38088*0 + 3*408*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38088*0 + 3*408*FLEN/8, x4, x1, x2)

inst_12697:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:38091*0 + 3*409*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38091*0 + 3*409*FLEN/8, x4, x1, x2)

inst_12698:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:38094*0 + 3*410*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38094*0 + 3*410*FLEN/8, x4, x1, x2)

inst_12699:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x3fc44444; valaddr_reg:x3; val_offset:38097*0 + 3*411*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38097*0 + 3*411*FLEN/8, x4, x1, x2)

inst_12700:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x3fcccccc; valaddr_reg:x3; val_offset:38100*0 + 3*412*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38100*0 + 3*412*FLEN/8, x4, x1, x2)

inst_12701:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:38103*0 + 3*413*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38103*0 + 3*413*FLEN/8, x4, x1, x2)

inst_12702:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x3fe66666; valaddr_reg:x3; val_offset:38106*0 + 3*414*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38106*0 + 3*414*FLEN/8, x4, x1, x2)

inst_12703:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x3fedb6db; valaddr_reg:x3; val_offset:38109*0 + 3*415*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38109*0 + 3*415*FLEN/8, x4, x1, x2)

inst_12704:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x3ffffff8; valaddr_reg:x3; val_offset:38112*0 + 3*416*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38112*0 + 3*416*FLEN/8, x4, x1, x2)

inst_12705:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x3ffffffc; valaddr_reg:x3; val_offset:38115*0 + 3*417*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38115*0 + 3*417*FLEN/8, x4, x1, x2)

inst_12706:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x3ffffffe; valaddr_reg:x3; val_offset:38118*0 + 3*418*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38118*0 + 3*418*FLEN/8, x4, x1, x2)

inst_12707:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x42000000; valaddr_reg:x3; val_offset:38121*0 + 3*419*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38121*0 + 3*419*FLEN/8, x4, x1, x2)

inst_12708:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x42000001; valaddr_reg:x3; val_offset:38124*0 + 3*420*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38124*0 + 3*420*FLEN/8, x4, x1, x2)

inst_12709:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x42000003; valaddr_reg:x3; val_offset:38127*0 + 3*421*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38127*0 + 3*421*FLEN/8, x4, x1, x2)

inst_12710:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x42000007; valaddr_reg:x3; val_offset:38130*0 + 3*422*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38130*0 + 3*422*FLEN/8, x4, x1, x2)

inst_12711:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x4200000f; valaddr_reg:x3; val_offset:38133*0 + 3*423*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38133*0 + 3*423*FLEN/8, x4, x1, x2)

inst_12712:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x4200001f; valaddr_reg:x3; val_offset:38136*0 + 3*424*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38136*0 + 3*424*FLEN/8, x4, x1, x2)

inst_12713:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x4200003f; valaddr_reg:x3; val_offset:38139*0 + 3*425*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38139*0 + 3*425*FLEN/8, x4, x1, x2)

inst_12714:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x4200007f; valaddr_reg:x3; val_offset:38142*0 + 3*426*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38142*0 + 3*426*FLEN/8, x4, x1, x2)

inst_12715:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x420000ff; valaddr_reg:x3; val_offset:38145*0 + 3*427*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38145*0 + 3*427*FLEN/8, x4, x1, x2)

inst_12716:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x420001ff; valaddr_reg:x3; val_offset:38148*0 + 3*428*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38148*0 + 3*428*FLEN/8, x4, x1, x2)

inst_12717:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x420003ff; valaddr_reg:x3; val_offset:38151*0 + 3*429*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38151*0 + 3*429*FLEN/8, x4, x1, x2)

inst_12718:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x420007ff; valaddr_reg:x3; val_offset:38154*0 + 3*430*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38154*0 + 3*430*FLEN/8, x4, x1, x2)

inst_12719:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x42000fff; valaddr_reg:x3; val_offset:38157*0 + 3*431*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38157*0 + 3*431*FLEN/8, x4, x1, x2)

inst_12720:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x42001fff; valaddr_reg:x3; val_offset:38160*0 + 3*432*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38160*0 + 3*432*FLEN/8, x4, x1, x2)

inst_12721:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x42003fff; valaddr_reg:x3; val_offset:38163*0 + 3*433*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38163*0 + 3*433*FLEN/8, x4, x1, x2)

inst_12722:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x42007fff; valaddr_reg:x3; val_offset:38166*0 + 3*434*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38166*0 + 3*434*FLEN/8, x4, x1, x2)

inst_12723:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x4200ffff; valaddr_reg:x3; val_offset:38169*0 + 3*435*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38169*0 + 3*435*FLEN/8, x4, x1, x2)

inst_12724:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x4201ffff; valaddr_reg:x3; val_offset:38172*0 + 3*436*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38172*0 + 3*436*FLEN/8, x4, x1, x2)

inst_12725:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x4203ffff; valaddr_reg:x3; val_offset:38175*0 + 3*437*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38175*0 + 3*437*FLEN/8, x4, x1, x2)

inst_12726:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x4207ffff; valaddr_reg:x3; val_offset:38178*0 + 3*438*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38178*0 + 3*438*FLEN/8, x4, x1, x2)

inst_12727:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x420fffff; valaddr_reg:x3; val_offset:38181*0 + 3*439*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38181*0 + 3*439*FLEN/8, x4, x1, x2)

inst_12728:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x421fffff; valaddr_reg:x3; val_offset:38184*0 + 3*440*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38184*0 + 3*440*FLEN/8, x4, x1, x2)

inst_12729:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x423fffff; valaddr_reg:x3; val_offset:38187*0 + 3*441*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38187*0 + 3*441*FLEN/8, x4, x1, x2)

inst_12730:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x42400000; valaddr_reg:x3; val_offset:38190*0 + 3*442*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38190*0 + 3*442*FLEN/8, x4, x1, x2)

inst_12731:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x42600000; valaddr_reg:x3; val_offset:38193*0 + 3*443*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38193*0 + 3*443*FLEN/8, x4, x1, x2)

inst_12732:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x42700000; valaddr_reg:x3; val_offset:38196*0 + 3*444*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38196*0 + 3*444*FLEN/8, x4, x1, x2)

inst_12733:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x42780000; valaddr_reg:x3; val_offset:38199*0 + 3*445*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38199*0 + 3*445*FLEN/8, x4, x1, x2)

inst_12734:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x427c0000; valaddr_reg:x3; val_offset:38202*0 + 3*446*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38202*0 + 3*446*FLEN/8, x4, x1, x2)

inst_12735:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x427e0000; valaddr_reg:x3; val_offset:38205*0 + 3*447*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38205*0 + 3*447*FLEN/8, x4, x1, x2)

inst_12736:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x427f0000; valaddr_reg:x3; val_offset:38208*0 + 3*448*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38208*0 + 3*448*FLEN/8, x4, x1, x2)

inst_12737:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x427f8000; valaddr_reg:x3; val_offset:38211*0 + 3*449*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38211*0 + 3*449*FLEN/8, x4, x1, x2)

inst_12738:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x427fc000; valaddr_reg:x3; val_offset:38214*0 + 3*450*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38214*0 + 3*450*FLEN/8, x4, x1, x2)

inst_12739:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x427fe000; valaddr_reg:x3; val_offset:38217*0 + 3*451*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38217*0 + 3*451*FLEN/8, x4, x1, x2)

inst_12740:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x427ff000; valaddr_reg:x3; val_offset:38220*0 + 3*452*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38220*0 + 3*452*FLEN/8, x4, x1, x2)

inst_12741:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x427ff800; valaddr_reg:x3; val_offset:38223*0 + 3*453*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38223*0 + 3*453*FLEN/8, x4, x1, x2)

inst_12742:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x427ffc00; valaddr_reg:x3; val_offset:38226*0 + 3*454*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38226*0 + 3*454*FLEN/8, x4, x1, x2)

inst_12743:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x427ffe00; valaddr_reg:x3; val_offset:38229*0 + 3*455*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38229*0 + 3*455*FLEN/8, x4, x1, x2)

inst_12744:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x427fff00; valaddr_reg:x3; val_offset:38232*0 + 3*456*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38232*0 + 3*456*FLEN/8, x4, x1, x2)

inst_12745:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x427fff80; valaddr_reg:x3; val_offset:38235*0 + 3*457*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38235*0 + 3*457*FLEN/8, x4, x1, x2)

inst_12746:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x427fffc0; valaddr_reg:x3; val_offset:38238*0 + 3*458*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38238*0 + 3*458*FLEN/8, x4, x1, x2)

inst_12747:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x427fffe0; valaddr_reg:x3; val_offset:38241*0 + 3*459*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38241*0 + 3*459*FLEN/8, x4, x1, x2)

inst_12748:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x427ffff0; valaddr_reg:x3; val_offset:38244*0 + 3*460*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38244*0 + 3*460*FLEN/8, x4, x1, x2)

inst_12749:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x427ffff8; valaddr_reg:x3; val_offset:38247*0 + 3*461*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38247*0 + 3*461*FLEN/8, x4, x1, x2)

inst_12750:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x427ffffc; valaddr_reg:x3; val_offset:38250*0 + 3*462*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38250*0 + 3*462*FLEN/8, x4, x1, x2)

inst_12751:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x427ffffe; valaddr_reg:x3; val_offset:38253*0 + 3*463*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38253*0 + 3*463*FLEN/8, x4, x1, x2)

inst_12752:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02f6ae and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7d1a7d and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82f6ae; op2val:0x7d1a7d;
op3val:0x427fffff; valaddr_reg:x3; val_offset:38256*0 + 3*464*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38256*0 + 3*464*FLEN/8, x4, x1, x2)

inst_12753:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x23000000; valaddr_reg:x3; val_offset:38259*0 + 3*465*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38259*0 + 3*465*FLEN/8, x4, x1, x2)

inst_12754:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x23000001; valaddr_reg:x3; val_offset:38262*0 + 3*466*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38262*0 + 3*466*FLEN/8, x4, x1, x2)

inst_12755:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x23000003; valaddr_reg:x3; val_offset:38265*0 + 3*467*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38265*0 + 3*467*FLEN/8, x4, x1, x2)

inst_12756:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x23000007; valaddr_reg:x3; val_offset:38268*0 + 3*468*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38268*0 + 3*468*FLEN/8, x4, x1, x2)

inst_12757:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x2300000f; valaddr_reg:x3; val_offset:38271*0 + 3*469*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38271*0 + 3*469*FLEN/8, x4, x1, x2)

inst_12758:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x2300001f; valaddr_reg:x3; val_offset:38274*0 + 3*470*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38274*0 + 3*470*FLEN/8, x4, x1, x2)

inst_12759:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x2300003f; valaddr_reg:x3; val_offset:38277*0 + 3*471*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38277*0 + 3*471*FLEN/8, x4, x1, x2)

inst_12760:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x2300007f; valaddr_reg:x3; val_offset:38280*0 + 3*472*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38280*0 + 3*472*FLEN/8, x4, x1, x2)

inst_12761:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x230000ff; valaddr_reg:x3; val_offset:38283*0 + 3*473*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38283*0 + 3*473*FLEN/8, x4, x1, x2)

inst_12762:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x230001ff; valaddr_reg:x3; val_offset:38286*0 + 3*474*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38286*0 + 3*474*FLEN/8, x4, x1, x2)

inst_12763:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x230003ff; valaddr_reg:x3; val_offset:38289*0 + 3*475*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38289*0 + 3*475*FLEN/8, x4, x1, x2)

inst_12764:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x230007ff; valaddr_reg:x3; val_offset:38292*0 + 3*476*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38292*0 + 3*476*FLEN/8, x4, x1, x2)

inst_12765:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x23000fff; valaddr_reg:x3; val_offset:38295*0 + 3*477*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38295*0 + 3*477*FLEN/8, x4, x1, x2)

inst_12766:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x23001fff; valaddr_reg:x3; val_offset:38298*0 + 3*478*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38298*0 + 3*478*FLEN/8, x4, x1, x2)

inst_12767:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x23003fff; valaddr_reg:x3; val_offset:38301*0 + 3*479*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38301*0 + 3*479*FLEN/8, x4, x1, x2)

inst_12768:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x23007fff; valaddr_reg:x3; val_offset:38304*0 + 3*480*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38304*0 + 3*480*FLEN/8, x4, x1, x2)

inst_12769:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x2300ffff; valaddr_reg:x3; val_offset:38307*0 + 3*481*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38307*0 + 3*481*FLEN/8, x4, x1, x2)

inst_12770:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x2301ffff; valaddr_reg:x3; val_offset:38310*0 + 3*482*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38310*0 + 3*482*FLEN/8, x4, x1, x2)

inst_12771:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x2303ffff; valaddr_reg:x3; val_offset:38313*0 + 3*483*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38313*0 + 3*483*FLEN/8, x4, x1, x2)

inst_12772:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x2307ffff; valaddr_reg:x3; val_offset:38316*0 + 3*484*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38316*0 + 3*484*FLEN/8, x4, x1, x2)

inst_12773:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x230fffff; valaddr_reg:x3; val_offset:38319*0 + 3*485*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38319*0 + 3*485*FLEN/8, x4, x1, x2)

inst_12774:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x231fffff; valaddr_reg:x3; val_offset:38322*0 + 3*486*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38322*0 + 3*486*FLEN/8, x4, x1, x2)

inst_12775:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x233fffff; valaddr_reg:x3; val_offset:38325*0 + 3*487*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38325*0 + 3*487*FLEN/8, x4, x1, x2)

inst_12776:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x23400000; valaddr_reg:x3; val_offset:38328*0 + 3*488*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38328*0 + 3*488*FLEN/8, x4, x1, x2)

inst_12777:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x23600000; valaddr_reg:x3; val_offset:38331*0 + 3*489*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38331*0 + 3*489*FLEN/8, x4, x1, x2)

inst_12778:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x23700000; valaddr_reg:x3; val_offset:38334*0 + 3*490*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38334*0 + 3*490*FLEN/8, x4, x1, x2)

inst_12779:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x23780000; valaddr_reg:x3; val_offset:38337*0 + 3*491*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38337*0 + 3*491*FLEN/8, x4, x1, x2)

inst_12780:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x237c0000; valaddr_reg:x3; val_offset:38340*0 + 3*492*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38340*0 + 3*492*FLEN/8, x4, x1, x2)

inst_12781:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x237e0000; valaddr_reg:x3; val_offset:38343*0 + 3*493*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38343*0 + 3*493*FLEN/8, x4, x1, x2)

inst_12782:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x237f0000; valaddr_reg:x3; val_offset:38346*0 + 3*494*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38346*0 + 3*494*FLEN/8, x4, x1, x2)

inst_12783:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x237f8000; valaddr_reg:x3; val_offset:38349*0 + 3*495*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38349*0 + 3*495*FLEN/8, x4, x1, x2)

inst_12784:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x237fc000; valaddr_reg:x3; val_offset:38352*0 + 3*496*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38352*0 + 3*496*FLEN/8, x4, x1, x2)

inst_12785:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x237fe000; valaddr_reg:x3; val_offset:38355*0 + 3*497*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38355*0 + 3*497*FLEN/8, x4, x1, x2)

inst_12786:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x237ff000; valaddr_reg:x3; val_offset:38358*0 + 3*498*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38358*0 + 3*498*FLEN/8, x4, x1, x2)

inst_12787:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x237ff800; valaddr_reg:x3; val_offset:38361*0 + 3*499*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38361*0 + 3*499*FLEN/8, x4, x1, x2)

inst_12788:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x237ffc00; valaddr_reg:x3; val_offset:38364*0 + 3*500*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38364*0 + 3*500*FLEN/8, x4, x1, x2)

inst_12789:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x237ffe00; valaddr_reg:x3; val_offset:38367*0 + 3*501*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38367*0 + 3*501*FLEN/8, x4, x1, x2)

inst_12790:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x237fff00; valaddr_reg:x3; val_offset:38370*0 + 3*502*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38370*0 + 3*502*FLEN/8, x4, x1, x2)

inst_12791:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x237fff80; valaddr_reg:x3; val_offset:38373*0 + 3*503*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38373*0 + 3*503*FLEN/8, x4, x1, x2)

inst_12792:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x237fffc0; valaddr_reg:x3; val_offset:38376*0 + 3*504*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38376*0 + 3*504*FLEN/8, x4, x1, x2)

inst_12793:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x237fffe0; valaddr_reg:x3; val_offset:38379*0 + 3*505*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38379*0 + 3*505*FLEN/8, x4, x1, x2)

inst_12794:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x237ffff0; valaddr_reg:x3; val_offset:38382*0 + 3*506*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38382*0 + 3*506*FLEN/8, x4, x1, x2)

inst_12795:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x237ffff8; valaddr_reg:x3; val_offset:38385*0 + 3*507*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38385*0 + 3*507*FLEN/8, x4, x1, x2)

inst_12796:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x237ffffc; valaddr_reg:x3; val_offset:38388*0 + 3*508*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38388*0 + 3*508*FLEN/8, x4, x1, x2)

inst_12797:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x237ffffe; valaddr_reg:x3; val_offset:38391*0 + 3*509*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38391*0 + 3*509*FLEN/8, x4, x1, x2)

inst_12798:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x237fffff; valaddr_reg:x3; val_offset:38394*0 + 3*510*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38394*0 + 3*510*FLEN/8, x4, x1, x2)

inst_12799:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x3f800001; valaddr_reg:x3; val_offset:38397*0 + 3*511*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38397*0 + 3*511*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_5)

inst_12800:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x3f800003; valaddr_reg:x3; val_offset:38400*0 + 3*512*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38400*0 + 3*512*FLEN/8, x4, x1, x2)

inst_12801:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x3f800007; valaddr_reg:x3; val_offset:38403*0 + 3*513*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38403*0 + 3*513*FLEN/8, x4, x1, x2)

inst_12802:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x3f999999; valaddr_reg:x3; val_offset:38406*0 + 3*514*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38406*0 + 3*514*FLEN/8, x4, x1, x2)

inst_12803:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x3fa49249; valaddr_reg:x3; val_offset:38409*0 + 3*515*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38409*0 + 3*515*FLEN/8, x4, x1, x2)

inst_12804:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x3fb33333; valaddr_reg:x3; val_offset:38412*0 + 3*516*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38412*0 + 3*516*FLEN/8, x4, x1, x2)

inst_12805:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:38415*0 + 3*517*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38415*0 + 3*517*FLEN/8, x4, x1, x2)

inst_12806:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:38418*0 + 3*518*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38418*0 + 3*518*FLEN/8, x4, x1, x2)

inst_12807:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x3fc44444; valaddr_reg:x3; val_offset:38421*0 + 3*519*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38421*0 + 3*519*FLEN/8, x4, x1, x2)

inst_12808:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x3fcccccc; valaddr_reg:x3; val_offset:38424*0 + 3*520*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38424*0 + 3*520*FLEN/8, x4, x1, x2)

inst_12809:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:38427*0 + 3*521*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38427*0 + 3*521*FLEN/8, x4, x1, x2)

inst_12810:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x3fe66666; valaddr_reg:x3; val_offset:38430*0 + 3*522*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38430*0 + 3*522*FLEN/8, x4, x1, x2)

inst_12811:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x3fedb6db; valaddr_reg:x3; val_offset:38433*0 + 3*523*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38433*0 + 3*523*FLEN/8, x4, x1, x2)

inst_12812:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x3ffffff8; valaddr_reg:x3; val_offset:38436*0 + 3*524*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38436*0 + 3*524*FLEN/8, x4, x1, x2)

inst_12813:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x3ffffffc; valaddr_reg:x3; val_offset:38439*0 + 3*525*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38439*0 + 3*525*FLEN/8, x4, x1, x2)

inst_12814:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031ec6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7cf43b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e831ec6; op2val:0x7cf43b;
op3val:0x3ffffffe; valaddr_reg:x3; val_offset:38442*0 + 3*526*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38442*0 + 3*526*FLEN/8, x4, x1, x2)

inst_12815:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb8800000; valaddr_reg:x3; val_offset:38445*0 + 3*527*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38445*0 + 3*527*FLEN/8, x4, x1, x2)

inst_12816:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb8800001; valaddr_reg:x3; val_offset:38448*0 + 3*528*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38448*0 + 3*528*FLEN/8, x4, x1, x2)

inst_12817:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb8800003; valaddr_reg:x3; val_offset:38451*0 + 3*529*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38451*0 + 3*529*FLEN/8, x4, x1, x2)

inst_12818:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb8800007; valaddr_reg:x3; val_offset:38454*0 + 3*530*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38454*0 + 3*530*FLEN/8, x4, x1, x2)

inst_12819:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb880000f; valaddr_reg:x3; val_offset:38457*0 + 3*531*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38457*0 + 3*531*FLEN/8, x4, x1, x2)

inst_12820:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb880001f; valaddr_reg:x3; val_offset:38460*0 + 3*532*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38460*0 + 3*532*FLEN/8, x4, x1, x2)

inst_12821:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb880003f; valaddr_reg:x3; val_offset:38463*0 + 3*533*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38463*0 + 3*533*FLEN/8, x4, x1, x2)

inst_12822:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb880007f; valaddr_reg:x3; val_offset:38466*0 + 3*534*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38466*0 + 3*534*FLEN/8, x4, x1, x2)

inst_12823:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb88000ff; valaddr_reg:x3; val_offset:38469*0 + 3*535*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38469*0 + 3*535*FLEN/8, x4, x1, x2)

inst_12824:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb88001ff; valaddr_reg:x3; val_offset:38472*0 + 3*536*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38472*0 + 3*536*FLEN/8, x4, x1, x2)

inst_12825:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb88003ff; valaddr_reg:x3; val_offset:38475*0 + 3*537*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38475*0 + 3*537*FLEN/8, x4, x1, x2)

inst_12826:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb88007ff; valaddr_reg:x3; val_offset:38478*0 + 3*538*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38478*0 + 3*538*FLEN/8, x4, x1, x2)

inst_12827:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb8800fff; valaddr_reg:x3; val_offset:38481*0 + 3*539*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38481*0 + 3*539*FLEN/8, x4, x1, x2)

inst_12828:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb8801fff; valaddr_reg:x3; val_offset:38484*0 + 3*540*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38484*0 + 3*540*FLEN/8, x4, x1, x2)

inst_12829:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb8803fff; valaddr_reg:x3; val_offset:38487*0 + 3*541*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38487*0 + 3*541*FLEN/8, x4, x1, x2)

inst_12830:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb8807fff; valaddr_reg:x3; val_offset:38490*0 + 3*542*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38490*0 + 3*542*FLEN/8, x4, x1, x2)

inst_12831:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb880ffff; valaddr_reg:x3; val_offset:38493*0 + 3*543*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38493*0 + 3*543*FLEN/8, x4, x1, x2)

inst_12832:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb881ffff; valaddr_reg:x3; val_offset:38496*0 + 3*544*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38496*0 + 3*544*FLEN/8, x4, x1, x2)

inst_12833:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb883ffff; valaddr_reg:x3; val_offset:38499*0 + 3*545*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38499*0 + 3*545*FLEN/8, x4, x1, x2)

inst_12834:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb887ffff; valaddr_reg:x3; val_offset:38502*0 + 3*546*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38502*0 + 3*546*FLEN/8, x4, x1, x2)

inst_12835:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb88fffff; valaddr_reg:x3; val_offset:38505*0 + 3*547*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38505*0 + 3*547*FLEN/8, x4, x1, x2)

inst_12836:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb89fffff; valaddr_reg:x3; val_offset:38508*0 + 3*548*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38508*0 + 3*548*FLEN/8, x4, x1, x2)

inst_12837:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb8bfffff; valaddr_reg:x3; val_offset:38511*0 + 3*549*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38511*0 + 3*549*FLEN/8, x4, x1, x2)

inst_12838:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb8c00000; valaddr_reg:x3; val_offset:38514*0 + 3*550*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38514*0 + 3*550*FLEN/8, x4, x1, x2)

inst_12839:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb8e00000; valaddr_reg:x3; val_offset:38517*0 + 3*551*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38517*0 + 3*551*FLEN/8, x4, x1, x2)

inst_12840:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb8f00000; valaddr_reg:x3; val_offset:38520*0 + 3*552*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38520*0 + 3*552*FLEN/8, x4, x1, x2)

inst_12841:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb8f80000; valaddr_reg:x3; val_offset:38523*0 + 3*553*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38523*0 + 3*553*FLEN/8, x4, x1, x2)

inst_12842:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb8fc0000; valaddr_reg:x3; val_offset:38526*0 + 3*554*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38526*0 + 3*554*FLEN/8, x4, x1, x2)

inst_12843:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb8fe0000; valaddr_reg:x3; val_offset:38529*0 + 3*555*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38529*0 + 3*555*FLEN/8, x4, x1, x2)

inst_12844:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb8ff0000; valaddr_reg:x3; val_offset:38532*0 + 3*556*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38532*0 + 3*556*FLEN/8, x4, x1, x2)

inst_12845:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb8ff8000; valaddr_reg:x3; val_offset:38535*0 + 3*557*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38535*0 + 3*557*FLEN/8, x4, x1, x2)

inst_12846:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb8ffc000; valaddr_reg:x3; val_offset:38538*0 + 3*558*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38538*0 + 3*558*FLEN/8, x4, x1, x2)

inst_12847:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb8ffe000; valaddr_reg:x3; val_offset:38541*0 + 3*559*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38541*0 + 3*559*FLEN/8, x4, x1, x2)

inst_12848:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb8fff000; valaddr_reg:x3; val_offset:38544*0 + 3*560*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38544*0 + 3*560*FLEN/8, x4, x1, x2)

inst_12849:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb8fff800; valaddr_reg:x3; val_offset:38547*0 + 3*561*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38547*0 + 3*561*FLEN/8, x4, x1, x2)

inst_12850:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb8fffc00; valaddr_reg:x3; val_offset:38550*0 + 3*562*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38550*0 + 3*562*FLEN/8, x4, x1, x2)

inst_12851:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb8fffe00; valaddr_reg:x3; val_offset:38553*0 + 3*563*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38553*0 + 3*563*FLEN/8, x4, x1, x2)

inst_12852:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb8ffff00; valaddr_reg:x3; val_offset:38556*0 + 3*564*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38556*0 + 3*564*FLEN/8, x4, x1, x2)

inst_12853:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb8ffff80; valaddr_reg:x3; val_offset:38559*0 + 3*565*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38559*0 + 3*565*FLEN/8, x4, x1, x2)

inst_12854:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb8ffffc0; valaddr_reg:x3; val_offset:38562*0 + 3*566*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38562*0 + 3*566*FLEN/8, x4, x1, x2)

inst_12855:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb8ffffe0; valaddr_reg:x3; val_offset:38565*0 + 3*567*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38565*0 + 3*567*FLEN/8, x4, x1, x2)

inst_12856:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb8fffff0; valaddr_reg:x3; val_offset:38568*0 + 3*568*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38568*0 + 3*568*FLEN/8, x4, x1, x2)

inst_12857:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb8fffff8; valaddr_reg:x3; val_offset:38571*0 + 3*569*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38571*0 + 3*569*FLEN/8, x4, x1, x2)

inst_12858:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb8fffffc; valaddr_reg:x3; val_offset:38574*0 + 3*570*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38574*0 + 3*570*FLEN/8, x4, x1, x2)

inst_12859:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb8fffffe; valaddr_reg:x3; val_offset:38577*0 + 3*571*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38577*0 + 3*571*FLEN/8, x4, x1, x2)

inst_12860:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xb8ffffff; valaddr_reg:x3; val_offset:38580*0 + 3*572*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38580*0 + 3*572*FLEN/8, x4, x1, x2)

inst_12861:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xbf800001; valaddr_reg:x3; val_offset:38583*0 + 3*573*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38583*0 + 3*573*FLEN/8, x4, x1, x2)

inst_12862:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xbf800003; valaddr_reg:x3; val_offset:38586*0 + 3*574*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38586*0 + 3*574*FLEN/8, x4, x1, x2)

inst_12863:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xbf800007; valaddr_reg:x3; val_offset:38589*0 + 3*575*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38589*0 + 3*575*FLEN/8, x4, x1, x2)

inst_12864:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xbf999999; valaddr_reg:x3; val_offset:38592*0 + 3*576*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38592*0 + 3*576*FLEN/8, x4, x1, x2)

inst_12865:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:38595*0 + 3*577*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38595*0 + 3*577*FLEN/8, x4, x1, x2)

inst_12866:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:38598*0 + 3*578*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38598*0 + 3*578*FLEN/8, x4, x1, x2)

inst_12867:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:38601*0 + 3*579*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38601*0 + 3*579*FLEN/8, x4, x1, x2)

inst_12868:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:38604*0 + 3*580*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38604*0 + 3*580*FLEN/8, x4, x1, x2)

inst_12869:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:38607*0 + 3*581*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38607*0 + 3*581*FLEN/8, x4, x1, x2)

inst_12870:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:38610*0 + 3*582*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38610*0 + 3*582*FLEN/8, x4, x1, x2)

inst_12871:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:38613*0 + 3*583*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38613*0 + 3*583*FLEN/8, x4, x1, x2)

inst_12872:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:38616*0 + 3*584*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38616*0 + 3*584*FLEN/8, x4, x1, x2)

inst_12873:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:38619*0 + 3*585*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38619*0 + 3*585*FLEN/8, x4, x1, x2)

inst_12874:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:38622*0 + 3*586*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38622*0 + 3*586*FLEN/8, x4, x1, x2)

inst_12875:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:38625*0 + 3*587*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38625*0 + 3*587*FLEN/8, x4, x1, x2)

inst_12876:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0474e4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7bb17e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8474e4; op2val:0x807bb17e;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:38628*0 + 3*588*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38628*0 + 3*588*FLEN/8, x4, x1, x2)

inst_12877:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:38631*0 + 3*589*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38631*0 + 3*589*FLEN/8, x4, x1, x2)

inst_12878:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:38634*0 + 3*590*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38634*0 + 3*590*FLEN/8, x4, x1, x2)

inst_12879:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:38637*0 + 3*591*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38637*0 + 3*591*FLEN/8, x4, x1, x2)

inst_12880:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x199999; valaddr_reg:x3; val_offset:38640*0 + 3*592*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38640*0 + 3*592*FLEN/8, x4, x1, x2)

inst_12881:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x249249; valaddr_reg:x3; val_offset:38643*0 + 3*593*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38643*0 + 3*593*FLEN/8, x4, x1, x2)

inst_12882:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x333333; valaddr_reg:x3; val_offset:38646*0 + 3*594*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38646*0 + 3*594*FLEN/8, x4, x1, x2)

inst_12883:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x36db6d; valaddr_reg:x3; val_offset:38649*0 + 3*595*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38649*0 + 3*595*FLEN/8, x4, x1, x2)

inst_12884:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x3bbbbb; valaddr_reg:x3; val_offset:38652*0 + 3*596*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38652*0 + 3*596*FLEN/8, x4, x1, x2)

inst_12885:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x444444; valaddr_reg:x3; val_offset:38655*0 + 3*597*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38655*0 + 3*597*FLEN/8, x4, x1, x2)

inst_12886:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x4ccccc; valaddr_reg:x3; val_offset:38658*0 + 3*598*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38658*0 + 3*598*FLEN/8, x4, x1, x2)

inst_12887:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x5b6db6; valaddr_reg:x3; val_offset:38661*0 + 3*599*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38661*0 + 3*599*FLEN/8, x4, x1, x2)

inst_12888:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x666666; valaddr_reg:x3; val_offset:38664*0 + 3*600*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38664*0 + 3*600*FLEN/8, x4, x1, x2)

inst_12889:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x6db6db; valaddr_reg:x3; val_offset:38667*0 + 3*601*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38667*0 + 3*601*FLEN/8, x4, x1, x2)

inst_12890:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x7ffff8; valaddr_reg:x3; val_offset:38670*0 + 3*602*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38670*0 + 3*602*FLEN/8, x4, x1, x2)

inst_12891:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x7ffffc; valaddr_reg:x3; val_offset:38673*0 + 3*603*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38673*0 + 3*603*FLEN/8, x4, x1, x2)

inst_12892:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x7ffffe; valaddr_reg:x3; val_offset:38676*0 + 3*604*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38676*0 + 3*604*FLEN/8, x4, x1, x2)

inst_12893:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x5000000; valaddr_reg:x3; val_offset:38679*0 + 3*605*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38679*0 + 3*605*FLEN/8, x4, x1, x2)

inst_12894:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x5000001; valaddr_reg:x3; val_offset:38682*0 + 3*606*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38682*0 + 3*606*FLEN/8, x4, x1, x2)

inst_12895:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x5000003; valaddr_reg:x3; val_offset:38685*0 + 3*607*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38685*0 + 3*607*FLEN/8, x4, x1, x2)

inst_12896:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x5000007; valaddr_reg:x3; val_offset:38688*0 + 3*608*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38688*0 + 3*608*FLEN/8, x4, x1, x2)

inst_12897:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x500000f; valaddr_reg:x3; val_offset:38691*0 + 3*609*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38691*0 + 3*609*FLEN/8, x4, x1, x2)

inst_12898:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x500001f; valaddr_reg:x3; val_offset:38694*0 + 3*610*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38694*0 + 3*610*FLEN/8, x4, x1, x2)

inst_12899:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x500003f; valaddr_reg:x3; val_offset:38697*0 + 3*611*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38697*0 + 3*611*FLEN/8, x4, x1, x2)

inst_12900:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x500007f; valaddr_reg:x3; val_offset:38700*0 + 3*612*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38700*0 + 3*612*FLEN/8, x4, x1, x2)

inst_12901:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x50000ff; valaddr_reg:x3; val_offset:38703*0 + 3*613*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38703*0 + 3*613*FLEN/8, x4, x1, x2)

inst_12902:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x50001ff; valaddr_reg:x3; val_offset:38706*0 + 3*614*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38706*0 + 3*614*FLEN/8, x4, x1, x2)

inst_12903:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x50003ff; valaddr_reg:x3; val_offset:38709*0 + 3*615*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38709*0 + 3*615*FLEN/8, x4, x1, x2)

inst_12904:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x50007ff; valaddr_reg:x3; val_offset:38712*0 + 3*616*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38712*0 + 3*616*FLEN/8, x4, x1, x2)

inst_12905:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x5000fff; valaddr_reg:x3; val_offset:38715*0 + 3*617*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38715*0 + 3*617*FLEN/8, x4, x1, x2)

inst_12906:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x5001fff; valaddr_reg:x3; val_offset:38718*0 + 3*618*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38718*0 + 3*618*FLEN/8, x4, x1, x2)

inst_12907:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x5003fff; valaddr_reg:x3; val_offset:38721*0 + 3*619*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38721*0 + 3*619*FLEN/8, x4, x1, x2)

inst_12908:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x5007fff; valaddr_reg:x3; val_offset:38724*0 + 3*620*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38724*0 + 3*620*FLEN/8, x4, x1, x2)

inst_12909:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x500ffff; valaddr_reg:x3; val_offset:38727*0 + 3*621*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38727*0 + 3*621*FLEN/8, x4, x1, x2)

inst_12910:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x501ffff; valaddr_reg:x3; val_offset:38730*0 + 3*622*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38730*0 + 3*622*FLEN/8, x4, x1, x2)

inst_12911:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x503ffff; valaddr_reg:x3; val_offset:38733*0 + 3*623*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38733*0 + 3*623*FLEN/8, x4, x1, x2)

inst_12912:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x507ffff; valaddr_reg:x3; val_offset:38736*0 + 3*624*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38736*0 + 3*624*FLEN/8, x4, x1, x2)

inst_12913:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x50fffff; valaddr_reg:x3; val_offset:38739*0 + 3*625*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38739*0 + 3*625*FLEN/8, x4, x1, x2)

inst_12914:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x51fffff; valaddr_reg:x3; val_offset:38742*0 + 3*626*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38742*0 + 3*626*FLEN/8, x4, x1, x2)

inst_12915:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x53fffff; valaddr_reg:x3; val_offset:38745*0 + 3*627*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38745*0 + 3*627*FLEN/8, x4, x1, x2)

inst_12916:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x5400000; valaddr_reg:x3; val_offset:38748*0 + 3*628*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38748*0 + 3*628*FLEN/8, x4, x1, x2)

inst_12917:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x5600000; valaddr_reg:x3; val_offset:38751*0 + 3*629*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38751*0 + 3*629*FLEN/8, x4, x1, x2)

inst_12918:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x5700000; valaddr_reg:x3; val_offset:38754*0 + 3*630*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38754*0 + 3*630*FLEN/8, x4, x1, x2)

inst_12919:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x5780000; valaddr_reg:x3; val_offset:38757*0 + 3*631*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38757*0 + 3*631*FLEN/8, x4, x1, x2)

inst_12920:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x57c0000; valaddr_reg:x3; val_offset:38760*0 + 3*632*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38760*0 + 3*632*FLEN/8, x4, x1, x2)

inst_12921:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x57e0000; valaddr_reg:x3; val_offset:38763*0 + 3*633*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38763*0 + 3*633*FLEN/8, x4, x1, x2)

inst_12922:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x57f0000; valaddr_reg:x3; val_offset:38766*0 + 3*634*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38766*0 + 3*634*FLEN/8, x4, x1, x2)

inst_12923:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x57f8000; valaddr_reg:x3; val_offset:38769*0 + 3*635*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38769*0 + 3*635*FLEN/8, x4, x1, x2)

inst_12924:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x57fc000; valaddr_reg:x3; val_offset:38772*0 + 3*636*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38772*0 + 3*636*FLEN/8, x4, x1, x2)

inst_12925:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x57fe000; valaddr_reg:x3; val_offset:38775*0 + 3*637*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38775*0 + 3*637*FLEN/8, x4, x1, x2)

inst_12926:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x57ff000; valaddr_reg:x3; val_offset:38778*0 + 3*638*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38778*0 + 3*638*FLEN/8, x4, x1, x2)

inst_12927:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x57ff800; valaddr_reg:x3; val_offset:38781*0 + 3*639*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38781*0 + 3*639*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_6)

inst_12928:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x57ffc00; valaddr_reg:x3; val_offset:38784*0 + 3*640*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38784*0 + 3*640*FLEN/8, x4, x1, x2)

inst_12929:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x57ffe00; valaddr_reg:x3; val_offset:38787*0 + 3*641*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38787*0 + 3*641*FLEN/8, x4, x1, x2)

inst_12930:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x57fff00; valaddr_reg:x3; val_offset:38790*0 + 3*642*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38790*0 + 3*642*FLEN/8, x4, x1, x2)

inst_12931:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x57fff80; valaddr_reg:x3; val_offset:38793*0 + 3*643*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38793*0 + 3*643*FLEN/8, x4, x1, x2)

inst_12932:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x57fffc0; valaddr_reg:x3; val_offset:38796*0 + 3*644*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38796*0 + 3*644*FLEN/8, x4, x1, x2)

inst_12933:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x57fffe0; valaddr_reg:x3; val_offset:38799*0 + 3*645*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38799*0 + 3*645*FLEN/8, x4, x1, x2)

inst_12934:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x57ffff0; valaddr_reg:x3; val_offset:38802*0 + 3*646*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38802*0 + 3*646*FLEN/8, x4, x1, x2)

inst_12935:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x57ffff8; valaddr_reg:x3; val_offset:38805*0 + 3*647*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38805*0 + 3*647*FLEN/8, x4, x1, x2)

inst_12936:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x57ffffc; valaddr_reg:x3; val_offset:38808*0 + 3*648*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38808*0 + 3*648*FLEN/8, x4, x1, x2)

inst_12937:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x57ffffe; valaddr_reg:x3; val_offset:38811*0 + 3*649*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38811*0 + 3*649*FLEN/8, x4, x1, x2)

inst_12938:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x057e08 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e857e08; op2val:0x0;
op3val:0x57fffff; valaddr_reg:x3; val_offset:38814*0 + 3*650*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38814*0 + 3*650*FLEN/8, x4, x1, x2)

inst_12939:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x0; valaddr_reg:x3; val_offset:38817*0 + 3*651*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38817*0 + 3*651*FLEN/8, x4, x1, x2)

inst_12940:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:38820*0 + 3*652*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38820*0 + 3*652*FLEN/8, x4, x1, x2)

inst_12941:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:38823*0 + 3*653*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38823*0 + 3*653*FLEN/8, x4, x1, x2)

inst_12942:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:38826*0 + 3*654*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38826*0 + 3*654*FLEN/8, x4, x1, x2)

inst_12943:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0xf; valaddr_reg:x3; val_offset:38829*0 + 3*655*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38829*0 + 3*655*FLEN/8, x4, x1, x2)

inst_12944:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x1f; valaddr_reg:x3; val_offset:38832*0 + 3*656*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38832*0 + 3*656*FLEN/8, x4, x1, x2)

inst_12945:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x3f; valaddr_reg:x3; val_offset:38835*0 + 3*657*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38835*0 + 3*657*FLEN/8, x4, x1, x2)

inst_12946:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x7f; valaddr_reg:x3; val_offset:38838*0 + 3*658*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38838*0 + 3*658*FLEN/8, x4, x1, x2)

inst_12947:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0xff; valaddr_reg:x3; val_offset:38841*0 + 3*659*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38841*0 + 3*659*FLEN/8, x4, x1, x2)

inst_12948:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x1ff; valaddr_reg:x3; val_offset:38844*0 + 3*660*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38844*0 + 3*660*FLEN/8, x4, x1, x2)

inst_12949:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x3ff; valaddr_reg:x3; val_offset:38847*0 + 3*661*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38847*0 + 3*661*FLEN/8, x4, x1, x2)

inst_12950:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x7ff; valaddr_reg:x3; val_offset:38850*0 + 3*662*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38850*0 + 3*662*FLEN/8, x4, x1, x2)

inst_12951:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0xfff; valaddr_reg:x3; val_offset:38853*0 + 3*663*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38853*0 + 3*663*FLEN/8, x4, x1, x2)

inst_12952:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x1fff; valaddr_reg:x3; val_offset:38856*0 + 3*664*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38856*0 + 3*664*FLEN/8, x4, x1, x2)

inst_12953:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x3fff; valaddr_reg:x3; val_offset:38859*0 + 3*665*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38859*0 + 3*665*FLEN/8, x4, x1, x2)

inst_12954:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x7fff; valaddr_reg:x3; val_offset:38862*0 + 3*666*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38862*0 + 3*666*FLEN/8, x4, x1, x2)

inst_12955:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0xffff; valaddr_reg:x3; val_offset:38865*0 + 3*667*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38865*0 + 3*667*FLEN/8, x4, x1, x2)

inst_12956:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x1ffff; valaddr_reg:x3; val_offset:38868*0 + 3*668*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38868*0 + 3*668*FLEN/8, x4, x1, x2)

inst_12957:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x3ffff; valaddr_reg:x3; val_offset:38871*0 + 3*669*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38871*0 + 3*669*FLEN/8, x4, x1, x2)

inst_12958:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x7ffff; valaddr_reg:x3; val_offset:38874*0 + 3*670*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38874*0 + 3*670*FLEN/8, x4, x1, x2)

inst_12959:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0xfffff; valaddr_reg:x3; val_offset:38877*0 + 3*671*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38877*0 + 3*671*FLEN/8, x4, x1, x2)

inst_12960:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x199999; valaddr_reg:x3; val_offset:38880*0 + 3*672*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38880*0 + 3*672*FLEN/8, x4, x1, x2)

inst_12961:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x1fffff; valaddr_reg:x3; val_offset:38883*0 + 3*673*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38883*0 + 3*673*FLEN/8, x4, x1, x2)

inst_12962:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x249249; valaddr_reg:x3; val_offset:38886*0 + 3*674*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38886*0 + 3*674*FLEN/8, x4, x1, x2)

inst_12963:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x333333; valaddr_reg:x3; val_offset:38889*0 + 3*675*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38889*0 + 3*675*FLEN/8, x4, x1, x2)

inst_12964:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x36db6d; valaddr_reg:x3; val_offset:38892*0 + 3*676*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38892*0 + 3*676*FLEN/8, x4, x1, x2)

inst_12965:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x3bbbbb; valaddr_reg:x3; val_offset:38895*0 + 3*677*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38895*0 + 3*677*FLEN/8, x4, x1, x2)

inst_12966:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x3fffff; valaddr_reg:x3; val_offset:38898*0 + 3*678*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38898*0 + 3*678*FLEN/8, x4, x1, x2)

inst_12967:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x400000; valaddr_reg:x3; val_offset:38901*0 + 3*679*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38901*0 + 3*679*FLEN/8, x4, x1, x2)

inst_12968:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x444444; valaddr_reg:x3; val_offset:38904*0 + 3*680*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38904*0 + 3*680*FLEN/8, x4, x1, x2)

inst_12969:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x4ccccc; valaddr_reg:x3; val_offset:38907*0 + 3*681*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38907*0 + 3*681*FLEN/8, x4, x1, x2)

inst_12970:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x5b6db6; valaddr_reg:x3; val_offset:38910*0 + 3*682*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38910*0 + 3*682*FLEN/8, x4, x1, x2)

inst_12971:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x600000; valaddr_reg:x3; val_offset:38913*0 + 3*683*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38913*0 + 3*683*FLEN/8, x4, x1, x2)

inst_12972:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x666666; valaddr_reg:x3; val_offset:38916*0 + 3*684*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38916*0 + 3*684*FLEN/8, x4, x1, x2)

inst_12973:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x6db6db; valaddr_reg:x3; val_offset:38919*0 + 3*685*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38919*0 + 3*685*FLEN/8, x4, x1, x2)

inst_12974:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x700000; valaddr_reg:x3; val_offset:38922*0 + 3*686*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38922*0 + 3*686*FLEN/8, x4, x1, x2)

inst_12975:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x780000; valaddr_reg:x3; val_offset:38925*0 + 3*687*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38925*0 + 3*687*FLEN/8, x4, x1, x2)

inst_12976:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x7c0000; valaddr_reg:x3; val_offset:38928*0 + 3*688*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38928*0 + 3*688*FLEN/8, x4, x1, x2)

inst_12977:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x7e0000; valaddr_reg:x3; val_offset:38931*0 + 3*689*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38931*0 + 3*689*FLEN/8, x4, x1, x2)

inst_12978:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x7f0000; valaddr_reg:x3; val_offset:38934*0 + 3*690*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38934*0 + 3*690*FLEN/8, x4, x1, x2)

inst_12979:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x7f8000; valaddr_reg:x3; val_offset:38937*0 + 3*691*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38937*0 + 3*691*FLEN/8, x4, x1, x2)

inst_12980:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x7fc000; valaddr_reg:x3; val_offset:38940*0 + 3*692*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38940*0 + 3*692*FLEN/8, x4, x1, x2)

inst_12981:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x7fe000; valaddr_reg:x3; val_offset:38943*0 + 3*693*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38943*0 + 3*693*FLEN/8, x4, x1, x2)

inst_12982:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x7ff000; valaddr_reg:x3; val_offset:38946*0 + 3*694*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38946*0 + 3*694*FLEN/8, x4, x1, x2)

inst_12983:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x7ff800; valaddr_reg:x3; val_offset:38949*0 + 3*695*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38949*0 + 3*695*FLEN/8, x4, x1, x2)

inst_12984:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x7ffc00; valaddr_reg:x3; val_offset:38952*0 + 3*696*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38952*0 + 3*696*FLEN/8, x4, x1, x2)

inst_12985:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x7ffe00; valaddr_reg:x3; val_offset:38955*0 + 3*697*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38955*0 + 3*697*FLEN/8, x4, x1, x2)

inst_12986:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x7fff00; valaddr_reg:x3; val_offset:38958*0 + 3*698*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38958*0 + 3*698*FLEN/8, x4, x1, x2)

inst_12987:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x7fff80; valaddr_reg:x3; val_offset:38961*0 + 3*699*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38961*0 + 3*699*FLEN/8, x4, x1, x2)

inst_12988:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x7fffc0; valaddr_reg:x3; val_offset:38964*0 + 3*700*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38964*0 + 3*700*FLEN/8, x4, x1, x2)

inst_12989:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x7fffe0; valaddr_reg:x3; val_offset:38967*0 + 3*701*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38967*0 + 3*701*FLEN/8, x4, x1, x2)

inst_12990:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x7ffff0; valaddr_reg:x3; val_offset:38970*0 + 3*702*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38970*0 + 3*702*FLEN/8, x4, x1, x2)

inst_12991:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x7ffff8; valaddr_reg:x3; val_offset:38973*0 + 3*703*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38973*0 + 3*703*FLEN/8, x4, x1, x2)

inst_12992:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x7ffffc; valaddr_reg:x3; val_offset:38976*0 + 3*704*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38976*0 + 3*704*FLEN/8, x4, x1, x2)

inst_12993:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x7ffffe; valaddr_reg:x3; val_offset:38979*0 + 3*705*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38979*0 + 3*705*FLEN/8, x4, x1, x2)

inst_12994:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x067dc1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e867dc1; op2val:0x0;
op3val:0x7fffff; valaddr_reg:x3; val_offset:38982*0 + 3*706*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38982*0 + 3*706*FLEN/8, x4, x1, x2)

inst_12995:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f000000; valaddr_reg:x3; val_offset:38985*0 + 3*707*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38985*0 + 3*707*FLEN/8, x4, x1, x2)

inst_12996:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f000001; valaddr_reg:x3; val_offset:38988*0 + 3*708*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38988*0 + 3*708*FLEN/8, x4, x1, x2)

inst_12997:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f000003; valaddr_reg:x3; val_offset:38991*0 + 3*709*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38991*0 + 3*709*FLEN/8, x4, x1, x2)

inst_12998:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f000007; valaddr_reg:x3; val_offset:38994*0 + 3*710*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38994*0 + 3*710*FLEN/8, x4, x1, x2)

inst_12999:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f00000f; valaddr_reg:x3; val_offset:38997*0 + 3*711*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38997*0 + 3*711*FLEN/8, x4, x1, x2)

inst_13000:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f00001f; valaddr_reg:x3; val_offset:39000*0 + 3*712*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39000*0 + 3*712*FLEN/8, x4, x1, x2)

inst_13001:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f00003f; valaddr_reg:x3; val_offset:39003*0 + 3*713*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39003*0 + 3*713*FLEN/8, x4, x1, x2)

inst_13002:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f00007f; valaddr_reg:x3; val_offset:39006*0 + 3*714*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39006*0 + 3*714*FLEN/8, x4, x1, x2)

inst_13003:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f0000ff; valaddr_reg:x3; val_offset:39009*0 + 3*715*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39009*0 + 3*715*FLEN/8, x4, x1, x2)

inst_13004:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f0001ff; valaddr_reg:x3; val_offset:39012*0 + 3*716*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39012*0 + 3*716*FLEN/8, x4, x1, x2)

inst_13005:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f0003ff; valaddr_reg:x3; val_offset:39015*0 + 3*717*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39015*0 + 3*717*FLEN/8, x4, x1, x2)

inst_13006:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f0007ff; valaddr_reg:x3; val_offset:39018*0 + 3*718*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39018*0 + 3*718*FLEN/8, x4, x1, x2)

inst_13007:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f000fff; valaddr_reg:x3; val_offset:39021*0 + 3*719*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39021*0 + 3*719*FLEN/8, x4, x1, x2)

inst_13008:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f001fff; valaddr_reg:x3; val_offset:39024*0 + 3*720*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39024*0 + 3*720*FLEN/8, x4, x1, x2)

inst_13009:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f003fff; valaddr_reg:x3; val_offset:39027*0 + 3*721*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39027*0 + 3*721*FLEN/8, x4, x1, x2)

inst_13010:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f007fff; valaddr_reg:x3; val_offset:39030*0 + 3*722*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39030*0 + 3*722*FLEN/8, x4, x1, x2)

inst_13011:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f00ffff; valaddr_reg:x3; val_offset:39033*0 + 3*723*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39033*0 + 3*723*FLEN/8, x4, x1, x2)

inst_13012:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f01ffff; valaddr_reg:x3; val_offset:39036*0 + 3*724*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39036*0 + 3*724*FLEN/8, x4, x1, x2)

inst_13013:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f03ffff; valaddr_reg:x3; val_offset:39039*0 + 3*725*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39039*0 + 3*725*FLEN/8, x4, x1, x2)

inst_13014:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f07ffff; valaddr_reg:x3; val_offset:39042*0 + 3*726*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39042*0 + 3*726*FLEN/8, x4, x1, x2)

inst_13015:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f0fffff; valaddr_reg:x3; val_offset:39045*0 + 3*727*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39045*0 + 3*727*FLEN/8, x4, x1, x2)

inst_13016:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f1fffff; valaddr_reg:x3; val_offset:39048*0 + 3*728*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39048*0 + 3*728*FLEN/8, x4, x1, x2)

inst_13017:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f3fffff; valaddr_reg:x3; val_offset:39051*0 + 3*729*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39051*0 + 3*729*FLEN/8, x4, x1, x2)

inst_13018:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f400000; valaddr_reg:x3; val_offset:39054*0 + 3*730*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39054*0 + 3*730*FLEN/8, x4, x1, x2)

inst_13019:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f600000; valaddr_reg:x3; val_offset:39057*0 + 3*731*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39057*0 + 3*731*FLEN/8, x4, x1, x2)

inst_13020:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f700000; valaddr_reg:x3; val_offset:39060*0 + 3*732*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39060*0 + 3*732*FLEN/8, x4, x1, x2)

inst_13021:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f780000; valaddr_reg:x3; val_offset:39063*0 + 3*733*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39063*0 + 3*733*FLEN/8, x4, x1, x2)

inst_13022:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f7c0000; valaddr_reg:x3; val_offset:39066*0 + 3*734*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39066*0 + 3*734*FLEN/8, x4, x1, x2)

inst_13023:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f7e0000; valaddr_reg:x3; val_offset:39069*0 + 3*735*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39069*0 + 3*735*FLEN/8, x4, x1, x2)

inst_13024:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f7f0000; valaddr_reg:x3; val_offset:39072*0 + 3*736*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39072*0 + 3*736*FLEN/8, x4, x1, x2)

inst_13025:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f7f8000; valaddr_reg:x3; val_offset:39075*0 + 3*737*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39075*0 + 3*737*FLEN/8, x4, x1, x2)

inst_13026:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f7fc000; valaddr_reg:x3; val_offset:39078*0 + 3*738*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39078*0 + 3*738*FLEN/8, x4, x1, x2)

inst_13027:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f7fe000; valaddr_reg:x3; val_offset:39081*0 + 3*739*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39081*0 + 3*739*FLEN/8, x4, x1, x2)

inst_13028:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f7ff000; valaddr_reg:x3; val_offset:39084*0 + 3*740*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39084*0 + 3*740*FLEN/8, x4, x1, x2)

inst_13029:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f7ff800; valaddr_reg:x3; val_offset:39087*0 + 3*741*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39087*0 + 3*741*FLEN/8, x4, x1, x2)

inst_13030:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f7ffc00; valaddr_reg:x3; val_offset:39090*0 + 3*742*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39090*0 + 3*742*FLEN/8, x4, x1, x2)

inst_13031:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f7ffe00; valaddr_reg:x3; val_offset:39093*0 + 3*743*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39093*0 + 3*743*FLEN/8, x4, x1, x2)

inst_13032:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f7fff00; valaddr_reg:x3; val_offset:39096*0 + 3*744*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39096*0 + 3*744*FLEN/8, x4, x1, x2)

inst_13033:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f7fff80; valaddr_reg:x3; val_offset:39099*0 + 3*745*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39099*0 + 3*745*FLEN/8, x4, x1, x2)

inst_13034:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f7fffc0; valaddr_reg:x3; val_offset:39102*0 + 3*746*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39102*0 + 3*746*FLEN/8, x4, x1, x2)

inst_13035:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f7fffe0; valaddr_reg:x3; val_offset:39105*0 + 3*747*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39105*0 + 3*747*FLEN/8, x4, x1, x2)

inst_13036:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f7ffff0; valaddr_reg:x3; val_offset:39108*0 + 3*748*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39108*0 + 3*748*FLEN/8, x4, x1, x2)

inst_13037:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f7ffff8; valaddr_reg:x3; val_offset:39111*0 + 3*749*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39111*0 + 3*749*FLEN/8, x4, x1, x2)

inst_13038:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f7ffffc; valaddr_reg:x3; val_offset:39114*0 + 3*750*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39114*0 + 3*750*FLEN/8, x4, x1, x2)

inst_13039:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f7ffffe; valaddr_reg:x3; val_offset:39117*0 + 3*751*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39117*0 + 3*751*FLEN/8, x4, x1, x2)

inst_13040:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x6f7fffff; valaddr_reg:x3; val_offset:39120*0 + 3*752*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39120*0 + 3*752*FLEN/8, x4, x1, x2)

inst_13041:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x7f000001; valaddr_reg:x3; val_offset:39123*0 + 3*753*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39123*0 + 3*753*FLEN/8, x4, x1, x2)

inst_13042:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x7f000003; valaddr_reg:x3; val_offset:39126*0 + 3*754*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39126*0 + 3*754*FLEN/8, x4, x1, x2)

inst_13043:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x7f000007; valaddr_reg:x3; val_offset:39129*0 + 3*755*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39129*0 + 3*755*FLEN/8, x4, x1, x2)

inst_13044:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x7f199999; valaddr_reg:x3; val_offset:39132*0 + 3*756*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39132*0 + 3*756*FLEN/8, x4, x1, x2)

inst_13045:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x7f249249; valaddr_reg:x3; val_offset:39135*0 + 3*757*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39135*0 + 3*757*FLEN/8, x4, x1, x2)

inst_13046:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x7f333333; valaddr_reg:x3; val_offset:39138*0 + 3*758*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39138*0 + 3*758*FLEN/8, x4, x1, x2)

inst_13047:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x7f36db6d; valaddr_reg:x3; val_offset:39141*0 + 3*759*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39141*0 + 3*759*FLEN/8, x4, x1, x2)

inst_13048:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:39144*0 + 3*760*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39144*0 + 3*760*FLEN/8, x4, x1, x2)

inst_13049:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x7f444444; valaddr_reg:x3; val_offset:39147*0 + 3*761*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39147*0 + 3*761*FLEN/8, x4, x1, x2)

inst_13050:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:39150*0 + 3*762*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39150*0 + 3*762*FLEN/8, x4, x1, x2)

inst_13051:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:39153*0 + 3*763*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39153*0 + 3*763*FLEN/8, x4, x1, x2)

inst_13052:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x7f666666; valaddr_reg:x3; val_offset:39156*0 + 3*764*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39156*0 + 3*764*FLEN/8, x4, x1, x2)

inst_13053:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x7f6db6db; valaddr_reg:x3; val_offset:39159*0 + 3*765*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39159*0 + 3*765*FLEN/8, x4, x1, x2)

inst_13054:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:39162*0 + 3*766*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39162*0 + 3*766*FLEN/8, x4, x1, x2)

inst_13055:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06a56e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x735d19 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e86a56e; op2val:0x40735d19;
op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:39165*0 + 3*767*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39165*0 + 3*767*FLEN/8, x4, x1, x2)
#endif


RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x410001ff,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x410003ff,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x410007ff,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x41000fff,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x41001fff,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x41003fff,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x41007fff,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x4100ffff,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x4101ffff,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x4103ffff,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x4107ffff,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x410fffff,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x411fffff,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x413fffff,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x41400000,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x41600000,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x41700000,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x41780000,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x417c0000,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x417e0000,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x417f0000,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x417f8000,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x417fc000,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x417fe000,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x417ff000,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x417ff800,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x417ffc00,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x417ffe00,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x417fff00,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x417fff80,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x417fffc0,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x417fffe0,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x417ffff0,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x417ffff8,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x417ffffc,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x417ffffe,32,FLEN)
NAN_BOXED(0x7e7bdfb7,32,FLEN)
NAN_BOXED(0x8218cb,32,FLEN)
NAN_BOXED(0x417fffff,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1f,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3f,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7f,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xff,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1ff,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ff,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ff,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfff,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1fff,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fff,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7fff,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xffff,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1ffff,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffff,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffff,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x199999,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1fffff,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x249249,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x333333,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x36db6d,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3bbbbb,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fffff,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x400000,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x444444,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ccccc,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5b6db6,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x600000,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x666666,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6db6db,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x700000,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x780000,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7c0000,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7e0000,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7f0000,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7f8000,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7fc000,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7fe000,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ff000,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ff800,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffc00,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffe00,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7fff00,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7fff80,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7fffc0,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7fffe0,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff0,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff8,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffc,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffe,32,FLEN)
NAN_BOXED(0x7e7cfd8d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7fffff,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x199999,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x249249,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x333333,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x36db6d,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3bbbbb,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x444444,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ccccc,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5b6db6,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x666666,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6db6db,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff8,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffc,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffe,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe800000,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe800001,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe800003,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe800007,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe80000f,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe80001f,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe80003f,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe80007f,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe8000ff,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe8001ff,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe8003ff,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe8007ff,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe800fff,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe801fff,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe803fff,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe807fff,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe80ffff,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe81ffff,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe83ffff,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe87ffff,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe8fffff,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe9fffff,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xebfffff,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xec00000,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xee00000,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xef00000,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xef80000,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xefc0000,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xefe0000,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xeff0000,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xeff8000,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xeffc000,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xeffe000,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xefff000,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xefff800,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xefffc00,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xefffe00,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xeffff00,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xeffff80,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xeffffc0,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xeffffe0,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xefffff0,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xefffff8,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xefffffc,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xefffffe,32,FLEN)
NAN_BOXED(0x7e7dffab,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xeffffff,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80800001,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80800003,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80800007,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80999999,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80a49249,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80b33333,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80b6db6d,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80bbbbbb,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80c44444,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80cccccc,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80db6db6,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80e66666,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80edb6db,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fffff8,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fffffc,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fffffe,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a000000,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a000001,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a000003,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a000007,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a00000f,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a00001f,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a00003f,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a00007f,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a0000ff,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a0001ff,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a0003ff,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a0007ff,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a000fff,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a001fff,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a003fff,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a007fff,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a00ffff,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a01ffff,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a03ffff,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a07ffff,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a0fffff,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a1fffff,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a3fffff,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a400000,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a600000,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a700000,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a780000,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7c0000,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7e0000,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7f0000,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7f8000,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7fc000,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7fe000,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7ff000,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7ff800,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7ffc00,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7ffe00,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7fff00,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7fff80,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7fffc0,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7fffe0,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7ffff0,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7ffff8,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7ffffc,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7ffffe,32,FLEN)
NAN_BOXED(0x7e7e766c,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7fffff,32,FLEN)
NAN_BOXED(0x7e807108,32,FLEN)
NAN_BOXED(0x807f8f5a,32,FLEN)
NAN_BOXED(0xbb000000,32,FLEN)
NAN_BOXED(0x7e807108,32,FLEN)
NAN_BOXED(0x807f8f5a,32,FLEN)
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NAN_BOXED(0xe200007f,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe20000ff,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe20001ff,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe20003ff,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe20007ff,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe2000fff,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe2001fff,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe2003fff,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe2007fff,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe200ffff,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe201ffff,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe203ffff,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe207ffff,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe20fffff,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe21fffff,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe23fffff,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe2400000,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe2600000,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe2700000,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe2780000,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe27c0000,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe27e0000,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe27f0000,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe27f8000,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe27fc000,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe27fe000,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe27ff000,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe27ff800,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe27ffc00,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe27ffe00,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe27fff00,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe27fff80,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe27fffc0,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe27fffe0,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe27ffff0,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe27ffff8,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe27ffffc,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe27ffffe,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xe27fffff,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xff000001,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xff000003,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xff000007,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xff199999,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xff249249,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xff333333,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xff36db6d,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xff3bbbbb,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xff444444,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xff4ccccc,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xff5b6db6,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xff666666,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xff6db6db,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xff7ffff8,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xff7ffffc,32,FLEN)
NAN_BOXED(0x7e82ce1a,32,FLEN)
NAN_BOXED(0xc07a8296,32,FLEN)
NAN_BOXED(0xff7ffffe,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x3f800001,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x3f800003,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x3f800007,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x3f999999,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x3fa49249,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x3fb33333,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x3fb6db6d,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x3fbbbbbb,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x3fc44444,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x3fcccccc,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x3fdb6db6,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x3fe66666,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x3fedb6db,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x3ffffff8,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x3ffffffc,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x3ffffffe,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x42000000,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x42000001,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x42000003,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x42000007,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x4200000f,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x4200001f,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x4200003f,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x4200007f,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x420000ff,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x420001ff,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x420003ff,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x420007ff,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x42000fff,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x42001fff,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x42003fff,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x42007fff,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x4200ffff,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x4201ffff,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x4203ffff,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x4207ffff,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x420fffff,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x421fffff,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x423fffff,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x42400000,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x42600000,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x42700000,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x42780000,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x427c0000,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x427e0000,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x427f0000,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x427f8000,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x427fc000,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x427fe000,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x427ff000,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x427ff800,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x427ffc00,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x427ffe00,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x427fff00,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x427fff80,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x427fffc0,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x427fffe0,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x427ffff0,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x427ffff8,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x427ffffc,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x427ffffe,32,FLEN)
NAN_BOXED(0x7e82f6ae,32,FLEN)
NAN_BOXED(0x7d1a7d,32,FLEN)
NAN_BOXED(0x427fffff,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x23000000,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x23000001,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x23000003,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x23000007,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x2300000f,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x2300001f,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x2300003f,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x2300007f,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x230000ff,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x230001ff,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x230003ff,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x230007ff,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x23000fff,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x23001fff,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x23003fff,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x23007fff,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x2300ffff,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x2301ffff,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x2303ffff,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x2307ffff,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x230fffff,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x231fffff,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x233fffff,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x23400000,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x23600000,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x23700000,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x23780000,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x237c0000,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x237e0000,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x237f0000,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x237f8000,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x237fc000,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x237fe000,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x237ff000,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x237ff800,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x237ffc00,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x237ffe00,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x237fff00,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x237fff80,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x237fffc0,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x237fffe0,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x237ffff0,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x237ffff8,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x237ffffc,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x237ffffe,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x237fffff,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x3f800001,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x3f800003,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x3f800007,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x3f999999,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x3fa49249,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x3fb33333,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x3fb6db6d,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x3fbbbbbb,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x3fc44444,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x3fcccccc,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x3fdb6db6,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x3fe66666,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x3fedb6db,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x3ffffff8,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x3ffffffc,32,FLEN)
NAN_BOXED(0x7e831ec6,32,FLEN)
NAN_BOXED(0x7cf43b,32,FLEN)
NAN_BOXED(0x3ffffffe,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb8800000,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb8800001,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb8800003,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb8800007,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb880000f,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb880001f,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb880003f,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb880007f,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb88000ff,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb88001ff,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb88003ff,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb88007ff,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb8800fff,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb8801fff,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb8803fff,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb8807fff,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb880ffff,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb881ffff,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb883ffff,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb887ffff,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb88fffff,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb89fffff,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb8bfffff,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb8c00000,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb8e00000,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb8f00000,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb8f80000,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb8fc0000,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb8fe0000,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb8ff0000,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb8ff8000,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb8ffc000,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb8ffe000,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb8fff000,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb8fff800,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb8fffc00,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb8fffe00,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb8ffff00,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb8ffff80,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb8ffffc0,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb8ffffe0,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb8fffff0,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb8fffff8,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb8fffffc,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb8fffffe,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xb8ffffff,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7e8474e4,32,FLEN)
NAN_BOXED(0x807bb17e,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x199999,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x249249,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x333333,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x36db6d,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3bbbbb,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x444444,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ccccc,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5b6db6,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x666666,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6db6db,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff8,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffc,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffe,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5000000,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5000001,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5000003,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5000007,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x500000f,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x500001f,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x500003f,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x500007f,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x50000ff,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x50001ff,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x50003ff,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x50007ff,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5000fff,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5001fff,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5003fff,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5007fff,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x500ffff,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x501ffff,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x503ffff,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x507ffff,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x50fffff,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x51fffff,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x53fffff,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5400000,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5600000,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5700000,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5780000,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x57c0000,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x57e0000,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x57f0000,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x57f8000,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x57fc000,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x57fe000,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x57ff000,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x57ff800,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x57ffc00,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x57ffe00,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x57fff00,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x57fff80,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x57fffc0,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x57fffe0,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x57ffff0,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x57ffff8,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x57ffffc,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x57ffffe,32,FLEN)
NAN_BOXED(0x7e857e08,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x57fffff,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xf,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1f,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3f,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7f,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xff,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1ff,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ff,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ff,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfff,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1fff,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fff,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7fff,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xffff,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1ffff,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffff,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffff,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x199999,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1fffff,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x249249,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x333333,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x36db6d,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3bbbbb,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fffff,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x400000,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x444444,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ccccc,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5b6db6,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x600000,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x666666,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6db6db,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x700000,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x780000,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7c0000,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7e0000,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7f0000,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7f8000,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7fc000,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7fe000,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ff000,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ff800,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffc00,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffe00,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7fff00,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7fff80,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7fffc0,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7fffe0,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff0,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff8,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffc,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffe,32,FLEN)
NAN_BOXED(0x7e867dc1,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7fffff,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f000000,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f000001,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f000003,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f000007,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f00000f,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f00001f,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f00003f,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f00007f,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f0000ff,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f0001ff,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f0003ff,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f0007ff,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f000fff,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f001fff,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f003fff,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f007fff,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f00ffff,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f01ffff,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f03ffff,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f07ffff,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f0fffff,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f1fffff,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f3fffff,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f400000,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f600000,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f700000,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f780000,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f7c0000,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f7e0000,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f7f0000,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f7f8000,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f7fc000,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f7fe000,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f7ff000,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f7ff800,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f7ffc00,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f7ffe00,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f7fff00,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f7fff80,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f7fffc0,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f7fffe0,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f7ffff0,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f7ffff8,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f7ffffc,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f7ffffe,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x6f7fffff,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x7f000001,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x7f000003,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x7f000007,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x7f199999,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x7f249249,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x7f333333,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x7f36db6d,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x7f3bbbbb,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x7f444444,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x7f4ccccc,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x7f5b6db6,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x7f666666,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x7f6db6db,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x7f7ffff8,32,FLEN)
NAN_BOXED(0x7e86a56e,32,FLEN)
NAN_BOXED(0x40735d19,32,FLEN)
NAN_BOXED(0x7f7ffffc,32,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;


signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_2:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_3:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_4:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_5:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_6:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine

tsig_begin_canary:
CANARY;
tsig_begin_canary:
CANARY;
mtrap_sigptr:
    .fill 64*(XLEN/32),4,0xdeadbeef
tsig_end_canary:
CANARY;
tsig_end_canary:
CANARY;

#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif

sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
