
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.11.0
// timestamp : Mon Feb  5 04:36:02 2024 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /home/riscv/riscv-ctg/sample_cgfs/dataset.cgf \
//                  --cgf /home/riscv/riscv-ctg/sample_cgfs/sample_cgfs_fext/RV64Zfinx/fmsub.s.cgf \
 \
//                  -- xlen 64  \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fmsub.s instruction of the RISC-V RV64_Zfinx,RV64_Zdinx extension for the fmsub_b18 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV64I_Zfinx,RV64I_Zdinx")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*Zfinx.*);def TEST_CASE_1=True;",fmsub_b18)

RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_0:
// rs1 == rd == rs3 != rs2, rs1==x31, rs2==x30, rs3==x31, rd==x31,fs1 == 0 and fe1 == 0xfe and fm1 == 0x378efe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x31; op2:x30; op3:x31; dest:x31; op1val:0x7f378efe; op2val:0x0;
op3val:0x7f378efe; valaddr_reg:x3; val_offset:0*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x31, x30, x31, dyn, 0, 0, x3, 0*FLEN/8, x4, x1, x2)

inst_1:
// rs1 == rs2 == rd != rs3, rs1==x29, rs2==x29, rs3==x30, rd==x29,fs1 == 0 and fe1 == 0xfe and fm1 == 0x35fb9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x29; op2:x29; op3:x30; dest:x29; op1val:0x7f35fb9d; op2val:0x7f35fb9d;
op3val:0xf1bffff8; valaddr_reg:x3; val_offset:3*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x29, x29, x29, x30, dyn, 0, 0, x3, 3*FLEN/8, x4, x1, x2)

inst_2:
// rs3 == rd != rs1 and rs3 == rd != rs2 and rs2 != rs1, rs1==x30, rs2==x31, rs3==x28, rd==x28,fs1 == 0 and fe1 == 0xfa and fm1 == 0x2db9cd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x31; op3:x28; dest:x28; op1val:0x7d2db9cd; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x3; val_offset:6*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x28, x30, x31, x28, dyn, 0, 0, x3, 6*FLEN/8, x4, x1, x2)

inst_3:
// rd == rs2 == rs3 != rs1, rs1==x28, rs2==x27, rs3==x27, rd==x27,fs1 == 0 and fe1 == 0xfb and fm1 == 0x025d06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x28; op2:x27; op3:x27; dest:x27; op1val:0x7d825d06; op2val:0x0;
op3val:0x0; valaddr_reg:x3; val_offset:9*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x27, x28, x27, x27, dyn, 0, 0, x3, 9*FLEN/8, x4, x1, x2)

inst_4:
// rs2 == rd != rs1 and rs2 == rd != rs3 and rs3 != rs1, rs1==x27, rs2==x26, rs3==x29, rd==x26,fs1 == 0 and fe1 == 0xfe and fm1 == 0x206a70 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x27; op2:x26; op3:x29; dest:x26; op1val:0x7f206a70; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x3; val_offset:12*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x26, x27, x26, x29, dyn, 0, 0, x3, 12*FLEN/8, x4, x1, x2)

inst_5:
// rs1 == rs2 == rs3 != rd, rs1==x25, rs2==x25, rs3==x25, rd==x30,fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d4e65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x25; op2:x25; op3:x25; dest:x30; op1val:0x7f0d4e65; op2val:0x7f0d4e65;
op3val:0x7f0d4e65; valaddr_reg:x3; val_offset:15*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x30, x25, x25, x25, dyn, 0, 0, x3, 15*FLEN/8, x4, x1, x2)

inst_6:
// rs2 == rs3 != rs1 and rs2 == rs3 != rd and rd != rs1, rs1==x26, rs2==x24, rs3==x24, rd==x25,fs1 == 0 and fe1 == 0xfe and fm1 == 0x009696 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x26; op2:x24; op3:x24; dest:x25; op1val:0x7f009696; op2val:0x0;
op3val:0x0; valaddr_reg:x3; val_offset:18*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x25, x26, x24, x24, dyn, 0, 0, x3, 18*FLEN/8, x4, x1, x2)

inst_7:
// rs1 != rs2 and rs1 != rd and rs1 != rs3 and rs2 != rs3 and rs2 != rd and rs3 != rd, rs1==x23, rs2==x28, rs3==x26, rd==x24,fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ca617 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x23; op2:x28; op3:x26; dest:x24; op1val:0x7e6ca617; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x3; val_offset:21*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x24, x23, x28, x26, dyn, 0, 0, x3, 21*FLEN/8, x4, x1, x2)

inst_8:
// rs1 == rs2 != rs3 and rs1 == rs2 != rd and rd != rs3, rs1==x22, rs2==x22, rs3==x21, rd==x23,fs1 == 0 and fe1 == 0xfd and fm1 == 0x68aebb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x22; op2:x22; op3:x21; dest:x23; op1val:0x7ee8aebb; op2val:0x7ee8aebb;
op3val:0xf1bffff8; valaddr_reg:x3; val_offset:24*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x23, x22, x22, x21, dyn, 0, 0, x3, 24*FLEN/8, x4, x1, x2)

inst_9:
// rs1 == rs3 != rs2 and rs1 == rs3 != rd and rd != rs2, rs1==x20, rs2==x23, rs3==x20, rd==x22,fs1 == 0 and fe1 == 0xfd and fm1 == 0x690309 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x20; op2:x23; op3:x20; dest:x22; op1val:0x7ee90309; op2val:0x80000000;
op3val:0x7ee90309; valaddr_reg:x3; val_offset:27*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x22, x20, x23, x20, dyn, 0, 0, x3, 27*FLEN/8, x4, x1, x2)

inst_10:
// rs1 == rd != rs2 and rs1 == rd != rs3 and rs3 != rs2, rs1==x21, rs2==x20, rs3==x23, rd==x21,fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f2ead and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x21; op2:x20; op3:x23; dest:x21; op1val:0x7edf2ead; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x3; val_offset:30*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x21, x21, x20, x23, dyn, 0, 0, x3, 30*FLEN/8, x4, x1, x2)

inst_11:
// rs1 == rs2 == rs3 == rd, rs1==x19, rs2==x19, rs3==x19, rd==x19,fs1 == 0 and fe1 == 0xfb and fm1 == 0x7346ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x19; op2:x19; op3:x19; dest:x19; op1val:0x7df346ad; op2val:0x7df346ad;
op3val:0x7df346ad; valaddr_reg:x3; val_offset:33*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x19, x19, x19, x19, dyn, 0, 0, x3, 33*FLEN/8, x4, x1, x2)

inst_12:
// rs1==x24, rs2==x21, rs3==x22, rd==x20,fs1 == 0 and fe1 == 0xfd and fm1 == 0x25608b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x24; op2:x21; op3:x22; dest:x20; op1val:0x7ea5608b; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x3; val_offset:36*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x20, x24, x21, x22, dyn, 0, 0, x3, 36*FLEN/8, x4, x1, x2)

inst_13:
// rs1==x17, rs2==x16, rs3==x15, rd==x18,fs1 == 0 and fe1 == 0xfd and fm1 == 0x171dc0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x17; op2:x16; op3:x15; dest:x18; op1val:0x7e971dc0; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x3; val_offset:39*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x18, x17, x16, x15, dyn, 0, 0, x3, 39*FLEN/8, x4, x1, x2)

inst_14:
// rs1==x15, rs2==x18, rs3==x16, rd==x17,fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x15; op2:x18; op3:x16; dest:x17; op1val:0x7f0ad17d; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x3; val_offset:42*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x17, x15, x18, x16, dyn, 0, 0, x3, 42*FLEN/8, x4, x1, x2)

inst_15:
// rs1==x18, rs2==x15, rs3==x17, rd==x16,fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f015e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x18; op2:x15; op3:x17; dest:x16; op1val:0x7f3f015e; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x3; val_offset:45*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x16, x18, x15, x17, dyn, 0, 0, x3, 45*FLEN/8, x4, x1, x2)

inst_16:
// rs1==x16, rs2==x17, rs3==x18, rd==x15,fs1 == 0 and fe1 == 0xfe and fm1 == 0x3648af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x16; op2:x17; op3:x18; dest:x15; op1val:0x7f3648af; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x3; val_offset:48*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x15, x16, x17, x18, dyn, 0, 0, x3, 48*FLEN/8, x4, x1, x2)

inst_17:
// rs1==x13, rs2==x12, rs3==x11, rd==x14,fs1 == 0 and fe1 == 0xfd and fm1 == 0x50f6c7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x13; op2:x12; op3:x11; dest:x14; op1val:0x7ed0f6c7; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x3; val_offset:51*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x14, x13, x12, x11, dyn, 0, 0, x3, 51*FLEN/8, x4, x1, x2)

inst_18:
// rs1==x11, rs2==x14, rs3==x12, rd==x13,fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ad2f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x11; op2:x14; op3:x12; dest:x13; op1val:0x7eaad2f1; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x3; val_offset:54*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x13, x11, x14, x12, dyn, 0, 0, x3, 54*FLEN/8, x4, x1, x2)

inst_19:
// rs1==x14, rs2==x11, rs3==x13, rd==x12,fs1 == 0 and fe1 == 0xfc and fm1 == 0x4e0246 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x14; op2:x11; op3:x13; dest:x12; op1val:0x7e4e0246; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x3; val_offset:57*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x12, x14, x11, x13, dyn, 0, 0, x3, 57*FLEN/8, x4, x1, x2)

inst_20:
// rs1==x12, rs2==x13, rs3==x14, rd==x11,fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cb815 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x12; op2:x13; op3:x14; dest:x11; op1val:0x7cdcb815; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x3; val_offset:60*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x11, x12, x13, x14, dyn, 0, 0, x3, 60*FLEN/8, x4, x1, x2)

inst_21:
// rs1==x9, rs2==x8, rs3==x7, rd==x10,fs1 == 0 and fe1 == 0xf9 and fm1 == 0x289f06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x9; op2:x8; op3:x7; dest:x10; op1val:0x7ca89f06; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x3; val_offset:63*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x10, x9, x8, x7, dyn, 0, 0, x3, 63*FLEN/8, x4, x1, x2)
RVTEST_VALBASEUPD(x13,test_dataset_1)

inst_22:
// rs1==x7, rs2==x10, rs3==x8, rd==x9,fs1 == 0 and fe1 == 0xfd and fm1 == 0x3284ec and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x7; op2:x10; op3:x8; dest:x9; op1val:0x7eb284ec; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:0*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x9, x7, x10, x8, dyn, 0, 0, x13, 0*FLEN/8, x14, x1, x12)
RVTEST_SIGBASE(x11,signature_x11_0)

inst_23:
// rs1==x10, rs2==x7, rs3==x9, rd==x8,fs1 == 0 and fe1 == 0xfc and fm1 == 0x7494ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x10; op2:x7; op3:x9; dest:x8; op1val:0x7e7494ca; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:3*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x8, x10, x7, x9, dyn, 0, 0, x13, 3*FLEN/8, x14, x11, x12)

inst_24:
// rs1==x8, rs2==x9, rs3==x10, rd==x7,fs1 == 0 and fe1 == 0xfd and fm1 == 0x11ecfc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x8; op2:x9; op3:x10; dest:x7; op1val:0x7e91ecfc; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:6*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x7, x8, x9, x10, dyn, 0, 0, x13, 6*FLEN/8, x14, x11, x12)

inst_25:
// rs1==x5, rs2==x4, rs3==x3, rd==x6,fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b393b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x5; op2:x4; op3:x3; dest:x6; op1val:0x7f2b393b; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:9*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x6, x5, x4, x3, dyn, 0, 0, x13, 9*FLEN/8, x14, x11, x12)

inst_26:
// rs1==x3, rs2==x6, rs3==x4, rd==x5,fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e399 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x3; op2:x6; op3:x4; dest:x5; op1val:0x7ec9e399; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:12*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x5, x3, x6, x4, dyn, 0, 0, x13, 12*FLEN/8, x14, x11, x12)

inst_27:
// rs1==x6, rs2==x3, rs3==x5, rd==x4,fs1 == 0 and fe1 == 0xfd and fm1 == 0x573c68 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x6; op2:x3; op3:x5; dest:x4; op1val:0x7ed73c68; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:15*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x4, x6, x3, x5, dyn, 0, 0, x13, 15*FLEN/8, x14, x11, x12)

inst_28:
// rs1==x4, rs2==x5, rs3==x6, rd==x3,fs1 == 0 and fe1 == 0xfc and fm1 == 0x3557bf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x4; op2:x5; op3:x6; dest:x3; op1val:0x7e3557bf; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:18*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x3, x4, x5, x6, dyn, 0, 0, x13, 18*FLEN/8, x14, x11, x12)

inst_29:
// rs1==x2,fs1 == 0 and fe1 == 0xf9 and fm1 == 0x129583 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x2; op2:x30; op3:x29; dest:x31; op1val:0x7c929583; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:21*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x2, x30, x29, dyn, 0, 0, x13, 21*FLEN/8, x14, x11, x12)

inst_30:
// rs1==x1,fs1 == 0 and fe1 == 0xfc and fm1 == 0x79b5b2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x1; op2:x30; op3:x29; dest:x31; op1val:0x7e79b5b2; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:24*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x1, x30, x29, dyn, 0, 0, x13, 24*FLEN/8, x14, x11, x12)

inst_31:
// rs1==x0,fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x0; op2:x30; op3:x29; dest:x31; op1val:0x0; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:27*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x0, x30, x29, dyn, 0, 0, x13, 27*FLEN/8, x14, x11, x12)

inst_32:
// rs2==x2,fs1 == 0 and fe1 == 0xfd and fm1 == 0x43ed0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x2; op3:x29; dest:x31; op1val:0x7ec3ed0a; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:30*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x2, x29, dyn, 0, 0, x13, 30*FLEN/8, x14, x11, x12)

inst_33:
// rs2==x1,fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fbf4a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x1; op3:x29; dest:x31; op1val:0x7f3fbf4a; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:33*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x1, x29, dyn, 0, 0, x13, 33*FLEN/8, x14, x11, x12)

inst_34:
// rs2==x0,fs1 == 0 and fe1 == 0xfe and fm1 == 0x018006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x0; op3:x29; dest:x31; op1val:0x7f018006; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:36*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x0, x29, dyn, 0, 0, x13, 36*FLEN/8, x14, x11, x12)

inst_35:
// rs3==x2,fs1 == 0 and fe1 == 0xfc and fm1 == 0x0ba7e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x2; dest:x31; op1val:0x7e0ba7e2; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:39*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x2, dyn, 0, 0, x13, 39*FLEN/8, x14, x11, x12)

inst_36:
// rs3==x1,fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b90d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x1; dest:x31; op1val:0x7f2b90d3; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:42*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x1, dyn, 0, 0, x13, 42*FLEN/8, x14, x11, x12)

inst_37:
// rs3==x0,fs1 == 0 and fe1 == 0xfe and fm1 == 0x18fa57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x0; dest:x31; op1val:0x7f18fa57; op2val:0x80000000;
op3val:0x0; valaddr_reg:x13; val_offset:45*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x0, dyn, 0, 0, x13, 45*FLEN/8, x14, x11, x12)

inst_38:
// rd==x2,fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d014f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x31; op2:x30; op3:x29; dest:x2; op1val:0x7f0d014f; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:48*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x2, x31, x30, x29, dyn, 0, 0, x13, 48*FLEN/8, x14, x11, x12)

inst_39:
// rd==x1,fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e10e3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x31; op2:x30; op3:x29; dest:x1; op1val:0x7f2e10e3; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:51*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x1, x31, x30, x29, dyn, 0, 0, x13, 51*FLEN/8, x14, x11, x12)

inst_40:
// rd==x0,fs1 == 0 and fe1 == 0xfe and fm1 == 0x127958 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x31; op2:x30; op3:x29; dest:x0; op1val:0x7f127958; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:54*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x0, x31, x30, x29, dyn, 0, 0, x13, 54*FLEN/8, x14, x11, x12)

inst_41:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17a1ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17a1ac; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:57*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 57*FLEN/8, x14, x11, x12)

inst_42:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07daac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87daac; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:60*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 60*FLEN/8, x14, x11, x12)

inst_43:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c58f5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3c58f5; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:63*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 63*FLEN/8, x14, x11, x12)

inst_44:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38af5a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f38af5a; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:66*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 66*FLEN/8, x14, x11, x12)

inst_45:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x779461 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7df79461; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:69*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 69*FLEN/8, x14, x11, x12)

inst_46:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10c4ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f10c4ce; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:72*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 72*FLEN/8, x14, x11, x12)

inst_47:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x094f18 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f094f18; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:75*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 75*FLEN/8, x14, x11, x12)

inst_48:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x312e1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb12e1f; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:78*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 78*FLEN/8, x14, x11, x12)

inst_49:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4ba816 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecba816; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:81*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 81*FLEN/8, x14, x11, x12)

inst_50:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c2a53 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebc2a53; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:84*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 84*FLEN/8, x14, x11, x12)

inst_51:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x319158 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f319158; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:87*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 87*FLEN/8, x14, x11, x12)

inst_52:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4052ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec052ad; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:90*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 90*FLEN/8, x14, x11, x12)

inst_53:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1fa717 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1fa717; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:93*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 93*FLEN/8, x14, x11, x12)

inst_54:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07e829 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e87e829; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:96*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 96*FLEN/8, x14, x11, x12)

inst_55:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2981e2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2981e2; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:99*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 99*FLEN/8, x14, x11, x12)

inst_56:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbe14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbe14; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:102*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 102*FLEN/8, x14, x11, x12)

inst_57:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x310756 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb10756; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:105*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 105*FLEN/8, x14, x11, x12)

inst_58:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ffad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed9ffad; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:108*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 108*FLEN/8, x14, x11, x12)

inst_59:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30b414 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30b414; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:111*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 111*FLEN/8, x14, x11, x12)

inst_60:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0af6e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0af6e3; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:114*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 114*FLEN/8, x14, x11, x12)

inst_61:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3adb90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebadb90; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:117*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 117*FLEN/8, x14, x11, x12)

inst_62:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2a59d1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2a59d1; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:120*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 120*FLEN/8, x14, x11, x12)

inst_63:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79582c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79582c; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:123*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 123*FLEN/8, x14, x11, x12)

inst_64:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065158 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f065158; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:126*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 126*FLEN/8, x14, x11, x12)

inst_65:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7f1541 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dff1541; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:129*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 129*FLEN/8, x14, x11, x12)

inst_66:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e5316 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e5316; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:132*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 132*FLEN/8, x14, x11, x12)

inst_67:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4dedfa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4dedfa; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:135*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 135*FLEN/8, x14, x11, x12)

inst_68:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2efc0a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2efc0a; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:138*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 138*FLEN/8, x14, x11, x12)

inst_69:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6dbe95 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6dbe95; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:141*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 141*FLEN/8, x14, x11, x12)

inst_70:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37d03d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f37d03d; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:144*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 144*FLEN/8, x14, x11, x12)

inst_71:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07976d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f07976d; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:147*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 147*FLEN/8, x14, x11, x12)

inst_72:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41a1ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec1a1ac; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:150*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 150*FLEN/8, x14, x11, x12)

inst_73:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46d0ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec6d0ac; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:153*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 153*FLEN/8, x14, x11, x12)

inst_74:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7a24a3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7efa24a3; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:156*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 156*FLEN/8, x14, x11, x12)

inst_75:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61c550 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee1c550; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:159*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 159*FLEN/8, x14, x11, x12)

inst_76:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6f7f16 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6f7f16; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:162*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 162*FLEN/8, x14, x11, x12)

inst_77:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1f9ac5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1f9ac5; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:165*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 165*FLEN/8, x14, x11, x12)

inst_78:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4490fe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec490fe; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:168*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 168*FLEN/8, x14, x11, x12)

inst_79:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x335b8d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f335b8d; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:171*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 171*FLEN/8, x14, x11, x12)

inst_80:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f5572 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef5572; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:174*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 174*FLEN/8, x14, x11, x12)

inst_81:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x678d99 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d678d99; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:177*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 177*FLEN/8, x14, x11, x12)

inst_82:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d844c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1d844c; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:180*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 180*FLEN/8, x14, x11, x12)

inst_83:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b61db and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0b61db; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:183*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 183*FLEN/8, x14, x11, x12)

inst_84:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e44fd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e44fd; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:186*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 186*FLEN/8, x14, x11, x12)

inst_85:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12ff4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e12ff4e; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:189*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 189*FLEN/8, x14, x11, x12)

inst_86:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0eff8f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0eff8f; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:192*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 192*FLEN/8, x14, x11, x12)

inst_87:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3481df and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d3481df; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:195*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 195*FLEN/8, x14, x11, x12)

inst_88:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ab7a7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7efab7a7; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:198*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 198*FLEN/8, x14, x11, x12)

inst_89:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x51bd97 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e51bd97; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:201*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 201*FLEN/8, x14, x11, x12)

inst_90:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2e0a9e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2e0a9e; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:204*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 204*FLEN/8, x14, x11, x12)

inst_91:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x281823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f281823; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:207*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 207*FLEN/8, x14, x11, x12)

inst_92:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x23397b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da3397b; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:210*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 210*FLEN/8, x14, x11, x12)

inst_93:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x489656 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec89656; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:213*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 213*FLEN/8, x14, x11, x12)

inst_94:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23f501 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f23f501; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:216*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 216*FLEN/8, x14, x11, x12)

inst_95:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3c07ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3c07ec; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:219*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 219*FLEN/8, x14, x11, x12)

inst_96:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x21a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e21a5d7; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:222*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 222*FLEN/8, x14, x11, x12)

inst_97:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29125a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f29125a; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:225*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 225*FLEN/8, x14, x11, x12)

inst_98:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x22667e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea2667e; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:228*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 228*FLEN/8, x14, x11, x12)

inst_99:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09a812 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f09a812; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:231*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 231*FLEN/8, x14, x11, x12)

inst_100:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x43d400 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc3d400; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:234*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 234*FLEN/8, x14, x11, x12)

inst_101:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0b2521 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8b2521; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:237*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 237*FLEN/8, x14, x11, x12)

inst_102:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x04012d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e04012d; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:240*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 240*FLEN/8, x14, x11, x12)

inst_103:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x012bc4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f012bc4; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:243*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 243*FLEN/8, x14, x11, x12)

inst_104:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7eadb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d7eadb5; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:246*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 246*FLEN/8, x14, x11, x12)

inst_105:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3746a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3746a3; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:249*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 249*FLEN/8, x14, x11, x12)

inst_106:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x1bb7c9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c9bb7c9; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:252*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 252*FLEN/8, x14, x11, x12)

inst_107:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0c9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0c0c9f; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:255*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 255*FLEN/8, x14, x11, x12)

inst_108:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x01ea00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c81ea00; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:258*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 258*FLEN/8, x14, x11, x12)

inst_109:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x445eb5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e445eb5; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:261*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 261*FLEN/8, x14, x11, x12)

inst_110:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c29fe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1c29fe; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:264*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 264*FLEN/8, x14, x11, x12)

inst_111:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x71556c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7df1556c; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:267*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 267*FLEN/8, x14, x11, x12)

inst_112:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d1c84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0d1c84; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:270*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 270*FLEN/8, x14, x11, x12)

inst_113:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04c461 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04c461; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:273*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 273*FLEN/8, x14, x11, x12)

inst_114:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x140eaa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e940eaa; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:276*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 276*FLEN/8, x14, x11, x12)

inst_115:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x04972f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d04972f; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:279*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 279*FLEN/8, x14, x11, x12)

inst_116:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3e148d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3e148d; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:282*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 282*FLEN/8, x14, x11, x12)

inst_117:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6894ce and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7de894ce; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:285*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 285*FLEN/8, x14, x11, x12)

inst_118:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5ed631 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cded631; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:288*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 288*FLEN/8, x14, x11, x12)

inst_119:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x042c55 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e842c55; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:291*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 291*FLEN/8, x14, x11, x12)

inst_120:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6c407f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eec407f; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:294*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 294*FLEN/8, x14, x11, x12)

inst_121:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e8d5f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0e8d5f; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:297*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 297*FLEN/8, x14, x11, x12)

inst_122:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2dbe96 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dadbe96; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:300*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 300*FLEN/8, x14, x11, x12)

inst_123:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x017d76 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e817d76; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:303*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 303*FLEN/8, x14, x11, x12)

inst_124:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x3d4d49 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cbd4d49; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:306*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 306*FLEN/8, x14, x11, x12)

inst_125:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c4868 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eac4868; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:309*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 309*FLEN/8, x14, x11, x12)

inst_126:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1310f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1310f3; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:312*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 312*FLEN/8, x14, x11, x12)

inst_127:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e11db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0e11db; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:315*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 315*FLEN/8, x14, x11, x12)

inst_128:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3017 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d3017; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:318*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 318*FLEN/8, x14, x11, x12)

inst_129:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11164e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f11164e; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:321*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 321*FLEN/8, x14, x11, x12)

inst_130:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2596ee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2596ee; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:324*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 324*FLEN/8, x14, x11, x12)

inst_131:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076d1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f076d1f; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:327*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 327*FLEN/8, x14, x11, x12)

inst_132:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x358c1d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb58c1d; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:330*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 330*FLEN/8, x14, x11, x12)

inst_133:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2d3485 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2d3485; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:333*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 333*FLEN/8, x14, x11, x12)

inst_134:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7dc215 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7efdc215; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:336*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 336*FLEN/8, x14, x11, x12)

inst_135:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72ec45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e72ec45; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:339*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 339*FLEN/8, x14, x11, x12)

inst_136:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cbf56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9cbf56; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:342*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 342*FLEN/8, x14, x11, x12)

inst_137:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2bf6ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eabf6ad; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:345*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 345*FLEN/8, x14, x11, x12)

inst_138:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f459 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f27f459; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:348*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 348*FLEN/8, x14, x11, x12)

inst_139:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x43e560 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dc3e560; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:351*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 351*FLEN/8, x14, x11, x12)

inst_140:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x609f7b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee09f7b; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:354*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 354*FLEN/8, x14, x11, x12)

inst_141:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x16e4ce and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e96e4ce; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:357*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 357*FLEN/8, x14, x11, x12)

inst_142:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x45af29 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec5af29; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:360*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 360*FLEN/8, x14, x11, x12)

inst_143:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5cec0b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ddcec0b; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:363*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 363*FLEN/8, x14, x11, x12)

inst_144:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3844b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3844b4; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:366*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 366*FLEN/8, x14, x11, x12)

inst_145:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x46fc6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e46fc6d; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:369*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 369*FLEN/8, x14, x11, x12)

inst_146:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68bbe2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee8bbe2; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:372*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 372*FLEN/8, x14, x11, x12)

inst_147:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x212fa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea12fa5; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:375*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 375*FLEN/8, x14, x11, x12)

inst_148:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x5d9799 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c5d9799; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:378*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 378*FLEN/8, x14, x11, x12)

inst_149:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5640ba and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed640ba; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:381*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 381*FLEN/8, x14, x11, x12)

inst_150:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x57ea20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dd7ea20; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:384*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 384*FLEN/8, x14, x11, x12)
RVTEST_SIGBASE(x11,signature_x11_1)

inst_151:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2e6e63 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d2e6e63; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:387*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 387*FLEN/8, x14, x11, x12)

inst_152:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e2b68 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cce2b68; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:390*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 390*FLEN/8, x14, x11, x12)

inst_153:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x778ca8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7df78ca8; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:393*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 393*FLEN/8, x14, x11, x12)

inst_154:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x134261 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d934261; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:396*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 396*FLEN/8, x14, x11, x12)

inst_155:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x73de7a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef3de7a; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:399*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 399*FLEN/8, x14, x11, x12)

inst_156:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x432be8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec32be8; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:402*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 402*FLEN/8, x14, x11, x12)

inst_157:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cd352 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3cd352; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:405*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 405*FLEN/8, x14, x11, x12)

inst_158:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x335a5f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f335a5f; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:408*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 408*FLEN/8, x14, x11, x12)

inst_159:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ef2e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3ef2e6; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:411*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 411*FLEN/8, x14, x11, x12)

inst_160:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x328a37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e328a37; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:414*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 414*FLEN/8, x14, x11, x12)

inst_161:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ac389 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eaac389; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:417*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 417*FLEN/8, x14, x11, x12)

inst_162:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x409980 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e409980; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:420*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 420*FLEN/8, x14, x11, x12)

inst_163:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6308fe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee308fe; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:423*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 423*FLEN/8, x14, x11, x12)

inst_164:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6fadd2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eefadd2; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:426*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 426*FLEN/8, x14, x11, x12)

inst_165:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x19a3cb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f19a3cb; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:429*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 429*FLEN/8, x14, x11, x12)

inst_166:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x083942 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f083942; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:432*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 432*FLEN/8, x14, x11, x12)

inst_167:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x45136f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e45136f; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:435*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 435*FLEN/8, x14, x11, x12)

inst_168:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x227041 and fs2 == 0 and fe2 == 0x2b and fm2 == 0x49b9c0 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea27041; op2val:0x15c9b9c0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:438*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 438*FLEN/8, x14, x11, x12)

inst_169:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a0e92 and fs2 == 0 and fe2 == 0x2b and fm2 == 0x222c0f and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eca0e92; op2val:0x15a22c0f;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:441*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 441*FLEN/8, x14, x11, x12)

inst_170:
// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x6d25cb and fs2 == 0 and fe2 == 0x32 and fm2 == 0x0a2cef and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7b6d25cb; op2val:0x190a2cef;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:444*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 444*FLEN/8, x14, x11, x12)

inst_171:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5a1bbe and fs2 == 0 and fe2 == 0x2f and fm2 == 0x163cbb and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cda1bbe; op2val:0x17963cbb;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:447*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 447*FLEN/8, x14, x11, x12)

inst_172:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1cf370 and fs2 == 0 and fe2 == 0x2b and fm2 == 0x50c753 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9cf370; op2val:0x15d0c753;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:450*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 450*FLEN/8, x14, x11, x12)

inst_173:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2ac3c6 and fs2 == 0 and fe2 == 0x2d and fm2 == 0x3fe3c5 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7daac3c6; op2val:0x16bfe3c5;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:453*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 453*FLEN/8, x14, x11, x12)

inst_174:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0af6b9 and fs2 == 0 and fe2 == 0x2a and fm2 == 0x6bcd6e and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0af6b9; op2val:0x156bcd6e;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:456*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 456*FLEN/8, x14, x11, x12)

inst_175:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x38fc15 and fs2 == 1 and fe2 == 0x2c and fm2 == 0x312393 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e38fc15; op2val:0x96312393;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:459*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 459*FLEN/8, x14, x11, x12)

inst_176:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x19405f and fs2 == 1 and fe2 == 0x2d and fm2 == 0x55d18b and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d99405f; op2val:0x96d5d18b;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:462*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 462*FLEN/8, x14, x11, x12)

inst_177:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0b977b and fs2 == 1 and fe2 == 0x2c and fm2 == 0x6abddf and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0b977b; op2val:0x966abddf;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:465*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 465*FLEN/8, x14, x11, x12)

inst_178:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31cfbf and fs2 == 1 and fe2 == 0x2c and fm2 == 0x3848f7 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e31cfbf; op2val:0x963848f7;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:468*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 468*FLEN/8, x14, x11, x12)

inst_179:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26ed76 and fs2 == 1 and fe2 == 0x2c and fm2 == 0x444cfa and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e26ed76; op2val:0x96444cfa;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:471*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 471*FLEN/8, x14, x11, x12)

inst_180:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x47f677 and fs2 == 1 and fe2 == 0x2b and fm2 == 0x23deda and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec7f677; op2val:0x95a3deda;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:474*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 474*FLEN/8, x14, x11, x12)

inst_181:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3254ae and fs2 == 1 and fe2 == 0x2b and fm2 == 0x37bf98 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb254ae; op2val:0x95b7bf98;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:477*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 477*FLEN/8, x14, x11, x12)

inst_182:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6dde9e and fs2 == 1 and fe2 == 0x2c and fm2 == 0x09c192 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6dde9e; op2val:0x9609c192;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:480*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 480*FLEN/8, x14, x11, x12)

inst_183:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x766f73 and fs2 == 1 and fe2 == 0x2b and fm2 == 0x04f7ca and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef66f73; op2val:0x9584f7ca;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:483*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 483*FLEN/8, x14, x11, x12)

inst_184:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x232951 and fs2 == 1 and fe2 == 0x2c and fm2 == 0x48d4f2 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e232951; op2val:0x9648d4f2;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:486*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 486*FLEN/8, x14, x11, x12)

inst_185:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e0f5d and fs2 == 1 and fe2 == 0x2a and fm2 == 0x3c41c4 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2e0f5d; op2val:0x953c41c4;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:489*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 489*FLEN/8, x14, x11, x12)

inst_186:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38eb1b and fs2 == 1 and fe2 == 0x2a and fm2 == 0x3133d6 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f38eb1b; op2val:0x953133d6;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:492*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 492*FLEN/8, x14, x11, x12)

inst_187:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bf46a and fs2 == 1 and fe2 == 0x2a and fm2 == 0x6a21ff and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0bf46a; op2val:0x956a21ff;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:495*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 495*FLEN/8, x14, x11, x12)

inst_188:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x268dc5 and fs2 == 1 and fe2 == 0x2b and fm2 == 0x44bdc1 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea68dc5; op2val:0x95c4bdc1;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:498*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 498*FLEN/8, x14, x11, x12)

inst_189:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x446aa0 and fs2 == 0 and fe2 == 0x2b and fm2 == 0x26d443 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec46aa0; op2val:0x15a6d443;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:501*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 501*FLEN/8, x14, x11, x12)

inst_190:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f221f and fs2 == 0 and fe2 == 0x2b and fm2 == 0x12da9b and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edf221f; op2val:0x1592da9b;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:504*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 504*FLEN/8, x14, x11, x12)

inst_191:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x1d64a3 and fs2 == 0 and fe2 == 0x2e and fm2 == 0x50312b and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d1d64a3; op2val:0x1750312b;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:507*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 507*FLEN/8, x14, x11, x12)

inst_192:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2084ae and fs2 == 0 and fe2 == 0x2b and fm2 == 0x4c2384 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea084ae; op2val:0x15cc2384;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:510*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 510*FLEN/8, x14, x11, x12)

inst_193:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x499ff1 and fs2 == 0 and fe2 == 0x2b and fm2 == 0x22850b and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec99ff1; op2val:0x15a2850b;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:513*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 513*FLEN/8, x14, x11, x12)

inst_194:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0b2e4b and fs2 == 0 and fe2 == 0x2c and fm2 == 0x6b6f48 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0b2e4b; op2val:0x166b6f48;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:516*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 516*FLEN/8, x14, x11, x12)

inst_195:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x100e76 and fs2 == 0 and fe2 == 0x2d and fm2 == 0x63775f and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d900e76; op2val:0x16e3775f;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:519*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 519*FLEN/8, x14, x11, x12)

inst_196:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a1c1b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1a1c1b; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:522*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 522*FLEN/8, x14, x11, x12)

inst_197:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c9d58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8c9d58; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:525*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 525*FLEN/8, x14, x11, x12)

inst_198:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x476063 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec76063; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:528*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 528*FLEN/8, x14, x11, x12)

inst_199:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30eb20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30eb20; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:531*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 531*FLEN/8, x14, x11, x12)

inst_200:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a6f9b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eea6f9b; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:534*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 534*FLEN/8, x14, x11, x12)

inst_201:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e65e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e65e4; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:537*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 537*FLEN/8, x14, x11, x12)

inst_202:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cd606 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3cd606; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:540*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 540*FLEN/8, x14, x11, x12)

inst_203:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0eef5f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8eef5f; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:543*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 543*FLEN/8, x14, x11, x12)

inst_204:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x6a262c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c6a262c; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:546*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 546*FLEN/8, x14, x11, x12)

inst_205:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x039463 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f039463; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:549*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 549*FLEN/8, x14, x11, x12)

inst_206:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1b6277 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9b6277; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:552*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 552*FLEN/8, x14, x11, x12)

inst_207:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6af2c7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6af2c7; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:555*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 555*FLEN/8, x14, x11, x12)

inst_208:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2165be and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2165be; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:558*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 558*FLEN/8, x14, x11, x12)

inst_209:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01223e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f01223e; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:561*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 561*FLEN/8, x14, x11, x12)

inst_210:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x41315c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c41315c; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:564*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 564*FLEN/8, x14, x11, x12)

inst_211:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2d58ba and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ead58ba; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:567*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 567*FLEN/8, x14, x11, x12)

inst_212:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1db2ee and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9db2ee; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:570*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 570*FLEN/8, x14, x11, x12)

inst_213:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a9244 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eba9244; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:573*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 573*FLEN/8, x14, x11, x12)

inst_214:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fef00 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1fef00; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:576*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 576*FLEN/8, x14, x11, x12)

inst_215:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6213fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee213fe; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:579*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 579*FLEN/8, x14, x11, x12)

inst_216:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x62ae46 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d62ae46; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:582*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 582*FLEN/8, x14, x11, x12)

inst_217:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5a6352 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5a6352; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:585*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 585*FLEN/8, x14, x11, x12)

inst_218:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f31c4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8f31c4; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:588*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 588*FLEN/8, x14, x11, x12)

inst_219:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339269 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f339269; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:591*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 591*FLEN/8, x14, x11, x12)

inst_220:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6b27f7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d6b27f7; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:594*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 594*FLEN/8, x14, x11, x12)

inst_221:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10f4fa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f10f4fa; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:597*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 597*FLEN/8, x14, x11, x12)

inst_222:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x13bb57 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e13bb57; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:600*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 600*FLEN/8, x14, x11, x12)

inst_223:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b79eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edb79eb; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:603*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 603*FLEN/8, x14, x11, x12)

inst_224:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1671a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x235b48 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9671a2; op2val:0x40235b48;
op3val:0x7f3fffff; valaddr_reg:x13; val_offset:606*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 606*FLEN/8, x14, x11, x12)

inst_225:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31e0ce and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0a2977 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb1e0ce; op2val:0x400a2977;
op3val:0x7f3ffffe; valaddr_reg:x13; val_offset:609*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 609*FLEN/8, x14, x11, x12)

inst_226:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10affc and fs2 == 0 and fe2 == 0x7f and fm2 == 0x29db14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f10affc; op2val:0x3fa9db14;
op3val:0x7f3fffff; valaddr_reg:x13; val_offset:612*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 612*FLEN/8, x14, x11, x12)

inst_227:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17b243 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x220202 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e97b243; op2val:0x40220202;
op3val:0x7f3fffff; valaddr_reg:x13; val_offset:615*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 615*FLEN/8, x14, x11, x12)

inst_228:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3af9fa and fs2 == 0 and fe2 == 0x82 and fm2 == 0x037061 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dbaf9fa; op2val:0x41037061;
op3val:0x7f3fffff; valaddr_reg:x13; val_offset:618*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 618*FLEN/8, x14, x11, x12)

inst_229:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3b09f3 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x036528 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dbb09f3; op2val:0x41036528;
op3val:0x7f3fffff; valaddr_reg:x13; val_offset:621*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 621*FLEN/8, x14, x11, x12)

inst_230:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x775433 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x46bb37 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d775433; op2val:0x4146bb37;
op3val:0x7f3fffff; valaddr_reg:x13; val_offset:624*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 624*FLEN/8, x14, x11, x12)

inst_231:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2336ae and fs2 == 0 and fe2 == 0x7f and fm2 == 0x16935f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2336ae; op2val:0x3f96935f;
op3val:0x7f3fffff; valaddr_reg:x13; val_offset:627*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 627*FLEN/8, x14, x11, x12)

inst_232:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762408 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x47b0cb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef62408; op2val:0x3fc7b0cb;
op3val:0x7f3fffff; valaddr_reg:x13; val_offset:630*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 630*FLEN/8, x14, x11, x12)

inst_233:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3841a0 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x05611e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3841a0; op2val:0x3f85611e;
op3val:0x7f3ffffe; valaddr_reg:x13; val_offset:633*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 633*FLEN/8, x14, x11, x12)

inst_234:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04fd41 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x38cbfd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04fd41; op2val:0x3fb8cbfd;
op3val:0x7f3fffff; valaddr_reg:x13; val_offset:636*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 636*FLEN/8, x14, x11, x12)

inst_235:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x17909f and fs2 == 0 and fe2 == 0x84 and fm2 == 0x2225f7 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c97909f; op2val:0x422225f7;
op3val:0x7f3ffffe; valaddr_reg:x13; val_offset:639*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 639*FLEN/8, x14, x11, x12)

inst_236:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1e07 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x422fc7 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7efd1e07; op2val:0x3fc22fc7;
op3val:0x7f3fffff; valaddr_reg:x13; val_offset:642*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 642*FLEN/8, x14, x11, x12)

inst_237:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x153984 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x24b0f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f153984; op2val:0x3fa4b0f4;
op3val:0x7f3ffffe; valaddr_reg:x13; val_offset:645*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 645*FLEN/8, x14, x11, x12)

inst_238:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aea5e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0aea5e; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:648*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 648*FLEN/8, x14, x11, x12)

inst_239:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f366d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebf366d; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:651*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 651*FLEN/8, x14, x11, x12)

inst_240:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x094fff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e894fff; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:654*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 654*FLEN/8, x14, x11, x12)

inst_241:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2f806f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eaf806f; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:657*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 657*FLEN/8, x14, x11, x12)

inst_242:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x195ac9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f195ac9; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:660*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 660*FLEN/8, x14, x11, x12)

inst_243:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4e8c3e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4e8c3e; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:663*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 663*FLEN/8, x14, x11, x12)

inst_244:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a19c2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eca19c2; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:666*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 666*FLEN/8, x14, x11, x12)

inst_245:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x376202 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb76202; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:669*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 669*FLEN/8, x14, x11, x12)

inst_246:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x374d41 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f374d41; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:672*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 672*FLEN/8, x14, x11, x12)

inst_247:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a6f68 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1a6f68; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:675*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 675*FLEN/8, x14, x11, x12)

inst_248:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x32f44f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f32f44f; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:678*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 678*FLEN/8, x14, x11, x12)

inst_249:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x208358 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f208358; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:681*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 681*FLEN/8, x14, x11, x12)

inst_250:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63ea1b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e63ea1b; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:684*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 684*FLEN/8, x14, x11, x12)

inst_251:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x31e3ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e31e3ca; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:687*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 687*FLEN/8, x14, x11, x12)

inst_252:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3bb1f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebbb1f5; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:690*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 690*FLEN/8, x14, x11, x12)

inst_253:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x473929 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e473929; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:693*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 693*FLEN/8, x14, x11, x12)

inst_254:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x243814 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea43814; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:696*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 696*FLEN/8, x14, x11, x12)

inst_255:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026519 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f026519; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:699*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 699*FLEN/8, x14, x11, x12)

inst_256:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f305e0d; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:702*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 702*FLEN/8, x14, x11, x12)

inst_257:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60fc5e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee0fc5e; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:705*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 705*FLEN/8, x14, x11, x12)

inst_258:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d071f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1d071f; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:708*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 708*FLEN/8, x14, x11, x12)

inst_259:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x136004 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d936004; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:711*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 711*FLEN/8, x14, x11, x12)

inst_260:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x08b9d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e88b9d9; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:714*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 714*FLEN/8, x14, x11, x12)

inst_261:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f914f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3f914f; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:717*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 717*FLEN/8, x14, x11, x12)

inst_262:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61068d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7de1068d; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:720*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 720*FLEN/8, x14, x11, x12)

inst_263:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2009f6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea009f6; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:723*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 723*FLEN/8, x14, x11, x12)

inst_264:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4d54a3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d4d54a3; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:726*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 726*FLEN/8, x14, x11, x12)

inst_265:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x04534d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d84534d; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:729*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 729*FLEN/8, x14, x11, x12)

inst_266:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2befa1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2befa1; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:732*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 732*FLEN/8, x14, x11, x12)

inst_267:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3dd17c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3dd17c; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:735*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 735*FLEN/8, x14, x11, x12)

inst_268:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x78dd0e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef8dd0e; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:738*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 738*FLEN/8, x14, x11, x12)

inst_269:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x456627 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dc56627; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:741*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 741*FLEN/8, x14, x11, x12)

inst_270:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x378efe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f378efe; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:744*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 744*FLEN/8, x14, x11, x12)

inst_271:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35fb9d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f35fb9d; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:747*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 747*FLEN/8, x14, x11, x12)

inst_272:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x025d06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d825d06; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:750*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 750*FLEN/8, x14, x11, x12)

inst_273:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d4e65 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0d4e65; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:753*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 753*FLEN/8, x14, x11, x12)

inst_274:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x009696 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f009696; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:756*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 756*FLEN/8, x14, x11, x12)

inst_275:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68aebb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee8aebb; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:759*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 759*FLEN/8, x14, x11, x12)

inst_276:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x690309 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee90309; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:762*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 762*FLEN/8, x14, x11, x12)

inst_277:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7346ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7df346ad; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:765*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 765*FLEN/8, x14, x11, x12)

inst_278:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x51f799 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dd1f799; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:768*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 768*FLEN/8, x14, x11, x12)
RVTEST_SIGBASE(x11,signature_x11_2)

inst_279:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x018006 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f018006; op2val:0x0;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:771*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 771*FLEN/8, x14, x11, x12)

inst_280:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18fa57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f18fa57; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:774*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 774*FLEN/8, x14, x11, x12)

inst_281:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x127958 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f127958; op2val:0x80000000;
op3val:0xf1bffff8; valaddr_reg:x13; val_offset:777*FLEN/8; rmval:dyn;
testreg:x12; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, x31, x30, x29, x28, dyn, 0, 0, x13, 777*FLEN/8, x14, x11, x12)
#endif


RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(2134347518,64,FLEN)
NAN_BOXED(0,64,FLEN)
NAN_BOXED(2134347518,32,FLEN)
NAN_BOXED(2134244253,64,FLEN)
NAN_BOXED(2134244253,64,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2100148685,64,FLEN)
NAN_BOXED(0,64,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2105695494,64,FLEN)
NAN_BOXED(0,64,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(2132830832,64,FLEN)
NAN_BOXED(0,64,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2131578469,64,FLEN)
NAN_BOXED(2131578469,64,FLEN)
NAN_BOXED(2131578469,32,FLEN)
NAN_BOXED(2130744982,64,FLEN)
NAN_BOXED(0,64,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(2121049623,64,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2129178299,64,FLEN)
NAN_BOXED(2129178299,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2129199881,64,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(2129199881,32,FLEN)
NAN_BOXED(2128555693,64,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2113095341,64,FLEN)
NAN_BOXED(2113095341,32,FLEN)
NAN_BOXED(2113095341,32,FLEN)
NAN_BOXED(2124767371,64,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2123832768,64,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2131415421,64,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2134835550,64,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2134263983,64,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2127623879,64,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2125124337,64,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2119041606,64,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2094839829,64,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2091425542,64,FLEN)
NAN_BOXED(0,64,FLEN)
NAN_BOXED(4055891960,32,FLEN)
test_dataset_1:
NAN_BOXED(2125628652,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2121569482,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2123492604,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2133539131,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2127160217,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2128034920,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2117425087,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2089981315,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2121905586,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2126769418,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2134884170,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2130804742,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2114693090,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2133561555,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2132343383,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(2131558735,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2133725411,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2131917144,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2132255148,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2122832556,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2134661365,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2134421338,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2113377377,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2131805390,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2131316504,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2125540895,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2127276054,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2126260819,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2133954904,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2126533293,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2132780823,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2122836009,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2133426658,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2133638676,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2125530966,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2128215981,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2133898260,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2131424995,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2126175120,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2116704721,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2121881644,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2131120472,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2113869121,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2133742358,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2119036410,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2133785610,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2121121429,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2134364221,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2131203949,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2126619052,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2126958764,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2130322595,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2128725328,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2121236246,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2116000453,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2126811390,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2134072205,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2129614194,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2103938457,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2132640844,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2131452379,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2133738749,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2115174222,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2131689359,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2100593119,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2130360231,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2119286167,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2116946590,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2133334051,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2107849083,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2127074902,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2133062913,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2117863404,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2116134359,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2133398106,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2124572286,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2131339282,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2093208576,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2123048225,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2114191661,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2130783172,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2105454005,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2134328995,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2090579913,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2131496095,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2088888832,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2118409909,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2132552190,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2112968044,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2114788484,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2131018849,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2123632298,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2097452847,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2134774925,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2112394446,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2094978609,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2122591317,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2129412223,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2131660127,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2108538518,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2122415478,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2092780873,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2125219944,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2131955955,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2131628507,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2133667863,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2131826254,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2133169902,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2131193119,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2125827101,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2116891781,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2130559509,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2121460805,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2107424598,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2125199021,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2133324889,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2109990240,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2128650107,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2123818190,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2126884649,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2111630347,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2134394036,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2118581357,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2129181666,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2124492709,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2086508441,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2127970490,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2111302176,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2100194915,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2093886312,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2113375400,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2106802785,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2129911418,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2126719976,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2134692690,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2134071903,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2134831846,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2117241399,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2125120393,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2118162816,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2128808190,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2129636818,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2132386763,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2131245378,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2118456175,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2124574785,32,FLEN)
NAN_BOXED(365541824,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2127171218,32,FLEN)
NAN_BOXED(362949647,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2070750667,32,FLEN)
NAN_BOXED(420097263,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2094668734,32,FLEN)
NAN_BOXED(395721915,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2124215152,32,FLEN)
NAN_BOXED(366004051,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2108343238,32,FLEN)
NAN_BOXED(381674437,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2131424953,32,FLEN)
NAN_BOXED(359386478,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2117663765,32,FLEN)
NAN_BOXED(2519802771,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2107195487,32,FLEN)
NAN_BOXED(2530595211,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2114688891,32,FLEN)
NAN_BOXED(2523577823,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2117193663,32,FLEN)
NAN_BOXED(2520271095,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2116480374,32,FLEN)
NAN_BOXED(2521058554,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2127033975,32,FLEN)
NAN_BOXED(2510544602,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2125616302,32,FLEN)
NAN_BOXED(2511847320,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2121129630,32,FLEN)
NAN_BOXED(2517221778,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2130079603,32,FLEN)
NAN_BOXED(2508519370,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2116233553,32,FLEN)
NAN_BOXED(2521355506,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2133725021,32,FLEN)
NAN_BOXED(2503754180,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2134436635,32,FLEN)
NAN_BOXED(2503029718,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2131489898,32,FLEN)
NAN_BOXED(2506760703,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2124844485,32,FLEN)
NAN_BOXED(2512698817,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2126801568,32,FLEN)
NAN_BOXED(363254851,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2128552479,32,FLEN)
NAN_BOXED(361945755,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2099078307,32,FLEN)
NAN_BOXED(391131435,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2124448942,32,FLEN)
NAN_BOXED(365699972,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2127142897,32,FLEN)
NAN_BOXED(362972427,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2114661963,32,FLEN)
NAN_BOXED(376139592,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2106592886,32,FLEN)
NAN_BOXED(384005983,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2132417563,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2123144536,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2126995555,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2133912352,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2129293211,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2120115684,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2134693382,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2123296607,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2087331372,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2130941027,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2107335287,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2120938183,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2132895166,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2130780734,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2084647260,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2125289658,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2124264174,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2126156356,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2116022016,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2128745470,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2103619142,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2119852882,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2123313604,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2134086249,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2104174583,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2131817722,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2115222359,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2128312811,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2123788706,32,FLEN)
NAN_BOXED(1076058952,32,FLEN)
NAN_BOXED(2134900735,32,FLEN)
NAN_BOXED(2125586638,32,FLEN)
NAN_BOXED(1074407799,32,FLEN)
NAN_BOXED(2134900734,32,FLEN)
NAN_BOXED(2131800060,32,FLEN)
NAN_BOXED(1068096276,32,FLEN)
NAN_BOXED(2134900735,32,FLEN)
NAN_BOXED(2123870787,32,FLEN)
NAN_BOXED(1075970562,32,FLEN)
NAN_BOXED(2134900735,32,FLEN)
NAN_BOXED(2109405690,32,FLEN)
NAN_BOXED(1090744417,32,FLEN)
NAN_BOXED(2134900735,32,FLEN)
NAN_BOXED(2109409779,32,FLEN)
NAN_BOXED(1090741544,32,FLEN)
NAN_BOXED(2134900735,32,FLEN)
NAN_BOXED(2104972339,32,FLEN)
NAN_BOXED(1095154487,32,FLEN)
NAN_BOXED(2134900735,32,FLEN)
NAN_BOXED(2133014190,32,FLEN)
NAN_BOXED(1066832735,32,FLEN)
NAN_BOXED(2134900735,32,FLEN)
NAN_BOXED(2130060296,32,FLEN)
NAN_BOXED(1070051531,32,FLEN)
NAN_BOXED(2134900735,32,FLEN)
NAN_BOXED(2134393248,32,FLEN)
NAN_BOXED(1065705758,32,FLEN)
NAN_BOXED(2134900734,32,FLEN)
NAN_BOXED(2131033409,32,FLEN)
NAN_BOXED(1069075453,32,FLEN)
NAN_BOXED(2134900735,32,FLEN)
NAN_BOXED(2090307743,32,FLEN)
NAN_BOXED(1109534199,32,FLEN)
NAN_BOXED(2134900734,32,FLEN)
NAN_BOXED(2130517511,32,FLEN)
NAN_BOXED(1069690823,32,FLEN)
NAN_BOXED(2134900735,32,FLEN)
NAN_BOXED(2132097412,32,FLEN)
NAN_BOXED(1067757812,32,FLEN)
NAN_BOXED(2134900734,32,FLEN)
NAN_BOXED(2131421790,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2126460525,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2122928127,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2125430895,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2132368073,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2119076926,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2127174082,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2125947394,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2134330689,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2132438888,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2134045775,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2132837208,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2120477211,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2117198794,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2126230005,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2118596905,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2124691476,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2130863385,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2133876237,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2128673886,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2132608799,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2106810372,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2122889689,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2134872399,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2111899277,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2124417526,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2102219939,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2105824077,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2133585825,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2134757756,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2130238734,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2110088743,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2134347518,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2134244253,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2105695494,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2131578469,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2130744982,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2129178299,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2129199881,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2113095341,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2110912409,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2130804742,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2132343383,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
NAN_BOXED(2131917144,32,FLEN)
NAN_BOXED(2147483648,32,FLEN)
NAN_BOXED(4055891960,32,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;



signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 46*((SIGALIGN)/4),4,0xdeadbeef


signature_x11_0:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x11_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x11_2:
    .fill 6*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine
tsig_begin_canary:
CANARY;

mtrap_sigptr:
    .fill 64*XLEN/32,4,0xdeadbeef

tsig_end_canary:
CANARY;
#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif


sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
