
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.11.0
// timestamp : Mon Feb  5 07:40:16 2024 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /home/riscv/riscv-ctg/sample_cgfs/dataset.cgf \
//                  --cgf /home/riscv/riscv-ctg/sample_cgfs/sample_cgfs_fext/RV64Zfinx/fnmsub.s.cgf \
 \
//                  -- xlen 64  \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fnmsub.s instruction of the RISC-V RV64_Zfinx,RV64_Zdinx extension for the fnmsub_b15 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV64I_Zfinx,RV64I_Zdinx")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*Zfinx.*);def TEST_CASE_1=True;",fnmsub_b15)

RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_12272:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xac7ffc00; valaddr_reg:x12; val_offset:36753*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36753*FLEN/8, x13, x9, x10)

inst_12273:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xac0003ff; valaddr_reg:x12; val_offset:36756*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36756*FLEN/8, x13, x9, x10)

inst_12274:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xac7ffe00; valaddr_reg:x12; val_offset:36759*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36759*FLEN/8, x13, x9, x10)

inst_12275:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xac0001ff; valaddr_reg:x12; val_offset:36762*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36762*FLEN/8, x13, x9, x10)

inst_12276:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xac7fff00; valaddr_reg:x12; val_offset:36765*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36765*FLEN/8, x13, x9, x10)

inst_12277:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xac0000ff; valaddr_reg:x12; val_offset:36768*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36768*FLEN/8, x13, x9, x10)

inst_12278:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xac7fff80; valaddr_reg:x12; val_offset:36771*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36771*FLEN/8, x13, x9, x10)

inst_12279:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xac00007f; valaddr_reg:x12; val_offset:36774*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36774*FLEN/8, x13, x9, x10)

inst_12280:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xac7fffc0; valaddr_reg:x12; val_offset:36777*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36777*FLEN/8, x13, x9, x10)

inst_12281:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xac00003f; valaddr_reg:x12; val_offset:36780*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36780*FLEN/8, x13, x9, x10)

inst_12282:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xac7fffe0; valaddr_reg:x12; val_offset:36783*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36783*FLEN/8, x13, x9, x10)

inst_12283:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xac00001f; valaddr_reg:x12; val_offset:36786*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36786*FLEN/8, x13, x9, x10)

inst_12284:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xac7ffff0; valaddr_reg:x12; val_offset:36789*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36789*FLEN/8, x13, x9, x10)

inst_12285:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xac00000f; valaddr_reg:x12; val_offset:36792*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36792*FLEN/8, x13, x9, x10)

inst_12286:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xac7ffff8; valaddr_reg:x12; val_offset:36795*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36795*FLEN/8, x13, x9, x10)

inst_12287:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xac000007; valaddr_reg:x12; val_offset:36798*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36798*FLEN/8, x13, x9, x10)

inst_12288:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xac7ffffc; valaddr_reg:x12; val_offset:36801*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36801*FLEN/8, x13, x9, x10)

inst_12289:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xac000003; valaddr_reg:x12; val_offset:36804*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36804*FLEN/8, x13, x9, x10)

inst_12290:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xac7ffffe; valaddr_reg:x12; val_offset:36807*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36807*FLEN/8, x13, x9, x10)

inst_12291:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xac000001; valaddr_reg:x12; val_offset:36810*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36810*FLEN/8, x13, x9, x10)

inst_12292:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:36813*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36813*FLEN/8, x13, x9, x10)

inst_12293:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xbf800007; valaddr_reg:x12; val_offset:36816*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36816*FLEN/8, x13, x9, x10)

inst_12294:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:36819*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36819*FLEN/8, x13, x9, x10)

inst_12295:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xbf800003; valaddr_reg:x12; val_offset:36822*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36822*FLEN/8, x13, x9, x10)

inst_12296:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:36825*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36825*FLEN/8, x13, x9, x10)

inst_12297:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xbf800001; valaddr_reg:x12; val_offset:36828*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36828*FLEN/8, x13, x9, x10)

inst_12298:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:36831*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36831*FLEN/8, x13, x9, x10)

inst_12299:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:36834*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36834*FLEN/8, x13, x9, x10)

inst_12300:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xbf999999; valaddr_reg:x12; val_offset:36837*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36837*FLEN/8, x13, x9, x10)

inst_12301:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:36840*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36840*FLEN/8, x13, x9, x10)

inst_12302:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:36843*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36843*FLEN/8, x13, x9, x10)

inst_12303:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:36846*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36846*FLEN/8, x13, x9, x10)

inst_12304:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:36849*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36849*FLEN/8, x13, x9, x10)

inst_12305:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:36852*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36852*FLEN/8, x13, x9, x10)

inst_12306:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:36855*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36855*FLEN/8, x13, x9, x10)

inst_12307:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x14a897 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x8094a897;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:36858*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36858*FLEN/8, x13, x9, x10)

inst_12308:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac800000; valaddr_reg:x12; val_offset:36861*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36861*FLEN/8, x13, x9, x10)

inst_12309:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacffffff; valaddr_reg:x12; val_offset:36864*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36864*FLEN/8, x13, x9, x10)

inst_12310:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacc00000; valaddr_reg:x12; val_offset:36867*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36867*FLEN/8, x13, x9, x10)

inst_12311:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacbfffff; valaddr_reg:x12; val_offset:36870*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36870*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_96)
inst_12312:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xace00000; valaddr_reg:x12; val_offset:36873*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36873*FLEN/8, x13, x9, x10)

inst_12313:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac9fffff; valaddr_reg:x12; val_offset:36876*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36876*FLEN/8, x13, x9, x10)

inst_12314:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacf00000; valaddr_reg:x12; val_offset:36879*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36879*FLEN/8, x13, x9, x10)

inst_12315:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac8fffff; valaddr_reg:x12; val_offset:36882*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36882*FLEN/8, x13, x9, x10)

inst_12316:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacf80000; valaddr_reg:x12; val_offset:36885*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36885*FLEN/8, x13, x9, x10)

inst_12317:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac87ffff; valaddr_reg:x12; val_offset:36888*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36888*FLEN/8, x13, x9, x10)

inst_12318:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacfc0000; valaddr_reg:x12; val_offset:36891*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36891*FLEN/8, x13, x9, x10)

inst_12319:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac83ffff; valaddr_reg:x12; val_offset:36894*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36894*FLEN/8, x13, x9, x10)

inst_12320:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacfe0000; valaddr_reg:x12; val_offset:36897*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36897*FLEN/8, x13, x9, x10)

inst_12321:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac81ffff; valaddr_reg:x12; val_offset:36900*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36900*FLEN/8, x13, x9, x10)

inst_12322:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacff0000; valaddr_reg:x12; val_offset:36903*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36903*FLEN/8, x13, x9, x10)

inst_12323:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac80ffff; valaddr_reg:x12; val_offset:36906*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36906*FLEN/8, x13, x9, x10)

inst_12324:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacff8000; valaddr_reg:x12; val_offset:36909*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36909*FLEN/8, x13, x9, x10)

inst_12325:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac807fff; valaddr_reg:x12; val_offset:36912*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36912*FLEN/8, x13, x9, x10)

inst_12326:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacffc000; valaddr_reg:x12; val_offset:36915*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36915*FLEN/8, x13, x9, x10)

inst_12327:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac803fff; valaddr_reg:x12; val_offset:36918*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36918*FLEN/8, x13, x9, x10)

inst_12328:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacffe000; valaddr_reg:x12; val_offset:36921*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36921*FLEN/8, x13, x9, x10)

inst_12329:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac801fff; valaddr_reg:x12; val_offset:36924*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36924*FLEN/8, x13, x9, x10)

inst_12330:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacfff000; valaddr_reg:x12; val_offset:36927*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36927*FLEN/8, x13, x9, x10)

inst_12331:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac800fff; valaddr_reg:x12; val_offset:36930*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36930*FLEN/8, x13, x9, x10)

inst_12332:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacfff800; valaddr_reg:x12; val_offset:36933*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36933*FLEN/8, x13, x9, x10)

inst_12333:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac8007ff; valaddr_reg:x12; val_offset:36936*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36936*FLEN/8, x13, x9, x10)

inst_12334:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacfffc00; valaddr_reg:x12; val_offset:36939*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36939*FLEN/8, x13, x9, x10)

inst_12335:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac8003ff; valaddr_reg:x12; val_offset:36942*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36942*FLEN/8, x13, x9, x10)

inst_12336:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacfffe00; valaddr_reg:x12; val_offset:36945*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36945*FLEN/8, x13, x9, x10)

inst_12337:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac8001ff; valaddr_reg:x12; val_offset:36948*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36948*FLEN/8, x13, x9, x10)

inst_12338:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacffff00; valaddr_reg:x12; val_offset:36951*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36951*FLEN/8, x13, x9, x10)

inst_12339:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac8000ff; valaddr_reg:x12; val_offset:36954*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36954*FLEN/8, x13, x9, x10)

inst_12340:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacffff80; valaddr_reg:x12; val_offset:36957*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36957*FLEN/8, x13, x9, x10)

inst_12341:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac80007f; valaddr_reg:x12; val_offset:36960*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36960*FLEN/8, x13, x9, x10)

inst_12342:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacffffc0; valaddr_reg:x12; val_offset:36963*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36963*FLEN/8, x13, x9, x10)

inst_12343:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac80003f; valaddr_reg:x12; val_offset:36966*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36966*FLEN/8, x13, x9, x10)

inst_12344:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacffffe0; valaddr_reg:x12; val_offset:36969*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36969*FLEN/8, x13, x9, x10)

inst_12345:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac80001f; valaddr_reg:x12; val_offset:36972*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36972*FLEN/8, x13, x9, x10)

inst_12346:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacfffff0; valaddr_reg:x12; val_offset:36975*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36975*FLEN/8, x13, x9, x10)

inst_12347:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac80000f; valaddr_reg:x12; val_offset:36978*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36978*FLEN/8, x13, x9, x10)

inst_12348:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacfffff8; valaddr_reg:x12; val_offset:36981*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36981*FLEN/8, x13, x9, x10)

inst_12349:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac800007; valaddr_reg:x12; val_offset:36984*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36984*FLEN/8, x13, x9, x10)

inst_12350:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacfffffc; valaddr_reg:x12; val_offset:36987*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36987*FLEN/8, x13, x9, x10)

inst_12351:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac800003; valaddr_reg:x12; val_offset:36990*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36990*FLEN/8, x13, x9, x10)

inst_12352:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xacfffffe; valaddr_reg:x12; val_offset:36993*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36993*FLEN/8, x13, x9, x10)

inst_12353:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xac800001; valaddr_reg:x12; val_offset:36996*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36996*FLEN/8, x13, x9, x10)

inst_12354:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:36999*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 36999*FLEN/8, x13, x9, x10)

inst_12355:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xbf800007; valaddr_reg:x12; val_offset:37002*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37002*FLEN/8, x13, x9, x10)

inst_12356:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:37005*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37005*FLEN/8, x13, x9, x10)

inst_12357:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xbf800003; valaddr_reg:x12; val_offset:37008*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37008*FLEN/8, x13, x9, x10)

inst_12358:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:37011*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37011*FLEN/8, x13, x9, x10)

inst_12359:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xbf800001; valaddr_reg:x12; val_offset:37014*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37014*FLEN/8, x13, x9, x10)

inst_12360:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:37017*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37017*FLEN/8, x13, x9, x10)

inst_12361:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:37020*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37020*FLEN/8, x13, x9, x10)

inst_12362:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xbf999999; valaddr_reg:x12; val_offset:37023*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37023*FLEN/8, x13, x9, x10)

inst_12363:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:37026*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37026*FLEN/8, x13, x9, x10)

inst_12364:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:37029*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37029*FLEN/8, x13, x9, x10)

inst_12365:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:37032*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37032*FLEN/8, x13, x9, x10)

inst_12366:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:37035*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37035*FLEN/8, x13, x9, x10)

inst_12367:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:37038*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37038*FLEN/8, x13, x9, x10)

inst_12368:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:37041*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37041*FLEN/8, x13, x9, x10)

inst_12369:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8e8c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34a994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8e8c; op2val:0x8034a994;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:37044*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37044*FLEN/8, x13, x9, x10)

inst_12370:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad000000; valaddr_reg:x12; val_offset:37047*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37047*FLEN/8, x13, x9, x10)

inst_12371:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7fffff; valaddr_reg:x12; val_offset:37050*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37050*FLEN/8, x13, x9, x10)

inst_12372:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad400000; valaddr_reg:x12; val_offset:37053*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37053*FLEN/8, x13, x9, x10)

inst_12373:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad3fffff; valaddr_reg:x12; val_offset:37056*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37056*FLEN/8, x13, x9, x10)

inst_12374:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad600000; valaddr_reg:x12; val_offset:37059*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37059*FLEN/8, x13, x9, x10)

inst_12375:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad1fffff; valaddr_reg:x12; val_offset:37062*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37062*FLEN/8, x13, x9, x10)

inst_12376:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad700000; valaddr_reg:x12; val_offset:37065*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37065*FLEN/8, x13, x9, x10)

inst_12377:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad0fffff; valaddr_reg:x12; val_offset:37068*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37068*FLEN/8, x13, x9, x10)

inst_12378:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad780000; valaddr_reg:x12; val_offset:37071*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37071*FLEN/8, x13, x9, x10)

inst_12379:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad07ffff; valaddr_reg:x12; val_offset:37074*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37074*FLEN/8, x13, x9, x10)

inst_12380:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7c0000; valaddr_reg:x12; val_offset:37077*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37077*FLEN/8, x13, x9, x10)

inst_12381:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad03ffff; valaddr_reg:x12; val_offset:37080*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37080*FLEN/8, x13, x9, x10)

inst_12382:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7e0000; valaddr_reg:x12; val_offset:37083*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37083*FLEN/8, x13, x9, x10)

inst_12383:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad01ffff; valaddr_reg:x12; val_offset:37086*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37086*FLEN/8, x13, x9, x10)

inst_12384:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7f0000; valaddr_reg:x12; val_offset:37089*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37089*FLEN/8, x13, x9, x10)

inst_12385:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad00ffff; valaddr_reg:x12; val_offset:37092*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37092*FLEN/8, x13, x9, x10)

inst_12386:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7f8000; valaddr_reg:x12; val_offset:37095*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37095*FLEN/8, x13, x9, x10)

inst_12387:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad007fff; valaddr_reg:x12; val_offset:37098*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37098*FLEN/8, x13, x9, x10)

inst_12388:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7fc000; valaddr_reg:x12; val_offset:37101*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37101*FLEN/8, x13, x9, x10)

inst_12389:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad003fff; valaddr_reg:x12; val_offset:37104*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37104*FLEN/8, x13, x9, x10)

inst_12390:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7fe000; valaddr_reg:x12; val_offset:37107*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37107*FLEN/8, x13, x9, x10)

inst_12391:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad001fff; valaddr_reg:x12; val_offset:37110*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37110*FLEN/8, x13, x9, x10)

inst_12392:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7ff000; valaddr_reg:x12; val_offset:37113*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37113*FLEN/8, x13, x9, x10)

inst_12393:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad000fff; valaddr_reg:x12; val_offset:37116*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37116*FLEN/8, x13, x9, x10)

inst_12394:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7ff800; valaddr_reg:x12; val_offset:37119*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37119*FLEN/8, x13, x9, x10)

inst_12395:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad0007ff; valaddr_reg:x12; val_offset:37122*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37122*FLEN/8, x13, x9, x10)

inst_12396:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7ffc00; valaddr_reg:x12; val_offset:37125*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37125*FLEN/8, x13, x9, x10)

inst_12397:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad0003ff; valaddr_reg:x12; val_offset:37128*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37128*FLEN/8, x13, x9, x10)

inst_12398:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7ffe00; valaddr_reg:x12; val_offset:37131*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37131*FLEN/8, x13, x9, x10)

inst_12399:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad0001ff; valaddr_reg:x12; val_offset:37134*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37134*FLEN/8, x13, x9, x10)

inst_12400:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7fff00; valaddr_reg:x12; val_offset:37137*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37137*FLEN/8, x13, x9, x10)

inst_12401:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad0000ff; valaddr_reg:x12; val_offset:37140*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37140*FLEN/8, x13, x9, x10)

inst_12402:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7fff80; valaddr_reg:x12; val_offset:37143*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37143*FLEN/8, x13, x9, x10)

inst_12403:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad00007f; valaddr_reg:x12; val_offset:37146*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37146*FLEN/8, x13, x9, x10)

inst_12404:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7fffc0; valaddr_reg:x12; val_offset:37149*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37149*FLEN/8, x13, x9, x10)

inst_12405:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad00003f; valaddr_reg:x12; val_offset:37152*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37152*FLEN/8, x13, x9, x10)

inst_12406:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7fffe0; valaddr_reg:x12; val_offset:37155*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37155*FLEN/8, x13, x9, x10)

inst_12407:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad00001f; valaddr_reg:x12; val_offset:37158*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37158*FLEN/8, x13, x9, x10)

inst_12408:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7ffff0; valaddr_reg:x12; val_offset:37161*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37161*FLEN/8, x13, x9, x10)

inst_12409:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad00000f; valaddr_reg:x12; val_offset:37164*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37164*FLEN/8, x13, x9, x10)

inst_12410:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7ffff8; valaddr_reg:x12; val_offset:37167*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37167*FLEN/8, x13, x9, x10)

inst_12411:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad000007; valaddr_reg:x12; val_offset:37170*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37170*FLEN/8, x13, x9, x10)

inst_12412:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7ffffc; valaddr_reg:x12; val_offset:37173*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37173*FLEN/8, x13, x9, x10)

inst_12413:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad000003; valaddr_reg:x12; val_offset:37176*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37176*FLEN/8, x13, x9, x10)

inst_12414:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad7ffffe; valaddr_reg:x12; val_offset:37179*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37179*FLEN/8, x13, x9, x10)

inst_12415:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xad000001; valaddr_reg:x12; val_offset:37182*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37182*FLEN/8, x13, x9, x10)

inst_12416:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:37185*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37185*FLEN/8, x13, x9, x10)

inst_12417:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xbf800007; valaddr_reg:x12; val_offset:37188*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37188*FLEN/8, x13, x9, x10)

inst_12418:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:37191*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37191*FLEN/8, x13, x9, x10)

inst_12419:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xbf800003; valaddr_reg:x12; val_offset:37194*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37194*FLEN/8, x13, x9, x10)

inst_12420:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:37197*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37197*FLEN/8, x13, x9, x10)

inst_12421:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xbf800001; valaddr_reg:x12; val_offset:37200*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37200*FLEN/8, x13, x9, x10)

inst_12422:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:37203*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37203*FLEN/8, x13, x9, x10)

inst_12423:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:37206*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37206*FLEN/8, x13, x9, x10)

inst_12424:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xbf999999; valaddr_reg:x12; val_offset:37209*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37209*FLEN/8, x13, x9, x10)

inst_12425:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:37212*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37212*FLEN/8, x13, x9, x10)

inst_12426:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:37215*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37215*FLEN/8, x13, x9, x10)

inst_12427:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:37218*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37218*FLEN/8, x13, x9, x10)

inst_12428:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:37221*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37221*FLEN/8, x13, x9, x10)

inst_12429:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:37224*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37224*FLEN/8, x13, x9, x10)

inst_12430:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:37227*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37227*FLEN/8, x13, x9, x10)

inst_12431:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0a79d8 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x6ca215 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0a79d8; op2val:0x81eca215;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:37230*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37230*FLEN/8, x13, x9, x10)

inst_12432:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xad800000; valaddr_reg:x12; val_offset:37233*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37233*FLEN/8, x13, x9, x10)

inst_12433:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xadffffff; valaddr_reg:x12; val_offset:37236*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37236*FLEN/8, x13, x9, x10)

inst_12434:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xadc00000; valaddr_reg:x12; val_offset:37239*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37239*FLEN/8, x13, x9, x10)

inst_12435:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xadbfffff; valaddr_reg:x12; val_offset:37242*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37242*FLEN/8, x13, x9, x10)

inst_12436:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xade00000; valaddr_reg:x12; val_offset:37245*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37245*FLEN/8, x13, x9, x10)

inst_12437:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xad9fffff; valaddr_reg:x12; val_offset:37248*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37248*FLEN/8, x13, x9, x10)

inst_12438:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xadf00000; valaddr_reg:x12; val_offset:37251*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37251*FLEN/8, x13, x9, x10)

inst_12439:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xad8fffff; valaddr_reg:x12; val_offset:37254*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37254*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_97)
inst_12440:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xadf80000; valaddr_reg:x12; val_offset:37257*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37257*FLEN/8, x13, x9, x10)

inst_12441:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xad87ffff; valaddr_reg:x12; val_offset:37260*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37260*FLEN/8, x13, x9, x10)

inst_12442:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xadfc0000; valaddr_reg:x12; val_offset:37263*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37263*FLEN/8, x13, x9, x10)

inst_12443:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xad83ffff; valaddr_reg:x12; val_offset:37266*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37266*FLEN/8, x13, x9, x10)

inst_12444:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xadfe0000; valaddr_reg:x12; val_offset:37269*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37269*FLEN/8, x13, x9, x10)

inst_12445:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xad81ffff; valaddr_reg:x12; val_offset:37272*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37272*FLEN/8, x13, x9, x10)

inst_12446:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xadff0000; valaddr_reg:x12; val_offset:37275*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37275*FLEN/8, x13, x9, x10)

inst_12447:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xad80ffff; valaddr_reg:x12; val_offset:37278*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37278*FLEN/8, x13, x9, x10)

inst_12448:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xadff8000; valaddr_reg:x12; val_offset:37281*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37281*FLEN/8, x13, x9, x10)

inst_12449:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xad807fff; valaddr_reg:x12; val_offset:37284*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37284*FLEN/8, x13, x9, x10)

inst_12450:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xadffc000; valaddr_reg:x12; val_offset:37287*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37287*FLEN/8, x13, x9, x10)

inst_12451:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xad803fff; valaddr_reg:x12; val_offset:37290*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37290*FLEN/8, x13, x9, x10)

inst_12452:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xadffe000; valaddr_reg:x12; val_offset:37293*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37293*FLEN/8, x13, x9, x10)

inst_12453:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xad801fff; valaddr_reg:x12; val_offset:37296*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37296*FLEN/8, x13, x9, x10)

inst_12454:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xadfff000; valaddr_reg:x12; val_offset:37299*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37299*FLEN/8, x13, x9, x10)

inst_12455:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xad800fff; valaddr_reg:x12; val_offset:37302*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37302*FLEN/8, x13, x9, x10)

inst_12456:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xadfff800; valaddr_reg:x12; val_offset:37305*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37305*FLEN/8, x13, x9, x10)

inst_12457:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xad8007ff; valaddr_reg:x12; val_offset:37308*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37308*FLEN/8, x13, x9, x10)

inst_12458:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xadfffc00; valaddr_reg:x12; val_offset:37311*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37311*FLEN/8, x13, x9, x10)

inst_12459:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xad8003ff; valaddr_reg:x12; val_offset:37314*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37314*FLEN/8, x13, x9, x10)

inst_12460:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xadfffe00; valaddr_reg:x12; val_offset:37317*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37317*FLEN/8, x13, x9, x10)

inst_12461:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xad8001ff; valaddr_reg:x12; val_offset:37320*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37320*FLEN/8, x13, x9, x10)

inst_12462:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xadffff00; valaddr_reg:x12; val_offset:37323*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37323*FLEN/8, x13, x9, x10)

inst_12463:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xad8000ff; valaddr_reg:x12; val_offset:37326*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37326*FLEN/8, x13, x9, x10)

inst_12464:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xadffff80; valaddr_reg:x12; val_offset:37329*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37329*FLEN/8, x13, x9, x10)

inst_12465:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xad80007f; valaddr_reg:x12; val_offset:37332*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37332*FLEN/8, x13, x9, x10)

inst_12466:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xadffffc0; valaddr_reg:x12; val_offset:37335*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37335*FLEN/8, x13, x9, x10)

inst_12467:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xad80003f; valaddr_reg:x12; val_offset:37338*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37338*FLEN/8, x13, x9, x10)

inst_12468:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xadffffe0; valaddr_reg:x12; val_offset:37341*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37341*FLEN/8, x13, x9, x10)

inst_12469:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xad80001f; valaddr_reg:x12; val_offset:37344*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37344*FLEN/8, x13, x9, x10)

inst_12470:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xadfffff0; valaddr_reg:x12; val_offset:37347*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37347*FLEN/8, x13, x9, x10)

inst_12471:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xad80000f; valaddr_reg:x12; val_offset:37350*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37350*FLEN/8, x13, x9, x10)

inst_12472:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xadfffff8; valaddr_reg:x12; val_offset:37353*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37353*FLEN/8, x13, x9, x10)

inst_12473:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xad800007; valaddr_reg:x12; val_offset:37356*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37356*FLEN/8, x13, x9, x10)

inst_12474:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xadfffffc; valaddr_reg:x12; val_offset:37359*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37359*FLEN/8, x13, x9, x10)

inst_12475:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xad800003; valaddr_reg:x12; val_offset:37362*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37362*FLEN/8, x13, x9, x10)

inst_12476:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xadfffffe; valaddr_reg:x12; val_offset:37365*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37365*FLEN/8, x13, x9, x10)

inst_12477:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xad800001; valaddr_reg:x12; val_offset:37368*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37368*FLEN/8, x13, x9, x10)

inst_12478:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:37371*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37371*FLEN/8, x13, x9, x10)

inst_12479:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xbf800007; valaddr_reg:x12; val_offset:37374*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37374*FLEN/8, x13, x9, x10)

inst_12480:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:37377*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37377*FLEN/8, x13, x9, x10)

inst_12481:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xbf800003; valaddr_reg:x12; val_offset:37380*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37380*FLEN/8, x13, x9, x10)

inst_12482:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:37383*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37383*FLEN/8, x13, x9, x10)

inst_12483:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xbf800001; valaddr_reg:x12; val_offset:37386*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37386*FLEN/8, x13, x9, x10)

inst_12484:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:37389*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37389*FLEN/8, x13, x9, x10)

inst_12485:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:37392*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37392*FLEN/8, x13, x9, x10)

inst_12486:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xbf999999; valaddr_reg:x12; val_offset:37395*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37395*FLEN/8, x13, x9, x10)

inst_12487:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:37398*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37398*FLEN/8, x13, x9, x10)

inst_12488:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:37401*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37401*FLEN/8, x13, x9, x10)

inst_12489:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:37404*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37404*FLEN/8, x13, x9, x10)

inst_12490:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:37407*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37407*FLEN/8, x13, x9, x10)

inst_12491:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:37410*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37410*FLEN/8, x13, x9, x10)

inst_12492:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:37413*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37413*FLEN/8, x13, x9, x10)

inst_12493:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f37d2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x802f37d2;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:37416*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37416*FLEN/8, x13, x9, x10)

inst_12494:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae000000; valaddr_reg:x12; val_offset:37419*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37419*FLEN/8, x13, x9, x10)

inst_12495:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7fffff; valaddr_reg:x12; val_offset:37422*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37422*FLEN/8, x13, x9, x10)

inst_12496:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae400000; valaddr_reg:x12; val_offset:37425*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37425*FLEN/8, x13, x9, x10)

inst_12497:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae3fffff; valaddr_reg:x12; val_offset:37428*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37428*FLEN/8, x13, x9, x10)

inst_12498:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae600000; valaddr_reg:x12; val_offset:37431*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37431*FLEN/8, x13, x9, x10)

inst_12499:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae1fffff; valaddr_reg:x12; val_offset:37434*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37434*FLEN/8, x13, x9, x10)

inst_12500:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae700000; valaddr_reg:x12; val_offset:37437*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37437*FLEN/8, x13, x9, x10)

inst_12501:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae0fffff; valaddr_reg:x12; val_offset:37440*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37440*FLEN/8, x13, x9, x10)

inst_12502:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae780000; valaddr_reg:x12; val_offset:37443*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37443*FLEN/8, x13, x9, x10)

inst_12503:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae07ffff; valaddr_reg:x12; val_offset:37446*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37446*FLEN/8, x13, x9, x10)

inst_12504:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7c0000; valaddr_reg:x12; val_offset:37449*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37449*FLEN/8, x13, x9, x10)

inst_12505:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae03ffff; valaddr_reg:x12; val_offset:37452*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37452*FLEN/8, x13, x9, x10)

inst_12506:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7e0000; valaddr_reg:x12; val_offset:37455*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37455*FLEN/8, x13, x9, x10)

inst_12507:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae01ffff; valaddr_reg:x12; val_offset:37458*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37458*FLEN/8, x13, x9, x10)

inst_12508:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7f0000; valaddr_reg:x12; val_offset:37461*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37461*FLEN/8, x13, x9, x10)

inst_12509:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae00ffff; valaddr_reg:x12; val_offset:37464*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37464*FLEN/8, x13, x9, x10)

inst_12510:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7f8000; valaddr_reg:x12; val_offset:37467*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37467*FLEN/8, x13, x9, x10)

inst_12511:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae007fff; valaddr_reg:x12; val_offset:37470*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37470*FLEN/8, x13, x9, x10)

inst_12512:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7fc000; valaddr_reg:x12; val_offset:37473*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37473*FLEN/8, x13, x9, x10)

inst_12513:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae003fff; valaddr_reg:x12; val_offset:37476*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37476*FLEN/8, x13, x9, x10)

inst_12514:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7fe000; valaddr_reg:x12; val_offset:37479*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37479*FLEN/8, x13, x9, x10)

inst_12515:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae001fff; valaddr_reg:x12; val_offset:37482*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37482*FLEN/8, x13, x9, x10)

inst_12516:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7ff000; valaddr_reg:x12; val_offset:37485*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37485*FLEN/8, x13, x9, x10)

inst_12517:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae000fff; valaddr_reg:x12; val_offset:37488*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37488*FLEN/8, x13, x9, x10)

inst_12518:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7ff800; valaddr_reg:x12; val_offset:37491*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37491*FLEN/8, x13, x9, x10)

inst_12519:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae0007ff; valaddr_reg:x12; val_offset:37494*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37494*FLEN/8, x13, x9, x10)

inst_12520:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7ffc00; valaddr_reg:x12; val_offset:37497*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37497*FLEN/8, x13, x9, x10)

inst_12521:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae0003ff; valaddr_reg:x12; val_offset:37500*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37500*FLEN/8, x13, x9, x10)

inst_12522:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7ffe00; valaddr_reg:x12; val_offset:37503*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37503*FLEN/8, x13, x9, x10)

inst_12523:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae0001ff; valaddr_reg:x12; val_offset:37506*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37506*FLEN/8, x13, x9, x10)

inst_12524:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7fff00; valaddr_reg:x12; val_offset:37509*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37509*FLEN/8, x13, x9, x10)

inst_12525:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae0000ff; valaddr_reg:x12; val_offset:37512*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37512*FLEN/8, x13, x9, x10)

inst_12526:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7fff80; valaddr_reg:x12; val_offset:37515*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37515*FLEN/8, x13, x9, x10)

inst_12527:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae00007f; valaddr_reg:x12; val_offset:37518*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37518*FLEN/8, x13, x9, x10)

inst_12528:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7fffc0; valaddr_reg:x12; val_offset:37521*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37521*FLEN/8, x13, x9, x10)

inst_12529:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae00003f; valaddr_reg:x12; val_offset:37524*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37524*FLEN/8, x13, x9, x10)

inst_12530:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7fffe0; valaddr_reg:x12; val_offset:37527*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37527*FLEN/8, x13, x9, x10)

inst_12531:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae00001f; valaddr_reg:x12; val_offset:37530*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37530*FLEN/8, x13, x9, x10)

inst_12532:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7ffff0; valaddr_reg:x12; val_offset:37533*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37533*FLEN/8, x13, x9, x10)

inst_12533:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae00000f; valaddr_reg:x12; val_offset:37536*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37536*FLEN/8, x13, x9, x10)

inst_12534:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7ffff8; valaddr_reg:x12; val_offset:37539*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37539*FLEN/8, x13, x9, x10)

inst_12535:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae000007; valaddr_reg:x12; val_offset:37542*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37542*FLEN/8, x13, x9, x10)

inst_12536:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7ffffc; valaddr_reg:x12; val_offset:37545*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37545*FLEN/8, x13, x9, x10)

inst_12537:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae000003; valaddr_reg:x12; val_offset:37548*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37548*FLEN/8, x13, x9, x10)

inst_12538:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7ffffe; valaddr_reg:x12; val_offset:37551*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37551*FLEN/8, x13, x9, x10)

inst_12539:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae000001; valaddr_reg:x12; val_offset:37554*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37554*FLEN/8, x13, x9, x10)

inst_12540:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:37557*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37557*FLEN/8, x13, x9, x10)

inst_12541:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xbf800007; valaddr_reg:x12; val_offset:37560*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37560*FLEN/8, x13, x9, x10)

inst_12542:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:37563*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37563*FLEN/8, x13, x9, x10)

inst_12543:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xbf800003; valaddr_reg:x12; val_offset:37566*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37566*FLEN/8, x13, x9, x10)

inst_12544:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:37569*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37569*FLEN/8, x13, x9, x10)

inst_12545:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xbf800001; valaddr_reg:x12; val_offset:37572*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37572*FLEN/8, x13, x9, x10)

inst_12546:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:37575*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37575*FLEN/8, x13, x9, x10)

inst_12547:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:37578*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37578*FLEN/8, x13, x9, x10)

inst_12548:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xbf999999; valaddr_reg:x12; val_offset:37581*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37581*FLEN/8, x13, x9, x10)

inst_12549:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:37584*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37584*FLEN/8, x13, x9, x10)

inst_12550:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:37587*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37587*FLEN/8, x13, x9, x10)

inst_12551:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:37590*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37590*FLEN/8, x13, x9, x10)

inst_12552:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:37593*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37593*FLEN/8, x13, x9, x10)

inst_12553:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:37596*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37596*FLEN/8, x13, x9, x10)

inst_12554:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:37599*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37599*FLEN/8, x13, x9, x10)

inst_12555:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:37602*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37602*FLEN/8, x13, x9, x10)

inst_12556:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xae800000; valaddr_reg:x12; val_offset:37605*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37605*FLEN/8, x13, x9, x10)

inst_12557:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xaeffffff; valaddr_reg:x12; val_offset:37608*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37608*FLEN/8, x13, x9, x10)

inst_12558:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xaec00000; valaddr_reg:x12; val_offset:37611*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37611*FLEN/8, x13, x9, x10)

inst_12559:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xaebfffff; valaddr_reg:x12; val_offset:37614*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37614*FLEN/8, x13, x9, x10)

inst_12560:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xaee00000; valaddr_reg:x12; val_offset:37617*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37617*FLEN/8, x13, x9, x10)

inst_12561:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xae9fffff; valaddr_reg:x12; val_offset:37620*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37620*FLEN/8, x13, x9, x10)

inst_12562:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xaef00000; valaddr_reg:x12; val_offset:37623*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37623*FLEN/8, x13, x9, x10)

inst_12563:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xae8fffff; valaddr_reg:x12; val_offset:37626*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37626*FLEN/8, x13, x9, x10)

inst_12564:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xaef80000; valaddr_reg:x12; val_offset:37629*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37629*FLEN/8, x13, x9, x10)

inst_12565:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xae87ffff; valaddr_reg:x12; val_offset:37632*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37632*FLEN/8, x13, x9, x10)

inst_12566:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xaefc0000; valaddr_reg:x12; val_offset:37635*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37635*FLEN/8, x13, x9, x10)

inst_12567:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xae83ffff; valaddr_reg:x12; val_offset:37638*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37638*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_98)
inst_12568:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xaefe0000; valaddr_reg:x12; val_offset:37641*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37641*FLEN/8, x13, x9, x10)

inst_12569:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xae81ffff; valaddr_reg:x12; val_offset:37644*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37644*FLEN/8, x13, x9, x10)

inst_12570:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xaeff0000; valaddr_reg:x12; val_offset:37647*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37647*FLEN/8, x13, x9, x10)

inst_12571:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xae80ffff; valaddr_reg:x12; val_offset:37650*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37650*FLEN/8, x13, x9, x10)

inst_12572:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xaeff8000; valaddr_reg:x12; val_offset:37653*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37653*FLEN/8, x13, x9, x10)

inst_12573:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xae807fff; valaddr_reg:x12; val_offset:37656*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37656*FLEN/8, x13, x9, x10)

inst_12574:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xaeffc000; valaddr_reg:x12; val_offset:37659*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37659*FLEN/8, x13, x9, x10)

inst_12575:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xae803fff; valaddr_reg:x12; val_offset:37662*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37662*FLEN/8, x13, x9, x10)

inst_12576:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xaeffe000; valaddr_reg:x12; val_offset:37665*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37665*FLEN/8, x13, x9, x10)

inst_12577:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xae801fff; valaddr_reg:x12; val_offset:37668*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37668*FLEN/8, x13, x9, x10)

inst_12578:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xaefff000; valaddr_reg:x12; val_offset:37671*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37671*FLEN/8, x13, x9, x10)

inst_12579:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xae800fff; valaddr_reg:x12; val_offset:37674*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37674*FLEN/8, x13, x9, x10)

inst_12580:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xaefff800; valaddr_reg:x12; val_offset:37677*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37677*FLEN/8, x13, x9, x10)

inst_12581:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xae8007ff; valaddr_reg:x12; val_offset:37680*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37680*FLEN/8, x13, x9, x10)

inst_12582:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xaefffc00; valaddr_reg:x12; val_offset:37683*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37683*FLEN/8, x13, x9, x10)

inst_12583:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xae8003ff; valaddr_reg:x12; val_offset:37686*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37686*FLEN/8, x13, x9, x10)

inst_12584:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xaefffe00; valaddr_reg:x12; val_offset:37689*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37689*FLEN/8, x13, x9, x10)

inst_12585:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xae8001ff; valaddr_reg:x12; val_offset:37692*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37692*FLEN/8, x13, x9, x10)

inst_12586:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xaeffff00; valaddr_reg:x12; val_offset:37695*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37695*FLEN/8, x13, x9, x10)

inst_12587:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xae8000ff; valaddr_reg:x12; val_offset:37698*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37698*FLEN/8, x13, x9, x10)

inst_12588:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xaeffff80; valaddr_reg:x12; val_offset:37701*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37701*FLEN/8, x13, x9, x10)

inst_12589:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xae80007f; valaddr_reg:x12; val_offset:37704*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37704*FLEN/8, x13, x9, x10)

inst_12590:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xaeffffc0; valaddr_reg:x12; val_offset:37707*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37707*FLEN/8, x13, x9, x10)

inst_12591:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xae80003f; valaddr_reg:x12; val_offset:37710*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37710*FLEN/8, x13, x9, x10)

inst_12592:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xaeffffe0; valaddr_reg:x12; val_offset:37713*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37713*FLEN/8, x13, x9, x10)

inst_12593:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xae80001f; valaddr_reg:x12; val_offset:37716*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37716*FLEN/8, x13, x9, x10)

inst_12594:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xaefffff0; valaddr_reg:x12; val_offset:37719*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37719*FLEN/8, x13, x9, x10)

inst_12595:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xae80000f; valaddr_reg:x12; val_offset:37722*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37722*FLEN/8, x13, x9, x10)

inst_12596:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xaefffff8; valaddr_reg:x12; val_offset:37725*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37725*FLEN/8, x13, x9, x10)

inst_12597:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xae800007; valaddr_reg:x12; val_offset:37728*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37728*FLEN/8, x13, x9, x10)

inst_12598:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xaefffffc; valaddr_reg:x12; val_offset:37731*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37731*FLEN/8, x13, x9, x10)

inst_12599:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xae800003; valaddr_reg:x12; val_offset:37734*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37734*FLEN/8, x13, x9, x10)

inst_12600:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xaefffffe; valaddr_reg:x12; val_offset:37737*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37737*FLEN/8, x13, x9, x10)

inst_12601:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x5d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xae800001; valaddr_reg:x12; val_offset:37740*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37740*FLEN/8, x13, x9, x10)

inst_12602:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:37743*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37743*FLEN/8, x13, x9, x10)

inst_12603:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xbf800007; valaddr_reg:x12; val_offset:37746*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37746*FLEN/8, x13, x9, x10)

inst_12604:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:37749*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37749*FLEN/8, x13, x9, x10)

inst_12605:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xbf800003; valaddr_reg:x12; val_offset:37752*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37752*FLEN/8, x13, x9, x10)

inst_12606:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:37755*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37755*FLEN/8, x13, x9, x10)

inst_12607:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xbf800001; valaddr_reg:x12; val_offset:37758*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37758*FLEN/8, x13, x9, x10)

inst_12608:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:37761*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37761*FLEN/8, x13, x9, x10)

inst_12609:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:37764*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37764*FLEN/8, x13, x9, x10)

inst_12610:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xbf999999; valaddr_reg:x12; val_offset:37767*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37767*FLEN/8, x13, x9, x10)

inst_12611:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:37770*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37770*FLEN/8, x13, x9, x10)

inst_12612:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:37773*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37773*FLEN/8, x13, x9, x10)

inst_12613:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:37776*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37776*FLEN/8, x13, x9, x10)

inst_12614:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:37779*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37779*FLEN/8, x13, x9, x10)

inst_12615:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:37782*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37782*FLEN/8, x13, x9, x10)

inst_12616:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:37785*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37785*FLEN/8, x13, x9, x10)

inst_12617:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31614f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e2eed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f31614f; op2val:0x802e2eed;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:37788*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37788*FLEN/8, x13, x9, x10)

inst_12618:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf000000; valaddr_reg:x12; val_offset:37791*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37791*FLEN/8, x13, x9, x10)

inst_12619:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf7fffff; valaddr_reg:x12; val_offset:37794*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37794*FLEN/8, x13, x9, x10)

inst_12620:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf400000; valaddr_reg:x12; val_offset:37797*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37797*FLEN/8, x13, x9, x10)

inst_12621:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf3fffff; valaddr_reg:x12; val_offset:37800*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37800*FLEN/8, x13, x9, x10)

inst_12622:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf600000; valaddr_reg:x12; val_offset:37803*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37803*FLEN/8, x13, x9, x10)

inst_12623:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf1fffff; valaddr_reg:x12; val_offset:37806*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37806*FLEN/8, x13, x9, x10)

inst_12624:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf700000; valaddr_reg:x12; val_offset:37809*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37809*FLEN/8, x13, x9, x10)

inst_12625:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf0fffff; valaddr_reg:x12; val_offset:37812*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37812*FLEN/8, x13, x9, x10)

inst_12626:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf780000; valaddr_reg:x12; val_offset:37815*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37815*FLEN/8, x13, x9, x10)

inst_12627:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf07ffff; valaddr_reg:x12; val_offset:37818*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37818*FLEN/8, x13, x9, x10)

inst_12628:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf7c0000; valaddr_reg:x12; val_offset:37821*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37821*FLEN/8, x13, x9, x10)

inst_12629:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf03ffff; valaddr_reg:x12; val_offset:37824*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37824*FLEN/8, x13, x9, x10)

inst_12630:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf7e0000; valaddr_reg:x12; val_offset:37827*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37827*FLEN/8, x13, x9, x10)

inst_12631:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf01ffff; valaddr_reg:x12; val_offset:37830*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37830*FLEN/8, x13, x9, x10)

inst_12632:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf7f0000; valaddr_reg:x12; val_offset:37833*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37833*FLEN/8, x13, x9, x10)

inst_12633:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf00ffff; valaddr_reg:x12; val_offset:37836*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37836*FLEN/8, x13, x9, x10)

inst_12634:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf7f8000; valaddr_reg:x12; val_offset:37839*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37839*FLEN/8, x13, x9, x10)

inst_12635:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf007fff; valaddr_reg:x12; val_offset:37842*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37842*FLEN/8, x13, x9, x10)

inst_12636:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf7fc000; valaddr_reg:x12; val_offset:37845*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37845*FLEN/8, x13, x9, x10)

inst_12637:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf003fff; valaddr_reg:x12; val_offset:37848*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37848*FLEN/8, x13, x9, x10)

inst_12638:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf7fe000; valaddr_reg:x12; val_offset:37851*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37851*FLEN/8, x13, x9, x10)

inst_12639:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf001fff; valaddr_reg:x12; val_offset:37854*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37854*FLEN/8, x13, x9, x10)

inst_12640:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf7ff000; valaddr_reg:x12; val_offset:37857*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37857*FLEN/8, x13, x9, x10)

inst_12641:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf000fff; valaddr_reg:x12; val_offset:37860*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37860*FLEN/8, x13, x9, x10)

inst_12642:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf7ff800; valaddr_reg:x12; val_offset:37863*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37863*FLEN/8, x13, x9, x10)

inst_12643:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf0007ff; valaddr_reg:x12; val_offset:37866*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37866*FLEN/8, x13, x9, x10)

inst_12644:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf7ffc00; valaddr_reg:x12; val_offset:37869*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37869*FLEN/8, x13, x9, x10)

inst_12645:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf0003ff; valaddr_reg:x12; val_offset:37872*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37872*FLEN/8, x13, x9, x10)

inst_12646:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf7ffe00; valaddr_reg:x12; val_offset:37875*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37875*FLEN/8, x13, x9, x10)

inst_12647:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf0001ff; valaddr_reg:x12; val_offset:37878*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37878*FLEN/8, x13, x9, x10)

inst_12648:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf7fff00; valaddr_reg:x12; val_offset:37881*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37881*FLEN/8, x13, x9, x10)

inst_12649:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf0000ff; valaddr_reg:x12; val_offset:37884*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37884*FLEN/8, x13, x9, x10)

inst_12650:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf7fff80; valaddr_reg:x12; val_offset:37887*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37887*FLEN/8, x13, x9, x10)

inst_12651:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf00007f; valaddr_reg:x12; val_offset:37890*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37890*FLEN/8, x13, x9, x10)

inst_12652:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf7fffc0; valaddr_reg:x12; val_offset:37893*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37893*FLEN/8, x13, x9, x10)

inst_12653:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf00003f; valaddr_reg:x12; val_offset:37896*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37896*FLEN/8, x13, x9, x10)

inst_12654:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf7fffe0; valaddr_reg:x12; val_offset:37899*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37899*FLEN/8, x13, x9, x10)

inst_12655:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf00001f; valaddr_reg:x12; val_offset:37902*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37902*FLEN/8, x13, x9, x10)

inst_12656:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf7ffff0; valaddr_reg:x12; val_offset:37905*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37905*FLEN/8, x13, x9, x10)

inst_12657:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf00000f; valaddr_reg:x12; val_offset:37908*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37908*FLEN/8, x13, x9, x10)

inst_12658:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf7ffff8; valaddr_reg:x12; val_offset:37911*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37911*FLEN/8, x13, x9, x10)

inst_12659:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf000007; valaddr_reg:x12; val_offset:37914*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37914*FLEN/8, x13, x9, x10)

inst_12660:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf7ffffc; valaddr_reg:x12; val_offset:37917*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37917*FLEN/8, x13, x9, x10)

inst_12661:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf000003; valaddr_reg:x12; val_offset:37920*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37920*FLEN/8, x13, x9, x10)

inst_12662:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf7ffffe; valaddr_reg:x12; val_offset:37923*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37923*FLEN/8, x13, x9, x10)

inst_12663:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x5e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xaf000001; valaddr_reg:x12; val_offset:37926*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37926*FLEN/8, x13, x9, x10)

inst_12664:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:37929*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37929*FLEN/8, x13, x9, x10)

inst_12665:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xbf800007; valaddr_reg:x12; val_offset:37932*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37932*FLEN/8, x13, x9, x10)

inst_12666:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:37935*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37935*FLEN/8, x13, x9, x10)

inst_12667:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xbf800003; valaddr_reg:x12; val_offset:37938*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37938*FLEN/8, x13, x9, x10)

inst_12668:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:37941*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37941*FLEN/8, x13, x9, x10)

inst_12669:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xbf800001; valaddr_reg:x12; val_offset:37944*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37944*FLEN/8, x13, x9, x10)

inst_12670:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:37947*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37947*FLEN/8, x13, x9, x10)

inst_12671:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:37950*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37950*FLEN/8, x13, x9, x10)

inst_12672:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xbf999999; valaddr_reg:x12; val_offset:37953*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37953*FLEN/8, x13, x9, x10)

inst_12673:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:37956*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37956*FLEN/8, x13, x9, x10)

inst_12674:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:37959*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37959*FLEN/8, x13, x9, x10)

inst_12675:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:37962*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37962*FLEN/8, x13, x9, x10)

inst_12676:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:37965*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37965*FLEN/8, x13, x9, x10)

inst_12677:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:37968*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37968*FLEN/8, x13, x9, x10)

inst_12678:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:37971*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37971*FLEN/8, x13, x9, x10)

inst_12679:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f96c3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x802f96c3;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:37974*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37974*FLEN/8, x13, x9, x10)

inst_12680:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaf800000; valaddr_reg:x12; val_offset:37977*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37977*FLEN/8, x13, x9, x10)

inst_12681:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xafffffff; valaddr_reg:x12; val_offset:37980*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37980*FLEN/8, x13, x9, x10)

inst_12682:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xafc00000; valaddr_reg:x12; val_offset:37983*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37983*FLEN/8, x13, x9, x10)

inst_12683:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xafbfffff; valaddr_reg:x12; val_offset:37986*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37986*FLEN/8, x13, x9, x10)

inst_12684:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xafe00000; valaddr_reg:x12; val_offset:37989*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37989*FLEN/8, x13, x9, x10)

inst_12685:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaf9fffff; valaddr_reg:x12; val_offset:37992*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37992*FLEN/8, x13, x9, x10)

inst_12686:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaff00000; valaddr_reg:x12; val_offset:37995*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37995*FLEN/8, x13, x9, x10)

inst_12687:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaf8fffff; valaddr_reg:x12; val_offset:37998*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 37998*FLEN/8, x13, x9, x10)

inst_12688:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaff80000; valaddr_reg:x12; val_offset:38001*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38001*FLEN/8, x13, x9, x10)

inst_12689:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaf87ffff; valaddr_reg:x12; val_offset:38004*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38004*FLEN/8, x13, x9, x10)

inst_12690:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaffc0000; valaddr_reg:x12; val_offset:38007*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38007*FLEN/8, x13, x9, x10)

inst_12691:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaf83ffff; valaddr_reg:x12; val_offset:38010*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38010*FLEN/8, x13, x9, x10)

inst_12692:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaffe0000; valaddr_reg:x12; val_offset:38013*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38013*FLEN/8, x13, x9, x10)

inst_12693:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaf81ffff; valaddr_reg:x12; val_offset:38016*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38016*FLEN/8, x13, x9, x10)

inst_12694:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xafff0000; valaddr_reg:x12; val_offset:38019*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38019*FLEN/8, x13, x9, x10)

inst_12695:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaf80ffff; valaddr_reg:x12; val_offset:38022*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38022*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_99)
inst_12696:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xafff8000; valaddr_reg:x12; val_offset:38025*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38025*FLEN/8, x13, x9, x10)

inst_12697:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaf807fff; valaddr_reg:x12; val_offset:38028*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38028*FLEN/8, x13, x9, x10)

inst_12698:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xafffc000; valaddr_reg:x12; val_offset:38031*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38031*FLEN/8, x13, x9, x10)

inst_12699:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaf803fff; valaddr_reg:x12; val_offset:38034*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38034*FLEN/8, x13, x9, x10)

inst_12700:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xafffe000; valaddr_reg:x12; val_offset:38037*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38037*FLEN/8, x13, x9, x10)

inst_12701:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaf801fff; valaddr_reg:x12; val_offset:38040*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38040*FLEN/8, x13, x9, x10)

inst_12702:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaffff000; valaddr_reg:x12; val_offset:38043*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38043*FLEN/8, x13, x9, x10)

inst_12703:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaf800fff; valaddr_reg:x12; val_offset:38046*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38046*FLEN/8, x13, x9, x10)

inst_12704:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaffff800; valaddr_reg:x12; val_offset:38049*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38049*FLEN/8, x13, x9, x10)

inst_12705:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaf8007ff; valaddr_reg:x12; val_offset:38052*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38052*FLEN/8, x13, x9, x10)

inst_12706:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaffffc00; valaddr_reg:x12; val_offset:38055*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38055*FLEN/8, x13, x9, x10)

inst_12707:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaf8003ff; valaddr_reg:x12; val_offset:38058*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38058*FLEN/8, x13, x9, x10)

inst_12708:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaffffe00; valaddr_reg:x12; val_offset:38061*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38061*FLEN/8, x13, x9, x10)

inst_12709:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaf8001ff; valaddr_reg:x12; val_offset:38064*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38064*FLEN/8, x13, x9, x10)

inst_12710:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xafffff00; valaddr_reg:x12; val_offset:38067*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38067*FLEN/8, x13, x9, x10)

inst_12711:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaf8000ff; valaddr_reg:x12; val_offset:38070*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38070*FLEN/8, x13, x9, x10)

inst_12712:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xafffff80; valaddr_reg:x12; val_offset:38073*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38073*FLEN/8, x13, x9, x10)

inst_12713:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaf80007f; valaddr_reg:x12; val_offset:38076*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38076*FLEN/8, x13, x9, x10)

inst_12714:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xafffffc0; valaddr_reg:x12; val_offset:38079*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38079*FLEN/8, x13, x9, x10)

inst_12715:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaf80003f; valaddr_reg:x12; val_offset:38082*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38082*FLEN/8, x13, x9, x10)

inst_12716:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xafffffe0; valaddr_reg:x12; val_offset:38085*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38085*FLEN/8, x13, x9, x10)

inst_12717:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaf80001f; valaddr_reg:x12; val_offset:38088*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38088*FLEN/8, x13, x9, x10)

inst_12718:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaffffff0; valaddr_reg:x12; val_offset:38091*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38091*FLEN/8, x13, x9, x10)

inst_12719:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaf80000f; valaddr_reg:x12; val_offset:38094*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38094*FLEN/8, x13, x9, x10)

inst_12720:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaffffff8; valaddr_reg:x12; val_offset:38097*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38097*FLEN/8, x13, x9, x10)

inst_12721:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaf800007; valaddr_reg:x12; val_offset:38100*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38100*FLEN/8, x13, x9, x10)

inst_12722:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaffffffc; valaddr_reg:x12; val_offset:38103*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38103*FLEN/8, x13, x9, x10)

inst_12723:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaf800003; valaddr_reg:x12; val_offset:38106*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38106*FLEN/8, x13, x9, x10)

inst_12724:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaffffffe; valaddr_reg:x12; val_offset:38109*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38109*FLEN/8, x13, x9, x10)

inst_12725:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x5f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xaf800001; valaddr_reg:x12; val_offset:38112*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38112*FLEN/8, x13, x9, x10)

inst_12726:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:38115*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38115*FLEN/8, x13, x9, x10)

inst_12727:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xbf800007; valaddr_reg:x12; val_offset:38118*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38118*FLEN/8, x13, x9, x10)

inst_12728:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:38121*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38121*FLEN/8, x13, x9, x10)

inst_12729:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xbf800003; valaddr_reg:x12; val_offset:38124*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38124*FLEN/8, x13, x9, x10)

inst_12730:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:38127*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38127*FLEN/8, x13, x9, x10)

inst_12731:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xbf800001; valaddr_reg:x12; val_offset:38130*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38130*FLEN/8, x13, x9, x10)

inst_12732:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:38133*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38133*FLEN/8, x13, x9, x10)

inst_12733:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:38136*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38136*FLEN/8, x13, x9, x10)

inst_12734:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xbf999999; valaddr_reg:x12; val_offset:38139*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38139*FLEN/8, x13, x9, x10)

inst_12735:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:38142*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38142*FLEN/8, x13, x9, x10)

inst_12736:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:38145*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38145*FLEN/8, x13, x9, x10)

inst_12737:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:38148*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38148*FLEN/8, x13, x9, x10)

inst_12738:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:38151*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38151*FLEN/8, x13, x9, x10)

inst_12739:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:38154*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38154*FLEN/8, x13, x9, x10)

inst_12740:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:38157*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38157*FLEN/8, x13, x9, x10)

inst_12741:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cbcd0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2f6cae and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cbcd0; op2val:0x802f6cae;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:38160*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38160*FLEN/8, x13, x9, x10)

inst_12742:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb0000000; valaddr_reg:x12; val_offset:38163*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38163*FLEN/8, x13, x9, x10)

inst_12743:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb07fffff; valaddr_reg:x12; val_offset:38166*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38166*FLEN/8, x13, x9, x10)

inst_12744:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb0400000; valaddr_reg:x12; val_offset:38169*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38169*FLEN/8, x13, x9, x10)

inst_12745:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb03fffff; valaddr_reg:x12; val_offset:38172*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38172*FLEN/8, x13, x9, x10)

inst_12746:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb0600000; valaddr_reg:x12; val_offset:38175*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38175*FLEN/8, x13, x9, x10)

inst_12747:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb01fffff; valaddr_reg:x12; val_offset:38178*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38178*FLEN/8, x13, x9, x10)

inst_12748:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb0700000; valaddr_reg:x12; val_offset:38181*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38181*FLEN/8, x13, x9, x10)

inst_12749:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb00fffff; valaddr_reg:x12; val_offset:38184*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38184*FLEN/8, x13, x9, x10)

inst_12750:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb0780000; valaddr_reg:x12; val_offset:38187*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38187*FLEN/8, x13, x9, x10)

inst_12751:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb007ffff; valaddr_reg:x12; val_offset:38190*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38190*FLEN/8, x13, x9, x10)

inst_12752:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb07c0000; valaddr_reg:x12; val_offset:38193*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38193*FLEN/8, x13, x9, x10)

inst_12753:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb003ffff; valaddr_reg:x12; val_offset:38196*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38196*FLEN/8, x13, x9, x10)

inst_12754:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb07e0000; valaddr_reg:x12; val_offset:38199*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38199*FLEN/8, x13, x9, x10)

inst_12755:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb001ffff; valaddr_reg:x12; val_offset:38202*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38202*FLEN/8, x13, x9, x10)

inst_12756:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb07f0000; valaddr_reg:x12; val_offset:38205*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38205*FLEN/8, x13, x9, x10)

inst_12757:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb000ffff; valaddr_reg:x12; val_offset:38208*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38208*FLEN/8, x13, x9, x10)

inst_12758:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb07f8000; valaddr_reg:x12; val_offset:38211*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38211*FLEN/8, x13, x9, x10)

inst_12759:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb0007fff; valaddr_reg:x12; val_offset:38214*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38214*FLEN/8, x13, x9, x10)

inst_12760:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb07fc000; valaddr_reg:x12; val_offset:38217*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38217*FLEN/8, x13, x9, x10)

inst_12761:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb0003fff; valaddr_reg:x12; val_offset:38220*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38220*FLEN/8, x13, x9, x10)

inst_12762:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb07fe000; valaddr_reg:x12; val_offset:38223*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38223*FLEN/8, x13, x9, x10)

inst_12763:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb0001fff; valaddr_reg:x12; val_offset:38226*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38226*FLEN/8, x13, x9, x10)

inst_12764:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb07ff000; valaddr_reg:x12; val_offset:38229*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38229*FLEN/8, x13, x9, x10)

inst_12765:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb0000fff; valaddr_reg:x12; val_offset:38232*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38232*FLEN/8, x13, x9, x10)

inst_12766:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb07ff800; valaddr_reg:x12; val_offset:38235*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38235*FLEN/8, x13, x9, x10)

inst_12767:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb00007ff; valaddr_reg:x12; val_offset:38238*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38238*FLEN/8, x13, x9, x10)

inst_12768:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb07ffc00; valaddr_reg:x12; val_offset:38241*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38241*FLEN/8, x13, x9, x10)

inst_12769:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb00003ff; valaddr_reg:x12; val_offset:38244*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38244*FLEN/8, x13, x9, x10)

inst_12770:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb07ffe00; valaddr_reg:x12; val_offset:38247*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38247*FLEN/8, x13, x9, x10)

inst_12771:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb00001ff; valaddr_reg:x12; val_offset:38250*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38250*FLEN/8, x13, x9, x10)

inst_12772:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb07fff00; valaddr_reg:x12; val_offset:38253*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38253*FLEN/8, x13, x9, x10)

inst_12773:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb00000ff; valaddr_reg:x12; val_offset:38256*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38256*FLEN/8, x13, x9, x10)

inst_12774:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb07fff80; valaddr_reg:x12; val_offset:38259*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38259*FLEN/8, x13, x9, x10)

inst_12775:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb000007f; valaddr_reg:x12; val_offset:38262*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38262*FLEN/8, x13, x9, x10)

inst_12776:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb07fffc0; valaddr_reg:x12; val_offset:38265*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38265*FLEN/8, x13, x9, x10)

inst_12777:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb000003f; valaddr_reg:x12; val_offset:38268*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38268*FLEN/8, x13, x9, x10)

inst_12778:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb07fffe0; valaddr_reg:x12; val_offset:38271*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38271*FLEN/8, x13, x9, x10)

inst_12779:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb000001f; valaddr_reg:x12; val_offset:38274*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38274*FLEN/8, x13, x9, x10)

inst_12780:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb07ffff0; valaddr_reg:x12; val_offset:38277*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38277*FLEN/8, x13, x9, x10)

inst_12781:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb000000f; valaddr_reg:x12; val_offset:38280*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38280*FLEN/8, x13, x9, x10)

inst_12782:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb07ffff8; valaddr_reg:x12; val_offset:38283*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38283*FLEN/8, x13, x9, x10)

inst_12783:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb0000007; valaddr_reg:x12; val_offset:38286*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38286*FLEN/8, x13, x9, x10)

inst_12784:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb07ffffc; valaddr_reg:x12; val_offset:38289*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38289*FLEN/8, x13, x9, x10)

inst_12785:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb0000003; valaddr_reg:x12; val_offset:38292*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38292*FLEN/8, x13, x9, x10)

inst_12786:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb07ffffe; valaddr_reg:x12; val_offset:38295*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38295*FLEN/8, x13, x9, x10)

inst_12787:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x60 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xb0000001; valaddr_reg:x12; val_offset:38298*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38298*FLEN/8, x13, x9, x10)

inst_12788:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:38301*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38301*FLEN/8, x13, x9, x10)

inst_12789:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xbf800007; valaddr_reg:x12; val_offset:38304*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38304*FLEN/8, x13, x9, x10)

inst_12790:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:38307*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38307*FLEN/8, x13, x9, x10)

inst_12791:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xbf800003; valaddr_reg:x12; val_offset:38310*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38310*FLEN/8, x13, x9, x10)

inst_12792:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:38313*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38313*FLEN/8, x13, x9, x10)

inst_12793:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xbf800001; valaddr_reg:x12; val_offset:38316*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38316*FLEN/8, x13, x9, x10)

inst_12794:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:38319*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38319*FLEN/8, x13, x9, x10)

inst_12795:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:38322*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38322*FLEN/8, x13, x9, x10)

inst_12796:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xbf999999; valaddr_reg:x12; val_offset:38325*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38325*FLEN/8, x13, x9, x10)

inst_12797:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:38328*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38328*FLEN/8, x13, x9, x10)

inst_12798:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:38331*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38331*FLEN/8, x13, x9, x10)

inst_12799:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:38334*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38334*FLEN/8, x13, x9, x10)

inst_12800:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:38337*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38337*FLEN/8, x13, x9, x10)

inst_12801:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:38340*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38340*FLEN/8, x13, x9, x10)

inst_12802:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:38343*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38343*FLEN/8, x13, x9, x10)

inst_12803:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d8cd3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x49f3a0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd8cd3; op2val:0x8049f3a0;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:38346*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38346*FLEN/8, x13, x9, x10)

inst_12804:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb0800000; valaddr_reg:x12; val_offset:38349*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38349*FLEN/8, x13, x9, x10)

inst_12805:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb0ffffff; valaddr_reg:x12; val_offset:38352*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38352*FLEN/8, x13, x9, x10)

inst_12806:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb0c00000; valaddr_reg:x12; val_offset:38355*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38355*FLEN/8, x13, x9, x10)

inst_12807:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb0bfffff; valaddr_reg:x12; val_offset:38358*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38358*FLEN/8, x13, x9, x10)

inst_12808:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb0e00000; valaddr_reg:x12; val_offset:38361*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38361*FLEN/8, x13, x9, x10)

inst_12809:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb09fffff; valaddr_reg:x12; val_offset:38364*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38364*FLEN/8, x13, x9, x10)

inst_12810:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb0f00000; valaddr_reg:x12; val_offset:38367*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38367*FLEN/8, x13, x9, x10)

inst_12811:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb08fffff; valaddr_reg:x12; val_offset:38370*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38370*FLEN/8, x13, x9, x10)

inst_12812:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb0f80000; valaddr_reg:x12; val_offset:38373*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38373*FLEN/8, x13, x9, x10)

inst_12813:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb087ffff; valaddr_reg:x12; val_offset:38376*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38376*FLEN/8, x13, x9, x10)

inst_12814:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb0fc0000; valaddr_reg:x12; val_offset:38379*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38379*FLEN/8, x13, x9, x10)

inst_12815:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb083ffff; valaddr_reg:x12; val_offset:38382*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38382*FLEN/8, x13, x9, x10)

inst_12816:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb0fe0000; valaddr_reg:x12; val_offset:38385*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38385*FLEN/8, x13, x9, x10)

inst_12817:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb081ffff; valaddr_reg:x12; val_offset:38388*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38388*FLEN/8, x13, x9, x10)

inst_12818:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb0ff0000; valaddr_reg:x12; val_offset:38391*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38391*FLEN/8, x13, x9, x10)

inst_12819:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb080ffff; valaddr_reg:x12; val_offset:38394*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38394*FLEN/8, x13, x9, x10)

inst_12820:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb0ff8000; valaddr_reg:x12; val_offset:38397*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38397*FLEN/8, x13, x9, x10)

inst_12821:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb0807fff; valaddr_reg:x12; val_offset:38400*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38400*FLEN/8, x13, x9, x10)

inst_12822:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb0ffc000; valaddr_reg:x12; val_offset:38403*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38403*FLEN/8, x13, x9, x10)

inst_12823:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb0803fff; valaddr_reg:x12; val_offset:38406*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38406*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_100)
inst_12824:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb0ffe000; valaddr_reg:x12; val_offset:38409*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38409*FLEN/8, x13, x9, x10)

inst_12825:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb0801fff; valaddr_reg:x12; val_offset:38412*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38412*FLEN/8, x13, x9, x10)

inst_12826:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb0fff000; valaddr_reg:x12; val_offset:38415*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38415*FLEN/8, x13, x9, x10)

inst_12827:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb0800fff; valaddr_reg:x12; val_offset:38418*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38418*FLEN/8, x13, x9, x10)

inst_12828:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb0fff800; valaddr_reg:x12; val_offset:38421*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38421*FLEN/8, x13, x9, x10)

inst_12829:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb08007ff; valaddr_reg:x12; val_offset:38424*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38424*FLEN/8, x13, x9, x10)

inst_12830:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb0fffc00; valaddr_reg:x12; val_offset:38427*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38427*FLEN/8, x13, x9, x10)

inst_12831:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb08003ff; valaddr_reg:x12; val_offset:38430*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38430*FLEN/8, x13, x9, x10)

inst_12832:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb0fffe00; valaddr_reg:x12; val_offset:38433*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38433*FLEN/8, x13, x9, x10)

inst_12833:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb08001ff; valaddr_reg:x12; val_offset:38436*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38436*FLEN/8, x13, x9, x10)

inst_12834:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb0ffff00; valaddr_reg:x12; val_offset:38439*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38439*FLEN/8, x13, x9, x10)

inst_12835:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb08000ff; valaddr_reg:x12; val_offset:38442*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38442*FLEN/8, x13, x9, x10)

inst_12836:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb0ffff80; valaddr_reg:x12; val_offset:38445*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38445*FLEN/8, x13, x9, x10)

inst_12837:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb080007f; valaddr_reg:x12; val_offset:38448*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38448*FLEN/8, x13, x9, x10)

inst_12838:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb0ffffc0; valaddr_reg:x12; val_offset:38451*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38451*FLEN/8, x13, x9, x10)

inst_12839:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb080003f; valaddr_reg:x12; val_offset:38454*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38454*FLEN/8, x13, x9, x10)

inst_12840:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb0ffffe0; valaddr_reg:x12; val_offset:38457*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38457*FLEN/8, x13, x9, x10)

inst_12841:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb080001f; valaddr_reg:x12; val_offset:38460*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38460*FLEN/8, x13, x9, x10)

inst_12842:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb0fffff0; valaddr_reg:x12; val_offset:38463*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38463*FLEN/8, x13, x9, x10)

inst_12843:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb080000f; valaddr_reg:x12; val_offset:38466*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38466*FLEN/8, x13, x9, x10)

inst_12844:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb0fffff8; valaddr_reg:x12; val_offset:38469*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38469*FLEN/8, x13, x9, x10)

inst_12845:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb0800007; valaddr_reg:x12; val_offset:38472*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38472*FLEN/8, x13, x9, x10)

inst_12846:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb0fffffc; valaddr_reg:x12; val_offset:38475*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38475*FLEN/8, x13, x9, x10)

inst_12847:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb0800003; valaddr_reg:x12; val_offset:38478*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38478*FLEN/8, x13, x9, x10)

inst_12848:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb0fffffe; valaddr_reg:x12; val_offset:38481*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38481*FLEN/8, x13, x9, x10)

inst_12849:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x61 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xb0800001; valaddr_reg:x12; val_offset:38484*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38484*FLEN/8, x13, x9, x10)

inst_12850:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:38487*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38487*FLEN/8, x13, x9, x10)

inst_12851:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xbf800007; valaddr_reg:x12; val_offset:38490*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38490*FLEN/8, x13, x9, x10)

inst_12852:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:38493*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38493*FLEN/8, x13, x9, x10)

inst_12853:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xbf800003; valaddr_reg:x12; val_offset:38496*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38496*FLEN/8, x13, x9, x10)

inst_12854:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:38499*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38499*FLEN/8, x13, x9, x10)

inst_12855:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xbf800001; valaddr_reg:x12; val_offset:38502*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38502*FLEN/8, x13, x9, x10)

inst_12856:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:38505*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38505*FLEN/8, x13, x9, x10)

inst_12857:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:38508*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38508*FLEN/8, x13, x9, x10)

inst_12858:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xbf999999; valaddr_reg:x12; val_offset:38511*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38511*FLEN/8, x13, x9, x10)

inst_12859:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:38514*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38514*FLEN/8, x13, x9, x10)

inst_12860:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:38517*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38517*FLEN/8, x13, x9, x10)

inst_12861:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:38520*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38520*FLEN/8, x13, x9, x10)

inst_12862:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:38523*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38523*FLEN/8, x13, x9, x10)

inst_12863:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:38526*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38526*FLEN/8, x13, x9, x10)

inst_12864:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:38529*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38529*FLEN/8, x13, x9, x10)

inst_12865:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x4adf8d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x82cadf8d;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:38532*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38532*FLEN/8, x13, x9, x10)

inst_12866:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb1000000; valaddr_reg:x12; val_offset:38535*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38535*FLEN/8, x13, x9, x10)

inst_12867:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb17fffff; valaddr_reg:x12; val_offset:38538*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38538*FLEN/8, x13, x9, x10)

inst_12868:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb1400000; valaddr_reg:x12; val_offset:38541*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38541*FLEN/8, x13, x9, x10)

inst_12869:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb13fffff; valaddr_reg:x12; val_offset:38544*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38544*FLEN/8, x13, x9, x10)

inst_12870:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb1600000; valaddr_reg:x12; val_offset:38547*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38547*FLEN/8, x13, x9, x10)

inst_12871:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb11fffff; valaddr_reg:x12; val_offset:38550*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38550*FLEN/8, x13, x9, x10)

inst_12872:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb1700000; valaddr_reg:x12; val_offset:38553*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38553*FLEN/8, x13, x9, x10)

inst_12873:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb10fffff; valaddr_reg:x12; val_offset:38556*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38556*FLEN/8, x13, x9, x10)

inst_12874:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb1780000; valaddr_reg:x12; val_offset:38559*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38559*FLEN/8, x13, x9, x10)

inst_12875:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb107ffff; valaddr_reg:x12; val_offset:38562*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38562*FLEN/8, x13, x9, x10)

inst_12876:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb17c0000; valaddr_reg:x12; val_offset:38565*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38565*FLEN/8, x13, x9, x10)

inst_12877:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb103ffff; valaddr_reg:x12; val_offset:38568*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38568*FLEN/8, x13, x9, x10)

inst_12878:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb17e0000; valaddr_reg:x12; val_offset:38571*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38571*FLEN/8, x13, x9, x10)

inst_12879:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb101ffff; valaddr_reg:x12; val_offset:38574*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38574*FLEN/8, x13, x9, x10)

inst_12880:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb17f0000; valaddr_reg:x12; val_offset:38577*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38577*FLEN/8, x13, x9, x10)

inst_12881:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb100ffff; valaddr_reg:x12; val_offset:38580*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38580*FLEN/8, x13, x9, x10)

inst_12882:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb17f8000; valaddr_reg:x12; val_offset:38583*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38583*FLEN/8, x13, x9, x10)

inst_12883:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb1007fff; valaddr_reg:x12; val_offset:38586*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38586*FLEN/8, x13, x9, x10)

inst_12884:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb17fc000; valaddr_reg:x12; val_offset:38589*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38589*FLEN/8, x13, x9, x10)

inst_12885:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb1003fff; valaddr_reg:x12; val_offset:38592*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38592*FLEN/8, x13, x9, x10)

inst_12886:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb17fe000; valaddr_reg:x12; val_offset:38595*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38595*FLEN/8, x13, x9, x10)

inst_12887:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb1001fff; valaddr_reg:x12; val_offset:38598*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38598*FLEN/8, x13, x9, x10)

inst_12888:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb17ff000; valaddr_reg:x12; val_offset:38601*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38601*FLEN/8, x13, x9, x10)

inst_12889:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb1000fff; valaddr_reg:x12; val_offset:38604*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38604*FLEN/8, x13, x9, x10)

inst_12890:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb17ff800; valaddr_reg:x12; val_offset:38607*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38607*FLEN/8, x13, x9, x10)

inst_12891:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb10007ff; valaddr_reg:x12; val_offset:38610*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38610*FLEN/8, x13, x9, x10)

inst_12892:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb17ffc00; valaddr_reg:x12; val_offset:38613*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38613*FLEN/8, x13, x9, x10)

inst_12893:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb10003ff; valaddr_reg:x12; val_offset:38616*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38616*FLEN/8, x13, x9, x10)

inst_12894:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb17ffe00; valaddr_reg:x12; val_offset:38619*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38619*FLEN/8, x13, x9, x10)

inst_12895:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb10001ff; valaddr_reg:x12; val_offset:38622*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38622*FLEN/8, x13, x9, x10)

inst_12896:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb17fff00; valaddr_reg:x12; val_offset:38625*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38625*FLEN/8, x13, x9, x10)

inst_12897:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb10000ff; valaddr_reg:x12; val_offset:38628*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38628*FLEN/8, x13, x9, x10)

inst_12898:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb17fff80; valaddr_reg:x12; val_offset:38631*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38631*FLEN/8, x13, x9, x10)

inst_12899:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb100007f; valaddr_reg:x12; val_offset:38634*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38634*FLEN/8, x13, x9, x10)

inst_12900:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb17fffc0; valaddr_reg:x12; val_offset:38637*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38637*FLEN/8, x13, x9, x10)

inst_12901:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb100003f; valaddr_reg:x12; val_offset:38640*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38640*FLEN/8, x13, x9, x10)

inst_12902:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb17fffe0; valaddr_reg:x12; val_offset:38643*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38643*FLEN/8, x13, x9, x10)

inst_12903:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb100001f; valaddr_reg:x12; val_offset:38646*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38646*FLEN/8, x13, x9, x10)

inst_12904:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb17ffff0; valaddr_reg:x12; val_offset:38649*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38649*FLEN/8, x13, x9, x10)

inst_12905:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb100000f; valaddr_reg:x12; val_offset:38652*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38652*FLEN/8, x13, x9, x10)

inst_12906:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb17ffff8; valaddr_reg:x12; val_offset:38655*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38655*FLEN/8, x13, x9, x10)

inst_12907:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb1000007; valaddr_reg:x12; val_offset:38658*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38658*FLEN/8, x13, x9, x10)

inst_12908:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb17ffffc; valaddr_reg:x12; val_offset:38661*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38661*FLEN/8, x13, x9, x10)

inst_12909:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb1000003; valaddr_reg:x12; val_offset:38664*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38664*FLEN/8, x13, x9, x10)

inst_12910:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb17ffffe; valaddr_reg:x12; val_offset:38667*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38667*FLEN/8, x13, x9, x10)

inst_12911:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x62 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xb1000001; valaddr_reg:x12; val_offset:38670*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38670*FLEN/8, x13, x9, x10)

inst_12912:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:38673*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38673*FLEN/8, x13, x9, x10)

inst_12913:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xbf800007; valaddr_reg:x12; val_offset:38676*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38676*FLEN/8, x13, x9, x10)

inst_12914:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:38679*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38679*FLEN/8, x13, x9, x10)

inst_12915:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xbf800003; valaddr_reg:x12; val_offset:38682*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38682*FLEN/8, x13, x9, x10)

inst_12916:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:38685*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38685*FLEN/8, x13, x9, x10)

inst_12917:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xbf800001; valaddr_reg:x12; val_offset:38688*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38688*FLEN/8, x13, x9, x10)

inst_12918:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:38691*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38691*FLEN/8, x13, x9, x10)

inst_12919:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:38694*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38694*FLEN/8, x13, x9, x10)

inst_12920:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xbf999999; valaddr_reg:x12; val_offset:38697*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38697*FLEN/8, x13, x9, x10)

inst_12921:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:38700*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38700*FLEN/8, x13, x9, x10)

inst_12922:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:38703*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38703*FLEN/8, x13, x9, x10)

inst_12923:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:38706*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38706*FLEN/8, x13, x9, x10)

inst_12924:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:38709*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38709*FLEN/8, x13, x9, x10)

inst_12925:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:38712*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38712*FLEN/8, x13, x9, x10)

inst_12926:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:38715*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38715*FLEN/8, x13, x9, x10)

inst_12927:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f18e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x393f6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f18e6; op2val:0x80393f6e;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:38718*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38718*FLEN/8, x13, x9, x10)

inst_12928:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb1800000; valaddr_reg:x12; val_offset:38721*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38721*FLEN/8, x13, x9, x10)

inst_12929:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb1ffffff; valaddr_reg:x12; val_offset:38724*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38724*FLEN/8, x13, x9, x10)

inst_12930:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb1c00000; valaddr_reg:x12; val_offset:38727*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38727*FLEN/8, x13, x9, x10)

inst_12931:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb1bfffff; valaddr_reg:x12; val_offset:38730*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38730*FLEN/8, x13, x9, x10)

inst_12932:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb1e00000; valaddr_reg:x12; val_offset:38733*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38733*FLEN/8, x13, x9, x10)

inst_12933:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb19fffff; valaddr_reg:x12; val_offset:38736*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38736*FLEN/8, x13, x9, x10)

inst_12934:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb1f00000; valaddr_reg:x12; val_offset:38739*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38739*FLEN/8, x13, x9, x10)

inst_12935:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb18fffff; valaddr_reg:x12; val_offset:38742*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38742*FLEN/8, x13, x9, x10)

inst_12936:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb1f80000; valaddr_reg:x12; val_offset:38745*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38745*FLEN/8, x13, x9, x10)

inst_12937:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb187ffff; valaddr_reg:x12; val_offset:38748*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38748*FLEN/8, x13, x9, x10)

inst_12938:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb1fc0000; valaddr_reg:x12; val_offset:38751*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38751*FLEN/8, x13, x9, x10)

inst_12939:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb183ffff; valaddr_reg:x12; val_offset:38754*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38754*FLEN/8, x13, x9, x10)

inst_12940:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb1fe0000; valaddr_reg:x12; val_offset:38757*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38757*FLEN/8, x13, x9, x10)

inst_12941:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb181ffff; valaddr_reg:x12; val_offset:38760*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38760*FLEN/8, x13, x9, x10)

inst_12942:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb1ff0000; valaddr_reg:x12; val_offset:38763*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38763*FLEN/8, x13, x9, x10)

inst_12943:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb180ffff; valaddr_reg:x12; val_offset:38766*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38766*FLEN/8, x13, x9, x10)

inst_12944:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb1ff8000; valaddr_reg:x12; val_offset:38769*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38769*FLEN/8, x13, x9, x10)

inst_12945:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb1807fff; valaddr_reg:x12; val_offset:38772*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38772*FLEN/8, x13, x9, x10)

inst_12946:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb1ffc000; valaddr_reg:x12; val_offset:38775*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38775*FLEN/8, x13, x9, x10)

inst_12947:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb1803fff; valaddr_reg:x12; val_offset:38778*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38778*FLEN/8, x13, x9, x10)

inst_12948:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb1ffe000; valaddr_reg:x12; val_offset:38781*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38781*FLEN/8, x13, x9, x10)

inst_12949:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb1801fff; valaddr_reg:x12; val_offset:38784*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38784*FLEN/8, x13, x9, x10)

inst_12950:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb1fff000; valaddr_reg:x12; val_offset:38787*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38787*FLEN/8, x13, x9, x10)

inst_12951:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb1800fff; valaddr_reg:x12; val_offset:38790*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38790*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_101)
inst_12952:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb1fff800; valaddr_reg:x12; val_offset:38793*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38793*FLEN/8, x13, x9, x10)

inst_12953:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb18007ff; valaddr_reg:x12; val_offset:38796*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38796*FLEN/8, x13, x9, x10)

inst_12954:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb1fffc00; valaddr_reg:x12; val_offset:38799*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38799*FLEN/8, x13, x9, x10)

inst_12955:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb18003ff; valaddr_reg:x12; val_offset:38802*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38802*FLEN/8, x13, x9, x10)

inst_12956:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb1fffe00; valaddr_reg:x12; val_offset:38805*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38805*FLEN/8, x13, x9, x10)

inst_12957:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb18001ff; valaddr_reg:x12; val_offset:38808*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38808*FLEN/8, x13, x9, x10)

inst_12958:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb1ffff00; valaddr_reg:x12; val_offset:38811*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38811*FLEN/8, x13, x9, x10)

inst_12959:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb18000ff; valaddr_reg:x12; val_offset:38814*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38814*FLEN/8, x13, x9, x10)

inst_12960:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb1ffff80; valaddr_reg:x12; val_offset:38817*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38817*FLEN/8, x13, x9, x10)

inst_12961:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb180007f; valaddr_reg:x12; val_offset:38820*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38820*FLEN/8, x13, x9, x10)

inst_12962:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb1ffffc0; valaddr_reg:x12; val_offset:38823*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38823*FLEN/8, x13, x9, x10)

inst_12963:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb180003f; valaddr_reg:x12; val_offset:38826*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38826*FLEN/8, x13, x9, x10)

inst_12964:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb1ffffe0; valaddr_reg:x12; val_offset:38829*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38829*FLEN/8, x13, x9, x10)

inst_12965:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb180001f; valaddr_reg:x12; val_offset:38832*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38832*FLEN/8, x13, x9, x10)

inst_12966:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb1fffff0; valaddr_reg:x12; val_offset:38835*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38835*FLEN/8, x13, x9, x10)

inst_12967:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb180000f; valaddr_reg:x12; val_offset:38838*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38838*FLEN/8, x13, x9, x10)

inst_12968:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb1fffff8; valaddr_reg:x12; val_offset:38841*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38841*FLEN/8, x13, x9, x10)

inst_12969:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb1800007; valaddr_reg:x12; val_offset:38844*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38844*FLEN/8, x13, x9, x10)

inst_12970:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb1fffffc; valaddr_reg:x12; val_offset:38847*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38847*FLEN/8, x13, x9, x10)

inst_12971:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb1800003; valaddr_reg:x12; val_offset:38850*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38850*FLEN/8, x13, x9, x10)

inst_12972:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb1fffffe; valaddr_reg:x12; val_offset:38853*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38853*FLEN/8, x13, x9, x10)

inst_12973:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xb1800001; valaddr_reg:x12; val_offset:38856*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38856*FLEN/8, x13, x9, x10)

inst_12974:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:38859*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38859*FLEN/8, x13, x9, x10)

inst_12975:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xbf800007; valaddr_reg:x12; val_offset:38862*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38862*FLEN/8, x13, x9, x10)

inst_12976:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:38865*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38865*FLEN/8, x13, x9, x10)

inst_12977:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xbf800003; valaddr_reg:x12; val_offset:38868*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38868*FLEN/8, x13, x9, x10)

inst_12978:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:38871*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38871*FLEN/8, x13, x9, x10)

inst_12979:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xbf800001; valaddr_reg:x12; val_offset:38874*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38874*FLEN/8, x13, x9, x10)

inst_12980:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:38877*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38877*FLEN/8, x13, x9, x10)

inst_12981:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:38880*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38880*FLEN/8, x13, x9, x10)

inst_12982:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xbf999999; valaddr_reg:x12; val_offset:38883*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38883*FLEN/8, x13, x9, x10)

inst_12983:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:38886*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38886*FLEN/8, x13, x9, x10)

inst_12984:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:38889*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38889*FLEN/8, x13, x9, x10)

inst_12985:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:38892*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38892*FLEN/8, x13, x9, x10)

inst_12986:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:38895*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38895*FLEN/8, x13, x9, x10)

inst_12987:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:38898*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38898*FLEN/8, x13, x9, x10)

inst_12988:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:38901*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38901*FLEN/8, x13, x9, x10)

inst_12989:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x03f57f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x7851d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e03f57f; op2val:0x80f851d1;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:38904*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38904*FLEN/8, x13, x9, x10)

inst_12990:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x665064 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0e467a and fs3 == 1 and fe3 == 0x64 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e665064; op2val:0x808e467a;
op3val:0xb2000000; valaddr_reg:x12; val_offset:38907*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38907*FLEN/8, x13, x9, x10)

inst_12991:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x665064 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0e467a and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e665064; op2val:0x808e467a;
op3val:0xb27fffff; valaddr_reg:x12; val_offset:38910*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38910*FLEN/8, x13, x9, x10)

inst_12992:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x665064 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0e467a and fs3 == 1 and fe3 == 0x64 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e665064; op2val:0x808e467a;
op3val:0xb2400000; valaddr_reg:x12; val_offset:38913*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38913*FLEN/8, x13, x9, x10)

inst_12993:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x665064 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0e467a and fs3 == 1 and fe3 == 0x64 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e665064; op2val:0x808e467a;
op3val:0xb23fffff; valaddr_reg:x12; val_offset:38916*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38916*FLEN/8, x13, x9, x10)

inst_12994:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x665064 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0e467a and fs3 == 1 and fe3 == 0x64 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e665064; op2val:0x808e467a;
op3val:0xb2600000; valaddr_reg:x12; val_offset:38919*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38919*FLEN/8, x13, x9, x10)

inst_12995:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x665064 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0e467a and fs3 == 1 and fe3 == 0x64 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e665064; op2val:0x808e467a;
op3val:0xb21fffff; valaddr_reg:x12; val_offset:38922*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38922*FLEN/8, x13, x9, x10)

inst_12996:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x665064 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0e467a and fs3 == 1 and fe3 == 0x64 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e665064; op2val:0x808e467a;
op3val:0xb2700000; valaddr_reg:x12; val_offset:38925*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38925*FLEN/8, x13, x9, x10)

inst_12997:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x665064 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0e467a and fs3 == 1 and fe3 == 0x64 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e665064; op2val:0x808e467a;
op3val:0xb20fffff; valaddr_reg:x12; val_offset:38928*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 38928*FLEN/8, x13, x9, x10)

#endif
RVTEST_CODE_END
RVMODEL_HALT
RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(2894069728,32,FLEN)
NAN_BOXED(2119986352,32,FLEN)
NAN_BOXED(2157226135,32,FLEN)
NAN_BOXED(2885681183,32,FLEN)
NAN_BOXED(2119986352,32,FLEN)
NAN_BOXED(2157226135,32,FLEN)
NAN_BOXED(2894069744,32,FLEN)
NAN_BOXED(2119986352,32,FLEN)
NAN_BOXED(2157226135,32,FLEN)
NAN_BOXED(2885681167,32,FLEN)
NAN_BOXED(2119986352,32,FLEN)
NAN_BOXED(2157226135,32,FLEN)
NAN_BOXED(2894069752,32,FLEN)
NAN_BOXED(2119986352,32,FLEN)
NAN_BOXED(2157226135,32,FLEN)
NAN_BOXED(2885681159,32,FLEN)
NAN_BOXED(2119986352,32,FLEN)
NAN_BOXED(2157226135,32,FLEN)
NAN_BOXED(2894069756,32,FLEN)
NAN_BOXED(2119986352,32,FLEN)
NAN_BOXED(2157226135,32,FLEN)
NAN_BOXED(2885681155,32,FLEN)
NAN_BOXED(2119986352,32,FLEN)
NAN_BOXED(2157226135,32,FLEN)
NAN_BOXED(2894069758,32,FLEN)
NAN_BOXED(2119986352,32,FLEN)
NAN_BOXED(2157226135,32,FLEN)
NAN_BOXED(2885681153,32,FLEN)
NAN_BOXED(2119986352,32,FLEN)
NAN_BOXED(2157226135,32,FLEN)
NAN_BOXED(3221225464,32,FLEN)
NAN_BOXED(2119986352,32,FLEN)
NAN_BOXED(2157226135,32,FLEN)
NAN_BOXED(3212836871,32,FLEN)
NAN_BOXED(2119986352,32,FLEN)
NAN_BOXED(2157226135,32,FLEN)
NAN_BOXED(3221225468,32,FLEN)
NAN_BOXED(2119986352,32,FLEN)
NAN_BOXED(2157226135,32,FLEN)
NAN_BOXED(3212836867,32,FLEN)
NAN_BOXED(2119986352,32,FLEN)
NAN_BOXED(2157226135,32,FLEN)
NAN_BOXED(3221225470,32,FLEN)
NAN_BOXED(2119986352,32,FLEN)
NAN_BOXED(2157226135,32,FLEN)
NAN_BOXED(3212836865,32,FLEN)
NAN_BOXED(2119986352,32,FLEN)
NAN_BOXED(2157226135,32,FLEN)
NAN_BOXED(3216431981,32,FLEN)
NAN_BOXED(2119986352,32,FLEN)
NAN_BOXED(2157226135,32,FLEN)
NAN_BOXED(3220027099,32,FLEN)
NAN_BOXED(2119986352,32,FLEN)
NAN_BOXED(2157226135,32,FLEN)
NAN_BOXED(3214514585,32,FLEN)
NAN_BOXED(2119986352,32,FLEN)
NAN_BOXED(2157226135,32,FLEN)
NAN_BOXED(3219547750,32,FLEN)
NAN_BOXED(2119986352,32,FLEN)
NAN_BOXED(2157226135,32,FLEN)
NAN_BOXED(3216751547,32,FLEN)
NAN_BOXED(2119986352,32,FLEN)
NAN_BOXED(2157226135,32,FLEN)
NAN_BOXED(3217310788,32,FLEN)
NAN_BOXED(2119986352,32,FLEN)
NAN_BOXED(2157226135,32,FLEN)
NAN_BOXED(3215233609,32,FLEN)
NAN_BOXED(2119986352,32,FLEN)
NAN_BOXED(2157226135,32,FLEN)
NAN_BOXED(3218828726,32,FLEN)
NAN_BOXED(2119986352,32,FLEN)
NAN_BOXED(2157226135,32,FLEN)
NAN_BOXED(3216192307,32,FLEN)
NAN_BOXED(2119986352,32,FLEN)
NAN_BOXED(2157226135,32,FLEN)
NAN_BOXED(3217870028,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2894069760,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2902458367,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2898264064,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2898264063,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2900361216,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2896166911,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2901409792,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2895118335,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2901934080,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2894594047,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2902196224,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2894331903,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2902327296,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2894200831,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2902392832,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2894135295,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2902425600,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2894102527,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2902441984,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2894086143,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2902450176,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2894077951,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2902454272,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2894073855,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2902456320,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2894071807,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2902457344,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2894070783,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2902457856,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2894070271,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2902458112,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2894070015,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2902458240,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2894069887,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2902458304,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2894069823,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2902458336,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2894069791,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2902458352,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2894069775,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2902458360,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2894069767,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2902458364,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2894069763,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2902458366,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(2894069761,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(3221225464,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(3212836871,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(3221225468,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(3212836867,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(3221225470,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(3212836865,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(3216431981,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(3220027099,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(3214514585,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(3219547750,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(3216751547,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(3217310788,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(3215233609,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(3218828726,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(3216192307,32,FLEN)
NAN_BOXED(2132512396,32,FLEN)
NAN_BOXED(2150934932,32,FLEN)
NAN_BOXED(3217870028,32,FLEN)
NAN_BOXED(2097838552,32,FLEN)
NAN_BOXED(2179768853,32,FLEN)
NAN_BOXED(2902458368,32,FLEN)
NAN_BOXED(2097838552,32,FLEN)
NAN_BOXED(2179768853,32,FLEN)
NAN_BOXED(2910846975,32,FLEN)
NAN_BOXED(2097838552,32,FLEN)
NAN_BOXED(2179768853,32,FLEN)
NAN_BOXED(2906652672,32,FLEN)
NAN_BOXED(2097838552,32,FLEN)
NAN_BOXED(2179768853,32,FLEN)
NAN_BOXED(2906652671,32,FLEN)
NAN_BOXED(2097838552,32,FLEN)
NAN_BOXED(2179768853,32,FLEN)
NAN_BOXED(2908749824,32,FLEN)
NAN_BOXED(2097838552,32,FLEN)
NAN_BOXED(2179768853,32,FLEN)
NAN_BOXED(2904555519,32,FLEN)
NAN_BOXED(2097838552,32,FLEN)
NAN_BOXED(2179768853,32,FLEN)
NAN_BOXED(2909798400,32,FLEN)
NAN_BOXED(2097838552,32,FLEN)
NAN_BOXED(2179768853,32,FLEN)
NAN_BOXED(2903506943,32,FLEN)
NAN_BOXED(2097838552,32,FLEN)
NAN_BOXED(2179768853,32,FLEN)
NAN_BOXED(2910322688,32,FLEN)
NAN_BOXED(2097838552,32,FLEN)
NAN_BOXED(2179768853,32,FLEN)
NAN_BOXED(2902982655,32,FLEN)
NAN_BOXED(2097838552,32,FLEN)
NAN_BOXED(2179768853,32,FLEN)
NAN_BOXED(2910584832,32,FLEN)
NAN_BOXED(2097838552,32,FLEN)
NAN_BOXED(2179768853,32,FLEN)
NAN_BOXED(2902720511,32,FLEN)
NAN_BOXED(2097838552,32,FLEN)
NAN_BOXED(2179768853,32,FLEN)
NAN_BOXED(2910715904,32,FLEN)
NAN_BOXED(2097838552,32,FLEN)
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NAN_BOXED(3212836865,32,FLEN)
NAN_BOXED(2114188671,32,FLEN)
NAN_BOXED(2163757521,32,FLEN)
NAN_BOXED(3216431981,32,FLEN)
NAN_BOXED(2114188671,32,FLEN)
NAN_BOXED(2163757521,32,FLEN)
NAN_BOXED(3220027099,32,FLEN)
NAN_BOXED(2114188671,32,FLEN)
NAN_BOXED(2163757521,32,FLEN)
NAN_BOXED(3214514585,32,FLEN)
NAN_BOXED(2114188671,32,FLEN)
NAN_BOXED(2163757521,32,FLEN)
NAN_BOXED(3219547750,32,FLEN)
NAN_BOXED(2114188671,32,FLEN)
NAN_BOXED(2163757521,32,FLEN)
NAN_BOXED(3216751547,32,FLEN)
NAN_BOXED(2114188671,32,FLEN)
NAN_BOXED(2163757521,32,FLEN)
NAN_BOXED(3217310788,32,FLEN)
NAN_BOXED(2114188671,32,FLEN)
NAN_BOXED(2163757521,32,FLEN)
NAN_BOXED(3215233609,32,FLEN)
NAN_BOXED(2114188671,32,FLEN)
NAN_BOXED(2163757521,32,FLEN)
NAN_BOXED(3218828726,32,FLEN)
NAN_BOXED(2114188671,32,FLEN)
NAN_BOXED(2163757521,32,FLEN)
NAN_BOXED(3216192307,32,FLEN)
NAN_BOXED(2114188671,32,FLEN)
NAN_BOXED(2163757521,32,FLEN)
NAN_BOXED(3217870028,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2986344448,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2994733055,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2990538752,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2990538751,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2992635904,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2988441599,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2993684480,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2987393023,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2994208768,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2986868735,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2994470912,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2986606591,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2994601984,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2986475519,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2994667520,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2986409983,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2994700288,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2986377215,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2994716672,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2986360831,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2994724864,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2986352639,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2994728960,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2986348543,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2994731008,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2986346495,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2994732032,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2986345471,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2994732544,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2986344959,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2994732800,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2986344703,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2994732928,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2986344575,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2994732992,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2986344511,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2994733024,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2986344479,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2994733040,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2986344463,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2994733048,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2986344455,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2994733052,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2986344451,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2994733054,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(2986344449,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(3221225464,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(3212836871,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(3221225468,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(3212836867,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(3221225470,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(3212836865,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(3216431981,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(3220027099,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(3214514585,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(3219547750,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(3216751547,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(3217310788,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(3215233609,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
NAN_BOXED(3218828726,32,FLEN)
NAN_BOXED(2120634468,32,FLEN)
NAN_BOXED(2156807802,32,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;



signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 48*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_0:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_2:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_3:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_4:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_5:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_6:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_7:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_8:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_9:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_10:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_11:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_12:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_13:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_14:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_15:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_16:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_17:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_18:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_19:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_20:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_21:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_22:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_23:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_24:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_25:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_26:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_27:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_28:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_29:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_30:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_31:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_32:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_33:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_34:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_35:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_36:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_37:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_38:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_39:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_40:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_41:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_42:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_43:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_44:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_45:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_46:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_47:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_48:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_49:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_50:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_51:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_52:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_53:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_54:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_55:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_56:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_57:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_58:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_59:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_60:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_61:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_62:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_63:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_64:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_65:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_66:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_67:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_68:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_69:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_70:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_71:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_72:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_73:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_74:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_75:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_76:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_77:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_78:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_79:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_80:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_81:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_82:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_83:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_84:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_85:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_86:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_87:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_88:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_89:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_90:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_91:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_92:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_93:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_94:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_95:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_96:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_97:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_98:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_99:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_100:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_101:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_102:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_103:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_104:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_105:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_106:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_107:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_108:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_109:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_110:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_111:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_112:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_113:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_114:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_115:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_116:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_117:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_118:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_119:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_120:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_121:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_122:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_123:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_124:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_125:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_126:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_127:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_128:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_129:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_130:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_131:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_132:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_133:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_134:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_135:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_136:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_137:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_138:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_139:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_140:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_141:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_142:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_143:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_144:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_145:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_146:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_147:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_148:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_149:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_150:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_151:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_152:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_153:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_154:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_155:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_156:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_157:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_158:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_159:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_160:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_161:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_162:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_163:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_164:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_165:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_166:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_167:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_168:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_169:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_170:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_171:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_172:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_173:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_174:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_175:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_176:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_177:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_178:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_179:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_180:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_181:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_182:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_183:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_184:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_185:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_186:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_187:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_188:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_189:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_190:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_191:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_192:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_193:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_194:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_195:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_196:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_197:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_198:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_199:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_200:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_201:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_202:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_203:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_204:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_205:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_206:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_207:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_208:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_209:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_210:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_211:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_212:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_213:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_214:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_215:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_216:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_217:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_218:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_219:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_220:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_221:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_222:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_223:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_224:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_225:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_226:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_227:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_228:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_229:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_230:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_231:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_232:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_233:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_234:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_235:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_236:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_237:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_238:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_239:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_240:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_241:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_242:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_243:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_244:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_245:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_246:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_247:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_248:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_249:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_250:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_251:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_252:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_253:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_254:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_255:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_256:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_257:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_258:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_259:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_260:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_261:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_262:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_263:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_264:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_265:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_266:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_267:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_268:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_269:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_270:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_271:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_272:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_273:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_274:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_275:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_276:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_277:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_278:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_279:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_280:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_281:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_282:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_283:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_284:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_285:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_286:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_287:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_288:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_289:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_290:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_291:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_292:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_293:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_294:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_295:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_296:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_297:
    .fill 180*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine
tsig_begin_canary:
CANARY;

mtrap_sigptr:
    .fill 64*XLEN/32,4,0xdeadbeef

tsig_end_canary:
CANARY;
#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif


sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
