
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.7.1
// timestamp : Fri Jun 17 14:18:07 2022 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /scratch/pawan/work/normalised/RV32F/fmsub.s.cgf \
 \
//                  -- xlen 32  \
//                  --randomize \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fmsub.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmsub_b15 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmsub_b15)
RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fmsub_b15)
RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_26880:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc00001f; valaddr_reg:x3; val_offset:80640*0 + 3*-1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80640*0 + 3*0*FLEN/8, x4, x1, x2)

inst_26881:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc00003f; valaddr_reg:x3; val_offset:80643*0 + 3*0*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80643*0 + 3*1*FLEN/8, x4, x1, x2)

inst_26882:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc00007f; valaddr_reg:x3; val_offset:80646*0 + 3*1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80646*0 + 3*2*FLEN/8, x4, x1, x2)

inst_26883:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc0000ff; valaddr_reg:x3; val_offset:80649*0 + 3*2*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80649*0 + 3*3*FLEN/8, x4, x1, x2)

inst_26884:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc0001ff; valaddr_reg:x3; val_offset:80652*0 + 3*3*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80652*0 + 3*4*FLEN/8, x4, x1, x2)

inst_26885:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc0003ff; valaddr_reg:x3; val_offset:80655*0 + 3*4*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80655*0 + 3*5*FLEN/8, x4, x1, x2)

inst_26886:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc0007ff; valaddr_reg:x3; val_offset:80658*0 + 3*5*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80658*0 + 3*6*FLEN/8, x4, x1, x2)

inst_26887:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc000fff; valaddr_reg:x3; val_offset:80661*0 + 3*6*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80661*0 + 3*7*FLEN/8, x4, x1, x2)

inst_26888:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc001fff; valaddr_reg:x3; val_offset:80664*0 + 3*7*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80664*0 + 3*8*FLEN/8, x4, x1, x2)

inst_26889:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc003fff; valaddr_reg:x3; val_offset:80667*0 + 3*8*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80667*0 + 3*9*FLEN/8, x4, x1, x2)

inst_26890:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc007fff; valaddr_reg:x3; val_offset:80670*0 + 3*9*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80670*0 + 3*10*FLEN/8, x4, x1, x2)

inst_26891:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc00ffff; valaddr_reg:x3; val_offset:80673*0 + 3*10*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80673*0 + 3*11*FLEN/8, x4, x1, x2)

inst_26892:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc01ffff; valaddr_reg:x3; val_offset:80676*0 + 3*11*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80676*0 + 3*12*FLEN/8, x4, x1, x2)

inst_26893:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc03ffff; valaddr_reg:x3; val_offset:80679*0 + 3*12*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80679*0 + 3*13*FLEN/8, x4, x1, x2)

inst_26894:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc07ffff; valaddr_reg:x3; val_offset:80682*0 + 3*13*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80682*0 + 3*14*FLEN/8, x4, x1, x2)

inst_26895:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc0fffff; valaddr_reg:x3; val_offset:80685*0 + 3*14*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80685*0 + 3*15*FLEN/8, x4, x1, x2)

inst_26896:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc1fffff; valaddr_reg:x3; val_offset:80688*0 + 3*15*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80688*0 + 3*16*FLEN/8, x4, x1, x2)

inst_26897:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc3fffff; valaddr_reg:x3; val_offset:80691*0 + 3*16*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80691*0 + 3*17*FLEN/8, x4, x1, x2)

inst_26898:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc400000; valaddr_reg:x3; val_offset:80694*0 + 3*17*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80694*0 + 3*18*FLEN/8, x4, x1, x2)

inst_26899:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc600000; valaddr_reg:x3; val_offset:80697*0 + 3*18*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80697*0 + 3*19*FLEN/8, x4, x1, x2)

inst_26900:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc700000; valaddr_reg:x3; val_offset:80700*0 + 3*19*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80700*0 + 3*20*FLEN/8, x4, x1, x2)

inst_26901:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc780000; valaddr_reg:x3; val_offset:80703*0 + 3*20*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80703*0 + 3*21*FLEN/8, x4, x1, x2)

inst_26902:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc7c0000; valaddr_reg:x3; val_offset:80706*0 + 3*21*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80706*0 + 3*22*FLEN/8, x4, x1, x2)

inst_26903:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc7e0000; valaddr_reg:x3; val_offset:80709*0 + 3*22*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80709*0 + 3*23*FLEN/8, x4, x1, x2)

inst_26904:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc7f0000; valaddr_reg:x3; val_offset:80712*0 + 3*23*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80712*0 + 3*24*FLEN/8, x4, x1, x2)

inst_26905:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc7f8000; valaddr_reg:x3; val_offset:80715*0 + 3*24*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80715*0 + 3*25*FLEN/8, x4, x1, x2)

inst_26906:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc7fc000; valaddr_reg:x3; val_offset:80718*0 + 3*25*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80718*0 + 3*26*FLEN/8, x4, x1, x2)

inst_26907:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc7fe000; valaddr_reg:x3; val_offset:80721*0 + 3*26*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80721*0 + 3*27*FLEN/8, x4, x1, x2)

inst_26908:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc7ff000; valaddr_reg:x3; val_offset:80724*0 + 3*27*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80724*0 + 3*28*FLEN/8, x4, x1, x2)

inst_26909:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc7ff800; valaddr_reg:x3; val_offset:80727*0 + 3*28*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80727*0 + 3*29*FLEN/8, x4, x1, x2)

inst_26910:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc7ffc00; valaddr_reg:x3; val_offset:80730*0 + 3*29*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80730*0 + 3*30*FLEN/8, x4, x1, x2)

inst_26911:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc7ffe00; valaddr_reg:x3; val_offset:80733*0 + 3*30*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80733*0 + 3*31*FLEN/8, x4, x1, x2)

inst_26912:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc7fff00; valaddr_reg:x3; val_offset:80736*0 + 3*31*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80736*0 + 3*32*FLEN/8, x4, x1, x2)

inst_26913:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc7fff80; valaddr_reg:x3; val_offset:80739*0 + 3*32*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80739*0 + 3*33*FLEN/8, x4, x1, x2)

inst_26914:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc7fffc0; valaddr_reg:x3; val_offset:80742*0 + 3*33*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80742*0 + 3*34*FLEN/8, x4, x1, x2)

inst_26915:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc7fffe0; valaddr_reg:x3; val_offset:80745*0 + 3*34*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80745*0 + 3*35*FLEN/8, x4, x1, x2)

inst_26916:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc7ffff0; valaddr_reg:x3; val_offset:80748*0 + 3*35*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80748*0 + 3*36*FLEN/8, x4, x1, x2)

inst_26917:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc7ffff8; valaddr_reg:x3; val_offset:80751*0 + 3*36*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80751*0 + 3*37*FLEN/8, x4, x1, x2)

inst_26918:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc7ffffc; valaddr_reg:x3; val_offset:80754*0 + 3*37*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80754*0 + 3*38*FLEN/8, x4, x1, x2)

inst_26919:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc7ffffe; valaddr_reg:x3; val_offset:80757*0 + 3*38*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80757*0 + 3*39*FLEN/8, x4, x1, x2)

inst_26920:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x086888 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f086888; op2val:0x0;
op3val:0xc7fffff; valaddr_reg:x3; val_offset:80760*0 + 3*39*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80760*0 + 3*40*FLEN/8, x4, x1, x2)

inst_26921:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x3; val_offset:80763*0 + 3*40*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80763*0 + 3*41*FLEN/8, x4, x1, x2)

inst_26922:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x3; val_offset:80766*0 + 3*41*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80766*0 + 3*42*FLEN/8, x4, x1, x2)

inst_26923:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x3; val_offset:80769*0 + 3*42*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80769*0 + 3*43*FLEN/8, x4, x1, x2)

inst_26924:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x3; val_offset:80772*0 + 3*43*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80772*0 + 3*44*FLEN/8, x4, x1, x2)

inst_26925:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x3; val_offset:80775*0 + 3*44*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80775*0 + 3*45*FLEN/8, x4, x1, x2)

inst_26926:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x3; val_offset:80778*0 + 3*45*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80778*0 + 3*46*FLEN/8, x4, x1, x2)

inst_26927:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x3; val_offset:80781*0 + 3*46*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80781*0 + 3*47*FLEN/8, x4, x1, x2)

inst_26928:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x3; val_offset:80784*0 + 3*47*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80784*0 + 3*48*FLEN/8, x4, x1, x2)

inst_26929:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x3; val_offset:80787*0 + 3*48*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80787*0 + 3*49*FLEN/8, x4, x1, x2)

inst_26930:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x3; val_offset:80790*0 + 3*49*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80790*0 + 3*50*FLEN/8, x4, x1, x2)

inst_26931:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x3; val_offset:80793*0 + 3*50*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80793*0 + 3*51*FLEN/8, x4, x1, x2)

inst_26932:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x3; val_offset:80796*0 + 3*51*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80796*0 + 3*52*FLEN/8, x4, x1, x2)

inst_26933:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x3; val_offset:80799*0 + 3*52*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80799*0 + 3*53*FLEN/8, x4, x1, x2)

inst_26934:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x3; val_offset:80802*0 + 3*53*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80802*0 + 3*54*FLEN/8, x4, x1, x2)

inst_26935:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x3; val_offset:80805*0 + 3*54*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80805*0 + 3*55*FLEN/8, x4, x1, x2)

inst_26936:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x3; val_offset:80808*0 + 3*55*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80808*0 + 3*56*FLEN/8, x4, x1, x2)

inst_26937:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f000000; valaddr_reg:x3; val_offset:80811*0 + 3*56*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80811*0 + 3*57*FLEN/8, x4, x1, x2)

inst_26938:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f000001; valaddr_reg:x3; val_offset:80814*0 + 3*57*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80814*0 + 3*58*FLEN/8, x4, x1, x2)

inst_26939:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f000003; valaddr_reg:x3; val_offset:80817*0 + 3*58*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80817*0 + 3*59*FLEN/8, x4, x1, x2)

inst_26940:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f000007; valaddr_reg:x3; val_offset:80820*0 + 3*59*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80820*0 + 3*60*FLEN/8, x4, x1, x2)

inst_26941:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f00000f; valaddr_reg:x3; val_offset:80823*0 + 3*60*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80823*0 + 3*61*FLEN/8, x4, x1, x2)

inst_26942:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f00001f; valaddr_reg:x3; val_offset:80826*0 + 3*61*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80826*0 + 3*62*FLEN/8, x4, x1, x2)

inst_26943:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f00003f; valaddr_reg:x3; val_offset:80829*0 + 3*62*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80829*0 + 3*63*FLEN/8, x4, x1, x2)

inst_26944:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f00007f; valaddr_reg:x3; val_offset:80832*0 + 3*63*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80832*0 + 3*64*FLEN/8, x4, x1, x2)

inst_26945:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f0000ff; valaddr_reg:x3; val_offset:80835*0 + 3*64*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80835*0 + 3*65*FLEN/8, x4, x1, x2)

inst_26946:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f0001ff; valaddr_reg:x3; val_offset:80838*0 + 3*65*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80838*0 + 3*66*FLEN/8, x4, x1, x2)

inst_26947:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f0003ff; valaddr_reg:x3; val_offset:80841*0 + 3*66*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80841*0 + 3*67*FLEN/8, x4, x1, x2)

inst_26948:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f0007ff; valaddr_reg:x3; val_offset:80844*0 + 3*67*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80844*0 + 3*68*FLEN/8, x4, x1, x2)

inst_26949:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f000fff; valaddr_reg:x3; val_offset:80847*0 + 3*68*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80847*0 + 3*69*FLEN/8, x4, x1, x2)

inst_26950:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f001fff; valaddr_reg:x3; val_offset:80850*0 + 3*69*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80850*0 + 3*70*FLEN/8, x4, x1, x2)

inst_26951:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f003fff; valaddr_reg:x3; val_offset:80853*0 + 3*70*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80853*0 + 3*71*FLEN/8, x4, x1, x2)

inst_26952:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f007fff; valaddr_reg:x3; val_offset:80856*0 + 3*71*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80856*0 + 3*72*FLEN/8, x4, x1, x2)

inst_26953:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f00ffff; valaddr_reg:x3; val_offset:80859*0 + 3*72*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80859*0 + 3*73*FLEN/8, x4, x1, x2)

inst_26954:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f01ffff; valaddr_reg:x3; val_offset:80862*0 + 3*73*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80862*0 + 3*74*FLEN/8, x4, x1, x2)

inst_26955:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f03ffff; valaddr_reg:x3; val_offset:80865*0 + 3*74*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80865*0 + 3*75*FLEN/8, x4, x1, x2)

inst_26956:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f07ffff; valaddr_reg:x3; val_offset:80868*0 + 3*75*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80868*0 + 3*76*FLEN/8, x4, x1, x2)

inst_26957:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f0fffff; valaddr_reg:x3; val_offset:80871*0 + 3*76*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80871*0 + 3*77*FLEN/8, x4, x1, x2)

inst_26958:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f1fffff; valaddr_reg:x3; val_offset:80874*0 + 3*77*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80874*0 + 3*78*FLEN/8, x4, x1, x2)

inst_26959:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f3fffff; valaddr_reg:x3; val_offset:80877*0 + 3*78*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80877*0 + 3*79*FLEN/8, x4, x1, x2)

inst_26960:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f400000; valaddr_reg:x3; val_offset:80880*0 + 3*79*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80880*0 + 3*80*FLEN/8, x4, x1, x2)

inst_26961:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f600000; valaddr_reg:x3; val_offset:80883*0 + 3*80*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80883*0 + 3*81*FLEN/8, x4, x1, x2)

inst_26962:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f700000; valaddr_reg:x3; val_offset:80886*0 + 3*81*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80886*0 + 3*82*FLEN/8, x4, x1, x2)

inst_26963:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f780000; valaddr_reg:x3; val_offset:80889*0 + 3*82*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80889*0 + 3*83*FLEN/8, x4, x1, x2)

inst_26964:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f7c0000; valaddr_reg:x3; val_offset:80892*0 + 3*83*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80892*0 + 3*84*FLEN/8, x4, x1, x2)

inst_26965:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f7e0000; valaddr_reg:x3; val_offset:80895*0 + 3*84*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80895*0 + 3*85*FLEN/8, x4, x1, x2)

inst_26966:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f7f0000; valaddr_reg:x3; val_offset:80898*0 + 3*85*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80898*0 + 3*86*FLEN/8, x4, x1, x2)

inst_26967:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f7f8000; valaddr_reg:x3; val_offset:80901*0 + 3*86*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80901*0 + 3*87*FLEN/8, x4, x1, x2)

inst_26968:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f7fc000; valaddr_reg:x3; val_offset:80904*0 + 3*87*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80904*0 + 3*88*FLEN/8, x4, x1, x2)

inst_26969:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f7fe000; valaddr_reg:x3; val_offset:80907*0 + 3*88*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80907*0 + 3*89*FLEN/8, x4, x1, x2)

inst_26970:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f7ff000; valaddr_reg:x3; val_offset:80910*0 + 3*89*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80910*0 + 3*90*FLEN/8, x4, x1, x2)

inst_26971:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f7ff800; valaddr_reg:x3; val_offset:80913*0 + 3*90*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80913*0 + 3*91*FLEN/8, x4, x1, x2)

inst_26972:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f7ffc00; valaddr_reg:x3; val_offset:80916*0 + 3*91*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80916*0 + 3*92*FLEN/8, x4, x1, x2)

inst_26973:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f7ffe00; valaddr_reg:x3; val_offset:80919*0 + 3*92*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80919*0 + 3*93*FLEN/8, x4, x1, x2)

inst_26974:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f7fff00; valaddr_reg:x3; val_offset:80922*0 + 3*93*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80922*0 + 3*94*FLEN/8, x4, x1, x2)

inst_26975:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f7fff80; valaddr_reg:x3; val_offset:80925*0 + 3*94*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80925*0 + 3*95*FLEN/8, x4, x1, x2)

inst_26976:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f7fffc0; valaddr_reg:x3; val_offset:80928*0 + 3*95*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80928*0 + 3*96*FLEN/8, x4, x1, x2)

inst_26977:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f7fffe0; valaddr_reg:x3; val_offset:80931*0 + 3*96*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80931*0 + 3*97*FLEN/8, x4, x1, x2)

inst_26978:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f7ffff0; valaddr_reg:x3; val_offset:80934*0 + 3*97*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80934*0 + 3*98*FLEN/8, x4, x1, x2)

inst_26979:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f7ffff8; valaddr_reg:x3; val_offset:80937*0 + 3*98*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80937*0 + 3*99*FLEN/8, x4, x1, x2)

inst_26980:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f7ffffc; valaddr_reg:x3; val_offset:80940*0 + 3*99*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80940*0 + 3*100*FLEN/8, x4, x1, x2)

inst_26981:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f7ffffe; valaddr_reg:x3; val_offset:80943*0 + 3*100*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80943*0 + 3*101*FLEN/8, x4, x1, x2)

inst_26982:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08d74e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08d74e; op2val:0x80000000;
op3val:0x8f7fffff; valaddr_reg:x3; val_offset:80946*0 + 3*101*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80946*0 + 3*102*FLEN/8, x4, x1, x2)

inst_26983:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0x800001; valaddr_reg:x3; val_offset:80949*0 + 3*102*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80949*0 + 3*103*FLEN/8, x4, x1, x2)

inst_26984:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0x800003; valaddr_reg:x3; val_offset:80952*0 + 3*103*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80952*0 + 3*104*FLEN/8, x4, x1, x2)

inst_26985:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0x800007; valaddr_reg:x3; val_offset:80955*0 + 3*104*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80955*0 + 3*105*FLEN/8, x4, x1, x2)

inst_26986:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0x999999; valaddr_reg:x3; val_offset:80958*0 + 3*105*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80958*0 + 3*106*FLEN/8, x4, x1, x2)

inst_26987:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xa49249; valaddr_reg:x3; val_offset:80961*0 + 3*106*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80961*0 + 3*107*FLEN/8, x4, x1, x2)

inst_26988:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xb33333; valaddr_reg:x3; val_offset:80964*0 + 3*107*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80964*0 + 3*108*FLEN/8, x4, x1, x2)

inst_26989:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xb6db6d; valaddr_reg:x3; val_offset:80967*0 + 3*108*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80967*0 + 3*109*FLEN/8, x4, x1, x2)

inst_26990:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xbbbbbb; valaddr_reg:x3; val_offset:80970*0 + 3*109*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80970*0 + 3*110*FLEN/8, x4, x1, x2)

inst_26991:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xc44444; valaddr_reg:x3; val_offset:80973*0 + 3*110*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80973*0 + 3*111*FLEN/8, x4, x1, x2)

inst_26992:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xcccccc; valaddr_reg:x3; val_offset:80976*0 + 3*111*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80976*0 + 3*112*FLEN/8, x4, x1, x2)

inst_26993:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xdb6db6; valaddr_reg:x3; val_offset:80979*0 + 3*112*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80979*0 + 3*113*FLEN/8, x4, x1, x2)

inst_26994:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xe66666; valaddr_reg:x3; val_offset:80982*0 + 3*113*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80982*0 + 3*114*FLEN/8, x4, x1, x2)

inst_26995:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xedb6db; valaddr_reg:x3; val_offset:80985*0 + 3*114*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80985*0 + 3*115*FLEN/8, x4, x1, x2)

inst_26996:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xfffff8; valaddr_reg:x3; val_offset:80988*0 + 3*115*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80988*0 + 3*116*FLEN/8, x4, x1, x2)

inst_26997:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xfffffc; valaddr_reg:x3; val_offset:80991*0 + 3*116*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80991*0 + 3*117*FLEN/8, x4, x1, x2)

inst_26998:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xfffffe; valaddr_reg:x3; val_offset:80994*0 + 3*117*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80994*0 + 3*118*FLEN/8, x4, x1, x2)

inst_26999:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xa800000; valaddr_reg:x3; val_offset:80997*0 + 3*118*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80997*0 + 3*119*FLEN/8, x4, x1, x2)

inst_27000:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xa800001; valaddr_reg:x3; val_offset:81000*0 + 3*119*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81000*0 + 3*120*FLEN/8, x4, x1, x2)

inst_27001:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xa800003; valaddr_reg:x3; val_offset:81003*0 + 3*120*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81003*0 + 3*121*FLEN/8, x4, x1, x2)

inst_27002:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xa800007; valaddr_reg:x3; val_offset:81006*0 + 3*121*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81006*0 + 3*122*FLEN/8, x4, x1, x2)

inst_27003:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xa80000f; valaddr_reg:x3; val_offset:81009*0 + 3*122*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81009*0 + 3*123*FLEN/8, x4, x1, x2)

inst_27004:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xa80001f; valaddr_reg:x3; val_offset:81012*0 + 3*123*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81012*0 + 3*124*FLEN/8, x4, x1, x2)

inst_27005:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xa80003f; valaddr_reg:x3; val_offset:81015*0 + 3*124*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81015*0 + 3*125*FLEN/8, x4, x1, x2)

inst_27006:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xa80007f; valaddr_reg:x3; val_offset:81018*0 + 3*125*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81018*0 + 3*126*FLEN/8, x4, x1, x2)

inst_27007:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xa8000ff; valaddr_reg:x3; val_offset:81021*0 + 3*126*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81021*0 + 3*127*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_2)

inst_27008:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xa8001ff; valaddr_reg:x3; val_offset:81024*0 + 3*127*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81024*0 + 3*128*FLEN/8, x4, x1, x2)

inst_27009:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xa8003ff; valaddr_reg:x3; val_offset:81027*0 + 3*128*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81027*0 + 3*129*FLEN/8, x4, x1, x2)

inst_27010:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xa8007ff; valaddr_reg:x3; val_offset:81030*0 + 3*129*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81030*0 + 3*130*FLEN/8, x4, x1, x2)

inst_27011:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xa800fff; valaddr_reg:x3; val_offset:81033*0 + 3*130*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81033*0 + 3*131*FLEN/8, x4, x1, x2)

inst_27012:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xa801fff; valaddr_reg:x3; val_offset:81036*0 + 3*131*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81036*0 + 3*132*FLEN/8, x4, x1, x2)

inst_27013:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xa803fff; valaddr_reg:x3; val_offset:81039*0 + 3*132*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81039*0 + 3*133*FLEN/8, x4, x1, x2)

inst_27014:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xa807fff; valaddr_reg:x3; val_offset:81042*0 + 3*133*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81042*0 + 3*134*FLEN/8, x4, x1, x2)

inst_27015:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xa80ffff; valaddr_reg:x3; val_offset:81045*0 + 3*134*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81045*0 + 3*135*FLEN/8, x4, x1, x2)

inst_27016:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xa81ffff; valaddr_reg:x3; val_offset:81048*0 + 3*135*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81048*0 + 3*136*FLEN/8, x4, x1, x2)

inst_27017:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xa83ffff; valaddr_reg:x3; val_offset:81051*0 + 3*136*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81051*0 + 3*137*FLEN/8, x4, x1, x2)

inst_27018:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xa87ffff; valaddr_reg:x3; val_offset:81054*0 + 3*137*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81054*0 + 3*138*FLEN/8, x4, x1, x2)

inst_27019:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xa8fffff; valaddr_reg:x3; val_offset:81057*0 + 3*138*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81057*0 + 3*139*FLEN/8, x4, x1, x2)

inst_27020:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xa9fffff; valaddr_reg:x3; val_offset:81060*0 + 3*139*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81060*0 + 3*140*FLEN/8, x4, x1, x2)

inst_27021:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xabfffff; valaddr_reg:x3; val_offset:81063*0 + 3*140*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81063*0 + 3*141*FLEN/8, x4, x1, x2)

inst_27022:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xac00000; valaddr_reg:x3; val_offset:81066*0 + 3*141*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81066*0 + 3*142*FLEN/8, x4, x1, x2)

inst_27023:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xae00000; valaddr_reg:x3; val_offset:81069*0 + 3*142*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81069*0 + 3*143*FLEN/8, x4, x1, x2)

inst_27024:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xaf00000; valaddr_reg:x3; val_offset:81072*0 + 3*143*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81072*0 + 3*144*FLEN/8, x4, x1, x2)

inst_27025:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xaf80000; valaddr_reg:x3; val_offset:81075*0 + 3*144*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81075*0 + 3*145*FLEN/8, x4, x1, x2)

inst_27026:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xafc0000; valaddr_reg:x3; val_offset:81078*0 + 3*145*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81078*0 + 3*146*FLEN/8, x4, x1, x2)

inst_27027:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xafe0000; valaddr_reg:x3; val_offset:81081*0 + 3*146*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81081*0 + 3*147*FLEN/8, x4, x1, x2)

inst_27028:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xaff0000; valaddr_reg:x3; val_offset:81084*0 + 3*147*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81084*0 + 3*148*FLEN/8, x4, x1, x2)

inst_27029:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xaff8000; valaddr_reg:x3; val_offset:81087*0 + 3*148*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81087*0 + 3*149*FLEN/8, x4, x1, x2)

inst_27030:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xaffc000; valaddr_reg:x3; val_offset:81090*0 + 3*149*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81090*0 + 3*150*FLEN/8, x4, x1, x2)

inst_27031:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xaffe000; valaddr_reg:x3; val_offset:81093*0 + 3*150*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81093*0 + 3*151*FLEN/8, x4, x1, x2)

inst_27032:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xafff000; valaddr_reg:x3; val_offset:81096*0 + 3*151*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81096*0 + 3*152*FLEN/8, x4, x1, x2)

inst_27033:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xafff800; valaddr_reg:x3; val_offset:81099*0 + 3*152*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81099*0 + 3*153*FLEN/8, x4, x1, x2)

inst_27034:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xafffc00; valaddr_reg:x3; val_offset:81102*0 + 3*153*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81102*0 + 3*154*FLEN/8, x4, x1, x2)

inst_27035:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xafffe00; valaddr_reg:x3; val_offset:81105*0 + 3*154*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81105*0 + 3*155*FLEN/8, x4, x1, x2)

inst_27036:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xaffff00; valaddr_reg:x3; val_offset:81108*0 + 3*155*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81108*0 + 3*156*FLEN/8, x4, x1, x2)

inst_27037:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xaffff80; valaddr_reg:x3; val_offset:81111*0 + 3*156*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81111*0 + 3*157*FLEN/8, x4, x1, x2)

inst_27038:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xaffffc0; valaddr_reg:x3; val_offset:81114*0 + 3*157*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81114*0 + 3*158*FLEN/8, x4, x1, x2)

inst_27039:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xaffffe0; valaddr_reg:x3; val_offset:81117*0 + 3*158*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81117*0 + 3*159*FLEN/8, x4, x1, x2)

inst_27040:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xafffff0; valaddr_reg:x3; val_offset:81120*0 + 3*159*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81120*0 + 3*160*FLEN/8, x4, x1, x2)

inst_27041:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xafffff8; valaddr_reg:x3; val_offset:81123*0 + 3*160*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81123*0 + 3*161*FLEN/8, x4, x1, x2)

inst_27042:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xafffffc; valaddr_reg:x3; val_offset:81126*0 + 3*161*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81126*0 + 3*162*FLEN/8, x4, x1, x2)

inst_27043:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xafffffe; valaddr_reg:x3; val_offset:81129*0 + 3*162*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81129*0 + 3*163*FLEN/8, x4, x1, x2)

inst_27044:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x090db7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f090db7; op2val:0x0;
op3val:0xaffffff; valaddr_reg:x3; val_offset:81132*0 + 3*163*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81132*0 + 3*164*FLEN/8, x4, x1, x2)

inst_27045:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x3f800001; valaddr_reg:x3; val_offset:81135*0 + 3*164*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81135*0 + 3*165*FLEN/8, x4, x1, x2)

inst_27046:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x3f800003; valaddr_reg:x3; val_offset:81138*0 + 3*165*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81138*0 + 3*166*FLEN/8, x4, x1, x2)

inst_27047:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x3f800007; valaddr_reg:x3; val_offset:81141*0 + 3*166*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81141*0 + 3*167*FLEN/8, x4, x1, x2)

inst_27048:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x3f999999; valaddr_reg:x3; val_offset:81144*0 + 3*167*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81144*0 + 3*168*FLEN/8, x4, x1, x2)

inst_27049:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x3fa49249; valaddr_reg:x3; val_offset:81147*0 + 3*168*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81147*0 + 3*169*FLEN/8, x4, x1, x2)

inst_27050:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x3fb33333; valaddr_reg:x3; val_offset:81150*0 + 3*169*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81150*0 + 3*170*FLEN/8, x4, x1, x2)

inst_27051:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:81153*0 + 3*170*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81153*0 + 3*171*FLEN/8, x4, x1, x2)

inst_27052:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:81156*0 + 3*171*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81156*0 + 3*172*FLEN/8, x4, x1, x2)

inst_27053:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x3fc44444; valaddr_reg:x3; val_offset:81159*0 + 3*172*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81159*0 + 3*173*FLEN/8, x4, x1, x2)

inst_27054:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x3fcccccc; valaddr_reg:x3; val_offset:81162*0 + 3*173*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81162*0 + 3*174*FLEN/8, x4, x1, x2)

inst_27055:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:81165*0 + 3*174*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81165*0 + 3*175*FLEN/8, x4, x1, x2)

inst_27056:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x3fe66666; valaddr_reg:x3; val_offset:81168*0 + 3*175*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81168*0 + 3*176*FLEN/8, x4, x1, x2)

inst_27057:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x3fedb6db; valaddr_reg:x3; val_offset:81171*0 + 3*176*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81171*0 + 3*177*FLEN/8, x4, x1, x2)

inst_27058:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x3ffffff8; valaddr_reg:x3; val_offset:81174*0 + 3*177*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81174*0 + 3*178*FLEN/8, x4, x1, x2)

inst_27059:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x3ffffffc; valaddr_reg:x3; val_offset:81177*0 + 3*178*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81177*0 + 3*179*FLEN/8, x4, x1, x2)

inst_27060:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x3ffffffe; valaddr_reg:x3; val_offset:81180*0 + 3*179*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81180*0 + 3*180*FLEN/8, x4, x1, x2)

inst_27061:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a000000; valaddr_reg:x3; val_offset:81183*0 + 3*180*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81183*0 + 3*181*FLEN/8, x4, x1, x2)

inst_27062:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a000001; valaddr_reg:x3; val_offset:81186*0 + 3*181*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81186*0 + 3*182*FLEN/8, x4, x1, x2)

inst_27063:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a000003; valaddr_reg:x3; val_offset:81189*0 + 3*182*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81189*0 + 3*183*FLEN/8, x4, x1, x2)

inst_27064:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a000007; valaddr_reg:x3; val_offset:81192*0 + 3*183*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81192*0 + 3*184*FLEN/8, x4, x1, x2)

inst_27065:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a00000f; valaddr_reg:x3; val_offset:81195*0 + 3*184*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81195*0 + 3*185*FLEN/8, x4, x1, x2)

inst_27066:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a00001f; valaddr_reg:x3; val_offset:81198*0 + 3*185*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81198*0 + 3*186*FLEN/8, x4, x1, x2)

inst_27067:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a00003f; valaddr_reg:x3; val_offset:81201*0 + 3*186*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81201*0 + 3*187*FLEN/8, x4, x1, x2)

inst_27068:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a00007f; valaddr_reg:x3; val_offset:81204*0 + 3*187*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81204*0 + 3*188*FLEN/8, x4, x1, x2)

inst_27069:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a0000ff; valaddr_reg:x3; val_offset:81207*0 + 3*188*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81207*0 + 3*189*FLEN/8, x4, x1, x2)

inst_27070:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a0001ff; valaddr_reg:x3; val_offset:81210*0 + 3*189*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81210*0 + 3*190*FLEN/8, x4, x1, x2)

inst_27071:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a0003ff; valaddr_reg:x3; val_offset:81213*0 + 3*190*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81213*0 + 3*191*FLEN/8, x4, x1, x2)

inst_27072:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a0007ff; valaddr_reg:x3; val_offset:81216*0 + 3*191*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81216*0 + 3*192*FLEN/8, x4, x1, x2)

inst_27073:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a000fff; valaddr_reg:x3; val_offset:81219*0 + 3*192*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81219*0 + 3*193*FLEN/8, x4, x1, x2)

inst_27074:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a001fff; valaddr_reg:x3; val_offset:81222*0 + 3*193*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81222*0 + 3*194*FLEN/8, x4, x1, x2)

inst_27075:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a003fff; valaddr_reg:x3; val_offset:81225*0 + 3*194*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81225*0 + 3*195*FLEN/8, x4, x1, x2)

inst_27076:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a007fff; valaddr_reg:x3; val_offset:81228*0 + 3*195*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81228*0 + 3*196*FLEN/8, x4, x1, x2)

inst_27077:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a00ffff; valaddr_reg:x3; val_offset:81231*0 + 3*196*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81231*0 + 3*197*FLEN/8, x4, x1, x2)

inst_27078:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a01ffff; valaddr_reg:x3; val_offset:81234*0 + 3*197*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81234*0 + 3*198*FLEN/8, x4, x1, x2)

inst_27079:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a03ffff; valaddr_reg:x3; val_offset:81237*0 + 3*198*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81237*0 + 3*199*FLEN/8, x4, x1, x2)

inst_27080:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a07ffff; valaddr_reg:x3; val_offset:81240*0 + 3*199*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81240*0 + 3*200*FLEN/8, x4, x1, x2)

inst_27081:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a0fffff; valaddr_reg:x3; val_offset:81243*0 + 3*200*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81243*0 + 3*201*FLEN/8, x4, x1, x2)

inst_27082:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a1fffff; valaddr_reg:x3; val_offset:81246*0 + 3*201*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81246*0 + 3*202*FLEN/8, x4, x1, x2)

inst_27083:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a3fffff; valaddr_reg:x3; val_offset:81249*0 + 3*202*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81249*0 + 3*203*FLEN/8, x4, x1, x2)

inst_27084:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a400000; valaddr_reg:x3; val_offset:81252*0 + 3*203*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81252*0 + 3*204*FLEN/8, x4, x1, x2)

inst_27085:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a600000; valaddr_reg:x3; val_offset:81255*0 + 3*204*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81255*0 + 3*205*FLEN/8, x4, x1, x2)

inst_27086:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a700000; valaddr_reg:x3; val_offset:81258*0 + 3*205*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81258*0 + 3*206*FLEN/8, x4, x1, x2)

inst_27087:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a780000; valaddr_reg:x3; val_offset:81261*0 + 3*206*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81261*0 + 3*207*FLEN/8, x4, x1, x2)

inst_27088:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a7c0000; valaddr_reg:x3; val_offset:81264*0 + 3*207*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81264*0 + 3*208*FLEN/8, x4, x1, x2)

inst_27089:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a7e0000; valaddr_reg:x3; val_offset:81267*0 + 3*208*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81267*0 + 3*209*FLEN/8, x4, x1, x2)

inst_27090:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a7f0000; valaddr_reg:x3; val_offset:81270*0 + 3*209*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81270*0 + 3*210*FLEN/8, x4, x1, x2)

inst_27091:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a7f8000; valaddr_reg:x3; val_offset:81273*0 + 3*210*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81273*0 + 3*211*FLEN/8, x4, x1, x2)

inst_27092:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a7fc000; valaddr_reg:x3; val_offset:81276*0 + 3*211*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81276*0 + 3*212*FLEN/8, x4, x1, x2)

inst_27093:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a7fe000; valaddr_reg:x3; val_offset:81279*0 + 3*212*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81279*0 + 3*213*FLEN/8, x4, x1, x2)

inst_27094:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a7ff000; valaddr_reg:x3; val_offset:81282*0 + 3*213*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81282*0 + 3*214*FLEN/8, x4, x1, x2)

inst_27095:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a7ff800; valaddr_reg:x3; val_offset:81285*0 + 3*214*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81285*0 + 3*215*FLEN/8, x4, x1, x2)

inst_27096:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a7ffc00; valaddr_reg:x3; val_offset:81288*0 + 3*215*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81288*0 + 3*216*FLEN/8, x4, x1, x2)

inst_27097:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a7ffe00; valaddr_reg:x3; val_offset:81291*0 + 3*216*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81291*0 + 3*217*FLEN/8, x4, x1, x2)

inst_27098:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a7fff00; valaddr_reg:x3; val_offset:81294*0 + 3*217*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81294*0 + 3*218*FLEN/8, x4, x1, x2)

inst_27099:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a7fff80; valaddr_reg:x3; val_offset:81297*0 + 3*218*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81297*0 + 3*219*FLEN/8, x4, x1, x2)

inst_27100:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a7fffc0; valaddr_reg:x3; val_offset:81300*0 + 3*219*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81300*0 + 3*220*FLEN/8, x4, x1, x2)

inst_27101:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a7fffe0; valaddr_reg:x3; val_offset:81303*0 + 3*220*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81303*0 + 3*221*FLEN/8, x4, x1, x2)

inst_27102:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a7ffff0; valaddr_reg:x3; val_offset:81306*0 + 3*221*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81306*0 + 3*222*FLEN/8, x4, x1, x2)

inst_27103:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a7ffff8; valaddr_reg:x3; val_offset:81309*0 + 3*222*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81309*0 + 3*223*FLEN/8, x4, x1, x2)

inst_27104:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a7ffffc; valaddr_reg:x3; val_offset:81312*0 + 3*223*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81312*0 + 3*224*FLEN/8, x4, x1, x2)

inst_27105:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a7ffffe; valaddr_reg:x3; val_offset:81315*0 + 3*224*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81315*0 + 3*225*FLEN/8, x4, x1, x2)

inst_27106:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x091003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3bc4b1 and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f091003; op2val:0x3bc4b1;
op3val:0x4a7fffff; valaddr_reg:x3; val_offset:81318*0 + 3*225*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81318*0 + 3*226*FLEN/8, x4, x1, x2)

inst_27107:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:81321*0 + 3*226*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81321*0 + 3*227*FLEN/8, x4, x1, x2)

inst_27108:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:81324*0 + 3*227*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81324*0 + 3*228*FLEN/8, x4, x1, x2)

inst_27109:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:81327*0 + 3*228*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81327*0 + 3*229*FLEN/8, x4, x1, x2)

inst_27110:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x199999; valaddr_reg:x3; val_offset:81330*0 + 3*229*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81330*0 + 3*230*FLEN/8, x4, x1, x2)

inst_27111:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x249249; valaddr_reg:x3; val_offset:81333*0 + 3*230*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81333*0 + 3*231*FLEN/8, x4, x1, x2)

inst_27112:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x333333; valaddr_reg:x3; val_offset:81336*0 + 3*231*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81336*0 + 3*232*FLEN/8, x4, x1, x2)

inst_27113:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x36db6d; valaddr_reg:x3; val_offset:81339*0 + 3*232*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81339*0 + 3*233*FLEN/8, x4, x1, x2)

inst_27114:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x3bbbbb; valaddr_reg:x3; val_offset:81342*0 + 3*233*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81342*0 + 3*234*FLEN/8, x4, x1, x2)

inst_27115:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x444444; valaddr_reg:x3; val_offset:81345*0 + 3*234*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81345*0 + 3*235*FLEN/8, x4, x1, x2)

inst_27116:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x4ccccc; valaddr_reg:x3; val_offset:81348*0 + 3*235*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81348*0 + 3*236*FLEN/8, x4, x1, x2)

inst_27117:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x5b6db6; valaddr_reg:x3; val_offset:81351*0 + 3*236*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81351*0 + 3*237*FLEN/8, x4, x1, x2)

inst_27118:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x666666; valaddr_reg:x3; val_offset:81354*0 + 3*237*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81354*0 + 3*238*FLEN/8, x4, x1, x2)

inst_27119:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x6db6db; valaddr_reg:x3; val_offset:81357*0 + 3*238*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81357*0 + 3*239*FLEN/8, x4, x1, x2)

inst_27120:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x7ffff8; valaddr_reg:x3; val_offset:81360*0 + 3*239*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81360*0 + 3*240*FLEN/8, x4, x1, x2)

inst_27121:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x7ffffc; valaddr_reg:x3; val_offset:81363*0 + 3*240*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81363*0 + 3*241*FLEN/8, x4, x1, x2)

inst_27122:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x7ffffe; valaddr_reg:x3; val_offset:81366*0 + 3*241*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81366*0 + 3*242*FLEN/8, x4, x1, x2)

inst_27123:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x3000000; valaddr_reg:x3; val_offset:81369*0 + 3*242*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81369*0 + 3*243*FLEN/8, x4, x1, x2)

inst_27124:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x3000001; valaddr_reg:x3; val_offset:81372*0 + 3*243*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81372*0 + 3*244*FLEN/8, x4, x1, x2)

inst_27125:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x3000003; valaddr_reg:x3; val_offset:81375*0 + 3*244*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81375*0 + 3*245*FLEN/8, x4, x1, x2)

inst_27126:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x3000007; valaddr_reg:x3; val_offset:81378*0 + 3*245*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81378*0 + 3*246*FLEN/8, x4, x1, x2)

inst_27127:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x300000f; valaddr_reg:x3; val_offset:81381*0 + 3*246*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81381*0 + 3*247*FLEN/8, x4, x1, x2)

inst_27128:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x300001f; valaddr_reg:x3; val_offset:81384*0 + 3*247*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81384*0 + 3*248*FLEN/8, x4, x1, x2)

inst_27129:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x300003f; valaddr_reg:x3; val_offset:81387*0 + 3*248*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81387*0 + 3*249*FLEN/8, x4, x1, x2)

inst_27130:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x300007f; valaddr_reg:x3; val_offset:81390*0 + 3*249*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81390*0 + 3*250*FLEN/8, x4, x1, x2)

inst_27131:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x30000ff; valaddr_reg:x3; val_offset:81393*0 + 3*250*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81393*0 + 3*251*FLEN/8, x4, x1, x2)

inst_27132:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x30001ff; valaddr_reg:x3; val_offset:81396*0 + 3*251*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81396*0 + 3*252*FLEN/8, x4, x1, x2)

inst_27133:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x30003ff; valaddr_reg:x3; val_offset:81399*0 + 3*252*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81399*0 + 3*253*FLEN/8, x4, x1, x2)

inst_27134:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x30007ff; valaddr_reg:x3; val_offset:81402*0 + 3*253*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81402*0 + 3*254*FLEN/8, x4, x1, x2)

inst_27135:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x3000fff; valaddr_reg:x3; val_offset:81405*0 + 3*254*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81405*0 + 3*255*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_3)

inst_27136:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x3001fff; valaddr_reg:x3; val_offset:81408*0 + 3*256*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81408*0 + 3*256*FLEN/8, x4, x1, x2)

inst_27137:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x3003fff; valaddr_reg:x3; val_offset:81411*0 + 3*257*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81411*0 + 3*257*FLEN/8, x4, x1, x2)

inst_27138:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x3007fff; valaddr_reg:x3; val_offset:81414*0 + 3*258*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81414*0 + 3*258*FLEN/8, x4, x1, x2)

inst_27139:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x300ffff; valaddr_reg:x3; val_offset:81417*0 + 3*259*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81417*0 + 3*259*FLEN/8, x4, x1, x2)

inst_27140:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x301ffff; valaddr_reg:x3; val_offset:81420*0 + 3*260*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81420*0 + 3*260*FLEN/8, x4, x1, x2)

inst_27141:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x303ffff; valaddr_reg:x3; val_offset:81423*0 + 3*261*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81423*0 + 3*261*FLEN/8, x4, x1, x2)

inst_27142:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x307ffff; valaddr_reg:x3; val_offset:81426*0 + 3*262*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81426*0 + 3*262*FLEN/8, x4, x1, x2)

inst_27143:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x30fffff; valaddr_reg:x3; val_offset:81429*0 + 3*263*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81429*0 + 3*263*FLEN/8, x4, x1, x2)

inst_27144:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x31fffff; valaddr_reg:x3; val_offset:81432*0 + 3*264*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81432*0 + 3*264*FLEN/8, x4, x1, x2)

inst_27145:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x33fffff; valaddr_reg:x3; val_offset:81435*0 + 3*265*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81435*0 + 3*265*FLEN/8, x4, x1, x2)

inst_27146:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x3400000; valaddr_reg:x3; val_offset:81438*0 + 3*266*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81438*0 + 3*266*FLEN/8, x4, x1, x2)

inst_27147:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x3600000; valaddr_reg:x3; val_offset:81441*0 + 3*267*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81441*0 + 3*267*FLEN/8, x4, x1, x2)

inst_27148:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x3700000; valaddr_reg:x3; val_offset:81444*0 + 3*268*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81444*0 + 3*268*FLEN/8, x4, x1, x2)

inst_27149:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x3780000; valaddr_reg:x3; val_offset:81447*0 + 3*269*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81447*0 + 3*269*FLEN/8, x4, x1, x2)

inst_27150:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x37c0000; valaddr_reg:x3; val_offset:81450*0 + 3*270*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81450*0 + 3*270*FLEN/8, x4, x1, x2)

inst_27151:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x37e0000; valaddr_reg:x3; val_offset:81453*0 + 3*271*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81453*0 + 3*271*FLEN/8, x4, x1, x2)

inst_27152:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x37f0000; valaddr_reg:x3; val_offset:81456*0 + 3*272*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81456*0 + 3*272*FLEN/8, x4, x1, x2)

inst_27153:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x37f8000; valaddr_reg:x3; val_offset:81459*0 + 3*273*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81459*0 + 3*273*FLEN/8, x4, x1, x2)

inst_27154:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x37fc000; valaddr_reg:x3; val_offset:81462*0 + 3*274*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81462*0 + 3*274*FLEN/8, x4, x1, x2)

inst_27155:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x37fe000; valaddr_reg:x3; val_offset:81465*0 + 3*275*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81465*0 + 3*275*FLEN/8, x4, x1, x2)

inst_27156:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x37ff000; valaddr_reg:x3; val_offset:81468*0 + 3*276*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81468*0 + 3*276*FLEN/8, x4, x1, x2)

inst_27157:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x37ff800; valaddr_reg:x3; val_offset:81471*0 + 3*277*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81471*0 + 3*277*FLEN/8, x4, x1, x2)

inst_27158:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x37ffc00; valaddr_reg:x3; val_offset:81474*0 + 3*278*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81474*0 + 3*278*FLEN/8, x4, x1, x2)

inst_27159:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x37ffe00; valaddr_reg:x3; val_offset:81477*0 + 3*279*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81477*0 + 3*279*FLEN/8, x4, x1, x2)

inst_27160:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x37fff00; valaddr_reg:x3; val_offset:81480*0 + 3*280*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81480*0 + 3*280*FLEN/8, x4, x1, x2)

inst_27161:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x37fff80; valaddr_reg:x3; val_offset:81483*0 + 3*281*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81483*0 + 3*281*FLEN/8, x4, x1, x2)

inst_27162:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x37fffc0; valaddr_reg:x3; val_offset:81486*0 + 3*282*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81486*0 + 3*282*FLEN/8, x4, x1, x2)

inst_27163:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x37fffe0; valaddr_reg:x3; val_offset:81489*0 + 3*283*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81489*0 + 3*283*FLEN/8, x4, x1, x2)

inst_27164:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x37ffff0; valaddr_reg:x3; val_offset:81492*0 + 3*284*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81492*0 + 3*284*FLEN/8, x4, x1, x2)

inst_27165:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x37ffff8; valaddr_reg:x3; val_offset:81495*0 + 3*285*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81495*0 + 3*285*FLEN/8, x4, x1, x2)

inst_27166:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x37ffffc; valaddr_reg:x3; val_offset:81498*0 + 3*286*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81498*0 + 3*286*FLEN/8, x4, x1, x2)

inst_27167:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x37ffffe; valaddr_reg:x3; val_offset:81501*0 + 3*287*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81501*0 + 3*287*FLEN/8, x4, x1, x2)

inst_27168:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09599c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09599c; op2val:0x0;
op3val:0x37fffff; valaddr_reg:x3; val_offset:81504*0 + 3*288*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81504*0 + 3*288*FLEN/8, x4, x1, x2)

inst_27169:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb7800000; valaddr_reg:x3; val_offset:81507*0 + 3*289*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81507*0 + 3*289*FLEN/8, x4, x1, x2)

inst_27170:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb7800001; valaddr_reg:x3; val_offset:81510*0 + 3*290*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81510*0 + 3*290*FLEN/8, x4, x1, x2)

inst_27171:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb7800003; valaddr_reg:x3; val_offset:81513*0 + 3*291*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81513*0 + 3*291*FLEN/8, x4, x1, x2)

inst_27172:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb7800007; valaddr_reg:x3; val_offset:81516*0 + 3*292*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81516*0 + 3*292*FLEN/8, x4, x1, x2)

inst_27173:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb780000f; valaddr_reg:x3; val_offset:81519*0 + 3*293*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81519*0 + 3*293*FLEN/8, x4, x1, x2)

inst_27174:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb780001f; valaddr_reg:x3; val_offset:81522*0 + 3*294*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81522*0 + 3*294*FLEN/8, x4, x1, x2)

inst_27175:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb780003f; valaddr_reg:x3; val_offset:81525*0 + 3*295*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81525*0 + 3*295*FLEN/8, x4, x1, x2)

inst_27176:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb780007f; valaddr_reg:x3; val_offset:81528*0 + 3*296*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81528*0 + 3*296*FLEN/8, x4, x1, x2)

inst_27177:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb78000ff; valaddr_reg:x3; val_offset:81531*0 + 3*297*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81531*0 + 3*297*FLEN/8, x4, x1, x2)

inst_27178:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb78001ff; valaddr_reg:x3; val_offset:81534*0 + 3*298*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81534*0 + 3*298*FLEN/8, x4, x1, x2)

inst_27179:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb78003ff; valaddr_reg:x3; val_offset:81537*0 + 3*299*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81537*0 + 3*299*FLEN/8, x4, x1, x2)

inst_27180:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb78007ff; valaddr_reg:x3; val_offset:81540*0 + 3*300*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81540*0 + 3*300*FLEN/8, x4, x1, x2)

inst_27181:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb7800fff; valaddr_reg:x3; val_offset:81543*0 + 3*301*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81543*0 + 3*301*FLEN/8, x4, x1, x2)

inst_27182:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb7801fff; valaddr_reg:x3; val_offset:81546*0 + 3*302*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81546*0 + 3*302*FLEN/8, x4, x1, x2)

inst_27183:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb7803fff; valaddr_reg:x3; val_offset:81549*0 + 3*303*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81549*0 + 3*303*FLEN/8, x4, x1, x2)

inst_27184:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb7807fff; valaddr_reg:x3; val_offset:81552*0 + 3*304*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81552*0 + 3*304*FLEN/8, x4, x1, x2)

inst_27185:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb780ffff; valaddr_reg:x3; val_offset:81555*0 + 3*305*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81555*0 + 3*305*FLEN/8, x4, x1, x2)

inst_27186:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb781ffff; valaddr_reg:x3; val_offset:81558*0 + 3*306*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81558*0 + 3*306*FLEN/8, x4, x1, x2)

inst_27187:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb783ffff; valaddr_reg:x3; val_offset:81561*0 + 3*307*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81561*0 + 3*307*FLEN/8, x4, x1, x2)

inst_27188:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb787ffff; valaddr_reg:x3; val_offset:81564*0 + 3*308*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81564*0 + 3*308*FLEN/8, x4, x1, x2)

inst_27189:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb78fffff; valaddr_reg:x3; val_offset:81567*0 + 3*309*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81567*0 + 3*309*FLEN/8, x4, x1, x2)

inst_27190:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb79fffff; valaddr_reg:x3; val_offset:81570*0 + 3*310*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81570*0 + 3*310*FLEN/8, x4, x1, x2)

inst_27191:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb7bfffff; valaddr_reg:x3; val_offset:81573*0 + 3*311*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81573*0 + 3*311*FLEN/8, x4, x1, x2)

inst_27192:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb7c00000; valaddr_reg:x3; val_offset:81576*0 + 3*312*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81576*0 + 3*312*FLEN/8, x4, x1, x2)

inst_27193:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb7e00000; valaddr_reg:x3; val_offset:81579*0 + 3*313*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81579*0 + 3*313*FLEN/8, x4, x1, x2)

inst_27194:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb7f00000; valaddr_reg:x3; val_offset:81582*0 + 3*314*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81582*0 + 3*314*FLEN/8, x4, x1, x2)

inst_27195:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb7f80000; valaddr_reg:x3; val_offset:81585*0 + 3*315*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81585*0 + 3*315*FLEN/8, x4, x1, x2)

inst_27196:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb7fc0000; valaddr_reg:x3; val_offset:81588*0 + 3*316*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81588*0 + 3*316*FLEN/8, x4, x1, x2)

inst_27197:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb7fe0000; valaddr_reg:x3; val_offset:81591*0 + 3*317*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81591*0 + 3*317*FLEN/8, x4, x1, x2)

inst_27198:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb7ff0000; valaddr_reg:x3; val_offset:81594*0 + 3*318*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81594*0 + 3*318*FLEN/8, x4, x1, x2)

inst_27199:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb7ff8000; valaddr_reg:x3; val_offset:81597*0 + 3*319*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81597*0 + 3*319*FLEN/8, x4, x1, x2)

inst_27200:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb7ffc000; valaddr_reg:x3; val_offset:81600*0 + 3*320*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81600*0 + 3*320*FLEN/8, x4, x1, x2)

inst_27201:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb7ffe000; valaddr_reg:x3; val_offset:81603*0 + 3*321*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81603*0 + 3*321*FLEN/8, x4, x1, x2)

inst_27202:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb7fff000; valaddr_reg:x3; val_offset:81606*0 + 3*322*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81606*0 + 3*322*FLEN/8, x4, x1, x2)

inst_27203:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb7fff800; valaddr_reg:x3; val_offset:81609*0 + 3*323*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81609*0 + 3*323*FLEN/8, x4, x1, x2)

inst_27204:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb7fffc00; valaddr_reg:x3; val_offset:81612*0 + 3*324*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81612*0 + 3*324*FLEN/8, x4, x1, x2)

inst_27205:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb7fffe00; valaddr_reg:x3; val_offset:81615*0 + 3*325*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81615*0 + 3*325*FLEN/8, x4, x1, x2)

inst_27206:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb7ffff00; valaddr_reg:x3; val_offset:81618*0 + 3*326*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81618*0 + 3*326*FLEN/8, x4, x1, x2)

inst_27207:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb7ffff80; valaddr_reg:x3; val_offset:81621*0 + 3*327*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81621*0 + 3*327*FLEN/8, x4, x1, x2)

inst_27208:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb7ffffc0; valaddr_reg:x3; val_offset:81624*0 + 3*328*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81624*0 + 3*328*FLEN/8, x4, x1, x2)

inst_27209:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb7ffffe0; valaddr_reg:x3; val_offset:81627*0 + 3*329*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81627*0 + 3*329*FLEN/8, x4, x1, x2)

inst_27210:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb7fffff0; valaddr_reg:x3; val_offset:81630*0 + 3*330*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81630*0 + 3*330*FLEN/8, x4, x1, x2)

inst_27211:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb7fffff8; valaddr_reg:x3; val_offset:81633*0 + 3*331*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81633*0 + 3*331*FLEN/8, x4, x1, x2)

inst_27212:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb7fffffc; valaddr_reg:x3; val_offset:81636*0 + 3*332*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81636*0 + 3*332*FLEN/8, x4, x1, x2)

inst_27213:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb7fffffe; valaddr_reg:x3; val_offset:81639*0 + 3*333*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81639*0 + 3*333*FLEN/8, x4, x1, x2)

inst_27214:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xb7ffffff; valaddr_reg:x3; val_offset:81642*0 + 3*334*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81642*0 + 3*334*FLEN/8, x4, x1, x2)

inst_27215:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xbf800001; valaddr_reg:x3; val_offset:81645*0 + 3*335*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81645*0 + 3*335*FLEN/8, x4, x1, x2)

inst_27216:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xbf800003; valaddr_reg:x3; val_offset:81648*0 + 3*336*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81648*0 + 3*336*FLEN/8, x4, x1, x2)

inst_27217:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xbf800007; valaddr_reg:x3; val_offset:81651*0 + 3*337*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81651*0 + 3*337*FLEN/8, x4, x1, x2)

inst_27218:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xbf999999; valaddr_reg:x3; val_offset:81654*0 + 3*338*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81654*0 + 3*338*FLEN/8, x4, x1, x2)

inst_27219:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:81657*0 + 3*339*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81657*0 + 3*339*FLEN/8, x4, x1, x2)

inst_27220:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:81660*0 + 3*340*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81660*0 + 3*340*FLEN/8, x4, x1, x2)

inst_27221:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:81663*0 + 3*341*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81663*0 + 3*341*FLEN/8, x4, x1, x2)

inst_27222:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:81666*0 + 3*342*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81666*0 + 3*342*FLEN/8, x4, x1, x2)

inst_27223:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:81669*0 + 3*343*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81669*0 + 3*343*FLEN/8, x4, x1, x2)

inst_27224:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:81672*0 + 3*344*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81672*0 + 3*344*FLEN/8, x4, x1, x2)

inst_27225:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:81675*0 + 3*345*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81675*0 + 3*345*FLEN/8, x4, x1, x2)

inst_27226:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:81678*0 + 3*346*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81678*0 + 3*346*FLEN/8, x4, x1, x2)

inst_27227:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:81681*0 + 3*347*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81681*0 + 3*347*FLEN/8, x4, x1, x2)

inst_27228:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:81684*0 + 3*348*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81684*0 + 3*348*FLEN/8, x4, x1, x2)

inst_27229:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:81687*0 + 3*349*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81687*0 + 3*349*FLEN/8, x4, x1, x2)

inst_27230:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x097520 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b98ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f097520; op2val:0x803b98ba;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:81690*0 + 3*350*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81690*0 + 3*350*FLEN/8, x4, x1, x2)

inst_27231:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0x800001; valaddr_reg:x3; val_offset:81693*0 + 3*351*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81693*0 + 3*351*FLEN/8, x4, x1, x2)

inst_27232:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0x800003; valaddr_reg:x3; val_offset:81696*0 + 3*352*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81696*0 + 3*352*FLEN/8, x4, x1, x2)

inst_27233:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0x800007; valaddr_reg:x3; val_offset:81699*0 + 3*353*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81699*0 + 3*353*FLEN/8, x4, x1, x2)

inst_27234:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0x999999; valaddr_reg:x3; val_offset:81702*0 + 3*354*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81702*0 + 3*354*FLEN/8, x4, x1, x2)

inst_27235:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xa49249; valaddr_reg:x3; val_offset:81705*0 + 3*355*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81705*0 + 3*355*FLEN/8, x4, x1, x2)

inst_27236:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xb33333; valaddr_reg:x3; val_offset:81708*0 + 3*356*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81708*0 + 3*356*FLEN/8, x4, x1, x2)

inst_27237:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xb6db6d; valaddr_reg:x3; val_offset:81711*0 + 3*357*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81711*0 + 3*357*FLEN/8, x4, x1, x2)

inst_27238:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xbbbbbb; valaddr_reg:x3; val_offset:81714*0 + 3*358*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81714*0 + 3*358*FLEN/8, x4, x1, x2)

inst_27239:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xc44444; valaddr_reg:x3; val_offset:81717*0 + 3*359*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81717*0 + 3*359*FLEN/8, x4, x1, x2)

inst_27240:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xcccccc; valaddr_reg:x3; val_offset:81720*0 + 3*360*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81720*0 + 3*360*FLEN/8, x4, x1, x2)

inst_27241:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xdb6db6; valaddr_reg:x3; val_offset:81723*0 + 3*361*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81723*0 + 3*361*FLEN/8, x4, x1, x2)

inst_27242:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xe66666; valaddr_reg:x3; val_offset:81726*0 + 3*362*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81726*0 + 3*362*FLEN/8, x4, x1, x2)

inst_27243:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xedb6db; valaddr_reg:x3; val_offset:81729*0 + 3*363*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81729*0 + 3*363*FLEN/8, x4, x1, x2)

inst_27244:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xfffff8; valaddr_reg:x3; val_offset:81732*0 + 3*364*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81732*0 + 3*364*FLEN/8, x4, x1, x2)

inst_27245:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xfffffc; valaddr_reg:x3; val_offset:81735*0 + 3*365*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81735*0 + 3*365*FLEN/8, x4, x1, x2)

inst_27246:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xfffffe; valaddr_reg:x3; val_offset:81738*0 + 3*366*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81738*0 + 3*366*FLEN/8, x4, x1, x2)

inst_27247:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xc800000; valaddr_reg:x3; val_offset:81741*0 + 3*367*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81741*0 + 3*367*FLEN/8, x4, x1, x2)

inst_27248:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xc800001; valaddr_reg:x3; val_offset:81744*0 + 3*368*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81744*0 + 3*368*FLEN/8, x4, x1, x2)

inst_27249:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xc800003; valaddr_reg:x3; val_offset:81747*0 + 3*369*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81747*0 + 3*369*FLEN/8, x4, x1, x2)

inst_27250:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xc800007; valaddr_reg:x3; val_offset:81750*0 + 3*370*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81750*0 + 3*370*FLEN/8, x4, x1, x2)

inst_27251:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xc80000f; valaddr_reg:x3; val_offset:81753*0 + 3*371*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81753*0 + 3*371*FLEN/8, x4, x1, x2)

inst_27252:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xc80001f; valaddr_reg:x3; val_offset:81756*0 + 3*372*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81756*0 + 3*372*FLEN/8, x4, x1, x2)

inst_27253:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xc80003f; valaddr_reg:x3; val_offset:81759*0 + 3*373*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81759*0 + 3*373*FLEN/8, x4, x1, x2)

inst_27254:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xc80007f; valaddr_reg:x3; val_offset:81762*0 + 3*374*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81762*0 + 3*374*FLEN/8, x4, x1, x2)

inst_27255:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xc8000ff; valaddr_reg:x3; val_offset:81765*0 + 3*375*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81765*0 + 3*375*FLEN/8, x4, x1, x2)

inst_27256:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xc8001ff; valaddr_reg:x3; val_offset:81768*0 + 3*376*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81768*0 + 3*376*FLEN/8, x4, x1, x2)

inst_27257:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xc8003ff; valaddr_reg:x3; val_offset:81771*0 + 3*377*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81771*0 + 3*377*FLEN/8, x4, x1, x2)

inst_27258:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xc8007ff; valaddr_reg:x3; val_offset:81774*0 + 3*378*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81774*0 + 3*378*FLEN/8, x4, x1, x2)

inst_27259:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xc800fff; valaddr_reg:x3; val_offset:81777*0 + 3*379*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81777*0 + 3*379*FLEN/8, x4, x1, x2)

inst_27260:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xc801fff; valaddr_reg:x3; val_offset:81780*0 + 3*380*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81780*0 + 3*380*FLEN/8, x4, x1, x2)

inst_27261:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xc803fff; valaddr_reg:x3; val_offset:81783*0 + 3*381*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81783*0 + 3*381*FLEN/8, x4, x1, x2)

inst_27262:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xc807fff; valaddr_reg:x3; val_offset:81786*0 + 3*382*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81786*0 + 3*382*FLEN/8, x4, x1, x2)

inst_27263:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xc80ffff; valaddr_reg:x3; val_offset:81789*0 + 3*383*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81789*0 + 3*383*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_4)

inst_27264:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xc81ffff; valaddr_reg:x3; val_offset:81792*0 + 3*384*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81792*0 + 3*384*FLEN/8, x4, x1, x2)

inst_27265:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xc83ffff; valaddr_reg:x3; val_offset:81795*0 + 3*385*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81795*0 + 3*385*FLEN/8, x4, x1, x2)

inst_27266:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xc87ffff; valaddr_reg:x3; val_offset:81798*0 + 3*386*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81798*0 + 3*386*FLEN/8, x4, x1, x2)

inst_27267:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xc8fffff; valaddr_reg:x3; val_offset:81801*0 + 3*387*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81801*0 + 3*387*FLEN/8, x4, x1, x2)

inst_27268:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xc9fffff; valaddr_reg:x3; val_offset:81804*0 + 3*388*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81804*0 + 3*388*FLEN/8, x4, x1, x2)

inst_27269:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xcbfffff; valaddr_reg:x3; val_offset:81807*0 + 3*389*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81807*0 + 3*389*FLEN/8, x4, x1, x2)

inst_27270:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xcc00000; valaddr_reg:x3; val_offset:81810*0 + 3*390*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81810*0 + 3*390*FLEN/8, x4, x1, x2)

inst_27271:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xce00000; valaddr_reg:x3; val_offset:81813*0 + 3*391*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81813*0 + 3*391*FLEN/8, x4, x1, x2)

inst_27272:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xcf00000; valaddr_reg:x3; val_offset:81816*0 + 3*392*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81816*0 + 3*392*FLEN/8, x4, x1, x2)

inst_27273:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xcf80000; valaddr_reg:x3; val_offset:81819*0 + 3*393*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81819*0 + 3*393*FLEN/8, x4, x1, x2)

inst_27274:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xcfc0000; valaddr_reg:x3; val_offset:81822*0 + 3*394*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81822*0 + 3*394*FLEN/8, x4, x1, x2)

inst_27275:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xcfe0000; valaddr_reg:x3; val_offset:81825*0 + 3*395*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81825*0 + 3*395*FLEN/8, x4, x1, x2)

inst_27276:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xcff0000; valaddr_reg:x3; val_offset:81828*0 + 3*396*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81828*0 + 3*396*FLEN/8, x4, x1, x2)

inst_27277:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xcff8000; valaddr_reg:x3; val_offset:81831*0 + 3*397*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81831*0 + 3*397*FLEN/8, x4, x1, x2)

inst_27278:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xcffc000; valaddr_reg:x3; val_offset:81834*0 + 3*398*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81834*0 + 3*398*FLEN/8, x4, x1, x2)

inst_27279:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xcffe000; valaddr_reg:x3; val_offset:81837*0 + 3*399*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81837*0 + 3*399*FLEN/8, x4, x1, x2)

inst_27280:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xcfff000; valaddr_reg:x3; val_offset:81840*0 + 3*400*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81840*0 + 3*400*FLEN/8, x4, x1, x2)

inst_27281:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xcfff800; valaddr_reg:x3; val_offset:81843*0 + 3*401*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81843*0 + 3*401*FLEN/8, x4, x1, x2)

inst_27282:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xcfffc00; valaddr_reg:x3; val_offset:81846*0 + 3*402*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81846*0 + 3*402*FLEN/8, x4, x1, x2)

inst_27283:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xcfffe00; valaddr_reg:x3; val_offset:81849*0 + 3*403*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81849*0 + 3*403*FLEN/8, x4, x1, x2)

inst_27284:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xcffff00; valaddr_reg:x3; val_offset:81852*0 + 3*404*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81852*0 + 3*404*FLEN/8, x4, x1, x2)

inst_27285:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xcffff80; valaddr_reg:x3; val_offset:81855*0 + 3*405*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81855*0 + 3*405*FLEN/8, x4, x1, x2)

inst_27286:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xcffffc0; valaddr_reg:x3; val_offset:81858*0 + 3*406*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81858*0 + 3*406*FLEN/8, x4, x1, x2)

inst_27287:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xcffffe0; valaddr_reg:x3; val_offset:81861*0 + 3*407*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81861*0 + 3*407*FLEN/8, x4, x1, x2)

inst_27288:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xcfffff0; valaddr_reg:x3; val_offset:81864*0 + 3*408*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81864*0 + 3*408*FLEN/8, x4, x1, x2)

inst_27289:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xcfffff8; valaddr_reg:x3; val_offset:81867*0 + 3*409*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81867*0 + 3*409*FLEN/8, x4, x1, x2)

inst_27290:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xcfffffc; valaddr_reg:x3; val_offset:81870*0 + 3*410*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81870*0 + 3*410*FLEN/8, x4, x1, x2)

inst_27291:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xcfffffe; valaddr_reg:x3; val_offset:81873*0 + 3*411*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81873*0 + 3*411*FLEN/8, x4, x1, x2)

inst_27292:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x098ac2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f098ac2; op2val:0x0;
op3val:0xcffffff; valaddr_reg:x3; val_offset:81876*0 + 3*412*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81876*0 + 3*412*FLEN/8, x4, x1, x2)

inst_27293:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xbf800001; valaddr_reg:x3; val_offset:81879*0 + 3*413*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81879*0 + 3*413*FLEN/8, x4, x1, x2)

inst_27294:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xbf800003; valaddr_reg:x3; val_offset:81882*0 + 3*414*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81882*0 + 3*414*FLEN/8, x4, x1, x2)

inst_27295:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xbf800007; valaddr_reg:x3; val_offset:81885*0 + 3*415*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81885*0 + 3*415*FLEN/8, x4, x1, x2)

inst_27296:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xbf999999; valaddr_reg:x3; val_offset:81888*0 + 3*416*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81888*0 + 3*416*FLEN/8, x4, x1, x2)

inst_27297:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:81891*0 + 3*417*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81891*0 + 3*417*FLEN/8, x4, x1, x2)

inst_27298:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:81894*0 + 3*418*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81894*0 + 3*418*FLEN/8, x4, x1, x2)

inst_27299:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:81897*0 + 3*419*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81897*0 + 3*419*FLEN/8, x4, x1, x2)

inst_27300:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:81900*0 + 3*420*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81900*0 + 3*420*FLEN/8, x4, x1, x2)

inst_27301:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:81903*0 + 3*421*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81903*0 + 3*421*FLEN/8, x4, x1, x2)

inst_27302:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:81906*0 + 3*422*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81906*0 + 3*422*FLEN/8, x4, x1, x2)

inst_27303:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:81909*0 + 3*423*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81909*0 + 3*423*FLEN/8, x4, x1, x2)

inst_27304:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:81912*0 + 3*424*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81912*0 + 3*424*FLEN/8, x4, x1, x2)

inst_27305:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:81915*0 + 3*425*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81915*0 + 3*425*FLEN/8, x4, x1, x2)

inst_27306:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:81918*0 + 3*426*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81918*0 + 3*426*FLEN/8, x4, x1, x2)

inst_27307:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:81921*0 + 3*427*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81921*0 + 3*427*FLEN/8, x4, x1, x2)

inst_27308:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:81924*0 + 3*428*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81924*0 + 3*428*FLEN/8, x4, x1, x2)

inst_27309:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc2000000; valaddr_reg:x3; val_offset:81927*0 + 3*429*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81927*0 + 3*429*FLEN/8, x4, x1, x2)

inst_27310:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc2000001; valaddr_reg:x3; val_offset:81930*0 + 3*430*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81930*0 + 3*430*FLEN/8, x4, x1, x2)

inst_27311:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc2000003; valaddr_reg:x3; val_offset:81933*0 + 3*431*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81933*0 + 3*431*FLEN/8, x4, x1, x2)

inst_27312:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc2000007; valaddr_reg:x3; val_offset:81936*0 + 3*432*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81936*0 + 3*432*FLEN/8, x4, x1, x2)

inst_27313:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc200000f; valaddr_reg:x3; val_offset:81939*0 + 3*433*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81939*0 + 3*433*FLEN/8, x4, x1, x2)

inst_27314:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc200001f; valaddr_reg:x3; val_offset:81942*0 + 3*434*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81942*0 + 3*434*FLEN/8, x4, x1, x2)

inst_27315:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc200003f; valaddr_reg:x3; val_offset:81945*0 + 3*435*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81945*0 + 3*435*FLEN/8, x4, x1, x2)

inst_27316:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc200007f; valaddr_reg:x3; val_offset:81948*0 + 3*436*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81948*0 + 3*436*FLEN/8, x4, x1, x2)

inst_27317:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc20000ff; valaddr_reg:x3; val_offset:81951*0 + 3*437*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81951*0 + 3*437*FLEN/8, x4, x1, x2)

inst_27318:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc20001ff; valaddr_reg:x3; val_offset:81954*0 + 3*438*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81954*0 + 3*438*FLEN/8, x4, x1, x2)

inst_27319:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc20003ff; valaddr_reg:x3; val_offset:81957*0 + 3*439*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81957*0 + 3*439*FLEN/8, x4, x1, x2)

inst_27320:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc20007ff; valaddr_reg:x3; val_offset:81960*0 + 3*440*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81960*0 + 3*440*FLEN/8, x4, x1, x2)

inst_27321:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc2000fff; valaddr_reg:x3; val_offset:81963*0 + 3*441*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81963*0 + 3*441*FLEN/8, x4, x1, x2)

inst_27322:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc2001fff; valaddr_reg:x3; val_offset:81966*0 + 3*442*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81966*0 + 3*442*FLEN/8, x4, x1, x2)

inst_27323:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc2003fff; valaddr_reg:x3; val_offset:81969*0 + 3*443*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81969*0 + 3*443*FLEN/8, x4, x1, x2)

inst_27324:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc2007fff; valaddr_reg:x3; val_offset:81972*0 + 3*444*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81972*0 + 3*444*FLEN/8, x4, x1, x2)

inst_27325:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc200ffff; valaddr_reg:x3; val_offset:81975*0 + 3*445*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81975*0 + 3*445*FLEN/8, x4, x1, x2)

inst_27326:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc201ffff; valaddr_reg:x3; val_offset:81978*0 + 3*446*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81978*0 + 3*446*FLEN/8, x4, x1, x2)

inst_27327:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc203ffff; valaddr_reg:x3; val_offset:81981*0 + 3*447*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81981*0 + 3*447*FLEN/8, x4, x1, x2)

inst_27328:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc207ffff; valaddr_reg:x3; val_offset:81984*0 + 3*448*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81984*0 + 3*448*FLEN/8, x4, x1, x2)

inst_27329:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc20fffff; valaddr_reg:x3; val_offset:81987*0 + 3*449*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81987*0 + 3*449*FLEN/8, x4, x1, x2)

inst_27330:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc21fffff; valaddr_reg:x3; val_offset:81990*0 + 3*450*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81990*0 + 3*450*FLEN/8, x4, x1, x2)

inst_27331:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc23fffff; valaddr_reg:x3; val_offset:81993*0 + 3*451*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81993*0 + 3*451*FLEN/8, x4, x1, x2)

inst_27332:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc2400000; valaddr_reg:x3; val_offset:81996*0 + 3*452*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81996*0 + 3*452*FLEN/8, x4, x1, x2)

inst_27333:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc2600000; valaddr_reg:x3; val_offset:81999*0 + 3*453*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81999*0 + 3*453*FLEN/8, x4, x1, x2)

inst_27334:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc2700000; valaddr_reg:x3; val_offset:82002*0 + 3*454*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82002*0 + 3*454*FLEN/8, x4, x1, x2)

inst_27335:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc2780000; valaddr_reg:x3; val_offset:82005*0 + 3*455*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82005*0 + 3*455*FLEN/8, x4, x1, x2)

inst_27336:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc27c0000; valaddr_reg:x3; val_offset:82008*0 + 3*456*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82008*0 + 3*456*FLEN/8, x4, x1, x2)

inst_27337:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc27e0000; valaddr_reg:x3; val_offset:82011*0 + 3*457*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82011*0 + 3*457*FLEN/8, x4, x1, x2)

inst_27338:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc27f0000; valaddr_reg:x3; val_offset:82014*0 + 3*458*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82014*0 + 3*458*FLEN/8, x4, x1, x2)

inst_27339:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc27f8000; valaddr_reg:x3; val_offset:82017*0 + 3*459*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82017*0 + 3*459*FLEN/8, x4, x1, x2)

inst_27340:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc27fc000; valaddr_reg:x3; val_offset:82020*0 + 3*460*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82020*0 + 3*460*FLEN/8, x4, x1, x2)

inst_27341:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc27fe000; valaddr_reg:x3; val_offset:82023*0 + 3*461*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82023*0 + 3*461*FLEN/8, x4, x1, x2)

inst_27342:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc27ff000; valaddr_reg:x3; val_offset:82026*0 + 3*462*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82026*0 + 3*462*FLEN/8, x4, x1, x2)

inst_27343:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc27ff800; valaddr_reg:x3; val_offset:82029*0 + 3*463*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82029*0 + 3*463*FLEN/8, x4, x1, x2)

inst_27344:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc27ffc00; valaddr_reg:x3; val_offset:82032*0 + 3*464*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82032*0 + 3*464*FLEN/8, x4, x1, x2)

inst_27345:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc27ffe00; valaddr_reg:x3; val_offset:82035*0 + 3*465*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82035*0 + 3*465*FLEN/8, x4, x1, x2)

inst_27346:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc27fff00; valaddr_reg:x3; val_offset:82038*0 + 3*466*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82038*0 + 3*466*FLEN/8, x4, x1, x2)

inst_27347:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc27fff80; valaddr_reg:x3; val_offset:82041*0 + 3*467*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82041*0 + 3*467*FLEN/8, x4, x1, x2)

inst_27348:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc27fffc0; valaddr_reg:x3; val_offset:82044*0 + 3*468*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82044*0 + 3*468*FLEN/8, x4, x1, x2)

inst_27349:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc27fffe0; valaddr_reg:x3; val_offset:82047*0 + 3*469*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82047*0 + 3*469*FLEN/8, x4, x1, x2)

inst_27350:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc27ffff0; valaddr_reg:x3; val_offset:82050*0 + 3*470*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82050*0 + 3*470*FLEN/8, x4, x1, x2)

inst_27351:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc27ffff8; valaddr_reg:x3; val_offset:82053*0 + 3*471*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82053*0 + 3*471*FLEN/8, x4, x1, x2)

inst_27352:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc27ffffc; valaddr_reg:x3; val_offset:82056*0 + 3*472*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82056*0 + 3*472*FLEN/8, x4, x1, x2)

inst_27353:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc27ffffe; valaddr_reg:x3; val_offset:82059*0 + 3*473*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82059*0 + 3*473*FLEN/8, x4, x1, x2)

inst_27354:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a272a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3b4bec and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a272a; op2val:0x803b4bec;
op3val:0xc27fffff; valaddr_reg:x3; val_offset:82062*0 + 3*474*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82062*0 + 3*474*FLEN/8, x4, x1, x2)

inst_27355:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:82065*0 + 3*475*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82065*0 + 3*475*FLEN/8, x4, x1, x2)

inst_27356:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:82068*0 + 3*476*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82068*0 + 3*476*FLEN/8, x4, x1, x2)

inst_27357:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:82071*0 + 3*477*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82071*0 + 3*477*FLEN/8, x4, x1, x2)

inst_27358:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x199999; valaddr_reg:x3; val_offset:82074*0 + 3*478*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82074*0 + 3*478*FLEN/8, x4, x1, x2)

inst_27359:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x249249; valaddr_reg:x3; val_offset:82077*0 + 3*479*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82077*0 + 3*479*FLEN/8, x4, x1, x2)

inst_27360:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x333333; valaddr_reg:x3; val_offset:82080*0 + 3*480*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82080*0 + 3*480*FLEN/8, x4, x1, x2)

inst_27361:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x36db6d; valaddr_reg:x3; val_offset:82083*0 + 3*481*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82083*0 + 3*481*FLEN/8, x4, x1, x2)

inst_27362:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x3bbbbb; valaddr_reg:x3; val_offset:82086*0 + 3*482*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82086*0 + 3*482*FLEN/8, x4, x1, x2)

inst_27363:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x444444; valaddr_reg:x3; val_offset:82089*0 + 3*483*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82089*0 + 3*483*FLEN/8, x4, x1, x2)

inst_27364:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x4ccccc; valaddr_reg:x3; val_offset:82092*0 + 3*484*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82092*0 + 3*484*FLEN/8, x4, x1, x2)

inst_27365:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x5b6db6; valaddr_reg:x3; val_offset:82095*0 + 3*485*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82095*0 + 3*485*FLEN/8, x4, x1, x2)

inst_27366:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x666666; valaddr_reg:x3; val_offset:82098*0 + 3*486*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82098*0 + 3*486*FLEN/8, x4, x1, x2)

inst_27367:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x6db6db; valaddr_reg:x3; val_offset:82101*0 + 3*487*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82101*0 + 3*487*FLEN/8, x4, x1, x2)

inst_27368:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x7ffff8; valaddr_reg:x3; val_offset:82104*0 + 3*488*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82104*0 + 3*488*FLEN/8, x4, x1, x2)

inst_27369:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x7ffffc; valaddr_reg:x3; val_offset:82107*0 + 3*489*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82107*0 + 3*489*FLEN/8, x4, x1, x2)

inst_27370:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x7ffffe; valaddr_reg:x3; val_offset:82110*0 + 3*490*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82110*0 + 3*490*FLEN/8, x4, x1, x2)

inst_27371:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x8800000; valaddr_reg:x3; val_offset:82113*0 + 3*491*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82113*0 + 3*491*FLEN/8, x4, x1, x2)

inst_27372:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x8800001; valaddr_reg:x3; val_offset:82116*0 + 3*492*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82116*0 + 3*492*FLEN/8, x4, x1, x2)

inst_27373:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x8800003; valaddr_reg:x3; val_offset:82119*0 + 3*493*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82119*0 + 3*493*FLEN/8, x4, x1, x2)

inst_27374:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x8800007; valaddr_reg:x3; val_offset:82122*0 + 3*494*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82122*0 + 3*494*FLEN/8, x4, x1, x2)

inst_27375:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x880000f; valaddr_reg:x3; val_offset:82125*0 + 3*495*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82125*0 + 3*495*FLEN/8, x4, x1, x2)

inst_27376:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x880001f; valaddr_reg:x3; val_offset:82128*0 + 3*496*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82128*0 + 3*496*FLEN/8, x4, x1, x2)

inst_27377:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x880003f; valaddr_reg:x3; val_offset:82131*0 + 3*497*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82131*0 + 3*497*FLEN/8, x4, x1, x2)

inst_27378:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x880007f; valaddr_reg:x3; val_offset:82134*0 + 3*498*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82134*0 + 3*498*FLEN/8, x4, x1, x2)

inst_27379:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x88000ff; valaddr_reg:x3; val_offset:82137*0 + 3*499*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82137*0 + 3*499*FLEN/8, x4, x1, x2)

inst_27380:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x88001ff; valaddr_reg:x3; val_offset:82140*0 + 3*500*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82140*0 + 3*500*FLEN/8, x4, x1, x2)

inst_27381:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x88003ff; valaddr_reg:x3; val_offset:82143*0 + 3*501*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82143*0 + 3*501*FLEN/8, x4, x1, x2)

inst_27382:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x88007ff; valaddr_reg:x3; val_offset:82146*0 + 3*502*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82146*0 + 3*502*FLEN/8, x4, x1, x2)

inst_27383:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x8800fff; valaddr_reg:x3; val_offset:82149*0 + 3*503*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82149*0 + 3*503*FLEN/8, x4, x1, x2)

inst_27384:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x8801fff; valaddr_reg:x3; val_offset:82152*0 + 3*504*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82152*0 + 3*504*FLEN/8, x4, x1, x2)

inst_27385:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x8803fff; valaddr_reg:x3; val_offset:82155*0 + 3*505*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82155*0 + 3*505*FLEN/8, x4, x1, x2)

inst_27386:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x8807fff; valaddr_reg:x3; val_offset:82158*0 + 3*506*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82158*0 + 3*506*FLEN/8, x4, x1, x2)

inst_27387:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x880ffff; valaddr_reg:x3; val_offset:82161*0 + 3*507*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82161*0 + 3*507*FLEN/8, x4, x1, x2)

inst_27388:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x881ffff; valaddr_reg:x3; val_offset:82164*0 + 3*508*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82164*0 + 3*508*FLEN/8, x4, x1, x2)

inst_27389:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x883ffff; valaddr_reg:x3; val_offset:82167*0 + 3*509*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82167*0 + 3*509*FLEN/8, x4, x1, x2)

inst_27390:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x887ffff; valaddr_reg:x3; val_offset:82170*0 + 3*510*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82170*0 + 3*510*FLEN/8, x4, x1, x2)

inst_27391:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x88fffff; valaddr_reg:x3; val_offset:82173*0 + 3*511*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82173*0 + 3*511*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_5)

inst_27392:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x89fffff; valaddr_reg:x3; val_offset:82176*0 + 3*512*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82176*0 + 3*512*FLEN/8, x4, x1, x2)

inst_27393:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x8bfffff; valaddr_reg:x3; val_offset:82179*0 + 3*513*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82179*0 + 3*513*FLEN/8, x4, x1, x2)

inst_27394:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x8c00000; valaddr_reg:x3; val_offset:82182*0 + 3*514*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82182*0 + 3*514*FLEN/8, x4, x1, x2)

inst_27395:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x8e00000; valaddr_reg:x3; val_offset:82185*0 + 3*515*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82185*0 + 3*515*FLEN/8, x4, x1, x2)

inst_27396:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x8f00000; valaddr_reg:x3; val_offset:82188*0 + 3*516*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82188*0 + 3*516*FLEN/8, x4, x1, x2)

inst_27397:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x8f80000; valaddr_reg:x3; val_offset:82191*0 + 3*517*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82191*0 + 3*517*FLEN/8, x4, x1, x2)

inst_27398:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x8fc0000; valaddr_reg:x3; val_offset:82194*0 + 3*518*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82194*0 + 3*518*FLEN/8, x4, x1, x2)

inst_27399:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x8fe0000; valaddr_reg:x3; val_offset:82197*0 + 3*519*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82197*0 + 3*519*FLEN/8, x4, x1, x2)

inst_27400:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x8ff0000; valaddr_reg:x3; val_offset:82200*0 + 3*520*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82200*0 + 3*520*FLEN/8, x4, x1, x2)

inst_27401:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x8ff8000; valaddr_reg:x3; val_offset:82203*0 + 3*521*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82203*0 + 3*521*FLEN/8, x4, x1, x2)

inst_27402:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x8ffc000; valaddr_reg:x3; val_offset:82206*0 + 3*522*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82206*0 + 3*522*FLEN/8, x4, x1, x2)

inst_27403:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x8ffe000; valaddr_reg:x3; val_offset:82209*0 + 3*523*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82209*0 + 3*523*FLEN/8, x4, x1, x2)

inst_27404:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x8fff000; valaddr_reg:x3; val_offset:82212*0 + 3*524*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82212*0 + 3*524*FLEN/8, x4, x1, x2)

inst_27405:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x8fff800; valaddr_reg:x3; val_offset:82215*0 + 3*525*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82215*0 + 3*525*FLEN/8, x4, x1, x2)

inst_27406:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x8fffc00; valaddr_reg:x3; val_offset:82218*0 + 3*526*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82218*0 + 3*526*FLEN/8, x4, x1, x2)

inst_27407:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x8fffe00; valaddr_reg:x3; val_offset:82221*0 + 3*527*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82221*0 + 3*527*FLEN/8, x4, x1, x2)

inst_27408:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x8ffff00; valaddr_reg:x3; val_offset:82224*0 + 3*528*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82224*0 + 3*528*FLEN/8, x4, x1, x2)

inst_27409:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x8ffff80; valaddr_reg:x3; val_offset:82227*0 + 3*529*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82227*0 + 3*529*FLEN/8, x4, x1, x2)

inst_27410:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x8ffffc0; valaddr_reg:x3; val_offset:82230*0 + 3*530*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82230*0 + 3*530*FLEN/8, x4, x1, x2)

inst_27411:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x8ffffe0; valaddr_reg:x3; val_offset:82233*0 + 3*531*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82233*0 + 3*531*FLEN/8, x4, x1, x2)

inst_27412:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x8fffff0; valaddr_reg:x3; val_offset:82236*0 + 3*532*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82236*0 + 3*532*FLEN/8, x4, x1, x2)

inst_27413:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x8fffff8; valaddr_reg:x3; val_offset:82239*0 + 3*533*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82239*0 + 3*533*FLEN/8, x4, x1, x2)

inst_27414:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x8fffffc; valaddr_reg:x3; val_offset:82242*0 + 3*534*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82242*0 + 3*534*FLEN/8, x4, x1, x2)

inst_27415:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x8fffffe; valaddr_reg:x3; val_offset:82245*0 + 3*535*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82245*0 + 3*535*FLEN/8, x4, x1, x2)

inst_27416:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a27fc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a27fc; op2val:0x0;
op3val:0x8ffffff; valaddr_reg:x3; val_offset:82248*0 + 3*536*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82248*0 + 3*536*FLEN/8, x4, x1, x2)

inst_27417:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x800001; valaddr_reg:x3; val_offset:82251*0 + 3*537*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82251*0 + 3*537*FLEN/8, x4, x1, x2)

inst_27418:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x800003; valaddr_reg:x3; val_offset:82254*0 + 3*538*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82254*0 + 3*538*FLEN/8, x4, x1, x2)

inst_27419:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x800007; valaddr_reg:x3; val_offset:82257*0 + 3*539*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82257*0 + 3*539*FLEN/8, x4, x1, x2)

inst_27420:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x999999; valaddr_reg:x3; val_offset:82260*0 + 3*540*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82260*0 + 3*540*FLEN/8, x4, x1, x2)

inst_27421:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0xa49249; valaddr_reg:x3; val_offset:82263*0 + 3*541*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82263*0 + 3*541*FLEN/8, x4, x1, x2)

inst_27422:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0xb33333; valaddr_reg:x3; val_offset:82266*0 + 3*542*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82266*0 + 3*542*FLEN/8, x4, x1, x2)

inst_27423:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0xb6db6d; valaddr_reg:x3; val_offset:82269*0 + 3*543*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82269*0 + 3*543*FLEN/8, x4, x1, x2)

inst_27424:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0xbbbbbb; valaddr_reg:x3; val_offset:82272*0 + 3*544*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82272*0 + 3*544*FLEN/8, x4, x1, x2)

inst_27425:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0xc44444; valaddr_reg:x3; val_offset:82275*0 + 3*545*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82275*0 + 3*545*FLEN/8, x4, x1, x2)

inst_27426:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0xcccccc; valaddr_reg:x3; val_offset:82278*0 + 3*546*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82278*0 + 3*546*FLEN/8, x4, x1, x2)

inst_27427:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0xdb6db6; valaddr_reg:x3; val_offset:82281*0 + 3*547*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82281*0 + 3*547*FLEN/8, x4, x1, x2)

inst_27428:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0xe66666; valaddr_reg:x3; val_offset:82284*0 + 3*548*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82284*0 + 3*548*FLEN/8, x4, x1, x2)

inst_27429:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0xedb6db; valaddr_reg:x3; val_offset:82287*0 + 3*549*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82287*0 + 3*549*FLEN/8, x4, x1, x2)

inst_27430:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0xfffff8; valaddr_reg:x3; val_offset:82290*0 + 3*550*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82290*0 + 3*550*FLEN/8, x4, x1, x2)

inst_27431:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0xfffffc; valaddr_reg:x3; val_offset:82293*0 + 3*551*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82293*0 + 3*551*FLEN/8, x4, x1, x2)

inst_27432:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0xfffffe; valaddr_reg:x3; val_offset:82296*0 + 3*552*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82296*0 + 3*552*FLEN/8, x4, x1, x2)

inst_27433:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x7800000; valaddr_reg:x3; val_offset:82299*0 + 3*553*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82299*0 + 3*553*FLEN/8, x4, x1, x2)

inst_27434:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x7800001; valaddr_reg:x3; val_offset:82302*0 + 3*554*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82302*0 + 3*554*FLEN/8, x4, x1, x2)

inst_27435:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x7800003; valaddr_reg:x3; val_offset:82305*0 + 3*555*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82305*0 + 3*555*FLEN/8, x4, x1, x2)

inst_27436:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x7800007; valaddr_reg:x3; val_offset:82308*0 + 3*556*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82308*0 + 3*556*FLEN/8, x4, x1, x2)

inst_27437:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x780000f; valaddr_reg:x3; val_offset:82311*0 + 3*557*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82311*0 + 3*557*FLEN/8, x4, x1, x2)

inst_27438:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x780001f; valaddr_reg:x3; val_offset:82314*0 + 3*558*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82314*0 + 3*558*FLEN/8, x4, x1, x2)

inst_27439:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x780003f; valaddr_reg:x3; val_offset:82317*0 + 3*559*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82317*0 + 3*559*FLEN/8, x4, x1, x2)

inst_27440:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x780007f; valaddr_reg:x3; val_offset:82320*0 + 3*560*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82320*0 + 3*560*FLEN/8, x4, x1, x2)

inst_27441:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x78000ff; valaddr_reg:x3; val_offset:82323*0 + 3*561*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82323*0 + 3*561*FLEN/8, x4, x1, x2)

inst_27442:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x78001ff; valaddr_reg:x3; val_offset:82326*0 + 3*562*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82326*0 + 3*562*FLEN/8, x4, x1, x2)

inst_27443:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x78003ff; valaddr_reg:x3; val_offset:82329*0 + 3*563*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82329*0 + 3*563*FLEN/8, x4, x1, x2)

inst_27444:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x78007ff; valaddr_reg:x3; val_offset:82332*0 + 3*564*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82332*0 + 3*564*FLEN/8, x4, x1, x2)

inst_27445:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x7800fff; valaddr_reg:x3; val_offset:82335*0 + 3*565*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82335*0 + 3*565*FLEN/8, x4, x1, x2)

inst_27446:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x7801fff; valaddr_reg:x3; val_offset:82338*0 + 3*566*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82338*0 + 3*566*FLEN/8, x4, x1, x2)

inst_27447:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x7803fff; valaddr_reg:x3; val_offset:82341*0 + 3*567*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82341*0 + 3*567*FLEN/8, x4, x1, x2)

inst_27448:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x7807fff; valaddr_reg:x3; val_offset:82344*0 + 3*568*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82344*0 + 3*568*FLEN/8, x4, x1, x2)

inst_27449:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x780ffff; valaddr_reg:x3; val_offset:82347*0 + 3*569*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82347*0 + 3*569*FLEN/8, x4, x1, x2)

inst_27450:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x781ffff; valaddr_reg:x3; val_offset:82350*0 + 3*570*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82350*0 + 3*570*FLEN/8, x4, x1, x2)

inst_27451:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x783ffff; valaddr_reg:x3; val_offset:82353*0 + 3*571*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82353*0 + 3*571*FLEN/8, x4, x1, x2)

inst_27452:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x787ffff; valaddr_reg:x3; val_offset:82356*0 + 3*572*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82356*0 + 3*572*FLEN/8, x4, x1, x2)

inst_27453:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x78fffff; valaddr_reg:x3; val_offset:82359*0 + 3*573*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82359*0 + 3*573*FLEN/8, x4, x1, x2)

inst_27454:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x79fffff; valaddr_reg:x3; val_offset:82362*0 + 3*574*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82362*0 + 3*574*FLEN/8, x4, x1, x2)

inst_27455:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x7bfffff; valaddr_reg:x3; val_offset:82365*0 + 3*575*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82365*0 + 3*575*FLEN/8, x4, x1, x2)

inst_27456:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x7c00000; valaddr_reg:x3; val_offset:82368*0 + 3*576*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82368*0 + 3*576*FLEN/8, x4, x1, x2)

inst_27457:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x7e00000; valaddr_reg:x3; val_offset:82371*0 + 3*577*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82371*0 + 3*577*FLEN/8, x4, x1, x2)

inst_27458:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x7f00000; valaddr_reg:x3; val_offset:82374*0 + 3*578*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82374*0 + 3*578*FLEN/8, x4, x1, x2)

inst_27459:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x7f80000; valaddr_reg:x3; val_offset:82377*0 + 3*579*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82377*0 + 3*579*FLEN/8, x4, x1, x2)

inst_27460:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x7fc0000; valaddr_reg:x3; val_offset:82380*0 + 3*580*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82380*0 + 3*580*FLEN/8, x4, x1, x2)

inst_27461:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x7fe0000; valaddr_reg:x3; val_offset:82383*0 + 3*581*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82383*0 + 3*581*FLEN/8, x4, x1, x2)

inst_27462:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x7ff0000; valaddr_reg:x3; val_offset:82386*0 + 3*582*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82386*0 + 3*582*FLEN/8, x4, x1, x2)

inst_27463:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x7ff8000; valaddr_reg:x3; val_offset:82389*0 + 3*583*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82389*0 + 3*583*FLEN/8, x4, x1, x2)

inst_27464:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x7ffc000; valaddr_reg:x3; val_offset:82392*0 + 3*584*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82392*0 + 3*584*FLEN/8, x4, x1, x2)

inst_27465:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x7ffe000; valaddr_reg:x3; val_offset:82395*0 + 3*585*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82395*0 + 3*585*FLEN/8, x4, x1, x2)

inst_27466:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x7fff000; valaddr_reg:x3; val_offset:82398*0 + 3*586*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82398*0 + 3*586*FLEN/8, x4, x1, x2)

inst_27467:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x7fff800; valaddr_reg:x3; val_offset:82401*0 + 3*587*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82401*0 + 3*587*FLEN/8, x4, x1, x2)

inst_27468:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x7fffc00; valaddr_reg:x3; val_offset:82404*0 + 3*588*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82404*0 + 3*588*FLEN/8, x4, x1, x2)

inst_27469:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x7fffe00; valaddr_reg:x3; val_offset:82407*0 + 3*589*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82407*0 + 3*589*FLEN/8, x4, x1, x2)

inst_27470:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x7ffff00; valaddr_reg:x3; val_offset:82410*0 + 3*590*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82410*0 + 3*590*FLEN/8, x4, x1, x2)

inst_27471:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x7ffff80; valaddr_reg:x3; val_offset:82413*0 + 3*591*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82413*0 + 3*591*FLEN/8, x4, x1, x2)

inst_27472:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x7ffffc0; valaddr_reg:x3; val_offset:82416*0 + 3*592*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82416*0 + 3*592*FLEN/8, x4, x1, x2)

inst_27473:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x7ffffe0; valaddr_reg:x3; val_offset:82419*0 + 3*593*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82419*0 + 3*593*FLEN/8, x4, x1, x2)

inst_27474:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x7fffff0; valaddr_reg:x3; val_offset:82422*0 + 3*594*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82422*0 + 3*594*FLEN/8, x4, x1, x2)

inst_27475:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x7fffff8; valaddr_reg:x3; val_offset:82425*0 + 3*595*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82425*0 + 3*595*FLEN/8, x4, x1, x2)

inst_27476:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x7fffffc; valaddr_reg:x3; val_offset:82428*0 + 3*596*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82428*0 + 3*596*FLEN/8, x4, x1, x2)

inst_27477:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x7fffffe; valaddr_reg:x3; val_offset:82431*0 + 3*597*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82431*0 + 3*597*FLEN/8, x4, x1, x2)

inst_27478:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a40d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a40d6; op2val:0x0;
op3val:0x7ffffff; valaddr_reg:x3; val_offset:82434*0 + 3*598*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82434*0 + 3*598*FLEN/8, x4, x1, x2)

inst_27479:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xed800000; valaddr_reg:x3; val_offset:82437*0 + 3*599*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82437*0 + 3*599*FLEN/8, x4, x1, x2)

inst_27480:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xed800001; valaddr_reg:x3; val_offset:82440*0 + 3*600*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82440*0 + 3*600*FLEN/8, x4, x1, x2)

inst_27481:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xed800003; valaddr_reg:x3; val_offset:82443*0 + 3*601*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82443*0 + 3*601*FLEN/8, x4, x1, x2)

inst_27482:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xed800007; valaddr_reg:x3; val_offset:82446*0 + 3*602*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82446*0 + 3*602*FLEN/8, x4, x1, x2)

inst_27483:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xed80000f; valaddr_reg:x3; val_offset:82449*0 + 3*603*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82449*0 + 3*603*FLEN/8, x4, x1, x2)

inst_27484:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xed80001f; valaddr_reg:x3; val_offset:82452*0 + 3*604*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82452*0 + 3*604*FLEN/8, x4, x1, x2)

inst_27485:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xed80003f; valaddr_reg:x3; val_offset:82455*0 + 3*605*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82455*0 + 3*605*FLEN/8, x4, x1, x2)

inst_27486:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xed80007f; valaddr_reg:x3; val_offset:82458*0 + 3*606*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82458*0 + 3*606*FLEN/8, x4, x1, x2)

inst_27487:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xed8000ff; valaddr_reg:x3; val_offset:82461*0 + 3*607*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82461*0 + 3*607*FLEN/8, x4, x1, x2)

inst_27488:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xed8001ff; valaddr_reg:x3; val_offset:82464*0 + 3*608*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82464*0 + 3*608*FLEN/8, x4, x1, x2)

inst_27489:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xed8003ff; valaddr_reg:x3; val_offset:82467*0 + 3*609*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82467*0 + 3*609*FLEN/8, x4, x1, x2)

inst_27490:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xed8007ff; valaddr_reg:x3; val_offset:82470*0 + 3*610*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82470*0 + 3*610*FLEN/8, x4, x1, x2)

inst_27491:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xed800fff; valaddr_reg:x3; val_offset:82473*0 + 3*611*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82473*0 + 3*611*FLEN/8, x4, x1, x2)

inst_27492:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xed801fff; valaddr_reg:x3; val_offset:82476*0 + 3*612*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82476*0 + 3*612*FLEN/8, x4, x1, x2)

inst_27493:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xed803fff; valaddr_reg:x3; val_offset:82479*0 + 3*613*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82479*0 + 3*613*FLEN/8, x4, x1, x2)

inst_27494:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xed807fff; valaddr_reg:x3; val_offset:82482*0 + 3*614*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82482*0 + 3*614*FLEN/8, x4, x1, x2)

inst_27495:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xed80ffff; valaddr_reg:x3; val_offset:82485*0 + 3*615*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82485*0 + 3*615*FLEN/8, x4, x1, x2)

inst_27496:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xed81ffff; valaddr_reg:x3; val_offset:82488*0 + 3*616*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82488*0 + 3*616*FLEN/8, x4, x1, x2)

inst_27497:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xed83ffff; valaddr_reg:x3; val_offset:82491*0 + 3*617*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82491*0 + 3*617*FLEN/8, x4, x1, x2)

inst_27498:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xed87ffff; valaddr_reg:x3; val_offset:82494*0 + 3*618*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82494*0 + 3*618*FLEN/8, x4, x1, x2)

inst_27499:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xed8fffff; valaddr_reg:x3; val_offset:82497*0 + 3*619*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82497*0 + 3*619*FLEN/8, x4, x1, x2)

inst_27500:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xed9fffff; valaddr_reg:x3; val_offset:82500*0 + 3*620*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82500*0 + 3*620*FLEN/8, x4, x1, x2)

inst_27501:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xedbfffff; valaddr_reg:x3; val_offset:82503*0 + 3*621*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82503*0 + 3*621*FLEN/8, x4, x1, x2)

inst_27502:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xedc00000; valaddr_reg:x3; val_offset:82506*0 + 3*622*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82506*0 + 3*622*FLEN/8, x4, x1, x2)

inst_27503:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xede00000; valaddr_reg:x3; val_offset:82509*0 + 3*623*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82509*0 + 3*623*FLEN/8, x4, x1, x2)

inst_27504:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xedf00000; valaddr_reg:x3; val_offset:82512*0 + 3*624*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82512*0 + 3*624*FLEN/8, x4, x1, x2)

inst_27505:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xedf80000; valaddr_reg:x3; val_offset:82515*0 + 3*625*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82515*0 + 3*625*FLEN/8, x4, x1, x2)

inst_27506:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xedfc0000; valaddr_reg:x3; val_offset:82518*0 + 3*626*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82518*0 + 3*626*FLEN/8, x4, x1, x2)

inst_27507:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xedfe0000; valaddr_reg:x3; val_offset:82521*0 + 3*627*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82521*0 + 3*627*FLEN/8, x4, x1, x2)

inst_27508:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xedff0000; valaddr_reg:x3; val_offset:82524*0 + 3*628*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82524*0 + 3*628*FLEN/8, x4, x1, x2)

inst_27509:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xedff8000; valaddr_reg:x3; val_offset:82527*0 + 3*629*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82527*0 + 3*629*FLEN/8, x4, x1, x2)

inst_27510:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xedffc000; valaddr_reg:x3; val_offset:82530*0 + 3*630*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82530*0 + 3*630*FLEN/8, x4, x1, x2)

inst_27511:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xedffe000; valaddr_reg:x3; val_offset:82533*0 + 3*631*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82533*0 + 3*631*FLEN/8, x4, x1, x2)

inst_27512:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xedfff000; valaddr_reg:x3; val_offset:82536*0 + 3*632*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82536*0 + 3*632*FLEN/8, x4, x1, x2)

inst_27513:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xedfff800; valaddr_reg:x3; val_offset:82539*0 + 3*633*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82539*0 + 3*633*FLEN/8, x4, x1, x2)

inst_27514:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xedfffc00; valaddr_reg:x3; val_offset:82542*0 + 3*634*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82542*0 + 3*634*FLEN/8, x4, x1, x2)

inst_27515:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xedfffe00; valaddr_reg:x3; val_offset:82545*0 + 3*635*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82545*0 + 3*635*FLEN/8, x4, x1, x2)

inst_27516:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xedffff00; valaddr_reg:x3; val_offset:82548*0 + 3*636*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82548*0 + 3*636*FLEN/8, x4, x1, x2)

inst_27517:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xedffff80; valaddr_reg:x3; val_offset:82551*0 + 3*637*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82551*0 + 3*637*FLEN/8, x4, x1, x2)

inst_27518:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xedffffc0; valaddr_reg:x3; val_offset:82554*0 + 3*638*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82554*0 + 3*638*FLEN/8, x4, x1, x2)

inst_27519:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xedffffe0; valaddr_reg:x3; val_offset:82557*0 + 3*639*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82557*0 + 3*639*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_6)

inst_27520:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xedfffff0; valaddr_reg:x3; val_offset:82560*0 + 3*640*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82560*0 + 3*640*FLEN/8, x4, x1, x2)

inst_27521:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xedfffff8; valaddr_reg:x3; val_offset:82563*0 + 3*641*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82563*0 + 3*641*FLEN/8, x4, x1, x2)

inst_27522:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xedfffffc; valaddr_reg:x3; val_offset:82566*0 + 3*642*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82566*0 + 3*642*FLEN/8, x4, x1, x2)

inst_27523:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xedfffffe; valaddr_reg:x3; val_offset:82569*0 + 3*643*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82569*0 + 3*643*FLEN/8, x4, x1, x2)

inst_27524:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xedffffff; valaddr_reg:x3; val_offset:82572*0 + 3*644*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82572*0 + 3*644*FLEN/8, x4, x1, x2)

inst_27525:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xff000001; valaddr_reg:x3; val_offset:82575*0 + 3*645*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82575*0 + 3*645*FLEN/8, x4, x1, x2)

inst_27526:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xff000003; valaddr_reg:x3; val_offset:82578*0 + 3*646*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82578*0 + 3*646*FLEN/8, x4, x1, x2)

inst_27527:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xff000007; valaddr_reg:x3; val_offset:82581*0 + 3*647*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82581*0 + 3*647*FLEN/8, x4, x1, x2)

inst_27528:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xff199999; valaddr_reg:x3; val_offset:82584*0 + 3*648*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82584*0 + 3*648*FLEN/8, x4, x1, x2)

inst_27529:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xff249249; valaddr_reg:x3; val_offset:82587*0 + 3*649*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82587*0 + 3*649*FLEN/8, x4, x1, x2)

inst_27530:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xff333333; valaddr_reg:x3; val_offset:82590*0 + 3*650*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82590*0 + 3*650*FLEN/8, x4, x1, x2)

inst_27531:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xff36db6d; valaddr_reg:x3; val_offset:82593*0 + 3*651*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82593*0 + 3*651*FLEN/8, x4, x1, x2)

inst_27532:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:82596*0 + 3*652*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82596*0 + 3*652*FLEN/8, x4, x1, x2)

inst_27533:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xff444444; valaddr_reg:x3; val_offset:82599*0 + 3*653*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82599*0 + 3*653*FLEN/8, x4, x1, x2)

inst_27534:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xff4ccccc; valaddr_reg:x3; val_offset:82602*0 + 3*654*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82602*0 + 3*654*FLEN/8, x4, x1, x2)

inst_27535:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xff5b6db6; valaddr_reg:x3; val_offset:82605*0 + 3*655*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82605*0 + 3*655*FLEN/8, x4, x1, x2)

inst_27536:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xff666666; valaddr_reg:x3; val_offset:82608*0 + 3*656*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82608*0 + 3*656*FLEN/8, x4, x1, x2)

inst_27537:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xff6db6db; valaddr_reg:x3; val_offset:82611*0 + 3*657*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82611*0 + 3*657*FLEN/8, x4, x1, x2)

inst_27538:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xff7ffff8; valaddr_reg:x3; val_offset:82614*0 + 3*658*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82614*0 + 3*658*FLEN/8, x4, x1, x2)

inst_27539:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xff7ffffc; valaddr_reg:x3; val_offset:82617*0 + 3*659*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82617*0 + 3*659*FLEN/8, x4, x1, x2)

inst_27540:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a96d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6c7093 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0a96d6; op2val:0xbfec7093;
op3val:0xff7ffffe; valaddr_reg:x3; val_offset:82620*0 + 3*660*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82620*0 + 3*660*FLEN/8, x4, x1, x2)

inst_27541:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:82623*0 + 3*661*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82623*0 + 3*661*FLEN/8, x4, x1, x2)

inst_27542:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:82626*0 + 3*662*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82626*0 + 3*662*FLEN/8, x4, x1, x2)

inst_27543:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:82629*0 + 3*663*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82629*0 + 3*663*FLEN/8, x4, x1, x2)

inst_27544:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x199999; valaddr_reg:x3; val_offset:82632*0 + 3*664*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82632*0 + 3*664*FLEN/8, x4, x1, x2)

inst_27545:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x249249; valaddr_reg:x3; val_offset:82635*0 + 3*665*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82635*0 + 3*665*FLEN/8, x4, x1, x2)

inst_27546:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x333333; valaddr_reg:x3; val_offset:82638*0 + 3*666*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82638*0 + 3*666*FLEN/8, x4, x1, x2)

inst_27547:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x36db6d; valaddr_reg:x3; val_offset:82641*0 + 3*667*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82641*0 + 3*667*FLEN/8, x4, x1, x2)

inst_27548:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x3bbbbb; valaddr_reg:x3; val_offset:82644*0 + 3*668*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82644*0 + 3*668*FLEN/8, x4, x1, x2)

inst_27549:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x444444; valaddr_reg:x3; val_offset:82647*0 + 3*669*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82647*0 + 3*669*FLEN/8, x4, x1, x2)

inst_27550:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x4ccccc; valaddr_reg:x3; val_offset:82650*0 + 3*670*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82650*0 + 3*670*FLEN/8, x4, x1, x2)

inst_27551:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x5b6db6; valaddr_reg:x3; val_offset:82653*0 + 3*671*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82653*0 + 3*671*FLEN/8, x4, x1, x2)

inst_27552:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x666666; valaddr_reg:x3; val_offset:82656*0 + 3*672*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82656*0 + 3*672*FLEN/8, x4, x1, x2)

inst_27553:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x6db6db; valaddr_reg:x3; val_offset:82659*0 + 3*673*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82659*0 + 3*673*FLEN/8, x4, x1, x2)

inst_27554:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x7ffff8; valaddr_reg:x3; val_offset:82662*0 + 3*674*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82662*0 + 3*674*FLEN/8, x4, x1, x2)

inst_27555:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x7ffffc; valaddr_reg:x3; val_offset:82665*0 + 3*675*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82665*0 + 3*675*FLEN/8, x4, x1, x2)

inst_27556:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x7ffffe; valaddr_reg:x3; val_offset:82668*0 + 3*676*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82668*0 + 3*676*FLEN/8, x4, x1, x2)

inst_27557:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x5800000; valaddr_reg:x3; val_offset:82671*0 + 3*677*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82671*0 + 3*677*FLEN/8, x4, x1, x2)

inst_27558:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x5800001; valaddr_reg:x3; val_offset:82674*0 + 3*678*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82674*0 + 3*678*FLEN/8, x4, x1, x2)

inst_27559:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x5800003; valaddr_reg:x3; val_offset:82677*0 + 3*679*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82677*0 + 3*679*FLEN/8, x4, x1, x2)

inst_27560:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x5800007; valaddr_reg:x3; val_offset:82680*0 + 3*680*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82680*0 + 3*680*FLEN/8, x4, x1, x2)

inst_27561:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x580000f; valaddr_reg:x3; val_offset:82683*0 + 3*681*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82683*0 + 3*681*FLEN/8, x4, x1, x2)

inst_27562:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x580001f; valaddr_reg:x3; val_offset:82686*0 + 3*682*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82686*0 + 3*682*FLEN/8, x4, x1, x2)

inst_27563:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x580003f; valaddr_reg:x3; val_offset:82689*0 + 3*683*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82689*0 + 3*683*FLEN/8, x4, x1, x2)

inst_27564:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x580007f; valaddr_reg:x3; val_offset:82692*0 + 3*684*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82692*0 + 3*684*FLEN/8, x4, x1, x2)

inst_27565:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x58000ff; valaddr_reg:x3; val_offset:82695*0 + 3*685*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82695*0 + 3*685*FLEN/8, x4, x1, x2)

inst_27566:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x58001ff; valaddr_reg:x3; val_offset:82698*0 + 3*686*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82698*0 + 3*686*FLEN/8, x4, x1, x2)

inst_27567:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x58003ff; valaddr_reg:x3; val_offset:82701*0 + 3*687*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82701*0 + 3*687*FLEN/8, x4, x1, x2)

inst_27568:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x58007ff; valaddr_reg:x3; val_offset:82704*0 + 3*688*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82704*0 + 3*688*FLEN/8, x4, x1, x2)

inst_27569:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x5800fff; valaddr_reg:x3; val_offset:82707*0 + 3*689*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82707*0 + 3*689*FLEN/8, x4, x1, x2)

inst_27570:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x5801fff; valaddr_reg:x3; val_offset:82710*0 + 3*690*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82710*0 + 3*690*FLEN/8, x4, x1, x2)

inst_27571:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x5803fff; valaddr_reg:x3; val_offset:82713*0 + 3*691*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82713*0 + 3*691*FLEN/8, x4, x1, x2)

inst_27572:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x5807fff; valaddr_reg:x3; val_offset:82716*0 + 3*692*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82716*0 + 3*692*FLEN/8, x4, x1, x2)

inst_27573:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x580ffff; valaddr_reg:x3; val_offset:82719*0 + 3*693*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82719*0 + 3*693*FLEN/8, x4, x1, x2)

inst_27574:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x581ffff; valaddr_reg:x3; val_offset:82722*0 + 3*694*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82722*0 + 3*694*FLEN/8, x4, x1, x2)

inst_27575:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x583ffff; valaddr_reg:x3; val_offset:82725*0 + 3*695*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82725*0 + 3*695*FLEN/8, x4, x1, x2)

inst_27576:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x587ffff; valaddr_reg:x3; val_offset:82728*0 + 3*696*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82728*0 + 3*696*FLEN/8, x4, x1, x2)

inst_27577:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x58fffff; valaddr_reg:x3; val_offset:82731*0 + 3*697*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82731*0 + 3*697*FLEN/8, x4, x1, x2)

inst_27578:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x59fffff; valaddr_reg:x3; val_offset:82734*0 + 3*698*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82734*0 + 3*698*FLEN/8, x4, x1, x2)

inst_27579:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x5bfffff; valaddr_reg:x3; val_offset:82737*0 + 3*699*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82737*0 + 3*699*FLEN/8, x4, x1, x2)

inst_27580:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x5c00000; valaddr_reg:x3; val_offset:82740*0 + 3*700*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82740*0 + 3*700*FLEN/8, x4, x1, x2)

inst_27581:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x5e00000; valaddr_reg:x3; val_offset:82743*0 + 3*701*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82743*0 + 3*701*FLEN/8, x4, x1, x2)

inst_27582:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x5f00000; valaddr_reg:x3; val_offset:82746*0 + 3*702*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82746*0 + 3*702*FLEN/8, x4, x1, x2)

inst_27583:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x5f80000; valaddr_reg:x3; val_offset:82749*0 + 3*703*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82749*0 + 3*703*FLEN/8, x4, x1, x2)

inst_27584:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x5fc0000; valaddr_reg:x3; val_offset:82752*0 + 3*704*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82752*0 + 3*704*FLEN/8, x4, x1, x2)

inst_27585:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x5fe0000; valaddr_reg:x3; val_offset:82755*0 + 3*705*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82755*0 + 3*705*FLEN/8, x4, x1, x2)

inst_27586:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x5ff0000; valaddr_reg:x3; val_offset:82758*0 + 3*706*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82758*0 + 3*706*FLEN/8, x4, x1, x2)

inst_27587:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x5ff8000; valaddr_reg:x3; val_offset:82761*0 + 3*707*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82761*0 + 3*707*FLEN/8, x4, x1, x2)

inst_27588:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x5ffc000; valaddr_reg:x3; val_offset:82764*0 + 3*708*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82764*0 + 3*708*FLEN/8, x4, x1, x2)

inst_27589:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x5ffe000; valaddr_reg:x3; val_offset:82767*0 + 3*709*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82767*0 + 3*709*FLEN/8, x4, x1, x2)

inst_27590:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x5fff000; valaddr_reg:x3; val_offset:82770*0 + 3*710*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82770*0 + 3*710*FLEN/8, x4, x1, x2)

inst_27591:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x5fff800; valaddr_reg:x3; val_offset:82773*0 + 3*711*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82773*0 + 3*711*FLEN/8, x4, x1, x2)

inst_27592:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x5fffc00; valaddr_reg:x3; val_offset:82776*0 + 3*712*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82776*0 + 3*712*FLEN/8, x4, x1, x2)

inst_27593:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x5fffe00; valaddr_reg:x3; val_offset:82779*0 + 3*713*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82779*0 + 3*713*FLEN/8, x4, x1, x2)

inst_27594:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x5ffff00; valaddr_reg:x3; val_offset:82782*0 + 3*714*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82782*0 + 3*714*FLEN/8, x4, x1, x2)

inst_27595:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x5ffff80; valaddr_reg:x3; val_offset:82785*0 + 3*715*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82785*0 + 3*715*FLEN/8, x4, x1, x2)

inst_27596:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x5ffffc0; valaddr_reg:x3; val_offset:82788*0 + 3*716*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82788*0 + 3*716*FLEN/8, x4, x1, x2)

inst_27597:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x5ffffe0; valaddr_reg:x3; val_offset:82791*0 + 3*717*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82791*0 + 3*717*FLEN/8, x4, x1, x2)

inst_27598:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x5fffff0; valaddr_reg:x3; val_offset:82794*0 + 3*718*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82794*0 + 3*718*FLEN/8, x4, x1, x2)

inst_27599:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x5fffff8; valaddr_reg:x3; val_offset:82797*0 + 3*719*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82797*0 + 3*719*FLEN/8, x4, x1, x2)

inst_27600:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x5fffffc; valaddr_reg:x3; val_offset:82800*0 + 3*720*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82800*0 + 3*720*FLEN/8, x4, x1, x2)

inst_27601:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x5fffffe; valaddr_reg:x3; val_offset:82803*0 + 3*721*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82803*0 + 3*721*FLEN/8, x4, x1, x2)

inst_27602:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ad17d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ad17d; op2val:0x0;
op3val:0x5ffffff; valaddr_reg:x3; val_offset:82806*0 + 3*722*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82806*0 + 3*722*FLEN/8, x4, x1, x2)

inst_27603:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb5000000; valaddr_reg:x3; val_offset:82809*0 + 3*723*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82809*0 + 3*723*FLEN/8, x4, x1, x2)

inst_27604:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb5000001; valaddr_reg:x3; val_offset:82812*0 + 3*724*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82812*0 + 3*724*FLEN/8, x4, x1, x2)

inst_27605:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb5000003; valaddr_reg:x3; val_offset:82815*0 + 3*725*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82815*0 + 3*725*FLEN/8, x4, x1, x2)

inst_27606:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb5000007; valaddr_reg:x3; val_offset:82818*0 + 3*726*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82818*0 + 3*726*FLEN/8, x4, x1, x2)

inst_27607:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb500000f; valaddr_reg:x3; val_offset:82821*0 + 3*727*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82821*0 + 3*727*FLEN/8, x4, x1, x2)

inst_27608:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb500001f; valaddr_reg:x3; val_offset:82824*0 + 3*728*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82824*0 + 3*728*FLEN/8, x4, x1, x2)

inst_27609:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb500003f; valaddr_reg:x3; val_offset:82827*0 + 3*729*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82827*0 + 3*729*FLEN/8, x4, x1, x2)

inst_27610:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb500007f; valaddr_reg:x3; val_offset:82830*0 + 3*730*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82830*0 + 3*730*FLEN/8, x4, x1, x2)

inst_27611:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb50000ff; valaddr_reg:x3; val_offset:82833*0 + 3*731*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82833*0 + 3*731*FLEN/8, x4, x1, x2)

inst_27612:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb50001ff; valaddr_reg:x3; val_offset:82836*0 + 3*732*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82836*0 + 3*732*FLEN/8, x4, x1, x2)

inst_27613:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb50003ff; valaddr_reg:x3; val_offset:82839*0 + 3*733*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82839*0 + 3*733*FLEN/8, x4, x1, x2)

inst_27614:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb50007ff; valaddr_reg:x3; val_offset:82842*0 + 3*734*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82842*0 + 3*734*FLEN/8, x4, x1, x2)

inst_27615:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb5000fff; valaddr_reg:x3; val_offset:82845*0 + 3*735*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82845*0 + 3*735*FLEN/8, x4, x1, x2)

inst_27616:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb5001fff; valaddr_reg:x3; val_offset:82848*0 + 3*736*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82848*0 + 3*736*FLEN/8, x4, x1, x2)

inst_27617:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb5003fff; valaddr_reg:x3; val_offset:82851*0 + 3*737*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82851*0 + 3*737*FLEN/8, x4, x1, x2)

inst_27618:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb5007fff; valaddr_reg:x3; val_offset:82854*0 + 3*738*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82854*0 + 3*738*FLEN/8, x4, x1, x2)

inst_27619:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb500ffff; valaddr_reg:x3; val_offset:82857*0 + 3*739*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82857*0 + 3*739*FLEN/8, x4, x1, x2)

inst_27620:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb501ffff; valaddr_reg:x3; val_offset:82860*0 + 3*740*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82860*0 + 3*740*FLEN/8, x4, x1, x2)

inst_27621:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb503ffff; valaddr_reg:x3; val_offset:82863*0 + 3*741*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82863*0 + 3*741*FLEN/8, x4, x1, x2)

inst_27622:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb507ffff; valaddr_reg:x3; val_offset:82866*0 + 3*742*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82866*0 + 3*742*FLEN/8, x4, x1, x2)

inst_27623:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb50fffff; valaddr_reg:x3; val_offset:82869*0 + 3*743*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82869*0 + 3*743*FLEN/8, x4, x1, x2)

inst_27624:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb51fffff; valaddr_reg:x3; val_offset:82872*0 + 3*744*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82872*0 + 3*744*FLEN/8, x4, x1, x2)

inst_27625:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb53fffff; valaddr_reg:x3; val_offset:82875*0 + 3*745*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82875*0 + 3*745*FLEN/8, x4, x1, x2)

inst_27626:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb5400000; valaddr_reg:x3; val_offset:82878*0 + 3*746*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82878*0 + 3*746*FLEN/8, x4, x1, x2)

inst_27627:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb5600000; valaddr_reg:x3; val_offset:82881*0 + 3*747*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82881*0 + 3*747*FLEN/8, x4, x1, x2)

inst_27628:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb5700000; valaddr_reg:x3; val_offset:82884*0 + 3*748*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82884*0 + 3*748*FLEN/8, x4, x1, x2)

inst_27629:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb5780000; valaddr_reg:x3; val_offset:82887*0 + 3*749*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82887*0 + 3*749*FLEN/8, x4, x1, x2)

inst_27630:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb57c0000; valaddr_reg:x3; val_offset:82890*0 + 3*750*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82890*0 + 3*750*FLEN/8, x4, x1, x2)

inst_27631:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb57e0000; valaddr_reg:x3; val_offset:82893*0 + 3*751*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82893*0 + 3*751*FLEN/8, x4, x1, x2)

inst_27632:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb57f0000; valaddr_reg:x3; val_offset:82896*0 + 3*752*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82896*0 + 3*752*FLEN/8, x4, x1, x2)

inst_27633:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb57f8000; valaddr_reg:x3; val_offset:82899*0 + 3*753*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82899*0 + 3*753*FLEN/8, x4, x1, x2)

inst_27634:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb57fc000; valaddr_reg:x3; val_offset:82902*0 + 3*754*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82902*0 + 3*754*FLEN/8, x4, x1, x2)

inst_27635:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb57fe000; valaddr_reg:x3; val_offset:82905*0 + 3*755*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82905*0 + 3*755*FLEN/8, x4, x1, x2)

inst_27636:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb57ff000; valaddr_reg:x3; val_offset:82908*0 + 3*756*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82908*0 + 3*756*FLEN/8, x4, x1, x2)

inst_27637:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb57ff800; valaddr_reg:x3; val_offset:82911*0 + 3*757*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82911*0 + 3*757*FLEN/8, x4, x1, x2)

inst_27638:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb57ffc00; valaddr_reg:x3; val_offset:82914*0 + 3*758*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82914*0 + 3*758*FLEN/8, x4, x1, x2)

inst_27639:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb57ffe00; valaddr_reg:x3; val_offset:82917*0 + 3*759*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82917*0 + 3*759*FLEN/8, x4, x1, x2)

inst_27640:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb57fff00; valaddr_reg:x3; val_offset:82920*0 + 3*760*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82920*0 + 3*760*FLEN/8, x4, x1, x2)

inst_27641:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb57fff80; valaddr_reg:x3; val_offset:82923*0 + 3*761*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82923*0 + 3*761*FLEN/8, x4, x1, x2)

inst_27642:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb57fffc0; valaddr_reg:x3; val_offset:82926*0 + 3*762*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82926*0 + 3*762*FLEN/8, x4, x1, x2)

inst_27643:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb57fffe0; valaddr_reg:x3; val_offset:82929*0 + 3*763*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82929*0 + 3*763*FLEN/8, x4, x1, x2)

inst_27644:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb57ffff0; valaddr_reg:x3; val_offset:82932*0 + 3*764*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82932*0 + 3*764*FLEN/8, x4, x1, x2)

inst_27645:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb57ffff8; valaddr_reg:x3; val_offset:82935*0 + 3*765*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82935*0 + 3*765*FLEN/8, x4, x1, x2)

inst_27646:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb57ffffc; valaddr_reg:x3; val_offset:82938*0 + 3*766*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82938*0 + 3*766*FLEN/8, x4, x1, x2)

inst_27647:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0aecaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3af7a0 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0aecaa; op2val:0x803af7a0;
op3val:0xb57ffffe; valaddr_reg:x3; val_offset:82941*0 + 3*767*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82941*0 + 3*767*FLEN/8, x4, x1, x2)
#endif


RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc00001f,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc00003f,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc00007f,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc0000ff,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc0001ff,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc0003ff,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc0007ff,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc000fff,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc001fff,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc003fff,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc007fff,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc00ffff,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc01ffff,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc03ffff,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc07ffff,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc0fffff,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc1fffff,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc3fffff,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc400000,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc600000,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc700000,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc780000,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7c0000,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7e0000,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7f0000,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7f8000,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7fc000,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7fe000,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7ff000,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7ff800,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7ffc00,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7ffe00,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7fff00,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7fff80,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7fffc0,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7fffe0,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7ffff0,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7ffff8,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7ffffc,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7ffffe,32,FLEN)
NAN_BOXED(0x7f086888,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7fffff,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000001,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000003,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000007,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80199999,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80249249,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80333333,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8036db6d,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x803bbbbb,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80444444,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x804ccccc,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x805b6db6,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80666666,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x806db6db,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffff8,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffc,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffe,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f000000,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f000001,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f000003,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f000007,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f00000f,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f00001f,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f00003f,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f00007f,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f0000ff,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f0001ff,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f0003ff,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f0007ff,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f000fff,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f001fff,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f003fff,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f007fff,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f00ffff,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f01ffff,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f03ffff,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f07ffff,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f0fffff,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f1fffff,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f3fffff,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f400000,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f600000,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f700000,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f780000,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7c0000,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7e0000,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7f0000,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7f8000,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7fc000,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7fe000,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7ff000,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7ff800,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7ffc00,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7ffe00,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7fff00,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7fff80,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7fffc0,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7fffe0,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7ffff0,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7ffff8,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7ffffc,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7ffffe,32,FLEN)
NAN_BOXED(0x7f08d74e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7fffff,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800001,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800003,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800007,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x999999,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa49249,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb33333,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb6db6d,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbbbbbb,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc44444,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcccccc,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdb6db6,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe66666,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xedb6db,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffff8,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffc,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffe,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa800000,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa800001,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa800003,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa800007,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa80000f,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa80001f,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa80003f,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa80007f,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa8000ff,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa8001ff,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa8003ff,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa8007ff,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa800fff,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa801fff,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa803fff,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa807fff,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa80ffff,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa81ffff,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa83ffff,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa87ffff,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa8fffff,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa9fffff,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xabfffff,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xac00000,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xae00000,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xaf00000,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xaf80000,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xafc0000,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xafe0000,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xaff0000,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xaff8000,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xaffc000,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xaffe000,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xafff000,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xafff800,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xafffc00,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xafffe00,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xaffff00,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xaffff80,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xaffffc0,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xaffffe0,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xafffff0,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xafffff8,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xafffffc,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xafffffe,32,FLEN)
NAN_BOXED(0x7f090db7,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xaffffff,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x3f800001,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x3f800003,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x3f800007,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x3f999999,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x3fa49249,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x3fb33333,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x3fb6db6d,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x3fbbbbbb,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x3fc44444,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x3fcccccc,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x3fdb6db6,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x3fe66666,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x3fedb6db,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x3ffffff8,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x3ffffffc,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x3ffffffe,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a000000,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a000001,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a000003,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a000007,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a00000f,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a00001f,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a00003f,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a00007f,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a0000ff,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a0001ff,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a0003ff,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a0007ff,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a000fff,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a001fff,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a003fff,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a007fff,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a00ffff,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a01ffff,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a03ffff,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a07ffff,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a0fffff,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a1fffff,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a3fffff,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a400000,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a600000,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a700000,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a780000,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a7c0000,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a7e0000,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a7f0000,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a7f8000,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a7fc000,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a7fe000,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a7ff000,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a7ff800,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a7ffc00,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a7ffe00,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a7fff00,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a7fff80,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a7fffc0,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a7fffe0,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a7ffff0,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a7ffff8,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a7ffffc,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a7ffffe,32,FLEN)
NAN_BOXED(0x7f091003,32,FLEN)
NAN_BOXED(0x3bc4b1,32,FLEN)
NAN_BOXED(0x4a7fffff,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x199999,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x249249,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x333333,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x36db6d,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3bbbbb,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x444444,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ccccc,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5b6db6,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x666666,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6db6db,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff8,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffc,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffe,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3000000,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3000001,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3000003,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3000007,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x300000f,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x300001f,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x300003f,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x300007f,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x30000ff,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x30001ff,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x30003ff,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x30007ff,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3000fff,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3001fff,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3003fff,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3007fff,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x300ffff,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x301ffff,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x303ffff,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x307ffff,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x30fffff,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x31fffff,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x33fffff,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3400000,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3600000,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3700000,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3780000,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x37c0000,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x37e0000,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x37f0000,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x37f8000,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x37fc000,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x37fe000,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x37ff000,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x37ff800,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x37ffc00,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x37ffe00,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x37fff00,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x37fff80,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x37fffc0,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x37fffe0,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x37ffff0,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x37ffff8,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x37ffffc,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x37ffffe,32,FLEN)
NAN_BOXED(0x7f09599c,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x37fffff,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb7800000,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb7800001,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb7800003,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb7800007,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb780000f,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb780001f,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb780003f,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb780007f,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb78000ff,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb78001ff,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb78003ff,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb78007ff,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb7800fff,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb7801fff,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb7803fff,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb7807fff,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb780ffff,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb781ffff,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb783ffff,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb787ffff,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb78fffff,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb79fffff,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb7bfffff,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb7c00000,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb7e00000,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb7f00000,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb7f80000,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb7fc0000,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb7fe0000,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb7ff0000,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb7ff8000,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb7ffc000,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb7ffe000,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb7fff000,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb7fff800,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb7fffc00,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb7fffe00,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb7ffff00,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb7ffff80,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb7ffffc0,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb7ffffe0,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb7fffff0,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb7fffff8,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb7fffffc,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb7fffffe,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xb7ffffff,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7f097520,32,FLEN)
NAN_BOXED(0x803b98ba,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800001,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800003,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800007,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x999999,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa49249,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb33333,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb6db6d,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbbbbbb,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc44444,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcccccc,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdb6db6,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe66666,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xedb6db,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffff8,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffc,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffe,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc800000,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc800001,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc800003,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc800007,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc80000f,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc80001f,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc80003f,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc80007f,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc8000ff,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc8001ff,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc8003ff,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc8007ff,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc800fff,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc801fff,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc803fff,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc807fff,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc80ffff,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc81ffff,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc83ffff,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc87ffff,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc8fffff,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc9fffff,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcbfffff,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcc00000,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xce00000,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcf00000,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcf80000,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcfc0000,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcfe0000,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcff0000,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcff8000,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcffc000,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcffe000,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcfff000,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcfff800,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcfffc00,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcfffe00,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcffff00,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcffff80,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcffffc0,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcffffe0,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcfffff0,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcfffff8,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcfffffc,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcfffffe,32,FLEN)
NAN_BOXED(0x7f098ac2,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcffffff,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc2000000,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc2000001,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc2000003,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc2000007,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc200000f,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc200001f,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc200003f,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc200007f,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc20000ff,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc20001ff,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc20003ff,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc20007ff,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc2000fff,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc2001fff,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc2003fff,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc2007fff,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc200ffff,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc201ffff,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc203ffff,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc207ffff,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc20fffff,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc21fffff,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc23fffff,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc2400000,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc2600000,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc2700000,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc2780000,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc27c0000,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc27e0000,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc27f0000,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc27f8000,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc27fc000,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc27fe000,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc27ff000,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc27ff800,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc27ffc00,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc27ffe00,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc27fff00,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc27fff80,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc27fffc0,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc27fffe0,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc27ffff0,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc27ffff8,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc27ffffc,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc27ffffe,32,FLEN)
NAN_BOXED(0x7f0a272a,32,FLEN)
NAN_BOXED(0x803b4bec,32,FLEN)
NAN_BOXED(0xc27fffff,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x199999,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x249249,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x333333,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x36db6d,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3bbbbb,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x444444,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ccccc,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5b6db6,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x666666,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6db6db,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff8,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffc,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffe,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8800000,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8800001,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8800003,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8800007,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x880000f,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x880001f,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x880003f,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x880007f,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x88000ff,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x88001ff,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x88003ff,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x88007ff,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8800fff,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8801fff,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8803fff,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8807fff,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x880ffff,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x881ffff,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x883ffff,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x887ffff,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x88fffff,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x89fffff,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8bfffff,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8c00000,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8e00000,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8f00000,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8f80000,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8fc0000,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8fe0000,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8ff0000,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8ff8000,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8ffc000,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8ffe000,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8fff000,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8fff800,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8fffc00,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8fffe00,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8ffff00,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8ffff80,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8ffffc0,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8ffffe0,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8fffff0,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8fffff8,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8fffffc,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8fffffe,32,FLEN)
NAN_BOXED(0x7f0a27fc,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8ffffff,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800001,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800003,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800007,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x999999,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa49249,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb33333,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb6db6d,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbbbbbb,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc44444,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcccccc,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdb6db6,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe66666,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xedb6db,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffff8,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffc,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffe,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7800000,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7800001,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7800003,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7800007,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x780000f,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x780001f,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x780003f,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x780007f,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x78000ff,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x78001ff,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x78003ff,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x78007ff,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7800fff,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7801fff,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7803fff,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7807fff,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x780ffff,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x781ffff,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x783ffff,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x787ffff,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x78fffff,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x79fffff,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7bfffff,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7c00000,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7e00000,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7f00000,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7f80000,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7fc0000,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7fe0000,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ff0000,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ff8000,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffc000,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffe000,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7fff000,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7fff800,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7fffc00,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7fffe00,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff00,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff80,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffc0,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffe0,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7fffff0,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7fffff8,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7fffffc,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7fffffe,32,FLEN)
NAN_BOXED(0x7f0a40d6,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffff,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xed800000,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xed800001,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xed800003,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xed800007,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xed80000f,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xed80001f,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xed80003f,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xed80007f,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xed8000ff,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xed8001ff,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xed8003ff,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xed8007ff,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xed800fff,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xed801fff,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xed803fff,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xed807fff,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xed80ffff,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xed81ffff,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xed83ffff,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xed87ffff,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xed8fffff,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xed9fffff,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xedbfffff,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xedc00000,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xede00000,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xedf00000,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xedf80000,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xedfc0000,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xedfe0000,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xedff0000,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xedff8000,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xedffc000,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xedffe000,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xedfff000,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xedfff800,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xedfffc00,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xedfffe00,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xedffff00,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xedffff80,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xedffffc0,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xedffffe0,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xedfffff0,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xedfffff8,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xedfffffc,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xedfffffe,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xedffffff,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xff000001,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xff000003,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xff000007,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xff199999,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xff249249,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xff333333,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xff36db6d,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xff3bbbbb,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xff444444,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xff4ccccc,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xff5b6db6,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xff666666,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xff6db6db,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xff7ffff8,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xff7ffffc,32,FLEN)
NAN_BOXED(0x7f0a96d6,32,FLEN)
NAN_BOXED(0xbfec7093,32,FLEN)
NAN_BOXED(0xff7ffffe,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x199999,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x249249,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x333333,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x36db6d,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3bbbbb,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x444444,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ccccc,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5b6db6,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x666666,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6db6db,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff8,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffc,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffe,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5800000,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5800001,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5800003,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5800007,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x580000f,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x580001f,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x580003f,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x580007f,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x58000ff,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x58001ff,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x58003ff,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x58007ff,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5800fff,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5801fff,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5803fff,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5807fff,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x580ffff,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x581ffff,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x583ffff,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x587ffff,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x58fffff,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x59fffff,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5bfffff,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5c00000,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5e00000,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5f00000,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5f80000,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5fc0000,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5fe0000,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5ff0000,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5ff8000,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5ffc000,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5ffe000,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5fff000,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5fff800,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5fffc00,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5fffe00,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5ffff00,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5ffff80,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5ffffc0,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5ffffe0,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5fffff0,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5fffff8,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5fffffc,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5fffffe,32,FLEN)
NAN_BOXED(0x7f0ad17d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5ffffff,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb5000000,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb5000001,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb5000003,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb5000007,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb500000f,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb500001f,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb500003f,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb500007f,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb50000ff,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb50001ff,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb50003ff,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb50007ff,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb5000fff,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb5001fff,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb5003fff,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb5007fff,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb500ffff,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb501ffff,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb503ffff,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb507ffff,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb50fffff,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb51fffff,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb53fffff,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb5400000,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb5600000,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb5700000,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb5780000,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb57c0000,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb57e0000,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb57f0000,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb57f8000,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb57fc000,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb57fe000,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb57ff000,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb57ff800,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb57ffc00,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb57ffe00,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb57fff00,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb57fff80,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb57fffc0,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb57fffe0,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb57ffff0,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb57ffff8,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb57ffffc,32,FLEN)
NAN_BOXED(0x7f0aecaa,32,FLEN)
NAN_BOXED(0x803af7a0,32,FLEN)
NAN_BOXED(0xb57ffffe,32,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;


signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_2:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_3:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_4:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_5:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_6:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine

tsig_begin_canary:
CANARY;
tsig_begin_canary:
CANARY;
mtrap_sigptr:
    .fill 64*(XLEN/32),4,0xdeadbeef
tsig_end_canary:
CANARY;
tsig_end_canary:
CANARY;

#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif

sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
