
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.11.0
// timestamp : Mon Feb  5 07:40:16 2024 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /home/riscv/riscv-ctg/sample_cgfs/dataset.cgf \
//                  --cgf /home/riscv/riscv-ctg/sample_cgfs/sample_cgfs_fext/RV64Zfinx/fnmsub.s.cgf \
 \
//                  -- xlen 64  \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fnmsub.s instruction of the RISC-V RV64_Zfinx,RV64_Zdinx extension for the fnmsub_b15 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV64I_Zfinx,RV64I_Zdinx")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*Zfinx.*);def TEST_CASE_1=True;",fnmsub_b15)

RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_13806:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb8fc0000; valaddr_reg:x12; val_offset:41355*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41355*FLEN/8, x13, x9, x10)

inst_13807:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb883ffff; valaddr_reg:x12; val_offset:41358*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41358*FLEN/8, x13, x9, x10)

inst_13808:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb8fe0000; valaddr_reg:x12; val_offset:41361*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41361*FLEN/8, x13, x9, x10)

inst_13809:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb881ffff; valaddr_reg:x12; val_offset:41364*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41364*FLEN/8, x13, x9, x10)

inst_13810:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb8ff0000; valaddr_reg:x12; val_offset:41367*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41367*FLEN/8, x13, x9, x10)

inst_13811:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb880ffff; valaddr_reg:x12; val_offset:41370*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41370*FLEN/8, x13, x9, x10)

inst_13812:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb8ff8000; valaddr_reg:x12; val_offset:41373*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41373*FLEN/8, x13, x9, x10)

inst_13813:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb8807fff; valaddr_reg:x12; val_offset:41376*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41376*FLEN/8, x13, x9, x10)

inst_13814:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb8ffc000; valaddr_reg:x12; val_offset:41379*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41379*FLEN/8, x13, x9, x10)

inst_13815:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb8803fff; valaddr_reg:x12; val_offset:41382*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41382*FLEN/8, x13, x9, x10)

inst_13816:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb8ffe000; valaddr_reg:x12; val_offset:41385*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41385*FLEN/8, x13, x9, x10)

inst_13817:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb8801fff; valaddr_reg:x12; val_offset:41388*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41388*FLEN/8, x13, x9, x10)

inst_13818:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb8fff000; valaddr_reg:x12; val_offset:41391*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41391*FLEN/8, x13, x9, x10)

inst_13819:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb8800fff; valaddr_reg:x12; val_offset:41394*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41394*FLEN/8, x13, x9, x10)

inst_13820:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb8fff800; valaddr_reg:x12; val_offset:41397*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41397*FLEN/8, x13, x9, x10)

inst_13821:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb88007ff; valaddr_reg:x12; val_offset:41400*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41400*FLEN/8, x13, x9, x10)

inst_13822:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb8fffc00; valaddr_reg:x12; val_offset:41403*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41403*FLEN/8, x13, x9, x10)

inst_13823:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb88003ff; valaddr_reg:x12; val_offset:41406*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41406*FLEN/8, x13, x9, x10)

inst_13824:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb8fffe00; valaddr_reg:x12; val_offset:41409*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41409*FLEN/8, x13, x9, x10)

inst_13825:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb88001ff; valaddr_reg:x12; val_offset:41412*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41412*FLEN/8, x13, x9, x10)

inst_13826:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb8ffff00; valaddr_reg:x12; val_offset:41415*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41415*FLEN/8, x13, x9, x10)

inst_13827:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb88000ff; valaddr_reg:x12; val_offset:41418*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41418*FLEN/8, x13, x9, x10)

inst_13828:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb8ffff80; valaddr_reg:x12; val_offset:41421*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41421*FLEN/8, x13, x9, x10)

inst_13829:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb880007f; valaddr_reg:x12; val_offset:41424*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41424*FLEN/8, x13, x9, x10)

inst_13830:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb8ffffc0; valaddr_reg:x12; val_offset:41427*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41427*FLEN/8, x13, x9, x10)

inst_13831:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb880003f; valaddr_reg:x12; val_offset:41430*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41430*FLEN/8, x13, x9, x10)

inst_13832:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb8ffffe0; valaddr_reg:x12; val_offset:41433*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41433*FLEN/8, x13, x9, x10)

inst_13833:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb880001f; valaddr_reg:x12; val_offset:41436*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41436*FLEN/8, x13, x9, x10)

inst_13834:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb8fffff0; valaddr_reg:x12; val_offset:41439*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41439*FLEN/8, x13, x9, x10)

inst_13835:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb880000f; valaddr_reg:x12; val_offset:41442*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41442*FLEN/8, x13, x9, x10)

inst_13836:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb8fffff8; valaddr_reg:x12; val_offset:41445*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41445*FLEN/8, x13, x9, x10)

inst_13837:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb8800007; valaddr_reg:x12; val_offset:41448*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41448*FLEN/8, x13, x9, x10)

inst_13838:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb8fffffc; valaddr_reg:x12; val_offset:41451*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41451*FLEN/8, x13, x9, x10)

inst_13839:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb8800003; valaddr_reg:x12; val_offset:41454*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41454*FLEN/8, x13, x9, x10)

inst_13840:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb8fffffe; valaddr_reg:x12; val_offset:41457*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41457*FLEN/8, x13, x9, x10)

inst_13841:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x71 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xb8800001; valaddr_reg:x12; val_offset:41460*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41460*FLEN/8, x13, x9, x10)

inst_13842:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:41463*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41463*FLEN/8, x13, x9, x10)

inst_13843:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xbf800007; valaddr_reg:x12; val_offset:41466*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41466*FLEN/8, x13, x9, x10)

inst_13844:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:41469*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41469*FLEN/8, x13, x9, x10)

inst_13845:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xbf800003; valaddr_reg:x12; val_offset:41472*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41472*FLEN/8, x13, x9, x10)

inst_13846:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:41475*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41475*FLEN/8, x13, x9, x10)

inst_13847:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xbf800001; valaddr_reg:x12; val_offset:41478*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41478*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_108)
inst_13848:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:41481*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41481*FLEN/8, x13, x9, x10)

inst_13849:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:41484*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41484*FLEN/8, x13, x9, x10)

inst_13850:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xbf999999; valaddr_reg:x12; val_offset:41487*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41487*FLEN/8, x13, x9, x10)

inst_13851:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:41490*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41490*FLEN/8, x13, x9, x10)

inst_13852:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:41493*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41493*FLEN/8, x13, x9, x10)

inst_13853:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:41496*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41496*FLEN/8, x13, x9, x10)

inst_13854:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:41499*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41499*FLEN/8, x13, x9, x10)

inst_13855:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:41502*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41502*FLEN/8, x13, x9, x10)

inst_13856:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:41505*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41505*FLEN/8, x13, x9, x10)

inst_13857:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4d4cf5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4fce0f and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecd4cf5; op2val:0x804fce0f;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:41508*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41508*FLEN/8, x13, x9, x10)

inst_13858:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb9000000; valaddr_reg:x12; val_offset:41511*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41511*FLEN/8, x13, x9, x10)

inst_13859:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97fffff; valaddr_reg:x12; val_offset:41514*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41514*FLEN/8, x13, x9, x10)

inst_13860:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb9400000; valaddr_reg:x12; val_offset:41517*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41517*FLEN/8, x13, x9, x10)

inst_13861:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb93fffff; valaddr_reg:x12; val_offset:41520*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41520*FLEN/8, x13, x9, x10)

inst_13862:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb9600000; valaddr_reg:x12; val_offset:41523*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41523*FLEN/8, x13, x9, x10)

inst_13863:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb91fffff; valaddr_reg:x12; val_offset:41526*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41526*FLEN/8, x13, x9, x10)

inst_13864:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb9700000; valaddr_reg:x12; val_offset:41529*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41529*FLEN/8, x13, x9, x10)

inst_13865:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb90fffff; valaddr_reg:x12; val_offset:41532*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41532*FLEN/8, x13, x9, x10)

inst_13866:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb9780000; valaddr_reg:x12; val_offset:41535*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41535*FLEN/8, x13, x9, x10)

inst_13867:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb907ffff; valaddr_reg:x12; val_offset:41538*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41538*FLEN/8, x13, x9, x10)

inst_13868:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97c0000; valaddr_reg:x12; val_offset:41541*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41541*FLEN/8, x13, x9, x10)

inst_13869:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb903ffff; valaddr_reg:x12; val_offset:41544*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41544*FLEN/8, x13, x9, x10)

inst_13870:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97e0000; valaddr_reg:x12; val_offset:41547*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41547*FLEN/8, x13, x9, x10)

inst_13871:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb901ffff; valaddr_reg:x12; val_offset:41550*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41550*FLEN/8, x13, x9, x10)

inst_13872:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97f0000; valaddr_reg:x12; val_offset:41553*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41553*FLEN/8, x13, x9, x10)

inst_13873:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb900ffff; valaddr_reg:x12; val_offset:41556*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41556*FLEN/8, x13, x9, x10)

inst_13874:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97f8000; valaddr_reg:x12; val_offset:41559*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41559*FLEN/8, x13, x9, x10)

inst_13875:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb9007fff; valaddr_reg:x12; val_offset:41562*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41562*FLEN/8, x13, x9, x10)

inst_13876:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97fc000; valaddr_reg:x12; val_offset:41565*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41565*FLEN/8, x13, x9, x10)

inst_13877:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb9003fff; valaddr_reg:x12; val_offset:41568*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41568*FLEN/8, x13, x9, x10)

inst_13878:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97fe000; valaddr_reg:x12; val_offset:41571*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41571*FLEN/8, x13, x9, x10)

inst_13879:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb9001fff; valaddr_reg:x12; val_offset:41574*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41574*FLEN/8, x13, x9, x10)

inst_13880:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97ff000; valaddr_reg:x12; val_offset:41577*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41577*FLEN/8, x13, x9, x10)

inst_13881:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb9000fff; valaddr_reg:x12; val_offset:41580*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41580*FLEN/8, x13, x9, x10)

inst_13882:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97ff800; valaddr_reg:x12; val_offset:41583*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41583*FLEN/8, x13, x9, x10)

inst_13883:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb90007ff; valaddr_reg:x12; val_offset:41586*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41586*FLEN/8, x13, x9, x10)

inst_13884:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97ffc00; valaddr_reg:x12; val_offset:41589*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41589*FLEN/8, x13, x9, x10)

inst_13885:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb90003ff; valaddr_reg:x12; val_offset:41592*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41592*FLEN/8, x13, x9, x10)

inst_13886:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97ffe00; valaddr_reg:x12; val_offset:41595*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41595*FLEN/8, x13, x9, x10)

inst_13887:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb90001ff; valaddr_reg:x12; val_offset:41598*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41598*FLEN/8, x13, x9, x10)

inst_13888:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97fff00; valaddr_reg:x12; val_offset:41601*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41601*FLEN/8, x13, x9, x10)

inst_13889:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb90000ff; valaddr_reg:x12; val_offset:41604*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41604*FLEN/8, x13, x9, x10)

inst_13890:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97fff80; valaddr_reg:x12; val_offset:41607*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41607*FLEN/8, x13, x9, x10)

inst_13891:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb900007f; valaddr_reg:x12; val_offset:41610*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41610*FLEN/8, x13, x9, x10)

inst_13892:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97fffc0; valaddr_reg:x12; val_offset:41613*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41613*FLEN/8, x13, x9, x10)

inst_13893:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb900003f; valaddr_reg:x12; val_offset:41616*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41616*FLEN/8, x13, x9, x10)

inst_13894:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97fffe0; valaddr_reg:x12; val_offset:41619*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41619*FLEN/8, x13, x9, x10)

inst_13895:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb900001f; valaddr_reg:x12; val_offset:41622*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41622*FLEN/8, x13, x9, x10)

inst_13896:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97ffff0; valaddr_reg:x12; val_offset:41625*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41625*FLEN/8, x13, x9, x10)

inst_13897:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb900000f; valaddr_reg:x12; val_offset:41628*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41628*FLEN/8, x13, x9, x10)

inst_13898:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97ffff8; valaddr_reg:x12; val_offset:41631*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41631*FLEN/8, x13, x9, x10)

inst_13899:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb9000007; valaddr_reg:x12; val_offset:41634*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41634*FLEN/8, x13, x9, x10)

inst_13900:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97ffffc; valaddr_reg:x12; val_offset:41637*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41637*FLEN/8, x13, x9, x10)

inst_13901:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb9000003; valaddr_reg:x12; val_offset:41640*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41640*FLEN/8, x13, x9, x10)

inst_13902:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb97ffffe; valaddr_reg:x12; val_offset:41643*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41643*FLEN/8, x13, x9, x10)

inst_13903:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xb9000001; valaddr_reg:x12; val_offset:41646*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41646*FLEN/8, x13, x9, x10)

inst_13904:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:41649*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41649*FLEN/8, x13, x9, x10)

inst_13905:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xbf800007; valaddr_reg:x12; val_offset:41652*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41652*FLEN/8, x13, x9, x10)

inst_13906:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:41655*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41655*FLEN/8, x13, x9, x10)

inst_13907:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xbf800003; valaddr_reg:x12; val_offset:41658*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41658*FLEN/8, x13, x9, x10)

inst_13908:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:41661*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41661*FLEN/8, x13, x9, x10)

inst_13909:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xbf800001; valaddr_reg:x12; val_offset:41664*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41664*FLEN/8, x13, x9, x10)

inst_13910:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:41667*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41667*FLEN/8, x13, x9, x10)

inst_13911:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:41670*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41670*FLEN/8, x13, x9, x10)

inst_13912:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xbf999999; valaddr_reg:x12; val_offset:41673*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41673*FLEN/8, x13, x9, x10)

inst_13913:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:41676*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41676*FLEN/8, x13, x9, x10)

inst_13914:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:41679*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41679*FLEN/8, x13, x9, x10)

inst_13915:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:41682*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41682*FLEN/8, x13, x9, x10)

inst_13916:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:41685*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41685*FLEN/8, x13, x9, x10)

inst_13917:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:41688*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41688*FLEN/8, x13, x9, x10)

inst_13918:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:41691*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41691*FLEN/8, x13, x9, x10)

inst_13919:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cd3e2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x343c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1cd3e2; op2val:0x80343c55;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:41694*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41694*FLEN/8, x13, x9, x10)

inst_13920:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb9800000; valaddr_reg:x12; val_offset:41697*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41697*FLEN/8, x13, x9, x10)

inst_13921:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb9ffffff; valaddr_reg:x12; val_offset:41700*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41700*FLEN/8, x13, x9, x10)

inst_13922:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb9c00000; valaddr_reg:x12; val_offset:41703*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41703*FLEN/8, x13, x9, x10)

inst_13923:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb9bfffff; valaddr_reg:x12; val_offset:41706*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41706*FLEN/8, x13, x9, x10)

inst_13924:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb9e00000; valaddr_reg:x12; val_offset:41709*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41709*FLEN/8, x13, x9, x10)

inst_13925:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb99fffff; valaddr_reg:x12; val_offset:41712*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41712*FLEN/8, x13, x9, x10)

inst_13926:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb9f00000; valaddr_reg:x12; val_offset:41715*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41715*FLEN/8, x13, x9, x10)

inst_13927:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb98fffff; valaddr_reg:x12; val_offset:41718*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41718*FLEN/8, x13, x9, x10)

inst_13928:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb9f80000; valaddr_reg:x12; val_offset:41721*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41721*FLEN/8, x13, x9, x10)

inst_13929:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb987ffff; valaddr_reg:x12; val_offset:41724*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41724*FLEN/8, x13, x9, x10)

inst_13930:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb9fc0000; valaddr_reg:x12; val_offset:41727*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41727*FLEN/8, x13, x9, x10)

inst_13931:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb983ffff; valaddr_reg:x12; val_offset:41730*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41730*FLEN/8, x13, x9, x10)

inst_13932:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb9fe0000; valaddr_reg:x12; val_offset:41733*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41733*FLEN/8, x13, x9, x10)

inst_13933:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb981ffff; valaddr_reg:x12; val_offset:41736*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41736*FLEN/8, x13, x9, x10)

inst_13934:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb9ff0000; valaddr_reg:x12; val_offset:41739*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41739*FLEN/8, x13, x9, x10)

inst_13935:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb980ffff; valaddr_reg:x12; val_offset:41742*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41742*FLEN/8, x13, x9, x10)

inst_13936:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb9ff8000; valaddr_reg:x12; val_offset:41745*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41745*FLEN/8, x13, x9, x10)

inst_13937:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb9807fff; valaddr_reg:x12; val_offset:41748*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41748*FLEN/8, x13, x9, x10)

inst_13938:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb9ffc000; valaddr_reg:x12; val_offset:41751*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41751*FLEN/8, x13, x9, x10)

inst_13939:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb9803fff; valaddr_reg:x12; val_offset:41754*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41754*FLEN/8, x13, x9, x10)

inst_13940:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb9ffe000; valaddr_reg:x12; val_offset:41757*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41757*FLEN/8, x13, x9, x10)

inst_13941:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb9801fff; valaddr_reg:x12; val_offset:41760*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41760*FLEN/8, x13, x9, x10)

inst_13942:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb9fff000; valaddr_reg:x12; val_offset:41763*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41763*FLEN/8, x13, x9, x10)

inst_13943:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb9800fff; valaddr_reg:x12; val_offset:41766*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41766*FLEN/8, x13, x9, x10)

inst_13944:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb9fff800; valaddr_reg:x12; val_offset:41769*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41769*FLEN/8, x13, x9, x10)

inst_13945:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb98007ff; valaddr_reg:x12; val_offset:41772*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41772*FLEN/8, x13, x9, x10)

inst_13946:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb9fffc00; valaddr_reg:x12; val_offset:41775*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41775*FLEN/8, x13, x9, x10)

inst_13947:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb98003ff; valaddr_reg:x12; val_offset:41778*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41778*FLEN/8, x13, x9, x10)

inst_13948:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb9fffe00; valaddr_reg:x12; val_offset:41781*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41781*FLEN/8, x13, x9, x10)

inst_13949:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb98001ff; valaddr_reg:x12; val_offset:41784*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41784*FLEN/8, x13, x9, x10)

inst_13950:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb9ffff00; valaddr_reg:x12; val_offset:41787*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41787*FLEN/8, x13, x9, x10)

inst_13951:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb98000ff; valaddr_reg:x12; val_offset:41790*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41790*FLEN/8, x13, x9, x10)

inst_13952:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb9ffff80; valaddr_reg:x12; val_offset:41793*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41793*FLEN/8, x13, x9, x10)

inst_13953:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb980007f; valaddr_reg:x12; val_offset:41796*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41796*FLEN/8, x13, x9, x10)

inst_13954:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb9ffffc0; valaddr_reg:x12; val_offset:41799*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41799*FLEN/8, x13, x9, x10)

inst_13955:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb980003f; valaddr_reg:x12; val_offset:41802*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41802*FLEN/8, x13, x9, x10)

inst_13956:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb9ffffe0; valaddr_reg:x12; val_offset:41805*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41805*FLEN/8, x13, x9, x10)

inst_13957:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb980001f; valaddr_reg:x12; val_offset:41808*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41808*FLEN/8, x13, x9, x10)

inst_13958:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb9fffff0; valaddr_reg:x12; val_offset:41811*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41811*FLEN/8, x13, x9, x10)

inst_13959:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb980000f; valaddr_reg:x12; val_offset:41814*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41814*FLEN/8, x13, x9, x10)

inst_13960:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb9fffff8; valaddr_reg:x12; val_offset:41817*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41817*FLEN/8, x13, x9, x10)

inst_13961:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb9800007; valaddr_reg:x12; val_offset:41820*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41820*FLEN/8, x13, x9, x10)

inst_13962:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb9fffffc; valaddr_reg:x12; val_offset:41823*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41823*FLEN/8, x13, x9, x10)

inst_13963:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb9800003; valaddr_reg:x12; val_offset:41826*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41826*FLEN/8, x13, x9, x10)

inst_13964:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb9fffffe; valaddr_reg:x12; val_offset:41829*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41829*FLEN/8, x13, x9, x10)

inst_13965:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x73 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xb9800001; valaddr_reg:x12; val_offset:41832*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41832*FLEN/8, x13, x9, x10)

inst_13966:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:41835*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41835*FLEN/8, x13, x9, x10)

inst_13967:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xbf800007; valaddr_reg:x12; val_offset:41838*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41838*FLEN/8, x13, x9, x10)

inst_13968:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:41841*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41841*FLEN/8, x13, x9, x10)

inst_13969:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xbf800003; valaddr_reg:x12; val_offset:41844*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41844*FLEN/8, x13, x9, x10)

inst_13970:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:41847*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41847*FLEN/8, x13, x9, x10)

inst_13971:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xbf800001; valaddr_reg:x12; val_offset:41850*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41850*FLEN/8, x13, x9, x10)

inst_13972:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:41853*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41853*FLEN/8, x13, x9, x10)

inst_13973:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:41856*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41856*FLEN/8, x13, x9, x10)

inst_13974:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xbf999999; valaddr_reg:x12; val_offset:41859*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41859*FLEN/8, x13, x9, x10)

inst_13975:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:41862*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41862*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_109)
inst_13976:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:41865*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41865*FLEN/8, x13, x9, x10)

inst_13977:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:41868*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41868*FLEN/8, x13, x9, x10)

inst_13978:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:41871*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41871*FLEN/8, x13, x9, x10)

inst_13979:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:41874*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41874*FLEN/8, x13, x9, x10)

inst_13980:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:41877*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41877*FLEN/8, x13, x9, x10)

inst_13981:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x79128a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x80f9128a;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:41880*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41880*FLEN/8, x13, x9, x10)

inst_13982:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba000000; valaddr_reg:x12; val_offset:41883*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41883*FLEN/8, x13, x9, x10)

inst_13983:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba7fffff; valaddr_reg:x12; val_offset:41886*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41886*FLEN/8, x13, x9, x10)

inst_13984:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba400000; valaddr_reg:x12; val_offset:41889*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41889*FLEN/8, x13, x9, x10)

inst_13985:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba3fffff; valaddr_reg:x12; val_offset:41892*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41892*FLEN/8, x13, x9, x10)

inst_13986:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba600000; valaddr_reg:x12; val_offset:41895*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41895*FLEN/8, x13, x9, x10)

inst_13987:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba1fffff; valaddr_reg:x12; val_offset:41898*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41898*FLEN/8, x13, x9, x10)

inst_13988:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba700000; valaddr_reg:x12; val_offset:41901*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41901*FLEN/8, x13, x9, x10)

inst_13989:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba0fffff; valaddr_reg:x12; val_offset:41904*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41904*FLEN/8, x13, x9, x10)

inst_13990:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba780000; valaddr_reg:x12; val_offset:41907*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41907*FLEN/8, x13, x9, x10)

inst_13991:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba07ffff; valaddr_reg:x12; val_offset:41910*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41910*FLEN/8, x13, x9, x10)

inst_13992:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba7c0000; valaddr_reg:x12; val_offset:41913*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41913*FLEN/8, x13, x9, x10)

inst_13993:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba03ffff; valaddr_reg:x12; val_offset:41916*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41916*FLEN/8, x13, x9, x10)

inst_13994:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba7e0000; valaddr_reg:x12; val_offset:41919*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41919*FLEN/8, x13, x9, x10)

inst_13995:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba01ffff; valaddr_reg:x12; val_offset:41922*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41922*FLEN/8, x13, x9, x10)

inst_13996:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba7f0000; valaddr_reg:x12; val_offset:41925*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41925*FLEN/8, x13, x9, x10)

inst_13997:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba00ffff; valaddr_reg:x12; val_offset:41928*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41928*FLEN/8, x13, x9, x10)

inst_13998:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba7f8000; valaddr_reg:x12; val_offset:41931*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41931*FLEN/8, x13, x9, x10)

inst_13999:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba007fff; valaddr_reg:x12; val_offset:41934*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41934*FLEN/8, x13, x9, x10)

inst_14000:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba7fc000; valaddr_reg:x12; val_offset:41937*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41937*FLEN/8, x13, x9, x10)

inst_14001:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba003fff; valaddr_reg:x12; val_offset:41940*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41940*FLEN/8, x13, x9, x10)

inst_14002:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba7fe000; valaddr_reg:x12; val_offset:41943*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41943*FLEN/8, x13, x9, x10)

inst_14003:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba001fff; valaddr_reg:x12; val_offset:41946*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41946*FLEN/8, x13, x9, x10)

inst_14004:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba7ff000; valaddr_reg:x12; val_offset:41949*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41949*FLEN/8, x13, x9, x10)

inst_14005:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba000fff; valaddr_reg:x12; val_offset:41952*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41952*FLEN/8, x13, x9, x10)

inst_14006:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba7ff800; valaddr_reg:x12; val_offset:41955*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41955*FLEN/8, x13, x9, x10)

inst_14007:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba0007ff; valaddr_reg:x12; val_offset:41958*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41958*FLEN/8, x13, x9, x10)

inst_14008:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba7ffc00; valaddr_reg:x12; val_offset:41961*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41961*FLEN/8, x13, x9, x10)

inst_14009:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba0003ff; valaddr_reg:x12; val_offset:41964*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41964*FLEN/8, x13, x9, x10)

inst_14010:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba7ffe00; valaddr_reg:x12; val_offset:41967*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41967*FLEN/8, x13, x9, x10)

inst_14011:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba0001ff; valaddr_reg:x12; val_offset:41970*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41970*FLEN/8, x13, x9, x10)

inst_14012:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba7fff00; valaddr_reg:x12; val_offset:41973*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41973*FLEN/8, x13, x9, x10)

inst_14013:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba0000ff; valaddr_reg:x12; val_offset:41976*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41976*FLEN/8, x13, x9, x10)

inst_14014:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba7fff80; valaddr_reg:x12; val_offset:41979*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41979*FLEN/8, x13, x9, x10)

inst_14015:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba00007f; valaddr_reg:x12; val_offset:41982*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41982*FLEN/8, x13, x9, x10)

inst_14016:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba7fffc0; valaddr_reg:x12; val_offset:41985*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41985*FLEN/8, x13, x9, x10)

inst_14017:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba00003f; valaddr_reg:x12; val_offset:41988*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41988*FLEN/8, x13, x9, x10)

inst_14018:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba7fffe0; valaddr_reg:x12; val_offset:41991*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41991*FLEN/8, x13, x9, x10)

inst_14019:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba00001f; valaddr_reg:x12; val_offset:41994*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41994*FLEN/8, x13, x9, x10)

inst_14020:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba7ffff0; valaddr_reg:x12; val_offset:41997*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 41997*FLEN/8, x13, x9, x10)

inst_14021:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba00000f; valaddr_reg:x12; val_offset:42000*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42000*FLEN/8, x13, x9, x10)

inst_14022:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba7ffff8; valaddr_reg:x12; val_offset:42003*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42003*FLEN/8, x13, x9, x10)

inst_14023:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba000007; valaddr_reg:x12; val_offset:42006*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42006*FLEN/8, x13, x9, x10)

inst_14024:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba7ffffc; valaddr_reg:x12; val_offset:42009*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42009*FLEN/8, x13, x9, x10)

inst_14025:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba000003; valaddr_reg:x12; val_offset:42012*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42012*FLEN/8, x13, x9, x10)

inst_14026:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba7ffffe; valaddr_reg:x12; val_offset:42015*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42015*FLEN/8, x13, x9, x10)

inst_14027:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x74 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xba000001; valaddr_reg:x12; val_offset:42018*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42018*FLEN/8, x13, x9, x10)

inst_14028:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:42021*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42021*FLEN/8, x13, x9, x10)

inst_14029:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xbf800007; valaddr_reg:x12; val_offset:42024*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42024*FLEN/8, x13, x9, x10)

inst_14030:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:42027*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42027*FLEN/8, x13, x9, x10)

inst_14031:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xbf800003; valaddr_reg:x12; val_offset:42030*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42030*FLEN/8, x13, x9, x10)

inst_14032:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:42033*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42033*FLEN/8, x13, x9, x10)

inst_14033:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xbf800001; valaddr_reg:x12; val_offset:42036*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42036*FLEN/8, x13, x9, x10)

inst_14034:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:42039*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42039*FLEN/8, x13, x9, x10)

inst_14035:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:42042*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42042*FLEN/8, x13, x9, x10)

inst_14036:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xbf999999; valaddr_reg:x12; val_offset:42045*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42045*FLEN/8, x13, x9, x10)

inst_14037:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:42048*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42048*FLEN/8, x13, x9, x10)

inst_14038:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:42051*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42051*FLEN/8, x13, x9, x10)

inst_14039:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:42054*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42054*FLEN/8, x13, x9, x10)

inst_14040:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:42057*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42057*FLEN/8, x13, x9, x10)

inst_14041:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:42060*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42060*FLEN/8, x13, x9, x10)

inst_14042:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:42063*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42063*FLEN/8, x13, x9, x10)

inst_14043:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x180041 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x35e4f6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f180041; op2val:0x8035e4f6;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:42066*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42066*FLEN/8, x13, x9, x10)

inst_14044:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xba800000; valaddr_reg:x12; val_offset:42069*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42069*FLEN/8, x13, x9, x10)

inst_14045:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbaffffff; valaddr_reg:x12; val_offset:42072*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42072*FLEN/8, x13, x9, x10)

inst_14046:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbac00000; valaddr_reg:x12; val_offset:42075*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42075*FLEN/8, x13, x9, x10)

inst_14047:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbabfffff; valaddr_reg:x12; val_offset:42078*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42078*FLEN/8, x13, x9, x10)

inst_14048:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbae00000; valaddr_reg:x12; val_offset:42081*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42081*FLEN/8, x13, x9, x10)

inst_14049:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xba9fffff; valaddr_reg:x12; val_offset:42084*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42084*FLEN/8, x13, x9, x10)

inst_14050:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbaf00000; valaddr_reg:x12; val_offset:42087*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42087*FLEN/8, x13, x9, x10)

inst_14051:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xba8fffff; valaddr_reg:x12; val_offset:42090*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42090*FLEN/8, x13, x9, x10)

inst_14052:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbaf80000; valaddr_reg:x12; val_offset:42093*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42093*FLEN/8, x13, x9, x10)

inst_14053:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xba87ffff; valaddr_reg:x12; val_offset:42096*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42096*FLEN/8, x13, x9, x10)

inst_14054:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbafc0000; valaddr_reg:x12; val_offset:42099*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42099*FLEN/8, x13, x9, x10)

inst_14055:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xba83ffff; valaddr_reg:x12; val_offset:42102*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42102*FLEN/8, x13, x9, x10)

inst_14056:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbafe0000; valaddr_reg:x12; val_offset:42105*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42105*FLEN/8, x13, x9, x10)

inst_14057:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xba81ffff; valaddr_reg:x12; val_offset:42108*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42108*FLEN/8, x13, x9, x10)

inst_14058:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbaff0000; valaddr_reg:x12; val_offset:42111*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42111*FLEN/8, x13, x9, x10)

inst_14059:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xba80ffff; valaddr_reg:x12; val_offset:42114*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42114*FLEN/8, x13, x9, x10)

inst_14060:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbaff8000; valaddr_reg:x12; val_offset:42117*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42117*FLEN/8, x13, x9, x10)

inst_14061:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xba807fff; valaddr_reg:x12; val_offset:42120*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42120*FLEN/8, x13, x9, x10)

inst_14062:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbaffc000; valaddr_reg:x12; val_offset:42123*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42123*FLEN/8, x13, x9, x10)

inst_14063:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xba803fff; valaddr_reg:x12; val_offset:42126*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42126*FLEN/8, x13, x9, x10)

inst_14064:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbaffe000; valaddr_reg:x12; val_offset:42129*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42129*FLEN/8, x13, x9, x10)

inst_14065:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xba801fff; valaddr_reg:x12; val_offset:42132*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42132*FLEN/8, x13, x9, x10)

inst_14066:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbafff000; valaddr_reg:x12; val_offset:42135*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42135*FLEN/8, x13, x9, x10)

inst_14067:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xba800fff; valaddr_reg:x12; val_offset:42138*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42138*FLEN/8, x13, x9, x10)

inst_14068:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbafff800; valaddr_reg:x12; val_offset:42141*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42141*FLEN/8, x13, x9, x10)

inst_14069:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xba8007ff; valaddr_reg:x12; val_offset:42144*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42144*FLEN/8, x13, x9, x10)

inst_14070:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbafffc00; valaddr_reg:x12; val_offset:42147*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42147*FLEN/8, x13, x9, x10)

inst_14071:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xba8003ff; valaddr_reg:x12; val_offset:42150*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42150*FLEN/8, x13, x9, x10)

inst_14072:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbafffe00; valaddr_reg:x12; val_offset:42153*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42153*FLEN/8, x13, x9, x10)

inst_14073:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xba8001ff; valaddr_reg:x12; val_offset:42156*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42156*FLEN/8, x13, x9, x10)

inst_14074:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbaffff00; valaddr_reg:x12; val_offset:42159*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42159*FLEN/8, x13, x9, x10)

inst_14075:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xba8000ff; valaddr_reg:x12; val_offset:42162*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42162*FLEN/8, x13, x9, x10)

inst_14076:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbaffff80; valaddr_reg:x12; val_offset:42165*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42165*FLEN/8, x13, x9, x10)

inst_14077:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xba80007f; valaddr_reg:x12; val_offset:42168*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42168*FLEN/8, x13, x9, x10)

inst_14078:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbaffffc0; valaddr_reg:x12; val_offset:42171*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42171*FLEN/8, x13, x9, x10)

inst_14079:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xba80003f; valaddr_reg:x12; val_offset:42174*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42174*FLEN/8, x13, x9, x10)

inst_14080:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbaffffe0; valaddr_reg:x12; val_offset:42177*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42177*FLEN/8, x13, x9, x10)

inst_14081:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xba80001f; valaddr_reg:x12; val_offset:42180*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42180*FLEN/8, x13, x9, x10)

inst_14082:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbafffff0; valaddr_reg:x12; val_offset:42183*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42183*FLEN/8, x13, x9, x10)

inst_14083:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xba80000f; valaddr_reg:x12; val_offset:42186*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42186*FLEN/8, x13, x9, x10)

inst_14084:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbafffff8; valaddr_reg:x12; val_offset:42189*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42189*FLEN/8, x13, x9, x10)

inst_14085:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xba800007; valaddr_reg:x12; val_offset:42192*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42192*FLEN/8, x13, x9, x10)

inst_14086:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbafffffc; valaddr_reg:x12; val_offset:42195*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42195*FLEN/8, x13, x9, x10)

inst_14087:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xba800003; valaddr_reg:x12; val_offset:42198*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42198*FLEN/8, x13, x9, x10)

inst_14088:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbafffffe; valaddr_reg:x12; val_offset:42201*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42201*FLEN/8, x13, x9, x10)

inst_14089:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x75 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xba800001; valaddr_reg:x12; val_offset:42204*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42204*FLEN/8, x13, x9, x10)

inst_14090:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:42207*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42207*FLEN/8, x13, x9, x10)

inst_14091:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbf800007; valaddr_reg:x12; val_offset:42210*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42210*FLEN/8, x13, x9, x10)

inst_14092:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:42213*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42213*FLEN/8, x13, x9, x10)

inst_14093:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbf800003; valaddr_reg:x12; val_offset:42216*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42216*FLEN/8, x13, x9, x10)

inst_14094:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:42219*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42219*FLEN/8, x13, x9, x10)

inst_14095:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbf800001; valaddr_reg:x12; val_offset:42222*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42222*FLEN/8, x13, x9, x10)

inst_14096:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:42225*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42225*FLEN/8, x13, x9, x10)

inst_14097:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:42228*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42228*FLEN/8, x13, x9, x10)

inst_14098:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbf999999; valaddr_reg:x12; val_offset:42231*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42231*FLEN/8, x13, x9, x10)

inst_14099:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:42234*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42234*FLEN/8, x13, x9, x10)

inst_14100:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:42237*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42237*FLEN/8, x13, x9, x10)

inst_14101:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:42240*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42240*FLEN/8, x13, x9, x10)

inst_14102:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:42243*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42243*FLEN/8, x13, x9, x10)

inst_14103:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:42246*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42246*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_110)
inst_14104:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:42249*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42249*FLEN/8, x13, x9, x10)

inst_14105:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30faaa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e49b6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f30faaa; op2val:0x802e49b6;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:42252*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42252*FLEN/8, x13, x9, x10)

inst_14106:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb000000; valaddr_reg:x12; val_offset:42255*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42255*FLEN/8, x13, x9, x10)

inst_14107:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7fffff; valaddr_reg:x12; val_offset:42258*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42258*FLEN/8, x13, x9, x10)

inst_14108:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb400000; valaddr_reg:x12; val_offset:42261*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42261*FLEN/8, x13, x9, x10)

inst_14109:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb3fffff; valaddr_reg:x12; val_offset:42264*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42264*FLEN/8, x13, x9, x10)

inst_14110:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb600000; valaddr_reg:x12; val_offset:42267*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42267*FLEN/8, x13, x9, x10)

inst_14111:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb1fffff; valaddr_reg:x12; val_offset:42270*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42270*FLEN/8, x13, x9, x10)

inst_14112:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb700000; valaddr_reg:x12; val_offset:42273*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42273*FLEN/8, x13, x9, x10)

inst_14113:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb0fffff; valaddr_reg:x12; val_offset:42276*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42276*FLEN/8, x13, x9, x10)

inst_14114:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb780000; valaddr_reg:x12; val_offset:42279*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42279*FLEN/8, x13, x9, x10)

inst_14115:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb07ffff; valaddr_reg:x12; val_offset:42282*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42282*FLEN/8, x13, x9, x10)

inst_14116:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7c0000; valaddr_reg:x12; val_offset:42285*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42285*FLEN/8, x13, x9, x10)

inst_14117:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb03ffff; valaddr_reg:x12; val_offset:42288*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42288*FLEN/8, x13, x9, x10)

inst_14118:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7e0000; valaddr_reg:x12; val_offset:42291*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42291*FLEN/8, x13, x9, x10)

inst_14119:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb01ffff; valaddr_reg:x12; val_offset:42294*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42294*FLEN/8, x13, x9, x10)

inst_14120:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7f0000; valaddr_reg:x12; val_offset:42297*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42297*FLEN/8, x13, x9, x10)

inst_14121:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb00ffff; valaddr_reg:x12; val_offset:42300*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42300*FLEN/8, x13, x9, x10)

inst_14122:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7f8000; valaddr_reg:x12; val_offset:42303*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42303*FLEN/8, x13, x9, x10)

inst_14123:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb007fff; valaddr_reg:x12; val_offset:42306*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42306*FLEN/8, x13, x9, x10)

inst_14124:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7fc000; valaddr_reg:x12; val_offset:42309*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42309*FLEN/8, x13, x9, x10)

inst_14125:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb003fff; valaddr_reg:x12; val_offset:42312*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42312*FLEN/8, x13, x9, x10)

inst_14126:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7fe000; valaddr_reg:x12; val_offset:42315*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42315*FLEN/8, x13, x9, x10)

inst_14127:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb001fff; valaddr_reg:x12; val_offset:42318*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42318*FLEN/8, x13, x9, x10)

inst_14128:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7ff000; valaddr_reg:x12; val_offset:42321*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42321*FLEN/8, x13, x9, x10)

inst_14129:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb000fff; valaddr_reg:x12; val_offset:42324*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42324*FLEN/8, x13, x9, x10)

inst_14130:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7ff800; valaddr_reg:x12; val_offset:42327*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42327*FLEN/8, x13, x9, x10)

inst_14131:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb0007ff; valaddr_reg:x12; val_offset:42330*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42330*FLEN/8, x13, x9, x10)

inst_14132:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7ffc00; valaddr_reg:x12; val_offset:42333*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42333*FLEN/8, x13, x9, x10)

inst_14133:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb0003ff; valaddr_reg:x12; val_offset:42336*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42336*FLEN/8, x13, x9, x10)

inst_14134:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7ffe00; valaddr_reg:x12; val_offset:42339*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42339*FLEN/8, x13, x9, x10)

inst_14135:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb0001ff; valaddr_reg:x12; val_offset:42342*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42342*FLEN/8, x13, x9, x10)

inst_14136:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7fff00; valaddr_reg:x12; val_offset:42345*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42345*FLEN/8, x13, x9, x10)

inst_14137:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb0000ff; valaddr_reg:x12; val_offset:42348*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42348*FLEN/8, x13, x9, x10)

inst_14138:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7fff80; valaddr_reg:x12; val_offset:42351*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42351*FLEN/8, x13, x9, x10)

inst_14139:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb00007f; valaddr_reg:x12; val_offset:42354*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42354*FLEN/8, x13, x9, x10)

inst_14140:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7fffc0; valaddr_reg:x12; val_offset:42357*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42357*FLEN/8, x13, x9, x10)

inst_14141:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb00003f; valaddr_reg:x12; val_offset:42360*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42360*FLEN/8, x13, x9, x10)

inst_14142:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7fffe0; valaddr_reg:x12; val_offset:42363*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42363*FLEN/8, x13, x9, x10)

inst_14143:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb00001f; valaddr_reg:x12; val_offset:42366*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42366*FLEN/8, x13, x9, x10)

inst_14144:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7ffff0; valaddr_reg:x12; val_offset:42369*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42369*FLEN/8, x13, x9, x10)

inst_14145:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb00000f; valaddr_reg:x12; val_offset:42372*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42372*FLEN/8, x13, x9, x10)

inst_14146:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7ffff8; valaddr_reg:x12; val_offset:42375*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42375*FLEN/8, x13, x9, x10)

inst_14147:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb000007; valaddr_reg:x12; val_offset:42378*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42378*FLEN/8, x13, x9, x10)

inst_14148:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7ffffc; valaddr_reg:x12; val_offset:42381*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42381*FLEN/8, x13, x9, x10)

inst_14149:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb000003; valaddr_reg:x12; val_offset:42384*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42384*FLEN/8, x13, x9, x10)

inst_14150:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb7ffffe; valaddr_reg:x12; val_offset:42387*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42387*FLEN/8, x13, x9, x10)

inst_14151:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbb000001; valaddr_reg:x12; val_offset:42390*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42390*FLEN/8, x13, x9, x10)

inst_14152:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:42393*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42393*FLEN/8, x13, x9, x10)

inst_14153:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbf800007; valaddr_reg:x12; val_offset:42396*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42396*FLEN/8, x13, x9, x10)

inst_14154:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:42399*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42399*FLEN/8, x13, x9, x10)

inst_14155:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbf800003; valaddr_reg:x12; val_offset:42402*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42402*FLEN/8, x13, x9, x10)

inst_14156:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:42405*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42405*FLEN/8, x13, x9, x10)

inst_14157:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbf800001; valaddr_reg:x12; val_offset:42408*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42408*FLEN/8, x13, x9, x10)

inst_14158:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:42411*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42411*FLEN/8, x13, x9, x10)

inst_14159:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:42414*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42414*FLEN/8, x13, x9, x10)

inst_14160:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbf999999; valaddr_reg:x12; val_offset:42417*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42417*FLEN/8, x13, x9, x10)

inst_14161:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:42420*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42420*FLEN/8, x13, x9, x10)

inst_14162:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:42423*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42423*FLEN/8, x13, x9, x10)

inst_14163:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:42426*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42426*FLEN/8, x13, x9, x10)

inst_14164:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:42429*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42429*FLEN/8, x13, x9, x10)

inst_14165:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:42432*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42432*FLEN/8, x13, x9, x10)

inst_14166:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:42435*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42435*FLEN/8, x13, x9, x10)

inst_14167:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x34eed6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x8034eed6;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:42438*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42438*FLEN/8, x13, x9, x10)

inst_14168:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbb800000; valaddr_reg:x12; val_offset:42441*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42441*FLEN/8, x13, x9, x10)

inst_14169:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbbffffff; valaddr_reg:x12; val_offset:42444*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42444*FLEN/8, x13, x9, x10)

inst_14170:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbbc00000; valaddr_reg:x12; val_offset:42447*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42447*FLEN/8, x13, x9, x10)

inst_14171:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbbbfffff; valaddr_reg:x12; val_offset:42450*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42450*FLEN/8, x13, x9, x10)

inst_14172:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbbe00000; valaddr_reg:x12; val_offset:42453*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42453*FLEN/8, x13, x9, x10)

inst_14173:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbb9fffff; valaddr_reg:x12; val_offset:42456*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42456*FLEN/8, x13, x9, x10)

inst_14174:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbbf00000; valaddr_reg:x12; val_offset:42459*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42459*FLEN/8, x13, x9, x10)

inst_14175:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbb8fffff; valaddr_reg:x12; val_offset:42462*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42462*FLEN/8, x13, x9, x10)

inst_14176:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbbf80000; valaddr_reg:x12; val_offset:42465*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42465*FLEN/8, x13, x9, x10)

inst_14177:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbb87ffff; valaddr_reg:x12; val_offset:42468*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42468*FLEN/8, x13, x9, x10)

inst_14178:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbbfc0000; valaddr_reg:x12; val_offset:42471*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42471*FLEN/8, x13, x9, x10)

inst_14179:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbb83ffff; valaddr_reg:x12; val_offset:42474*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42474*FLEN/8, x13, x9, x10)

inst_14180:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbbfe0000; valaddr_reg:x12; val_offset:42477*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42477*FLEN/8, x13, x9, x10)

inst_14181:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbb81ffff; valaddr_reg:x12; val_offset:42480*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42480*FLEN/8, x13, x9, x10)

inst_14182:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbbff0000; valaddr_reg:x12; val_offset:42483*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42483*FLEN/8, x13, x9, x10)

inst_14183:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbb80ffff; valaddr_reg:x12; val_offset:42486*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42486*FLEN/8, x13, x9, x10)

inst_14184:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbbff8000; valaddr_reg:x12; val_offset:42489*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42489*FLEN/8, x13, x9, x10)

inst_14185:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbb807fff; valaddr_reg:x12; val_offset:42492*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42492*FLEN/8, x13, x9, x10)

inst_14186:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbbffc000; valaddr_reg:x12; val_offset:42495*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42495*FLEN/8, x13, x9, x10)

inst_14187:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbb803fff; valaddr_reg:x12; val_offset:42498*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42498*FLEN/8, x13, x9, x10)

inst_14188:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbbffe000; valaddr_reg:x12; val_offset:42501*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42501*FLEN/8, x13, x9, x10)

inst_14189:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbb801fff; valaddr_reg:x12; val_offset:42504*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42504*FLEN/8, x13, x9, x10)

inst_14190:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbbfff000; valaddr_reg:x12; val_offset:42507*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42507*FLEN/8, x13, x9, x10)

inst_14191:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbb800fff; valaddr_reg:x12; val_offset:42510*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42510*FLEN/8, x13, x9, x10)

inst_14192:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbbfff800; valaddr_reg:x12; val_offset:42513*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42513*FLEN/8, x13, x9, x10)

inst_14193:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbb8007ff; valaddr_reg:x12; val_offset:42516*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42516*FLEN/8, x13, x9, x10)

inst_14194:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbbfffc00; valaddr_reg:x12; val_offset:42519*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42519*FLEN/8, x13, x9, x10)

inst_14195:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbb8003ff; valaddr_reg:x12; val_offset:42522*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42522*FLEN/8, x13, x9, x10)

inst_14196:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbbfffe00; valaddr_reg:x12; val_offset:42525*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42525*FLEN/8, x13, x9, x10)

inst_14197:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbb8001ff; valaddr_reg:x12; val_offset:42528*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42528*FLEN/8, x13, x9, x10)

inst_14198:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbbffff00; valaddr_reg:x12; val_offset:42531*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42531*FLEN/8, x13, x9, x10)

inst_14199:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbb8000ff; valaddr_reg:x12; val_offset:42534*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42534*FLEN/8, x13, x9, x10)

inst_14200:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbbffff80; valaddr_reg:x12; val_offset:42537*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42537*FLEN/8, x13, x9, x10)

inst_14201:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbb80007f; valaddr_reg:x12; val_offset:42540*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42540*FLEN/8, x13, x9, x10)

inst_14202:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbbffffc0; valaddr_reg:x12; val_offset:42543*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42543*FLEN/8, x13, x9, x10)

inst_14203:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbb80003f; valaddr_reg:x12; val_offset:42546*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42546*FLEN/8, x13, x9, x10)

inst_14204:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbbffffe0; valaddr_reg:x12; val_offset:42549*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42549*FLEN/8, x13, x9, x10)

inst_14205:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbb80001f; valaddr_reg:x12; val_offset:42552*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42552*FLEN/8, x13, x9, x10)

inst_14206:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbbfffff0; valaddr_reg:x12; val_offset:42555*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42555*FLEN/8, x13, x9, x10)

inst_14207:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbb80000f; valaddr_reg:x12; val_offset:42558*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42558*FLEN/8, x13, x9, x10)

inst_14208:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbbfffff8; valaddr_reg:x12; val_offset:42561*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42561*FLEN/8, x13, x9, x10)

inst_14209:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbb800007; valaddr_reg:x12; val_offset:42564*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42564*FLEN/8, x13, x9, x10)

inst_14210:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbbfffffc; valaddr_reg:x12; val_offset:42567*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42567*FLEN/8, x13, x9, x10)

inst_14211:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbb800003; valaddr_reg:x12; val_offset:42570*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42570*FLEN/8, x13, x9, x10)

inst_14212:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbbfffffe; valaddr_reg:x12; val_offset:42573*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42573*FLEN/8, x13, x9, x10)

inst_14213:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x77 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbb800001; valaddr_reg:x12; val_offset:42576*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42576*FLEN/8, x13, x9, x10)

inst_14214:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:42579*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42579*FLEN/8, x13, x9, x10)

inst_14215:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbf800007; valaddr_reg:x12; val_offset:42582*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42582*FLEN/8, x13, x9, x10)

inst_14216:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:42585*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42585*FLEN/8, x13, x9, x10)

inst_14217:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbf800003; valaddr_reg:x12; val_offset:42588*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42588*FLEN/8, x13, x9, x10)

inst_14218:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:42591*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42591*FLEN/8, x13, x9, x10)

inst_14219:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbf800001; valaddr_reg:x12; val_offset:42594*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42594*FLEN/8, x13, x9, x10)

inst_14220:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:42597*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42597*FLEN/8, x13, x9, x10)

inst_14221:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:42600*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42600*FLEN/8, x13, x9, x10)

inst_14222:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbf999999; valaddr_reg:x12; val_offset:42603*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42603*FLEN/8, x13, x9, x10)

inst_14223:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:42606*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42606*FLEN/8, x13, x9, x10)

inst_14224:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:42609*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42609*FLEN/8, x13, x9, x10)

inst_14225:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:42612*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42612*FLEN/8, x13, x9, x10)

inst_14226:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:42615*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42615*FLEN/8, x13, x9, x10)

inst_14227:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:42618*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42618*FLEN/8, x13, x9, x10)

inst_14228:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:42621*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42621*FLEN/8, x13, x9, x10)

inst_14229:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e1c9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33cfbb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1e1c9c; op2val:0x8033cfbb;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:42624*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42624*FLEN/8, x13, x9, x10)

inst_14230:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc000000; valaddr_reg:x12; val_offset:42627*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42627*FLEN/8, x13, x9, x10)

inst_14231:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc7fffff; valaddr_reg:x12; val_offset:42630*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42630*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_111)
inst_14232:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc400000; valaddr_reg:x12; val_offset:42633*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42633*FLEN/8, x13, x9, x10)

inst_14233:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc3fffff; valaddr_reg:x12; val_offset:42636*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42636*FLEN/8, x13, x9, x10)

inst_14234:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc600000; valaddr_reg:x12; val_offset:42639*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42639*FLEN/8, x13, x9, x10)

inst_14235:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc1fffff; valaddr_reg:x12; val_offset:42642*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42642*FLEN/8, x13, x9, x10)

inst_14236:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc700000; valaddr_reg:x12; val_offset:42645*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42645*FLEN/8, x13, x9, x10)

inst_14237:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc0fffff; valaddr_reg:x12; val_offset:42648*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42648*FLEN/8, x13, x9, x10)

inst_14238:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc780000; valaddr_reg:x12; val_offset:42651*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42651*FLEN/8, x13, x9, x10)

inst_14239:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc07ffff; valaddr_reg:x12; val_offset:42654*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42654*FLEN/8, x13, x9, x10)

inst_14240:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc7c0000; valaddr_reg:x12; val_offset:42657*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42657*FLEN/8, x13, x9, x10)

inst_14241:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc03ffff; valaddr_reg:x12; val_offset:42660*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42660*FLEN/8, x13, x9, x10)

inst_14242:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc7e0000; valaddr_reg:x12; val_offset:42663*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42663*FLEN/8, x13, x9, x10)

inst_14243:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc01ffff; valaddr_reg:x12; val_offset:42666*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42666*FLEN/8, x13, x9, x10)

inst_14244:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc7f0000; valaddr_reg:x12; val_offset:42669*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42669*FLEN/8, x13, x9, x10)

inst_14245:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc00ffff; valaddr_reg:x12; val_offset:42672*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42672*FLEN/8, x13, x9, x10)

inst_14246:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc7f8000; valaddr_reg:x12; val_offset:42675*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42675*FLEN/8, x13, x9, x10)

inst_14247:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc007fff; valaddr_reg:x12; val_offset:42678*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42678*FLEN/8, x13, x9, x10)

inst_14248:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc7fc000; valaddr_reg:x12; val_offset:42681*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42681*FLEN/8, x13, x9, x10)

inst_14249:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc003fff; valaddr_reg:x12; val_offset:42684*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42684*FLEN/8, x13, x9, x10)

inst_14250:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc7fe000; valaddr_reg:x12; val_offset:42687*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42687*FLEN/8, x13, x9, x10)

inst_14251:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc001fff; valaddr_reg:x12; val_offset:42690*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42690*FLEN/8, x13, x9, x10)

inst_14252:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc7ff000; valaddr_reg:x12; val_offset:42693*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42693*FLEN/8, x13, x9, x10)

inst_14253:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc000fff; valaddr_reg:x12; val_offset:42696*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42696*FLEN/8, x13, x9, x10)

inst_14254:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc7ff800; valaddr_reg:x12; val_offset:42699*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42699*FLEN/8, x13, x9, x10)

inst_14255:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc0007ff; valaddr_reg:x12; val_offset:42702*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42702*FLEN/8, x13, x9, x10)

inst_14256:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc7ffc00; valaddr_reg:x12; val_offset:42705*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42705*FLEN/8, x13, x9, x10)

inst_14257:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc0003ff; valaddr_reg:x12; val_offset:42708*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42708*FLEN/8, x13, x9, x10)

inst_14258:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc7ffe00; valaddr_reg:x12; val_offset:42711*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42711*FLEN/8, x13, x9, x10)

inst_14259:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc0001ff; valaddr_reg:x12; val_offset:42714*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42714*FLEN/8, x13, x9, x10)

inst_14260:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc7fff00; valaddr_reg:x12; val_offset:42717*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42717*FLEN/8, x13, x9, x10)

inst_14261:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc0000ff; valaddr_reg:x12; val_offset:42720*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42720*FLEN/8, x13, x9, x10)

inst_14262:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc7fff80; valaddr_reg:x12; val_offset:42723*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42723*FLEN/8, x13, x9, x10)

inst_14263:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc00007f; valaddr_reg:x12; val_offset:42726*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42726*FLEN/8, x13, x9, x10)

inst_14264:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc7fffc0; valaddr_reg:x12; val_offset:42729*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42729*FLEN/8, x13, x9, x10)

inst_14265:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc00003f; valaddr_reg:x12; val_offset:42732*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42732*FLEN/8, x13, x9, x10)

inst_14266:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc7fffe0; valaddr_reg:x12; val_offset:42735*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42735*FLEN/8, x13, x9, x10)

inst_14267:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc00001f; valaddr_reg:x12; val_offset:42738*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42738*FLEN/8, x13, x9, x10)

inst_14268:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc7ffff0; valaddr_reg:x12; val_offset:42741*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42741*FLEN/8, x13, x9, x10)

inst_14269:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc00000f; valaddr_reg:x12; val_offset:42744*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42744*FLEN/8, x13, x9, x10)

inst_14270:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc7ffff8; valaddr_reg:x12; val_offset:42747*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42747*FLEN/8, x13, x9, x10)

inst_14271:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc000007; valaddr_reg:x12; val_offset:42750*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42750*FLEN/8, x13, x9, x10)

inst_14272:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc7ffffc; valaddr_reg:x12; val_offset:42753*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42753*FLEN/8, x13, x9, x10)

inst_14273:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc000003; valaddr_reg:x12; val_offset:42756*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42756*FLEN/8, x13, x9, x10)

inst_14274:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc7ffffe; valaddr_reg:x12; val_offset:42759*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42759*FLEN/8, x13, x9, x10)

inst_14275:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x78 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbc000001; valaddr_reg:x12; val_offset:42762*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42762*FLEN/8, x13, x9, x10)

inst_14276:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:42765*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42765*FLEN/8, x13, x9, x10)

inst_14277:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbf800007; valaddr_reg:x12; val_offset:42768*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42768*FLEN/8, x13, x9, x10)

inst_14278:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:42771*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42771*FLEN/8, x13, x9, x10)

inst_14279:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbf800003; valaddr_reg:x12; val_offset:42774*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42774*FLEN/8, x13, x9, x10)

inst_14280:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:42777*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42777*FLEN/8, x13, x9, x10)

inst_14281:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbf800001; valaddr_reg:x12; val_offset:42780*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42780*FLEN/8, x13, x9, x10)

inst_14282:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:42783*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42783*FLEN/8, x13, x9, x10)

inst_14283:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:42786*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42786*FLEN/8, x13, x9, x10)

inst_14284:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbf999999; valaddr_reg:x12; val_offset:42789*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42789*FLEN/8, x13, x9, x10)

inst_14285:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:42792*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42792*FLEN/8, x13, x9, x10)

inst_14286:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:42795*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42795*FLEN/8, x13, x9, x10)

inst_14287:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:42798*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42798*FLEN/8, x13, x9, x10)

inst_14288:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:42801*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42801*FLEN/8, x13, x9, x10)

inst_14289:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:42804*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42804*FLEN/8, x13, x9, x10)

inst_14290:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:42807*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42807*FLEN/8, x13, x9, x10)

inst_14291:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x386f9d and fs2 == 1 and fe2 == 0x06 and fm2 == 0x31aa7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bb86f9d; op2val:0x8331aa7d;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:42810*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42810*FLEN/8, x13, x9, x10)

inst_14292:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbc800000; valaddr_reg:x12; val_offset:42813*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42813*FLEN/8, x13, x9, x10)

inst_14293:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbcffffff; valaddr_reg:x12; val_offset:42816*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42816*FLEN/8, x13, x9, x10)

inst_14294:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbcc00000; valaddr_reg:x12; val_offset:42819*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42819*FLEN/8, x13, x9, x10)

inst_14295:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbcbfffff; valaddr_reg:x12; val_offset:42822*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42822*FLEN/8, x13, x9, x10)

inst_14296:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbce00000; valaddr_reg:x12; val_offset:42825*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42825*FLEN/8, x13, x9, x10)

inst_14297:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbc9fffff; valaddr_reg:x12; val_offset:42828*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42828*FLEN/8, x13, x9, x10)

inst_14298:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbcf00000; valaddr_reg:x12; val_offset:42831*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42831*FLEN/8, x13, x9, x10)

inst_14299:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbc8fffff; valaddr_reg:x12; val_offset:42834*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42834*FLEN/8, x13, x9, x10)

inst_14300:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbcf80000; valaddr_reg:x12; val_offset:42837*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42837*FLEN/8, x13, x9, x10)

inst_14301:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbc87ffff; valaddr_reg:x12; val_offset:42840*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42840*FLEN/8, x13, x9, x10)

inst_14302:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbcfc0000; valaddr_reg:x12; val_offset:42843*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42843*FLEN/8, x13, x9, x10)

inst_14303:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbc83ffff; valaddr_reg:x12; val_offset:42846*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42846*FLEN/8, x13, x9, x10)

inst_14304:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbcfe0000; valaddr_reg:x12; val_offset:42849*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42849*FLEN/8, x13, x9, x10)

inst_14305:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbc81ffff; valaddr_reg:x12; val_offset:42852*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42852*FLEN/8, x13, x9, x10)

inst_14306:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbcff0000; valaddr_reg:x12; val_offset:42855*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42855*FLEN/8, x13, x9, x10)

inst_14307:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbc80ffff; valaddr_reg:x12; val_offset:42858*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42858*FLEN/8, x13, x9, x10)

inst_14308:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbcff8000; valaddr_reg:x12; val_offset:42861*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42861*FLEN/8, x13, x9, x10)

inst_14309:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbc807fff; valaddr_reg:x12; val_offset:42864*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42864*FLEN/8, x13, x9, x10)

inst_14310:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbcffc000; valaddr_reg:x12; val_offset:42867*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42867*FLEN/8, x13, x9, x10)

inst_14311:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbc803fff; valaddr_reg:x12; val_offset:42870*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42870*FLEN/8, x13, x9, x10)

inst_14312:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbcffe000; valaddr_reg:x12; val_offset:42873*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42873*FLEN/8, x13, x9, x10)

inst_14313:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbc801fff; valaddr_reg:x12; val_offset:42876*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42876*FLEN/8, x13, x9, x10)

inst_14314:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbcfff000; valaddr_reg:x12; val_offset:42879*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42879*FLEN/8, x13, x9, x10)

inst_14315:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbc800fff; valaddr_reg:x12; val_offset:42882*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42882*FLEN/8, x13, x9, x10)

inst_14316:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbcfff800; valaddr_reg:x12; val_offset:42885*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42885*FLEN/8, x13, x9, x10)

inst_14317:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbc8007ff; valaddr_reg:x12; val_offset:42888*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42888*FLEN/8, x13, x9, x10)

inst_14318:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbcfffc00; valaddr_reg:x12; val_offset:42891*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42891*FLEN/8, x13, x9, x10)

inst_14319:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbc8003ff; valaddr_reg:x12; val_offset:42894*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42894*FLEN/8, x13, x9, x10)

inst_14320:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbcfffe00; valaddr_reg:x12; val_offset:42897*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42897*FLEN/8, x13, x9, x10)

inst_14321:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbc8001ff; valaddr_reg:x12; val_offset:42900*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42900*FLEN/8, x13, x9, x10)

inst_14322:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbcffff00; valaddr_reg:x12; val_offset:42903*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42903*FLEN/8, x13, x9, x10)

inst_14323:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbc8000ff; valaddr_reg:x12; val_offset:42906*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42906*FLEN/8, x13, x9, x10)

inst_14324:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbcffff80; valaddr_reg:x12; val_offset:42909*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42909*FLEN/8, x13, x9, x10)

inst_14325:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbc80007f; valaddr_reg:x12; val_offset:42912*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42912*FLEN/8, x13, x9, x10)

inst_14326:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbcffffc0; valaddr_reg:x12; val_offset:42915*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42915*FLEN/8, x13, x9, x10)

inst_14327:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbc80003f; valaddr_reg:x12; val_offset:42918*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42918*FLEN/8, x13, x9, x10)

inst_14328:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbcffffe0; valaddr_reg:x12; val_offset:42921*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42921*FLEN/8, x13, x9, x10)

inst_14329:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbc80001f; valaddr_reg:x12; val_offset:42924*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42924*FLEN/8, x13, x9, x10)

inst_14330:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbcfffff0; valaddr_reg:x12; val_offset:42927*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42927*FLEN/8, x13, x9, x10)

inst_14331:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbc80000f; valaddr_reg:x12; val_offset:42930*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42930*FLEN/8, x13, x9, x10)

inst_14332:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbcfffff8; valaddr_reg:x12; val_offset:42933*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42933*FLEN/8, x13, x9, x10)

inst_14333:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbc800007; valaddr_reg:x12; val_offset:42936*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42936*FLEN/8, x13, x9, x10)

inst_14334:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbcfffffc; valaddr_reg:x12; val_offset:42939*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42939*FLEN/8, x13, x9, x10)

inst_14335:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbc800003; valaddr_reg:x12; val_offset:42942*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42942*FLEN/8, x13, x9, x10)

inst_14336:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbcfffffe; valaddr_reg:x12; val_offset:42945*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42945*FLEN/8, x13, x9, x10)

inst_14337:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x79 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbc800001; valaddr_reg:x12; val_offset:42948*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42948*FLEN/8, x13, x9, x10)

inst_14338:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:42951*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42951*FLEN/8, x13, x9, x10)

inst_14339:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbf800007; valaddr_reg:x12; val_offset:42954*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42954*FLEN/8, x13, x9, x10)

inst_14340:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:42957*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42957*FLEN/8, x13, x9, x10)

inst_14341:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbf800003; valaddr_reg:x12; val_offset:42960*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42960*FLEN/8, x13, x9, x10)

inst_14342:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:42963*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42963*FLEN/8, x13, x9, x10)

inst_14343:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbf800001; valaddr_reg:x12; val_offset:42966*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42966*FLEN/8, x13, x9, x10)

inst_14344:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:42969*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42969*FLEN/8, x13, x9, x10)

inst_14345:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:42972*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42972*FLEN/8, x13, x9, x10)

inst_14346:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbf999999; valaddr_reg:x12; val_offset:42975*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42975*FLEN/8, x13, x9, x10)

inst_14347:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:42978*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42978*FLEN/8, x13, x9, x10)

inst_14348:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:42981*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42981*FLEN/8, x13, x9, x10)

inst_14349:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:42984*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42984*FLEN/8, x13, x9, x10)

inst_14350:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:42987*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42987*FLEN/8, x13, x9, x10)

inst_14351:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:42990*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42990*FLEN/8, x13, x9, x10)

inst_14352:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:42993*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42993*FLEN/8, x13, x9, x10)

inst_14353:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43dffb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x8043dffb;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:42996*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42996*FLEN/8, x13, x9, x10)

inst_14354:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd000000; valaddr_reg:x12; val_offset:42999*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 42999*FLEN/8, x13, x9, x10)

inst_14355:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7fffff; valaddr_reg:x12; val_offset:43002*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43002*FLEN/8, x13, x9, x10)

inst_14356:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd400000; valaddr_reg:x12; val_offset:43005*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43005*FLEN/8, x13, x9, x10)

inst_14357:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd3fffff; valaddr_reg:x12; val_offset:43008*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43008*FLEN/8, x13, x9, x10)

inst_14358:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd600000; valaddr_reg:x12; val_offset:43011*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43011*FLEN/8, x13, x9, x10)

inst_14359:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd1fffff; valaddr_reg:x12; val_offset:43014*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43014*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_112)
inst_14360:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd700000; valaddr_reg:x12; val_offset:43017*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43017*FLEN/8, x13, x9, x10)

inst_14361:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd0fffff; valaddr_reg:x12; val_offset:43020*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43020*FLEN/8, x13, x9, x10)

inst_14362:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd780000; valaddr_reg:x12; val_offset:43023*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43023*FLEN/8, x13, x9, x10)

inst_14363:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd07ffff; valaddr_reg:x12; val_offset:43026*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43026*FLEN/8, x13, x9, x10)

inst_14364:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7c0000; valaddr_reg:x12; val_offset:43029*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43029*FLEN/8, x13, x9, x10)

inst_14365:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd03ffff; valaddr_reg:x12; val_offset:43032*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43032*FLEN/8, x13, x9, x10)

inst_14366:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7e0000; valaddr_reg:x12; val_offset:43035*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43035*FLEN/8, x13, x9, x10)

inst_14367:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd01ffff; valaddr_reg:x12; val_offset:43038*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43038*FLEN/8, x13, x9, x10)

inst_14368:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7f0000; valaddr_reg:x12; val_offset:43041*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43041*FLEN/8, x13, x9, x10)

inst_14369:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd00ffff; valaddr_reg:x12; val_offset:43044*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43044*FLEN/8, x13, x9, x10)

inst_14370:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7f8000; valaddr_reg:x12; val_offset:43047*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43047*FLEN/8, x13, x9, x10)

inst_14371:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd007fff; valaddr_reg:x12; val_offset:43050*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43050*FLEN/8, x13, x9, x10)

inst_14372:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7fc000; valaddr_reg:x12; val_offset:43053*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43053*FLEN/8, x13, x9, x10)

inst_14373:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd003fff; valaddr_reg:x12; val_offset:43056*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43056*FLEN/8, x13, x9, x10)

inst_14374:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7fe000; valaddr_reg:x12; val_offset:43059*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43059*FLEN/8, x13, x9, x10)

inst_14375:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd001fff; valaddr_reg:x12; val_offset:43062*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43062*FLEN/8, x13, x9, x10)

inst_14376:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7ff000; valaddr_reg:x12; val_offset:43065*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43065*FLEN/8, x13, x9, x10)

inst_14377:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd000fff; valaddr_reg:x12; val_offset:43068*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43068*FLEN/8, x13, x9, x10)

inst_14378:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7ff800; valaddr_reg:x12; val_offset:43071*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43071*FLEN/8, x13, x9, x10)

inst_14379:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd0007ff; valaddr_reg:x12; val_offset:43074*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43074*FLEN/8, x13, x9, x10)

inst_14380:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7ffc00; valaddr_reg:x12; val_offset:43077*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43077*FLEN/8, x13, x9, x10)

inst_14381:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd0003ff; valaddr_reg:x12; val_offset:43080*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43080*FLEN/8, x13, x9, x10)

inst_14382:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7ffe00; valaddr_reg:x12; val_offset:43083*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43083*FLEN/8, x13, x9, x10)

inst_14383:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd0001ff; valaddr_reg:x12; val_offset:43086*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43086*FLEN/8, x13, x9, x10)

inst_14384:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7fff00; valaddr_reg:x12; val_offset:43089*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43089*FLEN/8, x13, x9, x10)

inst_14385:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd0000ff; valaddr_reg:x12; val_offset:43092*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43092*FLEN/8, x13, x9, x10)

inst_14386:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7fff80; valaddr_reg:x12; val_offset:43095*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43095*FLEN/8, x13, x9, x10)

inst_14387:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd00007f; valaddr_reg:x12; val_offset:43098*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43098*FLEN/8, x13, x9, x10)

inst_14388:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7fffc0; valaddr_reg:x12; val_offset:43101*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43101*FLEN/8, x13, x9, x10)

inst_14389:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd00003f; valaddr_reg:x12; val_offset:43104*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43104*FLEN/8, x13, x9, x10)

inst_14390:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7fffe0; valaddr_reg:x12; val_offset:43107*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43107*FLEN/8, x13, x9, x10)

inst_14391:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd00001f; valaddr_reg:x12; val_offset:43110*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43110*FLEN/8, x13, x9, x10)

inst_14392:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7ffff0; valaddr_reg:x12; val_offset:43113*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43113*FLEN/8, x13, x9, x10)

inst_14393:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd00000f; valaddr_reg:x12; val_offset:43116*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43116*FLEN/8, x13, x9, x10)

inst_14394:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7ffff8; valaddr_reg:x12; val_offset:43119*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43119*FLEN/8, x13, x9, x10)

inst_14395:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd000007; valaddr_reg:x12; val_offset:43122*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43122*FLEN/8, x13, x9, x10)

inst_14396:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7ffffc; valaddr_reg:x12; val_offset:43125*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43125*FLEN/8, x13, x9, x10)

inst_14397:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd000003; valaddr_reg:x12; val_offset:43128*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43128*FLEN/8, x13, x9, x10)

inst_14398:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7ffffe; valaddr_reg:x12; val_offset:43131*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43131*FLEN/8, x13, x9, x10)

inst_14399:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd000001; valaddr_reg:x12; val_offset:43134*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43134*FLEN/8, x13, x9, x10)

inst_14400:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:43137*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43137*FLEN/8, x13, x9, x10)

inst_14401:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbf800007; valaddr_reg:x12; val_offset:43140*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43140*FLEN/8, x13, x9, x10)

inst_14402:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:43143*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43143*FLEN/8, x13, x9, x10)

inst_14403:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbf800003; valaddr_reg:x12; val_offset:43146*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43146*FLEN/8, x13, x9, x10)

inst_14404:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:43149*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43149*FLEN/8, x13, x9, x10)

inst_14405:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbf800001; valaddr_reg:x12; val_offset:43152*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43152*FLEN/8, x13, x9, x10)

inst_14406:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:43155*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43155*FLEN/8, x13, x9, x10)

inst_14407:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:43158*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43158*FLEN/8, x13, x9, x10)

inst_14408:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbf999999; valaddr_reg:x12; val_offset:43161*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43161*FLEN/8, x13, x9, x10)

inst_14409:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:43164*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43164*FLEN/8, x13, x9, x10)

inst_14410:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:43167*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43167*FLEN/8, x13, x9, x10)

inst_14411:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:43170*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43170*FLEN/8, x13, x9, x10)

inst_14412:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:43173*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43173*FLEN/8, x13, x9, x10)

inst_14413:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:43176*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43176*FLEN/8, x13, x9, x10)

inst_14414:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:43179*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43179*FLEN/8, x13, x9, x10)

inst_14415:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:43182*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43182*FLEN/8, x13, x9, x10)

inst_14416:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd800000; valaddr_reg:x12; val_offset:43185*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43185*FLEN/8, x13, x9, x10)

inst_14417:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdffffff; valaddr_reg:x12; val_offset:43188*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43188*FLEN/8, x13, x9, x10)

inst_14418:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdc00000; valaddr_reg:x12; val_offset:43191*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43191*FLEN/8, x13, x9, x10)

inst_14419:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdbfffff; valaddr_reg:x12; val_offset:43194*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43194*FLEN/8, x13, x9, x10)

inst_14420:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbde00000; valaddr_reg:x12; val_offset:43197*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43197*FLEN/8, x13, x9, x10)

inst_14421:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd9fffff; valaddr_reg:x12; val_offset:43200*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43200*FLEN/8, x13, x9, x10)

inst_14422:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdf00000; valaddr_reg:x12; val_offset:43203*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43203*FLEN/8, x13, x9, x10)

inst_14423:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd8fffff; valaddr_reg:x12; val_offset:43206*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43206*FLEN/8, x13, x9, x10)

inst_14424:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdf80000; valaddr_reg:x12; val_offset:43209*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43209*FLEN/8, x13, x9, x10)

inst_14425:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd87ffff; valaddr_reg:x12; val_offset:43212*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43212*FLEN/8, x13, x9, x10)

inst_14426:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdfc0000; valaddr_reg:x12; val_offset:43215*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43215*FLEN/8, x13, x9, x10)

inst_14427:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd83ffff; valaddr_reg:x12; val_offset:43218*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43218*FLEN/8, x13, x9, x10)

inst_14428:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdfe0000; valaddr_reg:x12; val_offset:43221*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43221*FLEN/8, x13, x9, x10)

inst_14429:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd81ffff; valaddr_reg:x12; val_offset:43224*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43224*FLEN/8, x13, x9, x10)

inst_14430:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdff0000; valaddr_reg:x12; val_offset:43227*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43227*FLEN/8, x13, x9, x10)

inst_14431:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd80ffff; valaddr_reg:x12; val_offset:43230*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43230*FLEN/8, x13, x9, x10)

inst_14432:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdff8000; valaddr_reg:x12; val_offset:43233*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43233*FLEN/8, x13, x9, x10)

inst_14433:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd807fff; valaddr_reg:x12; val_offset:43236*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43236*FLEN/8, x13, x9, x10)

inst_14434:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdffc000; valaddr_reg:x12; val_offset:43239*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43239*FLEN/8, x13, x9, x10)

inst_14435:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd803fff; valaddr_reg:x12; val_offset:43242*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43242*FLEN/8, x13, x9, x10)

inst_14436:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdffe000; valaddr_reg:x12; val_offset:43245*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43245*FLEN/8, x13, x9, x10)

inst_14437:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd801fff; valaddr_reg:x12; val_offset:43248*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43248*FLEN/8, x13, x9, x10)

inst_14438:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdfff000; valaddr_reg:x12; val_offset:43251*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43251*FLEN/8, x13, x9, x10)

inst_14439:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd800fff; valaddr_reg:x12; val_offset:43254*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43254*FLEN/8, x13, x9, x10)

inst_14440:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdfff800; valaddr_reg:x12; val_offset:43257*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43257*FLEN/8, x13, x9, x10)

inst_14441:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd8007ff; valaddr_reg:x12; val_offset:43260*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43260*FLEN/8, x13, x9, x10)

inst_14442:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdfffc00; valaddr_reg:x12; val_offset:43263*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43263*FLEN/8, x13, x9, x10)

inst_14443:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd8003ff; valaddr_reg:x12; val_offset:43266*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43266*FLEN/8, x13, x9, x10)

inst_14444:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdfffe00; valaddr_reg:x12; val_offset:43269*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43269*FLEN/8, x13, x9, x10)

inst_14445:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd8001ff; valaddr_reg:x12; val_offset:43272*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43272*FLEN/8, x13, x9, x10)

inst_14446:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdffff00; valaddr_reg:x12; val_offset:43275*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43275*FLEN/8, x13, x9, x10)

inst_14447:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd8000ff; valaddr_reg:x12; val_offset:43278*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43278*FLEN/8, x13, x9, x10)

inst_14448:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdffff80; valaddr_reg:x12; val_offset:43281*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43281*FLEN/8, x13, x9, x10)

inst_14449:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd80007f; valaddr_reg:x12; val_offset:43284*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43284*FLEN/8, x13, x9, x10)

inst_14450:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdffffc0; valaddr_reg:x12; val_offset:43287*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43287*FLEN/8, x13, x9, x10)

inst_14451:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd80003f; valaddr_reg:x12; val_offset:43290*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43290*FLEN/8, x13, x9, x10)

inst_14452:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdffffe0; valaddr_reg:x12; val_offset:43293*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43293*FLEN/8, x13, x9, x10)

inst_14453:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd80001f; valaddr_reg:x12; val_offset:43296*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43296*FLEN/8, x13, x9, x10)

inst_14454:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdfffff0; valaddr_reg:x12; val_offset:43299*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43299*FLEN/8, x13, x9, x10)

inst_14455:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd80000f; valaddr_reg:x12; val_offset:43302*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43302*FLEN/8, x13, x9, x10)

inst_14456:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdfffff8; valaddr_reg:x12; val_offset:43305*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43305*FLEN/8, x13, x9, x10)

inst_14457:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd800007; valaddr_reg:x12; val_offset:43308*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43308*FLEN/8, x13, x9, x10)

inst_14458:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdfffffc; valaddr_reg:x12; val_offset:43311*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43311*FLEN/8, x13, x9, x10)

inst_14459:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd800003; valaddr_reg:x12; val_offset:43314*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43314*FLEN/8, x13, x9, x10)

inst_14460:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbdfffffe; valaddr_reg:x12; val_offset:43317*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43317*FLEN/8, x13, x9, x10)

inst_14461:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbd800001; valaddr_reg:x12; val_offset:43320*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43320*FLEN/8, x13, x9, x10)

inst_14462:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:43323*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43323*FLEN/8, x13, x9, x10)

inst_14463:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbf800007; valaddr_reg:x12; val_offset:43326*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43326*FLEN/8, x13, x9, x10)

inst_14464:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:43329*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43329*FLEN/8, x13, x9, x10)

inst_14465:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbf800003; valaddr_reg:x12; val_offset:43332*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43332*FLEN/8, x13, x9, x10)

inst_14466:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:43335*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43335*FLEN/8, x13, x9, x10)

inst_14467:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbf800001; valaddr_reg:x12; val_offset:43338*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43338*FLEN/8, x13, x9, x10)

inst_14468:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:43341*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43341*FLEN/8, x13, x9, x10)

inst_14469:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:43344*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43344*FLEN/8, x13, x9, x10)

inst_14470:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbf999999; valaddr_reg:x12; val_offset:43347*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43347*FLEN/8, x13, x9, x10)

inst_14471:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbfe66666; valaddr_reg:x12; val_offset:43350*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43350*FLEN/8, x13, x9, x10)

inst_14472:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbfbbbbbb; valaddr_reg:x12; val_offset:43353*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43353*FLEN/8, x13, x9, x10)

inst_14473:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbfc44444; valaddr_reg:x12; val_offset:43356*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43356*FLEN/8, x13, x9, x10)

inst_14474:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbfa49249; valaddr_reg:x12; val_offset:43359*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43359*FLEN/8, x13, x9, x10)

inst_14475:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbfdb6db6; valaddr_reg:x12; val_offset:43362*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43362*FLEN/8, x13, x9, x10)

inst_14476:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbfb33333; valaddr_reg:x12; val_offset:43365*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43365*FLEN/8, x13, x9, x10)

inst_14477:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x196401 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x559fdf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d196401; op2val:0x81d59fdf;
op3val:0xbfcccccc; valaddr_reg:x12; val_offset:43368*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43368*FLEN/8, x13, x9, x10)

inst_14478:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe000000; valaddr_reg:x12; val_offset:43371*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43371*FLEN/8, x13, x9, x10)

inst_14479:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe7fffff; valaddr_reg:x12; val_offset:43374*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43374*FLEN/8, x13, x9, x10)

inst_14480:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe400000; valaddr_reg:x12; val_offset:43377*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43377*FLEN/8, x13, x9, x10)

inst_14481:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe3fffff; valaddr_reg:x12; val_offset:43380*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43380*FLEN/8, x13, x9, x10)

inst_14482:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe600000; valaddr_reg:x12; val_offset:43383*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43383*FLEN/8, x13, x9, x10)

inst_14483:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe1fffff; valaddr_reg:x12; val_offset:43386*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43386*FLEN/8, x13, x9, x10)

inst_14484:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe700000; valaddr_reg:x12; val_offset:43389*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43389*FLEN/8, x13, x9, x10)

inst_14485:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe0fffff; valaddr_reg:x12; val_offset:43392*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43392*FLEN/8, x13, x9, x10)

inst_14486:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe780000; valaddr_reg:x12; val_offset:43395*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43395*FLEN/8, x13, x9, x10)

inst_14487:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe07ffff; valaddr_reg:x12; val_offset:43398*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43398*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_113)
inst_14488:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe7c0000; valaddr_reg:x12; val_offset:43401*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43401*FLEN/8, x13, x9, x10)

inst_14489:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe03ffff; valaddr_reg:x12; val_offset:43404*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43404*FLEN/8, x13, x9, x10)

inst_14490:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe7e0000; valaddr_reg:x12; val_offset:43407*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43407*FLEN/8, x13, x9, x10)

inst_14491:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe01ffff; valaddr_reg:x12; val_offset:43410*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43410*FLEN/8, x13, x9, x10)

inst_14492:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe7f0000; valaddr_reg:x12; val_offset:43413*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43413*FLEN/8, x13, x9, x10)

inst_14493:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe00ffff; valaddr_reg:x12; val_offset:43416*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43416*FLEN/8, x13, x9, x10)

inst_14494:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe7f8000; valaddr_reg:x12; val_offset:43419*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43419*FLEN/8, x13, x9, x10)

inst_14495:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe007fff; valaddr_reg:x12; val_offset:43422*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43422*FLEN/8, x13, x9, x10)

inst_14496:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe7fc000; valaddr_reg:x12; val_offset:43425*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43425*FLEN/8, x13, x9, x10)

inst_14497:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe003fff; valaddr_reg:x12; val_offset:43428*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43428*FLEN/8, x13, x9, x10)

inst_14498:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe7fe000; valaddr_reg:x12; val_offset:43431*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43431*FLEN/8, x13, x9, x10)

inst_14499:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe001fff; valaddr_reg:x12; val_offset:43434*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43434*FLEN/8, x13, x9, x10)

inst_14500:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe7ff000; valaddr_reg:x12; val_offset:43437*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43437*FLEN/8, x13, x9, x10)

inst_14501:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe000fff; valaddr_reg:x12; val_offset:43440*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43440*FLEN/8, x13, x9, x10)

inst_14502:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe7ff800; valaddr_reg:x12; val_offset:43443*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43443*FLEN/8, x13, x9, x10)

inst_14503:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe0007ff; valaddr_reg:x12; val_offset:43446*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43446*FLEN/8, x13, x9, x10)

inst_14504:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe7ffc00; valaddr_reg:x12; val_offset:43449*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43449*FLEN/8, x13, x9, x10)

inst_14505:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe0003ff; valaddr_reg:x12; val_offset:43452*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43452*FLEN/8, x13, x9, x10)

inst_14506:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe7ffe00; valaddr_reg:x12; val_offset:43455*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43455*FLEN/8, x13, x9, x10)

inst_14507:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe0001ff; valaddr_reg:x12; val_offset:43458*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43458*FLEN/8, x13, x9, x10)

inst_14508:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe7fff00; valaddr_reg:x12; val_offset:43461*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43461*FLEN/8, x13, x9, x10)

inst_14509:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe0000ff; valaddr_reg:x12; val_offset:43464*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43464*FLEN/8, x13, x9, x10)

inst_14510:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe7fff80; valaddr_reg:x12; val_offset:43467*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43467*FLEN/8, x13, x9, x10)

inst_14511:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe00007f; valaddr_reg:x12; val_offset:43470*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43470*FLEN/8, x13, x9, x10)

inst_14512:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe7fffc0; valaddr_reg:x12; val_offset:43473*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43473*FLEN/8, x13, x9, x10)

inst_14513:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe00003f; valaddr_reg:x12; val_offset:43476*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43476*FLEN/8, x13, x9, x10)

inst_14514:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe7fffe0; valaddr_reg:x12; val_offset:43479*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43479*FLEN/8, x13, x9, x10)

inst_14515:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe00001f; valaddr_reg:x12; val_offset:43482*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43482*FLEN/8, x13, x9, x10)

inst_14516:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe7ffff0; valaddr_reg:x12; val_offset:43485*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43485*FLEN/8, x13, x9, x10)

inst_14517:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe00000f; valaddr_reg:x12; val_offset:43488*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43488*FLEN/8, x13, x9, x10)

inst_14518:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe7ffff8; valaddr_reg:x12; val_offset:43491*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43491*FLEN/8, x13, x9, x10)

inst_14519:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe000007; valaddr_reg:x12; val_offset:43494*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43494*FLEN/8, x13, x9, x10)

inst_14520:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe7ffffc; valaddr_reg:x12; val_offset:43497*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43497*FLEN/8, x13, x9, x10)

inst_14521:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe000003; valaddr_reg:x12; val_offset:43500*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43500*FLEN/8, x13, x9, x10)

inst_14522:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe7ffffe; valaddr_reg:x12; val_offset:43503*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43503*FLEN/8, x13, x9, x10)

inst_14523:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbe000001; valaddr_reg:x12; val_offset:43506*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43506*FLEN/8, x13, x9, x10)

inst_14524:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbffffff8; valaddr_reg:x12; val_offset:43509*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43509*FLEN/8, x13, x9, x10)

inst_14525:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbf800007; valaddr_reg:x12; val_offset:43512*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43512*FLEN/8, x13, x9, x10)

inst_14526:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbffffffc; valaddr_reg:x12; val_offset:43515*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43515*FLEN/8, x13, x9, x10)

inst_14527:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbf800003; valaddr_reg:x12; val_offset:43518*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43518*FLEN/8, x13, x9, x10)

inst_14528:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbffffffe; valaddr_reg:x12; val_offset:43521*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43521*FLEN/8, x13, x9, x10)

inst_14529:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbf800001; valaddr_reg:x12; val_offset:43524*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43524*FLEN/8, x13, x9, x10)

inst_14530:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbfb6db6d; valaddr_reg:x12; val_offset:43527*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43527*FLEN/8, x13, x9, x10)

inst_14531:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3614 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0xffffffff  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x809d3614;
op3val:0xbfedb6db; valaddr_reg:x12; val_offset:43530*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 43530*FLEN/8, x13, x9, x10)

#endif
RVTEST_CODE_END
RVMODEL_HALT
RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3103780864,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3095400447,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3103782912,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3095398399,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3103783936,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3095397375,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3103784448,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3095396863,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3103784704,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3095396607,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3103784832,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3095396479,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3103784896,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3095396415,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3103784928,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3095396383,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3103784944,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3095396367,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3103784952,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3095396359,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3103784956,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3095396355,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3103784958,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3095396353,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3221225464,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3212836871,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3221225468,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3212836867,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3221225470,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3212836865,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3216431981,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3220027099,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3214514585,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3219547750,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3216751547,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3217310788,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3215233609,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3218828726,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3216192307,32,FLEN)
NAN_BOXED(2127383797,32,FLEN)
NAN_BOXED(2152713743,32,FLEN)
NAN_BOXED(3217870028,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3103784960,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3112173567,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3107979264,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3107979263,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3110076416,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3105882111,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3111124992,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3104833535,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3111649280,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3104309247,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3111911424,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3104047103,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3112042496,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3103916031,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3112108032,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3103850495,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3112140800,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3103817727,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3112157184,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3103801343,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3112165376,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3103793151,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3112169472,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3103789055,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3112171520,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3103787007,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3112172544,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3103785983,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3112173056,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3103785471,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3112173312,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3103785215,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3112173440,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3103785087,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3112173504,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3103785023,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3112173536,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3103784991,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3112173552,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3103784975,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3112173560,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3103784967,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3112173564,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3103784963,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3112173566,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3103784961,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3221225464,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3212836871,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3221225468,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3212836867,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3221225470,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3212836865,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3216431981,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3220027099,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3214514585,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3219547750,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3216751547,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3217310788,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3215233609,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3218828726,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3216192307,32,FLEN)
NAN_BOXED(2132595682,32,FLEN)
NAN_BOXED(2150906965,32,FLEN)
NAN_BOXED(3217870028,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3112173568,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3120562175,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3116367872,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3116367871,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3118465024,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3114270719,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3119513600,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3113222143,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3120037888,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3112697855,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3120300032,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3112435711,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3120431104,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3112304639,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3120496640,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3112239103,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3120529408,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3112206335,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3120545792,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3112189951,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3120553984,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3112181759,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3120558080,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3112177663,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3120560128,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3112175615,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3120561152,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3112174591,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3120561664,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3112174079,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3120561920,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3112173823,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3120562048,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3112173695,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3120562112,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3112173631,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3120562144,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3112173599,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3120562160,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3112173583,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3120562168,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3112173575,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3120562172,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3112173571,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3120562174,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3112173569,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3221225464,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3212836871,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3221225468,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3212836867,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3221225470,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3212836865,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3216431981,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3220027099,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3214514585,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3219547750,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3216751547,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3217310788,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3215233609,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3218828726,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3216192307,32,FLEN)
NAN_BOXED(2114162532,32,FLEN)
NAN_BOXED(2163806858,32,FLEN)
NAN_BOXED(3217870028,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3120562176,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3128950783,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3124756480,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3124756479,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3126853632,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3122659327,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3127902208,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3121610751,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3128426496,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3121086463,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3128688640,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3120824319,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3128819712,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3120693247,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3128885248,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3120627711,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3128918016,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3120594943,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3128934400,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3120578559,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3128942592,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3120570367,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3128946688,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3120566271,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3128948736,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3120564223,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3128949760,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3120563199,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3128950272,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3120562687,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3128950528,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3120562431,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3128950656,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3120562303,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3128950720,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3120562239,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3128950752,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3120562207,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3128950768,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3120562191,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3128950776,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3120562183,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3128950780,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3120562179,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3128950782,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3120562177,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3221225464,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3212836871,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3221225468,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3212836867,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3221225470,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3212836865,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3216431981,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3220027099,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3214514585,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3219547750,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3216751547,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3217310788,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3215233609,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3218828726,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3216192307,32,FLEN)
NAN_BOXED(2132279361,32,FLEN)
NAN_BOXED(2151015670,32,FLEN)
NAN_BOXED(3217870028,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3128950784,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3137339391,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3133145088,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3133145087,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3135242240,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3131047935,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3136290816,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3129999359,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3136815104,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3129475071,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3137077248,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3129212927,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3137208320,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3129081855,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3137273856,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3129016319,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3137306624,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3128983551,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3137323008,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3128967167,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3137331200,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3128958975,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3137335296,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3128954879,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3137337344,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3128952831,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3137338368,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3128951807,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3137338880,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3128951295,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3137339136,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3128951039,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3137339264,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3128950911,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3137339328,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3128950847,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3137339360,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3128950815,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3137339376,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3128950799,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3137339384,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3128950791,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3137339388,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3128950787,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3137339390,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3128950785,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3221225464,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3212836871,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3221225468,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3212836867,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3221225470,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3212836865,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3216431981,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3220027099,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3214514585,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3219547750,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3216751547,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3217310788,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3215233609,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3218828726,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3216192307,32,FLEN)
NAN_BOXED(2133916330,32,FLEN)
NAN_BOXED(2150517174,32,FLEN)
NAN_BOXED(3217870028,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3137339392,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3145727999,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3141533696,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3141533695,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3143630848,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3139436543,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3144679424,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3138387967,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3145203712,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3137863679,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3145465856,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3137601535,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3145596928,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3137470463,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3145662464,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3137404927,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3145695232,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3137372159,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3145711616,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3137355775,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3145719808,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3137347583,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3145723904,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3137343487,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3145725952,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3137341439,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3145726976,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3137340415,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3145727488,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3137339903,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3145727744,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3137339647,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3145727872,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3137339519,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3145727936,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3137339455,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3145727968,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3137339423,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3145727984,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3137339407,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3145727992,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3137339399,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3145727996,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3137339395,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3145727998,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3137339393,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3221225464,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3212836871,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3221225468,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3212836867,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3221225470,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3212836865,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3216431981,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3220027099,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3214514585,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3219547750,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3216751547,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3217310788,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3215233609,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3218828726,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3216192307,32,FLEN)
NAN_BOXED(2132460292,32,FLEN)
NAN_BOXED(2150952662,32,FLEN)
NAN_BOXED(3217870028,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3145728000,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3154116607,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3149922304,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3149922303,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3152019456,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3147825151,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3153068032,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3146776575,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3153592320,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3146252287,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3153854464,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3145990143,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3153985536,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3145859071,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3154051072,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3145793535,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3154083840,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3145760767,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3154100224,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3145744383,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3154108416,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3145736191,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3154112512,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3145732095,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3154114560,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3145730047,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3154115584,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3145729023,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3154116096,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3145728511,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3154116352,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3145728255,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3154116480,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3145728127,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3154116544,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3145728063,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3154116576,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3145728031,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3154116592,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3145728015,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3154116600,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3145728007,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3154116604,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3145728003,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3154116606,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3145728001,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3221225464,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3212836871,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3221225468,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3212836867,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3221225470,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3212836865,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3216431981,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3220027099,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3214514585,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3219547750,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3216751547,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3217310788,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3215233609,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3218828726,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3216192307,32,FLEN)
NAN_BOXED(2132679836,32,FLEN)
NAN_BOXED(2150879163,32,FLEN)
NAN_BOXED(3217870028,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3154116608,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3162505215,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3158310912,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3158310911,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3160408064,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3156213759,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3161456640,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3155165183,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3161980928,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3154640895,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3162243072,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3154378751,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3162374144,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3154247679,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3162439680,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3154182143,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3162472448,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3154149375,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3162488832,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3154132991,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3162497024,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3154124799,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3162501120,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3154120703,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3162503168,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3154118655,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3162504192,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3154117631,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3162504704,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3154117119,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3162504960,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3154116863,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3162505088,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3154116735,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3162505152,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3154116671,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3162505184,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3154116639,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3162505200,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3154116623,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3162505208,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3154116615,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3162505212,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3154116611,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3162505214,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3154116609,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3221225464,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3212836871,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3221225468,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3212836867,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3221225470,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3212836865,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3216431981,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3220027099,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3214514585,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3219547750,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3216751547,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3217310788,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3215233609,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3218828726,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3216192307,32,FLEN)
NAN_BOXED(2075684765,32,FLEN)
NAN_BOXED(2201070205,32,FLEN)
NAN_BOXED(3217870028,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3162505216,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3170893823,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3166699520,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3166699519,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3168796672,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3164602367,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3169845248,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3163553791,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3170369536,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3163029503,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3170631680,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3162767359,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3170762752,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3162636287,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3170828288,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3162570751,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3170861056,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3162537983,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3170877440,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3162521599,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3170885632,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3162513407,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3170889728,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3162509311,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3170891776,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3162507263,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3170892800,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3162506239,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3170893312,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3162505727,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3170893568,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3162505471,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3170893696,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3162505343,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3170893760,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3162505279,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3170893792,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3162505247,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3170893808,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3162505231,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3170893816,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3162505223,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3170893820,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3162505219,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3170893822,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3162505217,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3221225464,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3212836871,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3221225468,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3212836867,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3221225470,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3212836865,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3216431981,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3220027099,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3214514585,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3219547750,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3216751547,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3217310788,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3215233609,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3218828726,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3216192307,32,FLEN)
NAN_BOXED(2129748633,32,FLEN)
NAN_BOXED(2151931899,32,FLEN)
NAN_BOXED(3217870028,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3170893824,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3179282431,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3175088128,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3175088127,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3177185280,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3172990975,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3178233856,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3171942399,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3178758144,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3171418111,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3179020288,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3171155967,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3179151360,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3171024895,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3179216896,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3170959359,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3179249664,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3170926591,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3179266048,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3170910207,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3179274240,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3170902015,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3179278336,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3170897919,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3179280384,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3170895871,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3179281408,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3170894847,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3179281920,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3170894335,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3179282176,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3170894079,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3179282304,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3170893951,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3179282368,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3170893887,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3179282400,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3170893855,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3179282416,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3170893839,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3179282424,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3170893831,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3179282428,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3170893827,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3179282430,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3170893825,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3221225464,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3212836871,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3221225468,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3212836867,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3221225470,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3212836865,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3216431981,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3220027099,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3214514585,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3219547750,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3216751547,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3217310788,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3215233609,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3218828726,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3216192307,32,FLEN)
NAN_BOXED(2133171271,32,FLEN)
NAN_BOXED(2150725417,32,FLEN)
NAN_BOXED(3217870028,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3179282432,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3187671039,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3183476736,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3183476735,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3185573888,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3181379583,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3186622464,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3180331007,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3187146752,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3179806719,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3187408896,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3179544575,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3187539968,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3179413503,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3187605504,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3179347967,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3187638272,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3179315199,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3187654656,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3179298815,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3187662848,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3179290623,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3187666944,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3179286527,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3187668992,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3179284479,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3187670016,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3179283455,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3187670528,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3179282943,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3187670784,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3179282687,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3187670912,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3179282559,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3187670976,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3179282495,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3187671008,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3179282463,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3187671024,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3179282447,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3187671032,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3179282439,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3187671036,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3179282435,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3187671038,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3179282433,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3221225464,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3212836871,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3221225468,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3212836867,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3221225470,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3212836865,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3216431981,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3220027099,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3214514585,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3219547750,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3216751547,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3217310788,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3215233609,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3218828726,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3216192307,32,FLEN)
NAN_BOXED(2098816001,32,FLEN)
NAN_BOXED(2178260959,32,FLEN)
NAN_BOXED(3217870028,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3187671040,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3196059647,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3191865344,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3191865343,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3193962496,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3189768191,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3195011072,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3188719615,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3195535360,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3188195327,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3195797504,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3187933183,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3195928576,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3187802111,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3195994112,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3187736575,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3196026880,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3187703807,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3196043264,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3187687423,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3196051456,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3187679231,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3196055552,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3187675135,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3196057600,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3187673087,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3196058624,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3187672063,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3196059136,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3187671551,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3196059392,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3187671295,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3196059520,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3187671167,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3196059584,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3187671103,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3196059616,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3187671071,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3196059632,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3187671055,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3196059640,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3187671047,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3196059644,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3187671043,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3196059646,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3187671041,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3221225464,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3212836871,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3221225468,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3212836867,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3221225470,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3212836865,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3216431981,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3220027099,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3214514585,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3219547750,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3216751547,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3217310788,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3215233609,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3218828726,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3216192307,32,FLEN)
NAN_BOXED(2119200467,32,FLEN)
NAN_BOXED(2157786644,32,FLEN)
NAN_BOXED(3217870028,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3196059648,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3204448255,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3200253952,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3200253951,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3202351104,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3198156799,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3203399680,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3197108223,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3203923968,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3196583935,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3204186112,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3196321791,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3204317184,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3196190719,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3204382720,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3196125183,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3204415488,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3196092415,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3204431872,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3196076031,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3204440064,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3196067839,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3204444160,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3196063743,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3204446208,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3196061695,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3204447232,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3196060671,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3204447744,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3196060159,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3204448000,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3196059903,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3204448128,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3196059775,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3204448192,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3196059711,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3204448224,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3196059679,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3204448240,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3196059663,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3204448248,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3196059655,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3204448252,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3196059651,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3204448254,32,FLEN)
NAN_BOXED(2119058989,32,FLEN)
NAN_BOXED(2157894472,32,FLEN)
NAN_BOXED(3196059649,32,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;



signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 48*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_0:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_2:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_3:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_4:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_5:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_6:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_7:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_8:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_9:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_10:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_11:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_12:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_13:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_14:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_15:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_16:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_17:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_18:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_19:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_20:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_21:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_22:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_23:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_24:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_25:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_26:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_27:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_28:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_29:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_30:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_31:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_32:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_33:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_34:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_35:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_36:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_37:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_38:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_39:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_40:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_41:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_42:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_43:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_44:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_45:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_46:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_47:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_48:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_49:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_50:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_51:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_52:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_53:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_54:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_55:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_56:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_57:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_58:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_59:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_60:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_61:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_62:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_63:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_64:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_65:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_66:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_67:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_68:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_69:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_70:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_71:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_72:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_73:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_74:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_75:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_76:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_77:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_78:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_79:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_80:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_81:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_82:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_83:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_84:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_85:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_86:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_87:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_88:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_89:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_90:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_91:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_92:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_93:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_94:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_95:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_96:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_97:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_98:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_99:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_100:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_101:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_102:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_103:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_104:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_105:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_106:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_107:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_108:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_109:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_110:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_111:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_112:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_113:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_114:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_115:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_116:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_117:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_118:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_119:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_120:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_121:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_122:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_123:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_124:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_125:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_126:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_127:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_128:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_129:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_130:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_131:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_132:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_133:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_134:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_135:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_136:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_137:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_138:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_139:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_140:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_141:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_142:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_143:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_144:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_145:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_146:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_147:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_148:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_149:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_150:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_151:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_152:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_153:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_154:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_155:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_156:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_157:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_158:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_159:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_160:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_161:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_162:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_163:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_164:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_165:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_166:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_167:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_168:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_169:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_170:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_171:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_172:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_173:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_174:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_175:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_176:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_177:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_178:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_179:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_180:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_181:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_182:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_183:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_184:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_185:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_186:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_187:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_188:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_189:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_190:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_191:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_192:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_193:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_194:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_195:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_196:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_197:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_198:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_199:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_200:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_201:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_202:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_203:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_204:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_205:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_206:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_207:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_208:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_209:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_210:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_211:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_212:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_213:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_214:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_215:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_216:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_217:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_218:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_219:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_220:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_221:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_222:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_223:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_224:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_225:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_226:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_227:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_228:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_229:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_230:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_231:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_232:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_233:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_234:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_235:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_236:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_237:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_238:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_239:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_240:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_241:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_242:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_243:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_244:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_245:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_246:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_247:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_248:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_249:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_250:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_251:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_252:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_253:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_254:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_255:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_256:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_257:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_258:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_259:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_260:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_261:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_262:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_263:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_264:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_265:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_266:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_267:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_268:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_269:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_270:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_271:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_272:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_273:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_274:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_275:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_276:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_277:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_278:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_279:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_280:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_281:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_282:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_283:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_284:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_285:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_286:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_287:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_288:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_289:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_290:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_291:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_292:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_293:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_294:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_295:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_296:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_297:
    .fill 180*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine
tsig_begin_canary:
CANARY;

mtrap_sigptr:
    .fill 64*XLEN/32,4,0xdeadbeef

tsig_end_canary:
CANARY;
#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif


sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
